Boot log: acer-cb317-1h-c3z6-dedede
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:48:20.754868 lava-dispatcher, installed at version: 2023.03
2 00:48:20.755091 start: 0 validate
3 00:48:20.755243 Start time: 2023-05-23 00:48:20.755233+00:00 (UTC)
4 00:48:20.755418 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:48:20.755614 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 00:48:21.047891 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:48:21.048140 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:21.049280 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:21.049432 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:48:21.052224 validate duration: 0.30
12 00:48:21.052505 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:48:21.052622 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:48:21.052743 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:48:21.052901 Not decompressing ramdisk as can be used compressed.
16 00:48:21.052987 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 00:48:21.053080 saving as /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/ramdisk/rootfs.cpio.gz
18 00:48:21.053147 total size: 8430071 (8MB)
19 00:48:21.054351 progress 0% (0MB)
20 00:48:21.056793 progress 5% (0MB)
21 00:48:21.059467 progress 10% (0MB)
22 00:48:21.061871 progress 15% (1MB)
23 00:48:21.064279 progress 20% (1MB)
24 00:48:21.066679 progress 25% (2MB)
25 00:48:21.069112 progress 30% (2MB)
26 00:48:21.071597 progress 35% (2MB)
27 00:48:21.074070 progress 40% (3MB)
28 00:48:21.076645 progress 45% (3MB)
29 00:48:21.079062 progress 50% (4MB)
30 00:48:21.081583 progress 55% (4MB)
31 00:48:21.084000 progress 60% (4MB)
32 00:48:21.086350 progress 65% (5MB)
33 00:48:21.088696 progress 70% (5MB)
34 00:48:21.090855 progress 75% (6MB)
35 00:48:21.093296 progress 80% (6MB)
36 00:48:21.095719 progress 85% (6MB)
37 00:48:21.098090 progress 90% (7MB)
38 00:48:21.100645 progress 95% (7MB)
39 00:48:21.103091 progress 100% (8MB)
40 00:48:21.103267 8MB downloaded in 0.05s (160.42MB/s)
41 00:48:21.103468 end: 1.1.1 http-download (duration 00:00:00) [common]
43 00:48:21.103791 end: 1.1 download-retry (duration 00:00:00) [common]
44 00:48:21.103893 start: 1.2 download-retry (timeout 00:10:00) [common]
45 00:48:21.104026 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 00:48:21.104176 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:48:21.104348 saving as /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/kernel/bzImage
48 00:48:21.104446 total size: 10862592 (10MB)
49 00:48:21.104544 No compression specified
50 00:48:21.106262 progress 0% (0MB)
51 00:48:21.109412 progress 5% (0MB)
52 00:48:21.112609 progress 10% (1MB)
53 00:48:21.115571 progress 15% (1MB)
54 00:48:21.118868 progress 20% (2MB)
55 00:48:21.121802 progress 25% (2MB)
56 00:48:21.124875 progress 30% (3MB)
57 00:48:21.127834 progress 35% (3MB)
58 00:48:21.130811 progress 40% (4MB)
59 00:48:21.133898 progress 45% (4MB)
60 00:48:21.137020 progress 50% (5MB)
61 00:48:21.140128 progress 55% (5MB)
62 00:48:21.143080 progress 60% (6MB)
63 00:48:21.146184 progress 65% (6MB)
64 00:48:21.149217 progress 70% (7MB)
65 00:48:21.152102 progress 75% (7MB)
66 00:48:21.155161 progress 80% (8MB)
67 00:48:21.158080 progress 85% (8MB)
68 00:48:21.161254 progress 90% (9MB)
69 00:48:21.164185 progress 95% (9MB)
70 00:48:21.167218 progress 100% (10MB)
71 00:48:21.167432 10MB downloaded in 0.06s (164.48MB/s)
72 00:48:21.167602 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:48:21.167879 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:48:21.167983 start: 1.3 download-retry (timeout 00:10:00) [common]
76 00:48:21.168089 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 00:48:21.168243 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:48:21.168344 saving as /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/modules/modules.tar
79 00:48:21.168446 total size: 484052 (0MB)
80 00:48:21.168547 Using unxz to decompress xz
81 00:48:21.172398 progress 6% (0MB)
82 00:48:21.172838 progress 13% (0MB)
83 00:48:21.173094 progress 20% (0MB)
84 00:48:21.174499 progress 27% (0MB)
85 00:48:21.176593 progress 33% (0MB)
86 00:48:21.178463 progress 40% (0MB)
87 00:48:21.180677 progress 47% (0MB)
88 00:48:21.182654 progress 54% (0MB)
89 00:48:21.184784 progress 60% (0MB)
90 00:48:21.186712 progress 67% (0MB)
91 00:48:21.188885 progress 74% (0MB)
92 00:48:21.191516 progress 81% (0MB)
93 00:48:21.193442 progress 88% (0MB)
94 00:48:21.195298 progress 94% (0MB)
95 00:48:21.197727 progress 100% (0MB)
96 00:48:21.204105 0MB downloaded in 0.04s (12.95MB/s)
97 00:48:21.204535 end: 1.3.1 http-download (duration 00:00:00) [common]
99 00:48:21.204958 end: 1.3 download-retry (duration 00:00:00) [common]
100 00:48:21.205102 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 00:48:21.205243 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 00:48:21.205369 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 00:48:21.205502 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 00:48:21.205796 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz
105 00:48:21.205989 makedir: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin
106 00:48:21.206146 makedir: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/tests
107 00:48:21.206297 makedir: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/results
108 00:48:21.206457 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-add-keys
109 00:48:21.206669 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-add-sources
110 00:48:21.206856 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-background-process-start
111 00:48:21.207041 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-background-process-stop
112 00:48:21.207223 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-common-functions
113 00:48:21.207406 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-echo-ipv4
114 00:48:21.207599 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-install-packages
115 00:48:21.207780 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-installed-packages
116 00:48:21.207962 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-os-build
117 00:48:21.208152 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-probe-channel
118 00:48:21.208340 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-probe-ip
119 00:48:21.208524 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-target-ip
120 00:48:21.208709 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-target-mac
121 00:48:21.208894 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-target-storage
122 00:48:21.209079 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-case
123 00:48:21.209274 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-event
124 00:48:21.209462 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-feedback
125 00:48:21.209645 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-raise
126 00:48:21.209838 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-reference
127 00:48:21.210023 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-runner
128 00:48:21.210204 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-set
129 00:48:21.210385 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-test-shell
130 00:48:21.210577 Updating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-install-packages (oe)
131 00:48:21.210804 Updating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/bin/lava-installed-packages (oe)
132 00:48:21.210992 Creating /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/environment
133 00:48:21.211146 LAVA metadata
134 00:48:21.211265 - LAVA_JOB_ID=10419525
135 00:48:21.211373 - LAVA_DISPATCHER_IP=192.168.201.1
136 00:48:21.211548 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 00:48:21.211663 skipped lava-vland-overlay
138 00:48:21.211789 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 00:48:21.211918 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 00:48:21.212020 skipped lava-multinode-overlay
141 00:48:21.212137 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 00:48:21.212268 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 00:48:21.212391 Loading test definitions
144 00:48:21.212544 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 00:48:21.212669 Using /lava-10419525 at stage 0
146 00:48:21.213142 uuid=10419525_1.4.2.3.1 testdef=None
147 00:48:21.213275 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 00:48:21.213411 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 00:48:21.214192 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 00:48:21.214560 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 00:48:21.215536 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 00:48:21.215915 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 00:48:21.216848 runner path: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/0/tests/0_dmesg test_uuid 10419525_1.4.2.3.1
156 00:48:21.217064 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 00:48:21.217424 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 00:48:21.217538 Using /lava-10419525 at stage 1
160 00:48:21.217983 uuid=10419525_1.4.2.3.5 testdef=None
161 00:48:21.218113 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 00:48:21.218240 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 00:48:21.218951 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 00:48:21.219305 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 00:48:21.220291 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 00:48:21.220654 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 00:48:21.221588 runner path: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/1/tests/1_bootrr test_uuid 10419525_1.4.2.3.5
170 00:48:21.221794 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 00:48:21.222131 Creating lava-test-runner.conf files
173 00:48:21.222233 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/0 for stage 0
174 00:48:21.222366 - 0_dmesg
175 00:48:21.222483 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419525/lava-overlay-oy6thbhz/lava-10419525/1 for stage 1
176 00:48:21.222616 - 1_bootrr
177 00:48:21.222754 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 00:48:21.222881 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 00:48:21.235150 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 00:48:21.235355 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 00:48:21.235490 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 00:48:21.235675 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 00:48:21.235810 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 00:48:21.483922 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 00:48:21.484386 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 00:48:21.484557 extracting modules file /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419525/extract-overlay-ramdisk-reklnupr/ramdisk
187 00:48:21.514809 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 00:48:21.515030 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 00:48:21.515177 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419525/compress-overlay-lnr8ypg5/overlay-1.4.2.4.tar.gz to ramdisk
190 00:48:21.515287 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419525/compress-overlay-lnr8ypg5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419525/extract-overlay-ramdisk-reklnupr/ramdisk
191 00:48:21.528835 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 00:48:21.529058 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 00:48:21.529174 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 00:48:21.529271 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 00:48:21.529358 Building ramdisk /var/lib/lava/dispatcher/tmp/10419525/extract-overlay-ramdisk-reklnupr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419525/extract-overlay-ramdisk-reklnupr/ramdisk
196 00:48:21.667691 >> 53978 blocks
197 00:48:22.656785 rename /var/lib/lava/dispatcher/tmp/10419525/extract-overlay-ramdisk-reklnupr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
198 00:48:22.657380 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 00:48:22.657574 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 00:48:22.657769 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 00:48:22.657938 No mkimage arch provided, not using FIT.
202 00:48:22.658116 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 00:48:22.658253 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 00:48:22.658419 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 00:48:22.658568 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 00:48:22.658701 No LXC device requested
207 00:48:22.658838 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 00:48:22.658980 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 00:48:22.659115 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 00:48:22.659233 Checking files for TFTP limit of 4294967296 bytes.
211 00:48:22.659825 end: 1 tftp-deploy (duration 00:00:02) [common]
212 00:48:22.659987 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 00:48:22.660158 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 00:48:22.660371 substitutions:
215 00:48:22.660484 - {DTB}: None
216 00:48:22.660617 - {INITRD}: 10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
217 00:48:22.660744 - {KERNEL}: 10419525/tftp-deploy-bvw96e7l/kernel/bzImage
218 00:48:22.660856 - {LAVA_MAC}: None
219 00:48:22.660998 - {PRESEED_CONFIG}: None
220 00:48:22.661094 - {PRESEED_LOCAL}: None
221 00:48:22.661192 - {RAMDISK}: 10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
222 00:48:22.661292 - {ROOT_PART}: None
223 00:48:22.661396 - {ROOT}: None
224 00:48:22.661500 - {SERVER_IP}: 192.168.201.1
225 00:48:22.661625 - {TEE}: None
226 00:48:22.661753 Parsed boot commands:
227 00:48:22.661874 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 00:48:22.662147 Parsed boot commands: tftpboot 192.168.201.1 10419525/tftp-deploy-bvw96e7l/kernel/bzImage 10419525/tftp-deploy-bvw96e7l/kernel/cmdline 10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
229 00:48:22.662282 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 00:48:22.662416 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 00:48:22.662559 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 00:48:22.662701 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 00:48:22.662817 Not connected, no need to disconnect.
234 00:48:22.662940 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 00:48:22.663101 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 00:48:22.663235 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
237 00:48:22.667551 Setting prompt string to ['lava-test: # ']
238 00:48:22.668041 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 00:48:22.668213 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 00:48:22.668405 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 00:48:22.668581 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 00:48:22.668939 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
243 00:48:27.807395 >> Command sent successfully.
244 00:48:27.809998 Returned 0 in 5 seconds
245 00:48:27.910396 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 00:48:27.910728 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 00:48:27.910829 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 00:48:27.910922 Setting prompt string to 'Starting depthcharge on Magolor...'
250 00:48:27.910991 Changing prompt to 'Starting depthcharge on Magolor...'
251 00:48:27.911058 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 00:48:27.911320 [Enter `^Ec?' for help]
253 00:48:29.052042
254 00:48:29.052201
255 00:48:29.062299 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 00:48:29.064925 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 00:48:29.068548 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 00:48:29.074998 CPU: AES supported, TXT NOT supported, VT supported
259 00:48:29.078647 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 00:48:29.085124 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 00:48:29.088502 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 00:48:29.092136 VBOOT: Loading verstage.
263 00:48:29.099437 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 00:48:29.102487 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 00:48:29.109353 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 00:48:29.112406 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 00:48:29.115489
268 00:48:29.115636
269 00:48:29.125909 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 00:48:29.140023 Probing TPM: . done!
271 00:48:29.143857 TPM ready after 0 ms
272 00:48:29.147261 Connected to device vid:did:rid of 1ae0:0028:00
273 00:48:29.157780 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 00:48:29.164456 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 00:48:29.167399 Initialized TPM device CR50 revision 0
276 00:48:29.233242 tlcl_send_startup: Startup return code is 0
277 00:48:29.233409 TPM: setup succeeded
278 00:48:29.243252 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 00:48:29.259503 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 00:48:29.270687 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 00:48:29.280140 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 00:48:29.283626 Chrome EC: UHEPI supported
283 00:48:29.286848 Phase 1
284 00:48:29.290100 FMAP: area GBB found @ c05000 (12288 bytes)
285 00:48:29.296732 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 00:48:29.303507 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 00:48:29.306924 Recovery requested (1009000e)
288 00:48:29.313343 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 00:48:29.322824 tlcl_extend: response is 0
290 00:48:29.329725 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 00:48:29.338772 tlcl_extend: response is 0
292 00:48:29.345153 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 00:48:29.348703 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 00:48:29.355508 BS: verstage times (exec / console): total (unknown) / 124 ms
295 00:48:29.358573
296 00:48:29.358675
297 00:48:29.368556 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 00:48:29.375011 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 00:48:29.378142 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 00:48:29.382144 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 00:48:29.388380 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 00:48:29.391477 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 00:48:29.395001 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
304 00:48:29.398340 TCO_STS: 0000 0001
305 00:48:29.401562 GEN_PMCON: d0015038 00002200
306 00:48:29.404590 GBLRST_CAUSE: 00000000 00000000
307 00:48:29.404673 prev_sleep_state 5
308 00:48:29.408528 Boot Count incremented to 15838
309 00:48:29.415696 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 00:48:29.418819 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 00:48:29.422941 Chrome EC: UHEPI supported
312 00:48:29.430093 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 00:48:29.435981 Probing TPM: done!
314 00:48:29.442320 Connected to device vid:did:rid of 1ae0:0028:00
315 00:48:29.452093 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 00:48:29.456211 Initialized TPM device CR50 revision 0
317 00:48:29.470138 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 00:48:29.476751 MRC: Hash idx 0x100b comparison successful.
319 00:48:29.480192 MRC cache found, size 5458
320 00:48:29.480279 bootmode is set to: 2
321 00:48:29.483077 SPD INDEX = 0
322 00:48:29.486530 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 00:48:29.489899 SPD: module type is LPDDR4X
324 00:48:29.496520 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 00:48:29.502861 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 00:48:29.506472 SPD: device width 16 bits, bus width 32 bits
327 00:48:29.509496 SPD: module size is 4096 MB (per channel)
328 00:48:29.513174 meminit_channels: DRAM half-populated
329 00:48:29.596646 CBMEM:
330 00:48:29.599435 IMD: root @ 0x76fff000 254 entries.
331 00:48:29.603383 IMD: root @ 0x76ffec00 62 entries.
332 00:48:29.606199 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 00:48:29.612977 WARNING: RO_VPD is uninitialized or empty.
334 00:48:29.615952 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 00:48:29.619940 External stage cache:
336 00:48:29.622949 IMD: root @ 0x7b3ff000 254 entries.
337 00:48:29.626759 IMD: root @ 0x7b3fec00 62 entries.
338 00:48:29.636273 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 00:48:29.643228 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 00:48:29.649847 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 00:48:29.658065 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 00:48:29.664209 cse_lite: Skip switching to RW in the recovery path
343 00:48:29.664295 1 DIMMs found
344 00:48:29.664367 SMM Memory Map
345 00:48:29.668043 SMRAM : 0x7b000000 0x800000
346 00:48:29.674588 Subregion 0: 0x7b000000 0x200000
347 00:48:29.677862 Subregion 1: 0x7b200000 0x200000
348 00:48:29.681173 Subregion 2: 0x7b400000 0x400000
349 00:48:29.681257 top_of_ram = 0x77000000
350 00:48:29.687564 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 00:48:29.694042 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 00:48:29.698010 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 00:48:29.704026 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 00:48:29.710732 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 00:48:29.720299 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 00:48:29.723850 Processing 188 relocs. Offset value of 0x74c0e000
357 00:48:29.733200 BS: romstage times (exec / console): total (unknown) / 255 ms
358 00:48:29.737641
359 00:48:29.737726
360 00:48:29.747701 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 00:48:29.754114 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 00:48:29.757053 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 00:48:29.764117 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 00:48:29.819873 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 00:48:29.826389 Processing 4805 relocs. Offset value of 0x75da8000
366 00:48:29.829919 BS: postcar times (exec / console): total (unknown) / 42 ms
367 00:48:29.833358
368 00:48:29.833442
369 00:48:29.842957 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 00:48:29.843075 Normal boot
371 00:48:29.847227 EC returned error result code 3
372 00:48:29.850110 FW_CONFIG value is 0x204
373 00:48:29.853872 GENERIC: 0.0 disabled by fw_config
374 00:48:29.860554 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 00:48:29.863401 I2C: 00:10 disabled by fw_config
376 00:48:29.866727 I2C: 00:10 disabled by fw_config
377 00:48:29.870218 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 00:48:29.876928 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 00:48:29.880452 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 00:48:29.887602 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 00:48:29.891705 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 00:48:29.894582 I2C: 00:10 disabled by fw_config
383 00:48:29.901352 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 00:48:29.908274 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 00:48:29.911253 I2C: 00:1a disabled by fw_config
386 00:48:29.914469 I2C: 00:1a disabled by fw_config
387 00:48:29.917828 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 00:48:29.924112 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 00:48:29.927355 GENERIC: 0.0 disabled by fw_config
390 00:48:29.931025 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 00:48:29.937483 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 00:48:29.940966 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 00:48:29.947215 microcode: Update skipped, already up-to-date
394 00:48:29.950980 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 00:48:29.978607 Detected 2 core, 2 thread CPU.
396 00:48:29.981941 Setting up SMI for CPU
397 00:48:29.985345 IED base = 0x7b400000
398 00:48:29.985435 IED size = 0x00400000
399 00:48:29.988534 Will perform SMM setup.
400 00:48:29.991849 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 00:48:30.001512 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 00:48:30.005041 Processing 16 relocs. Offset value of 0x00030000
403 00:48:30.008687 Attempting to start 1 APs
404 00:48:30.012186 Waiting for 10ms after sending INIT.
405 00:48:30.028406 Waiting for 1st SIPI to complete...done.
406 00:48:30.028527 AP: slot 1 apic_id 2.
407 00:48:30.034725 Waiting for 2nd SIPI to complete...done.
408 00:48:30.041703 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 00:48:30.047960 Processing 13 relocs. Offset value of 0x00038000
410 00:48:30.048098 Unable to locate Global NVS
411 00:48:30.058049 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 00:48:30.061739 Installing permanent SMM handler to 0x7b000000
413 00:48:30.071392 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 00:48:30.074781 Processing 704 relocs. Offset value of 0x7b010000
415 00:48:30.084778 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 00:48:30.087619 Processing 13 relocs. Offset value of 0x7b008000
417 00:48:30.094407 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 00:48:30.097667 Unable to locate Global NVS
419 00:48:30.104435 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 00:48:30.108036 Clearing SMI status registers
421 00:48:30.108133 SMI_STS: PM1
422 00:48:30.111437 PM1_STS: PWRBTN
423 00:48:30.111522 TCO_STS: INTRD_DET
424 00:48:30.120868 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 00:48:30.120982 In relocation handler: CPU 0
426 00:48:30.127921 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 00:48:30.130966 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 00:48:30.134479 Relocation complete.
429 00:48:30.140647 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 00:48:30.144177 In relocation handler: CPU 1
431 00:48:30.147487 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 00:48:30.153951 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 00:48:30.154050 Relocation complete.
434 00:48:30.157416 Initializing CPU #0
435 00:48:30.161098 CPU: vendor Intel device 906c0
436 00:48:30.164085 CPU: family 06, model 9c, stepping 00
437 00:48:30.167190 Clearing out pending MCEs
438 00:48:30.170849 Setting up local APIC...
439 00:48:30.170943 apic_id: 0x00 done.
440 00:48:30.174043 Turbo is available but hidden
441 00:48:30.177026 Turbo is available and visible
442 00:48:30.183745 microcode: Update skipped, already up-to-date
443 00:48:30.183865 CPU #0 initialized
444 00:48:30.186919 Initializing CPU #1
445 00:48:30.190365 CPU: vendor Intel device 906c0
446 00:48:30.193887 CPU: family 06, model 9c, stepping 00
447 00:48:30.197258 Clearing out pending MCEs
448 00:48:30.197436 Setting up local APIC...
449 00:48:30.200659 apic_id: 0x02 done.
450 00:48:30.204195 microcode: Update skipped, already up-to-date
451 00:48:30.206937 CPU #1 initialized
452 00:48:30.210275 bsp_do_flight_plan done after 173 msecs.
453 00:48:30.214483 CPU: frequency set to 2800 MHz
454 00:48:30.217515 Enabling SMIs.
455 00:48:30.223441 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
456 00:48:30.233122 Probing TPM: done!
457 00:48:30.239340 Connected to device vid:did:rid of 1ae0:0028:00
458 00:48:30.249052 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 00:48:30.252380 Initialized TPM device CR50 revision 0
460 00:48:30.255521 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 00:48:30.263031 Found a VBT of 7680 bytes after decompression
462 00:48:30.269208 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 00:48:30.304316 Detected 2 core, 2 thread CPU.
464 00:48:30.307546 Detected 2 core, 2 thread CPU.
465 00:48:30.670161 Display FSP Version Info HOB
466 00:48:30.673732 Reference Code - CPU = 8.7.22.30
467 00:48:30.676712 uCode Version = 24.0.0.1f
468 00:48:30.679875 TXT ACM version = ff.ff.ff.ffff
469 00:48:30.683338 Reference Code - ME = 8.7.22.30
470 00:48:30.686448 MEBx version = 0.0.0.0
471 00:48:30.690401 ME Firmware Version = Consumer SKU
472 00:48:30.693414 Reference Code - PCH = 8.7.22.30
473 00:48:30.696286 PCH-CRID Status = Disabled
474 00:48:30.700008 PCH-CRID Original Value = ff.ff.ff.ffff
475 00:48:30.703157 PCH-CRID New Value = ff.ff.ff.ffff
476 00:48:30.706493 OPROM - RST - RAID = ff.ff.ff.ffff
477 00:48:30.710007 PCH Hsio Version = 4.0.0.0
478 00:48:30.712880 Reference Code - SA - System Agent = 8.7.22.30
479 00:48:30.716673 Reference Code - MRC = 0.0.4.68
480 00:48:30.719475 SA - PCIe Version = 8.7.22.30
481 00:48:30.723001 SA-CRID Status = Disabled
482 00:48:30.726871 SA-CRID Original Value = 0.0.0.0
483 00:48:30.729222 SA-CRID New Value = 0.0.0.0
484 00:48:30.732752 OPROM - VBIOS = ff.ff.ff.ffff
485 00:48:30.735896 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 00:48:30.739385 PHY Build Version = ff.ff.ff.ffff
487 00:48:30.746124 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 00:48:30.749423 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 00:48:30.752700 ITSS IRQ Polarities Before:
490 00:48:30.755922 IPC0: 0xffffffff
491 00:48:30.756018 IPC1: 0xffffffff
492 00:48:30.759330 IPC2: 0xffffffff
493 00:48:30.759440 IPC3: 0xffffffff
494 00:48:30.762406 ITSS IRQ Polarities After:
495 00:48:30.765566 IPC0: 0xffffffff
496 00:48:30.765657 IPC1: 0xffffffff
497 00:48:30.769116 IPC2: 0xffffffff
498 00:48:30.769220 IPC3: 0xffffffff
499 00:48:30.782155 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 00:48:30.788805 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
501 00:48:30.791960 Enumerating buses...
502 00:48:30.795330 Show all devs... Before device enumeration.
503 00:48:30.798577 Root Device: enabled 1
504 00:48:30.798663 CPU_CLUSTER: 0: enabled 1
505 00:48:30.802315 DOMAIN: 0000: enabled 1
506 00:48:30.805419 PCI: 00:00.0: enabled 1
507 00:48:30.808339 PCI: 00:02.0: enabled 1
508 00:48:30.808425 PCI: 00:04.0: enabled 1
509 00:48:30.812039 PCI: 00:05.0: enabled 1
510 00:48:30.815040 PCI: 00:09.0: enabled 0
511 00:48:30.818640 PCI: 00:12.6: enabled 0
512 00:48:30.818734 PCI: 00:14.0: enabled 1
513 00:48:30.821601 PCI: 00:14.1: enabled 0
514 00:48:30.825063 PCI: 00:14.2: enabled 0
515 00:48:30.829089 PCI: 00:14.3: enabled 1
516 00:48:30.829192 PCI: 00:14.5: enabled 1
517 00:48:30.832131 PCI: 00:15.0: enabled 1
518 00:48:30.835132 PCI: 00:15.1: enabled 1
519 00:48:30.835218 PCI: 00:15.2: enabled 1
520 00:48:30.838360 PCI: 00:15.3: enabled 1
521 00:48:30.841720 PCI: 00:16.0: enabled 1
522 00:48:30.845150 PCI: 00:16.1: enabled 0
523 00:48:30.845331 PCI: 00:16.4: enabled 0
524 00:48:30.848610 PCI: 00:16.5: enabled 0
525 00:48:30.851472 PCI: 00:17.0: enabled 0
526 00:48:30.855053 PCI: 00:19.0: enabled 1
527 00:48:30.855164 PCI: 00:19.1: enabled 0
528 00:48:30.858335 PCI: 00:19.2: enabled 1
529 00:48:30.861761 PCI: 00:1a.0: enabled 1
530 00:48:30.864782 PCI: 00:1c.0: enabled 0
531 00:48:30.864889 PCI: 00:1c.1: enabled 0
532 00:48:30.867969 PCI: 00:1c.2: enabled 0
533 00:48:30.871109 PCI: 00:1c.3: enabled 0
534 00:48:30.874891 PCI: 00:1c.4: enabled 0
535 00:48:30.874984 PCI: 00:1c.5: enabled 0
536 00:48:30.878016 PCI: 00:1c.6: enabled 0
537 00:48:30.881346 PCI: 00:1c.7: enabled 1
538 00:48:30.881460 PCI: 00:1e.0: enabled 0
539 00:48:30.884612 PCI: 00:1e.1: enabled 0
540 00:48:30.887819 PCI: 00:1e.2: enabled 1
541 00:48:30.891251 PCI: 00:1e.3: enabled 0
542 00:48:30.891356 PCI: 00:1f.0: enabled 1
543 00:48:30.894523 PCI: 00:1f.1: enabled 1
544 00:48:30.897812 PCI: 00:1f.2: enabled 1
545 00:48:30.901101 PCI: 00:1f.3: enabled 1
546 00:48:30.901191 PCI: 00:1f.4: enabled 0
547 00:48:30.904163 PCI: 00:1f.5: enabled 1
548 00:48:30.907507 PCI: 00:1f.7: enabled 0
549 00:48:30.911470 GENERIC: 0.0: enabled 1
550 00:48:30.911611 GENERIC: 0.0: enabled 1
551 00:48:30.914245 USB0 port 0: enabled 1
552 00:48:30.917505 GENERIC: 0.0: enabled 1
553 00:48:30.917604 I2C: 00:2c: enabled 1
554 00:48:30.920622 I2C: 00:15: enabled 1
555 00:48:30.924443 GENERIC: 0.0: enabled 0
556 00:48:30.924601 I2C: 00:15: enabled 1
557 00:48:30.927229 I2C: 00:10: enabled 0
558 00:48:30.930763 I2C: 00:10: enabled 0
559 00:48:30.934118 I2C: 00:2c: enabled 1
560 00:48:30.934215 I2C: 00:40: enabled 1
561 00:48:30.937270 I2C: 00:10: enabled 1
562 00:48:30.940408 I2C: 00:39: enabled 1
563 00:48:30.940542 I2C: 00:36: enabled 1
564 00:48:30.944225 I2C: 00:10: enabled 0
565 00:48:30.947390 I2C: 00:0c: enabled 1
566 00:48:30.947524 I2C: 00:50: enabled 1
567 00:48:30.950670 I2C: 00:1a: enabled 1
568 00:48:30.953749 I2C: 00:1a: enabled 0
569 00:48:30.953851 I2C: 00:1a: enabled 0
570 00:48:30.957220 I2C: 00:28: enabled 1
571 00:48:30.960626 I2C: 00:29: enabled 1
572 00:48:30.960777 PCI: 00:00.0: enabled 1
573 00:48:30.963964 SPI: 00: enabled 1
574 00:48:30.967188 PNP: 0c09.0: enabled 1
575 00:48:30.967309 GENERIC: 0.0: enabled 0
576 00:48:30.970645 USB2 port 0: enabled 1
577 00:48:30.973953 USB2 port 1: enabled 1
578 00:48:30.976959 USB2 port 2: enabled 1
579 00:48:30.977059 USB2 port 3: enabled 1
580 00:48:30.980218 USB2 port 4: enabled 0
581 00:48:30.983872 USB2 port 5: enabled 1
582 00:48:30.983995 USB2 port 6: enabled 0
583 00:48:30.987413 USB2 port 7: enabled 1
584 00:48:30.990245 USB3 port 0: enabled 1
585 00:48:30.990361 USB3 port 1: enabled 1
586 00:48:30.993657 USB3 port 2: enabled 1
587 00:48:30.996778 USB3 port 3: enabled 1
588 00:48:30.996871 APIC: 00: enabled 1
589 00:48:31.000373 APIC: 02: enabled 1
590 00:48:31.003494 Compare with tree...
591 00:48:31.003659 Root Device: enabled 1
592 00:48:31.006895 CPU_CLUSTER: 0: enabled 1
593 00:48:31.009939 APIC: 00: enabled 1
594 00:48:31.013117 APIC: 02: enabled 1
595 00:48:31.013211 DOMAIN: 0000: enabled 1
596 00:48:31.016979 PCI: 00:00.0: enabled 1
597 00:48:31.020115 PCI: 00:02.0: enabled 1
598 00:48:31.023162 PCI: 00:04.0: enabled 1
599 00:48:31.026708 GENERIC: 0.0: enabled 1
600 00:48:31.026832 PCI: 00:05.0: enabled 1
601 00:48:31.029627 GENERIC: 0.0: enabled 1
602 00:48:31.033022 PCI: 00:09.0: enabled 0
603 00:48:31.036496 PCI: 00:12.6: enabled 0
604 00:48:31.039457 PCI: 00:14.0: enabled 1
605 00:48:31.039555 USB0 port 0: enabled 1
606 00:48:31.043311 USB2 port 0: enabled 1
607 00:48:31.046548 USB2 port 1: enabled 1
608 00:48:31.049651 USB2 port 2: enabled 1
609 00:48:31.052843 USB2 port 3: enabled 1
610 00:48:31.056325 USB2 port 4: enabled 0
611 00:48:31.056443 USB2 port 5: enabled 1
612 00:48:31.059477 USB2 port 6: enabled 0
613 00:48:31.062811 USB2 port 7: enabled 1
614 00:48:31.066020 USB3 port 0: enabled 1
615 00:48:31.069621 USB3 port 1: enabled 1
616 00:48:31.069740 USB3 port 2: enabled 1
617 00:48:31.073240 USB3 port 3: enabled 1
618 00:48:31.075936 PCI: 00:14.1: enabled 0
619 00:48:31.079274 PCI: 00:14.2: enabled 0
620 00:48:31.082820 PCI: 00:14.3: enabled 1
621 00:48:31.082921 GENERIC: 0.0: enabled 1
622 00:48:31.086161 PCI: 00:14.5: enabled 1
623 00:48:31.089472 PCI: 00:15.0: enabled 1
624 00:48:31.092606 I2C: 00:2c: enabled 1
625 00:48:31.095732 I2C: 00:15: enabled 1
626 00:48:31.095838 PCI: 00:15.1: enabled 1
627 00:48:31.099226 PCI: 00:15.2: enabled 1
628 00:48:31.102601 GENERIC: 0.0: enabled 0
629 00:48:31.105495 I2C: 00:15: enabled 1
630 00:48:31.109131 I2C: 00:10: enabled 0
631 00:48:31.109290 I2C: 00:10: enabled 0
632 00:48:31.112248 I2C: 00:2c: enabled 1
633 00:48:31.115796 I2C: 00:40: enabled 1
634 00:48:31.118702 I2C: 00:10: enabled 1
635 00:48:31.118802 I2C: 00:39: enabled 1
636 00:48:31.122942 PCI: 00:15.3: enabled 1
637 00:48:31.125347 I2C: 00:36: enabled 1
638 00:48:31.129021 I2C: 00:10: enabled 0
639 00:48:31.129120 I2C: 00:0c: enabled 1
640 00:48:31.132144 I2C: 00:50: enabled 1
641 00:48:31.135390 PCI: 00:16.0: enabled 1
642 00:48:31.138677 PCI: 00:16.1: enabled 0
643 00:48:31.142468 PCI: 00:16.4: enabled 0
644 00:48:31.142584 PCI: 00:16.5: enabled 0
645 00:48:31.145822 PCI: 00:17.0: enabled 0
646 00:48:31.149931 PCI: 00:19.0: enabled 1
647 00:48:31.150123 I2C: 00:1a: enabled 1
648 00:48:31.153097 I2C: 00:1a: enabled 0
649 00:48:31.156028 I2C: 00:1a: enabled 0
650 00:48:31.159540 I2C: 00:28: enabled 1
651 00:48:31.162794 I2C: 00:29: enabled 1
652 00:48:31.162922 PCI: 00:19.1: enabled 0
653 00:48:31.165979 PCI: 00:19.2: enabled 1
654 00:48:31.169662 PCI: 00:1a.0: enabled 1
655 00:48:31.172603 PCI: 00:1e.0: enabled 0
656 00:48:31.172740 PCI: 00:1e.1: enabled 0
657 00:48:31.176247 PCI: 00:1e.2: enabled 1
658 00:48:31.179497 SPI: 00: enabled 1
659 00:48:31.182681 PCI: 00:1e.3: enabled 0
660 00:48:31.185767 PCI: 00:1f.0: enabled 1
661 00:48:31.185900 PNP: 0c09.0: enabled 1
662 00:48:31.189612 PCI: 00:1f.1: enabled 1
663 00:48:31.193099 PCI: 00:1f.2: enabled 1
664 00:48:31.196458 PCI: 00:1f.3: enabled 1
665 00:48:31.199370 GENERIC: 0.0: enabled 0
666 00:48:31.199482 PCI: 00:1f.4: enabled 0
667 00:48:31.202422 PCI: 00:1f.5: enabled 1
668 00:48:31.206077 PCI: 00:1f.7: enabled 0
669 00:48:31.209177 Root Device scanning...
670 00:48:31.212660 scan_static_bus for Root Device
671 00:48:31.212793 CPU_CLUSTER: 0 enabled
672 00:48:31.215979 DOMAIN: 0000 enabled
673 00:48:31.219128 DOMAIN: 0000 scanning...
674 00:48:31.222653 PCI: pci_scan_bus for bus 00
675 00:48:31.225597 PCI: 00:00.0 [8086/0000] ops
676 00:48:31.229251 PCI: 00:00.0 [8086/4e22] enabled
677 00:48:31.232672 PCI: 00:02.0 [8086/0000] bus ops
678 00:48:31.235527 PCI: 00:02.0 [8086/4e55] enabled
679 00:48:31.239231 PCI: 00:04.0 [8086/0000] bus ops
680 00:48:31.242068 PCI: 00:04.0 [8086/4e03] enabled
681 00:48:31.245770 PCI: 00:05.0 [8086/0000] bus ops
682 00:48:31.249065 PCI: 00:05.0 [8086/4e19] enabled
683 00:48:31.252279 PCI: 00:08.0 [8086/4e11] enabled
684 00:48:31.255233 PCI: 00:14.0 [8086/0000] bus ops
685 00:48:31.258795 PCI: 00:14.0 [8086/4ded] enabled
686 00:48:31.262168 PCI: 00:14.2 [8086/4def] disabled
687 00:48:31.265246 PCI: 00:14.3 [8086/0000] bus ops
688 00:48:31.268604 PCI: 00:14.3 [8086/4df0] enabled
689 00:48:31.271854 PCI: 00:14.5 [8086/0000] ops
690 00:48:31.275472 PCI: 00:14.5 [8086/4df8] enabled
691 00:48:31.278667 PCI: 00:15.0 [8086/0000] bus ops
692 00:48:31.281697 PCI: 00:15.0 [8086/4de8] enabled
693 00:48:31.285419 PCI: 00:15.1 [8086/0000] bus ops
694 00:48:31.288047 PCI: 00:15.1 [8086/4de9] enabled
695 00:48:31.291711 PCI: 00:15.2 [8086/0000] bus ops
696 00:48:31.295009 PCI: 00:15.2 [8086/4dea] enabled
697 00:48:31.298162 PCI: 00:15.3 [8086/0000] bus ops
698 00:48:31.301562 PCI: 00:15.3 [8086/4deb] enabled
699 00:48:31.304640 PCI: 00:16.0 [8086/0000] ops
700 00:48:31.308292 PCI: 00:16.0 [8086/4de0] enabled
701 00:48:31.312016 PCI: 00:19.0 [8086/0000] bus ops
702 00:48:31.314714 PCI: 00:19.0 [8086/4dc5] enabled
703 00:48:31.314827 PCI: 00:19.2 [8086/0000] ops
704 00:48:31.318503 PCI: 00:19.2 [8086/4dc7] enabled
705 00:48:31.321476 PCI: 00:1a.0 [8086/0000] ops
706 00:48:31.324491 PCI: 00:1a.0 [8086/4dc4] enabled
707 00:48:31.328033 PCI: 00:1e.0 [8086/0000] ops
708 00:48:31.331311 PCI: 00:1e.0 [8086/4da8] disabled
709 00:48:31.334963 PCI: 00:1e.2 [8086/0000] bus ops
710 00:48:31.337703 PCI: 00:1e.2 [8086/4daa] enabled
711 00:48:31.340980 PCI: 00:1f.0 [8086/0000] bus ops
712 00:48:31.344576 PCI: 00:1f.0 [8086/4d87] enabled
713 00:48:31.351353 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 00:48:31.351498 RTC Init
715 00:48:31.354654 Set power on after power failure.
716 00:48:31.357903 Disabling Deep S3
717 00:48:31.358064 Disabling Deep S3
718 00:48:31.361180 Disabling Deep S4
719 00:48:31.364210 Disabling Deep S4
720 00:48:31.364365 Disabling Deep S5
721 00:48:31.367473 Disabling Deep S5
722 00:48:31.371146 PCI: 00:1f.2 [0000/0000] hidden
723 00:48:31.374547 PCI: 00:1f.3 [8086/0000] bus ops
724 00:48:31.377599 PCI: 00:1f.3 [8086/4dc8] enabled
725 00:48:31.381162 PCI: 00:1f.5 [8086/0000] bus ops
726 00:48:31.384009 PCI: 00:1f.5 [8086/4da4] enabled
727 00:48:31.387880 PCI: Leftover static devices:
728 00:48:31.388096 PCI: 00:12.6
729 00:48:31.388239 PCI: 00:09.0
730 00:48:31.390845 PCI: 00:14.1
731 00:48:31.391092 PCI: 00:16.1
732 00:48:31.394266 PCI: 00:16.4
733 00:48:31.394434 PCI: 00:16.5
734 00:48:31.397516 PCI: 00:17.0
735 00:48:31.397664 PCI: 00:19.1
736 00:48:31.397802 PCI: 00:1e.1
737 00:48:31.400960 PCI: 00:1e.3
738 00:48:31.401109 PCI: 00:1f.1
739 00:48:31.404235 PCI: 00:1f.4
740 00:48:31.404382 PCI: 00:1f.7
741 00:48:31.407337 PCI: Check your devicetree.cb.
742 00:48:31.410581 PCI: 00:02.0 scanning...
743 00:48:31.413689 scan_generic_bus for PCI: 00:02.0
744 00:48:31.417169 scan_generic_bus for PCI: 00:02.0 done
745 00:48:31.420610 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 00:48:31.423745 PCI: 00:04.0 scanning...
747 00:48:31.427057 scan_generic_bus for PCI: 00:04.0
748 00:48:31.430159 GENERIC: 0.0 enabled
749 00:48:31.436998 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 00:48:31.440441 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 00:48:31.443432 PCI: 00:05.0 scanning...
752 00:48:31.446637 scan_generic_bus for PCI: 00:05.0
753 00:48:31.450245 GENERIC: 0.0 enabled
754 00:48:31.453643 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 00:48:31.460386 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 00:48:31.463609 PCI: 00:14.0 scanning...
757 00:48:31.466496 scan_static_bus for PCI: 00:14.0
758 00:48:31.466608 USB0 port 0 enabled
759 00:48:31.470025 USB0 port 0 scanning...
760 00:48:31.473067 scan_static_bus for USB0 port 0
761 00:48:31.476630 USB2 port 0 enabled
762 00:48:31.476747 USB2 port 1 enabled
763 00:48:31.479934 USB2 port 2 enabled
764 00:48:31.483030 USB2 port 3 enabled
765 00:48:31.483140 USB2 port 4 disabled
766 00:48:31.486754 USB2 port 5 enabled
767 00:48:31.489846 USB2 port 6 disabled
768 00:48:31.489957 USB2 port 7 enabled
769 00:48:31.493463 USB3 port 0 enabled
770 00:48:31.493575 USB3 port 1 enabled
771 00:48:31.496196 USB3 port 2 enabled
772 00:48:31.499595 USB3 port 3 enabled
773 00:48:31.499699 USB2 port 0 scanning...
774 00:48:31.503111 scan_static_bus for USB2 port 0
775 00:48:31.506553 scan_static_bus for USB2 port 0 done
776 00:48:31.512928 scan_bus: bus USB2 port 0 finished in 6 msecs
777 00:48:31.515921 USB2 port 1 scanning...
778 00:48:31.519426 scan_static_bus for USB2 port 1
779 00:48:31.523020 scan_static_bus for USB2 port 1 done
780 00:48:31.526510 scan_bus: bus USB2 port 1 finished in 6 msecs
781 00:48:31.529406 USB2 port 2 scanning...
782 00:48:31.532685 scan_static_bus for USB2 port 2
783 00:48:31.536349 scan_static_bus for USB2 port 2 done
784 00:48:31.539390 scan_bus: bus USB2 port 2 finished in 6 msecs
785 00:48:31.542666 USB2 port 3 scanning...
786 00:48:31.545748 scan_static_bus for USB2 port 3
787 00:48:31.549050 scan_static_bus for USB2 port 3 done
788 00:48:31.555971 scan_bus: bus USB2 port 3 finished in 6 msecs
789 00:48:31.556105 USB2 port 5 scanning...
790 00:48:31.558949 scan_static_bus for USB2 port 5
791 00:48:31.565848 scan_static_bus for USB2 port 5 done
792 00:48:31.568856 scan_bus: bus USB2 port 5 finished in 6 msecs
793 00:48:31.572454 USB2 port 7 scanning...
794 00:48:31.575401 scan_static_bus for USB2 port 7
795 00:48:31.578861 scan_static_bus for USB2 port 7 done
796 00:48:31.581947 scan_bus: bus USB2 port 7 finished in 6 msecs
797 00:48:31.585313 USB3 port 0 scanning...
798 00:48:31.588770 scan_static_bus for USB3 port 0
799 00:48:31.592456 scan_static_bus for USB3 port 0 done
800 00:48:31.595486 scan_bus: bus USB3 port 0 finished in 6 msecs
801 00:48:31.598744 USB3 port 1 scanning...
802 00:48:31.601850 scan_static_bus for USB3 port 1
803 00:48:31.605045 scan_static_bus for USB3 port 1 done
804 00:48:31.611564 scan_bus: bus USB3 port 1 finished in 6 msecs
805 00:48:31.611669 USB3 port 2 scanning...
806 00:48:31.615224 scan_static_bus for USB3 port 2
807 00:48:31.622060 scan_static_bus for USB3 port 2 done
808 00:48:31.625334 scan_bus: bus USB3 port 2 finished in 6 msecs
809 00:48:31.628665 USB3 port 3 scanning...
810 00:48:31.631987 scan_static_bus for USB3 port 3
811 00:48:31.634838 scan_static_bus for USB3 port 3 done
812 00:48:31.638722 scan_bus: bus USB3 port 3 finished in 6 msecs
813 00:48:31.641504 scan_static_bus for USB0 port 0 done
814 00:48:31.648444 scan_bus: bus USB0 port 0 finished in 172 msecs
815 00:48:31.651516 scan_static_bus for PCI: 00:14.0 done
816 00:48:31.654750 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
817 00:48:31.657980 PCI: 00:14.3 scanning...
818 00:48:31.661169 scan_static_bus for PCI: 00:14.3
819 00:48:31.664772 GENERIC: 0.0 enabled
820 00:48:31.667909 scan_static_bus for PCI: 00:14.3 done
821 00:48:31.671049 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 00:48:31.674476 PCI: 00:15.0 scanning...
823 00:48:31.677983 scan_static_bus for PCI: 00:15.0
824 00:48:31.681257 I2C: 00:2c enabled
825 00:48:31.681342 I2C: 00:15 enabled
826 00:48:31.687528 scan_static_bus for PCI: 00:15.0 done
827 00:48:31.691491 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
828 00:48:31.694734 PCI: 00:15.1 scanning...
829 00:48:31.697652 scan_static_bus for PCI: 00:15.1
830 00:48:31.700808 scan_static_bus for PCI: 00:15.1 done
831 00:48:31.704284 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 00:48:31.707691 PCI: 00:15.2 scanning...
833 00:48:31.710689 scan_static_bus for PCI: 00:15.2
834 00:48:31.713926 GENERIC: 0.0 disabled
835 00:48:31.714009 I2C: 00:15 enabled
836 00:48:31.717798 I2C: 00:10 disabled
837 00:48:31.721199 I2C: 00:10 disabled
838 00:48:31.721283 I2C: 00:2c enabled
839 00:48:31.725118 I2C: 00:40 enabled
840 00:48:31.725212 I2C: 00:10 enabled
841 00:48:31.728700 I2C: 00:39 enabled
842 00:48:31.732005 scan_static_bus for PCI: 00:15.2 done
843 00:48:31.735021 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 00:48:31.738819 PCI: 00:15.3 scanning...
845 00:48:31.742569 scan_static_bus for PCI: 00:15.3
846 00:48:31.742652 I2C: 00:36 enabled
847 00:48:31.745683 I2C: 00:10 disabled
848 00:48:31.749208 I2C: 00:0c enabled
849 00:48:31.749293 I2C: 00:50 enabled
850 00:48:31.752472 scan_static_bus for PCI: 00:15.3 done
851 00:48:31.759347 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
852 00:48:31.762587 PCI: 00:19.0 scanning...
853 00:48:31.765781 scan_static_bus for PCI: 00:19.0
854 00:48:31.765891 I2C: 00:1a enabled
855 00:48:31.768912 I2C: 00:1a disabled
856 00:48:31.772371 I2C: 00:1a disabled
857 00:48:31.772468 I2C: 00:28 enabled
858 00:48:31.775582 I2C: 00:29 enabled
859 00:48:31.779049 scan_static_bus for PCI: 00:19.0 done
860 00:48:31.782098 scan_bus: bus PCI: 00:19.0 finished in 16 msecs
861 00:48:31.785906 PCI: 00:1e.2 scanning...
862 00:48:31.789032 scan_generic_bus for PCI: 00:1e.2
863 00:48:31.792396 SPI: 00 enabled
864 00:48:31.795458 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 00:48:31.802192 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 00:48:31.805391 PCI: 00:1f.0 scanning...
867 00:48:31.808420 scan_static_bus for PCI: 00:1f.0
868 00:48:31.808535 PNP: 0c09.0 enabled
869 00:48:31.812174 PNP: 0c09.0 scanning...
870 00:48:31.815181 scan_static_bus for PNP: 0c09.0
871 00:48:31.818464 scan_static_bus for PNP: 0c09.0 done
872 00:48:31.825185 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 00:48:31.828640 scan_static_bus for PCI: 00:1f.0 done
874 00:48:31.831743 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 00:48:31.834656 PCI: 00:1f.3 scanning...
876 00:48:31.838383 scan_static_bus for PCI: 00:1f.3
877 00:48:31.841561 GENERIC: 0.0 disabled
878 00:48:31.844942 scan_static_bus for PCI: 00:1f.3 done
879 00:48:31.848247 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 00:48:31.851349 PCI: 00:1f.5 scanning...
881 00:48:31.854872 scan_generic_bus for PCI: 00:1f.5
882 00:48:31.858089 scan_generic_bus for PCI: 00:1f.5 done
883 00:48:31.864711 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 00:48:31.868240 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
885 00:48:31.871401 scan_static_bus for Root Device done
886 00:48:31.877829 scan_bus: bus Root Device finished in 664 msecs
887 00:48:31.877917 done
888 00:48:31.884623 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1083 ms
889 00:48:31.888149 Chrome EC: UHEPI supported
890 00:48:31.894455 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 00:48:31.901069 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 00:48:31.904544 SPI flash protection: WPSW=0 SRP0=1
893 00:48:31.907954 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 00:48:31.914296 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 00:48:31.917679 found VGA at PCI: 00:02.0
896 00:48:31.920687 Setting up VGA for PCI: 00:02.0
897 00:48:31.924331 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 00:48:31.930727 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 00:48:31.930875 Allocating resources...
900 00:48:31.934148 Reading resources...
901 00:48:31.937251 Root Device read_resources bus 0 link: 0
902 00:48:31.943614 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 00:48:31.947317 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 00:48:31.950564 DOMAIN: 0000 read_resources bus 0 link: 0
905 00:48:31.958276 PCI: 00:04.0 read_resources bus 1 link: 0
906 00:48:31.961506 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 00:48:31.968067 PCI: 00:05.0 read_resources bus 2 link: 0
908 00:48:31.971410 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 00:48:31.978053 PCI: 00:14.0 read_resources bus 0 link: 0
910 00:48:31.981573 USB0 port 0 read_resources bus 0 link: 0
911 00:48:31.987490 USB0 port 0 read_resources bus 0 link: 0 done
912 00:48:31.991265 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 00:48:31.997665 PCI: 00:14.3 read_resources bus 0 link: 0
914 00:48:32.001144 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 00:48:32.056902 PCI: 00:15.0 read_resources bus 0 link: 0
916 00:48:32.057239 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 00:48:32.057317 PCI: 00:15.2 read_resources bus 0 link: 0
918 00:48:32.057396 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 00:48:32.057767 PCI: 00:15.3 read_resources bus 0 link: 0
920 00:48:32.058028 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 00:48:32.058097 PCI: 00:19.0 read_resources bus 0 link: 0
922 00:48:32.058497 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 00:48:32.058882 PCI: 00:1e.2 read_resources bus 3 link: 0
924 00:48:32.058965 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 00:48:32.059683 PCI: 00:1f.0 read_resources bus 0 link: 0
926 00:48:32.101818 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 00:48:32.102592 PCI: 00:1f.3 read_resources bus 0 link: 0
928 00:48:32.102689 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 00:48:32.102966 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 00:48:32.103074 Root Device read_resources bus 0 link: 0 done
931 00:48:32.103151 Done reading resources.
932 00:48:32.103219 Show resources in subtree (Root Device)...After reading.
933 00:48:32.103474 Root Device child on link 0 CPU_CLUSTER: 0
934 00:48:32.103553 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 00:48:32.103651 APIC: 00
936 00:48:32.103711 APIC: 02
937 00:48:32.106913 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 00:48:32.113339 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 00:48:32.123149 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 00:48:32.123276 PCI: 00:00.0
941 00:48:32.132894 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 00:48:32.143089 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 00:48:32.152930 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 00:48:32.162540 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 00:48:32.172651 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 00:48:32.179477 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 00:48:32.189198 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 00:48:32.198916 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 00:48:32.209315 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 00:48:32.218526 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 00:48:32.228659 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 00:48:32.235087 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 00:48:32.245386 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 00:48:32.254972 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 00:48:32.265117 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 00:48:32.274820 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 00:48:32.284897 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 00:48:32.291303 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 00:48:32.301176 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 00:48:32.304269 PCI: 00:02.0
961 00:48:32.314188 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 00:48:32.324334 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 00:48:32.330875 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 00:48:32.337377 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 00:48:32.347372 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 00:48:32.347554 GENERIC: 0.0
967 00:48:32.354029 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 00:48:32.364265 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 00:48:32.364441 GENERIC: 0.0
970 00:48:32.367483 PCI: 00:08.0
971 00:48:32.377059 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 00:48:32.380479 PCI: 00:14.0 child on link 0 USB0 port 0
973 00:48:32.390278 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 00:48:32.393721 USB0 port 0 child on link 0 USB2 port 0
975 00:48:32.397323 USB2 port 0
976 00:48:32.400713 USB2 port 1
977 00:48:32.400829 USB2 port 2
978 00:48:32.400928 USB2 port 3
979 00:48:32.404673 USB2 port 4
980 00:48:32.404783 USB2 port 5
981 00:48:32.408231 USB2 port 6
982 00:48:32.408349 USB2 port 7
983 00:48:32.411212 USB3 port 0
984 00:48:32.411325 USB3 port 1
985 00:48:32.414496 USB3 port 2
986 00:48:32.414606 USB3 port 3
987 00:48:32.418140 PCI: 00:14.2
988 00:48:32.421166 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 00:48:32.431316 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 00:48:32.434775 GENERIC: 0.0
991 00:48:32.434875 PCI: 00:14.5
992 00:48:32.444746 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 00:48:32.450928 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 00:48:32.460905 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 00:48:32.461004 I2C: 00:2c
996 00:48:32.464455 I2C: 00:15
997 00:48:32.464542 PCI: 00:15.1
998 00:48:32.474416 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 00:48:32.477419 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 00:48:32.487897 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 00:48:32.490475 GENERIC: 0.0
1002 00:48:32.490592 I2C: 00:15
1003 00:48:32.494045 I2C: 00:10
1004 00:48:32.494123 I2C: 00:10
1005 00:48:32.497962 I2C: 00:2c
1006 00:48:32.498040 I2C: 00:40
1007 00:48:32.500655 I2C: 00:10
1008 00:48:32.500741 I2C: 00:39
1009 00:48:32.507878 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 00:48:32.517101 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 00:48:32.517189 I2C: 00:36
1012 00:48:32.520322 I2C: 00:10
1013 00:48:32.520442 I2C: 00:0c
1014 00:48:32.520538 I2C: 00:50
1015 00:48:32.523732 PCI: 00:16.0
1016 00:48:32.533605 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 00:48:32.537037 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 00:48:32.546712 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 00:48:32.550720 I2C: 00:1a
1020 00:48:32.550802 I2C: 00:1a
1021 00:48:32.553527 I2C: 00:1a
1022 00:48:32.553610 I2C: 00:28
1023 00:48:32.556837 I2C: 00:29
1024 00:48:32.556948 PCI: 00:19.2
1025 00:48:32.566424 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 00:48:32.576914 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 00:48:32.579945 PCI: 00:1a.0
1028 00:48:32.589877 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 00:48:32.589962 PCI: 00:1e.0
1030 00:48:32.596760 PCI: 00:1e.2 child on link 0 SPI: 00
1031 00:48:32.606460 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 00:48:32.606565 SPI: 00
1033 00:48:32.609424 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 00:48:32.619475 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 00:48:32.622655 PNP: 0c09.0
1036 00:48:32.630063 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 00:48:32.632957 PCI: 00:1f.2
1038 00:48:32.642574 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 00:48:32.649179 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 00:48:32.655717 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 00:48:32.666158 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 00:48:32.675395 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 00:48:32.675523 GENERIC: 0.0
1044 00:48:32.678961 PCI: 00:1f.5
1045 00:48:32.685974 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 00:48:32.695413 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 00:48:32.702213 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 00:48:32.708870 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 00:48:32.715339 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 00:48:32.721926 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 00:48:32.732079 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 00:48:32.735259 DOMAIN: 0000: Resource ranges:
1053 00:48:32.738561 * Base: 1000, Size: 800, Tag: 100
1054 00:48:32.741985 * Base: 1900, Size: e700, Tag: 100
1055 00:48:32.745022 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 00:48:32.751599 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 00:48:32.758368 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 00:48:32.768035 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 00:48:32.774754 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 00:48:32.781216 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 00:48:32.791307 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 00:48:32.798079 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 00:48:32.804726 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 00:48:32.814471 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 00:48:32.821432 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 00:48:32.827976 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 00:48:32.837552 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 00:48:32.843951 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 00:48:32.851163 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 00:48:32.860704 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 00:48:32.867169 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 00:48:32.873683 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 00:48:32.883669 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 00:48:32.889933 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 00:48:32.896959 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 00:48:32.906548 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 00:48:32.913398 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 00:48:32.920100 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 00:48:32.923332 DOMAIN: 0000: Resource ranges:
1080 00:48:32.930101 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 00:48:32.933491 * Base: d0000000, Size: 2b000000, Tag: 200
1082 00:48:32.936694 * Base: fb001000, Size: 2fff000, Tag: 200
1083 00:48:32.939393 * Base: fe010000, Size: 22000, Tag: 200
1084 00:48:32.946189 * Base: fe033000, Size: a4d000, Tag: 200
1085 00:48:32.949401 * Base: fea88000, Size: 2f8000, Tag: 200
1086 00:48:32.952790 * Base: fed88000, Size: 8000, Tag: 200
1087 00:48:32.955972 * Base: fed93000, Size: d000, Tag: 200
1088 00:48:32.962799 * Base: feda2000, Size: 125e000, Tag: 200
1089 00:48:32.966121 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 00:48:32.972576 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 00:48:32.979707 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 00:48:32.986566 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 00:48:32.993144 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 00:48:32.999372 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 00:48:33.006025 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 00:48:33.012838 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 00:48:33.019454 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 00:48:33.025859 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 00:48:33.032714 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 00:48:33.039041 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 00:48:33.045965 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 00:48:33.052417 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 00:48:33.059017 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 00:48:33.065788 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 00:48:33.071973 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 00:48:33.079229 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 00:48:33.085386 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 00:48:33.091944 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 00:48:33.098408 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 00:48:33.105117 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 00:48:33.115165 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 00:48:33.118371 Root Device assign_resources, bus 0 link: 0
1113 00:48:33.121985 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 00:48:33.131334 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 00:48:33.138099 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 00:48:33.147979 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 00:48:33.154493 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 00:48:33.157870 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 00:48:33.164508 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 00:48:33.171369 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 00:48:33.178118 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 00:48:33.181428 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 00:48:33.191496 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 00:48:33.197565 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 00:48:33.201287 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 00:48:33.207752 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 00:48:33.214179 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 00:48:33.221071 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 00:48:33.223922 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 00:48:33.230797 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 00:48:33.240760 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 00:48:33.244000 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 00:48:33.250593 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 00:48:33.257279 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 00:48:33.266789 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 00:48:33.270583 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 00:48:33.273558 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 00:48:33.283502 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 00:48:33.287549 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 00:48:33.293526 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 00:48:33.300306 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 00:48:33.309823 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 00:48:33.313330 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 00:48:33.316787 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 00:48:33.326129 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 00:48:33.332932 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 00:48:33.343113 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 00:48:33.346031 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 00:48:33.349473 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 00:48:33.356158 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 00:48:33.359376 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 00:48:33.365918 LPC: Trying to open IO window from 800 size 1ff
1153 00:48:33.372701 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 00:48:33.382294 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 00:48:33.385884 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 00:48:33.389322 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 00:48:33.399487 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 00:48:33.402508 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 00:48:33.408894 Root Device assign_resources, bus 0 link: 0
1160 00:48:33.408979 Done setting resources.
1161 00:48:33.415879 Show resources in subtree (Root Device)...After assigning values.
1162 00:48:33.421951 Root Device child on link 0 CPU_CLUSTER: 0
1163 00:48:33.425593 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 00:48:33.425704 APIC: 00
1165 00:48:33.428939 APIC: 02
1166 00:48:33.432041 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 00:48:33.441910 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 00:48:33.451898 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 00:48:33.452028 PCI: 00:00.0
1170 00:48:33.461976 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 00:48:33.471782 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 00:48:33.481632 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 00:48:33.491492 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 00:48:33.501744 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 00:48:33.507828 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 00:48:33.517945 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 00:48:33.527376 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 00:48:33.537348 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 00:48:33.547348 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 00:48:33.554131 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 00:48:33.564074 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 00:48:33.573811 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 00:48:33.583518 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 00:48:33.593548 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 00:48:33.603470 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 00:48:33.613302 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 00:48:33.619982 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 00:48:33.629630 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 00:48:33.633390 PCI: 00:02.0
1190 00:48:33.643070 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 00:48:33.652781 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 00:48:33.663001 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 00:48:33.666317 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 00:48:33.675807 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 00:48:33.679592 GENERIC: 0.0
1196 00:48:33.682387 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 00:48:33.692253 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 00:48:33.695959 GENERIC: 0.0
1199 00:48:33.696066 PCI: 00:08.0
1200 00:48:33.709006 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 00:48:33.712299 PCI: 00:14.0 child on link 0 USB0 port 0
1202 00:48:33.722322 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 00:48:33.725136 USB0 port 0 child on link 0 USB2 port 0
1204 00:48:33.728889 USB2 port 0
1205 00:48:33.728999 USB2 port 1
1206 00:48:33.732482 USB2 port 2
1207 00:48:33.735135 USB2 port 3
1208 00:48:33.735305 USB2 port 4
1209 00:48:33.738994 USB2 port 5
1210 00:48:33.739103 USB2 port 6
1211 00:48:33.741839 USB2 port 7
1212 00:48:33.741946 USB3 port 0
1213 00:48:33.745113 USB3 port 1
1214 00:48:33.745224 USB3 port 2
1215 00:48:33.748496 USB3 port 3
1216 00:48:33.748604 PCI: 00:14.2
1217 00:48:33.754928 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 00:48:33.765468 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 00:48:33.765585 GENERIC: 0.0
1220 00:48:33.768422 PCI: 00:14.5
1221 00:48:33.778513 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 00:48:33.781734 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 00:48:33.791114 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 00:48:33.794365 I2C: 00:2c
1225 00:48:33.794473 I2C: 00:15
1226 00:48:33.798016 PCI: 00:15.1
1227 00:48:33.807699 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 00:48:33.811069 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 00:48:33.820785 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 00:48:33.824115 GENERIC: 0.0
1231 00:48:33.824199 I2C: 00:15
1232 00:48:33.827550 I2C: 00:10
1233 00:48:33.827639 I2C: 00:10
1234 00:48:33.831001 I2C: 00:2c
1235 00:48:33.831083 I2C: 00:40
1236 00:48:33.834208 I2C: 00:10
1237 00:48:33.834323 I2C: 00:39
1238 00:48:33.837489 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 00:48:33.850579 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 00:48:33.850680 I2C: 00:36
1241 00:48:33.854380 I2C: 00:10
1242 00:48:33.854494 I2C: 00:0c
1243 00:48:33.854591 I2C: 00:50
1244 00:48:33.857072 PCI: 00:16.0
1245 00:48:33.867535 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 00:48:33.870594 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 00:48:33.880758 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 00:48:33.884132 I2C: 00:1a
1249 00:48:33.884226 I2C: 00:1a
1250 00:48:33.887119 I2C: 00:1a
1251 00:48:33.887206 I2C: 00:28
1252 00:48:33.890331 I2C: 00:29
1253 00:48:33.890457 PCI: 00:19.2
1254 00:48:33.903841 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 00:48:33.913635 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 00:48:33.913722 PCI: 00:1a.0
1257 00:48:33.923560 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 00:48:33.926963 PCI: 00:1e.0
1259 00:48:33.930112 PCI: 00:1e.2 child on link 0 SPI: 00
1260 00:48:33.939942 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 00:48:33.943051 SPI: 00
1262 00:48:33.946307 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 00:48:33.956185 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 00:48:33.956285 PNP: 0c09.0
1265 00:48:33.966367 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 00:48:33.966455 PCI: 00:1f.2
1267 00:48:33.976219 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 00:48:33.986518 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 00:48:33.989567 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 00:48:33.999339 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 00:48:34.009255 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 00:48:34.012667 GENERIC: 0.0
1273 00:48:34.012751 PCI: 00:1f.5
1274 00:48:34.025485 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 00:48:34.025602 Done allocating resources.
1276 00:48:34.032174 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1277 00:48:34.035545 Enabling resources...
1278 00:48:34.039437 PCI: 00:00.0 subsystem <- 8086/4e22
1279 00:48:34.042168 PCI: 00:00.0 cmd <- 06
1280 00:48:34.045572 PCI: 00:02.0 subsystem <- 8086/4e55
1281 00:48:34.049187 PCI: 00:02.0 cmd <- 03
1282 00:48:34.052220 PCI: 00:04.0 subsystem <- 8086/4e03
1283 00:48:34.055363 PCI: 00:04.0 cmd <- 02
1284 00:48:34.058780 PCI: 00:05.0 bridge ctrl <- 0003
1285 00:48:34.062062 PCI: 00:05.0 subsystem <- 8086/4e19
1286 00:48:34.065251 PCI: 00:05.0 cmd <- 02
1287 00:48:34.065334 PCI: 00:08.0 cmd <- 06
1288 00:48:34.068899 PCI: 00:14.0 subsystem <- 8086/4ded
1289 00:48:34.072164 PCI: 00:14.0 cmd <- 02
1290 00:48:34.075321 PCI: 00:14.3 subsystem <- 8086/4df0
1291 00:48:34.078492 PCI: 00:14.3 cmd <- 02
1292 00:48:34.081952 PCI: 00:14.5 subsystem <- 8086/4df8
1293 00:48:34.085510 PCI: 00:14.5 cmd <- 06
1294 00:48:34.088709 PCI: 00:15.0 subsystem <- 8086/4de8
1295 00:48:34.091563 PCI: 00:15.0 cmd <- 02
1296 00:48:34.094925 PCI: 00:15.1 subsystem <- 8086/4de9
1297 00:48:34.098202 PCI: 00:15.1 cmd <- 02
1298 00:48:34.101538 PCI: 00:15.2 subsystem <- 8086/4dea
1299 00:48:34.101621 PCI: 00:15.2 cmd <- 02
1300 00:48:34.108200 PCI: 00:15.3 subsystem <- 8086/4deb
1301 00:48:34.108308 PCI: 00:15.3 cmd <- 02
1302 00:48:34.111514 PCI: 00:16.0 subsystem <- 8086/4de0
1303 00:48:34.114986 PCI: 00:16.0 cmd <- 02
1304 00:48:34.118253 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 00:48:34.122096 PCI: 00:19.0 cmd <- 02
1306 00:48:34.124976 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 00:48:34.128469 PCI: 00:19.2 cmd <- 06
1308 00:48:34.131553 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 00:48:34.134931 PCI: 00:1a.0 cmd <- 06
1310 00:48:34.137803 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 00:48:34.141564 PCI: 00:1e.2 cmd <- 06
1312 00:48:34.144542 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 00:48:34.144624 PCI: 00:1f.0 cmd <- 407
1314 00:48:34.151246 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 00:48:34.151354 PCI: 00:1f.3 cmd <- 02
1316 00:48:34.154795 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 00:48:34.157894 PCI: 00:1f.5 cmd <- 406
1318 00:48:34.162919 done.
1319 00:48:34.165833 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1320 00:48:34.169165 Initializing devices...
1321 00:48:34.172688 Root Device init
1322 00:48:34.172771 mainboard: EC init
1323 00:48:34.178882 Chrome EC: Set SMI mask to 0x0000000000000000
1324 00:48:34.182656 Chrome EC: clear events_b mask to 0x0000000000000000
1325 00:48:34.189319 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 00:48:34.195802 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 00:48:34.202566 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 00:48:34.206228 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 00:48:34.212543 Root Device init finished in 35 msecs
1330 00:48:34.216175 PCI: 00:00.0 init
1331 00:48:34.216259 CPU TDP = 6 Watts
1332 00:48:34.219014 CPU PL1 = 7 Watts
1333 00:48:34.222039 CPU PL2 = 12 Watts
1334 00:48:34.225857 PCI: 00:00.0 init finished in 6 msecs
1335 00:48:34.225932 PCI: 00:02.0 init
1336 00:48:34.228817 GMA: Found VBT in CBFS
1337 00:48:34.232000 GMA: Found valid VBT in CBFS
1338 00:48:34.238664 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 00:48:34.245522 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 00:48:34.248750 PCI: 00:02.0 init finished in 18 msecs
1341 00:48:34.252282 PCI: 00:08.0 init
1342 00:48:34.255510 PCI: 00:08.0 init finished in 0 msecs
1343 00:48:34.258359 PCI: 00:14.0 init
1344 00:48:34.262057 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 00:48:34.265014 PCI: 00:14.0 init finished in 4 msecs
1346 00:48:34.268520 PCI: 00:15.0 init
1347 00:48:34.271862 I2C bus 0 version 0x3230302a
1348 00:48:34.274841 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 00:48:34.278215 PCI: 00:15.0 init finished in 6 msecs
1350 00:48:34.281975 PCI: 00:15.1 init
1351 00:48:34.285103 I2C bus 1 version 0x3230302a
1352 00:48:34.288137 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 00:48:34.291499 PCI: 00:15.1 init finished in 6 msecs
1354 00:48:34.294968 PCI: 00:15.2 init
1355 00:48:34.295064 I2C bus 2 version 0x3230302a
1356 00:48:34.301193 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 00:48:34.304525 PCI: 00:15.2 init finished in 6 msecs
1358 00:48:34.304610 PCI: 00:15.3 init
1359 00:48:34.308366 I2C bus 3 version 0x3230302a
1360 00:48:34.311031 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 00:48:34.317852 PCI: 00:15.3 init finished in 6 msecs
1362 00:48:34.317937 PCI: 00:16.0 init
1363 00:48:34.321709 PCI: 00:16.0 init finished in 0 msecs
1364 00:48:34.324224 PCI: 00:19.0 init
1365 00:48:34.327705 I2C bus 4 version 0x3230302a
1366 00:48:34.331197 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 00:48:34.334289 PCI: 00:19.0 init finished in 6 msecs
1368 00:48:34.337882 PCI: 00:1a.0 init
1369 00:48:34.340909 PCI: 00:1a.0 init finished in 0 msecs
1370 00:48:34.344224 PCI: 00:1f.0 init
1371 00:48:34.347705 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 00:48:34.351137 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 00:48:34.354418 IOAPIC: ID = 0x02
1374 00:48:34.357637 IOAPIC: Dumping registers
1375 00:48:34.360530 reg 0x0000: 0x02000000
1376 00:48:34.360615 reg 0x0001: 0x00770020
1377 00:48:34.363947 reg 0x0002: 0x00000000
1378 00:48:34.367519 PCI: 00:1f.0 init finished in 21 msecs
1379 00:48:34.371059 PCI: 00:1f.2 init
1380 00:48:34.374355 Disabling ACPI via APMC.
1381 00:48:34.377558 APMC done.
1382 00:48:34.380562 PCI: 00:1f.2 init finished in 5 msecs
1383 00:48:34.391400 PNP: 0c09.0 init
1384 00:48:34.394594 Google Chrome EC uptime: 6.537 seconds
1385 00:48:34.400909 Google Chrome AP resets since EC boot: 0
1386 00:48:34.404175 Google Chrome most recent AP reset causes:
1387 00:48:34.410676 Google Chrome EC reset flags at last EC boot: reset-pin
1388 00:48:34.414231 PNP: 0c09.0 init finished in 18 msecs
1389 00:48:34.414328 Devices initialized
1390 00:48:34.417654 Show all devs... After init.
1391 00:48:34.420875 Root Device: enabled 1
1392 00:48:34.424656 CPU_CLUSTER: 0: enabled 1
1393 00:48:34.427271 DOMAIN: 0000: enabled 1
1394 00:48:34.427368 PCI: 00:00.0: enabled 1
1395 00:48:34.430712 PCI: 00:02.0: enabled 1
1396 00:48:34.434519 PCI: 00:04.0: enabled 1
1397 00:48:34.434599 PCI: 00:05.0: enabled 1
1398 00:48:34.437791 PCI: 00:09.0: enabled 0
1399 00:48:34.440748 PCI: 00:12.6: enabled 0
1400 00:48:34.443942 PCI: 00:14.0: enabled 1
1401 00:48:34.444023 PCI: 00:14.1: enabled 0
1402 00:48:34.447439 PCI: 00:14.2: enabled 0
1403 00:48:34.450255 PCI: 00:14.3: enabled 1
1404 00:48:34.453725 PCI: 00:14.5: enabled 1
1405 00:48:34.453805 PCI: 00:15.0: enabled 1
1406 00:48:34.457116 PCI: 00:15.1: enabled 1
1407 00:48:34.460703 PCI: 00:15.2: enabled 1
1408 00:48:34.463907 PCI: 00:15.3: enabled 1
1409 00:48:34.463988 PCI: 00:16.0: enabled 1
1410 00:48:34.466834 PCI: 00:16.1: enabled 0
1411 00:48:34.470047 PCI: 00:16.4: enabled 0
1412 00:48:34.473677 PCI: 00:16.5: enabled 0
1413 00:48:34.473757 PCI: 00:17.0: enabled 0
1414 00:48:34.477111 PCI: 00:19.0: enabled 1
1415 00:48:34.480366 PCI: 00:19.1: enabled 0
1416 00:48:34.480508 PCI: 00:19.2: enabled 1
1417 00:48:34.483448 PCI: 00:1a.0: enabled 1
1418 00:48:34.486979 PCI: 00:1c.0: enabled 0
1419 00:48:34.489964 PCI: 00:1c.1: enabled 0
1420 00:48:34.490045 PCI: 00:1c.2: enabled 0
1421 00:48:34.493506 PCI: 00:1c.3: enabled 0
1422 00:48:34.496808 PCI: 00:1c.4: enabled 0
1423 00:48:34.499840 PCI: 00:1c.5: enabled 0
1424 00:48:34.499914 PCI: 00:1c.6: enabled 0
1425 00:48:34.503411 PCI: 00:1c.7: enabled 1
1426 00:48:34.506828 PCI: 00:1e.0: enabled 0
1427 00:48:34.510027 PCI: 00:1e.1: enabled 0
1428 00:48:34.510134 PCI: 00:1e.2: enabled 1
1429 00:48:34.513634 PCI: 00:1e.3: enabled 0
1430 00:48:34.517123 PCI: 00:1f.0: enabled 1
1431 00:48:34.517203 PCI: 00:1f.1: enabled 0
1432 00:48:34.519666 PCI: 00:1f.2: enabled 1
1433 00:48:34.523088 PCI: 00:1f.3: enabled 1
1434 00:48:34.526380 PCI: 00:1f.4: enabled 0
1435 00:48:34.526461 PCI: 00:1f.5: enabled 1
1436 00:48:34.529730 PCI: 00:1f.7: enabled 0
1437 00:48:34.533189 GENERIC: 0.0: enabled 1
1438 00:48:34.536104 GENERIC: 0.0: enabled 1
1439 00:48:34.536184 USB0 port 0: enabled 1
1440 00:48:34.539908 GENERIC: 0.0: enabled 1
1441 00:48:34.542674 I2C: 00:2c: enabled 1
1442 00:48:34.542783 I2C: 00:15: enabled 1
1443 00:48:34.546241 GENERIC: 0.0: enabled 0
1444 00:48:34.549417 I2C: 00:15: enabled 1
1445 00:48:34.553049 I2C: 00:10: enabled 0
1446 00:48:34.553149 I2C: 00:10: enabled 0
1447 00:48:34.556475 I2C: 00:2c: enabled 1
1448 00:48:34.559395 I2C: 00:40: enabled 1
1449 00:48:34.559492 I2C: 00:10: enabled 1
1450 00:48:34.563149 I2C: 00:39: enabled 1
1451 00:48:34.565771 I2C: 00:36: enabled 1
1452 00:48:34.565876 I2C: 00:10: enabled 0
1453 00:48:34.569500 I2C: 00:0c: enabled 1
1454 00:48:34.572674 I2C: 00:50: enabled 1
1455 00:48:34.572772 I2C: 00:1a: enabled 1
1456 00:48:34.575953 I2C: 00:1a: enabled 0
1457 00:48:34.579405 I2C: 00:1a: enabled 0
1458 00:48:34.579502 I2C: 00:28: enabled 1
1459 00:48:34.583068 I2C: 00:29: enabled 1
1460 00:48:34.585946 PCI: 00:00.0: enabled 1
1461 00:48:34.586021 SPI: 00: enabled 1
1462 00:48:34.589153 PNP: 0c09.0: enabled 1
1463 00:48:34.592815 GENERIC: 0.0: enabled 0
1464 00:48:34.592888 USB2 port 0: enabled 1
1465 00:48:34.595797 USB2 port 1: enabled 1
1466 00:48:34.598846 USB2 port 2: enabled 1
1467 00:48:34.602559 USB2 port 3: enabled 1
1468 00:48:34.602647 USB2 port 4: enabled 0
1469 00:48:34.605600 USB2 port 5: enabled 1
1470 00:48:34.608776 USB2 port 6: enabled 0
1471 00:48:34.608898 USB2 port 7: enabled 1
1472 00:48:34.612056 USB3 port 0: enabled 1
1473 00:48:34.615357 USB3 port 1: enabled 1
1474 00:48:34.618987 USB3 port 2: enabled 1
1475 00:48:34.619087 USB3 port 3: enabled 1
1476 00:48:34.622130 APIC: 00: enabled 1
1477 00:48:34.622201 APIC: 02: enabled 1
1478 00:48:34.625826 PCI: 00:08.0: enabled 1
1479 00:48:34.632112 BS: BS_DEV_INIT run times (exec / console): 23 / 436 ms
1480 00:48:34.635649 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 00:48:34.638538 ELOG: NV offset 0xbfa000 size 0x1000
1482 00:48:34.646886 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 00:48:34.653284 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:33 UTC
1484 00:48:34.659924 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:33 UTC
1485 00:48:34.666939 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:33 UTC
1486 00:48:34.673199 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:33 UTC
1487 00:48:34.680055 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:33 UTC
1488 00:48:34.686066 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 00:48:34.689763 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:33 UTC
1490 00:48:34.699197 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 00:48:34.705805 ELOG: Event(A0) added with size 9 at 2023-05-23 00:48:33 UTC
1492 00:48:34.709739 elog_add_boot_reason: Logged dev mode boot
1493 00:48:34.715904 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 00:48:34.715986 Finalize devices...
1495 00:48:34.719906 Devices finalized
1496 00:48:34.725593 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 00:48:34.729269 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 00:48:34.736081 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 00:48:34.739080 ME: HFSTS1 : 0x80030045
1500 00:48:34.742535 ME: HFSTS2 : 0x30280136
1501 00:48:34.748736 ME: HFSTS3 : 0x00000050
1502 00:48:34.752266 ME: HFSTS4 : 0x00004000
1503 00:48:34.755488 ME: HFSTS5 : 0x00000000
1504 00:48:34.759152 ME: HFSTS6 : 0x40400006
1505 00:48:34.762534 ME: Manufacturing Mode : NO
1506 00:48:34.765494 ME: FW Partition Table : OK
1507 00:48:34.768496 ME: Bringup Loader Failure : NO
1508 00:48:34.772237 ME: Firmware Init Complete : NO
1509 00:48:34.775396 ME: Boot Options Present : NO
1510 00:48:34.778508 ME: Update In Progress : NO
1511 00:48:34.781908 ME: D0i3 Support : YES
1512 00:48:34.785616 ME: Low Power State Enabled : NO
1513 00:48:34.788465 ME: CPU Replaced : YES
1514 00:48:34.791940 ME: CPU Replacement Valid : YES
1515 00:48:34.795458 ME: Current Working State : 5
1516 00:48:34.798735 ME: Current Operation State : 1
1517 00:48:34.801486 ME: Current Operation Mode : 3
1518 00:48:34.804841 ME: Error Code : 0
1519 00:48:34.808194 ME: CPU Debug Disabled : YES
1520 00:48:34.811534 ME: TXT Support : NO
1521 00:48:34.817907 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 00:48:34.824570 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 00:48:34.828250 ACPI: Writing ACPI tables at 76b27000.
1524 00:48:34.831526 ACPI: * FACS
1525 00:48:34.831629 ACPI: * DSDT
1526 00:48:34.834925 Ramoops buffer: 0x100000@0x76a26000.
1527 00:48:34.841416 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 00:48:34.844695 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 00:48:34.848200 Google Chrome EC: version:
1530 00:48:34.851323 ro: magolor_1.1.9999-103b6f9
1531 00:48:34.854867 rw: magolor_1.1.9999-103b6f9
1532 00:48:34.857976 running image: 1
1533 00:48:34.861322 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 00:48:34.865635 ACPI: * FADT
1535 00:48:34.865745 SCI is IRQ9
1536 00:48:34.872229 ACPI: added table 1/32, length now 40
1537 00:48:34.872342 ACPI: * SSDT
1538 00:48:34.876000 Found 1 CPU(s) with 2 core(s) each.
1539 00:48:34.878835 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 00:48:34.885489 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 00:48:34.889247 Could not locate 'wifi_sar' in VPD.
1542 00:48:34.892187 Checking CBFS for default SAR values
1543 00:48:34.898706 wifi_sar_defaults.hex has bad len in CBFS
1544 00:48:34.902206 failed from getting SAR limits!
1545 00:48:34.905718 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 00:48:34.912201 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 00:48:34.915451 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 00:48:34.922161 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 00:48:34.925609 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 00:48:34.932385 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 00:48:34.935718 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 00:48:34.941875 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 00:48:34.948729 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 00:48:34.955406 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 00:48:34.958943 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 00:48:34.965083 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 00:48:34.972093 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 00:48:34.975637 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 00:48:34.978457 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 00:48:34.985844 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 00:48:34.989387 PS2K: Passing 101 keymaps to kernel
1562 00:48:34.995882 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 00:48:35.002415 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 00:48:35.005837 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 00:48:35.012508 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 00:48:35.019166 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 00:48:35.022289 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 00:48:35.029254 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 00:48:35.035585 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 00:48:35.039005 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 00:48:35.045263 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 00:48:35.048881 ACPI: added table 2/32, length now 44
1573 00:48:35.052022 ACPI: * MCFG
1574 00:48:35.055509 ACPI: added table 3/32, length now 48
1575 00:48:35.055638 ACPI: * TPM2
1576 00:48:35.058844 TPM2 log created at 0x76a16000
1577 00:48:35.061822 ACPI: added table 4/32, length now 52
1578 00:48:35.065390 ACPI: * MADT
1579 00:48:35.065473 SCI is IRQ9
1580 00:48:35.068792 ACPI: added table 5/32, length now 56
1581 00:48:35.072079 current = 76b2d580
1582 00:48:35.075329 ACPI: * DMAR
1583 00:48:35.078604 ACPI: added table 6/32, length now 60
1584 00:48:35.081829 ACPI: added table 7/32, length now 64
1585 00:48:35.081912 ACPI: * HPET
1586 00:48:35.085094 ACPI: added table 8/32, length now 68
1587 00:48:35.088723 ACPI: done.
1588 00:48:35.091971 ACPI tables: 26304 bytes.
1589 00:48:35.095632 smbios_write_tables: 76a15000
1590 00:48:35.098978 EC returned error result code 3
1591 00:48:35.101884 Couldn't obtain OEM name from CBI
1592 00:48:35.105010 Create SMBIOS type 16
1593 00:48:35.105094 Create SMBIOS type 17
1594 00:48:35.108398 GENERIC: 0.0 (WIFI Device)
1595 00:48:35.112092 SMBIOS tables: 913 bytes.
1596 00:48:35.115420 Writing table forward entry at 0x00000500
1597 00:48:35.121619 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 00:48:35.124904 Writing coreboot table at 0x76b4b000
1599 00:48:35.131843 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 00:48:35.135106 1. 0000000000001000-000000000009ffff: RAM
1601 00:48:35.141842 2. 00000000000a0000-00000000000fffff: RESERVED
1602 00:48:35.145100 3. 0000000000100000-0000000076a14fff: RAM
1603 00:48:35.151769 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 00:48:35.154630 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 00:48:35.161423 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 00:48:35.164424 7. 0000000077000000-000000007fbfffff: RESERVED
1607 00:48:35.171151 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 00:48:35.174869 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 00:48:35.181255 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 00:48:35.184654 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 00:48:35.191519 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 00:48:35.194750 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 00:48:35.197835 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 00:48:35.204352 15. 0000000100000000-00000001803fffff: RAM
1615 00:48:35.207795 Passing 4 GPIOs to payload:
1616 00:48:35.210816 NAME | PORT | POLARITY | VALUE
1617 00:48:35.217711 lid | undefined | high | high
1618 00:48:35.220904 power | undefined | high | low
1619 00:48:35.227975 oprom | undefined | high | low
1620 00:48:35.234332 EC in RW | 0x000000b9 | high | low
1621 00:48:35.237178 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 74a7
1622 00:48:35.240693 coreboot table: 1504 bytes.
1623 00:48:35.243729 IMD ROOT 0. 0x76fff000 0x00001000
1624 00:48:35.250543 IMD SMALL 1. 0x76ffe000 0x00001000
1625 00:48:35.253938 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 00:48:35.257385 CONSOLE 3. 0x76c2e000 0x00020000
1627 00:48:35.260383 FMAP 4. 0x76c2d000 0x00000578
1628 00:48:35.263570 TIME STAMP 5. 0x76c2c000 0x00000910
1629 00:48:35.267251 VBOOT WORK 6. 0x76c18000 0x00014000
1630 00:48:35.270890 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 00:48:35.273574 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 00:48:35.280664 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 00:48:35.283808 REFCODE 10. 0x76b67000 0x00040000
1634 00:48:35.286674 SMM BACKUP 11. 0x76b57000 0x00010000
1635 00:48:35.290399 4f444749 12. 0x76b55000 0x00002000
1636 00:48:35.293431 EXT VBT13. 0x76b53000 0x00001c43
1637 00:48:35.296822 COREBOOT 14. 0x76b4b000 0x00008000
1638 00:48:35.299923 ACPI 15. 0x76b27000 0x00024000
1639 00:48:35.304010 ACPI GNVS 16. 0x76b26000 0x00001000
1640 00:48:35.307036 RAMOOPS 17. 0x76a26000 0x00100000
1641 00:48:35.309976 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 00:48:35.316998 SMBIOS 19. 0x76a15000 0x00000800
1643 00:48:35.317151 IMD small region:
1644 00:48:35.319869 IMD ROOT 0. 0x76ffec00 0x00000400
1645 00:48:35.323361 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 00:48:35.330304 VPD 2. 0x76ffeb60 0x0000006c
1647 00:48:35.333206 POWER STATE 3. 0x76ffeb20 0x00000040
1648 00:48:35.336681 ROMSTAGE 4. 0x76ffeb00 0x00000004
1649 00:48:35.339843 MEM INFO 5. 0x76ffe920 0x000001e0
1650 00:48:35.346974 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1651 00:48:35.349923 MTRR: Physical address space:
1652 00:48:35.356825 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 00:48:35.363222 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 00:48:35.369652 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 00:48:35.372934 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 00:48:35.379505 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 00:48:35.386346 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 00:48:35.392652 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 00:48:35.395957 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 00:48:35.403107 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 00:48:35.405796 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 00:48:35.409493 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 00:48:35.412955 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 00:48:35.415842 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 00:48:35.422402 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 00:48:35.425901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 00:48:35.429378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 00:48:35.432579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 00:48:35.438996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 00:48:35.442402 call enable_fixed_mtrr()
1671 00:48:35.445745 CPU physical address size: 39 bits
1672 00:48:35.449334 MTRR: default type WB/UC MTRR counts: 6/5.
1673 00:48:35.452431 MTRR: UC selected as default type.
1674 00:48:35.458766 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 00:48:35.465155 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 00:48:35.471965 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 00:48:35.478413 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 00:48:35.481582 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 00:48:35.485472
1680 00:48:35.485588 MTRR check
1681 00:48:35.488904 Fixed MTRRs : Enabled
1682 00:48:35.489015 Variable MTRRs: Enabled
1683 00:48:35.489112
1684 00:48:35.495839 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 00:48:35.498716 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 00:48:35.501983 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 00:48:35.505165 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 00:48:35.511985 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 00:48:35.515171 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 00:48:35.518202 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 00:48:35.521494 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 00:48:35.527881 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 00:48:35.531308 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 00:48:35.534646 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 00:48:35.541590 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 00:48:35.544483 call enable_fixed_mtrr()
1697 00:48:35.548579 Checking cr50 for pending updates
1698 00:48:35.551923 CPU physical address size: 39 bits
1699 00:48:35.555389 Reading cr50 TPM mode
1700 00:48:35.563500 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 00:48:35.571029 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 00:48:35.574609 Checking segment from ROM address 0xfff9d5b8
1703 00:48:35.581537 Checking segment from ROM address 0xfff9d5d4
1704 00:48:35.584762 Loading segment from ROM address 0xfff9d5b8
1705 00:48:35.588001 code (compression=0)
1706 00:48:35.594361 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 00:48:35.604432 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 00:48:35.607606 it's not compressed!
1709 00:48:35.732984 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 00:48:35.739060 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 00:48:35.746701 Loading segment from ROM address 0xfff9d5d4
1712 00:48:35.749805 Entry Point 0x30000000
1713 00:48:35.749910 Loaded segments
1714 00:48:35.756587 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 00:48:35.772741 Finalizing chipset.
1716 00:48:35.775874 Finalizing SMM.
1717 00:48:35.775985 APMC done.
1718 00:48:35.782494 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 00:48:35.785759 mp_park_aps done after 0 msecs.
1720 00:48:35.789465 Jumping to boot code at 0x30000000(0x76b4b000)
1721 00:48:35.799038 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 00:48:35.799156
1723 00:48:35.799253
1724 00:48:35.799345
1725 00:48:35.802434 Starting depthcharge on Magolor...
1726 00:48:35.802545
1727 00:48:35.802931 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 00:48:35.803074 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 00:48:35.803191 Setting prompt string to ['dedede:']
1730 00:48:35.803297 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 00:48:35.812267 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 00:48:35.812382
1733 00:48:35.819108 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 00:48:35.819214
1735 00:48:35.822208 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 00:48:35.822318
1737 00:48:35.825826 Wipe memory regions:
1738 00:48:35.825934
1739 00:48:35.828510 [0x00000000001000, 0x000000000a0000)
1740 00:48:35.828617
1741 00:48:35.831721 [0x00000000100000, 0x00000030000000)
1742 00:48:35.960589
1743 00:48:35.963868 [0x00000031062170, 0x00000076a15000)
1744 00:48:36.132780
1745 00:48:36.135966 [0x00000100000000, 0x00000180400000)
1746 00:48:37.198813
1747 00:48:37.199001 R8152: Initializing
1748 00:48:37.199101
1749 00:48:37.202062 Version 6 (ocp_data = 5c30)
1750 00:48:37.206237
1751 00:48:37.206345 R8152: Done initializing
1752 00:48:37.206440
1753 00:48:37.208735 Adding net device
1754 00:48:37.208841
1755 00:48:37.212468 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 00:48:37.215289
1757 00:48:37.215395
1758 00:48:37.215487
1759 00:48:37.215813 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 00:48:37.316214 dedede: tftpboot 192.168.201.1 10419525/tftp-deploy-bvw96e7l/kernel/bzImage 10419525/tftp-deploy-bvw96e7l/kernel/cmdline 10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
1762 00:48:37.316438 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 00:48:37.316557 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 00:48:37.321111 tftpboot 192.168.201.1 10419525/tftp-deploy-bvw96e7l/kernel/bzIploy-bvw96e7l/kernel/cmdline 10419525/tftp-deploy-bvw96e7l/ramdisk/ramdisk.cpio.gz
1765 00:48:37.321232
1766 00:48:37.321327 Waiting for link
1767 00:48:37.523218
1768 00:48:37.523407 done.
1769 00:48:37.523508
1770 00:48:37.523640 MAC: 00:24:32:30:7b:c4
1771 00:48:37.523761
1772 00:48:37.526152 Sending DHCP discover... done.
1773 00:48:37.526261
1774 00:48:37.529495 Waiting for reply... done.
1775 00:48:37.529607
1776 00:48:37.533020 Sending DHCP request... done.
1777 00:48:37.533126
1778 00:48:37.535881 Waiting for reply... done.
1779 00:48:37.539461
1780 00:48:37.539596 My ip is 192.168.201.12
1781 00:48:37.539708
1782 00:48:37.543029 The DHCP server ip is 192.168.201.1
1783 00:48:37.543142
1784 00:48:37.549239 TFTP server IP predefined by user: 192.168.201.1
1785 00:48:37.549356
1786 00:48:37.555939 Bootfile predefined by user: 10419525/tftp-deploy-bvw96e7l/kernel/bzImage
1787 00:48:37.556055
1788 00:48:37.559339 Sending tftp read request... done.
1789 00:48:37.559450
1790 00:48:37.562122 Waiting for the transfer...
1791 00:48:37.562261
1792 00:48:38.129927 00000000 ################################################################
1793 00:48:38.130172
1794 00:48:38.706303 00080000 ################################################################
1795 00:48:38.706447
1796 00:48:39.271425 00100000 ################################################################
1797 00:48:39.271573
1798 00:48:39.836152 00180000 ################################################################
1799 00:48:39.836289
1800 00:48:40.389264 00200000 ################################################################
1801 00:48:40.389398
1802 00:48:40.950256 00280000 ################################################################
1803 00:48:40.950390
1804 00:48:41.508429 00300000 ################################################################
1805 00:48:41.508585
1806 00:48:42.056833 00380000 ################################################################
1807 00:48:42.056965
1808 00:48:42.595479 00400000 ################################################################
1809 00:48:42.595712
1810 00:48:43.142766 00480000 ################################################################
1811 00:48:43.142901
1812 00:48:43.708915 00500000 ################################################################
1813 00:48:43.709054
1814 00:48:44.255495 00580000 ################################################################
1815 00:48:44.255667
1816 00:48:44.819392 00600000 ################################################################
1817 00:48:44.819592
1818 00:48:45.371180 00680000 ################################################################
1819 00:48:45.371311
1820 00:48:45.909352 00700000 ################################################################
1821 00:48:45.909509
1822 00:48:46.447978 00780000 ################################################################
1823 00:48:46.448126
1824 00:48:46.983460 00800000 ################################################################
1825 00:48:46.983612
1826 00:48:47.522367 00880000 ################################################################
1827 00:48:47.522495
1828 00:48:48.046950 00900000 ################################################################
1829 00:48:48.047081
1830 00:48:48.573950 00980000 ################################################################
1831 00:48:48.574119
1832 00:48:48.949731 00a00000 ############################################### done.
1833 00:48:48.949860
1834 00:48:48.952907 The bootfile was 10862592 bytes long.
1835 00:48:48.953020
1836 00:48:48.956044 Sending tftp read request... done.
1837 00:48:48.956132
1838 00:48:48.959257 Waiting for the transfer...
1839 00:48:48.959342
1840 00:48:49.484933 00000000 ################################################################
1841 00:48:49.485067
1842 00:48:50.005072 00080000 ################################################################
1843 00:48:50.005234
1844 00:48:50.538680 00100000 ################################################################
1845 00:48:50.538843
1846 00:48:51.068395 00180000 ################################################################
1847 00:48:51.068572
1848 00:48:51.592231 00200000 ################################################################
1849 00:48:51.592380
1850 00:48:52.128104 00280000 ################################################################
1851 00:48:52.128267
1852 00:48:52.660405 00300000 ################################################################
1853 00:48:52.660539
1854 00:48:53.190512 00380000 ################################################################
1855 00:48:53.190671
1856 00:48:53.718586 00400000 ################################################################
1857 00:48:53.718764
1858 00:48:54.244217 00480000 ################################################################
1859 00:48:54.244377
1860 00:48:54.768205 00500000 ################################################################
1861 00:48:54.768344
1862 00:48:55.293594 00580000 ################################################################
1863 00:48:55.293736
1864 00:48:55.808836 00600000 ################################################################
1865 00:48:55.809006
1866 00:48:56.323868 00680000 ################################################################
1867 00:48:56.324034
1868 00:48:56.837823 00700000 ################################################################
1869 00:48:56.837987
1870 00:48:57.351406 00780000 ################################################################
1871 00:48:57.351555
1872 00:48:57.873150 00800000 ################################################################
1873 00:48:57.873290
1874 00:48:58.173575 00880000 ###################################### done.
1875 00:48:58.173717
1876 00:48:58.177238 Sending tftp read request... done.
1877 00:48:58.177348
1878 00:48:58.180659 Waiting for the transfer...
1879 00:48:58.180750
1880 00:48:58.180815 00000000 # done.
1881 00:48:58.183640
1882 00:48:58.190008 Command line loaded dynamically from TFTP file: 10419525/tftp-deploy-bvw96e7l/kernel/cmdline
1883 00:48:58.190105
1884 00:48:58.203295 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1885 00:48:58.203444
1886 00:48:58.209948 ec_init: CrosEC protocol v3 supported (256, 256)
1887 00:48:58.216583
1888 00:48:58.219673 Shutting down all USB controllers.
1889 00:48:58.219772
1890 00:48:58.219842 Removing current net device
1891 00:48:58.219904
1892 00:48:58.223400 Finalizing coreboot
1893 00:48:58.223512
1894 00:48:58.229639 Exiting depthcharge with code 4 at timestamp: 29221563
1895 00:48:58.229767
1896 00:48:58.229877
1897 00:48:58.229978 Starting kernel ...
1898 00:48:58.230068
1899 00:48:58.230158
1900 00:48:58.230572 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
1901 00:48:58.230699 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
1902 00:48:58.230807 Setting prompt string to ['Linux version [0-9]']
1903 00:48:58.230911 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1904 00:48:58.231009 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1906 00:53:22.231562 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
1908 00:53:22.232724 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
1910 00:53:22.233600 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1913 00:53:22.235610 end: 2 depthcharge-action (duration 00:05:00) [common]
1915 00:53:22.236808 Cleaning after the job
1916 00:53:22.237290 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/ramdisk
1917 00:53:22.243524 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/kernel
1918 00:53:22.250459 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419525/tftp-deploy-bvw96e7l/modules
1919 00:53:22.253420 start: 5.1 power-off (timeout 00:00:30) [common]
1920 00:53:22.254050 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1921 00:53:22.355730 >> Command sent successfully.
1922 00:53:22.363606 Returned 0 in 0 seconds
1923 00:53:22.464746 end: 5.1 power-off (duration 00:00:00) [common]
1925 00:53:22.466466 start: 5.2 read-feedback (timeout 00:10:00) [common]
1926 00:53:22.468077 Listened to connection for namespace 'common' for up to 1s
1928 00:53:22.469401 Listened to connection for namespace 'common' for up to 1s
1929 00:53:23.467854 Finalising connection for namespace 'common'
1930 00:53:23.468641 Disconnecting from shell: Finalise
1931 00:53:23.469213
1932 00:53:23.570433 end: 5.2 read-feedback (duration 00:00:01) [common]
1933 00:53:23.571043 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419525
1934 00:53:23.620553 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419525
1935 00:53:23.620782 JobError: Your job cannot terminate cleanly.