Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:48:25.596827 lava-dispatcher, installed at version: 2023.03
2 00:48:25.597039 start: 0 validate
3 00:48:25.597172 Start time: 2023-05-23 00:48:25.597165+00:00 (UTC)
4 00:48:25.597288 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:48:25.597417 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 00:48:25.891596 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:48:25.891790 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:26.181608 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:26.181795 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:48:26.469161 validate duration: 0.87
12 00:48:26.469443 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:48:26.469610 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:48:26.469695 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:48:26.469816 Not decompressing ramdisk as can be used compressed.
16 00:48:26.469901 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 00:48:26.469964 saving as /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/ramdisk/rootfs.cpio.gz
18 00:48:26.470025 total size: 8430071 (8MB)
19 00:48:26.471123 progress 0% (0MB)
20 00:48:26.473395 progress 5% (0MB)
21 00:48:26.475697 progress 10% (0MB)
22 00:48:26.477946 progress 15% (1MB)
23 00:48:26.480129 progress 20% (1MB)
24 00:48:26.482408 progress 25% (2MB)
25 00:48:26.484660 progress 30% (2MB)
26 00:48:26.486838 progress 35% (2MB)
27 00:48:26.488830 progress 40% (3MB)
28 00:48:26.491044 progress 45% (3MB)
29 00:48:26.493181 progress 50% (4MB)
30 00:48:26.495351 progress 55% (4MB)
31 00:48:26.497459 progress 60% (4MB)
32 00:48:26.499602 progress 65% (5MB)
33 00:48:26.501745 progress 70% (5MB)
34 00:48:26.503695 progress 75% (6MB)
35 00:48:26.505832 progress 80% (6MB)
36 00:48:26.507935 progress 85% (6MB)
37 00:48:26.510125 progress 90% (7MB)
38 00:48:26.512311 progress 95% (7MB)
39 00:48:26.514490 progress 100% (8MB)
40 00:48:26.514621 8MB downloaded in 0.04s (180.29MB/s)
41 00:48:26.514764 end: 1.1.1 http-download (duration 00:00:00) [common]
43 00:48:26.514999 end: 1.1 download-retry (duration 00:00:00) [common]
44 00:48:26.515084 start: 1.2 download-retry (timeout 00:10:00) [common]
45 00:48:26.515168 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 00:48:26.515315 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:48:26.515490 saving as /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/kernel/bzImage
48 00:48:26.515552 total size: 10862592 (10MB)
49 00:48:26.515611 No compression specified
50 00:48:26.516708 progress 0% (0MB)
51 00:48:26.519434 progress 5% (0MB)
52 00:48:26.522251 progress 10% (1MB)
53 00:48:26.524892 progress 15% (1MB)
54 00:48:26.527744 progress 20% (2MB)
55 00:48:26.530432 progress 25% (2MB)
56 00:48:26.533198 progress 30% (3MB)
57 00:48:26.536057 progress 35% (3MB)
58 00:48:26.538824 progress 40% (4MB)
59 00:48:26.541628 progress 45% (4MB)
60 00:48:26.544235 progress 50% (5MB)
61 00:48:26.547035 progress 55% (5MB)
62 00:48:26.549745 progress 60% (6MB)
63 00:48:26.552547 progress 65% (6MB)
64 00:48:26.555467 progress 70% (7MB)
65 00:48:26.558124 progress 75% (7MB)
66 00:48:26.560902 progress 80% (8MB)
67 00:48:26.563533 progress 85% (8MB)
68 00:48:26.566362 progress 90% (9MB)
69 00:48:26.569038 progress 95% (9MB)
70 00:48:26.571885 progress 100% (10MB)
71 00:48:26.572053 10MB downloaded in 0.06s (183.36MB/s)
72 00:48:26.572195 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:48:26.572422 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:48:26.572511 start: 1.3 download-retry (timeout 00:10:00) [common]
76 00:48:26.572633 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 00:48:26.572763 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:48:26.572832 saving as /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/modules/modules.tar
79 00:48:26.572894 total size: 484052 (0MB)
80 00:48:26.572954 Using unxz to decompress xz
81 00:48:26.576690 progress 6% (0MB)
82 00:48:26.577088 progress 13% (0MB)
83 00:48:26.577325 progress 20% (0MB)
84 00:48:26.578784 progress 27% (0MB)
85 00:48:26.580833 progress 33% (0MB)
86 00:48:26.582664 progress 40% (0MB)
87 00:48:26.584904 progress 47% (0MB)
88 00:48:26.586777 progress 54% (0MB)
89 00:48:26.588718 progress 60% (0MB)
90 00:48:26.590556 progress 67% (0MB)
91 00:48:26.592564 progress 74% (0MB)
92 00:48:26.594933 progress 81% (0MB)
93 00:48:26.596773 progress 88% (0MB)
94 00:48:26.598541 progress 94% (0MB)
95 00:48:26.600883 progress 100% (0MB)
96 00:48:26.607047 0MB downloaded in 0.03s (13.52MB/s)
97 00:48:26.607310 end: 1.3.1 http-download (duration 00:00:00) [common]
99 00:48:26.607569 end: 1.3 download-retry (duration 00:00:00) [common]
100 00:48:26.607666 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 00:48:26.607760 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 00:48:26.607842 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 00:48:26.607926 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 00:48:26.608139 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir
105 00:48:26.608263 makedir: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin
106 00:48:26.608365 makedir: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/tests
107 00:48:26.608459 makedir: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/results
108 00:48:26.608575 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-add-keys
109 00:48:26.608714 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-add-sources
110 00:48:26.608838 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-background-process-start
111 00:48:26.608962 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-background-process-stop
112 00:48:26.609083 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-common-functions
113 00:48:26.609202 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-echo-ipv4
114 00:48:26.609325 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-install-packages
115 00:48:26.609444 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-installed-packages
116 00:48:26.609570 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-os-build
117 00:48:26.609689 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-probe-channel
118 00:48:26.609807 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-probe-ip
119 00:48:26.609926 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-target-ip
120 00:48:26.610045 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-target-mac
121 00:48:26.610162 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-target-storage
122 00:48:26.610285 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-case
123 00:48:26.610404 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-event
124 00:48:26.610522 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-feedback
125 00:48:26.610641 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-raise
126 00:48:26.610763 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-reference
127 00:48:26.610881 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-runner
128 00:48:26.611000 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-set
129 00:48:26.611119 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-test-shell
130 00:48:26.611242 Updating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-install-packages (oe)
131 00:48:26.611390 Updating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/bin/lava-installed-packages (oe)
132 00:48:26.611509 Creating /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/environment
133 00:48:26.611604 LAVA metadata
134 00:48:26.611677 - LAVA_JOB_ID=10419529
135 00:48:26.611742 - LAVA_DISPATCHER_IP=192.168.201.1
136 00:48:26.611844 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 00:48:26.611912 skipped lava-vland-overlay
138 00:48:26.611988 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 00:48:26.612069 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 00:48:26.612130 skipped lava-multinode-overlay
141 00:48:26.612201 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 00:48:26.612285 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 00:48:26.612357 Loading test definitions
144 00:48:26.612447 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 00:48:26.612519 Using /lava-10419529 at stage 0
146 00:48:26.612821 uuid=10419529_1.4.2.3.1 testdef=None
147 00:48:26.612909 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 00:48:26.612997 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 00:48:26.613556 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 00:48:26.613778 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 00:48:26.614398 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 00:48:26.614627 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 00:48:26.615224 runner path: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/0/tests/0_dmesg test_uuid 10419529_1.4.2.3.1
156 00:48:26.615375 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 00:48:26.615669 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 00:48:26.615743 Using /lava-10419529 at stage 1
160 00:48:26.616020 uuid=10419529_1.4.2.3.5 testdef=None
161 00:48:26.616107 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 00:48:26.616189 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 00:48:26.616646 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 00:48:26.616864 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 00:48:26.617510 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 00:48:26.617752 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 00:48:26.618356 runner path: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/1/tests/1_bootrr test_uuid 10419529_1.4.2.3.5
170 00:48:26.618503 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 00:48:26.618712 Creating lava-test-runner.conf files
173 00:48:26.618775 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/0 for stage 0
174 00:48:26.618861 - 0_dmesg
175 00:48:26.618938 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419529/lava-overlay-61idi_ir/lava-10419529/1 for stage 1
176 00:48:26.619026 - 1_bootrr
177 00:48:26.619122 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 00:48:26.619205 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 00:48:26.627343 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 00:48:26.627446 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 00:48:26.627530 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 00:48:26.627613 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 00:48:26.627700 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 00:48:26.867635 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 00:48:26.868010 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 00:48:26.868132 extracting modules file /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419529/extract-overlay-ramdisk-pzbvdda0/ramdisk
187 00:48:26.886901 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 00:48:26.887031 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 00:48:26.887123 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419529/compress-overlay-enu550va/overlay-1.4.2.4.tar.gz to ramdisk
190 00:48:26.887195 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419529/compress-overlay-enu550va/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419529/extract-overlay-ramdisk-pzbvdda0/ramdisk
191 00:48:26.895716 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 00:48:26.895830 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 00:48:26.895922 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 00:48:26.896010 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 00:48:26.896087 Building ramdisk /var/lib/lava/dispatcher/tmp/10419529/extract-overlay-ramdisk-pzbvdda0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419529/extract-overlay-ramdisk-pzbvdda0/ramdisk
196 00:48:27.027014 >> 53978 blocks
197 00:48:27.911909 rename /var/lib/lava/dispatcher/tmp/10419529/extract-overlay-ramdisk-pzbvdda0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
198 00:48:27.912338 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 00:48:27.912470 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 00:48:27.912566 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 00:48:27.912661 No mkimage arch provided, not using FIT.
202 00:48:27.912754 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 00:48:27.912836 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 00:48:27.912941 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 00:48:27.913030 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 00:48:27.913108 No LXC device requested
207 00:48:27.913187 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 00:48:27.913275 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 00:48:27.913352 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 00:48:27.913427 Checking files for TFTP limit of 4294967296 bytes.
211 00:48:27.913864 end: 1 tftp-deploy (duration 00:00:01) [common]
212 00:48:27.913967 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 00:48:27.914055 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 00:48:27.914177 substitutions:
215 00:48:27.914244 - {DTB}: None
216 00:48:27.914307 - {INITRD}: 10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
217 00:48:27.914367 - {KERNEL}: 10419529/tftp-deploy-qhej7nsa/kernel/bzImage
218 00:48:27.914425 - {LAVA_MAC}: None
219 00:48:27.914481 - {PRESEED_CONFIG}: None
220 00:48:27.914537 - {PRESEED_LOCAL}: None
221 00:48:27.914593 - {RAMDISK}: 10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
222 00:48:27.914648 - {ROOT_PART}: None
223 00:48:27.914702 - {ROOT}: None
224 00:48:27.914756 - {SERVER_IP}: 192.168.201.1
225 00:48:27.914810 - {TEE}: None
226 00:48:27.914864 Parsed boot commands:
227 00:48:27.914917 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 00:48:27.915086 Parsed boot commands: tftpboot 192.168.201.1 10419529/tftp-deploy-qhej7nsa/kernel/bzImage 10419529/tftp-deploy-qhej7nsa/kernel/cmdline 10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
229 00:48:27.915172 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 00:48:27.915259 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 00:48:27.915350 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 00:48:27.915433 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 00:48:27.915502 Not connected, no need to disconnect.
234 00:48:27.915574 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 00:48:27.915656 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 00:48:27.915721 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
237 00:48:27.919177 Setting prompt string to ['lava-test: # ']
238 00:48:27.919529 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 00:48:27.919663 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 00:48:27.919791 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 00:48:27.919910 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 00:48:27.920229 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 00:48:33.053059 >> Command sent successfully.
244 00:48:33.055407 Returned 0 in 5 seconds
245 00:48:33.155793 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 00:48:33.156190 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 00:48:33.156302 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 00:48:33.156390 Setting prompt string to 'Starting depthcharge on Helios...'
250 00:48:33.156455 Changing prompt to 'Starting depthcharge on Helios...'
251 00:48:33.156522 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 00:48:33.156768 [Enter `^Ec?' for help]
253 00:48:33.776559
254 00:48:33.776721
255 00:48:33.786623 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 00:48:33.789823 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 00:48:33.796465 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 00:48:33.799766 CPU: AES supported, TXT NOT supported, VT supported
259 00:48:33.806463 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 00:48:33.809939 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 00:48:33.816582 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 00:48:33.820061 VBOOT: Loading verstage.
263 00:48:33.823107 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 00:48:33.829905 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 00:48:33.833215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 00:48:33.836478 CBFS @ c08000 size 3f8000
267 00:48:33.843142 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 00:48:33.846270 CBFS: Locating 'fallback/verstage'
269 00:48:33.849702 CBFS: Found @ offset 10fb80 size 1072c
270 00:48:33.853257
271 00:48:33.853346
272 00:48:33.863023 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 00:48:33.877535 Probing TPM: . done!
274 00:48:33.880860 TPM ready after 0 ms
275 00:48:33.884075 Connected to device vid:did:rid of 1ae0:0028:00
276 00:48:33.894306 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 00:48:33.897598 Initialized TPM device CR50 revision 0
278 00:48:33.944824 tlcl_send_startup: Startup return code is 0
279 00:48:33.944964 TPM: setup succeeded
280 00:48:33.957775 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 00:48:33.961334 Chrome EC: UHEPI supported
282 00:48:33.964810 Phase 1
283 00:48:33.968264 FMAP: area GBB found @ c05000 (12288 bytes)
284 00:48:33.974614 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 00:48:33.978777 Phase 2
286 00:48:33.978859 Phase 3
287 00:48:33.981472 FMAP: area GBB found @ c05000 (12288 bytes)
288 00:48:33.988011 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 00:48:33.994611 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 00:48:33.998201 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 00:48:34.004663 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 00:48:34.020913 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 00:48:34.023892 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 00:48:34.030590 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 00:48:34.034352 Phase 4
296 00:48:34.037893 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 00:48:34.044482 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 00:48:34.224048 VB2:vb2_rsa_verify_digest() Digest check failed!
299 00:48:34.231012 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 00:48:34.231115 Saving nvdata
301 00:48:34.234033 Reboot requested (10020007)
302 00:48:34.237148 board_reset() called!
303 00:48:34.237232 full_reset() called!
304 00:48:38.744222
305 00:48:38.744804
306 00:48:38.753745 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 00:48:38.757520 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 00:48:38.764108 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 00:48:38.767109 CPU: AES supported, TXT NOT supported, VT supported
310 00:48:38.774342 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 00:48:38.777035 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 00:48:38.783867 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 00:48:38.787562 VBOOT: Loading verstage.
314 00:48:38.790167 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 00:48:38.797126 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 00:48:38.800381 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 00:48:38.803601 CBFS @ c08000 size 3f8000
318 00:48:38.810559 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 00:48:38.814044 CBFS: Locating 'fallback/verstage'
320 00:48:38.816821 CBFS: Found @ offset 10fb80 size 1072c
321 00:48:38.820927
322 00:48:38.821548
323 00:48:38.830607 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 00:48:38.844942 Probing TPM: . done!
325 00:48:38.848272 TPM ready after 0 ms
326 00:48:38.851487 Connected to device vid:did:rid of 1ae0:0028:00
327 00:48:38.861771 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 00:48:38.865522 Initialized TPM device CR50 revision 0
329 00:48:38.913586 tlcl_send_startup: Startup return code is 0
330 00:48:38.914182 TPM: setup succeeded
331 00:48:38.926350 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 00:48:38.929916 Chrome EC: UHEPI supported
333 00:48:38.933792 Phase 1
334 00:48:38.936512 FMAP: area GBB found @ c05000 (12288 bytes)
335 00:48:38.943147 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 00:48:38.950104 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 00:48:38.953926 Recovery requested (1009000e)
338 00:48:38.958802 Saving nvdata
339 00:48:38.965284 tlcl_extend: response is 0
340 00:48:38.973743 tlcl_extend: response is 0
341 00:48:38.980791 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 00:48:38.983888 CBFS @ c08000 size 3f8000
343 00:48:38.991120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 00:48:38.994389 CBFS: Locating 'fallback/romstage'
345 00:48:38.997672 CBFS: Found @ offset 80 size 145fc
346 00:48:39.000868 Accumulated console time in verstage 98 ms
347 00:48:39.001515
348 00:48:39.002018
349 00:48:39.014157 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 00:48:39.020487 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 00:48:39.024229 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 00:48:39.027299 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 00:48:39.033679 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 00:48:39.037211 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 00:48:39.040395 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 00:48:39.043485 TCO_STS: 0000 0000
357 00:48:39.047300 GEN_PMCON: e0015238 00000200
358 00:48:39.050306 GBLRST_CAUSE: 00000000 00000000
359 00:48:39.050900 prev_sleep_state 5
360 00:48:39.053373 Boot Count incremented to 62585
361 00:48:39.060715 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 00:48:39.063526 CBFS @ c08000 size 3f8000
363 00:48:39.070144 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 00:48:39.070646 CBFS: Locating 'fspm.bin'
365 00:48:39.073704 CBFS: Found @ offset 5ffc0 size 71000
366 00:48:39.077517 Chrome EC: UHEPI supported
367 00:48:39.085191 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 00:48:39.090393 Probing TPM: done!
369 00:48:39.097071 Connected to device vid:did:rid of 1ae0:0028:00
370 00:48:39.107257 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 00:48:39.112859 Initialized TPM device CR50 revision 0
372 00:48:39.122025 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 00:48:39.129002 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 00:48:39.132089 MRC cache found, size 1948
375 00:48:39.135198 bootmode is set to: 2
376 00:48:39.138337 PRMRR disabled by config.
377 00:48:39.138811 SPD INDEX = 1
378 00:48:39.145317 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 00:48:39.148571 CBFS @ c08000 size 3f8000
380 00:48:39.155316 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 00:48:39.155897 CBFS: Locating 'spd.bin'
382 00:48:39.158313 CBFS: Found @ offset 5fb80 size 400
383 00:48:39.162986 SPD: module type is LPDDR3
384 00:48:39.165208 SPD: module part is
385 00:48:39.172333 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 00:48:39.174916 SPD: device width 4 bits, bus width 8 bits
387 00:48:39.178062 SPD: module size is 4096 MB (per channel)
388 00:48:39.181677 memory slot: 0 configuration done.
389 00:48:39.184826 memory slot: 2 configuration done.
390 00:48:39.236871 CBMEM:
391 00:48:39.239514 IMD: root @ 99fff000 254 entries.
392 00:48:39.242982 IMD: root @ 99ffec00 62 entries.
393 00:48:39.246392 External stage cache:
394 00:48:39.250079 IMD: root @ 9abff000 254 entries.
395 00:48:39.253204 IMD: root @ 9abfec00 62 entries.
396 00:48:39.256374 Chrome EC: clear events_b mask to 0x0000000020004000
397 00:48:39.272864 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 00:48:39.285549 tlcl_write: response is 0
399 00:48:39.294366 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 00:48:39.301258 MRC: TPM MRC hash updated successfully.
401 00:48:39.301779 2 DIMMs found
402 00:48:39.304096 SMM Memory Map
403 00:48:39.307938 SMRAM : 0x9a000000 0x1000000
404 00:48:39.311211 Subregion 0: 0x9a000000 0xa00000
405 00:48:39.314290 Subregion 1: 0x9aa00000 0x200000
406 00:48:39.317978 Subregion 2: 0x9ac00000 0x400000
407 00:48:39.321024 top_of_ram = 0x9a000000
408 00:48:39.324507 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 00:48:39.331151 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 00:48:39.334387 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 00:48:39.341094 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 00:48:39.344660 CBFS @ c08000 size 3f8000
413 00:48:39.347233 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 00:48:39.351148 CBFS: Locating 'fallback/postcar'
415 00:48:39.357701 CBFS: Found @ offset 107000 size 4b44
416 00:48:39.360807 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 00:48:39.373734 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 00:48:39.377587 Processing 180 relocs. Offset value of 0x97c0c000
419 00:48:39.385166 Accumulated console time in romstage 286 ms
420 00:48:39.385816
421 00:48:39.386398
422 00:48:39.395323 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 00:48:39.401923 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 00:48:39.405038 CBFS @ c08000 size 3f8000
425 00:48:39.408666 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 00:48:39.414803 CBFS: Locating 'fallback/ramstage'
427 00:48:39.418158 CBFS: Found @ offset 43380 size 1b9e8
428 00:48:39.425039 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 00:48:39.456855 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 00:48:39.460390 Processing 3976 relocs. Offset value of 0x98db0000
431 00:48:39.466728 Accumulated console time in postcar 52 ms
432 00:48:39.467316
433 00:48:39.467700
434 00:48:39.476931 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 00:48:39.483361 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 00:48:39.487353 WARNING: RO_VPD is uninitialized or empty.
437 00:48:39.490143 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 00:48:39.496709 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 00:48:39.497296 Normal boot.
440 00:48:39.503559 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 00:48:39.506737 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 00:48:39.510368 CBFS @ c08000 size 3f8000
443 00:48:39.516613 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 00:48:39.520209 CBFS: Locating 'cpu_microcode_blob.bin'
445 00:48:39.523383 CBFS: Found @ offset 14700 size 2ec00
446 00:48:39.526914 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 00:48:39.529976 Skip microcode update
448 00:48:39.533207 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 00:48:39.536572 CBFS @ c08000 size 3f8000
450 00:48:39.543497 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 00:48:39.546669 CBFS: Locating 'fsps.bin'
452 00:48:39.549635 CBFS: Found @ offset d1fc0 size 35000
453 00:48:39.575211 Detected 4 core, 8 thread CPU.
454 00:48:39.578652 Setting up SMI for CPU
455 00:48:39.581707 IED base = 0x9ac00000
456 00:48:39.582288 IED size = 0x00400000
457 00:48:39.584653 Will perform SMM setup.
458 00:48:39.591582 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 00:48:39.598328 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 00:48:39.601581 Processing 16 relocs. Offset value of 0x00030000
461 00:48:39.604903 Attempting to start 7 APs
462 00:48:39.608506 Waiting for 10ms after sending INIT.
463 00:48:39.624596 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 00:48:39.625167 done.
465 00:48:39.628587 AP: slot 5 apic_id 4.
466 00:48:39.631565 AP: slot 4 apic_id 5.
467 00:48:39.632049 AP: slot 3 apic_id 3.
468 00:48:39.634465 AP: slot 1 apic_id 2.
469 00:48:39.637729 Waiting for 2nd SIPI to complete...done.
470 00:48:39.641898 AP: slot 6 apic_id 7.
471 00:48:39.644369 AP: slot 7 apic_id 6.
472 00:48:39.651243 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 00:48:39.657801 Processing 13 relocs. Offset value of 0x00038000
474 00:48:39.660827 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 00:48:39.667752 Installing SMM handler to 0x9a000000
476 00:48:39.674220 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 00:48:39.680813 Processing 658 relocs. Offset value of 0x9a010000
478 00:48:39.687924 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 00:48:39.690824 Processing 13 relocs. Offset value of 0x9a008000
480 00:48:39.697700 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 00:48:39.704585 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 00:48:39.707691 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 00:48:39.714206 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 00:48:39.720884 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 00:48:39.727802 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 00:48:39.730573 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 00:48:39.737162 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 00:48:39.740665 Clearing SMI status registers
489 00:48:39.744378 SMI_STS: PM1
490 00:48:39.744948 PM1_STS: PWRBTN
491 00:48:39.747211 TCO_STS: SECOND_TO
492 00:48:39.750966 New SMBASE 0x9a000000
493 00:48:39.753910 In relocation handler: CPU 0
494 00:48:39.757669 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 00:48:39.760571 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 00:48:39.764176 Relocation complete.
497 00:48:39.767902 New SMBASE 0x99fff800
498 00:48:39.768542 In relocation handler: CPU 2
499 00:48:39.773809 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 00:48:39.777099 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 00:48:39.781040 Relocation complete.
502 00:48:39.784420 New SMBASE 0x99ffe400
503 00:48:39.785004 In relocation handler: CPU 7
504 00:48:39.790864 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
505 00:48:39.794105 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 00:48:39.797425 Relocation complete.
507 00:48:39.798066 New SMBASE 0x99ffec00
508 00:48:39.800592 In relocation handler: CPU 5
509 00:48:39.807688 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
510 00:48:39.810280 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 00:48:39.814323 Relocation complete.
512 00:48:39.814900 New SMBASE 0x99fff000
513 00:48:39.816985 In relocation handler: CPU 4
514 00:48:39.824314 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
515 00:48:39.827067 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 00:48:39.830520 Relocation complete.
517 00:48:39.831097 New SMBASE 0x99ffe800
518 00:48:39.833435 In relocation handler: CPU 6
519 00:48:39.837139 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
520 00:48:39.843383 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 00:48:39.847290 Relocation complete.
522 00:48:39.847875 New SMBASE 0x99fff400
523 00:48:39.850041 In relocation handler: CPU 3
524 00:48:39.853552 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
525 00:48:39.860132 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 00:48:39.863787 Relocation complete.
527 00:48:39.864369 New SMBASE 0x99fffc00
528 00:48:39.866752 In relocation handler: CPU 1
529 00:48:39.870208 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
530 00:48:39.876877 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 00:48:39.877516 Relocation complete.
532 00:48:39.879949 Initializing CPU #0
533 00:48:39.883548 CPU: vendor Intel device 806ec
534 00:48:39.886796 CPU: family 06, model 8e, stepping 0c
535 00:48:39.890175 Clearing out pending MCEs
536 00:48:39.893145 Setting up local APIC...
537 00:48:39.893664 apic_id: 0x00 done.
538 00:48:39.896881 Turbo is available but hidden
539 00:48:39.900284 Turbo is available and visible
540 00:48:39.903369 VMX status: enabled
541 00:48:39.906958 IA32_FEATURE_CONTROL status: locked
542 00:48:39.910312 Skip microcode update
543 00:48:39.910794 CPU #0 initialized
544 00:48:39.913200 Initializing CPU #2
545 00:48:39.916351 Initializing CPU #3
546 00:48:39.916830 Initializing CPU #1
547 00:48:39.919801 CPU: vendor Intel device 806ec
548 00:48:39.923434 CPU: family 06, model 8e, stepping 0c
549 00:48:39.926336 CPU: vendor Intel device 806ec
550 00:48:39.929815 CPU: family 06, model 8e, stepping 0c
551 00:48:39.933153 Clearing out pending MCEs
552 00:48:39.936342 Clearing out pending MCEs
553 00:48:39.940328 Setting up local APIC...
554 00:48:39.942927 CPU: vendor Intel device 806ec
555 00:48:39.946677 CPU: family 06, model 8e, stepping 0c
556 00:48:39.949834 Clearing out pending MCEs
557 00:48:39.950272 Initializing CPU #5
558 00:48:39.952943 Initializing CPU #4
559 00:48:39.956659 CPU: vendor Intel device 806ec
560 00:48:39.959554 CPU: family 06, model 8e, stepping 0c
561 00:48:39.960093 apic_id: 0x02 done.
562 00:48:39.963187 Setting up local APIC...
563 00:48:39.966882 Setting up local APIC...
564 00:48:39.969931 Initializing CPU #7
565 00:48:39.970469 Initializing CPU #6
566 00:48:39.973031 CPU: vendor Intel device 806ec
567 00:48:39.975984 CPU: family 06, model 8e, stepping 0c
568 00:48:39.979639 CPU: vendor Intel device 806ec
569 00:48:39.983032 CPU: family 06, model 8e, stepping 0c
570 00:48:39.986244 Clearing out pending MCEs
571 00:48:39.989913 Clearing out pending MCEs
572 00:48:39.993349 Setting up local APIC...
573 00:48:39.993926 VMX status: enabled
574 00:48:39.996516 apic_id: 0x03 done.
575 00:48:40.000234 IA32_FEATURE_CONTROL status: locked
576 00:48:40.002966 VMX status: enabled
577 00:48:40.003502 Skip microcode update
578 00:48:40.006354 IA32_FEATURE_CONTROL status: locked
579 00:48:40.009641 CPU #1 initialized
580 00:48:40.013241 Skip microcode update
581 00:48:40.013837 apic_id: 0x06 done.
582 00:48:40.016774 Setting up local APIC...
583 00:48:40.019818 CPU: vendor Intel device 806ec
584 00:48:40.023210 CPU: family 06, model 8e, stepping 0c
585 00:48:40.026290 CPU #3 initialized
586 00:48:40.026767 VMX status: enabled
587 00:48:40.029701 apic_id: 0x07 done.
588 00:48:40.032880 IA32_FEATURE_CONTROL status: locked
589 00:48:40.036539 VMX status: enabled
590 00:48:40.037112 Skip microcode update
591 00:48:40.042948 IA32_FEATURE_CONTROL status: locked
592 00:48:40.043479 CPU #7 initialized
593 00:48:40.045904 Skip microcode update
594 00:48:40.046383 apic_id: 0x01 done.
595 00:48:40.049569 CPU #6 initialized
596 00:48:40.053162 VMX status: enabled
597 00:48:40.053850 Clearing out pending MCEs
598 00:48:40.056069 Clearing out pending MCEs
599 00:48:40.059221 Setting up local APIC...
600 00:48:40.063118 IA32_FEATURE_CONTROL status: locked
601 00:48:40.066485 apic_id: 0x05 done.
602 00:48:40.067065 Setting up local APIC...
603 00:48:40.069419 Skip microcode update
604 00:48:40.072473 VMX status: enabled
605 00:48:40.072991 apic_id: 0x04 done.
606 00:48:40.076546 IA32_FEATURE_CONTROL status: locked
607 00:48:40.078977 VMX status: enabled
608 00:48:40.082544 Skip microcode update
609 00:48:40.085846 IA32_FEATURE_CONTROL status: locked
610 00:48:40.086498 CPU #4 initialized
611 00:48:40.089047 Skip microcode update
612 00:48:40.093143 CPU #2 initialized
613 00:48:40.093780 CPU #5 initialized
614 00:48:40.099017 bsp_do_flight_plan done after 456 msecs.
615 00:48:40.099689 CPU: frequency set to 4200 MHz
616 00:48:40.102228 Enabling SMIs.
617 00:48:40.102817 Locking SMM.
618 00:48:40.118294 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 00:48:40.121787 CBFS @ c08000 size 3f8000
620 00:48:40.128622 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 00:48:40.129216 CBFS: Locating 'vbt.bin'
622 00:48:40.131852 CBFS: Found @ offset 5f5c0 size 499
623 00:48:40.138553 Found a VBT of 4608 bytes after decompression
624 00:48:40.323986 Display FSP Version Info HOB
625 00:48:40.327223 Reference Code - CPU = 9.0.1e.30
626 00:48:40.330590 uCode Version = 0.0.0.ca
627 00:48:40.333695 TXT ACM version = ff.ff.ff.ffff
628 00:48:40.337334 Display FSP Version Info HOB
629 00:48:40.340791 Reference Code - ME = 9.0.1e.30
630 00:48:40.344324 MEBx version = 0.0.0.0
631 00:48:40.346945 ME Firmware Version = Consumer SKU
632 00:48:40.350567 Display FSP Version Info HOB
633 00:48:40.353849 Reference Code - CML PCH = 9.0.1e.30
634 00:48:40.356991 PCH-CRID Status = Disabled
635 00:48:40.360566 PCH-CRID Original Value = ff.ff.ff.ffff
636 00:48:40.363786 PCH-CRID New Value = ff.ff.ff.ffff
637 00:48:40.366964 OPROM - RST - RAID = ff.ff.ff.ffff
638 00:48:40.370536 ChipsetInit Base Version = ff.ff.ff.ffff
639 00:48:40.373973 ChipsetInit Oem Version = ff.ff.ff.ffff
640 00:48:40.377346 Display FSP Version Info HOB
641 00:48:40.383304 Reference Code - SA - System Agent = 9.0.1e.30
642 00:48:40.386674 Reference Code - MRC = 0.7.1.6c
643 00:48:40.387151 SA - PCIe Version = 9.0.1e.30
644 00:48:40.390142 SA-CRID Status = Disabled
645 00:48:40.393230 SA-CRID Original Value = 0.0.0.c
646 00:48:40.396549 SA-CRID New Value = 0.0.0.c
647 00:48:40.399888 OPROM - VBIOS = ff.ff.ff.ffff
648 00:48:40.403522 RTC Init
649 00:48:40.406733 Set power on after power failure.
650 00:48:40.407232 Disabling Deep S3
651 00:48:40.409888 Disabling Deep S3
652 00:48:40.410384 Disabling Deep S4
653 00:48:40.413403 Disabling Deep S4
654 00:48:40.413941 Disabling Deep S5
655 00:48:40.416671 Disabling Deep S5
656 00:48:40.423542 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
657 00:48:40.424210 Enumerating buses...
658 00:48:40.430257 Show all devs... Before device enumeration.
659 00:48:40.430867 Root Device: enabled 1
660 00:48:40.433136 CPU_CLUSTER: 0: enabled 1
661 00:48:40.436659 DOMAIN: 0000: enabled 1
662 00:48:40.439768 APIC: 00: enabled 1
663 00:48:40.440280 PCI: 00:00.0: enabled 1
664 00:48:40.443386 PCI: 00:02.0: enabled 1
665 00:48:40.446986 PCI: 00:04.0: enabled 0
666 00:48:40.450065 PCI: 00:05.0: enabled 0
667 00:48:40.450651 PCI: 00:12.0: enabled 1
668 00:48:40.453006 PCI: 00:12.5: enabled 0
669 00:48:40.456775 PCI: 00:12.6: enabled 0
670 00:48:40.457369 PCI: 00:14.0: enabled 1
671 00:48:40.459674 PCI: 00:14.1: enabled 0
672 00:48:40.463033 PCI: 00:14.3: enabled 1
673 00:48:40.466478 PCI: 00:14.5: enabled 0
674 00:48:40.467071 PCI: 00:15.0: enabled 1
675 00:48:40.470119 PCI: 00:15.1: enabled 1
676 00:48:40.473375 PCI: 00:15.2: enabled 0
677 00:48:40.476272 PCI: 00:15.3: enabled 0
678 00:48:40.476863 PCI: 00:16.0: enabled 1
679 00:48:40.479697 PCI: 00:16.1: enabled 0
680 00:48:40.482924 PCI: 00:16.2: enabled 0
681 00:48:40.486837 PCI: 00:16.3: enabled 0
682 00:48:40.487476 PCI: 00:16.4: enabled 0
683 00:48:40.489716 PCI: 00:16.5: enabled 0
684 00:48:40.493339 PCI: 00:17.0: enabled 1
685 00:48:40.493961 PCI: 00:19.0: enabled 1
686 00:48:40.496283 PCI: 00:19.1: enabled 0
687 00:48:40.499681 PCI: 00:19.2: enabled 0
688 00:48:40.502709 PCI: 00:1a.0: enabled 0
689 00:48:40.503196 PCI: 00:1c.0: enabled 0
690 00:48:40.506500 PCI: 00:1c.1: enabled 0
691 00:48:40.509886 PCI: 00:1c.2: enabled 0
692 00:48:40.513305 PCI: 00:1c.3: enabled 0
693 00:48:40.513943 PCI: 00:1c.4: enabled 0
694 00:48:40.516124 PCI: 00:1c.5: enabled 0
695 00:48:40.520057 PCI: 00:1c.6: enabled 0
696 00:48:40.522614 PCI: 00:1c.7: enabled 0
697 00:48:40.523099 PCI: 00:1d.0: enabled 1
698 00:48:40.526329 PCI: 00:1d.1: enabled 0
699 00:48:40.529449 PCI: 00:1d.2: enabled 0
700 00:48:40.530059 PCI: 00:1d.3: enabled 0
701 00:48:40.532920 PCI: 00:1d.4: enabled 0
702 00:48:40.536069 PCI: 00:1d.5: enabled 1
703 00:48:40.539741 PCI: 00:1e.0: enabled 1
704 00:48:40.540226 PCI: 00:1e.1: enabled 0
705 00:48:40.542543 PCI: 00:1e.2: enabled 1
706 00:48:40.546085 PCI: 00:1e.3: enabled 1
707 00:48:40.549504 PCI: 00:1f.0: enabled 1
708 00:48:40.550116 PCI: 00:1f.1: enabled 1
709 00:48:40.552577 PCI: 00:1f.2: enabled 1
710 00:48:40.555595 PCI: 00:1f.3: enabled 1
711 00:48:40.559121 PCI: 00:1f.4: enabled 1
712 00:48:40.559690 PCI: 00:1f.5: enabled 1
713 00:48:40.562584 PCI: 00:1f.6: enabled 0
714 00:48:40.565552 USB0 port 0: enabled 1
715 00:48:40.566035 I2C: 00:15: enabled 1
716 00:48:40.569151 I2C: 00:5d: enabled 1
717 00:48:40.572716 GENERIC: 0.0: enabled 1
718 00:48:40.575589 I2C: 00:1a: enabled 1
719 00:48:40.576076 I2C: 00:38: enabled 1
720 00:48:40.579057 I2C: 00:39: enabled 1
721 00:48:40.582054 I2C: 00:3a: enabled 1
722 00:48:40.582579 I2C: 00:3b: enabled 1
723 00:48:40.585711 PCI: 00:00.0: enabled 1
724 00:48:40.588786 SPI: 00: enabled 1
725 00:48:40.589270 SPI: 01: enabled 1
726 00:48:40.592195 PNP: 0c09.0: enabled 1
727 00:48:40.595630 USB2 port 0: enabled 1
728 00:48:40.596114 USB2 port 1: enabled 1
729 00:48:40.599023 USB2 port 2: enabled 0
730 00:48:40.602301 USB2 port 3: enabled 0
731 00:48:40.602782 USB2 port 5: enabled 0
732 00:48:40.605843 USB2 port 6: enabled 1
733 00:48:40.608727 USB2 port 9: enabled 1
734 00:48:40.609208 USB3 port 0: enabled 1
735 00:48:40.612124 USB3 port 1: enabled 1
736 00:48:40.615899 USB3 port 2: enabled 1
737 00:48:40.618939 USB3 port 3: enabled 1
738 00:48:40.619420 USB3 port 4: enabled 0
739 00:48:40.622435 APIC: 02: enabled 1
740 00:48:40.623010 APIC: 01: enabled 1
741 00:48:40.626244 APIC: 03: enabled 1
742 00:48:40.629222 APIC: 05: enabled 1
743 00:48:40.629900 APIC: 04: enabled 1
744 00:48:40.632757 APIC: 07: enabled 1
745 00:48:40.635535 APIC: 06: enabled 1
746 00:48:40.636113 Compare with tree...
747 00:48:40.638934 Root Device: enabled 1
748 00:48:40.642430 CPU_CLUSTER: 0: enabled 1
749 00:48:40.643007 APIC: 00: enabled 1
750 00:48:40.646190 APIC: 02: enabled 1
751 00:48:40.649037 APIC: 01: enabled 1
752 00:48:40.649677 APIC: 03: enabled 1
753 00:48:40.652231 APIC: 05: enabled 1
754 00:48:40.655906 APIC: 04: enabled 1
755 00:48:40.656484 APIC: 07: enabled 1
756 00:48:40.659887 APIC: 06: enabled 1
757 00:48:40.662247 DOMAIN: 0000: enabled 1
758 00:48:40.665697 PCI: 00:00.0: enabled 1
759 00:48:40.666277 PCI: 00:02.0: enabled 1
760 00:48:40.668742 PCI: 00:04.0: enabled 0
761 00:48:40.672062 PCI: 00:05.0: enabled 0
762 00:48:40.675174 PCI: 00:12.0: enabled 1
763 00:48:40.678541 PCI: 00:12.5: enabled 0
764 00:48:40.679047 PCI: 00:12.6: enabled 0
765 00:48:40.681881 PCI: 00:14.0: enabled 1
766 00:48:40.685666 USB0 port 0: enabled 1
767 00:48:40.688600 USB2 port 0: enabled 1
768 00:48:40.691925 USB2 port 1: enabled 1
769 00:48:40.692408 USB2 port 2: enabled 0
770 00:48:40.695836 USB2 port 3: enabled 0
771 00:48:40.698531 USB2 port 5: enabled 0
772 00:48:40.701783 USB2 port 6: enabled 1
773 00:48:40.705138 USB2 port 9: enabled 1
774 00:48:40.708769 USB3 port 0: enabled 1
775 00:48:40.709248 USB3 port 1: enabled 1
776 00:48:40.711867 USB3 port 2: enabled 1
777 00:48:40.715082 USB3 port 3: enabled 1
778 00:48:40.718290 USB3 port 4: enabled 0
779 00:48:40.721457 PCI: 00:14.1: enabled 0
780 00:48:40.721974 PCI: 00:14.3: enabled 1
781 00:48:40.725076 PCI: 00:14.5: enabled 0
782 00:48:40.728452 PCI: 00:15.0: enabled 1
783 00:48:40.732304 I2C: 00:15: enabled 1
784 00:48:40.734999 PCI: 00:15.1: enabled 1
785 00:48:40.735575 I2C: 00:5d: enabled 1
786 00:48:40.738637 GENERIC: 0.0: enabled 1
787 00:48:40.741510 PCI: 00:15.2: enabled 0
788 00:48:40.745188 PCI: 00:15.3: enabled 0
789 00:48:40.748487 PCI: 00:16.0: enabled 1
790 00:48:40.749063 PCI: 00:16.1: enabled 0
791 00:48:40.752176 PCI: 00:16.2: enabled 0
792 00:48:40.755131 PCI: 00:16.3: enabled 0
793 00:48:40.758152 PCI: 00:16.4: enabled 0
794 00:48:40.761849 PCI: 00:16.5: enabled 0
795 00:48:40.762427 PCI: 00:17.0: enabled 1
796 00:48:40.765200 PCI: 00:19.0: enabled 1
797 00:48:40.768754 I2C: 00:1a: enabled 1
798 00:48:40.772158 I2C: 00:38: enabled 1
799 00:48:40.772740 I2C: 00:39: enabled 1
800 00:48:40.775041 I2C: 00:3a: enabled 1
801 00:48:40.778414 I2C: 00:3b: enabled 1
802 00:48:40.781853 PCI: 00:19.1: enabled 0
803 00:48:40.782332 PCI: 00:19.2: enabled 0
804 00:48:40.786196 PCI: 00:1a.0: enabled 0
805 00:48:40.788349 PCI: 00:1c.0: enabled 0
806 00:48:40.792631 PCI: 00:1c.1: enabled 0
807 00:48:40.795240 PCI: 00:1c.2: enabled 0
808 00:48:40.795819 PCI: 00:1c.3: enabled 0
809 00:48:40.797973 PCI: 00:1c.4: enabled 0
810 00:48:40.802051 PCI: 00:1c.5: enabled 0
811 00:48:40.805046 PCI: 00:1c.6: enabled 0
812 00:48:40.808177 PCI: 00:1c.7: enabled 0
813 00:48:40.808718 PCI: 00:1d.0: enabled 1
814 00:48:40.811722 PCI: 00:1d.1: enabled 0
815 00:48:40.814978 PCI: 00:1d.2: enabled 0
816 00:48:40.818087 PCI: 00:1d.3: enabled 0
817 00:48:40.821632 PCI: 00:1d.4: enabled 0
818 00:48:40.822208 PCI: 00:1d.5: enabled 1
819 00:48:40.824832 PCI: 00:00.0: enabled 1
820 00:48:40.828101 PCI: 00:1e.0: enabled 1
821 00:48:40.831492 PCI: 00:1e.1: enabled 0
822 00:48:40.834919 PCI: 00:1e.2: enabled 1
823 00:48:40.835510 SPI: 00: enabled 1
824 00:48:40.837964 PCI: 00:1e.3: enabled 1
825 00:48:40.841036 SPI: 01: enabled 1
826 00:48:40.844601 PCI: 00:1f.0: enabled 1
827 00:48:40.845170 PNP: 0c09.0: enabled 1
828 00:48:40.847554 PCI: 00:1f.1: enabled 1
829 00:48:40.851224 PCI: 00:1f.2: enabled 1
830 00:48:40.854509 PCI: 00:1f.3: enabled 1
831 00:48:40.855084 PCI: 00:1f.4: enabled 1
832 00:48:40.857742 PCI: 00:1f.5: enabled 1
833 00:48:40.861227 PCI: 00:1f.6: enabled 0
834 00:48:40.864525 Root Device scanning...
835 00:48:40.868129 scan_static_bus for Root Device
836 00:48:40.871190 CPU_CLUSTER: 0 enabled
837 00:48:40.871672 DOMAIN: 0000 enabled
838 00:48:40.874561 DOMAIN: 0000 scanning...
839 00:48:40.877783 PCI: pci_scan_bus for bus 00
840 00:48:40.881426 PCI: 00:00.0 [8086/0000] ops
841 00:48:40.884742 PCI: 00:00.0 [8086/9b61] enabled
842 00:48:40.887994 PCI: 00:02.0 [8086/0000] bus ops
843 00:48:40.891108 PCI: 00:02.0 [8086/9b41] enabled
844 00:48:40.895016 PCI: 00:04.0 [8086/1903] disabled
845 00:48:40.897923 PCI: 00:08.0 [8086/1911] enabled
846 00:48:40.901215 PCI: 00:12.0 [8086/02f9] enabled
847 00:48:40.904664 PCI: 00:14.0 [8086/0000] bus ops
848 00:48:40.907962 PCI: 00:14.0 [8086/02ed] enabled
849 00:48:40.911674 PCI: 00:14.2 [8086/02ef] enabled
850 00:48:40.914940 PCI: 00:14.3 [8086/02f0] enabled
851 00:48:40.918044 PCI: 00:15.0 [8086/0000] bus ops
852 00:48:40.921855 PCI: 00:15.0 [8086/02e8] enabled
853 00:48:40.924931 PCI: 00:15.1 [8086/0000] bus ops
854 00:48:40.928468 PCI: 00:15.1 [8086/02e9] enabled
855 00:48:40.931223 PCI: 00:16.0 [8086/0000] ops
856 00:48:40.934463 PCI: 00:16.0 [8086/02e0] enabled
857 00:48:40.937614 PCI: 00:17.0 [8086/0000] ops
858 00:48:40.940823 PCI: 00:17.0 [8086/02d3] enabled
859 00:48:40.945075 PCI: 00:19.0 [8086/0000] bus ops
860 00:48:40.947990 PCI: 00:19.0 [8086/02c5] enabled
861 00:48:40.951455 PCI: 00:1d.0 [8086/0000] bus ops
862 00:48:40.955081 PCI: 00:1d.0 [8086/02b0] enabled
863 00:48:40.957815 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 00:48:40.961094 PCI: 00:1e.0 [8086/0000] ops
865 00:48:40.964551 PCI: 00:1e.0 [8086/02a8] enabled
866 00:48:40.968022 PCI: 00:1e.2 [8086/0000] bus ops
867 00:48:40.972377 PCI: 00:1e.2 [8086/02aa] enabled
868 00:48:40.974337 PCI: 00:1e.3 [8086/0000] bus ops
869 00:48:40.977669 PCI: 00:1e.3 [8086/02ab] enabled
870 00:48:40.980880 PCI: 00:1f.0 [8086/0000] bus ops
871 00:48:40.984531 PCI: 00:1f.0 [8086/0284] enabled
872 00:48:40.990676 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 00:48:40.997818 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 00:48:41.000537 PCI: 00:1f.3 [8086/0000] bus ops
875 00:48:41.004167 PCI: 00:1f.3 [8086/02c8] enabled
876 00:48:41.007390 PCI: 00:1f.4 [8086/0000] bus ops
877 00:48:41.010901 PCI: 00:1f.4 [8086/02a3] enabled
878 00:48:41.014175 PCI: 00:1f.5 [8086/0000] bus ops
879 00:48:41.017720 PCI: 00:1f.5 [8086/02a4] enabled
880 00:48:41.020550 PCI: Leftover static devices:
881 00:48:41.021132 PCI: 00:05.0
882 00:48:41.021551 PCI: 00:12.5
883 00:48:41.023837 PCI: 00:12.6
884 00:48:41.024312 PCI: 00:14.1
885 00:48:41.027870 PCI: 00:14.5
886 00:48:41.028458 PCI: 00:15.2
887 00:48:41.028841 PCI: 00:15.3
888 00:48:41.030959 PCI: 00:16.1
889 00:48:41.031548 PCI: 00:16.2
890 00:48:41.034267 PCI: 00:16.3
891 00:48:41.034844 PCI: 00:16.4
892 00:48:41.035225 PCI: 00:16.5
893 00:48:41.037176 PCI: 00:19.1
894 00:48:41.037678 PCI: 00:19.2
895 00:48:41.040409 PCI: 00:1a.0
896 00:48:41.040879 PCI: 00:1c.0
897 00:48:41.043706 PCI: 00:1c.1
898 00:48:41.044210 PCI: 00:1c.2
899 00:48:41.044743 PCI: 00:1c.3
900 00:48:41.047076 PCI: 00:1c.4
901 00:48:41.047624 PCI: 00:1c.5
902 00:48:41.050699 PCI: 00:1c.6
903 00:48:41.051175 PCI: 00:1c.7
904 00:48:41.051554 PCI: 00:1d.1
905 00:48:41.053638 PCI: 00:1d.2
906 00:48:41.054116 PCI: 00:1d.3
907 00:48:41.057085 PCI: 00:1d.4
908 00:48:41.057699 PCI: 00:1d.5
909 00:48:41.060554 PCI: 00:1e.1
910 00:48:41.061136 PCI: 00:1f.1
911 00:48:41.061554 PCI: 00:1f.2
912 00:48:41.063868 PCI: 00:1f.6
913 00:48:41.066990 PCI: Check your devicetree.cb.
914 00:48:41.067596 PCI: 00:02.0 scanning...
915 00:48:41.074277 scan_generic_bus for PCI: 00:02.0
916 00:48:41.077219 scan_generic_bus for PCI: 00:02.0 done
917 00:48:41.080603 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
918 00:48:41.084327 PCI: 00:14.0 scanning...
919 00:48:41.087341 scan_static_bus for PCI: 00:14.0
920 00:48:41.090214 USB0 port 0 enabled
921 00:48:41.093831 USB0 port 0 scanning...
922 00:48:41.096770 scan_static_bus for USB0 port 0
923 00:48:41.097243 USB2 port 0 enabled
924 00:48:41.100317 USB2 port 1 enabled
925 00:48:41.104039 USB2 port 2 disabled
926 00:48:41.104615 USB2 port 3 disabled
927 00:48:41.107683 USB2 port 5 disabled
928 00:48:41.108273 USB2 port 6 enabled
929 00:48:41.110717 USB2 port 9 enabled
930 00:48:41.113390 USB3 port 0 enabled
931 00:48:41.113895 USB3 port 1 enabled
932 00:48:41.117595 USB3 port 2 enabled
933 00:48:41.118165 USB3 port 3 enabled
934 00:48:41.120495 USB3 port 4 disabled
935 00:48:41.123792 USB2 port 0 scanning...
936 00:48:41.127196 scan_static_bus for USB2 port 0
937 00:48:41.130371 scan_static_bus for USB2 port 0 done
938 00:48:41.137058 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
939 00:48:41.137686 USB2 port 1 scanning...
940 00:48:41.140039 scan_static_bus for USB2 port 1
941 00:48:41.146954 scan_static_bus for USB2 port 1 done
942 00:48:41.150026 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
943 00:48:41.153437 USB2 port 6 scanning...
944 00:48:41.156676 scan_static_bus for USB2 port 6
945 00:48:41.159981 scan_static_bus for USB2 port 6 done
946 00:48:41.166880 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
947 00:48:41.167466 USB2 port 9 scanning...
948 00:48:41.170132 scan_static_bus for USB2 port 9
949 00:48:41.176748 scan_static_bus for USB2 port 9 done
950 00:48:41.179724 scan_bus: scanning of bus USB2 port 9 took 9691 usecs
951 00:48:41.183671 USB3 port 0 scanning...
952 00:48:41.186587 scan_static_bus for USB3 port 0
953 00:48:41.189859 scan_static_bus for USB3 port 0 done
954 00:48:41.196786 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
955 00:48:41.197373 USB3 port 1 scanning...
956 00:48:41.199937 scan_static_bus for USB3 port 1
957 00:48:41.206764 scan_static_bus for USB3 port 1 done
958 00:48:41.210069 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
959 00:48:41.213357 USB3 port 2 scanning...
960 00:48:41.216899 scan_static_bus for USB3 port 2
961 00:48:41.220016 scan_static_bus for USB3 port 2 done
962 00:48:41.226659 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
963 00:48:41.227237 USB3 port 3 scanning...
964 00:48:41.230104 scan_static_bus for USB3 port 3
965 00:48:41.236906 scan_static_bus for USB3 port 3 done
966 00:48:41.240243 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
967 00:48:41.243397 scan_static_bus for USB0 port 0 done
968 00:48:41.249839 scan_bus: scanning of bus USB0 port 0 took 155333 usecs
969 00:48:41.253159 scan_static_bus for PCI: 00:14.0 done
970 00:48:41.259674 scan_bus: scanning of bus PCI: 00:14.0 took 172951 usecs
971 00:48:41.263092 PCI: 00:15.0 scanning...
972 00:48:41.266252 scan_generic_bus for PCI: 00:15.0
973 00:48:41.269518 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 00:48:41.272857 scan_generic_bus for PCI: 00:15.0 done
975 00:48:41.280113 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
976 00:48:41.283333 PCI: 00:15.1 scanning...
977 00:48:41.286404 scan_generic_bus for PCI: 00:15.1
978 00:48:41.290336 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 00:48:41.293096 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 00:48:41.296316 scan_generic_bus for PCI: 00:15.1 done
981 00:48:41.302900 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
982 00:48:41.306336 PCI: 00:19.0 scanning...
983 00:48:41.309695 scan_generic_bus for PCI: 00:19.0
984 00:48:41.313044 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 00:48:41.316467 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 00:48:41.322902 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 00:48:41.326169 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 00:48:41.329563 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 00:48:41.333389 scan_generic_bus for PCI: 00:19.0 done
990 00:48:41.339457 scan_bus: scanning of bus PCI: 00:19.0 took 30742 usecs
991 00:48:41.342810 PCI: 00:1d.0 scanning...
992 00:48:41.345862 do_pci_scan_bridge for PCI: 00:1d.0
993 00:48:41.349905 PCI: pci_scan_bus for bus 01
994 00:48:41.352965 PCI: 01:00.0 [1c5c/1327] enabled
995 00:48:41.356288 Enabling Common Clock Configuration
996 00:48:41.359957 L1 Sub-State supported from root port 29
997 00:48:41.362617 L1 Sub-State Support = 0xf
998 00:48:41.365898 CommonModeRestoreTime = 0x28
999 00:48:41.369376 Power On Value = 0x16, Power On Scale = 0x0
1000 00:48:41.373351 ASPM: Enabled L1
1001 00:48:41.376161 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1002 00:48:41.379376 PCI: 00:1e.2 scanning...
1003 00:48:41.382630 scan_generic_bus for PCI: 00:1e.2
1004 00:48:41.386126 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 00:48:41.392726 scan_generic_bus for PCI: 00:1e.2 done
1006 00:48:41.395925 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1007 00:48:41.399355 PCI: 00:1e.3 scanning...
1008 00:48:41.402761 scan_generic_bus for PCI: 00:1e.3
1009 00:48:41.406014 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 00:48:41.409095 scan_generic_bus for PCI: 00:1e.3 done
1011 00:48:41.416065 scan_bus: scanning of bus PCI: 00:1e.3 took 14017 usecs
1012 00:48:41.419157 PCI: 00:1f.0 scanning...
1013 00:48:41.423400 scan_static_bus for PCI: 00:1f.0
1014 00:48:41.425647 PNP: 0c09.0 enabled
1015 00:48:41.429366 scan_static_bus for PCI: 00:1f.0 done
1016 00:48:41.432471 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1017 00:48:41.436129 PCI: 00:1f.3 scanning...
1018 00:48:41.442472 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1019 00:48:41.445746 PCI: 00:1f.4 scanning...
1020 00:48:41.449941 scan_generic_bus for PCI: 00:1f.4
1021 00:48:41.452481 scan_generic_bus for PCI: 00:1f.4 done
1022 00:48:41.459531 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1023 00:48:41.460122 PCI: 00:1f.5 scanning...
1024 00:48:41.465837 scan_generic_bus for PCI: 00:1f.5
1025 00:48:41.469179 scan_generic_bus for PCI: 00:1f.5 done
1026 00:48:41.472319 scan_bus: scanning of bus PCI: 00:1f.5 took 10195 usecs
1027 00:48:41.478849 scan_bus: scanning of bus DOMAIN: 0000 took 605116 usecs
1028 00:48:41.482541 scan_static_bus for Root Device done
1029 00:48:41.488913 scan_bus: scanning of bus Root Device took 624983 usecs
1030 00:48:41.489391 done
1031 00:48:41.492165 Chrome EC: UHEPI supported
1032 00:48:41.499111 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 00:48:41.505792 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 00:48:41.512427 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 00:48:41.519317 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 00:48:41.522394 SPI flash protection: WPSW=0 SRP0=0
1037 00:48:41.525570 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 00:48:41.532190 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1039 00:48:41.535169 found VGA at PCI: 00:02.0
1040 00:48:41.538442 Setting up VGA for PCI: 00:02.0
1041 00:48:41.542091 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 00:48:41.548862 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 00:48:41.549649 Allocating resources...
1044 00:48:41.552310 Reading resources...
1045 00:48:41.555902 Root Device read_resources bus 0 link: 0
1046 00:48:41.562355 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 00:48:41.565268 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 00:48:41.571843 DOMAIN: 0000 read_resources bus 0 link: 0
1049 00:48:41.575608 PCI: 00:14.0 read_resources bus 0 link: 0
1050 00:48:41.581886 USB0 port 0 read_resources bus 0 link: 0
1051 00:48:41.588573 USB0 port 0 read_resources bus 0 link: 0 done
1052 00:48:41.591777 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 00:48:41.599052 PCI: 00:15.0 read_resources bus 1 link: 0
1054 00:48:41.602730 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 00:48:41.609161 PCI: 00:15.1 read_resources bus 2 link: 0
1056 00:48:41.612288 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 00:48:41.619716 PCI: 00:19.0 read_resources bus 3 link: 0
1058 00:48:41.627148 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 00:48:41.630071 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 00:48:41.636518 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 00:48:41.639992 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 00:48:41.646450 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 00:48:41.649683 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 00:48:41.656441 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 00:48:41.659798 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 00:48:41.666527 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 00:48:41.672848 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 00:48:41.676196 Root Device read_resources bus 0 link: 0 done
1069 00:48:41.680308 Done reading resources.
1070 00:48:41.686431 Show resources in subtree (Root Device)...After reading.
1071 00:48:41.689311 Root Device child on link 0 CPU_CLUSTER: 0
1072 00:48:41.693049 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 00:48:41.693719 APIC: 00
1074 00:48:41.696386 APIC: 02
1075 00:48:41.696949 APIC: 01
1076 00:48:41.699498 APIC: 03
1077 00:48:41.700081 APIC: 05
1078 00:48:41.700464 APIC: 04
1079 00:48:41.702844 APIC: 07
1080 00:48:41.703310 APIC: 06
1081 00:48:41.706321 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 00:48:41.716204 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 00:48:41.766045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 00:48:41.766698 PCI: 00:00.0
1085 00:48:41.767632 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 00:48:41.768150 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 00:48:41.768594 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 00:48:41.768953 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 00:48:41.774819 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 00:48:41.784972 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 00:48:41.794632 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 00:48:41.804592 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 00:48:41.811095 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 00:48:41.821552 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 00:48:41.830984 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 00:48:41.840762 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 00:48:41.850477 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 00:48:41.860751 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 00:48:41.870456 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 00:48:41.877344 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 00:48:41.880870 PCI: 00:02.0
1102 00:48:41.890396 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 00:48:41.900372 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 00:48:41.910060 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 00:48:41.910613 PCI: 00:04.0
1106 00:48:41.913464 PCI: 00:08.0
1107 00:48:41.923453 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 00:48:41.924008 PCI: 00:12.0
1109 00:48:41.933392 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 00:48:41.936840 PCI: 00:14.0 child on link 0 USB0 port 0
1111 00:48:41.946508 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 00:48:41.953502 USB0 port 0 child on link 0 USB2 port 0
1113 00:48:41.954081 USB2 port 0
1114 00:48:41.956708 USB2 port 1
1115 00:48:41.957272 USB2 port 2
1116 00:48:41.960232 USB2 port 3
1117 00:48:41.960796 USB2 port 5
1118 00:48:41.963238 USB2 port 6
1119 00:48:41.963807 USB2 port 9
1120 00:48:41.966735 USB3 port 0
1121 00:48:41.970227 USB3 port 1
1122 00:48:41.970797 USB3 port 2
1123 00:48:41.973531 USB3 port 3
1124 00:48:41.974099 USB3 port 4
1125 00:48:41.976722 PCI: 00:14.2
1126 00:48:41.986386 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 00:48:41.996839 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 00:48:41.997413 PCI: 00:14.3
1129 00:48:42.006370 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 00:48:42.009692 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 00:48:42.019910 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 00:48:42.022897 I2C: 01:15
1133 00:48:42.026075 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 00:48:42.036107 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 00:48:42.039233 I2C: 02:5d
1136 00:48:42.039797 GENERIC: 0.0
1137 00:48:42.042434 PCI: 00:16.0
1138 00:48:42.052791 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 00:48:42.053358 PCI: 00:17.0
1140 00:48:42.062640 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 00:48:42.072729 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 00:48:42.079230 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 00:48:42.089109 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 00:48:42.096080 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 00:48:42.105975 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 00:48:42.108919 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 00:48:42.118987 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 00:48:42.121997 I2C: 03:1a
1149 00:48:42.122466 I2C: 03:38
1150 00:48:42.125847 I2C: 03:39
1151 00:48:42.126420 I2C: 03:3a
1152 00:48:42.126795 I2C: 03:3b
1153 00:48:42.131898 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 00:48:42.138846 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 00:48:42.148703 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 00:48:42.158923 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 00:48:42.161717 PCI: 01:00.0
1158 00:48:42.172335 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 00:48:42.172916 PCI: 00:1e.0
1160 00:48:42.185320 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 00:48:42.195302 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 00:48:42.198828 PCI: 00:1e.2 child on link 0 SPI: 00
1163 00:48:42.208608 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 00:48:42.209191 SPI: 00
1165 00:48:42.211444 PCI: 00:1e.3 child on link 0 SPI: 01
1166 00:48:42.221578 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 00:48:42.224969 SPI: 01
1168 00:48:42.228738 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 00:48:42.238169 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 00:48:42.244573 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 00:48:42.248196 PNP: 0c09.0
1172 00:48:42.254387 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 00:48:42.258023 PCI: 00:1f.3
1174 00:48:42.267864 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 00:48:42.278061 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 00:48:42.281183 PCI: 00:1f.4
1177 00:48:42.288094 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 00:48:42.298116 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 00:48:42.301621 PCI: 00:1f.5
1180 00:48:42.307736 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 00:48:42.314646 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 00:48:42.320886 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 00:48:42.327570 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 00:48:42.331325 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 00:48:42.334782 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 00:48:42.340912 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 00:48:42.344237 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 00:48:42.351023 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 00:48:42.357218 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 00:48:42.363825 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 00:48:42.374501 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 00:48:42.381148 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 00:48:42.384043 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 00:48:42.390741 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 00:48:42.397301 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 00:48:42.400888 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 00:48:42.407959 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 00:48:42.410458 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 00:48:42.414118 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 00:48:42.420336 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 00:48:42.423994 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 00:48:42.430762 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 00:48:42.434264 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 00:48:42.440822 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 00:48:42.444124 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 00:48:42.450397 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 00:48:42.453924 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 00:48:42.460421 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 00:48:42.463535 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 00:48:42.469894 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 00:48:42.473311 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 00:48:42.479946 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 00:48:42.483245 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 00:48:42.486588 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 00:48:42.493693 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 00:48:42.496636 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 00:48:42.503603 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 00:48:42.510034 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 00:48:42.513287 avoid_fixed_resources: DOMAIN: 0000
1220 00:48:42.520480 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 00:48:42.527007 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 00:48:42.534063 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 00:48:42.543136 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 00:48:42.550394 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 00:48:42.556653 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 00:48:42.566377 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 00:48:42.572968 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 00:48:42.579687 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 00:48:42.589585 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 00:48:42.595887 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 00:48:42.602632 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 00:48:42.606118 Setting resources...
1233 00:48:42.612655 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 00:48:42.616072 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 00:48:42.619836 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 00:48:42.622595 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 00:48:42.626214 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 00:48:42.632519 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 00:48:42.639490 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 00:48:42.645622 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 00:48:42.653015 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 00:48:42.658897 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 00:48:42.662096 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 00:48:42.669295 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 00:48:42.672883 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 00:48:42.678877 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 00:48:42.682168 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 00:48:42.688500 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 00:48:42.692454 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 00:48:42.698686 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 00:48:42.702342 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 00:48:42.709317 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 00:48:42.712406 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 00:48:42.718856 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 00:48:42.722173 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 00:48:42.725993 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 00:48:42.732306 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 00:48:42.735320 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 00:48:42.742388 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 00:48:42.745747 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 00:48:42.752538 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 00:48:42.755828 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 00:48:42.762230 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 00:48:42.765060 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 00:48:42.772176 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 00:48:42.782295 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 00:48:42.788508 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 00:48:42.795029 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 00:48:42.798588 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 00:48:42.808156 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 00:48:42.811640 Root Device assign_resources, bus 0 link: 0
1272 00:48:42.814875 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 00:48:42.825545 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 00:48:42.832267 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 00:48:42.842312 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 00:48:42.849096 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 00:48:42.859647 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 00:48:42.865642 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 00:48:42.872171 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 00:48:42.875370 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 00:48:42.881925 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 00:48:42.892050 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 00:48:42.898583 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 00:48:42.908659 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 00:48:42.911813 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 00:48:42.918408 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 00:48:42.924921 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 00:48:42.931864 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 00:48:42.935149 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 00:48:42.942414 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 00:48:42.952696 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 00:48:42.959088 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 00:48:42.965314 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 00:48:42.975062 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 00:48:42.982157 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 00:48:42.988262 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 00:48:42.998645 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 00:48:43.002228 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 00:48:43.008739 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 00:48:43.015611 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 00:48:43.024846 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 00:48:43.034867 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 00:48:43.039082 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 00:48:43.044928 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 00:48:43.051219 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 00:48:43.057928 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 00:48:43.068184 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 00:48:43.071401 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 00:48:43.078073 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 00:48:43.084613 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 00:48:43.087718 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 00:48:43.094923 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 00:48:43.097737 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 00:48:43.104669 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 00:48:43.107996 LPC: Trying to open IO window from 800 size 1ff
1316 00:48:43.117948 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 00:48:43.125132 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 00:48:43.134874 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 00:48:43.141312 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 00:48:43.147716 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 00:48:43.150964 Root Device assign_resources, bus 0 link: 0
1322 00:48:43.154908 Done setting resources.
1323 00:48:43.160819 Show resources in subtree (Root Device)...After assigning values.
1324 00:48:43.164340 Root Device child on link 0 CPU_CLUSTER: 0
1325 00:48:43.167744 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 00:48:43.170960 APIC: 00
1327 00:48:43.171413 APIC: 02
1328 00:48:43.171771 APIC: 01
1329 00:48:43.174349 APIC: 03
1330 00:48:43.174803 APIC: 05
1331 00:48:43.177555 APIC: 04
1332 00:48:43.178080 APIC: 07
1333 00:48:43.178441 APIC: 06
1334 00:48:43.184157 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 00:48:43.194162 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 00:48:43.204028 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 00:48:43.204644 PCI: 00:00.0
1338 00:48:43.213920 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 00:48:43.223794 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 00:48:43.233604 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 00:48:43.243725 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 00:48:43.253833 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 00:48:43.263627 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 00:48:43.270248 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 00:48:43.279729 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 00:48:43.289765 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 00:48:43.299818 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 00:48:43.309777 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 00:48:43.316669 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 00:48:43.326426 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 00:48:43.336371 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 00:48:43.345693 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 00:48:43.355724 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 00:48:43.356330 PCI: 00:02.0
1355 00:48:43.368981 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 00:48:43.379152 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 00:48:43.388978 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 00:48:43.389719 PCI: 00:04.0
1359 00:48:43.392022 PCI: 00:08.0
1360 00:48:43.401993 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 00:48:43.402536 PCI: 00:12.0
1362 00:48:43.412370 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 00:48:43.418824 PCI: 00:14.0 child on link 0 USB0 port 0
1364 00:48:43.428507 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 00:48:43.431983 USB0 port 0 child on link 0 USB2 port 0
1366 00:48:43.434941 USB2 port 0
1367 00:48:43.435523 USB2 port 1
1368 00:48:43.438528 USB2 port 2
1369 00:48:43.439106 USB2 port 3
1370 00:48:43.442152 USB2 port 5
1371 00:48:43.442722 USB2 port 6
1372 00:48:43.444874 USB2 port 9
1373 00:48:43.445441 USB3 port 0
1374 00:48:43.448279 USB3 port 1
1375 00:48:43.451647 USB3 port 2
1376 00:48:43.452217 USB3 port 3
1377 00:48:43.454691 USB3 port 4
1378 00:48:43.455239 PCI: 00:14.2
1379 00:48:43.464855 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 00:48:43.475289 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 00:48:43.478095 PCI: 00:14.3
1382 00:48:43.488165 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 00:48:43.491051 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 00:48:43.501157 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 00:48:43.504793 I2C: 01:15
1386 00:48:43.507938 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 00:48:43.518568 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 00:48:43.520983 I2C: 02:5d
1389 00:48:43.521606 GENERIC: 0.0
1390 00:48:43.524696 PCI: 00:16.0
1391 00:48:43.534401 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 00:48:43.534983 PCI: 00:17.0
1393 00:48:43.547351 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 00:48:43.557329 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 00:48:43.563676 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 00:48:43.574140 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 00:48:43.583846 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 00:48:43.593451 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 00:48:43.596575 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 00:48:43.607037 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 00:48:43.609965 I2C: 03:1a
1402 00:48:43.610557 I2C: 03:38
1403 00:48:43.613348 I2C: 03:39
1404 00:48:43.613863 I2C: 03:3a
1405 00:48:43.616792 I2C: 03:3b
1406 00:48:43.620484 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 00:48:43.629902 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 00:48:43.639846 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 00:48:43.650317 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 00:48:43.652812 PCI: 01:00.0
1411 00:48:43.663298 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 00:48:43.663872 PCI: 00:1e.0
1413 00:48:43.675811 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 00:48:43.685983 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 00:48:43.689286 PCI: 00:1e.2 child on link 0 SPI: 00
1416 00:48:43.699286 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 00:48:43.699861 SPI: 00
1418 00:48:43.706073 PCI: 00:1e.3 child on link 0 SPI: 01
1419 00:48:43.715454 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 00:48:43.716004 SPI: 01
1421 00:48:43.719041 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 00:48:43.729615 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 00:48:43.738646 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 00:48:43.739189 PNP: 0c09.0
1425 00:48:43.748922 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 00:48:43.749615 PCI: 00:1f.3
1427 00:48:43.761771 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 00:48:43.772091 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 00:48:43.772794 PCI: 00:1f.4
1430 00:48:43.782064 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 00:48:43.791425 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 00:48:43.794709 PCI: 00:1f.5
1433 00:48:43.804663 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 00:48:43.808478 Done allocating resources.
1435 00:48:43.811436 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 00:48:43.815502 Enabling resources...
1437 00:48:43.818279 PCI: 00:00.0 subsystem <- 8086/9b61
1438 00:48:43.821362 PCI: 00:00.0 cmd <- 06
1439 00:48:43.825076 PCI: 00:02.0 subsystem <- 8086/9b41
1440 00:48:43.828062 PCI: 00:02.0 cmd <- 03
1441 00:48:43.831901 PCI: 00:08.0 cmd <- 06
1442 00:48:43.834517 PCI: 00:12.0 subsystem <- 8086/02f9
1443 00:48:43.837919 PCI: 00:12.0 cmd <- 02
1444 00:48:43.841431 PCI: 00:14.0 subsystem <- 8086/02ed
1445 00:48:43.844613 PCI: 00:14.0 cmd <- 02
1446 00:48:43.845185 PCI: 00:14.2 cmd <- 02
1447 00:48:43.850992 PCI: 00:14.3 subsystem <- 8086/02f0
1448 00:48:43.851565 PCI: 00:14.3 cmd <- 02
1449 00:48:43.855020 PCI: 00:15.0 subsystem <- 8086/02e8
1450 00:48:43.857736 PCI: 00:15.0 cmd <- 02
1451 00:48:43.861251 PCI: 00:15.1 subsystem <- 8086/02e9
1452 00:48:43.864512 PCI: 00:15.1 cmd <- 02
1453 00:48:43.868065 PCI: 00:16.0 subsystem <- 8086/02e0
1454 00:48:43.871262 PCI: 00:16.0 cmd <- 02
1455 00:48:43.875153 PCI: 00:17.0 subsystem <- 8086/02d3
1456 00:48:43.878162 PCI: 00:17.0 cmd <- 03
1457 00:48:43.880940 PCI: 00:19.0 subsystem <- 8086/02c5
1458 00:48:43.884536 PCI: 00:19.0 cmd <- 02
1459 00:48:43.887356 PCI: 00:1d.0 bridge ctrl <- 0013
1460 00:48:43.890670 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 00:48:43.894404 PCI: 00:1d.0 cmd <- 06
1462 00:48:43.897543 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 00:48:43.898063 PCI: 00:1e.0 cmd <- 06
1464 00:48:43.904374 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 00:48:43.904984 PCI: 00:1e.2 cmd <- 06
1466 00:48:43.907755 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 00:48:43.911334 PCI: 00:1e.3 cmd <- 02
1468 00:48:43.914342 PCI: 00:1f.0 subsystem <- 8086/0284
1469 00:48:43.917430 PCI: 00:1f.0 cmd <- 407
1470 00:48:43.920601 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 00:48:43.924750 PCI: 00:1f.3 cmd <- 02
1472 00:48:43.927794 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 00:48:43.931380 PCI: 00:1f.4 cmd <- 03
1474 00:48:43.934416 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 00:48:43.937519 PCI: 00:1f.5 cmd <- 406
1476 00:48:43.945694 PCI: 01:00.0 cmd <- 02
1477 00:48:43.951030 done.
1478 00:48:43.963815 ME: Version: 14.0.39.1367
1479 00:48:43.970001 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1480 00:48:43.973418 Initializing devices...
1481 00:48:43.973935 Root Device init ...
1482 00:48:43.979811 Chrome EC: Set SMI mask to 0x0000000000000000
1483 00:48:43.983061 Chrome EC: clear events_b mask to 0x0000000000000000
1484 00:48:43.990246 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 00:48:43.996307 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 00:48:44.002794 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 00:48:44.006077 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 00:48:44.009431 Root Device init finished in 35165 usecs
1489 00:48:44.013392 CPU_CLUSTER: 0 init ...
1490 00:48:44.020215 CPU_CLUSTER: 0 init finished in 2446 usecs
1491 00:48:44.023798 PCI: 00:00.0 init ...
1492 00:48:44.027264 CPU TDP: 15 Watts
1493 00:48:44.030586 CPU PL2 = 64 Watts
1494 00:48:44.033588 PCI: 00:00.0 init finished in 7082 usecs
1495 00:48:44.037035 PCI: 00:02.0 init ...
1496 00:48:44.040268 PCI: 00:02.0 init finished in 2244 usecs
1497 00:48:44.043766 PCI: 00:08.0 init ...
1498 00:48:44.046781 PCI: 00:08.0 init finished in 2252 usecs
1499 00:48:44.050343 PCI: 00:12.0 init ...
1500 00:48:44.053563 PCI: 00:12.0 init finished in 2252 usecs
1501 00:48:44.056766 PCI: 00:14.0 init ...
1502 00:48:44.060054 PCI: 00:14.0 init finished in 2252 usecs
1503 00:48:44.063084 PCI: 00:14.2 init ...
1504 00:48:44.066641 PCI: 00:14.2 init finished in 2253 usecs
1505 00:48:44.070225 PCI: 00:14.3 init ...
1506 00:48:44.073846 PCI: 00:14.3 init finished in 2261 usecs
1507 00:48:44.076642 PCI: 00:15.0 init ...
1508 00:48:44.080369 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 00:48:44.083209 PCI: 00:15.0 init finished in 5976 usecs
1510 00:48:44.086797 PCI: 00:15.1 init ...
1511 00:48:44.090198 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 00:48:44.096460 PCI: 00:15.1 init finished in 5969 usecs
1513 00:48:44.097133 PCI: 00:16.0 init ...
1514 00:48:44.103457 PCI: 00:16.0 init finished in 2244 usecs
1515 00:48:44.106646 PCI: 00:19.0 init ...
1516 00:48:44.109604 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 00:48:44.112949 PCI: 00:19.0 init finished in 5977 usecs
1518 00:48:44.116388 PCI: 00:1d.0 init ...
1519 00:48:44.120008 Initializing PCH PCIe bridge.
1520 00:48:44.122732 PCI: 00:1d.0 init finished in 5275 usecs
1521 00:48:44.126056 PCI: 00:1f.0 init ...
1522 00:48:44.129442 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 00:48:44.136369 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 00:48:44.136941 IOAPIC: ID = 0x02
1525 00:48:44.139299 IOAPIC: Dumping registers
1526 00:48:44.142774 reg 0x0000: 0x02000000
1527 00:48:44.146617 reg 0x0001: 0x00770020
1528 00:48:44.147108 reg 0x0002: 0x00000000
1529 00:48:44.152866 PCI: 00:1f.0 init finished in 23533 usecs
1530 00:48:44.155964 PCI: 00:1f.4 init ...
1531 00:48:44.159392 PCI: 00:1f.4 init finished in 2263 usecs
1532 00:48:44.169855 PCI: 01:00.0 init ...
1533 00:48:44.173229 PCI: 01:00.0 init finished in 2251 usecs
1534 00:48:44.177465 PNP: 0c09.0 init ...
1535 00:48:44.180753 Google Chrome EC uptime: 11.098 seconds
1536 00:48:44.187426 Google Chrome AP resets since EC boot: 0
1537 00:48:44.190773 Google Chrome most recent AP reset causes:
1538 00:48:44.197221 Google Chrome EC reset flags at last EC boot: reset-pin
1539 00:48:44.200742 PNP: 0c09.0 init finished in 20567 usecs
1540 00:48:44.203985 Devices initialized
1541 00:48:44.204449 Show all devs... After init.
1542 00:48:44.207549 Root Device: enabled 1
1543 00:48:44.210547 CPU_CLUSTER: 0: enabled 1
1544 00:48:44.213841 DOMAIN: 0000: enabled 1
1545 00:48:44.214321 APIC: 00: enabled 1
1546 00:48:44.217071 PCI: 00:00.0: enabled 1
1547 00:48:44.220414 PCI: 00:02.0: enabled 1
1548 00:48:44.224179 PCI: 00:04.0: enabled 0
1549 00:48:44.224669 PCI: 00:05.0: enabled 0
1550 00:48:44.227150 PCI: 00:12.0: enabled 1
1551 00:48:44.230718 PCI: 00:12.5: enabled 0
1552 00:48:44.231256 PCI: 00:12.6: enabled 0
1553 00:48:44.234003 PCI: 00:14.0: enabled 1
1554 00:48:44.237094 PCI: 00:14.1: enabled 0
1555 00:48:44.240384 PCI: 00:14.3: enabled 1
1556 00:48:44.241043 PCI: 00:14.5: enabled 0
1557 00:48:44.243994 PCI: 00:15.0: enabled 1
1558 00:48:44.247053 PCI: 00:15.1: enabled 1
1559 00:48:44.250297 PCI: 00:15.2: enabled 0
1560 00:48:44.250814 PCI: 00:15.3: enabled 0
1561 00:48:44.253406 PCI: 00:16.0: enabled 1
1562 00:48:44.256901 PCI: 00:16.1: enabled 0
1563 00:48:44.260031 PCI: 00:16.2: enabled 0
1564 00:48:44.260544 PCI: 00:16.3: enabled 0
1565 00:48:44.264541 PCI: 00:16.4: enabled 0
1566 00:48:44.267234 PCI: 00:16.5: enabled 0
1567 00:48:44.269939 PCI: 00:17.0: enabled 1
1568 00:48:44.270447 PCI: 00:19.0: enabled 1
1569 00:48:44.273462 PCI: 00:19.1: enabled 0
1570 00:48:44.277121 PCI: 00:19.2: enabled 0
1571 00:48:44.277674 PCI: 00:1a.0: enabled 0
1572 00:48:44.280407 PCI: 00:1c.0: enabled 0
1573 00:48:44.283268 PCI: 00:1c.1: enabled 0
1574 00:48:44.286526 PCI: 00:1c.2: enabled 0
1575 00:48:44.287018 PCI: 00:1c.3: enabled 0
1576 00:48:44.290190 PCI: 00:1c.4: enabled 0
1577 00:48:44.293540 PCI: 00:1c.5: enabled 0
1578 00:48:44.296659 PCI: 00:1c.6: enabled 0
1579 00:48:44.297237 PCI: 00:1c.7: enabled 0
1580 00:48:44.299927 PCI: 00:1d.0: enabled 1
1581 00:48:44.303750 PCI: 00:1d.1: enabled 0
1582 00:48:44.306512 PCI: 00:1d.2: enabled 0
1583 00:48:44.307182 PCI: 00:1d.3: enabled 0
1584 00:48:44.309865 PCI: 00:1d.4: enabled 0
1585 00:48:44.313310 PCI: 00:1d.5: enabled 0
1586 00:48:44.313826 PCI: 00:1e.0: enabled 1
1587 00:48:44.316371 PCI: 00:1e.1: enabled 0
1588 00:48:44.319958 PCI: 00:1e.2: enabled 1
1589 00:48:44.323091 PCI: 00:1e.3: enabled 1
1590 00:48:44.323586 PCI: 00:1f.0: enabled 1
1591 00:48:44.326771 PCI: 00:1f.1: enabled 0
1592 00:48:44.329680 PCI: 00:1f.2: enabled 0
1593 00:48:44.332714 PCI: 00:1f.3: enabled 1
1594 00:48:44.333182 PCI: 00:1f.4: enabled 1
1595 00:48:44.336646 PCI: 00:1f.5: enabled 1
1596 00:48:44.339664 PCI: 00:1f.6: enabled 0
1597 00:48:44.343135 USB0 port 0: enabled 1
1598 00:48:44.343758 I2C: 01:15: enabled 1
1599 00:48:44.346499 I2C: 02:5d: enabled 1
1600 00:48:44.349913 GENERIC: 0.0: enabled 1
1601 00:48:44.350490 I2C: 03:1a: enabled 1
1602 00:48:44.352915 I2C: 03:38: enabled 1
1603 00:48:44.356447 I2C: 03:39: enabled 1
1604 00:48:44.357216 I2C: 03:3a: enabled 1
1605 00:48:44.359435 I2C: 03:3b: enabled 1
1606 00:48:44.362800 PCI: 00:00.0: enabled 1
1607 00:48:44.363393 SPI: 00: enabled 1
1608 00:48:44.365915 SPI: 01: enabled 1
1609 00:48:44.369412 PNP: 0c09.0: enabled 1
1610 00:48:44.369926 USB2 port 0: enabled 1
1611 00:48:44.372797 USB2 port 1: enabled 1
1612 00:48:44.376174 USB2 port 2: enabled 0
1613 00:48:44.376608 USB2 port 3: enabled 0
1614 00:48:44.379815 USB2 port 5: enabled 0
1615 00:48:44.383038 USB2 port 6: enabled 1
1616 00:48:44.385866 USB2 port 9: enabled 1
1617 00:48:44.386335 USB3 port 0: enabled 1
1618 00:48:44.389283 USB3 port 1: enabled 1
1619 00:48:44.393015 USB3 port 2: enabled 1
1620 00:48:44.393625 USB3 port 3: enabled 1
1621 00:48:44.396231 USB3 port 4: enabled 0
1622 00:48:44.399250 APIC: 02: enabled 1
1623 00:48:44.399739 APIC: 01: enabled 1
1624 00:48:44.402346 APIC: 03: enabled 1
1625 00:48:44.405792 APIC: 05: enabled 1
1626 00:48:44.406256 APIC: 04: enabled 1
1627 00:48:44.409179 APIC: 07: enabled 1
1628 00:48:44.409988 APIC: 06: enabled 1
1629 00:48:44.412196 PCI: 00:08.0: enabled 1
1630 00:48:44.416088 PCI: 00:14.2: enabled 1
1631 00:48:44.419234 PCI: 01:00.0: enabled 1
1632 00:48:44.422821 Disabling ACPI via APMC:
1633 00:48:44.423388 done.
1634 00:48:44.429652 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 00:48:44.432779 ELOG: NV offset 0xaf0000 size 0x4000
1636 00:48:44.439076 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 00:48:44.445818 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:44 UTC
1638 00:48:44.452598 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:44 UTC
1639 00:48:44.459015 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:44 UTC
1640 00:48:44.465581 ELOG: Event(9A) added with size 9 at 2023-05-23 00:48:44 UTC
1641 00:48:44.472868 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:44 UTC
1642 00:48:44.479152 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:44 UTC
1643 00:48:44.482447 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 00:48:44.489813 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:44 UTC
1645 00:48:44.499706 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 00:48:44.506065 ELOG: Event(A0) added with size 9 at 2023-05-23 00:48:44 UTC
1647 00:48:44.509091 elog_add_boot_reason: Logged dev mode boot
1648 00:48:44.513042 Finalize devices...
1649 00:48:44.513790 PCI: 00:17.0 final
1650 00:48:44.515810 Devices finalized
1651 00:48:44.519004 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 00:48:44.525949 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 00:48:44.529084 ME: HFSTS1 : 0x90000245
1654 00:48:44.532383 ME: HFSTS2 : 0x3B850126
1655 00:48:44.539186 ME: HFSTS3 : 0x00000020
1656 00:48:44.542147 ME: HFSTS4 : 0x00004800
1657 00:48:44.545506 ME: HFSTS5 : 0x00000000
1658 00:48:44.548741 ME: HFSTS6 : 0x40400006
1659 00:48:44.552285 ME: Manufacturing Mode : NO
1660 00:48:44.555917 ME: FW Partition Table : OK
1661 00:48:44.558583 ME: Bringup Loader Failure : NO
1662 00:48:44.561674 ME: Firmware Init Complete : YES
1663 00:48:44.565400 ME: Boot Options Present : NO
1664 00:48:44.568443 ME: Update In Progress : NO
1665 00:48:44.572154 ME: D0i3 Support : YES
1666 00:48:44.575695 ME: Low Power State Enabled : NO
1667 00:48:44.578600 ME: CPU Replaced : NO
1668 00:48:44.581848 ME: CPU Replacement Valid : YES
1669 00:48:44.585372 ME: Current Working State : 5
1670 00:48:44.588661 ME: Current Operation State : 1
1671 00:48:44.592208 ME: Current Operation Mode : 0
1672 00:48:44.594947 ME: Error Code : 0
1673 00:48:44.598474 ME: CPU Debug Disabled : YES
1674 00:48:44.601579 ME: TXT Support : NO
1675 00:48:44.609088 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 00:48:44.615370 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 00:48:44.615939 CBFS @ c08000 size 3f8000
1678 00:48:44.621726 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 00:48:44.625269 CBFS: Locating 'fallback/dsdt.aml'
1680 00:48:44.628158 CBFS: Found @ offset 10bb80 size 3fa5
1681 00:48:44.635256 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 00:48:44.638114 CBFS @ c08000 size 3f8000
1683 00:48:44.644965 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 00:48:44.645595 CBFS: Locating 'fallback/slic'
1685 00:48:44.650084 CBFS: 'fallback/slic' not found.
1686 00:48:44.656832 ACPI: Writing ACPI tables at 99b3e000.
1687 00:48:44.657319 ACPI: * FACS
1688 00:48:44.659841 ACPI: * DSDT
1689 00:48:44.663337 Ramoops buffer: 0x100000@0x99a3d000.
1690 00:48:44.666690 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 00:48:44.673618 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 00:48:44.676250 Google Chrome EC: version:
1693 00:48:44.679671 ro: helios_v2.0.2659-56403530b
1694 00:48:44.683478 rw: helios_v2.0.2849-c41de27e7d
1695 00:48:44.684009 running image: 1
1696 00:48:44.687922 ACPI: * FADT
1697 00:48:44.688630 SCI is IRQ9
1698 00:48:44.693961 ACPI: added table 1/32, length now 40
1699 00:48:44.694388 ACPI: * SSDT
1700 00:48:44.697411 Found 1 CPU(s) with 8 core(s) each.
1701 00:48:44.700807 Error: Could not locate 'wifi_sar' in VPD.
1702 00:48:44.707562 Checking CBFS for default SAR values
1703 00:48:44.710626 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 00:48:44.714101 CBFS @ c08000 size 3f8000
1705 00:48:44.720364 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 00:48:44.724510 CBFS: Locating 'wifi_sar_defaults.hex'
1707 00:48:44.727635 CBFS: Found @ offset 5fac0 size 77
1708 00:48:44.730375 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 00:48:44.737284 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 00:48:44.740719 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 00:48:44.747024 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 00:48:44.750574 failed to find key in VPD: dsm_calib_r0_0
1713 00:48:44.760056 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 00:48:44.763646 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 00:48:44.766864 failed to find key in VPD: dsm_calib_r0_1
1716 00:48:44.776895 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 00:48:44.783731 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 00:48:44.786317 failed to find key in VPD: dsm_calib_r0_2
1719 00:48:44.796263 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 00:48:44.800280 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 00:48:44.806821 failed to find key in VPD: dsm_calib_r0_3
1722 00:48:44.813355 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 00:48:44.820249 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 00:48:44.823239 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 00:48:44.826203 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 00:48:44.830085 EC returned error result code 1
1727 00:48:44.834030 EC returned error result code 1
1728 00:48:44.837667 EC returned error result code 1
1729 00:48:44.844376 PS2K: Bad resp from EC. Vivaldi disabled!
1730 00:48:44.848021 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 00:48:44.854223 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 00:48:44.861111 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 00:48:44.864163 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 00:48:44.870474 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 00:48:44.877196 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 00:48:44.884170 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 00:48:44.888294 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 00:48:44.893886 ACPI: added table 2/32, length now 44
1739 00:48:44.894357 ACPI: * MCFG
1740 00:48:44.896988 ACPI: added table 3/32, length now 48
1741 00:48:44.900260 ACPI: * TPM2
1742 00:48:44.903807 TPM2 log created at 99a2d000
1743 00:48:44.907005 ACPI: added table 4/32, length now 52
1744 00:48:44.907478 ACPI: * MADT
1745 00:48:44.910679 SCI is IRQ9
1746 00:48:44.913747 ACPI: added table 5/32, length now 56
1747 00:48:44.914324 current = 99b43ac0
1748 00:48:44.917375 ACPI: * DMAR
1749 00:48:44.920381 ACPI: added table 6/32, length now 60
1750 00:48:44.923917 ACPI: * IGD OpRegion
1751 00:48:44.924485 GMA: Found VBT in CBFS
1752 00:48:44.927140 GMA: Found valid VBT in CBFS
1753 00:48:44.929979 ACPI: added table 7/32, length now 64
1754 00:48:44.933533 ACPI: * HPET
1755 00:48:44.936895 ACPI: added table 8/32, length now 68
1756 00:48:44.940055 ACPI: done.
1757 00:48:44.940640 ACPI tables: 31744 bytes.
1758 00:48:44.944388 smbios_write_tables: 99a2c000
1759 00:48:44.948338 EC returned error result code 3
1760 00:48:44.951123 Couldn't obtain OEM name from CBI
1761 00:48:44.954263 Create SMBIOS type 17
1762 00:48:44.957567 PCI: 00:00.0 (Intel Cannonlake)
1763 00:48:44.960646 PCI: 00:14.3 (Intel WiFi)
1764 00:48:44.964411 SMBIOS tables: 939 bytes.
1765 00:48:44.967402 Writing table forward entry at 0x00000500
1766 00:48:44.974032 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 00:48:44.977492 Writing coreboot table at 0x99b62000
1768 00:48:44.983778 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 00:48:44.987080 1. 0000000000001000-000000000009ffff: RAM
1770 00:48:44.990411 2. 00000000000a0000-00000000000fffff: RESERVED
1771 00:48:44.997503 3. 0000000000100000-0000000099a2bfff: RAM
1772 00:48:45.000255 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 00:48:45.006808 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 00:48:45.013802 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 00:48:45.016941 7. 000000009a000000-000000009f7fffff: RESERVED
1776 00:48:45.020366 8. 00000000e0000000-00000000efffffff: RESERVED
1777 00:48:45.026865 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 00:48:45.030705 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 00:48:45.036977 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 00:48:45.040390 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 00:48:45.046546 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 00:48:45.050073 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 00:48:45.053521 15. 0000000100000000-000000045e7fffff: RAM
1784 00:48:45.059953 Graphics framebuffer located at 0xc0000000
1785 00:48:45.063648 Passing 5 GPIOs to payload:
1786 00:48:45.066412 NAME | PORT | POLARITY | VALUE
1787 00:48:45.073365 write protect | undefined | high | low
1788 00:48:45.076614 lid | undefined | high | high
1789 00:48:45.083164 power | undefined | high | low
1790 00:48:45.089535 oprom | undefined | high | low
1791 00:48:45.093036 EC in RW | 0x000000cb | high | low
1792 00:48:45.096593 Board ID: 4
1793 00:48:45.099960 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 00:48:45.102902 CBFS @ c08000 size 3f8000
1795 00:48:45.109491 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 00:48:45.113018 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 00:48:45.116164 coreboot table: 1492 bytes.
1798 00:48:45.119433 IMD ROOT 0. 99fff000 00001000
1799 00:48:45.122644 IMD SMALL 1. 99ffe000 00001000
1800 00:48:45.126450 FSP MEMORY 2. 99c4e000 003b0000
1801 00:48:45.129497 CONSOLE 3. 99c2e000 00020000
1802 00:48:45.133558 FMAP 4. 99c2d000 0000054e
1803 00:48:45.136334 TIME STAMP 5. 99c2c000 00000910
1804 00:48:45.139865 VBOOT WORK 6. 99c18000 00014000
1805 00:48:45.142822 MRC DATA 7. 99c16000 00001958
1806 00:48:45.146107 ROMSTG STCK 8. 99c15000 00001000
1807 00:48:45.149324 AFTER CAR 9. 99c0b000 0000a000
1808 00:48:45.152868 RAMSTAGE 10. 99baf000 0005c000
1809 00:48:45.156104 REFCODE 11. 99b7a000 00035000
1810 00:48:45.159353 SMM BACKUP 12. 99b6a000 00010000
1811 00:48:45.162501 COREBOOT 13. 99b62000 00008000
1812 00:48:45.165791 ACPI 14. 99b3e000 00024000
1813 00:48:45.169869 ACPI GNVS 15. 99b3d000 00001000
1814 00:48:45.172455 RAMOOPS 16. 99a3d000 00100000
1815 00:48:45.175757 TPM2 TCGLOG17. 99a2d000 00010000
1816 00:48:45.179316 SMBIOS 18. 99a2c000 00000800
1817 00:48:45.182461 IMD small region:
1818 00:48:45.186417 IMD ROOT 0. 99ffec00 00000400
1819 00:48:45.189862 FSP RUNTIME 1. 99ffebe0 00000004
1820 00:48:45.192826 EC HOSTEVENT 2. 99ffebc0 00000008
1821 00:48:45.195989 POWER STATE 3. 99ffeb80 00000040
1822 00:48:45.199025 ROMSTAGE 4. 99ffeb60 00000004
1823 00:48:45.202425 MEM INFO 5. 99ffe9a0 000001b9
1824 00:48:45.205969 VPD 6. 99ffe920 0000006c
1825 00:48:45.209415 MTRR: Physical address space:
1826 00:48:45.216173 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 00:48:45.222483 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 00:48:45.228869 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 00:48:45.235652 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 00:48:45.242282 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 00:48:45.249112 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 00:48:45.251907 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 00:48:45.258733 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 00:48:45.261864 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 00:48:45.265438 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 00:48:45.268553 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 00:48:45.275293 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 00:48:45.278870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 00:48:45.281599 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 00:48:45.285083 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 00:48:45.291383 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 00:48:45.295318 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 00:48:45.299184 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 00:48:45.301489 call enable_fixed_mtrr()
1845 00:48:45.304671 CPU physical address size: 39 bits
1846 00:48:45.308101 MTRR: default type WB/UC MTRR counts: 6/8.
1847 00:48:45.314470 MTRR: WB selected as default type.
1848 00:48:45.317669 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 00:48:45.324373 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 00:48:45.331201 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 00:48:45.337823 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 00:48:45.344149 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 00:48:45.350793 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 00:48:45.354366 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 00:48:45.360985 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 00:48:45.364116 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 00:48:45.367904 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 00:48:45.370948 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 00:48:45.377529 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 00:48:45.380891 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 00:48:45.384132 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 00:48:45.387181 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 00:48:45.393920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 00:48:45.397361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 00:48:45.397983
1866 00:48:45.398362 MTRR check
1867 00:48:45.400194 call enable_fixed_mtrr()
1868 00:48:45.403701 Fixed MTRRs : Enabled
1869 00:48:45.407517 Variable MTRRs: Enabled
1870 00:48:45.408091
1871 00:48:45.410282 CPU physical address size: 39 bits
1872 00:48:45.413818 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1873 00:48:45.420397 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 00:48:45.423455 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 00:48:45.426495 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 00:48:45.429905 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 00:48:45.436450 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 00:48:45.440122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 00:48:45.443556 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 00:48:45.446202 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 00:48:45.453216 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 00:48:45.456624 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 00:48:45.460004 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 00:48:45.463042 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 00:48:45.466328 call enable_fixed_mtrr()
1886 00:48:45.469439 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 00:48:45.476290 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 00:48:45.479911 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 00:48:45.483358 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 00:48:45.485941 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 00:48:45.492729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 00:48:45.495907 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 00:48:45.498886 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 00:48:45.502324 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 00:48:45.509323 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 00:48:45.512367 CPU physical address size: 39 bits
1897 00:48:45.515470 call enable_fixed_mtrr()
1898 00:48:45.518958 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 00:48:45.522073 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 00:48:45.525356 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 00:48:45.532150 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 00:48:45.535623 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 00:48:45.538757 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 00:48:45.542016 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 00:48:45.548239 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 00:48:45.551583 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 00:48:45.554862 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 00:48:45.558123 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 00:48:45.561850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 00:48:45.568089 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 00:48:45.571803 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 00:48:45.574999 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 00:48:45.578334 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 00:48:45.584501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 00:48:45.588063 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 00:48:45.591785 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 00:48:45.594483 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 00:48:45.601287 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 00:48:45.604257 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 00:48:45.607787 call enable_fixed_mtrr()
1921 00:48:45.611104 call enable_fixed_mtrr()
1922 00:48:45.614339 CPU physical address size: 39 bits
1923 00:48:45.617776 CPU physical address size: 39 bits
1924 00:48:45.620673 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 00:48:45.624255 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 00:48:45.627641 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 00:48:45.634153 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 00:48:45.637409 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 00:48:45.641190 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 00:48:45.644035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 00:48:45.650563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 00:48:45.653791 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 00:48:45.657185 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 00:48:45.661197 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 00:48:45.667434 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 00:48:45.670490 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 00:48:45.674027 call enable_fixed_mtrr()
1938 00:48:45.677158 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 00:48:45.680169 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 00:48:45.683780 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 00:48:45.690163 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 00:48:45.693547 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 00:48:45.697028 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 00:48:45.700179 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 00:48:45.707199 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 00:48:45.710517 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 00:48:45.713697 CPU physical address size: 39 bits
1948 00:48:45.716796 call enable_fixed_mtrr()
1949 00:48:45.720005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1950 00:48:45.723390 CPU physical address size: 39 bits
1951 00:48:45.726623 CPU physical address size: 39 bits
1952 00:48:45.729807 CBFS @ c08000 size 3f8000
1953 00:48:45.736650 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1954 00:48:45.739904 CBFS: Locating 'fallback/payload'
1955 00:48:45.746942 CBFS: Found @ offset 1c96c0 size 3f798
1956 00:48:45.749777 Checking segment from ROM address 0xffdd16f8
1957 00:48:45.753079 Checking segment from ROM address 0xffdd1714
1958 00:48:45.759958 Loading segment from ROM address 0xffdd16f8
1959 00:48:45.760122 code (compression=0)
1960 00:48:45.769760 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 00:48:45.777004 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 00:48:45.779902 it's not compressed!
1963 00:48:45.872664 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 00:48:45.879208 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 00:48:45.882666 Loading segment from ROM address 0xffdd1714
1966 00:48:45.886054 Entry Point 0x30000000
1967 00:48:45.888935 Loaded segments
1968 00:48:45.895002 Finalizing chipset.
1969 00:48:45.898028 Finalizing SMM.
1970 00:48:45.901633 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1971 00:48:45.904675 mp_park_aps done after 0 msecs.
1972 00:48:45.911078 Jumping to boot code at 30000000(99b62000)
1973 00:48:45.917989 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 00:48:45.918527
1975 00:48:45.918898
1976 00:48:45.919241
1977 00:48:45.921445 Starting depthcharge on Helios...
1978 00:48:45.921950
1979 00:48:45.923021 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 00:48:45.923579 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 00:48:45.924024 Setting prompt string to ['hatch:']
1982 00:48:45.924444 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 00:48:45.931009 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 00:48:45.931593
1985 00:48:45.937862 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 00:48:45.938432
1987 00:48:45.944017 board_setup: Info: eMMC controller not present; skipping
1988 00:48:45.944490
1989 00:48:45.947453 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 00:48:45.947931
1991 00:48:45.954012 board_setup: Info: SDHCI controller not present; skipping
1992 00:48:45.954486
1993 00:48:45.960800 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 00:48:45.961382
1995 00:48:45.961807 Wipe memory regions:
1996 00:48:45.962162
1997 00:48:45.964320 [0x00000000001000, 0x000000000a0000)
1998 00:48:45.964790
1999 00:48:45.967132 [0x00000000100000, 0x00000030000000)
2000 00:48:46.032972
2001 00:48:46.036488 [0x00000030657430, 0x00000099a2c000)
2002 00:48:46.173192
2003 00:48:46.176639 [0x00000100000000, 0x0000045e800000)
2004 00:48:47.559268
2005 00:48:47.559411 R8152: Initializing
2006 00:48:47.559480
2007 00:48:47.562014 Version 9 (ocp_data = 6010)
2008 00:48:47.566310
2009 00:48:47.566396 R8152: Done initializing
2010 00:48:47.566483
2011 00:48:47.569537 Adding net device
2012 00:48:48.178950
2013 00:48:48.179091 R8152: Initializing
2014 00:48:48.179195
2015 00:48:48.182272 Version 6 (ocp_data = 5c30)
2016 00:48:48.182380
2017 00:48:48.185471 R8152: Done initializing
2018 00:48:48.185554
2019 00:48:48.189050 net_add_device: Attemp to include the same device
2020 00:48:48.192766
2021 00:48:48.200365 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 00:48:48.200456
2023 00:48:48.200520
2024 00:48:48.200580
2025 00:48:48.200859 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 00:48:48.301226 hatch: tftpboot 192.168.201.1 10419529/tftp-deploy-qhej7nsa/kernel/bzImage 10419529/tftp-deploy-qhej7nsa/kernel/cmdline 10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
2028 00:48:48.301409 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 00:48:48.301524 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 00:48:48.305868 tftpboot 192.168.201.1 10419529/tftp-deploy-qhej7nsa/kernel/bzImaploy-qhej7nsa/kernel/cmdline 10419529/tftp-deploy-qhej7nsa/ramdisk/ramdisk.cpio.gz
2031 00:48:48.305955
2032 00:48:48.306019 Waiting for link
2033 00:48:48.506898
2034 00:48:48.507040 done.
2035 00:48:48.507133
2036 00:48:48.507212 MAC: 00:24:32:50:1a:5f
2037 00:48:48.507291
2038 00:48:48.509886 Sending DHCP discover... done.
2039 00:48:48.509972
2040 00:48:48.513164 Waiting for reply... done.
2041 00:48:48.513251
2042 00:48:48.516509 Sending DHCP request... done.
2043 00:48:48.516595
2044 00:48:48.523318 Waiting for reply... done.
2045 00:48:48.523406
2046 00:48:48.523491 My ip is 192.168.201.21
2047 00:48:48.523571
2048 00:48:48.526189 The DHCP server ip is 192.168.201.1
2049 00:48:48.526303
2050 00:48:48.533313 TFTP server IP predefined by user: 192.168.201.1
2051 00:48:48.533400
2052 00:48:48.539670 Bootfile predefined by user: 10419529/tftp-deploy-qhej7nsa/kernel/bzImage
2053 00:48:48.539759
2054 00:48:48.542694 Sending tftp read request... done.
2055 00:48:48.542779
2056 00:48:48.546169 Waiting for the transfer...
2057 00:48:48.546256
2058 00:48:49.101330 00000000 ################################################################
2059 00:48:49.101498
2060 00:48:49.646812 00080000 ################################################################
2061 00:48:49.646946
2062 00:48:50.210976 00100000 ################################################################
2063 00:48:50.211131
2064 00:48:50.764465 00180000 ################################################################
2065 00:48:50.764615
2066 00:48:51.305896 00200000 ################################################################
2067 00:48:51.306049
2068 00:48:51.842329 00280000 ################################################################
2069 00:48:51.842482
2070 00:48:52.397966 00300000 ################################################################
2071 00:48:52.398118
2072 00:48:52.956905 00380000 ################################################################
2073 00:48:52.957047
2074 00:48:53.516749 00400000 ################################################################
2075 00:48:53.516900
2076 00:48:54.060888 00480000 ################################################################
2077 00:48:54.061036
2078 00:48:54.620407 00500000 ################################################################
2079 00:48:54.620560
2080 00:48:55.178195 00580000 ################################################################
2081 00:48:55.178344
2082 00:48:55.750978 00600000 ################################################################
2083 00:48:55.751132
2084 00:48:56.309138 00680000 ################################################################
2085 00:48:56.309287
2086 00:48:56.861472 00700000 ################################################################
2087 00:48:56.861636
2088 00:48:57.465605 00780000 ################################################################
2089 00:48:57.466066
2090 00:48:58.088729 00800000 ################################################################
2091 00:48:58.088920
2092 00:48:58.665824 00880000 ################################################################
2093 00:48:58.666002
2094 00:48:59.274797 00900000 ################################################################
2095 00:48:59.274945
2096 00:48:59.869974 00980000 ################################################################
2097 00:48:59.870129
2098 00:49:00.306032 00a00000 ############################################### done.
2099 00:49:00.306539
2100 00:49:00.309359 The bootfile was 10862592 bytes long.
2101 00:49:00.309859
2102 00:49:00.312874 Sending tftp read request... done.
2103 00:49:00.313174
2104 00:49:00.315868 Waiting for the transfer...
2105 00:49:00.316166
2106 00:49:00.908384 00000000 ################################################################
2107 00:49:00.908521
2108 00:49:01.500897 00080000 ################################################################
2109 00:49:01.501038
2110 00:49:02.079877 00100000 ################################################################
2111 00:49:02.080033
2112 00:49:02.649663 00180000 ################################################################
2113 00:49:02.649808
2114 00:49:03.217036 00200000 ################################################################
2115 00:49:03.217202
2116 00:49:03.787017 00280000 ################################################################
2117 00:49:03.787161
2118 00:49:04.350743 00300000 ################################################################
2119 00:49:04.350888
2120 00:49:04.909941 00380000 ################################################################
2121 00:49:04.910091
2122 00:49:05.486777 00400000 ################################################################
2123 00:49:05.486922
2124 00:49:06.052884 00480000 ################################################################
2125 00:49:06.053031
2126 00:49:06.621023 00500000 ################################################################
2127 00:49:06.621171
2128 00:49:07.190407 00580000 ################################################################
2129 00:49:07.190546
2130 00:49:07.752342 00600000 ################################################################
2131 00:49:07.752479
2132 00:49:08.318135 00680000 ################################################################
2133 00:49:08.318271
2134 00:49:08.883564 00700000 ################################################################
2135 00:49:08.883702
2136 00:49:09.442969 00780000 ################################################################
2137 00:49:09.443105
2138 00:49:10.032517 00800000 ################################################################
2139 00:49:10.032675
2140 00:49:10.369617 00880000 ##################################### done.
2141 00:49:10.369768
2142 00:49:10.373108 Sending tftp read request... done.
2143 00:49:10.373193
2144 00:49:10.376290 Waiting for the transfer...
2145 00:49:10.376374
2146 00:49:10.376439 00000000 # done.
2147 00:49:10.376505
2148 00:49:10.386344 Command line loaded dynamically from TFTP file: 10419529/tftp-deploy-qhej7nsa/kernel/cmdline
2149 00:49:10.386429
2150 00:49:10.402636 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2151 00:49:10.402722
2152 00:49:10.409699 ec_init(0): CrosEC protocol v3 supported (256, 256)
2153 00:49:10.414078
2154 00:49:10.417394 Shutting down all USB controllers.
2155 00:49:10.417482
2156 00:49:10.417581 Removing current net device
2157 00:49:10.425146
2158 00:49:10.425229 Finalizing coreboot
2159 00:49:10.425295
2160 00:49:10.431448 Exiting depthcharge with code 4 at timestamp: 31882895
2161 00:49:10.431532
2162 00:49:10.431598
2163 00:49:10.431662 Starting kernel ...
2164 00:49:10.431722
2165 00:49:10.432101 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2166 00:49:10.432200 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2167 00:49:10.432276 Setting prompt string to ['Linux version [0-9]']
2168 00:49:10.432347 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 00:49:10.432417 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2170 00:49:10.434968
2172 00:53:27.433252 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2174 00:53:27.434407 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2176 00:53:27.435308 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2179 00:53:27.436750 end: 2 depthcharge-action (duration 00:05:00) [common]
2181 00:53:27.437611 Cleaning after the job
2182 00:53:27.437700 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/ramdisk
2183 00:53:27.439416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/kernel
2184 00:53:27.440650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419529/tftp-deploy-qhej7nsa/modules
2185 00:53:27.441183 start: 5.1 power-off (timeout 00:00:30) [common]
2186 00:53:27.441342 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2187 00:53:27.525518 >> Command sent successfully.
2188 00:53:27.536815 Returned 0 in 0 seconds
2189 00:53:27.638085 end: 5.1 power-off (duration 00:00:00) [common]
2191 00:53:27.639639 start: 5.2 read-feedback (timeout 00:10:00) [common]
2192 00:53:27.640923 Listened to connection for namespace 'common' for up to 1s
2194 00:53:27.642314 Listened to connection for namespace 'common' for up to 1s
2195 00:53:28.641711 Finalising connection for namespace 'common'
2196 00:53:28.642387 Disconnecting from shell: Finalise
2197 00:53:28.642821
2198 00:53:28.744018 end: 5.2 read-feedback (duration 00:00:01) [common]
2199 00:53:28.744639 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419529
2200 00:53:28.762595 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419529
2201 00:53:28.762731 JobError: Your job cannot terminate cleanly.