Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:47:59.618743 lava-dispatcher, installed at version: 2023.03
2 00:47:59.618943 start: 0 validate
3 00:47:59.619070 Start time: 2023-05-23 00:47:59.619063+00:00 (UTC)
4 00:47:59.619187 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:47:59.619312 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230512.0%2Fx86%2Frootfs.cpio.gz exists
6 00:47:59.903206 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:47:59.903404 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:03.902434 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:03.903266 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:48:04.193287 validate duration: 4.57
12 00:48:04.193565 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:48:04.193661 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:48:04.193744 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:48:04.193859 Not decompressing ramdisk as can be used compressed.
16 00:48:04.193940 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230512.0/x86/rootfs.cpio.gz
17 00:48:04.194022 saving as /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/ramdisk/rootfs.cpio.gz
18 00:48:04.194095 total size: 8430071 (8MB)
19 00:48:04.888025 progress 0% (0MB)
20 00:48:04.895038 progress 5% (0MB)
21 00:48:04.897249 progress 10% (0MB)
22 00:48:04.899400 progress 15% (1MB)
23 00:48:04.901587 progress 20% (1MB)
24 00:48:04.903718 progress 25% (2MB)
25 00:48:04.905920 progress 30% (2MB)
26 00:48:04.908055 progress 35% (2MB)
27 00:48:04.910128 progress 40% (3MB)
28 00:48:04.912273 progress 45% (3MB)
29 00:48:04.914474 progress 50% (4MB)
30 00:48:04.916657 progress 55% (4MB)
31 00:48:04.918766 progress 60% (4MB)
32 00:48:04.920956 progress 65% (5MB)
33 00:48:04.923083 progress 70% (5MB)
34 00:48:04.925117 progress 75% (6MB)
35 00:48:04.927232 progress 80% (6MB)
36 00:48:04.929409 progress 85% (6MB)
37 00:48:04.931589 progress 90% (7MB)
38 00:48:04.933822 progress 95% (7MB)
39 00:48:04.935955 progress 100% (8MB)
40 00:48:04.936088 8MB downloaded in 0.74s (10.84MB/s)
41 00:48:04.936272 end: 1.1.1 http-download (duration 00:00:01) [common]
43 00:48:04.936596 end: 1.1 download-retry (duration 00:00:01) [common]
44 00:48:04.936678 start: 1.2 download-retry (timeout 00:09:59) [common]
45 00:48:04.936762 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 00:48:04.936891 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:48:04.936957 saving as /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/kernel/bzImage
48 00:48:04.937015 total size: 10862592 (10MB)
49 00:48:04.937070 No compression specified
50 00:48:04.938122 progress 0% (0MB)
51 00:48:04.940956 progress 5% (0MB)
52 00:48:04.943823 progress 10% (1MB)
53 00:48:04.946607 progress 15% (1MB)
54 00:48:04.949478 progress 20% (2MB)
55 00:48:04.952093 progress 25% (2MB)
56 00:48:04.954912 progress 30% (3MB)
57 00:48:04.957812 progress 35% (3MB)
58 00:48:04.960471 progress 40% (4MB)
59 00:48:04.963289 progress 45% (4MB)
60 00:48:04.966030 progress 50% (5MB)
61 00:48:04.969024 progress 55% (5MB)
62 00:48:04.971879 progress 60% (6MB)
63 00:48:04.974878 progress 65% (6MB)
64 00:48:04.977815 progress 70% (7MB)
65 00:48:04.980585 progress 75% (7MB)
66 00:48:04.983486 progress 80% (8MB)
67 00:48:04.986204 progress 85% (8MB)
68 00:48:04.989045 progress 90% (9MB)
69 00:48:04.991624 progress 95% (9MB)
70 00:48:04.994429 progress 100% (10MB)
71 00:48:04.994594 10MB downloaded in 0.06s (179.92MB/s)
72 00:48:04.994736 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:48:04.994957 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:48:04.995045 start: 1.3 download-retry (timeout 00:09:59) [common]
76 00:48:04.995128 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 00:48:04.995260 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:48:04.995329 saving as /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/modules/modules.tar
79 00:48:04.995389 total size: 484052 (0MB)
80 00:48:04.995447 Using unxz to decompress xz
81 00:48:04.999133 progress 6% (0MB)
82 00:48:04.999557 progress 13% (0MB)
83 00:48:04.999804 progress 20% (0MB)
84 00:48:05.001225 progress 27% (0MB)
85 00:48:05.003439 progress 33% (0MB)
86 00:48:05.005331 progress 40% (0MB)
87 00:48:05.007456 progress 47% (0MB)
88 00:48:05.009429 progress 54% (0MB)
89 00:48:05.011493 progress 60% (0MB)
90 00:48:05.013415 progress 67% (0MB)
91 00:48:05.015569 progress 74% (0MB)
92 00:48:05.018596 progress 81% (0MB)
93 00:48:05.020970 progress 88% (0MB)
94 00:48:05.022762 progress 94% (0MB)
95 00:48:05.025259 progress 100% (0MB)
96 00:48:05.031833 0MB downloaded in 0.04s (12.67MB/s)
97 00:48:05.032123 end: 1.3.1 http-download (duration 00:00:00) [common]
99 00:48:05.032430 end: 1.3 download-retry (duration 00:00:00) [common]
100 00:48:05.032528 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 00:48:05.032621 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 00:48:05.032701 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 00:48:05.032784 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 00:48:05.033038 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6
105 00:48:05.033162 makedir: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin
106 00:48:05.033264 makedir: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/tests
107 00:48:05.033357 makedir: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/results
108 00:48:05.033472 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-add-keys
109 00:48:05.033613 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-add-sources
110 00:48:05.033739 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-background-process-start
111 00:48:05.033865 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-background-process-stop
112 00:48:05.033987 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-common-functions
113 00:48:05.034108 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-echo-ipv4
114 00:48:05.034233 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-install-packages
115 00:48:05.034358 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-installed-packages
116 00:48:05.034477 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-os-build
117 00:48:05.034598 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-probe-channel
118 00:48:05.034720 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-probe-ip
119 00:48:05.034840 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-target-ip
120 00:48:05.034960 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-target-mac
121 00:48:05.035079 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-target-storage
122 00:48:05.035203 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-case
123 00:48:05.035323 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-event
124 00:48:05.035443 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-feedback
125 00:48:05.035562 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-raise
126 00:48:05.035690 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-reference
127 00:48:05.035844 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-runner
128 00:48:05.035964 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-set
129 00:48:05.036085 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-test-shell
130 00:48:05.036209 Updating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-install-packages (oe)
131 00:48:05.036423 Updating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/bin/lava-installed-packages (oe)
132 00:48:05.036545 Creating /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/environment
133 00:48:05.036652 LAVA metadata
134 00:48:05.036726 - LAVA_JOB_ID=10419490
135 00:48:05.036790 - LAVA_DISPATCHER_IP=192.168.201.1
136 00:48:05.036894 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 00:48:05.036962 skipped lava-vland-overlay
138 00:48:05.037041 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 00:48:05.037126 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 00:48:05.037189 skipped lava-multinode-overlay
141 00:48:05.037261 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 00:48:05.037346 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 00:48:05.037418 Loading test definitions
144 00:48:05.037507 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 00:48:05.037580 Using /lava-10419490 at stage 0
146 00:48:05.037871 uuid=10419490_1.4.2.3.1 testdef=None
147 00:48:05.037958 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 00:48:05.038046 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 00:48:05.038636 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 00:48:05.038858 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 00:48:05.039481 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 00:48:05.039711 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 00:48:05.040462 runner path: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/0/tests/0_dmesg test_uuid 10419490_1.4.2.3.1
156 00:48:05.040615 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 00:48:05.040837 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 00:48:05.040909 Using /lava-10419490 at stage 1
160 00:48:05.041192 uuid=10419490_1.4.2.3.5 testdef=None
161 00:48:05.041279 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 00:48:05.041362 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 00:48:05.041821 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 00:48:05.042037 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 00:48:05.042708 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 00:48:05.042934 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 00:48:05.043547 runner path: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/1/tests/1_bootrr test_uuid 10419490_1.4.2.3.5
170 00:48:05.043696 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 00:48:05.043902 Creating lava-test-runner.conf files
173 00:48:05.043964 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/0 for stage 0
174 00:48:05.044051 - 0_dmesg
175 00:48:05.044128 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419490/lava-overlay-0odsu4h6/lava-10419490/1 for stage 1
176 00:48:05.044215 - 1_bootrr
177 00:48:05.044307 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 00:48:05.044435 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 00:48:05.052943 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 00:48:05.053079 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 00:48:05.053169 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 00:48:05.053258 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 00:48:05.053343 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 00:48:05.305376 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 00:48:05.305846 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 00:48:05.306022 extracting modules file /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419490/extract-overlay-ramdisk-koxhfp_3/ramdisk
187 00:48:05.338202 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 00:48:05.338424 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 00:48:05.338571 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419490/compress-overlay-bcf75xre/overlay-1.4.2.4.tar.gz to ramdisk
190 00:48:05.338689 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419490/compress-overlay-bcf75xre/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419490/extract-overlay-ramdisk-koxhfp_3/ramdisk
191 00:48:05.353349 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 00:48:05.353572 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 00:48:05.353722 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 00:48:05.353858 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 00:48:05.353991 Building ramdisk /var/lib/lava/dispatcher/tmp/10419490/extract-overlay-ramdisk-koxhfp_3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419490/extract-overlay-ramdisk-koxhfp_3/ramdisk
196 00:48:05.493905 >> 53978 blocks
197 00:48:06.419627 rename /var/lib/lava/dispatcher/tmp/10419490/extract-overlay-ramdisk-koxhfp_3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
198 00:48:06.420165 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 00:48:06.420345 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 00:48:06.420498 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 00:48:06.420645 No mkimage arch provided, not using FIT.
202 00:48:06.420790 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 00:48:06.420925 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 00:48:06.421087 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 00:48:06.421233 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 00:48:06.421363 No LXC device requested
207 00:48:06.421497 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 00:48:06.421638 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 00:48:06.421772 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 00:48:06.421892 Checking files for TFTP limit of 4294967296 bytes.
211 00:48:06.422475 end: 1 tftp-deploy (duration 00:00:02) [common]
212 00:48:06.422628 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 00:48:06.422774 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 00:48:06.422965 substitutions:
215 00:48:06.423074 - {DTB}: None
216 00:48:06.423179 - {INITRD}: 10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
217 00:48:06.423283 - {KERNEL}: 10419490/tftp-deploy-l5vudi8z/kernel/bzImage
218 00:48:06.423389 - {LAVA_MAC}: None
219 00:48:06.423489 - {PRESEED_CONFIG}: None
220 00:48:06.423590 - {PRESEED_LOCAL}: None
221 00:48:06.423689 - {RAMDISK}: 10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
222 00:48:06.423788 - {ROOT_PART}: None
223 00:48:06.423887 - {ROOT}: None
224 00:48:06.423983 - {SERVER_IP}: 192.168.201.1
225 00:48:06.424081 - {TEE}: None
226 00:48:06.424179 Parsed boot commands:
227 00:48:06.424274 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 00:48:06.424532 Parsed boot commands: tftpboot 192.168.201.1 10419490/tftp-deploy-l5vudi8z/kernel/bzImage 10419490/tftp-deploy-l5vudi8z/kernel/cmdline 10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
229 00:48:06.424677 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 00:48:06.424815 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 00:48:06.424961 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 00:48:06.425109 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 00:48:06.425221 Not connected, no need to disconnect.
234 00:48:06.425344 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 00:48:06.425474 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 00:48:06.425589 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
237 00:48:06.429833 Setting prompt string to ['lava-test: # ']
238 00:48:06.430298 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 00:48:06.430460 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 00:48:06.430611 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 00:48:06.430754 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 00:48:06.431062 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
243 00:48:11.568431 >> Command sent successfully.
244 00:48:11.570918 Returned 0 in 5 seconds
245 00:48:11.671351 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 00:48:11.671861 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 00:48:11.672013 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 00:48:11.672146 Setting prompt string to 'Starting depthcharge on Voema...'
250 00:48:11.672254 Changing prompt to 'Starting depthcharge on Voema...'
251 00:48:11.672389 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 00:48:11.672788 [Enter `^Ec?' for help]
253 00:48:13.275263
254 00:48:13.275430
255 00:48:13.285023 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 00:48:13.288599 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 00:48:13.295168 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 00:48:13.298432 CPU: AES supported, TXT NOT supported, VT supported
259 00:48:13.305224 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 00:48:13.311835 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 00:48:13.315274 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 00:48:13.318269 VBOOT: Loading verstage.
263 00:48:13.321831 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 00:48:13.328528 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 00:48:13.331865 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 00:48:13.341981 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 00:48:13.348682 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 00:48:13.348774
269 00:48:13.348841
270 00:48:13.361767 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 00:48:13.376163 Probing TPM: . done!
272 00:48:13.379147 TPM ready after 0 ms
273 00:48:13.382467 Connected to device vid:did:rid of 1ae0:0028:00
274 00:48:13.394188 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
275 00:48:13.400856 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 00:48:13.403906 Initialized TPM device CR50 revision 0
277 00:48:13.455331 tlcl_send_startup: Startup return code is 0
278 00:48:13.455479 TPM: setup succeeded
279 00:48:13.470838 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 00:48:13.485203 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 00:48:13.497489 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 00:48:13.507314 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 00:48:13.511239 Chrome EC: UHEPI supported
284 00:48:13.514462 Phase 1
285 00:48:13.517798 FMAP: area GBB found @ 1805000 (458752 bytes)
286 00:48:13.527699 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 00:48:13.534487 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 00:48:13.540817 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 00:48:13.547602 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 00:48:13.551092 Recovery requested (1009000e)
291 00:48:13.554248 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 00:48:13.566005 tlcl_extend: response is 0
293 00:48:13.572871 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 00:48:13.582879 tlcl_extend: response is 0
295 00:48:13.589125 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 00:48:13.596008 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 00:48:13.602397 BS: verstage times (exec / console): total (unknown) / 142 ms
298 00:48:13.602562
299 00:48:13.602641
300 00:48:13.615705 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 00:48:13.622294 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 00:48:13.625708 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 00:48:13.629001 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 00:48:13.635550 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 00:48:13.638966 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 00:48:13.642106 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 00:48:13.645416 TCO_STS: 0000 0000
308 00:48:13.648492 GEN_PMCON: d0015038 00002200
309 00:48:13.652052 GBLRST_CAUSE: 00000000 00000000
310 00:48:13.655242 HPR_CAUSE0: 00000000
311 00:48:13.655333 prev_sleep_state 5
312 00:48:13.658723 Boot Count incremented to 20448
313 00:48:13.665192 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 00:48:13.672575 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 00:48:13.682051 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 00:48:13.688607 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 00:48:13.691725 Chrome EC: UHEPI supported
318 00:48:13.698329 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 00:48:13.709575 Probing TPM: done!
320 00:48:13.715959 Connected to device vid:did:rid of 1ae0:0028:00
321 00:48:13.726702 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
322 00:48:13.735727 Initialized TPM device CR50 revision 0
323 00:48:13.745703 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 00:48:13.752135 MRC: Hash idx 0x100b comparison successful.
325 00:48:13.756114 MRC cache found, size faa8
326 00:48:13.756253 bootmode is set to: 2
327 00:48:13.759035 SPD index = 0
328 00:48:13.765720 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 00:48:13.769098 SPD: module type is LPDDR4X
330 00:48:13.772068 SPD: module part number is MT53E512M64D4NW-046
331 00:48:13.778701 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 00:48:13.781916 SPD: device width 16 bits, bus width 16 bits
333 00:48:13.788634 SPD: module size is 1024 MB (per channel)
334 00:48:14.220987 CBMEM:
335 00:48:14.224559 IMD: root @ 0x76fff000 254 entries.
336 00:48:14.227485 IMD: root @ 0x76ffec00 62 entries.
337 00:48:14.230975 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 00:48:14.237787 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 00:48:14.240894 External stage cache:
340 00:48:14.244223 IMD: root @ 0x7b3ff000 254 entries.
341 00:48:14.247505 IMD: root @ 0x7b3fec00 62 entries.
342 00:48:14.262803 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 00:48:14.269245 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 00:48:14.275736 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 00:48:14.289898 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 00:48:14.296878 cse_lite: Skip switching to RW in the recovery path
347 00:48:14.297036 8 DIMMs found
348 00:48:14.299937 SMM Memory Map
349 00:48:14.303193 SMRAM : 0x7b000000 0x800000
350 00:48:14.307160 Subregion 0: 0x7b000000 0x200000
351 00:48:14.307286 Subregion 1: 0x7b200000 0x200000
352 00:48:14.310730 Subregion 2: 0x7b400000 0x400000
353 00:48:14.314190 top_of_ram = 0x77000000
354 00:48:14.320721 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 00:48:14.324257 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 00:48:14.330853 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 00:48:14.333671 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 00:48:14.343662 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 00:48:14.350498 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 00:48:14.360572 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 00:48:14.363772 Processing 211 relocs. Offset value of 0x74c0b000
362 00:48:14.373042 BS: romstage times (exec / console): total (unknown) / 277 ms
363 00:48:14.378954
364 00:48:14.379077
365 00:48:14.389120 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 00:48:14.392284 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 00:48:14.402220 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 00:48:14.409299 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 00:48:14.415114 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 00:48:14.422379 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 00:48:14.468726 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 00:48:14.475464 Processing 5008 relocs. Offset value of 0x75d98000
373 00:48:14.479083 BS: postcar times (exec / console): total (unknown) / 59 ms
374 00:48:14.482018
375 00:48:14.482109
376 00:48:14.492009 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 00:48:14.492129 Normal boot
378 00:48:14.495516 FW_CONFIG value is 0x804c02
379 00:48:14.498496 PCI: 00:07.0 disabled by fw_config
380 00:48:14.501872 PCI: 00:07.1 disabled by fw_config
381 00:48:14.505516 PCI: 00:0d.2 disabled by fw_config
382 00:48:14.508952 PCI: 00:1c.7 disabled by fw_config
383 00:48:14.515437 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 00:48:14.522365 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 00:48:14.526007 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 00:48:14.528952 GENERIC: 0.0 disabled by fw_config
387 00:48:14.532529 GENERIC: 1.0 disabled by fw_config
388 00:48:14.538863 fw_config match found: DB_USB=USB3_ACTIVE
389 00:48:14.541931 fw_config match found: DB_USB=USB3_ACTIVE
390 00:48:14.545267 fw_config match found: DB_USB=USB3_ACTIVE
391 00:48:14.552282 fw_config match found: DB_USB=USB3_ACTIVE
392 00:48:14.555863 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 00:48:14.562137 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 00:48:14.572447 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 00:48:14.578661 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 00:48:14.581947 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 00:48:14.589274 microcode: Update skipped, already up-to-date
398 00:48:14.595630 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 00:48:14.622602 Detected 4 core, 8 thread CPU.
400 00:48:14.625831 Setting up SMI for CPU
401 00:48:14.629077 IED base = 0x7b400000
402 00:48:14.629243 IED size = 0x00400000
403 00:48:14.632417 Will perform SMM setup.
404 00:48:14.639036 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 00:48:14.645786 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 00:48:14.652535 Processing 16 relocs. Offset value of 0x00030000
407 00:48:14.655462 Attempting to start 7 APs
408 00:48:14.658571 Waiting for 10ms after sending INIT.
409 00:48:14.674446 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 00:48:14.674589 done.
411 00:48:14.678232 AP: slot 6 apic_id 2.
412 00:48:14.681776 Waiting for 2nd SIPI to complete...done.
413 00:48:14.684474 AP: slot 5 apic_id 6.
414 00:48:14.687917 AP: slot 4 apic_id 7.
415 00:48:14.688012 AP: slot 7 apic_id 4.
416 00:48:14.691471 AP: slot 3 apic_id 5.
417 00:48:14.694328 AP: slot 2 apic_id 3.
418 00:48:14.701459 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 00:48:14.707570 Processing 13 relocs. Offset value of 0x00038000
420 00:48:14.710989 Unable to locate Global NVS
421 00:48:14.717678 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 00:48:14.721113 Installing permanent SMM handler to 0x7b000000
423 00:48:14.730949 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 00:48:14.733895 Processing 794 relocs. Offset value of 0x7b010000
425 00:48:14.744183 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 00:48:14.747087 Processing 13 relocs. Offset value of 0x7b008000
427 00:48:14.753784 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 00:48:14.760529 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 00:48:14.767548 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 00:48:14.770328 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 00:48:14.777346 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 00:48:14.783739 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 00:48:14.790659 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 00:48:14.793769 Unable to locate Global NVS
435 00:48:14.800665 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 00:48:14.803626 Clearing SMI status registers
437 00:48:14.807011 SMI_STS: PM1
438 00:48:14.807168 PM1_STS: PWRBTN
439 00:48:14.813589 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 00:48:14.817323 In relocation handler: CPU 0
441 00:48:14.820502 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 00:48:14.827158 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 00:48:14.830261 Relocation complete.
444 00:48:14.836764 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 00:48:14.840854 In relocation handler: CPU 1
446 00:48:14.843354 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 00:48:14.846938 Relocation complete.
448 00:48:14.853160 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 00:48:14.856569 In relocation handler: CPU 3
450 00:48:14.859952 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 00:48:14.860049 Relocation complete.
452 00:48:14.869819 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 00:48:14.873624 In relocation handler: CPU 6
454 00:48:14.877123 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 00:48:14.879716 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 00:48:14.883035 Relocation complete.
457 00:48:14.889862 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
458 00:48:14.893622 In relocation handler: CPU 2
459 00:48:14.896320 New SMBASE=0x7afff800 IEDBASE=0x7b400000
460 00:48:14.900085 Relocation complete.
461 00:48:14.906531 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
462 00:48:14.909778 In relocation handler: CPU 4
463 00:48:14.912994 New SMBASE=0x7afff000 IEDBASE=0x7b400000
464 00:48:14.916607 Relocation complete.
465 00:48:14.923336 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
466 00:48:14.926306 In relocation handler: CPU 5
467 00:48:14.929505 New SMBASE=0x7affec00 IEDBASE=0x7b400000
468 00:48:14.936261 Writing SMRR. base = 0x7b000006, mask=0xff800c00
469 00:48:14.936452 Relocation complete.
470 00:48:14.942720 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
471 00:48:14.946352 In relocation handler: CPU 7
472 00:48:14.952838 New SMBASE=0x7affe400 IEDBASE=0x7b400000
473 00:48:14.956223 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 00:48:14.959606 Relocation complete.
475 00:48:14.959728 Initializing CPU #0
476 00:48:14.962743 CPU: vendor Intel device 806c1
477 00:48:14.969058 CPU: family 06, model 8c, stepping 01
478 00:48:14.969191 Clearing out pending MCEs
479 00:48:14.972561 Setting up local APIC...
480 00:48:14.975698 apic_id: 0x00 done.
481 00:48:14.979588 Turbo is available but hidden
482 00:48:14.983784 Turbo is available and visible
483 00:48:14.987005 microcode: Update skipped, already up-to-date
484 00:48:14.987135 CPU #0 initialized
485 00:48:14.990164 Initializing CPU #2
486 00:48:14.993452 Initializing CPU #6
487 00:48:14.996791 CPU: vendor Intel device 806c1
488 00:48:15.000274 CPU: family 06, model 8c, stepping 01
489 00:48:15.003620 CPU: vendor Intel device 806c1
490 00:48:15.006919 CPU: family 06, model 8c, stepping 01
491 00:48:15.009982 Clearing out pending MCEs
492 00:48:15.010086 Clearing out pending MCEs
493 00:48:15.013823 Setting up local APIC...
494 00:48:15.016630 Initializing CPU #5
495 00:48:15.016726 Initializing CPU #4
496 00:48:15.020541 CPU: vendor Intel device 806c1
497 00:48:15.026925 CPU: family 06, model 8c, stepping 01
498 00:48:15.027077 Initializing CPU #3
499 00:48:15.030005 Initializing CPU #7
500 00:48:15.030109 Initializing CPU #1
501 00:48:15.033541 Setting up local APIC...
502 00:48:15.036615 CPU: vendor Intel device 806c1
503 00:48:15.040273 CPU: family 06, model 8c, stepping 01
504 00:48:15.043451 CPU: vendor Intel device 806c1
505 00:48:15.046929 CPU: family 06, model 8c, stepping 01
506 00:48:15.050203 Clearing out pending MCEs
507 00:48:15.053385 Clearing out pending MCEs
508 00:48:15.056623 Setting up local APIC...
509 00:48:15.059843 CPU: vendor Intel device 806c1
510 00:48:15.063066 CPU: family 06, model 8c, stepping 01
511 00:48:15.066756 CPU: vendor Intel device 806c1
512 00:48:15.070243 CPU: family 06, model 8c, stepping 01
513 00:48:15.073169 Clearing out pending MCEs
514 00:48:15.073289 Clearing out pending MCEs
515 00:48:15.076759 Setting up local APIC...
516 00:48:15.080098 apic_id: 0x03 done.
517 00:48:15.080222 apic_id: 0x02 done.
518 00:48:15.086638 microcode: Update skipped, already up-to-date
519 00:48:15.089713 microcode: Update skipped, already up-to-date
520 00:48:15.093646 CPU #2 initialized
521 00:48:15.093786 CPU #6 initialized
522 00:48:15.096936 apic_id: 0x05 done.
523 00:48:15.099590 Setting up local APIC...
524 00:48:15.103100 Setting up local APIC...
525 00:48:15.106470 microcode: Update skipped, already up-to-date
526 00:48:15.109774 apic_id: 0x04 done.
527 00:48:15.109909 CPU #3 initialized
528 00:48:15.116246 microcode: Update skipped, already up-to-date
529 00:48:15.116428 apic_id: 0x07 done.
530 00:48:15.120074 apic_id: 0x06 done.
531 00:48:15.123104 microcode: Update skipped, already up-to-date
532 00:48:15.129801 microcode: Update skipped, already up-to-date
533 00:48:15.129939 CPU #4 initialized
534 00:48:15.133056 CPU #5 initialized
535 00:48:15.136400 Clearing out pending MCEs
536 00:48:15.136505 CPU #7 initialized
537 00:48:15.139581 Setting up local APIC...
538 00:48:15.142834 apic_id: 0x01 done.
539 00:48:15.146471 microcode: Update skipped, already up-to-date
540 00:48:15.149526 CPU #1 initialized
541 00:48:15.152841 bsp_do_flight_plan done after 466 msecs.
542 00:48:15.156163 CPU: frequency set to 4000 MHz
543 00:48:15.156249 Enabling SMIs.
544 00:48:15.162479 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
545 00:48:15.180505 SATAXPCIE1 indicates PCIe NVMe is present
546 00:48:15.183530 Probing TPM: done!
547 00:48:15.186868 Connected to device vid:did:rid of 1ae0:0028:00
548 00:48:15.197436 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
549 00:48:15.200724 Initialized TPM device CR50 revision 0
550 00:48:15.203744 Enabling S0i3.4
551 00:48:15.210581 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 00:48:15.213740 Found a VBT of 8704 bytes after decompression
553 00:48:15.220262 cse_lite: CSE RO boot. HybridStorageMode disabled
554 00:48:15.227080 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 00:48:15.302842 FSPS returned 0
556 00:48:15.306546 Executing Phase 1 of FspMultiPhaseSiInit
557 00:48:15.316130 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 00:48:15.319375 port C0 DISC req: usage 1 usb3 1 usb2 5
559 00:48:15.322650 Raw Buffer output 0 00000511
560 00:48:15.326285 Raw Buffer output 1 00000000
561 00:48:15.330294 pmc_send_ipc_cmd succeeded
562 00:48:15.336965 port C1 DISC req: usage 1 usb3 2 usb2 3
563 00:48:15.337130 Raw Buffer output 0 00000321
564 00:48:15.339852 Raw Buffer output 1 00000000
565 00:48:15.344170 pmc_send_ipc_cmd succeeded
566 00:48:15.349318 Detected 4 core, 8 thread CPU.
567 00:48:15.352494 Detected 4 core, 8 thread CPU.
568 00:48:15.587105 Display FSP Version Info HOB
569 00:48:15.590479 Reference Code - CPU = a.0.4c.31
570 00:48:15.593788 uCode Version = 0.0.0.86
571 00:48:15.596425 TXT ACM version = ff.ff.ff.ffff
572 00:48:15.600327 Reference Code - ME = a.0.4c.31
573 00:48:15.603254 MEBx version = 0.0.0.0
574 00:48:15.606842 ME Firmware Version = Consumer SKU
575 00:48:15.610448 Reference Code - PCH = a.0.4c.31
576 00:48:15.613005 PCH-CRID Status = Disabled
577 00:48:15.617093 PCH-CRID Original Value = ff.ff.ff.ffff
578 00:48:15.620171 PCH-CRID New Value = ff.ff.ff.ffff
579 00:48:15.623086 OPROM - RST - RAID = ff.ff.ff.ffff
580 00:48:15.626696 PCH Hsio Version = 4.0.0.0
581 00:48:15.629982 Reference Code - SA - System Agent = a.0.4c.31
582 00:48:15.633227 Reference Code - MRC = 2.0.0.1
583 00:48:15.636305 SA - PCIe Version = a.0.4c.31
584 00:48:15.639791 SA-CRID Status = Disabled
585 00:48:15.643307 SA-CRID Original Value = 0.0.0.1
586 00:48:15.646110 SA-CRID New Value = 0.0.0.1
587 00:48:15.649900 OPROM - VBIOS = ff.ff.ff.ffff
588 00:48:15.653091 IO Manageability Engine FW Version = 11.1.4.0
589 00:48:15.656564 PHY Build Version = 0.0.0.e0
590 00:48:15.659836 Thunderbolt(TM) FW Version = 0.0.0.0
591 00:48:15.666210 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 00:48:15.669446 ITSS IRQ Polarities Before:
593 00:48:15.669850 IPC0: 0xffffffff
594 00:48:15.672684 IPC1: 0xffffffff
595 00:48:15.673071 IPC2: 0xffffffff
596 00:48:15.676658 IPC3: 0xffffffff
597 00:48:15.679383 ITSS IRQ Polarities After:
598 00:48:15.679771 IPC0: 0xffffffff
599 00:48:15.682641 IPC1: 0xffffffff
600 00:48:15.683029 IPC2: 0xffffffff
601 00:48:15.686109 IPC3: 0xffffffff
602 00:48:15.689868 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 00:48:15.702976 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 00:48:15.712753 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 00:48:15.726374 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 00:48:15.733033 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 00:48:15.736292 Enumerating buses...
608 00:48:15.739214 Show all devs... Before device enumeration.
609 00:48:15.742645 Root Device: enabled 1
610 00:48:15.743155 DOMAIN: 0000: enabled 1
611 00:48:15.745702 CPU_CLUSTER: 0: enabled 1
612 00:48:15.749401 PCI: 00:00.0: enabled 1
613 00:48:15.752662 PCI: 00:02.0: enabled 1
614 00:48:15.753190 PCI: 00:04.0: enabled 1
615 00:48:15.755555 PCI: 00:05.0: enabled 1
616 00:48:15.759192 PCI: 00:06.0: enabled 0
617 00:48:15.762701 PCI: 00:07.0: enabled 0
618 00:48:15.763131 PCI: 00:07.1: enabled 0
619 00:48:15.765799 PCI: 00:07.2: enabled 0
620 00:48:15.769303 PCI: 00:07.3: enabled 0
621 00:48:15.772287 PCI: 00:08.0: enabled 1
622 00:48:15.772774 PCI: 00:09.0: enabled 0
623 00:48:15.776268 PCI: 00:0a.0: enabled 0
624 00:48:15.779213 PCI: 00:0d.0: enabled 1
625 00:48:15.779646 PCI: 00:0d.1: enabled 0
626 00:48:15.782416 PCI: 00:0d.2: enabled 0
627 00:48:15.785495 PCI: 00:0d.3: enabled 0
628 00:48:15.788926 PCI: 00:0e.0: enabled 0
629 00:48:15.789475 PCI: 00:10.2: enabled 1
630 00:48:15.792444 PCI: 00:10.6: enabled 0
631 00:48:15.795257 PCI: 00:10.7: enabled 0
632 00:48:15.798912 PCI: 00:12.0: enabled 0
633 00:48:15.799440 PCI: 00:12.6: enabled 0
634 00:48:15.802525 PCI: 00:13.0: enabled 0
635 00:48:15.805362 PCI: 00:14.0: enabled 1
636 00:48:15.808788 PCI: 00:14.1: enabled 0
637 00:48:15.809220 PCI: 00:14.2: enabled 1
638 00:48:15.811992 PCI: 00:14.3: enabled 1
639 00:48:15.815234 PCI: 00:15.0: enabled 1
640 00:48:15.818917 PCI: 00:15.1: enabled 1
641 00:48:15.819340 PCI: 00:15.2: enabled 1
642 00:48:15.822040 PCI: 00:15.3: enabled 1
643 00:48:15.825512 PCI: 00:16.0: enabled 1
644 00:48:15.825936 PCI: 00:16.1: enabled 0
645 00:48:15.828571 PCI: 00:16.2: enabled 0
646 00:48:15.831999 PCI: 00:16.3: enabled 0
647 00:48:15.835616 PCI: 00:16.4: enabled 0
648 00:48:15.836044 PCI: 00:16.5: enabled 0
649 00:48:15.838522 PCI: 00:17.0: enabled 1
650 00:48:15.841698 PCI: 00:19.0: enabled 0
651 00:48:15.845492 PCI: 00:19.1: enabled 1
652 00:48:15.845917 PCI: 00:19.2: enabled 0
653 00:48:15.848580 PCI: 00:1c.0: enabled 1
654 00:48:15.852004 PCI: 00:1c.1: enabled 0
655 00:48:15.855176 PCI: 00:1c.2: enabled 0
656 00:48:15.855879 PCI: 00:1c.3: enabled 0
657 00:48:15.858648 PCI: 00:1c.4: enabled 0
658 00:48:15.861784 PCI: 00:1c.5: enabled 0
659 00:48:15.865013 PCI: 00:1c.6: enabled 1
660 00:48:15.865435 PCI: 00:1c.7: enabled 0
661 00:48:15.868713 PCI: 00:1d.0: enabled 1
662 00:48:15.871894 PCI: 00:1d.1: enabled 0
663 00:48:15.872537 PCI: 00:1d.2: enabled 1
664 00:48:15.875488 PCI: 00:1d.3: enabled 0
665 00:48:15.878244 PCI: 00:1e.0: enabled 1
666 00:48:15.881467 PCI: 00:1e.1: enabled 0
667 00:48:15.881892 PCI: 00:1e.2: enabled 1
668 00:48:15.884629 PCI: 00:1e.3: enabled 1
669 00:48:15.888081 PCI: 00:1f.0: enabled 1
670 00:48:15.890999 PCI: 00:1f.1: enabled 0
671 00:48:15.891372 PCI: 00:1f.2: enabled 1
672 00:48:15.894602 PCI: 00:1f.3: enabled 1
673 00:48:15.898143 PCI: 00:1f.4: enabled 0
674 00:48:15.900906 PCI: 00:1f.5: enabled 1
675 00:48:15.900990 PCI: 00:1f.6: enabled 0
676 00:48:15.904928 PCI: 00:1f.7: enabled 0
677 00:48:15.907496 APIC: 00: enabled 1
678 00:48:15.907627 GENERIC: 0.0: enabled 1
679 00:48:15.911036 GENERIC: 0.0: enabled 1
680 00:48:15.914135 GENERIC: 1.0: enabled 1
681 00:48:15.917881 GENERIC: 0.0: enabled 1
682 00:48:15.917992 GENERIC: 1.0: enabled 1
683 00:48:15.920770 USB0 port 0: enabled 1
684 00:48:15.924188 GENERIC: 0.0: enabled 1
685 00:48:15.927490 USB0 port 0: enabled 1
686 00:48:15.927610 GENERIC: 0.0: enabled 1
687 00:48:15.930608 I2C: 00:1a: enabled 1
688 00:48:15.934262 I2C: 00:31: enabled 1
689 00:48:15.934371 I2C: 00:32: enabled 1
690 00:48:15.937548 I2C: 00:10: enabled 1
691 00:48:15.940964 I2C: 00:15: enabled 1
692 00:48:15.941065 GENERIC: 0.0: enabled 0
693 00:48:15.943950 GENERIC: 1.0: enabled 0
694 00:48:15.947318 GENERIC: 0.0: enabled 1
695 00:48:15.947439 SPI: 00: enabled 1
696 00:48:15.950872 SPI: 00: enabled 1
697 00:48:15.953788 PNP: 0c09.0: enabled 1
698 00:48:15.957248 GENERIC: 0.0: enabled 1
699 00:48:15.957356 USB3 port 0: enabled 1
700 00:48:15.960518 USB3 port 1: enabled 1
701 00:48:15.964044 USB3 port 2: enabled 0
702 00:48:15.964153 USB3 port 3: enabled 0
703 00:48:15.966928 USB2 port 0: enabled 0
704 00:48:15.970641 USB2 port 1: enabled 1
705 00:48:15.973994 USB2 port 2: enabled 1
706 00:48:15.974110 USB2 port 3: enabled 0
707 00:48:15.976996 USB2 port 4: enabled 1
708 00:48:15.980193 USB2 port 5: enabled 0
709 00:48:15.980282 USB2 port 6: enabled 0
710 00:48:15.983738 USB2 port 7: enabled 0
711 00:48:15.986886 USB2 port 8: enabled 0
712 00:48:15.986965 USB2 port 9: enabled 0
713 00:48:15.990596 USB3 port 0: enabled 0
714 00:48:15.993393 USB3 port 1: enabled 1
715 00:48:15.997080 USB3 port 2: enabled 0
716 00:48:15.997172 USB3 port 3: enabled 0
717 00:48:16.000146 GENERIC: 0.0: enabled 1
718 00:48:16.003465 GENERIC: 1.0: enabled 1
719 00:48:16.003552 APIC: 01: enabled 1
720 00:48:16.006924 APIC: 03: enabled 1
721 00:48:16.010215 APIC: 05: enabled 1
722 00:48:16.010308 APIC: 07: enabled 1
723 00:48:16.014009 APIC: 06: enabled 1
724 00:48:16.014142 APIC: 02: enabled 1
725 00:48:16.016826 APIC: 04: enabled 1
726 00:48:16.020167 Compare with tree...
727 00:48:16.020317 Root Device: enabled 1
728 00:48:16.023316 DOMAIN: 0000: enabled 1
729 00:48:16.026696 PCI: 00:00.0: enabled 1
730 00:48:16.030407 PCI: 00:02.0: enabled 1
731 00:48:16.033327 PCI: 00:04.0: enabled 1
732 00:48:16.033413 GENERIC: 0.0: enabled 1
733 00:48:16.036996 PCI: 00:05.0: enabled 1
734 00:48:16.040183 PCI: 00:06.0: enabled 0
735 00:48:16.043945 PCI: 00:07.0: enabled 0
736 00:48:16.047250 GENERIC: 0.0: enabled 1
737 00:48:16.047331 PCI: 00:07.1: enabled 0
738 00:48:16.049919 GENERIC: 1.0: enabled 1
739 00:48:16.053370 PCI: 00:07.2: enabled 0
740 00:48:16.056440 GENERIC: 0.0: enabled 1
741 00:48:16.059911 PCI: 00:07.3: enabled 0
742 00:48:16.063338 GENERIC: 1.0: enabled 1
743 00:48:16.063424 PCI: 00:08.0: enabled 1
744 00:48:16.066691 PCI: 00:09.0: enabled 0
745 00:48:16.070041 PCI: 00:0a.0: enabled 0
746 00:48:16.073106 PCI: 00:0d.0: enabled 1
747 00:48:16.076336 USB0 port 0: enabled 1
748 00:48:16.076440 USB3 port 0: enabled 1
749 00:48:16.079659 USB3 port 1: enabled 1
750 00:48:16.083601 USB3 port 2: enabled 0
751 00:48:16.086391 USB3 port 3: enabled 0
752 00:48:16.089745 PCI: 00:0d.1: enabled 0
753 00:48:16.089876 PCI: 00:0d.2: enabled 0
754 00:48:16.092847 GENERIC: 0.0: enabled 1
755 00:48:16.096624 PCI: 00:0d.3: enabled 0
756 00:48:16.099460 PCI: 00:0e.0: enabled 0
757 00:48:16.102808 PCI: 00:10.2: enabled 1
758 00:48:16.102920 PCI: 00:10.6: enabled 0
759 00:48:16.106566 PCI: 00:10.7: enabled 0
760 00:48:16.109681 PCI: 00:12.0: enabled 0
761 00:48:16.113506 PCI: 00:12.6: enabled 0
762 00:48:16.116332 PCI: 00:13.0: enabled 0
763 00:48:16.116452 PCI: 00:14.0: enabled 1
764 00:48:16.119512 USB0 port 0: enabled 1
765 00:48:16.123327 USB2 port 0: enabled 0
766 00:48:16.126440 USB2 port 1: enabled 1
767 00:48:16.129405 USB2 port 2: enabled 1
768 00:48:16.132964 USB2 port 3: enabled 0
769 00:48:16.133047 USB2 port 4: enabled 1
770 00:48:16.136388 USB2 port 5: enabled 0
771 00:48:16.139431 USB2 port 6: enabled 0
772 00:48:16.142970 USB2 port 7: enabled 0
773 00:48:16.146431 USB2 port 8: enabled 0
774 00:48:16.146524 USB2 port 9: enabled 0
775 00:48:16.149235 USB3 port 0: enabled 0
776 00:48:16.152473 USB3 port 1: enabled 1
777 00:48:16.156030 USB3 port 2: enabled 0
778 00:48:16.159589 USB3 port 3: enabled 0
779 00:48:16.162892 PCI: 00:14.1: enabled 0
780 00:48:16.162979 PCI: 00:14.2: enabled 1
781 00:48:16.166306 PCI: 00:14.3: enabled 1
782 00:48:16.169086 GENERIC: 0.0: enabled 1
783 00:48:16.172702 PCI: 00:15.0: enabled 1
784 00:48:16.175987 I2C: 00:1a: enabled 1
785 00:48:16.176074 I2C: 00:31: enabled 1
786 00:48:16.179377 I2C: 00:32: enabled 1
787 00:48:16.182696 PCI: 00:15.1: enabled 1
788 00:48:16.185683 I2C: 00:10: enabled 1
789 00:48:16.185792 PCI: 00:15.2: enabled 1
790 00:48:16.189533 PCI: 00:15.3: enabled 1
791 00:48:16.192604 PCI: 00:16.0: enabled 1
792 00:48:16.195800 PCI: 00:16.1: enabled 0
793 00:48:16.199399 PCI: 00:16.2: enabled 0
794 00:48:16.199532 PCI: 00:16.3: enabled 0
795 00:48:16.202585 PCI: 00:16.4: enabled 0
796 00:48:16.205814 PCI: 00:16.5: enabled 0
797 00:48:16.209027 PCI: 00:17.0: enabled 1
798 00:48:16.212385 PCI: 00:19.0: enabled 0
799 00:48:16.212604 PCI: 00:19.1: enabled 1
800 00:48:16.215694 I2C: 00:15: enabled 1
801 00:48:16.219059 PCI: 00:19.2: enabled 0
802 00:48:16.222661 PCI: 00:1d.0: enabled 1
803 00:48:16.225635 GENERIC: 0.0: enabled 1
804 00:48:16.225797 PCI: 00:1e.0: enabled 1
805 00:48:16.275309 PCI: 00:1e.1: enabled 0
806 00:48:16.275436 PCI: 00:1e.2: enabled 1
807 00:48:16.275723 SPI: 00: enabled 1
808 00:48:16.275789 PCI: 00:1e.3: enabled 1
809 00:48:16.275878 SPI: 00: enabled 1
810 00:48:16.275947 PCI: 00:1f.0: enabled 1
811 00:48:16.276007 PNP: 0c09.0: enabled 1
812 00:48:16.276529 PCI: 00:1f.1: enabled 0
813 00:48:16.276599 PCI: 00:1f.2: enabled 1
814 00:48:16.276847 GENERIC: 0.0: enabled 1
815 00:48:16.276915 GENERIC: 0.0: enabled 1
816 00:48:16.276974 GENERIC: 1.0: enabled 1
817 00:48:16.277031 PCI: 00:1f.3: enabled 1
818 00:48:16.277086 PCI: 00:1f.4: enabled 0
819 00:48:16.277151 PCI: 00:1f.5: enabled 1
820 00:48:16.277207 PCI: 00:1f.6: enabled 0
821 00:48:16.277443 PCI: 00:1f.7: enabled 0
822 00:48:16.277505 CPU_CLUSTER: 0: enabled 1
823 00:48:16.277560 APIC: 00: enabled 1
824 00:48:16.324229 APIC: 01: enabled 1
825 00:48:16.324402 APIC: 03: enabled 1
826 00:48:16.324515 APIC: 05: enabled 1
827 00:48:16.324835 APIC: 07: enabled 1
828 00:48:16.324927 APIC: 06: enabled 1
829 00:48:16.324990 APIC: 02: enabled 1
830 00:48:16.325050 APIC: 04: enabled 1
831 00:48:16.325110 Root Device scanning...
832 00:48:16.325347 scan_static_bus for Root Device
833 00:48:16.325435 DOMAIN: 0000 enabled
834 00:48:16.325681 CPU_CLUSTER: 0 enabled
835 00:48:16.325744 DOMAIN: 0000 scanning...
836 00:48:16.325803 PCI: pci_scan_bus for bus 00
837 00:48:16.325871 PCI: 00:00.0 [8086/0000] ops
838 00:48:16.325930 PCI: 00:00.0 [8086/9a12] enabled
839 00:48:16.326243 PCI: 00:02.0 [8086/0000] bus ops
840 00:48:16.326305 PCI: 00:02.0 [8086/9a40] enabled
841 00:48:16.329017 PCI: 00:04.0 [8086/0000] bus ops
842 00:48:16.332251 PCI: 00:04.0 [8086/9a03] enabled
843 00:48:16.332357 PCI: 00:05.0 [8086/9a19] enabled
844 00:48:16.336136 PCI: 00:07.0 [0000/0000] hidden
845 00:48:16.338783 PCI: 00:08.0 [8086/9a11] enabled
846 00:48:16.342221 PCI: 00:0a.0 [8086/9a0d] disabled
847 00:48:16.345514 PCI: 00:0d.0 [8086/0000] bus ops
848 00:48:16.348672 PCI: 00:0d.0 [8086/9a13] enabled
849 00:48:16.352221 PCI: 00:14.0 [8086/0000] bus ops
850 00:48:16.355520 PCI: 00:14.0 [8086/a0ed] enabled
851 00:48:16.358685 PCI: 00:14.2 [8086/a0ef] enabled
852 00:48:16.362379 PCI: 00:14.3 [8086/0000] bus ops
853 00:48:16.365773 PCI: 00:14.3 [8086/a0f0] enabled
854 00:48:16.369216 PCI: 00:15.0 [8086/0000] bus ops
855 00:48:16.372089 PCI: 00:15.0 [8086/a0e8] enabled
856 00:48:16.375293 PCI: 00:15.1 [8086/0000] bus ops
857 00:48:16.378774 PCI: 00:15.1 [8086/a0e9] enabled
858 00:48:16.381859 PCI: 00:15.2 [8086/0000] bus ops
859 00:48:16.385281 PCI: 00:15.2 [8086/a0ea] enabled
860 00:48:16.388465 PCI: 00:15.3 [8086/0000] bus ops
861 00:48:16.391745 PCI: 00:15.3 [8086/a0eb] enabled
862 00:48:16.395435 PCI: 00:16.0 [8086/0000] ops
863 00:48:16.398491 PCI: 00:16.0 [8086/a0e0] enabled
864 00:48:16.404762 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 00:48:16.408377 PCI: 00:19.0 [8086/0000] bus ops
866 00:48:16.411409 PCI: 00:19.0 [8086/a0c5] disabled
867 00:48:16.414744 PCI: 00:19.1 [8086/0000] bus ops
868 00:48:16.418469 PCI: 00:19.1 [8086/a0c6] enabled
869 00:48:16.421238 PCI: 00:1d.0 [8086/0000] bus ops
870 00:48:16.424599 PCI: 00:1d.0 [8086/a0b0] enabled
871 00:48:16.428295 PCI: 00:1e.0 [8086/0000] ops
872 00:48:16.431783 PCI: 00:1e.0 [8086/a0a8] enabled
873 00:48:16.434842 PCI: 00:1e.2 [8086/0000] bus ops
874 00:48:16.437968 PCI: 00:1e.2 [8086/a0aa] enabled
875 00:48:16.441421 PCI: 00:1e.3 [8086/0000] bus ops
876 00:48:16.444443 PCI: 00:1e.3 [8086/a0ab] enabled
877 00:48:16.448009 PCI: 00:1f.0 [8086/0000] bus ops
878 00:48:16.451133 PCI: 00:1f.0 [8086/a087] enabled
879 00:48:16.451236 RTC Init
880 00:48:16.454821 Set power on after power failure.
881 00:48:16.457667 Disabling Deep S3
882 00:48:16.461190 Disabling Deep S3
883 00:48:16.461269 Disabling Deep S4
884 00:48:16.464403 Disabling Deep S4
885 00:48:16.464508 Disabling Deep S5
886 00:48:16.467499 Disabling Deep S5
887 00:48:16.470951 PCI: 00:1f.2 [0000/0000] hidden
888 00:48:16.474525 PCI: 00:1f.3 [8086/0000] bus ops
889 00:48:16.478243 PCI: 00:1f.3 [8086/a0c8] enabled
890 00:48:16.480888 PCI: 00:1f.5 [8086/0000] bus ops
891 00:48:16.484500 PCI: 00:1f.5 [8086/a0a4] enabled
892 00:48:16.488101 PCI: Leftover static devices:
893 00:48:16.488213 PCI: 00:10.2
894 00:48:16.491519 PCI: 00:10.6
895 00:48:16.491595 PCI: 00:10.7
896 00:48:16.491703 PCI: 00:06.0
897 00:48:16.494283 PCI: 00:07.1
898 00:48:16.494385 PCI: 00:07.2
899 00:48:16.497283 PCI: 00:07.3
900 00:48:16.497388 PCI: 00:09.0
901 00:48:16.497454 PCI: 00:0d.1
902 00:48:16.500875 PCI: 00:0d.2
903 00:48:16.500949 PCI: 00:0d.3
904 00:48:16.504198 PCI: 00:0e.0
905 00:48:16.504299 PCI: 00:12.0
906 00:48:16.507599 PCI: 00:12.6
907 00:48:16.507714 PCI: 00:13.0
908 00:48:16.507807 PCI: 00:14.1
909 00:48:16.510862 PCI: 00:16.1
910 00:48:16.510968 PCI: 00:16.2
911 00:48:16.514333 PCI: 00:16.3
912 00:48:16.514436 PCI: 00:16.4
913 00:48:16.514544 PCI: 00:16.5
914 00:48:16.517661 PCI: 00:17.0
915 00:48:16.517767 PCI: 00:19.2
916 00:48:16.520692 PCI: 00:1e.1
917 00:48:16.520770 PCI: 00:1f.1
918 00:48:16.520833 PCI: 00:1f.4
919 00:48:16.524436 PCI: 00:1f.6
920 00:48:16.524518 PCI: 00:1f.7
921 00:48:16.527549 PCI: Check your devicetree.cb.
922 00:48:16.531081 PCI: 00:02.0 scanning...
923 00:48:16.534261 scan_generic_bus for PCI: 00:02.0
924 00:48:16.537427 scan_generic_bus for PCI: 00:02.0 done
925 00:48:16.544498 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 00:48:16.544579 PCI: 00:04.0 scanning...
927 00:48:16.550919 scan_generic_bus for PCI: 00:04.0
928 00:48:16.551028 GENERIC: 0.0 enabled
929 00:48:16.557875 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 00:48:16.561087 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 00:48:16.564260 PCI: 00:0d.0 scanning...
932 00:48:16.567538 scan_static_bus for PCI: 00:0d.0
933 00:48:16.570929 USB0 port 0 enabled
934 00:48:16.574140 USB0 port 0 scanning...
935 00:48:16.577265 scan_static_bus for USB0 port 0
936 00:48:16.577371 USB3 port 0 enabled
937 00:48:16.580643 USB3 port 1 enabled
938 00:48:16.584124 USB3 port 2 disabled
939 00:48:16.584230 USB3 port 3 disabled
940 00:48:16.587365 USB3 port 0 scanning...
941 00:48:16.590649 scan_static_bus for USB3 port 0
942 00:48:16.593954 scan_static_bus for USB3 port 0 done
943 00:48:16.600381 scan_bus: bus USB3 port 0 finished in 6 msecs
944 00:48:16.600462 USB3 port 1 scanning...
945 00:48:16.603609 scan_static_bus for USB3 port 1
946 00:48:16.607144 scan_static_bus for USB3 port 1 done
947 00:48:16.613948 scan_bus: bus USB3 port 1 finished in 6 msecs
948 00:48:16.616969 scan_static_bus for USB0 port 0 done
949 00:48:16.620197 scan_bus: bus USB0 port 0 finished in 43 msecs
950 00:48:16.627171 scan_static_bus for PCI: 00:0d.0 done
951 00:48:16.629991 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 00:48:16.633520 PCI: 00:14.0 scanning...
953 00:48:16.637079 scan_static_bus for PCI: 00:14.0
954 00:48:16.637159 USB0 port 0 enabled
955 00:48:16.640793 USB0 port 0 scanning...
956 00:48:16.643272 scan_static_bus for USB0 port 0
957 00:48:16.646837 USB2 port 0 disabled
958 00:48:16.646916 USB2 port 1 enabled
959 00:48:16.650037 USB2 port 2 enabled
960 00:48:16.653199 USB2 port 3 disabled
961 00:48:16.653277 USB2 port 4 enabled
962 00:48:16.656781 USB2 port 5 disabled
963 00:48:16.660118 USB2 port 6 disabled
964 00:48:16.660196 USB2 port 7 disabled
965 00:48:16.663536 USB2 port 8 disabled
966 00:48:16.666743 USB2 port 9 disabled
967 00:48:16.666823 USB3 port 0 disabled
968 00:48:16.670318 USB3 port 1 enabled
969 00:48:16.670398 USB3 port 2 disabled
970 00:48:16.673587 USB3 port 3 disabled
971 00:48:16.676963 USB2 port 1 scanning...
972 00:48:16.680226 scan_static_bus for USB2 port 1
973 00:48:16.683201 scan_static_bus for USB2 port 1 done
974 00:48:16.686858 scan_bus: bus USB2 port 1 finished in 6 msecs
975 00:48:16.690088 USB2 port 2 scanning...
976 00:48:16.693139 scan_static_bus for USB2 port 2
977 00:48:16.696652 scan_static_bus for USB2 port 2 done
978 00:48:16.703304 scan_bus: bus USB2 port 2 finished in 6 msecs
979 00:48:16.703392 USB2 port 4 scanning...
980 00:48:16.706529 scan_static_bus for USB2 port 4
981 00:48:16.713272 scan_static_bus for USB2 port 4 done
982 00:48:16.716660 scan_bus: bus USB2 port 4 finished in 6 msecs
983 00:48:16.720042 USB3 port 1 scanning...
984 00:48:16.723409 scan_static_bus for USB3 port 1
985 00:48:16.726366 scan_static_bus for USB3 port 1 done
986 00:48:16.729840 scan_bus: bus USB3 port 1 finished in 6 msecs
987 00:48:16.733079 scan_static_bus for USB0 port 0 done
988 00:48:16.739850 scan_bus: bus USB0 port 0 finished in 93 msecs
989 00:48:16.743006 scan_static_bus for PCI: 00:14.0 done
990 00:48:16.746316 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
991 00:48:16.749814 PCI: 00:14.3 scanning...
992 00:48:16.753469 scan_static_bus for PCI: 00:14.3
993 00:48:16.756650 GENERIC: 0.0 enabled
994 00:48:16.759700 scan_static_bus for PCI: 00:14.3 done
995 00:48:16.763159 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 00:48:16.766706 PCI: 00:15.0 scanning...
997 00:48:16.769961 scan_static_bus for PCI: 00:15.0
998 00:48:16.773180 I2C: 00:1a enabled
999 00:48:16.773271 I2C: 00:31 enabled
1000 00:48:16.776284 I2C: 00:32 enabled
1001 00:48:16.779714 scan_static_bus for PCI: 00:15.0 done
1002 00:48:16.785972 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1003 00:48:16.786123 PCI: 00:15.1 scanning...
1004 00:48:16.789446 scan_static_bus for PCI: 00:15.1
1005 00:48:16.792902 I2C: 00:10 enabled
1006 00:48:16.796147 scan_static_bus for PCI: 00:15.1 done
1007 00:48:16.802783 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 00:48:16.802934 PCI: 00:15.2 scanning...
1009 00:48:16.805951 scan_static_bus for PCI: 00:15.2
1010 00:48:16.813803 scan_static_bus for PCI: 00:15.2 done
1011 00:48:16.817282 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 00:48:16.820305 PCI: 00:15.3 scanning...
1013 00:48:16.823709 scan_static_bus for PCI: 00:15.3
1014 00:48:16.827204 scan_static_bus for PCI: 00:15.3 done
1015 00:48:16.830371 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 00:48:16.833640 PCI: 00:19.1 scanning...
1017 00:48:16.836838 scan_static_bus for PCI: 00:19.1
1018 00:48:16.840397 I2C: 00:15 enabled
1019 00:48:16.844048 scan_static_bus for PCI: 00:19.1 done
1020 00:48:16.847040 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 00:48:16.850508 PCI: 00:1d.0 scanning...
1022 00:48:16.853602 do_pci_scan_bridge for PCI: 00:1d.0
1023 00:48:16.856979 PCI: pci_scan_bus for bus 01
1024 00:48:16.860170 PCI: 01:00.0 [1c5c/174a] enabled
1025 00:48:16.863397 GENERIC: 0.0 enabled
1026 00:48:16.866920 Enabling Common Clock Configuration
1027 00:48:16.870018 L1 Sub-State supported from root port 29
1028 00:48:16.873536 L1 Sub-State Support = 0xf
1029 00:48:16.876748 CommonModeRestoreTime = 0x28
1030 00:48:16.879817 Power On Value = 0x16, Power On Scale = 0x0
1031 00:48:16.883681 ASPM: Enabled L1
1032 00:48:16.886763 PCIe: Max_Payload_Size adjusted to 128
1033 00:48:16.890204 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 00:48:16.893368 PCI: 00:1e.2 scanning...
1035 00:48:16.896316 scan_generic_bus for PCI: 00:1e.2
1036 00:48:16.899956 SPI: 00 enabled
1037 00:48:16.906270 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 00:48:16.909745 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 00:48:16.913156 PCI: 00:1e.3 scanning...
1040 00:48:16.916046 scan_generic_bus for PCI: 00:1e.3
1041 00:48:16.916309 SPI: 00 enabled
1042 00:48:16.923007 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 00:48:16.929323 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 00:48:16.929605 PCI: 00:1f.0 scanning...
1045 00:48:16.933088 scan_static_bus for PCI: 00:1f.0
1046 00:48:16.936333 PNP: 0c09.0 enabled
1047 00:48:16.939853 PNP: 0c09.0 scanning...
1048 00:48:16.942504 scan_static_bus for PNP: 0c09.0
1049 00:48:16.946222 scan_static_bus for PNP: 0c09.0 done
1050 00:48:16.949680 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 00:48:16.956101 scan_static_bus for PCI: 00:1f.0 done
1052 00:48:16.959710 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 00:48:16.962738 PCI: 00:1f.2 scanning...
1054 00:48:16.966224 scan_static_bus for PCI: 00:1f.2
1055 00:48:16.966501 GENERIC: 0.0 enabled
1056 00:48:16.969170 GENERIC: 0.0 scanning...
1057 00:48:16.973201 scan_static_bus for GENERIC: 0.0
1058 00:48:16.976190 GENERIC: 0.0 enabled
1059 00:48:16.979410 GENERIC: 1.0 enabled
1060 00:48:16.983098 scan_static_bus for GENERIC: 0.0 done
1061 00:48:16.986523 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 00:48:16.989567 scan_static_bus for PCI: 00:1f.2 done
1063 00:48:16.996257 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 00:48:16.999258 PCI: 00:1f.3 scanning...
1065 00:48:17.003104 scan_static_bus for PCI: 00:1f.3
1066 00:48:17.005926 scan_static_bus for PCI: 00:1f.3 done
1067 00:48:17.009361 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 00:48:17.012445 PCI: 00:1f.5 scanning...
1069 00:48:17.015986 scan_generic_bus for PCI: 00:1f.5
1070 00:48:17.018874 scan_generic_bus for PCI: 00:1f.5 done
1071 00:48:17.025941 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 00:48:17.029209 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1073 00:48:17.032609 scan_static_bus for Root Device done
1074 00:48:17.038695 scan_bus: bus Root Device finished in 737 msecs
1075 00:48:17.038937 done
1076 00:48:17.045263 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1077 00:48:17.048611 Chrome EC: UHEPI supported
1078 00:48:17.055176 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 00:48:17.062616 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 00:48:17.065812 SPI flash protection: WPSW=0 SRP0=0
1081 00:48:17.069127 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 00:48:17.075729 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 00:48:17.078788 found VGA at PCI: 00:02.0
1084 00:48:17.082473 Setting up VGA for PCI: 00:02.0
1085 00:48:17.085371 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 00:48:17.092022 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 00:48:17.095676 Allocating resources...
1088 00:48:17.096216 Reading resources...
1089 00:48:17.098748 Root Device read_resources bus 0 link: 0
1090 00:48:17.105619 DOMAIN: 0000 read_resources bus 0 link: 0
1091 00:48:17.108718 PCI: 00:04.0 read_resources bus 1 link: 0
1092 00:48:17.115257 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 00:48:17.118405 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 00:48:17.125332 USB0 port 0 read_resources bus 0 link: 0
1095 00:48:17.128405 USB0 port 0 read_resources bus 0 link: 0 done
1096 00:48:17.135763 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 00:48:17.137986 PCI: 00:14.0 read_resources bus 0 link: 0
1098 00:48:17.141392 USB0 port 0 read_resources bus 0 link: 0
1099 00:48:17.149027 USB0 port 0 read_resources bus 0 link: 0 done
1100 00:48:17.152755 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 00:48:17.159132 PCI: 00:14.3 read_resources bus 0 link: 0
1102 00:48:17.162349 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 00:48:17.169331 PCI: 00:15.0 read_resources bus 0 link: 0
1104 00:48:17.172598 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 00:48:17.179181 PCI: 00:15.1 read_resources bus 0 link: 0
1106 00:48:17.182880 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 00:48:17.190077 PCI: 00:19.1 read_resources bus 0 link: 0
1108 00:48:17.193324 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 00:48:17.199882 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 00:48:17.203054 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 00:48:17.210133 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 00:48:17.213140 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 00:48:17.219714 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 00:48:17.223607 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 00:48:17.229802 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 00:48:17.232915 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 00:48:17.239562 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 00:48:17.242913 GENERIC: 0.0 read_resources bus 0 link: 0
1119 00:48:17.249530 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 00:48:17.252816 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 00:48:17.259831 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 00:48:17.263017 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 00:48:17.269334 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 00:48:17.272771 Root Device read_resources bus 0 link: 0 done
1125 00:48:17.275985 Done reading resources.
1126 00:48:17.282434 Show resources in subtree (Root Device)...After reading.
1127 00:48:17.285629 Root Device child on link 0 DOMAIN: 0000
1128 00:48:17.289081 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 00:48:17.299336 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 00:48:17.309266 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 00:48:17.309661 PCI: 00:00.0
1132 00:48:17.318893 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 00:48:17.328803 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 00:48:17.338833 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 00:48:17.348765 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 00:48:17.359189 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 00:48:17.368588 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 00:48:17.375417 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 00:48:17.385336 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 00:48:17.395109 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 00:48:17.405160 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 00:48:17.415326 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 00:48:17.422138 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 00:48:17.431740 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 00:48:17.442095 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 00:48:17.451640 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 00:48:17.461336 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 00:48:17.471996 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 00:48:17.481571 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 00:48:17.488319 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 00:48:17.497944 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 00:48:17.501378 PCI: 00:02.0
1153 00:48:17.511489 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 00:48:17.521216 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 00:48:17.531318 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 00:48:17.534501 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 00:48:17.544792 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 00:48:17.545116 GENERIC: 0.0
1159 00:48:17.547756 PCI: 00:05.0
1160 00:48:17.557821 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 00:48:17.561104 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 00:48:17.564242 GENERIC: 0.0
1163 00:48:17.564609 PCI: 00:08.0
1164 00:48:17.574373 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 00:48:17.577807 PCI: 00:0a.0
1166 00:48:17.581269 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 00:48:17.590826 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 00:48:17.597697 USB0 port 0 child on link 0 USB3 port 0
1169 00:48:17.597989 USB3 port 0
1170 00:48:17.600935 USB3 port 1
1171 00:48:17.601315 USB3 port 2
1172 00:48:17.603937 USB3 port 3
1173 00:48:17.607212 PCI: 00:14.0 child on link 0 USB0 port 0
1174 00:48:17.617283 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 00:48:17.620674 USB0 port 0 child on link 0 USB2 port 0
1176 00:48:17.624251 USB2 port 0
1177 00:48:17.624696 USB2 port 1
1178 00:48:17.627443 USB2 port 2
1179 00:48:17.630842 USB2 port 3
1180 00:48:17.631175 USB2 port 4
1181 00:48:17.633813 USB2 port 5
1182 00:48:17.634117 USB2 port 6
1183 00:48:17.637578 USB2 port 7
1184 00:48:17.637958 USB2 port 8
1185 00:48:17.640327 USB2 port 9
1186 00:48:17.640658 USB3 port 0
1187 00:48:17.644250 USB3 port 1
1188 00:48:17.644594 USB3 port 2
1189 00:48:17.647143 USB3 port 3
1190 00:48:17.647464 PCI: 00:14.2
1191 00:48:17.656723 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 00:48:17.667176 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 00:48:17.673794 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 00:48:17.683913 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 00:48:17.684407 GENERIC: 0.0
1196 00:48:17.690116 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 00:48:17.700270 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 00:48:17.700680 I2C: 00:1a
1199 00:48:17.703264 I2C: 00:31
1200 00:48:17.703564 I2C: 00:32
1201 00:48:17.707111 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 00:48:17.716897 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 00:48:17.719637 I2C: 00:10
1204 00:48:17.719938 PCI: 00:15.2
1205 00:48:17.729821 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 00:48:17.733309 PCI: 00:15.3
1207 00:48:17.743147 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 00:48:17.743538 PCI: 00:16.0
1209 00:48:17.753292 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 00:48:17.756484 PCI: 00:19.0
1211 00:48:17.759857 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 00:48:17.769476 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 00:48:17.773006 I2C: 00:15
1214 00:48:17.776214 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 00:48:17.786259 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 00:48:17.796379 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 00:48:17.802989 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 00:48:17.806098 GENERIC: 0.0
1219 00:48:17.806400 PCI: 01:00.0
1220 00:48:17.815936 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 00:48:17.825670 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1222 00:48:17.835676 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1223 00:48:17.835981 PCI: 00:1e.0
1224 00:48:17.849328 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 00:48:17.852666 PCI: 00:1e.2 child on link 0 SPI: 00
1226 00:48:17.862602 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 00:48:17.863022 SPI: 00
1228 00:48:17.868931 PCI: 00:1e.3 child on link 0 SPI: 00
1229 00:48:17.878897 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 00:48:17.879301 SPI: 00
1231 00:48:17.882013 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 00:48:17.892033 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 00:48:17.895854 PNP: 0c09.0
1234 00:48:17.901568 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 00:48:17.908419 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 00:48:17.915459 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 00:48:17.925290 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 00:48:17.932276 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 00:48:17.932882 GENERIC: 0.0
1240 00:48:17.934911 GENERIC: 1.0
1241 00:48:17.935325 PCI: 00:1f.3
1242 00:48:17.945116 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 00:48:17.955004 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 00:48:17.958217 PCI: 00:1f.5
1245 00:48:17.968500 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 00:48:17.971626 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 00:48:17.972052 APIC: 00
1248 00:48:17.974634 APIC: 01
1249 00:48:17.975057 APIC: 03
1250 00:48:17.975389 APIC: 05
1251 00:48:17.978122 APIC: 07
1252 00:48:17.978542 APIC: 06
1253 00:48:17.981443 APIC: 02
1254 00:48:17.981886 APIC: 04
1255 00:48:17.988537 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 00:48:17.994999 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 00:48:18.001373 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 00:48:18.008480 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 00:48:18.011354 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 00:48:18.014809 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1261 00:48:18.018384 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1262 00:48:18.027798 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 00:48:18.034540 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1264 00:48:18.041108 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1265 00:48:18.047658 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1266 00:48:18.054464 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1267 00:48:18.064201 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1268 00:48:18.070924 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1269 00:48:18.077492 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1270 00:48:18.080928 DOMAIN: 0000: Resource ranges:
1271 00:48:18.084653 * Base: 1000, Size: 800, Tag: 100
1272 00:48:18.087442 * Base: 1900, Size: e700, Tag: 100
1273 00:48:18.094046 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1274 00:48:18.100992 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1275 00:48:18.107465 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1276 00:48:18.113880 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1277 00:48:18.123748 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1278 00:48:18.130555 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1279 00:48:18.137448 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1280 00:48:18.146873 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1281 00:48:18.153645 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1282 00:48:18.160341 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1283 00:48:18.170182 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1284 00:48:18.176984 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1285 00:48:18.183226 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1286 00:48:18.193435 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1287 00:48:18.199972 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1288 00:48:18.206627 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1289 00:48:18.213231 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1290 00:48:18.223019 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 00:48:18.229784 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 00:48:18.239664 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1293 00:48:18.246389 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 00:48:18.252710 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 00:48:18.262872 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 00:48:18.269555 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 00:48:18.276030 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 00:48:18.279962 DOMAIN: 0000: Resource ranges:
1299 00:48:18.283136 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 00:48:18.289262 * Base: d0000000, Size: 28000000, Tag: 200
1301 00:48:18.293491 * Base: fa000000, Size: 1000000, Tag: 200
1302 00:48:18.295980 * Base: fb001000, Size: 2fff000, Tag: 200
1303 00:48:18.302610 * Base: fe010000, Size: 2e000, Tag: 200
1304 00:48:18.305622 * Base: fe03f000, Size: d41000, Tag: 200
1305 00:48:18.309804 * Base: fed88000, Size: 8000, Tag: 200
1306 00:48:18.312607 * Base: fed93000, Size: d000, Tag: 200
1307 00:48:18.319002 * Base: feda2000, Size: 1e000, Tag: 200
1308 00:48:18.322766 * Base: fede0000, Size: 1220000, Tag: 200
1309 00:48:18.325677 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1310 00:48:18.332344 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 00:48:18.338966 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 00:48:18.345550 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 00:48:18.352103 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 00:48:18.358749 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 00:48:18.365624 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 00:48:18.375233 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 00:48:18.381665 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 00:48:18.388184 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 00:48:18.395053 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 00:48:18.401706 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 00:48:18.408307 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 00:48:18.415400 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 00:48:18.421785 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 00:48:18.428228 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 00:48:18.435213 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 00:48:18.441252 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 00:48:18.448021 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 00:48:18.454711 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 00:48:18.461348 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 00:48:18.468339 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 00:48:18.474541 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 00:48:18.481496 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 00:48:18.488037 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 00:48:18.491706 PCI: 00:1d.0: Resource ranges:
1335 00:48:18.494478 * Base: 7fc00000, Size: 100000, Tag: 200
1336 00:48:18.501604 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 00:48:18.507631 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1338 00:48:18.514706 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1339 00:48:18.524406 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1340 00:48:18.530645 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1341 00:48:18.534405 Root Device assign_resources, bus 0 link: 0
1342 00:48:18.541092 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 00:48:18.547876 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1344 00:48:18.557560 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1345 00:48:18.564137 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1346 00:48:18.574289 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1347 00:48:18.577539 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 00:48:18.584010 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 00:48:18.591059 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1350 00:48:18.600781 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1351 00:48:18.607773 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1352 00:48:18.610229 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 00:48:18.617189 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 00:48:18.623955 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1355 00:48:18.630661 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 00:48:18.634241 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 00:48:18.643786 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1358 00:48:18.650018 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1359 00:48:18.660285 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1360 00:48:18.663444 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 00:48:18.666941 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 00:48:18.677048 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 00:48:18.679999 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 00:48:18.686888 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 00:48:18.693049 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 00:48:18.696896 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 00:48:18.703146 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 00:48:18.710069 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 00:48:18.719454 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 00:48:18.726396 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 00:48:18.736276 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 00:48:18.739825 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 00:48:18.746609 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 00:48:18.752657 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 00:48:18.762450 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 00:48:18.772643 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 00:48:18.775811 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 00:48:18.785620 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 00:48:18.792282 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 00:48:18.798974 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 00:48:18.805352 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 00:48:18.812062 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 00:48:18.819011 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 00:48:18.822124 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 00:48:18.831890 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 00:48:18.835213 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 00:48:18.841729 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 00:48:18.844801 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 00:48:18.851515 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 00:48:18.855061 LPC: Trying to open IO window from 800 size 1ff
1391 00:48:18.864841 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1392 00:48:18.871616 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1393 00:48:18.878155 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1394 00:48:18.884742 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 00:48:18.888076 Root Device assign_resources, bus 0 link: 0
1396 00:48:18.891121 Done setting resources.
1397 00:48:18.897900 Show resources in subtree (Root Device)...After assigning values.
1398 00:48:18.901198 Root Device child on link 0 DOMAIN: 0000
1399 00:48:18.907946 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1400 00:48:18.914097 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1401 00:48:18.924799 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1402 00:48:18.927708 PCI: 00:00.0
1403 00:48:18.937187 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1404 00:48:18.947261 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1405 00:48:18.957134 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1406 00:48:18.963842 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1407 00:48:18.973622 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 00:48:18.983744 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 00:48:18.993469 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 00:48:19.003441 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 00:48:19.013265 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 00:48:19.019928 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1413 00:48:19.030072 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1414 00:48:19.039369 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1415 00:48:19.049667 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1416 00:48:19.059567 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1417 00:48:19.065968 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1418 00:48:19.076205 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1419 00:48:19.085640 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1420 00:48:19.095685 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1421 00:48:19.105816 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1422 00:48:19.115469 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1423 00:48:19.116054 PCI: 00:02.0
1424 00:48:19.128917 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1425 00:48:19.138974 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1426 00:48:19.148273 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1427 00:48:19.151785 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1428 00:48:19.161991 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1429 00:48:19.164964 GENERIC: 0.0
1430 00:48:19.165549 PCI: 00:05.0
1431 00:48:19.178390 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1432 00:48:19.181428 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1433 00:48:19.181985 GENERIC: 0.0
1434 00:48:19.185008 PCI: 00:08.0
1435 00:48:19.195106 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1436 00:48:19.198230 PCI: 00:0a.0
1437 00:48:19.201504 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 00:48:19.211474 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 00:48:19.214879 USB0 port 0 child on link 0 USB3 port 0
1440 00:48:19.217893 USB3 port 0
1441 00:48:19.218414 USB3 port 1
1442 00:48:19.221523 USB3 port 2
1443 00:48:19.221895 USB3 port 3
1444 00:48:19.228445 PCI: 00:14.0 child on link 0 USB0 port 0
1445 00:48:19.237956 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 00:48:19.241778 USB0 port 0 child on link 0 USB2 port 0
1447 00:48:19.243954 USB2 port 0
1448 00:48:19.244271 USB2 port 1
1449 00:48:19.247237 USB2 port 2
1450 00:48:19.247491 USB2 port 3
1451 00:48:19.251102 USB2 port 4
1452 00:48:19.254325 USB2 port 5
1453 00:48:19.254560 USB2 port 6
1454 00:48:19.257447 USB2 port 7
1455 00:48:19.257673 USB2 port 8
1456 00:48:19.260667 USB2 port 9
1457 00:48:19.260852 USB3 port 0
1458 00:48:19.264006 USB3 port 1
1459 00:48:19.264215 USB3 port 2
1460 00:48:19.267060 USB3 port 3
1461 00:48:19.267215 PCI: 00:14.2
1462 00:48:19.276962 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 00:48:19.290350 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 00:48:19.293743 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 00:48:19.303694 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 00:48:19.306812 GENERIC: 0.0
1467 00:48:19.310110 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 00:48:19.320004 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 00:48:19.320148 I2C: 00:1a
1470 00:48:19.323376 I2C: 00:31
1471 00:48:19.323489 I2C: 00:32
1472 00:48:19.329814 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 00:48:19.340034 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 00:48:19.340147 I2C: 00:10
1475 00:48:19.343086 PCI: 00:15.2
1476 00:48:19.353307 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 00:48:19.353439 PCI: 00:15.3
1478 00:48:19.366237 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 00:48:19.366369 PCI: 00:16.0
1480 00:48:19.376331 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 00:48:19.380119 PCI: 00:19.0
1482 00:48:19.383201 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 00:48:19.392703 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 00:48:19.396567 I2C: 00:15
1485 00:48:19.399507 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 00:48:19.409744 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 00:48:19.420038 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 00:48:19.429650 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 00:48:19.432909 GENERIC: 0.0
1490 00:48:19.433030 PCI: 01:00.0
1491 00:48:19.445895 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 00:48:19.456038 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 00:48:19.466045 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 00:48:19.466148 PCI: 00:1e.0
1495 00:48:19.479190 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 00:48:19.482399 PCI: 00:1e.2 child on link 0 SPI: 00
1497 00:48:19.492339 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 00:48:19.492474 SPI: 00
1499 00:48:19.499120 PCI: 00:1e.3 child on link 0 SPI: 00
1500 00:48:19.509277 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 00:48:19.509391 SPI: 00
1502 00:48:19.515454 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 00:48:19.521956 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 00:48:19.525292 PNP: 0c09.0
1505 00:48:19.532070 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 00:48:19.538650 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 00:48:19.545634 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 00:48:19.555642 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 00:48:19.562405 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 00:48:19.562522 GENERIC: 0.0
1511 00:48:19.565543 GENERIC: 1.0
1512 00:48:19.565654 PCI: 00:1f.3
1513 00:48:19.575080 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 00:48:19.588311 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 00:48:19.588530 PCI: 00:1f.5
1516 00:48:19.598344 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 00:48:19.604899 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 00:48:19.605031 APIC: 00
1519 00:48:19.605097 APIC: 01
1520 00:48:19.608213 APIC: 03
1521 00:48:19.608302 APIC: 05
1522 00:48:19.608401 APIC: 07
1523 00:48:19.611391 APIC: 06
1524 00:48:19.611478 APIC: 02
1525 00:48:19.614830 APIC: 04
1526 00:48:19.614944 Done allocating resources.
1527 00:48:19.621617 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 00:48:19.628468 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 00:48:19.631086 Configure GPIOs for I2S audio on UP4.
1530 00:48:19.638885 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 00:48:19.642210 Enabling resources...
1532 00:48:19.645142 PCI: 00:00.0 subsystem <- 8086/9a12
1533 00:48:19.648852 PCI: 00:00.0 cmd <- 06
1534 00:48:19.651967 PCI: 00:02.0 subsystem <- 8086/9a40
1535 00:48:19.655407 PCI: 00:02.0 cmd <- 03
1536 00:48:19.658440 PCI: 00:04.0 subsystem <- 8086/9a03
1537 00:48:19.661791 PCI: 00:04.0 cmd <- 02
1538 00:48:19.664858 PCI: 00:05.0 subsystem <- 8086/9a19
1539 00:48:19.664941 PCI: 00:05.0 cmd <- 02
1540 00:48:19.671700 PCI: 00:08.0 subsystem <- 8086/9a11
1541 00:48:19.671801 PCI: 00:08.0 cmd <- 06
1542 00:48:19.675067 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 00:48:19.678626 PCI: 00:0d.0 cmd <- 02
1544 00:48:19.681673 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 00:48:19.685241 PCI: 00:14.0 cmd <- 02
1546 00:48:19.688418 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 00:48:19.691711 PCI: 00:14.2 cmd <- 02
1548 00:48:19.695440 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 00:48:19.698832 PCI: 00:14.3 cmd <- 02
1550 00:48:19.701463 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 00:48:19.705197 PCI: 00:15.0 cmd <- 02
1552 00:48:19.708193 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 00:48:19.711437 PCI: 00:15.1 cmd <- 02
1554 00:48:19.714808 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 00:48:19.714890 PCI: 00:15.2 cmd <- 02
1556 00:48:19.721337 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 00:48:19.721427 PCI: 00:15.3 cmd <- 02
1558 00:48:19.725030 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 00:48:19.728085 PCI: 00:16.0 cmd <- 02
1560 00:48:19.731324 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 00:48:19.734670 PCI: 00:19.1 cmd <- 02
1562 00:48:19.737860 PCI: 00:1d.0 bridge ctrl <- 0013
1563 00:48:19.741045 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 00:48:19.744372 PCI: 00:1d.0 cmd <- 06
1565 00:48:19.747888 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 00:48:19.751786 PCI: 00:1e.0 cmd <- 06
1567 00:48:19.754610 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 00:48:19.757836 PCI: 00:1e.2 cmd <- 06
1569 00:48:19.761363 PCI: 00:1e.3 subsystem <- 8086/a0ab
1570 00:48:19.764320 PCI: 00:1e.3 cmd <- 02
1571 00:48:19.768092 PCI: 00:1f.0 subsystem <- 8086/a087
1572 00:48:19.768333 PCI: 00:1f.0 cmd <- 407
1573 00:48:19.775141 PCI: 00:1f.3 subsystem <- 8086/a0c8
1574 00:48:19.775583 PCI: 00:1f.3 cmd <- 02
1575 00:48:19.778311 PCI: 00:1f.5 subsystem <- 8086/a0a4
1576 00:48:19.781378 PCI: 00:1f.5 cmd <- 406
1577 00:48:19.786365 PCI: 01:00.0 cmd <- 02
1578 00:48:19.791205 done.
1579 00:48:19.794330 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1580 00:48:19.797552 Initializing devices...
1581 00:48:19.800969 Root Device init
1582 00:48:19.803931 Chrome EC: Set SMI mask to 0x0000000000000000
1583 00:48:19.810810 Chrome EC: clear events_b mask to 0x0000000000000000
1584 00:48:19.817751 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1585 00:48:19.824100 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1586 00:48:19.828151 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1587 00:48:19.834240 Chrome EC: Set WAKE mask to 0x0000000000000000
1588 00:48:19.837797 fw_config match found: DB_USB=USB3_ACTIVE
1589 00:48:19.844169 Configure Right Type-C port orientation for retimer
1590 00:48:19.847548 Root Device init finished in 44 msecs
1591 00:48:19.851178 PCI: 00:00.0 init
1592 00:48:19.854627 CPU TDP = 9 Watts
1593 00:48:19.855231 CPU PL1 = 9 Watts
1594 00:48:19.857816 CPU PL2 = 40 Watts
1595 00:48:19.860451 CPU PL4 = 83 Watts
1596 00:48:19.863987 PCI: 00:00.0 init finished in 8 msecs
1597 00:48:19.867361 PCI: 00:02.0 init
1598 00:48:19.867783 GMA: Found VBT in CBFS
1599 00:48:19.870864 GMA: Found valid VBT in CBFS
1600 00:48:19.877588 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1601 00:48:19.883800 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1602 00:48:19.887075 PCI: 00:02.0 init finished in 18 msecs
1603 00:48:19.890830 PCI: 00:05.0 init
1604 00:48:19.894318 PCI: 00:05.0 init finished in 0 msecs
1605 00:48:19.897106 PCI: 00:08.0 init
1606 00:48:19.900242 PCI: 00:08.0 init finished in 0 msecs
1607 00:48:19.904017 PCI: 00:14.0 init
1608 00:48:19.906991 PCI: 00:14.0 init finished in 0 msecs
1609 00:48:19.910448 PCI: 00:14.2 init
1610 00:48:19.913659 PCI: 00:14.2 init finished in 0 msecs
1611 00:48:19.916809 PCI: 00:15.0 init
1612 00:48:19.920183 I2C bus 0 version 0x3230302a
1613 00:48:19.923577 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 00:48:19.926825 PCI: 00:15.0 init finished in 6 msecs
1615 00:48:19.927243 PCI: 00:15.1 init
1616 00:48:19.930324 I2C bus 1 version 0x3230302a
1617 00:48:19.933482 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 00:48:19.939942 PCI: 00:15.1 init finished in 6 msecs
1619 00:48:19.940392 PCI: 00:15.2 init
1620 00:48:19.943500 I2C bus 2 version 0x3230302a
1621 00:48:19.946903 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 00:48:19.949940 PCI: 00:15.2 init finished in 6 msecs
1623 00:48:19.953327 PCI: 00:15.3 init
1624 00:48:19.956744 I2C bus 3 version 0x3230302a
1625 00:48:19.960246 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 00:48:19.963076 PCI: 00:15.3 init finished in 6 msecs
1627 00:48:19.966786 PCI: 00:16.0 init
1628 00:48:19.969770 PCI: 00:16.0 init finished in 0 msecs
1629 00:48:19.973010 PCI: 00:19.1 init
1630 00:48:19.976810 I2C bus 5 version 0x3230302a
1631 00:48:19.979830 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1632 00:48:19.983640 PCI: 00:19.1 init finished in 6 msecs
1633 00:48:19.986258 PCI: 00:1d.0 init
1634 00:48:19.989500 Initializing PCH PCIe bridge.
1635 00:48:19.993114 PCI: 00:1d.0 init finished in 3 msecs
1636 00:48:19.996654 PCI: 00:1f.0 init
1637 00:48:19.999332 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 00:48:20.002621 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 00:48:20.006281 IOAPIC: ID = 0x02
1640 00:48:20.009487 IOAPIC: Dumping registers
1641 00:48:20.009908 reg 0x0000: 0x02000000
1642 00:48:20.013008 reg 0x0001: 0x00770020
1643 00:48:20.016084 reg 0x0002: 0x00000000
1644 00:48:20.019765 PCI: 00:1f.0 init finished in 21 msecs
1645 00:48:20.022994 PCI: 00:1f.2 init
1646 00:48:20.026560 Disabling ACPI via APMC.
1647 00:48:20.029564 APMC done.
1648 00:48:20.032823 PCI: 00:1f.2 init finished in 5 msecs
1649 00:48:20.044234 PCI: 01:00.0 init
1650 00:48:20.047407 PCI: 01:00.0 init finished in 0 msecs
1651 00:48:20.050889 PNP: 0c09.0 init
1652 00:48:20.054397 Google Chrome EC uptime: 8.355 seconds
1653 00:48:20.060836 Google Chrome AP resets since EC boot: 1
1654 00:48:20.063920 Google Chrome most recent AP reset causes:
1655 00:48:20.067506 0.346: 32775 shutdown: entering G3
1656 00:48:20.073821 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 00:48:20.077307 PNP: 0c09.0 init finished in 22 msecs
1658 00:48:20.083158 Devices initialized
1659 00:48:20.086314 Show all devs... After init.
1660 00:48:20.089284 Root Device: enabled 1
1661 00:48:20.089772 DOMAIN: 0000: enabled 1
1662 00:48:20.092993 CPU_CLUSTER: 0: enabled 1
1663 00:48:20.095707 PCI: 00:00.0: enabled 1
1664 00:48:20.099454 PCI: 00:02.0: enabled 1
1665 00:48:20.099872 PCI: 00:04.0: enabled 1
1666 00:48:20.102495 PCI: 00:05.0: enabled 1
1667 00:48:20.106220 PCI: 00:06.0: enabled 0
1668 00:48:20.108890 PCI: 00:07.0: enabled 0
1669 00:48:20.109310 PCI: 00:07.1: enabled 0
1670 00:48:20.112743 PCI: 00:07.2: enabled 0
1671 00:48:20.115916 PCI: 00:07.3: enabled 0
1672 00:48:20.119333 PCI: 00:08.0: enabled 1
1673 00:48:20.119773 PCI: 00:09.0: enabled 0
1674 00:48:20.122241 PCI: 00:0a.0: enabled 0
1675 00:48:20.125661 PCI: 00:0d.0: enabled 1
1676 00:48:20.129005 PCI: 00:0d.1: enabled 0
1677 00:48:20.129480 PCI: 00:0d.2: enabled 0
1678 00:48:20.132778 PCI: 00:0d.3: enabled 0
1679 00:48:20.135834 PCI: 00:0e.0: enabled 0
1680 00:48:20.139269 PCI: 00:10.2: enabled 1
1681 00:48:20.139798 PCI: 00:10.6: enabled 0
1682 00:48:20.142591 PCI: 00:10.7: enabled 0
1683 00:48:20.145653 PCI: 00:12.0: enabled 0
1684 00:48:20.146068 PCI: 00:12.6: enabled 0
1685 00:48:20.149069 PCI: 00:13.0: enabled 0
1686 00:48:20.152230 PCI: 00:14.0: enabled 1
1687 00:48:20.155657 PCI: 00:14.1: enabled 0
1688 00:48:20.156091 PCI: 00:14.2: enabled 1
1689 00:48:20.158910 PCI: 00:14.3: enabled 1
1690 00:48:20.162397 PCI: 00:15.0: enabled 1
1691 00:48:20.165520 PCI: 00:15.1: enabled 1
1692 00:48:20.165942 PCI: 00:15.2: enabled 1
1693 00:48:20.168810 PCI: 00:15.3: enabled 1
1694 00:48:20.172533 PCI: 00:16.0: enabled 1
1695 00:48:20.175331 PCI: 00:16.1: enabled 0
1696 00:48:20.175754 PCI: 00:16.2: enabled 0
1697 00:48:20.178808 PCI: 00:16.3: enabled 0
1698 00:48:20.182413 PCI: 00:16.4: enabled 0
1699 00:48:20.185487 PCI: 00:16.5: enabled 0
1700 00:48:20.185911 PCI: 00:17.0: enabled 0
1701 00:48:20.188720 PCI: 00:19.0: enabled 0
1702 00:48:20.191984 PCI: 00:19.1: enabled 1
1703 00:48:20.192418 PCI: 00:19.2: enabled 0
1704 00:48:20.195810 PCI: 00:1c.0: enabled 1
1705 00:48:20.198396 PCI: 00:1c.1: enabled 0
1706 00:48:20.201977 PCI: 00:1c.2: enabled 0
1707 00:48:20.202387 PCI: 00:1c.3: enabled 0
1708 00:48:20.205564 PCI: 00:1c.4: enabled 0
1709 00:48:20.208591 PCI: 00:1c.5: enabled 0
1710 00:48:20.212168 PCI: 00:1c.6: enabled 1
1711 00:48:20.212890 PCI: 00:1c.7: enabled 0
1712 00:48:20.215485 PCI: 00:1d.0: enabled 1
1713 00:48:20.218682 PCI: 00:1d.1: enabled 0
1714 00:48:20.221825 PCI: 00:1d.2: enabled 1
1715 00:48:20.222275 PCI: 00:1d.3: enabled 0
1716 00:48:20.225188 PCI: 00:1e.0: enabled 1
1717 00:48:20.228714 PCI: 00:1e.1: enabled 0
1718 00:48:20.232283 PCI: 00:1e.2: enabled 1
1719 00:48:20.233048 PCI: 00:1e.3: enabled 1
1720 00:48:20.235031 PCI: 00:1f.0: enabled 1
1721 00:48:20.238762 PCI: 00:1f.1: enabled 0
1722 00:48:20.239263 PCI: 00:1f.2: enabled 1
1723 00:48:20.241700 PCI: 00:1f.3: enabled 1
1724 00:48:20.245149 PCI: 00:1f.4: enabled 0
1725 00:48:20.248690 PCI: 00:1f.5: enabled 1
1726 00:48:20.249235 PCI: 00:1f.6: enabled 0
1727 00:48:20.251672 PCI: 00:1f.7: enabled 0
1728 00:48:20.255654 APIC: 00: enabled 1
1729 00:48:20.256146 GENERIC: 0.0: enabled 1
1730 00:48:20.258562 GENERIC: 0.0: enabled 1
1731 00:48:20.261479 GENERIC: 1.0: enabled 1
1732 00:48:20.264762 GENERIC: 0.0: enabled 1
1733 00:48:20.265368 GENERIC: 1.0: enabled 1
1734 00:48:20.268298 USB0 port 0: enabled 1
1735 00:48:20.271783 GENERIC: 0.0: enabled 1
1736 00:48:20.274675 USB0 port 0: enabled 1
1737 00:48:20.275097 GENERIC: 0.0: enabled 1
1738 00:48:20.278310 I2C: 00:1a: enabled 1
1739 00:48:20.281840 I2C: 00:31: enabled 1
1740 00:48:20.282286 I2C: 00:32: enabled 1
1741 00:48:20.285069 I2C: 00:10: enabled 1
1742 00:48:20.288081 I2C: 00:15: enabled 1
1743 00:48:20.288529 GENERIC: 0.0: enabled 0
1744 00:48:20.291513 GENERIC: 1.0: enabled 0
1745 00:48:20.294900 GENERIC: 0.0: enabled 1
1746 00:48:20.295468 SPI: 00: enabled 1
1747 00:48:20.298311 SPI: 00: enabled 1
1748 00:48:20.301606 PNP: 0c09.0: enabled 1
1749 00:48:20.305157 GENERIC: 0.0: enabled 1
1750 00:48:20.305588 USB3 port 0: enabled 1
1751 00:48:20.308173 USB3 port 1: enabled 1
1752 00:48:20.311919 USB3 port 2: enabled 0
1753 00:48:20.312565 USB3 port 3: enabled 0
1754 00:48:20.314767 USB2 port 0: enabled 0
1755 00:48:20.318492 USB2 port 1: enabled 1
1756 00:48:20.318916 USB2 port 2: enabled 1
1757 00:48:20.321705 USB2 port 3: enabled 0
1758 00:48:20.324500 USB2 port 4: enabled 1
1759 00:48:20.328060 USB2 port 5: enabled 0
1760 00:48:20.328723 USB2 port 6: enabled 0
1761 00:48:20.331400 USB2 port 7: enabled 0
1762 00:48:20.334784 USB2 port 8: enabled 0
1763 00:48:20.335306 USB2 port 9: enabled 0
1764 00:48:20.338112 USB3 port 0: enabled 0
1765 00:48:20.341803 USB3 port 1: enabled 1
1766 00:48:20.344974 USB3 port 2: enabled 0
1767 00:48:20.345444 USB3 port 3: enabled 0
1768 00:48:20.347731 GENERIC: 0.0: enabled 1
1769 00:48:20.351222 GENERIC: 1.0: enabled 1
1770 00:48:20.351680 APIC: 01: enabled 1
1771 00:48:20.354915 APIC: 03: enabled 1
1772 00:48:20.358002 APIC: 05: enabled 1
1773 00:48:20.358579 APIC: 07: enabled 1
1774 00:48:20.361181 APIC: 06: enabled 1
1775 00:48:20.361635 APIC: 02: enabled 1
1776 00:48:20.364894 APIC: 04: enabled 1
1777 00:48:20.367858 PCI: 01:00.0: enabled 1
1778 00:48:20.371179 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1779 00:48:20.378195 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1780 00:48:20.381324 ELOG: NV offset 0xf30000 size 0x1000
1781 00:48:20.388164 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1782 00:48:20.394623 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:20 UTC
1783 00:48:20.401291 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:20 UTC
1784 00:48:20.407888 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:20 UTC
1785 00:48:20.414404 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:20 UTC
1786 00:48:20.421115 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:20 UTC
1787 00:48:20.427458 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1788 00:48:20.434213 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:20 UTC
1789 00:48:20.440778 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1790 00:48:20.447529 ELOG: Event(A0) added with size 9 at 2023-05-23 00:48:20 UTC
1791 00:48:20.451129 elog_add_boot_reason: Logged dev mode boot
1792 00:48:20.457344 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1793 00:48:20.458365 Finalize devices...
1794 00:48:20.460416 Devices finalized
1795 00:48:20.467607 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1796 00:48:20.470396 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1797 00:48:20.477129 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1798 00:48:20.480691 ME: HFSTS1 : 0x80030055
1799 00:48:20.486848 ME: HFSTS2 : 0x30280116
1800 00:48:20.490453 ME: HFSTS3 : 0x00000050
1801 00:48:20.493863 ME: HFSTS4 : 0x00004000
1802 00:48:20.500528 ME: HFSTS5 : 0x00000000
1803 00:48:20.503313 ME: HFSTS6 : 0x00400006
1804 00:48:20.506580 ME: Manufacturing Mode : YES
1805 00:48:20.510343 ME: SPI Protection Mode Enabled : NO
1806 00:48:20.516750 ME: FW Partition Table : OK
1807 00:48:20.520280 ME: Bringup Loader Failure : NO
1808 00:48:20.523249 ME: Firmware Init Complete : NO
1809 00:48:20.526824 ME: Boot Options Present : NO
1810 00:48:20.529917 ME: Update In Progress : NO
1811 00:48:20.533571 ME: D0i3 Support : YES
1812 00:48:20.536961 ME: Low Power State Enabled : NO
1813 00:48:20.540127 ME: CPU Replaced : YES
1814 00:48:20.546506 ME: CPU Replacement Valid : YES
1815 00:48:20.549711 ME: Current Working State : 5
1816 00:48:20.553648 ME: Current Operation State : 1
1817 00:48:20.556851 ME: Current Operation Mode : 3
1818 00:48:20.559787 ME: Error Code : 0
1819 00:48:20.563410 ME: Enhanced Debug Mode : NO
1820 00:48:20.566849 ME: CPU Debug Disabled : YES
1821 00:48:20.570258 ME: TXT Support : NO
1822 00:48:20.577224 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1823 00:48:20.583007 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1824 00:48:20.586307 CBFS: 'fallback/slic' not found.
1825 00:48:20.593121 ACPI: Writing ACPI tables at 76b01000.
1826 00:48:20.593608 ACPI: * FACS
1827 00:48:20.596644 ACPI: * DSDT
1828 00:48:20.599762 Ramoops buffer: 0x100000@0x76a00000.
1829 00:48:20.603044 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1830 00:48:20.609601 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1831 00:48:20.612878 Google Chrome EC: version:
1832 00:48:20.616649 ro: voema_v2.0.7540-147f8d37d1
1833 00:48:20.619778 rw: voema_v2.0.7540-147f8d37d1
1834 00:48:20.620238 running image: 2
1835 00:48:20.626486 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1836 00:48:20.631062 ACPI: * FADT
1837 00:48:20.631604 SCI is IRQ9
1838 00:48:20.637483 ACPI: added table 1/32, length now 40
1839 00:48:20.637789 ACPI: * SSDT
1840 00:48:20.640164 Found 1 CPU(s) with 8 core(s) each.
1841 00:48:20.646800 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1842 00:48:20.650550 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1843 00:48:20.653694 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1844 00:48:20.657080 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1845 00:48:20.663356 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1846 00:48:20.670168 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1847 00:48:20.673500 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1848 00:48:20.680089 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1849 00:48:20.686514 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1850 00:48:20.690588 \_SB.PCI0.RP09: Added StorageD3Enable property
1851 00:48:20.696694 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1852 00:48:20.700012 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1853 00:48:20.706415 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1854 00:48:20.709638 PS2K: Passing 80 keymaps to kernel
1855 00:48:20.716526 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1856 00:48:20.722827 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1857 00:48:20.729774 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1858 00:48:20.736324 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1859 00:48:20.742944 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1860 00:48:20.749951 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1861 00:48:20.756359 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1862 00:48:20.763099 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1863 00:48:20.766143 ACPI: added table 2/32, length now 44
1864 00:48:20.766253 ACPI: * MCFG
1865 00:48:20.769248 ACPI: added table 3/32, length now 48
1866 00:48:20.772845 ACPI: * TPM2
1867 00:48:20.776465 TPM2 log created at 0x769f0000
1868 00:48:20.779698 ACPI: added table 4/32, length now 52
1869 00:48:20.779786 ACPI: * MADT
1870 00:48:20.782537 SCI is IRQ9
1871 00:48:20.786266 ACPI: added table 5/32, length now 56
1872 00:48:20.789731 current = 76b09850
1873 00:48:20.789808 ACPI: * DMAR
1874 00:48:20.792823 ACPI: added table 6/32, length now 60
1875 00:48:20.796093 ACPI: added table 7/32, length now 64
1876 00:48:20.799170 ACPI: * HPET
1877 00:48:20.802730 ACPI: added table 8/32, length now 68
1878 00:48:20.802814 ACPI: done.
1879 00:48:20.806253 ACPI tables: 35216 bytes.
1880 00:48:20.809355 smbios_write_tables: 769ef000
1881 00:48:20.812754 EC returned error result code 3
1882 00:48:20.816232 Couldn't obtain OEM name from CBI
1883 00:48:20.819039 Create SMBIOS type 16
1884 00:48:20.823030 Create SMBIOS type 17
1885 00:48:20.825866 GENERIC: 0.0 (WIFI Device)
1886 00:48:20.825944 SMBIOS tables: 1750 bytes.
1887 00:48:20.832598 Writing table forward entry at 0x00000500
1888 00:48:20.835699 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1889 00:48:20.842575 Writing coreboot table at 0x76b25000
1890 00:48:20.845825 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1891 00:48:20.852302 1. 0000000000001000-000000000009ffff: RAM
1892 00:48:20.855909 2. 00000000000a0000-00000000000fffff: RESERVED
1893 00:48:20.859253 3. 0000000000100000-00000000769eefff: RAM
1894 00:48:20.865452 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1895 00:48:20.872596 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1896 00:48:20.875867 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1897 00:48:20.882814 7. 0000000077000000-000000007fbfffff: RESERVED
1898 00:48:20.885374 8. 00000000c0000000-00000000cfffffff: RESERVED
1899 00:48:20.892234 9. 00000000f8000000-00000000f9ffffff: RESERVED
1900 00:48:20.895586 10. 00000000fb000000-00000000fb000fff: RESERVED
1901 00:48:20.902062 11. 00000000fe000000-00000000fe00ffff: RESERVED
1902 00:48:20.905791 12. 00000000fed80000-00000000fed87fff: RESERVED
1903 00:48:20.911928 13. 00000000fed90000-00000000fed92fff: RESERVED
1904 00:48:20.915588 14. 00000000feda0000-00000000feda1fff: RESERVED
1905 00:48:20.918924 15. 00000000fedc0000-00000000feddffff: RESERVED
1906 00:48:20.925170 16. 0000000100000000-00000002803fffff: RAM
1907 00:48:20.928433 Passing 4 GPIOs to payload:
1908 00:48:20.932338 NAME | PORT | POLARITY | VALUE
1909 00:48:20.938677 lid | undefined | high | high
1910 00:48:20.941645 power | undefined | high | low
1911 00:48:20.948302 oprom | undefined | high | low
1912 00:48:20.954872 EC in RW | 0x000000e5 | high | high
1913 00:48:20.958291 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a838
1914 00:48:20.962036 coreboot table: 1576 bytes.
1915 00:48:20.964989 IMD ROOT 0. 0x76fff000 0x00001000
1916 00:48:20.971606 IMD SMALL 1. 0x76ffe000 0x00001000
1917 00:48:20.975061 FSP MEMORY 2. 0x76c4e000 0x003b0000
1918 00:48:20.978411 VPD 3. 0x76c4d000 0x00000367
1919 00:48:20.981810 RO MCACHE 4. 0x76c4c000 0x00000fdc
1920 00:48:20.984914 CONSOLE 5. 0x76c2c000 0x00020000
1921 00:48:20.988276 FMAP 6. 0x76c2b000 0x00000578
1922 00:48:20.991536 TIME STAMP 7. 0x76c2a000 0x00000910
1923 00:48:20.994655 VBOOT WORK 8. 0x76c16000 0x00014000
1924 00:48:21.001289 ROMSTG STCK 9. 0x76c15000 0x00001000
1925 00:48:21.004894 AFTER CAR 10. 0x76c0a000 0x0000b000
1926 00:48:21.008568 RAMSTAGE 11. 0x76b97000 0x00073000
1927 00:48:21.011610 REFCODE 12. 0x76b42000 0x00055000
1928 00:48:21.014825 SMM BACKUP 13. 0x76b32000 0x00010000
1929 00:48:21.018030 4f444749 14. 0x76b30000 0x00002000
1930 00:48:21.021416 EXT VBT15. 0x76b2d000 0x0000219f
1931 00:48:21.024999 COREBOOT 16. 0x76b25000 0x00008000
1932 00:48:21.028064 ACPI 17. 0x76b01000 0x00024000
1933 00:48:21.034555 ACPI GNVS 18. 0x76b00000 0x00001000
1934 00:48:21.037883 RAMOOPS 19. 0x76a00000 0x00100000
1935 00:48:21.041070 TPM2 TCGLOG20. 0x769f0000 0x00010000
1936 00:48:21.044250 SMBIOS 21. 0x769ef000 0x00000800
1937 00:48:21.047893 IMD small region:
1938 00:48:21.051039 IMD ROOT 0. 0x76ffec00 0x00000400
1939 00:48:21.054338 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1940 00:48:21.057793 POWER STATE 2. 0x76ffeb80 0x00000044
1941 00:48:21.061145 ROMSTAGE 3. 0x76ffeb60 0x00000004
1942 00:48:21.067447 MEM INFO 4. 0x76ffe980 0x000001e0
1943 00:48:21.071081 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1944 00:48:21.074580 MTRR: Physical address space:
1945 00:48:21.080696 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1946 00:48:21.087340 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1947 00:48:21.094055 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1948 00:48:21.100803 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1949 00:48:21.107594 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1950 00:48:21.114217 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1951 00:48:21.117250 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1952 00:48:21.124058 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 00:48:21.127321 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 00:48:21.131036 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 00:48:21.133716 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 00:48:21.140590 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 00:48:21.143773 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 00:48:21.147446 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 00:48:21.150223 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 00:48:21.156976 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 00:48:21.160317 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 00:48:21.163527 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 00:48:21.167193 call enable_fixed_mtrr()
1964 00:48:21.170267 CPU physical address size: 39 bits
1965 00:48:21.176775 MTRR: default type WB/UC MTRR counts: 6/6.
1966 00:48:21.180099 MTRR: UC selected as default type.
1967 00:48:21.187156 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1968 00:48:21.190402 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1969 00:48:21.196461 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1970 00:48:21.203443 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1971 00:48:21.209614 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1972 00:48:21.216255 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1973 00:48:21.216376
1974 00:48:21.219574 MTRR check
1975 00:48:21.223121 Fixed MTRRs : Enabled
1976 00:48:21.223206 Variable MTRRs: Enabled
1977 00:48:21.223275
1978 00:48:21.229766 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 00:48:21.233312 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 00:48:21.236485 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 00:48:21.239547 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 00:48:21.246353 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 00:48:21.249476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 00:48:21.252627 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 00:48:21.256148 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 00:48:21.259435 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 00:48:21.266120 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 00:48:21.269290 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 00:48:21.276008 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1990 00:48:21.279691 call enable_fixed_mtrr()
1991 00:48:21.282527 Checking cr50 for pending updates
1992 00:48:21.287203 CPU physical address size: 39 bits
1993 00:48:21.290473 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 00:48:21.294090 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 00:48:21.297417 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 00:48:21.301093 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 00:48:21.307326 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 00:48:21.310726 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 00:48:21.314029 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 00:48:21.317318 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 00:48:21.323542 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 00:48:21.326991 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 00:48:21.331007 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 00:48:21.333498 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 00:48:21.341129 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 00:48:21.344298 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 00:48:21.347825 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 00:48:21.351053 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 00:48:21.357795 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 00:48:21.361119 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 00:48:21.364683 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 00:48:21.367722 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 00:48:21.374630 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 00:48:21.377510 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 00:48:21.381155 call enable_fixed_mtrr()
2016 00:48:21.384234 call enable_fixed_mtrr()
2017 00:48:21.387440 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 00:48:21.390743 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 00:48:21.394764 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 00:48:21.401165 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 00:48:21.404301 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 00:48:21.407679 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 00:48:21.410876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 00:48:21.417298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 00:48:21.420657 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 00:48:21.424017 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 00:48:21.427411 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 00:48:21.430697 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 00:48:21.437085 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 00:48:21.440582 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 00:48:21.447403 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 00:48:21.450324 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 00:48:21.453760 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 00:48:21.456930 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 00:48:21.460338 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 00:48:21.467004 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 00:48:21.470238 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 00:48:21.473954 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 00:48:21.477245 call enable_fixed_mtrr()
2040 00:48:21.480545 call enable_fixed_mtrr()
2041 00:48:21.483985 CPU physical address size: 39 bits
2042 00:48:21.486984 CPU physical address size: 39 bits
2043 00:48:21.490565 CPU physical address size: 39 bits
2044 00:48:21.497192 CPU physical address size: 39 bits
2045 00:48:21.500455 Reading cr50 TPM mode
2046 00:48:21.504577 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 00:48:21.506838 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 00:48:21.510778 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 00:48:21.513612 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 00:48:21.520657 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 00:48:21.523441 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 00:48:21.527111 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 00:48:21.530217 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 00:48:21.536739 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 00:48:21.539867 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 00:48:21.543429 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 00:48:21.546717 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 00:48:21.554177 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 00:48:21.554264 call enable_fixed_mtrr()
2060 00:48:21.560750 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 00:48:21.564301 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 00:48:21.567429 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 00:48:21.571089 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 00:48:21.577807 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 00:48:21.580854 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 00:48:21.584523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 00:48:21.587416 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 00:48:21.593809 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 00:48:21.597079 CPU physical address size: 39 bits
2070 00:48:21.600693 call enable_fixed_mtrr()
2071 00:48:21.607033 BS: BS_PAYLOAD_LOAD entry times (exec / console): 221 / 6 ms
2072 00:48:21.610661 CPU physical address size: 39 bits
2073 00:48:21.617208 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2074 00:48:21.623697 Checking segment from ROM address 0xffc02b38
2075 00:48:21.627420 Checking segment from ROM address 0xffc02b54
2076 00:48:21.630435 Loading segment from ROM address 0xffc02b38
2077 00:48:21.633750 code (compression=0)
2078 00:48:21.643413 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2079 00:48:21.650474 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2080 00:48:21.653439 it's not compressed!
2081 00:48:21.792048 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2082 00:48:21.798604 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2083 00:48:21.805061 Loading segment from ROM address 0xffc02b54
2084 00:48:21.808255 Entry Point 0x30000000
2085 00:48:21.808406 Loaded segments
2086 00:48:21.814844 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2087 00:48:21.858003 Finalizing chipset.
2088 00:48:21.861534 Finalizing SMM.
2089 00:48:21.861644 APMC done.
2090 00:48:21.868220 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2091 00:48:21.871499 mp_park_aps done after 0 msecs.
2092 00:48:21.874868 Jumping to boot code at 0x30000000(0x76b25000)
2093 00:48:21.884638 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2094 00:48:21.884737
2095 00:48:21.884805
2096 00:48:21.884866
2097 00:48:21.887853 Starting depthcharge on Voema...
2098 00:48:21.887924
2099 00:48:21.888257 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2100 00:48:21.888377 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2101 00:48:21.888477 Setting prompt string to ['volteer:']
2102 00:48:21.888555 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2103 00:48:21.897660 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2104 00:48:21.897755
2105 00:48:21.904891 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2106 00:48:21.904982
2107 00:48:21.911028 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2108 00:48:21.911114
2109 00:48:21.914265 Failed to find eMMC card reader
2110 00:48:21.914344
2111 00:48:21.914408 Wipe memory regions:
2112 00:48:21.914469
2113 00:48:21.921000 [0x00000000001000, 0x000000000a0000)
2114 00:48:21.921087
2115 00:48:21.923994 [0x00000000100000, 0x00000030000000)
2116 00:48:21.950075
2117 00:48:21.953145 [0x00000032662db0, 0x000000769ef000)
2118 00:48:21.988061
2119 00:48:21.991040 [0x00000100000000, 0x00000280400000)
2120 00:48:22.193203
2121 00:48:22.196273 ec_init: CrosEC protocol v3 supported (256, 256)
2122 00:48:22.196426
2123 00:48:22.203025 update_port_state: port C0 state: usb enable 1 mux conn 0
2124 00:48:22.203156
2125 00:48:22.212897 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2126 00:48:22.213050
2127 00:48:22.219583 pmc_check_ipc_sts: STS_BUSY done after 1563 us
2128 00:48:22.219737
2129 00:48:22.222806 send_conn_disc_msg: pmc_send_cmd succeeded
2130 00:48:22.655877
2131 00:48:22.656030 R8152: Initializing
2132 00:48:22.656098
2133 00:48:22.659188 Version 6 (ocp_data = 5c30)
2134 00:48:22.659279
2135 00:48:22.662113 R8152: Done initializing
2136 00:48:22.662197
2137 00:48:22.665394 Adding net device
2138 00:48:22.967167
2139 00:48:22.970850 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2140 00:48:22.970952
2141 00:48:22.971017
2142 00:48:22.971078
2143 00:48:22.973933 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 00:48:23.074336 volteer: tftpboot 192.168.201.1 10419490/tftp-deploy-l5vudi8z/kernel/bzImage 10419490/tftp-deploy-l5vudi8z/kernel/cmdline 10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
2146 00:48:23.074507 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2147 00:48:23.074619 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2148 00:48:23.078673 tftpboot 192.168.201.1 10419490/tftp-deploy-l5vudi8z/kernel/bzIploy-l5vudi8z/kernel/cmdline 10419490/tftp-deploy-l5vudi8z/ramdisk/ramdisk.cpio.gz
2149 00:48:23.078778
2150 00:48:23.078874 Waiting for link
2151 00:48:23.282076
2152 00:48:23.282224 done.
2153 00:48:23.282291
2154 00:48:23.282351 MAC: 00:24:32:30:79:06
2155 00:48:23.282410
2156 00:48:23.285687 Sending DHCP discover... done.
2157 00:48:23.285771
2158 00:48:23.288786 Waiting for reply... done.
2159 00:48:23.288867
2160 00:48:23.292190 Sending DHCP request... done.
2161 00:48:23.292305
2162 00:48:23.295439 Waiting for reply... done.
2163 00:48:23.295525
2164 00:48:23.298851 My ip is 192.168.201.23
2165 00:48:23.298937
2166 00:48:23.302112 The DHCP server ip is 192.168.201.1
2167 00:48:23.302198
2168 00:48:23.305078 TFTP server IP predefined by user: 192.168.201.1
2169 00:48:23.305163
2170 00:48:23.315332 Bootfile predefined by user: 10419490/tftp-deploy-l5vudi8z/kernel/bzImage
2171 00:48:23.315423
2172 00:48:23.318838 Sending tftp read request... done.
2173 00:48:23.318927
2174 00:48:23.322661 Waiting for the transfer...
2175 00:48:23.322747
2176 00:48:23.881069 00000000 ################################################################
2177 00:48:23.881225
2178 00:48:24.420254 00080000 ################################################################
2179 00:48:24.420461
2180 00:48:24.960888 00100000 ################################################################
2181 00:48:24.961040
2182 00:48:25.497184 00180000 ################################################################
2183 00:48:25.497374
2184 00:48:26.032847 00200000 ################################################################
2185 00:48:26.033030
2186 00:48:26.571530 00280000 ################################################################
2187 00:48:26.571671
2188 00:48:27.101549 00300000 ################################################################
2189 00:48:27.101719
2190 00:48:27.639131 00380000 ################################################################
2191 00:48:27.639311
2192 00:48:28.177759 00400000 ################################################################
2193 00:48:28.177899
2194 00:48:28.726524 00480000 ################################################################
2195 00:48:28.726661
2196 00:48:29.260763 00500000 ################################################################
2197 00:48:29.260904
2198 00:48:29.806859 00580000 ################################################################
2199 00:48:29.807020
2200 00:48:30.323414 00600000 ################################################################
2201 00:48:30.323587
2202 00:48:30.848186 00680000 ################################################################
2203 00:48:30.848345
2204 00:48:31.376232 00700000 ################################################################
2205 00:48:31.376410
2206 00:48:31.896116 00780000 ################################################################
2207 00:48:31.896292
2208 00:48:32.417554 00800000 ################################################################
2209 00:48:32.417756
2210 00:48:32.961701 00880000 ################################################################
2211 00:48:32.962039
2212 00:48:33.615708 00900000 ################################################################
2213 00:48:33.616030
2214 00:48:34.200891 00980000 ################################################################
2215 00:48:34.201026
2216 00:48:34.605463 00a00000 ############################################### done.
2217 00:48:34.605592
2218 00:48:34.608536 The bootfile was 10862592 bytes long.
2219 00:48:34.608612
2220 00:48:34.611552 Sending tftp read request... done.
2221 00:48:34.611639
2222 00:48:34.615285 Waiting for the transfer...
2223 00:48:34.615367
2224 00:48:35.173429 00000000 ################################################################
2225 00:48:35.173561
2226 00:48:35.730809 00080000 ################################################################
2227 00:48:35.730938
2228 00:48:36.269061 00100000 ################################################################
2229 00:48:36.269245
2230 00:48:36.770887 00180000 ################################################################
2231 00:48:36.771063
2232 00:48:37.287889 00200000 ################################################################
2233 00:48:37.288050
2234 00:48:37.806685 00280000 ################################################################
2235 00:48:37.806814
2236 00:48:38.329264 00300000 ################################################################
2237 00:48:38.329410
2238 00:48:38.846280 00380000 ################################################################
2239 00:48:38.846418
2240 00:48:39.360485 00400000 ################################################################
2241 00:48:39.360650
2242 00:48:39.876672 00480000 ################################################################
2243 00:48:39.876836
2244 00:48:40.399776 00500000 ################################################################
2245 00:48:40.399908
2246 00:48:40.941333 00580000 ################################################################
2247 00:48:40.941462
2248 00:48:41.473372 00600000 ################################################################
2249 00:48:41.473507
2250 00:48:42.004042 00680000 ################################################################
2251 00:48:42.004176
2252 00:48:42.535854 00700000 ################################################################
2253 00:48:42.535989
2254 00:48:43.061855 00780000 ################################################################
2255 00:48:43.062006
2256 00:48:43.626024 00800000 ################################################################
2257 00:48:43.626204
2258 00:48:43.945946 00880000 ##################################### done.
2259 00:48:43.946089
2260 00:48:43.949256 Sending tftp read request... done.
2261 00:48:43.949329
2262 00:48:43.952281 Waiting for the transfer...
2263 00:48:43.952420
2264 00:48:43.952511 00000000 # done.
2265 00:48:43.952601
2266 00:48:43.962519 Command line loaded dynamically from TFTP file: 10419490/tftp-deploy-l5vudi8z/kernel/cmdline
2267 00:48:43.962597
2268 00:48:43.975577 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2269 00:48:43.980246
2270 00:48:43.983903 Shutting down all USB controllers.
2271 00:48:43.983985
2272 00:48:43.984050 Removing current net device
2273 00:48:43.984110
2274 00:48:43.986565 Finalizing coreboot
2275 00:48:43.986647
2276 00:48:43.993678 Exiting depthcharge with code 4 at timestamp: 30758169
2277 00:48:43.993760
2278 00:48:43.993824
2279 00:48:43.993884 Starting kernel ...
2280 00:48:43.993943
2281 00:48:43.993998
2282 00:48:43.994367 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2283 00:48:43.994462 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2284 00:48:43.994535 Setting prompt string to ['Linux version [0-9]']
2285 00:48:43.994601 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2286 00:48:43.994671 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2288 00:53:05.995239 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2290 00:53:05.996153 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2292 00:53:05.996927 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2295 00:53:05.998097 end: 2 depthcharge-action (duration 00:05:00) [common]
2297 00:53:05.999099 Cleaning after the job
2298 00:53:05.999503 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/ramdisk
2299 00:53:06.003976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/kernel
2300 00:53:06.009134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419490/tftp-deploy-l5vudi8z/modules
2301 00:53:06.011413 start: 5.1 power-off (timeout 00:00:30) [common]
2302 00:53:06.012112 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2303 00:53:06.122761 >> Command sent successfully.
2304 00:53:06.125628 Returned 0 in 0 seconds
2305 00:53:06.226401 end: 5.1 power-off (duration 00:00:00) [common]
2307 00:53:06.228412 start: 5.2 read-feedback (timeout 00:10:00) [common]
2308 00:53:06.229934 Listened to connection for namespace 'common' for up to 1s
2309 00:53:07.230550 Finalising connection for namespace 'common'
2310 00:53:07.231200 Disconnecting from shell: Finalise
2311 00:53:07.231624
2312 00:53:07.332589 end: 5.2 read-feedback (duration 00:00:01) [common]
2313 00:53:07.333199 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419490
2314 00:53:07.383291 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419490
2315 00:53:07.383516 JobError: Your job cannot terminate cleanly.