Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:48:01.318330 lava-dispatcher, installed at version: 2023.03
2 00:48:01.318568 start: 0 validate
3 00:48:01.318716 Start time: 2023-05-23 00:48:01.318707+00:00 (UTC)
4 00:48:01.318858 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:48:01.319003 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Finitrd.cpio.gz exists
6 00:48:01.611587 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:48:01.612344 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:01.905411 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:01.906218 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 00:48:08.720254 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:48:08.720426 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:48:10.222618 validate duration: 8.90
14 00:48:10.223186 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:48:10.223401 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:48:10.223611 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:48:10.223858 Not decompressing ramdisk as can be used compressed.
18 00:48:10.224060 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/initrd.cpio.gz
19 00:48:10.224232 saving as /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/ramdisk/initrd.cpio.gz
20 00:48:10.224396 total size: 5671581 (5MB)
21 00:48:10.226783 progress 0% (0MB)
22 00:48:10.230183 progress 5% (0MB)
23 00:48:10.233681 progress 10% (0MB)
24 00:48:10.236794 progress 15% (0MB)
25 00:48:10.240354 progress 20% (1MB)
26 00:48:10.243850 progress 25% (1MB)
27 00:48:10.246974 progress 30% (1MB)
28 00:48:10.250387 progress 35% (1MB)
29 00:48:10.253790 progress 40% (2MB)
30 00:48:10.256821 progress 45% (2MB)
31 00:48:10.260219 progress 50% (2MB)
32 00:48:10.263619 progress 55% (3MB)
33 00:48:10.266667 progress 60% (3MB)
34 00:48:10.270086 progress 65% (3MB)
35 00:48:10.273479 progress 70% (3MB)
36 00:48:10.276472 progress 75% (4MB)
37 00:48:10.279589 progress 80% (4MB)
38 00:48:10.282325 progress 85% (4MB)
39 00:48:10.283877 progress 90% (4MB)
40 00:48:10.285596 progress 95% (5MB)
41 00:48:10.287326 progress 100% (5MB)
42 00:48:10.287450 5MB downloaded in 0.06s (85.78MB/s)
43 00:48:10.287617 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:48:10.287883 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:48:10.287978 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:48:10.288071 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:48:10.288202 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 00:48:10.288281 saving as /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/kernel/bzImage
50 00:48:10.288351 total size: 10862592 (10MB)
51 00:48:10.288418 No compression specified
52 00:48:10.289622 progress 0% (0MB)
53 00:48:10.292712 progress 5% (0MB)
54 00:48:10.295917 progress 10% (1MB)
55 00:48:10.298995 progress 15% (1MB)
56 00:48:10.302217 progress 20% (2MB)
57 00:48:10.305232 progress 25% (2MB)
58 00:48:10.308510 progress 30% (3MB)
59 00:48:10.311737 progress 35% (3MB)
60 00:48:10.314774 progress 40% (4MB)
61 00:48:10.317999 progress 45% (4MB)
62 00:48:10.321087 progress 50% (5MB)
63 00:48:10.324317 progress 55% (5MB)
64 00:48:10.327339 progress 60% (6MB)
65 00:48:10.330497 progress 65% (6MB)
66 00:48:10.333745 progress 70% (7MB)
67 00:48:10.336753 progress 75% (7MB)
68 00:48:10.340007 progress 80% (8MB)
69 00:48:10.342990 progress 85% (8MB)
70 00:48:10.346155 progress 90% (9MB)
71 00:48:10.349132 progress 95% (9MB)
72 00:48:10.352324 progress 100% (10MB)
73 00:48:10.352518 10MB downloaded in 0.06s (161.46MB/s)
74 00:48:10.352684 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:48:10.352941 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:48:10.353036 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:48:10.353130 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:48:10.353282 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/full.rootfs.tar.xz
80 00:48:10.353358 saving as /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/nfsrootfs/full.rootfs.tar
81 00:48:10.353427 total size: 125882924 (120MB)
82 00:48:10.353495 Using unxz to decompress xz
83 00:48:10.357482 progress 0% (0MB)
84 00:48:10.881993 progress 5% (6MB)
85 00:48:11.411457 progress 10% (12MB)
86 00:48:11.943841 progress 15% (18MB)
87 00:48:12.487692 progress 20% (24MB)
88 00:48:12.855774 progress 25% (30MB)
89 00:48:13.222392 progress 30% (36MB)
90 00:48:13.513313 progress 35% (42MB)
91 00:48:13.726702 progress 40% (48MB)
92 00:48:14.122046 progress 45% (54MB)
93 00:48:14.520294 progress 50% (60MB)
94 00:48:14.887270 progress 55% (66MB)
95 00:48:15.275792 progress 60% (72MB)
96 00:48:15.643256 progress 65% (78MB)
97 00:48:16.064392 progress 70% (84MB)
98 00:48:16.517704 progress 75% (90MB)
99 00:48:16.977929 progress 80% (96MB)
100 00:48:17.073946 progress 85% (102MB)
101 00:48:17.249551 progress 90% (108MB)
102 00:48:17.612472 progress 95% (114MB)
103 00:48:18.015461 progress 100% (120MB)
104 00:48:18.021769 120MB downloaded in 7.67s (15.66MB/s)
105 00:48:18.022069 end: 1.3.1 http-download (duration 00:00:08) [common]
107 00:48:18.022385 end: 1.3 download-retry (duration 00:00:08) [common]
108 00:48:18.022484 start: 1.4 download-retry (timeout 00:09:52) [common]
109 00:48:18.022580 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 00:48:18.022766 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 00:48:18.022846 saving as /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/modules/modules.tar
112 00:48:18.022931 total size: 484052 (0MB)
113 00:48:18.023002 Using unxz to decompress xz
114 00:48:18.026953 progress 6% (0MB)
115 00:48:18.027366 progress 13% (0MB)
116 00:48:18.027650 progress 20% (0MB)
117 00:48:18.029193 progress 27% (0MB)
118 00:48:18.031564 progress 33% (0MB)
119 00:48:18.033506 progress 40% (0MB)
120 00:48:18.035815 progress 47% (0MB)
121 00:48:18.037891 progress 54% (0MB)
122 00:48:18.040100 progress 60% (0MB)
123 00:48:18.042132 progress 67% (0MB)
124 00:48:18.044474 progress 74% (0MB)
125 00:48:18.047223 progress 81% (0MB)
126 00:48:18.049303 progress 88% (0MB)
127 00:48:18.051304 progress 94% (0MB)
128 00:48:18.054086 progress 100% (0MB)
129 00:48:18.060818 0MB downloaded in 0.04s (12.19MB/s)
130 00:48:18.061097 end: 1.4.1 http-download (duration 00:00:00) [common]
132 00:48:18.061386 end: 1.4 download-retry (duration 00:00:00) [common]
133 00:48:18.061492 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 00:48:18.061604 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 00:48:21.050121 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10419506/extract-nfsrootfs-8rjzefah
136 00:48:21.050323 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 00:48:21.050434 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 00:48:21.050610 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654
139 00:48:21.050747 makedir: /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin
140 00:48:21.050858 makedir: /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/tests
141 00:48:21.050964 makedir: /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/results
142 00:48:21.051094 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-add-keys
143 00:48:21.051346 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-add-sources
144 00:48:21.051485 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-background-process-start
145 00:48:21.051650 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-background-process-stop
146 00:48:21.051787 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-common-functions
147 00:48:21.051932 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-echo-ipv4
148 00:48:21.052076 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-install-packages
149 00:48:21.052227 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-installed-packages
150 00:48:21.052375 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-os-build
151 00:48:21.052509 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-probe-channel
152 00:48:21.052643 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-probe-ip
153 00:48:21.052777 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-target-ip
154 00:48:21.052922 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-target-mac
155 00:48:21.053076 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-target-storage
156 00:48:21.053233 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-case
157 00:48:21.053368 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-event
158 00:48:21.053502 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-feedback
159 00:48:21.053679 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-raise
160 00:48:21.053814 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-reference
161 00:48:21.053947 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-runner
162 00:48:21.054079 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-set
163 00:48:21.054211 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-test-shell
164 00:48:21.054346 Updating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-install-packages (oe)
165 00:48:21.054508 Updating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/bin/lava-installed-packages (oe)
166 00:48:21.054639 Creating /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/environment
167 00:48:21.054742 LAVA metadata
168 00:48:21.054821 - LAVA_JOB_ID=10419506
169 00:48:21.054890 - LAVA_DISPATCHER_IP=192.168.201.1
170 00:48:21.054997 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 00:48:21.055143 skipped lava-vland-overlay
172 00:48:21.055239 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 00:48:21.055325 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 00:48:21.055392 skipped lava-multinode-overlay
175 00:48:21.055472 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 00:48:21.055557 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 00:48:21.055637 Loading test definitions
178 00:48:21.055735 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 00:48:21.055813 Using /lava-10419506 at stage 0
180 00:48:21.055917 Fetching tests from https://github.com/kernelci/test-definitions
181 00:48:21.056002 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/0/tests/0_ltp-mm'
182 00:48:24.050032 Running '/usr/bin/git checkout kernelci.org
183 00:48:24.110314 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
184 00:48:24.111384 uuid=10419506_1.5.2.3.1 testdef=None
185 00:48:24.111596 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 00:48:24.111883 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
188 00:48:24.112807 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 00:48:24.113068 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
191 00:48:24.114779 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 00:48:24.115194 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
194 00:48:24.116410 runner path: /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/0/tests/0_ltp-mm test_uuid 10419506_1.5.2.3.1
195 00:48:24.116513 SKIPFILE='skipfile-lkft.yaml'
196 00:48:24.116586 SKIP_INSTALL='true'
197 00:48:24.116654 TST_CMDFILES='mm'
198 00:48:24.116813 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 00:48:24.117053 Creating lava-test-runner.conf files
201 00:48:24.117126 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419506/lava-overlay-_kfuv654/lava-10419506/0 for stage 0
202 00:48:24.117229 - 0_ltp-mm
203 00:48:24.117349 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
204 00:48:24.117449 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
205 00:48:32.518693 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 00:48:32.518870 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
207 00:48:32.518972 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 00:48:32.519085 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
209 00:48:32.519188 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
210 00:48:32.673151 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 00:48:32.673562 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
212 00:48:32.673705 extracting modules file /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419506/extract-nfsrootfs-8rjzefah
213 00:48:32.699430 extracting modules file /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419506/extract-overlay-ramdisk-bzs6xuw8/ramdisk
214 00:48:32.721790 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 00:48:32.721954 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
216 00:48:32.722064 [common] Applying overlay to NFS
217 00:48:32.722143 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419506/compress-overlay-c4z69d37/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419506/extract-nfsrootfs-8rjzefah
218 00:48:33.743799 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 00:48:33.743977 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 00:48:33.744085 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 00:48:33.744183 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 00:48:33.744278 Building ramdisk /var/lib/lava/dispatcher/tmp/10419506/extract-overlay-ramdisk-bzs6xuw8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419506/extract-overlay-ramdisk-bzs6xuw8/ramdisk
223 00:48:33.837735 >> 31368 blocks
224 00:48:34.526159 rename /var/lib/lava/dispatcher/tmp/10419506/extract-overlay-ramdisk-bzs6xuw8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
225 00:48:34.526623 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 00:48:34.526759 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
227 00:48:34.526872 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
228 00:48:34.526975 No mkimage arch provided, not using FIT.
229 00:48:34.527091 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 00:48:34.527186 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 00:48:34.527299 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
232 00:48:34.527405 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
233 00:48:34.527494 No LXC device requested
234 00:48:34.527582 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 00:48:34.527677 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
236 00:48:34.527766 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 00:48:34.527842 Checking files for TFTP limit of 4294967296 bytes.
238 00:48:34.528275 end: 1 tftp-deploy (duration 00:00:24) [common]
239 00:48:34.528391 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 00:48:34.528492 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 00:48:34.528642 substitutions:
242 00:48:34.528717 - {DTB}: None
243 00:48:34.528785 - {INITRD}: 10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
244 00:48:34.528849 - {KERNEL}: 10419506/tftp-deploy-g_op_fvk/kernel/bzImage
245 00:48:34.528912 - {LAVA_MAC}: None
246 00:48:34.528973 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10419506/extract-nfsrootfs-8rjzefah
247 00:48:34.529056 - {NFS_SERVER_IP}: 192.168.201.1
248 00:48:34.529118 - {PRESEED_CONFIG}: None
249 00:48:34.529179 - {PRESEED_LOCAL}: None
250 00:48:34.529238 - {RAMDISK}: 10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
251 00:48:34.529297 - {ROOT_PART}: None
252 00:48:34.529356 - {ROOT}: None
253 00:48:34.529415 - {SERVER_IP}: 192.168.201.1
254 00:48:34.529473 - {TEE}: None
255 00:48:34.529559 Parsed boot commands:
256 00:48:34.529641 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 00:48:34.529835 Parsed boot commands: tftpboot 192.168.201.1 10419506/tftp-deploy-g_op_fvk/kernel/bzImage 10419506/tftp-deploy-g_op_fvk/kernel/cmdline 10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
258 00:48:34.529932 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 00:48:34.530033 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 00:48:34.530140 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 00:48:34.530233 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 00:48:34.530313 Not connected, no need to disconnect.
263 00:48:34.530394 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 00:48:34.530483 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 00:48:34.530576 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
266 00:48:34.534411 Setting prompt string to ['lava-test: # ']
267 00:48:34.534801 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 00:48:34.534922 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 00:48:34.535033 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 00:48:34.535135 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 00:48:34.535356 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
272 00:48:39.679737 >> Command sent successfully.
273 00:48:39.689882 Returned 0 in 5 seconds
274 00:48:39.791119 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 00:48:39.792527 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 00:48:39.793098 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 00:48:39.793553 Setting prompt string to 'Starting depthcharge on Helios...'
279 00:48:39.793941 Changing prompt to 'Starting depthcharge on Helios...'
280 00:48:39.794356 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 00:48:39.795560 [Enter `^Ec?' for help]
282 00:48:40.405269
283 00:48:40.405947
284 00:48:40.414900 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 00:48:40.418276 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 00:48:40.424597 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 00:48:40.428275 CPU: AES supported, TXT NOT supported, VT supported
288 00:48:40.435510 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 00:48:40.438634 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 00:48:40.445097 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 00:48:40.448464 VBOOT: Loading verstage.
292 00:48:40.451943 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 00:48:40.458722 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 00:48:40.461940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 00:48:40.465516 CBFS @ c08000 size 3f8000
296 00:48:40.471785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 00:48:40.475029 CBFS: Locating 'fallback/verstage'
298 00:48:40.478866 CBFS: Found @ offset 10fb80 size 1072c
299 00:48:40.482037
300 00:48:40.482597
301 00:48:40.492091 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 00:48:40.506277 Probing TPM: . done!
303 00:48:40.509518 TPM ready after 0 ms
304 00:48:40.512664 Connected to device vid:did:rid of 1ae0:0028:00
305 00:48:40.523122 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
306 00:48:40.526742 Initialized TPM device CR50 revision 0
307 00:48:40.568914 tlcl_send_startup: Startup return code is 0
308 00:48:40.569379 TPM: setup succeeded
309 00:48:40.581277 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 00:48:40.584943 Chrome EC: UHEPI supported
311 00:48:40.588889 Phase 1
312 00:48:40.592106 FMAP: area GBB found @ c05000 (12288 bytes)
313 00:48:40.598420 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 00:48:40.598894 Phase 2
315 00:48:40.602111 Phase 3
316 00:48:40.605164 FMAP: area GBB found @ c05000 (12288 bytes)
317 00:48:40.611873 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 00:48:40.618780 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 00:48:40.621782 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 00:48:40.628533 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 00:48:40.644048 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
322 00:48:40.646868 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 00:48:40.653911 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 00:48:40.658051 Phase 4
325 00:48:40.661328 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
326 00:48:40.668141 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 00:48:40.847572 VB2:vb2_rsa_verify_digest() Digest check failed!
328 00:48:40.854292 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 00:48:40.854738 Saving nvdata
330 00:48:40.857994 Reboot requested (10020007)
331 00:48:40.861047 board_reset() called!
332 00:48:40.861643 full_reset() called!
333 00:48:45.371340
334 00:48:45.371493
335 00:48:45.381553 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 00:48:45.385001 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 00:48:45.391466 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 00:48:45.395020 CPU: AES supported, TXT NOT supported, VT supported
339 00:48:45.401785 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 00:48:45.405497 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 00:48:45.411576 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 00:48:45.414748 VBOOT: Loading verstage.
343 00:48:45.418570 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 00:48:45.425058 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 00:48:45.428181 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 00:48:45.431880 CBFS @ c08000 size 3f8000
347 00:48:45.438258 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 00:48:45.441788 CBFS: Locating 'fallback/verstage'
349 00:48:45.444721 CBFS: Found @ offset 10fb80 size 1072c
350 00:48:45.448496
351 00:48:45.448613
352 00:48:45.458523 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 00:48:45.472645 Probing TPM: . done!
354 00:48:45.476389 TPM ready after 0 ms
355 00:48:45.479284 Connected to device vid:did:rid of 1ae0:0028:00
356 00:48:45.489584 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
357 00:48:45.493172 Initialized TPM device CR50 revision 0
358 00:48:45.535460 tlcl_send_startup: Startup return code is 0
359 00:48:45.535571 TPM: setup succeeded
360 00:48:45.548436 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 00:48:45.551488 Chrome EC: UHEPI supported
362 00:48:45.555106 Phase 1
363 00:48:45.558327 FMAP: area GBB found @ c05000 (12288 bytes)
364 00:48:45.565184 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 00:48:45.571433 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 00:48:45.575034 Recovery requested (1009000e)
367 00:48:45.580609 Saving nvdata
368 00:48:45.586881 tlcl_extend: response is 0
369 00:48:45.595625 tlcl_extend: response is 0
370 00:48:45.602454 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 00:48:45.605884 CBFS @ c08000 size 3f8000
372 00:48:45.612908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 00:48:45.616271 CBFS: Locating 'fallback/romstage'
374 00:48:45.619086 CBFS: Found @ offset 80 size 145fc
375 00:48:45.622717 Accumulated console time in verstage 98 ms
376 00:48:45.622816
377 00:48:45.622890
378 00:48:45.635836 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 00:48:45.642343 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 00:48:45.646038 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 00:48:45.649195 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 00:48:45.656022 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 00:48:45.658912 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 00:48:45.662126 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 00:48:45.665793 TCO_STS: 0000 0000
386 00:48:45.668978 GEN_PMCON: e0015238 00000200
387 00:48:45.672172 GBLRST_CAUSE: 00000000 00000000
388 00:48:45.672289 prev_sleep_state 5
389 00:48:45.675300 Boot Count incremented to 57271
390 00:48:45.682816 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 00:48:45.686024 CBFS @ c08000 size 3f8000
392 00:48:45.689197 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 00:48:45.692744 CBFS: Locating 'fspm.bin'
394 00:48:45.695836 CBFS: Found @ offset 5ffc0 size 71000
395 00:48:45.700182 Chrome EC: UHEPI supported
396 00:48:45.707072 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 00:48:45.712271 Probing TPM: done!
398 00:48:45.719235 Connected to device vid:did:rid of 1ae0:0028:00
399 00:48:45.729004 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
400 00:48:45.734609 Initialized TPM device CR50 revision 0
401 00:48:45.743761 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 00:48:45.750589 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 00:48:45.754021 MRC cache found, size 1948
404 00:48:45.757062 bootmode is set to: 2
405 00:48:45.760190 PRMRR disabled by config.
406 00:48:45.760284 SPD INDEX = 1
407 00:48:45.767073 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 00:48:45.770334 CBFS @ c08000 size 3f8000
409 00:48:45.773484 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 00:48:45.777115 CBFS: Locating 'spd.bin'
411 00:48:45.780715 CBFS: Found @ offset 5fb80 size 400
412 00:48:45.783902 SPD: module type is LPDDR3
413 00:48:45.786922 SPD: module part is
414 00:48:45.793906 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 00:48:45.796757 SPD: device width 4 bits, bus width 8 bits
416 00:48:45.800426 SPD: module size is 4096 MB (per channel)
417 00:48:45.803538 memory slot: 0 configuration done.
418 00:48:45.806730 memory slot: 2 configuration done.
419 00:48:45.857701 CBMEM:
420 00:48:45.861301 IMD: root @ 99fff000 254 entries.
421 00:48:45.864712 IMD: root @ 99ffec00 62 entries.
422 00:48:45.867711 External stage cache:
423 00:48:45.870999 IMD: root @ 9abff000 254 entries.
424 00:48:45.874690 IMD: root @ 9abfec00 62 entries.
425 00:48:45.877818 Chrome EC: clear events_b mask to 0x0000000020004000
426 00:48:45.894013 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 00:48:45.907026 tlcl_write: response is 0
428 00:48:45.916261 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 00:48:45.922791 MRC: TPM MRC hash updated successfully.
430 00:48:45.922887 2 DIMMs found
431 00:48:45.926271 SMM Memory Map
432 00:48:45.929659 SMRAM : 0x9a000000 0x1000000
433 00:48:45.932932 Subregion 0: 0x9a000000 0xa00000
434 00:48:45.936017 Subregion 1: 0x9aa00000 0x200000
435 00:48:45.939555 Subregion 2: 0x9ac00000 0x400000
436 00:48:45.942490 top_of_ram = 0x9a000000
437 00:48:45.945864 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 00:48:45.952424 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 00:48:45.956148 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 00:48:45.962789 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 00:48:45.966502 CBFS @ c08000 size 3f8000
442 00:48:45.969376 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 00:48:45.972872 CBFS: Locating 'fallback/postcar'
444 00:48:45.975986 CBFS: Found @ offset 107000 size 4b44
445 00:48:45.982382 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 00:48:45.994898 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 00:48:45.998107 Processing 180 relocs. Offset value of 0x97c0c000
448 00:48:46.006721 Accumulated console time in romstage 286 ms
449 00:48:46.006817
450 00:48:46.006891
451 00:48:46.016620 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 00:48:46.022833 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 00:48:46.026599 CBFS @ c08000 size 3f8000
454 00:48:46.029891 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 00:48:46.036258 CBFS: Locating 'fallback/ramstage'
456 00:48:46.039656 CBFS: Found @ offset 43380 size 1b9e8
457 00:48:46.046120 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 00:48:46.078078 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 00:48:46.081851 Processing 3976 relocs. Offset value of 0x98db0000
460 00:48:46.088095 Accumulated console time in postcar 52 ms
461 00:48:46.088191
462 00:48:46.088265
463 00:48:46.098375 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 00:48:46.104743 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 00:48:46.108286 WARNING: RO_VPD is uninitialized or empty.
466 00:48:46.111366 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 00:48:46.118241 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 00:48:46.118339 Normal boot.
469 00:48:46.124944 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 00:48:46.127935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 00:48:46.131583 CBFS @ c08000 size 3f8000
472 00:48:46.137973 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 00:48:46.141674 CBFS: Locating 'cpu_microcode_blob.bin'
474 00:48:46.144475 CBFS: Found @ offset 14700 size 2ec00
475 00:48:46.148018 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 00:48:46.151718 Skip microcode update
477 00:48:46.154476 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 00:48:46.158109 CBFS @ c08000 size 3f8000
479 00:48:46.164483 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 00:48:46.167982 CBFS: Locating 'fsps.bin'
481 00:48:46.171232 CBFS: Found @ offset d1fc0 size 35000
482 00:48:46.196627 Detected 4 core, 8 thread CPU.
483 00:48:46.199714 Setting up SMI for CPU
484 00:48:46.202871 IED base = 0x9ac00000
485 00:48:46.202978 IED size = 0x00400000
486 00:48:46.206030 Will perform SMM setup.
487 00:48:46.212830 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 00:48:46.219636 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 00:48:46.222806 Processing 16 relocs. Offset value of 0x00030000
490 00:48:46.226490 Attempting to start 7 APs
491 00:48:46.229667 Waiting for 10ms after sending INIT.
492 00:48:46.245848 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
493 00:48:46.245944 done.
494 00:48:46.249522 AP: slot 1 apic_id 2.
495 00:48:46.252950 AP: slot 4 apic_id 3.
496 00:48:46.253044 AP: slot 7 apic_id 6.
497 00:48:46.255948 AP: slot 6 apic_id 7.
498 00:48:46.259390 Waiting for 2nd SIPI to complete...done.
499 00:48:46.262545 AP: slot 5 apic_id 4.
500 00:48:46.266246 AP: slot 2 apic_id 5.
501 00:48:46.272989 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 00:48:46.279497 Processing 13 relocs. Offset value of 0x00038000
503 00:48:46.282548 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 00:48:46.289029 Installing SMM handler to 0x9a000000
505 00:48:46.295919 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 00:48:46.302626 Processing 658 relocs. Offset value of 0x9a010000
507 00:48:46.309347 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 00:48:46.312536 Processing 13 relocs. Offset value of 0x9a008000
509 00:48:46.319202 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 00:48:46.325621 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 00:48:46.332347 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 00:48:46.335340 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 00:48:46.342076 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 00:48:46.348951 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 00:48:46.352506 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 00:48:46.358972 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 00:48:46.362274 Clearing SMI status registers
518 00:48:46.366145 SMI_STS: PM1
519 00:48:46.366239 PM1_STS: PWRBTN
520 00:48:46.368860 TCO_STS: SECOND_TO
521 00:48:46.372888 New SMBASE 0x9a000000
522 00:48:46.375678 In relocation handler: CPU 0
523 00:48:46.379261 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 00:48:46.382722 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 00:48:46.385569 Relocation complete.
526 00:48:46.389286 New SMBASE 0x99fff400
527 00:48:46.389407 In relocation handler: CPU 3
528 00:48:46.395521 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
529 00:48:46.399053 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 00:48:46.402222 Relocation complete.
531 00:48:46.405452 New SMBASE 0x99ffe800
532 00:48:46.405547 In relocation handler: CPU 6
533 00:48:46.412293 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
534 00:48:46.415523 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 00:48:46.418643 Relocation complete.
536 00:48:46.418737 New SMBASE 0x99ffe400
537 00:48:46.422279 In relocation handler: CPU 7
538 00:48:46.428502 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
539 00:48:46.432178 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 00:48:46.435347 Relocation complete.
541 00:48:46.435469 New SMBASE 0x99fffc00
542 00:48:46.439061 In relocation handler: CPU 1
543 00:48:46.442042 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 00:48:46.448790 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 00:48:46.451884 Relocation complete.
546 00:48:46.451978 New SMBASE 0x99fff000
547 00:48:46.455518 In relocation handler: CPU 4
548 00:48:46.459012 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 00:48:46.465342 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 00:48:46.468761 Relocation complete.
551 00:48:46.468887 New SMBASE 0x99fff800
552 00:48:46.472265 In relocation handler: CPU 2
553 00:48:46.475265 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
554 00:48:46.481949 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 00:48:46.482079 Relocation complete.
556 00:48:46.485014 New SMBASE 0x99ffec00
557 00:48:46.488739 In relocation handler: CPU 5
558 00:48:46.492248 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 00:48:46.498721 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 00:48:46.498816 Relocation complete.
561 00:48:46.502176 Initializing CPU #0
562 00:48:46.504991 CPU: vendor Intel device 806ec
563 00:48:46.508569 CPU: family 06, model 8e, stepping 0c
564 00:48:46.511588 Clearing out pending MCEs
565 00:48:46.515400 Setting up local APIC...
566 00:48:46.515497 apic_id: 0x00 done.
567 00:48:46.518644 Turbo is available but hidden
568 00:48:46.521717 Turbo is available and visible
569 00:48:46.525360 VMX status: enabled
570 00:48:46.528443 IA32_FEATURE_CONTROL status: locked
571 00:48:46.531649 Skip microcode update
572 00:48:46.531745 CPU #0 initialized
573 00:48:46.535439 Initializing CPU #3
574 00:48:46.538535 Initializing CPU #1
575 00:48:46.538630 Initializing CPU #4
576 00:48:46.541752 CPU: vendor Intel device 806ec
577 00:48:46.545147 CPU: family 06, model 8e, stepping 0c
578 00:48:46.548671 CPU: vendor Intel device 806ec
579 00:48:46.551822 CPU: family 06, model 8e, stepping 0c
580 00:48:46.554958 Clearing out pending MCEs
581 00:48:46.558171 Clearing out pending MCEs
582 00:48:46.561660 Setting up local APIC...
583 00:48:46.561741 Initializing CPU #5
584 00:48:46.565179 Initializing CPU #2
585 00:48:46.568220 CPU: vendor Intel device 806ec
586 00:48:46.571603 CPU: family 06, model 8e, stepping 0c
587 00:48:46.574980 apic_id: 0x02 done.
588 00:48:46.575069 Setting up local APIC...
589 00:48:46.578546 CPU: vendor Intel device 806ec
590 00:48:46.581509 CPU: family 06, model 8e, stepping 0c
591 00:48:46.585147 Clearing out pending MCEs
592 00:48:46.588077 Initializing CPU #6
593 00:48:46.588172 Initializing CPU #7
594 00:48:46.591770 CPU: vendor Intel device 806ec
595 00:48:46.598545 CPU: family 06, model 8e, stepping 0c
596 00:48:46.598641 CPU: vendor Intel device 806ec
597 00:48:46.605373 CPU: family 06, model 8e, stepping 0c
598 00:48:46.605468 Clearing out pending MCEs
599 00:48:46.608197 Clearing out pending MCEs
600 00:48:46.611442 Setting up local APIC...
601 00:48:46.615066 apic_id: 0x03 done.
602 00:48:46.615193 VMX status: enabled
603 00:48:46.618041 VMX status: enabled
604 00:48:46.621234 IA32_FEATURE_CONTROL status: locked
605 00:48:46.625043 IA32_FEATURE_CONTROL status: locked
606 00:48:46.628153 Skip microcode update
607 00:48:46.628246 Skip microcode update
608 00:48:46.631659 CPU #1 initialized
609 00:48:46.634838 CPU #4 initialized
610 00:48:46.634931 Setting up local APIC...
611 00:48:46.637900 CPU: vendor Intel device 806ec
612 00:48:46.641527 CPU: family 06, model 8e, stepping 0c
613 00:48:46.644796 Clearing out pending MCEs
614 00:48:46.647763 Clearing out pending MCEs
615 00:48:46.651359 Setting up local APIC...
616 00:48:46.651453 apic_id: 0x01 done.
617 00:48:46.654860 apic_id: 0x07 done.
618 00:48:46.658070 Setting up local APIC...
619 00:48:46.661161 Setting up local APIC...
620 00:48:46.661244 VMX status: enabled
621 00:48:46.664920 VMX status: enabled
622 00:48:46.665001 apic_id: 0x06 done.
623 00:48:46.667885 IA32_FEATURE_CONTROL status: locked
624 00:48:46.671233 VMX status: enabled
625 00:48:46.674733 Skip microcode update
626 00:48:46.677615 IA32_FEATURE_CONTROL status: locked
627 00:48:46.677745 CPU #6 initialized
628 00:48:46.681045 Skip microcode update
629 00:48:46.684406 IA32_FEATURE_CONTROL status: locked
630 00:48:46.687838 CPU #7 initialized
631 00:48:46.687935 apic_id: 0x05 done.
632 00:48:46.691184 apic_id: 0x04 done.
633 00:48:46.694784 VMX status: enabled
634 00:48:46.694878 VMX status: enabled
635 00:48:46.697610 IA32_FEATURE_CONTROL status: locked
636 00:48:46.704498 IA32_FEATURE_CONTROL status: locked
637 00:48:46.704593 Skip microcode update
638 00:48:46.707492 Skip microcode update
639 00:48:46.707586 CPU #2 initialized
640 00:48:46.711101 CPU #5 initialized
641 00:48:46.714135 Skip microcode update
642 00:48:46.714229 CPU #3 initialized
643 00:48:46.720999 bsp_do_flight_plan done after 457 msecs.
644 00:48:46.724572 CPU: frequency set to 4200 MHz
645 00:48:46.724668 Enabling SMIs.
646 00:48:46.724744 Locking SMM.
647 00:48:46.740921 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 00:48:46.743915 CBFS @ c08000 size 3f8000
649 00:48:46.750680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 00:48:46.750776 CBFS: Locating 'vbt.bin'
651 00:48:46.753756 CBFS: Found @ offset 5f5c0 size 499
652 00:48:46.760473 Found a VBT of 4608 bytes after decompression
653 00:48:46.941861 Display FSP Version Info HOB
654 00:48:46.945508 Reference Code - CPU = 9.0.1e.30
655 00:48:46.948587 uCode Version = 0.0.0.ca
656 00:48:46.951869 TXT ACM version = ff.ff.ff.ffff
657 00:48:46.955035 Display FSP Version Info HOB
658 00:48:46.958744 Reference Code - ME = 9.0.1e.30
659 00:48:46.961862 MEBx version = 0.0.0.0
660 00:48:46.965415 ME Firmware Version = Consumer SKU
661 00:48:46.968442 Display FSP Version Info HOB
662 00:48:46.972182 Reference Code - CML PCH = 9.0.1e.30
663 00:48:46.972278 PCH-CRID Status = Disabled
664 00:48:46.979236 PCH-CRID Original Value = ff.ff.ff.ffff
665 00:48:46.981989 PCH-CRID New Value = ff.ff.ff.ffff
666 00:48:46.985210 OPROM - RST - RAID = ff.ff.ff.ffff
667 00:48:46.988913 ChipsetInit Base Version = ff.ff.ff.ffff
668 00:48:46.992002 ChipsetInit Oem Version = ff.ff.ff.ffff
669 00:48:46.995839 Display FSP Version Info HOB
670 00:48:46.998554 Reference Code - SA - System Agent = 9.0.1e.30
671 00:48:47.002109 Reference Code - MRC = 0.7.1.6c
672 00:48:47.005402 SA - PCIe Version = 9.0.1e.30
673 00:48:47.008496 SA-CRID Status = Disabled
674 00:48:47.012057 SA-CRID Original Value = 0.0.0.c
675 00:48:47.015169 SA-CRID New Value = 0.0.0.c
676 00:48:47.019213 OPROM - VBIOS = ff.ff.ff.ffff
677 00:48:47.019308 RTC Init
678 00:48:47.022147 Set power on after power failure.
679 00:48:47.025653 Disabling Deep S3
680 00:48:47.028890 Disabling Deep S3
681 00:48:47.028983 Disabling Deep S4
682 00:48:47.031800 Disabling Deep S4
683 00:48:47.031894 Disabling Deep S5
684 00:48:47.035585 Disabling Deep S5
685 00:48:47.042233 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1
686 00:48:47.042328 Enumerating buses...
687 00:48:47.048635 Show all devs... Before device enumeration.
688 00:48:47.048730 Root Device: enabled 1
689 00:48:47.051966 CPU_CLUSTER: 0: enabled 1
690 00:48:47.055265 DOMAIN: 0000: enabled 1
691 00:48:47.055359 APIC: 00: enabled 1
692 00:48:47.059028 PCI: 00:00.0: enabled 1
693 00:48:47.062175 PCI: 00:02.0: enabled 1
694 00:48:47.065909 PCI: 00:04.0: enabled 0
695 00:48:47.066033 PCI: 00:05.0: enabled 0
696 00:48:47.068868 PCI: 00:12.0: enabled 1
697 00:48:47.071990 PCI: 00:12.5: enabled 0
698 00:48:47.072084 PCI: 00:12.6: enabled 0
699 00:48:47.075810 PCI: 00:14.0: enabled 1
700 00:48:47.078946 PCI: 00:14.1: enabled 0
701 00:48:47.082086 PCI: 00:14.3: enabled 1
702 00:48:47.082182 PCI: 00:14.5: enabled 0
703 00:48:47.085720 PCI: 00:15.0: enabled 1
704 00:48:47.088757 PCI: 00:15.1: enabled 1
705 00:48:47.092441 PCI: 00:15.2: enabled 0
706 00:48:47.092536 PCI: 00:15.3: enabled 0
707 00:48:47.095353 PCI: 00:16.0: enabled 1
708 00:48:47.098955 PCI: 00:16.1: enabled 0
709 00:48:47.099050 PCI: 00:16.2: enabled 0
710 00:48:47.101993 PCI: 00:16.3: enabled 0
711 00:48:47.105561 PCI: 00:16.4: enabled 0
712 00:48:47.108686 PCI: 00:16.5: enabled 0
713 00:48:47.108780 PCI: 00:17.0: enabled 1
714 00:48:47.112194 PCI: 00:19.0: enabled 1
715 00:48:47.115404 PCI: 00:19.1: enabled 0
716 00:48:47.118646 PCI: 00:19.2: enabled 0
717 00:48:47.118741 PCI: 00:1a.0: enabled 0
718 00:48:47.122022 PCI: 00:1c.0: enabled 0
719 00:48:47.125174 PCI: 00:1c.1: enabled 0
720 00:48:47.128315 PCI: 00:1c.2: enabled 0
721 00:48:47.128415 PCI: 00:1c.3: enabled 0
722 00:48:47.131743 PCI: 00:1c.4: enabled 0
723 00:48:47.135476 PCI: 00:1c.5: enabled 0
724 00:48:47.138432 PCI: 00:1c.6: enabled 0
725 00:48:47.138527 PCI: 00:1c.7: enabled 0
726 00:48:47.141634 PCI: 00:1d.0: enabled 1
727 00:48:47.145246 PCI: 00:1d.1: enabled 0
728 00:48:47.145361 PCI: 00:1d.2: enabled 0
729 00:48:47.148364 PCI: 00:1d.3: enabled 0
730 00:48:47.151807 PCI: 00:1d.4: enabled 0
731 00:48:47.154868 PCI: 00:1d.5: enabled 1
732 00:48:47.154974 PCI: 00:1e.0: enabled 1
733 00:48:47.158371 PCI: 00:1e.1: enabled 0
734 00:48:47.161876 PCI: 00:1e.2: enabled 1
735 00:48:47.165399 PCI: 00:1e.3: enabled 1
736 00:48:47.165504 PCI: 00:1f.0: enabled 1
737 00:48:47.168647 PCI: 00:1f.1: enabled 1
738 00:48:47.171661 PCI: 00:1f.2: enabled 1
739 00:48:47.171766 PCI: 00:1f.3: enabled 1
740 00:48:47.175283 PCI: 00:1f.4: enabled 1
741 00:48:47.178533 PCI: 00:1f.5: enabled 1
742 00:48:47.181498 PCI: 00:1f.6: enabled 0
743 00:48:47.181626 USB0 port 0: enabled 1
744 00:48:47.184803 I2C: 00:15: enabled 1
745 00:48:47.188499 I2C: 00:5d: enabled 1
746 00:48:47.191589 GENERIC: 0.0: enabled 1
747 00:48:47.191683 I2C: 00:1a: enabled 1
748 00:48:47.195093 I2C: 00:38: enabled 1
749 00:48:47.197991 I2C: 00:39: enabled 1
750 00:48:47.198086 I2C: 00:3a: enabled 1
751 00:48:47.201429 I2C: 00:3b: enabled 1
752 00:48:47.205063 PCI: 00:00.0: enabled 1
753 00:48:47.205159 SPI: 00: enabled 1
754 00:48:47.208027 SPI: 01: enabled 1
755 00:48:47.210947 PNP: 0c09.0: enabled 1
756 00:48:47.211094 USB2 port 0: enabled 1
757 00:48:47.214521 USB2 port 1: enabled 1
758 00:48:47.218328 USB2 port 2: enabled 0
759 00:48:47.218446 USB2 port 3: enabled 0
760 00:48:47.221226 USB2 port 5: enabled 0
761 00:48:47.224560 USB2 port 6: enabled 1
762 00:48:47.224690 USB2 port 9: enabled 1
763 00:48:47.227530 USB3 port 0: enabled 1
764 00:48:47.231385 USB3 port 1: enabled 1
765 00:48:47.234434 USB3 port 2: enabled 1
766 00:48:47.234520 USB3 port 3: enabled 1
767 00:48:47.237969 USB3 port 4: enabled 0
768 00:48:47.240904 APIC: 02: enabled 1
769 00:48:47.240987 APIC: 05: enabled 1
770 00:48:47.244400 APIC: 01: enabled 1
771 00:48:47.244477 APIC: 03: enabled 1
772 00:48:47.247503 APIC: 04: enabled 1
773 00:48:47.251140 APIC: 07: enabled 1
774 00:48:47.251243 APIC: 06: enabled 1
775 00:48:47.254182 Compare with tree...
776 00:48:47.257838 Root Device: enabled 1
777 00:48:47.257955 CPU_CLUSTER: 0: enabled 1
778 00:48:47.260885 APIC: 00: enabled 1
779 00:48:47.264561 APIC: 02: enabled 1
780 00:48:47.264672 APIC: 05: enabled 1
781 00:48:47.267688 APIC: 01: enabled 1
782 00:48:47.271137 APIC: 03: enabled 1
783 00:48:47.274136 APIC: 04: enabled 1
784 00:48:47.274246 APIC: 07: enabled 1
785 00:48:47.277689 APIC: 06: enabled 1
786 00:48:47.280880 DOMAIN: 0000: enabled 1
787 00:48:47.280993 PCI: 00:00.0: enabled 1
788 00:48:47.284305 PCI: 00:02.0: enabled 1
789 00:48:47.287133 PCI: 00:04.0: enabled 0
790 00:48:47.290920 PCI: 00:05.0: enabled 0
791 00:48:47.294090 PCI: 00:12.0: enabled 1
792 00:48:47.294201 PCI: 00:12.5: enabled 0
793 00:48:47.297737 PCI: 00:12.6: enabled 0
794 00:48:47.300702 PCI: 00:14.0: enabled 1
795 00:48:47.304178 USB0 port 0: enabled 1
796 00:48:47.307686 USB2 port 0: enabled 1
797 00:48:47.307769 USB2 port 1: enabled 1
798 00:48:47.310963 USB2 port 2: enabled 0
799 00:48:47.314336 USB2 port 3: enabled 0
800 00:48:47.317308 USB2 port 5: enabled 0
801 00:48:47.320437 USB2 port 6: enabled 1
802 00:48:47.324271 USB2 port 9: enabled 1
803 00:48:47.324357 USB3 port 0: enabled 1
804 00:48:47.326997 USB3 port 1: enabled 1
805 00:48:47.330672 USB3 port 2: enabled 1
806 00:48:47.334000 USB3 port 3: enabled 1
807 00:48:47.337008 USB3 port 4: enabled 0
808 00:48:47.337091 PCI: 00:14.1: enabled 0
809 00:48:47.340862 PCI: 00:14.3: enabled 1
810 00:48:47.343796 PCI: 00:14.5: enabled 0
811 00:48:47.347203 PCI: 00:15.0: enabled 1
812 00:48:47.350167 I2C: 00:15: enabled 1
813 00:48:47.350249 PCI: 00:15.1: enabled 1
814 00:48:47.353905 I2C: 00:5d: enabled 1
815 00:48:47.356906 GENERIC: 0.0: enabled 1
816 00:48:47.360089 PCI: 00:15.2: enabled 0
817 00:48:47.363677 PCI: 00:15.3: enabled 0
818 00:48:47.363760 PCI: 00:16.0: enabled 1
819 00:48:47.366709 PCI: 00:16.1: enabled 0
820 00:48:47.370538 PCI: 00:16.2: enabled 0
821 00:48:47.373746 PCI: 00:16.3: enabled 0
822 00:48:47.376638 PCI: 00:16.4: enabled 0
823 00:48:47.376725 PCI: 00:16.5: enabled 0
824 00:48:47.380167 PCI: 00:17.0: enabled 1
825 00:48:47.383257 PCI: 00:19.0: enabled 1
826 00:48:47.387091 I2C: 00:1a: enabled 1
827 00:48:47.387183 I2C: 00:38: enabled 1
828 00:48:47.390307 I2C: 00:39: enabled 1
829 00:48:47.393427 I2C: 00:3a: enabled 1
830 00:48:47.396409 I2C: 00:3b: enabled 1
831 00:48:47.400015 PCI: 00:19.1: enabled 0
832 00:48:47.400108 PCI: 00:19.2: enabled 0
833 00:48:47.403528 PCI: 00:1a.0: enabled 0
834 00:48:47.406639 PCI: 00:1c.0: enabled 0
835 00:48:47.410213 PCI: 00:1c.1: enabled 0
836 00:48:47.413469 PCI: 00:1c.2: enabled 0
837 00:48:47.413598 PCI: 00:1c.3: enabled 0
838 00:48:47.416316 PCI: 00:1c.4: enabled 0
839 00:48:47.419951 PCI: 00:1c.5: enabled 0
840 00:48:47.423590 PCI: 00:1c.6: enabled 0
841 00:48:47.423699 PCI: 00:1c.7: enabled 0
842 00:48:47.426683 PCI: 00:1d.0: enabled 1
843 00:48:47.429512 PCI: 00:1d.1: enabled 0
844 00:48:47.433437 PCI: 00:1d.2: enabled 0
845 00:48:47.436631 PCI: 00:1d.3: enabled 0
846 00:48:47.436748 PCI: 00:1d.4: enabled 0
847 00:48:47.439775 PCI: 00:1d.5: enabled 1
848 00:48:47.443016 PCI: 00:00.0: enabled 1
849 00:48:47.446276 PCI: 00:1e.0: enabled 1
850 00:48:47.449324 PCI: 00:1e.1: enabled 0
851 00:48:47.449432 PCI: 00:1e.2: enabled 1
852 00:48:47.453014 SPI: 00: enabled 1
853 00:48:47.456299 PCI: 00:1e.3: enabled 1
854 00:48:47.459845 SPI: 01: enabled 1
855 00:48:47.459945 PCI: 00:1f.0: enabled 1
856 00:48:47.462876 PNP: 0c09.0: enabled 1
857 00:48:47.465932 PCI: 00:1f.1: enabled 1
858 00:48:47.469314 PCI: 00:1f.2: enabled 1
859 00:48:47.473021 PCI: 00:1f.3: enabled 1
860 00:48:47.473109 PCI: 00:1f.4: enabled 1
861 00:48:47.476248 PCI: 00:1f.5: enabled 1
862 00:48:47.479272 PCI: 00:1f.6: enabled 0
863 00:48:47.482871 Root Device scanning...
864 00:48:47.485897 scan_static_bus for Root Device
865 00:48:47.485993 CPU_CLUSTER: 0 enabled
866 00:48:47.489467 DOMAIN: 0000 enabled
867 00:48:47.492505 DOMAIN: 0000 scanning...
868 00:48:47.496248 PCI: pci_scan_bus for bus 00
869 00:48:47.499466 PCI: 00:00.0 [8086/0000] ops
870 00:48:47.502508 PCI: 00:00.0 [8086/9b61] enabled
871 00:48:47.505999 PCI: 00:02.0 [8086/0000] bus ops
872 00:48:47.509205 PCI: 00:02.0 [8086/9b41] enabled
873 00:48:47.512831 PCI: 00:04.0 [8086/1903] disabled
874 00:48:47.515989 PCI: 00:08.0 [8086/1911] enabled
875 00:48:47.519454 PCI: 00:12.0 [8086/02f9] enabled
876 00:48:47.522488 PCI: 00:14.0 [8086/0000] bus ops
877 00:48:47.525981 PCI: 00:14.0 [8086/02ed] enabled
878 00:48:47.529573 PCI: 00:14.2 [8086/02ef] enabled
879 00:48:47.532634 PCI: 00:14.3 [8086/02f0] enabled
880 00:48:47.535740 PCI: 00:15.0 [8086/0000] bus ops
881 00:48:47.539595 PCI: 00:15.0 [8086/02e8] enabled
882 00:48:47.542724 PCI: 00:15.1 [8086/0000] bus ops
883 00:48:47.545821 PCI: 00:15.1 [8086/02e9] enabled
884 00:48:47.549158 PCI: 00:16.0 [8086/0000] ops
885 00:48:47.552895 PCI: 00:16.0 [8086/02e0] enabled
886 00:48:47.555816 PCI: 00:17.0 [8086/0000] ops
887 00:48:47.559423 PCI: 00:17.0 [8086/02d3] enabled
888 00:48:47.562363 PCI: 00:19.0 [8086/0000] bus ops
889 00:48:47.565695 PCI: 00:19.0 [8086/02c5] enabled
890 00:48:47.569293 PCI: 00:1d.0 [8086/0000] bus ops
891 00:48:47.572644 PCI: 00:1d.0 [8086/02b0] enabled
892 00:48:47.575730 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 00:48:47.579179 PCI: 00:1e.0 [8086/0000] ops
894 00:48:47.582417 PCI: 00:1e.0 [8086/02a8] enabled
895 00:48:47.585526 PCI: 00:1e.2 [8086/0000] bus ops
896 00:48:47.589173 PCI: 00:1e.2 [8086/02aa] enabled
897 00:48:47.592195 PCI: 00:1e.3 [8086/0000] bus ops
898 00:48:47.595675 PCI: 00:1e.3 [8086/02ab] enabled
899 00:48:47.599209 PCI: 00:1f.0 [8086/0000] bus ops
900 00:48:47.602457 PCI: 00:1f.0 [8086/0284] enabled
901 00:48:47.609218 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 00:48:47.612608 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 00:48:47.615657 PCI: 00:1f.3 [8086/0000] bus ops
904 00:48:47.619107 PCI: 00:1f.3 [8086/02c8] enabled
905 00:48:47.622178 PCI: 00:1f.4 [8086/0000] bus ops
906 00:48:47.625804 PCI: 00:1f.4 [8086/02a3] enabled
907 00:48:47.628734 PCI: 00:1f.5 [8086/0000] bus ops
908 00:48:47.632286 PCI: 00:1f.5 [8086/02a4] enabled
909 00:48:47.636022 PCI: Leftover static devices:
910 00:48:47.639181 PCI: 00:05.0
911 00:48:47.639275 PCI: 00:12.5
912 00:48:47.642379 PCI: 00:12.6
913 00:48:47.642472 PCI: 00:14.1
914 00:48:47.642546 PCI: 00:14.5
915 00:48:47.645494 PCI: 00:15.2
916 00:48:47.645622 PCI: 00:15.3
917 00:48:47.649374 PCI: 00:16.1
918 00:48:47.649468 PCI: 00:16.2
919 00:48:47.652441 PCI: 00:16.3
920 00:48:47.652534 PCI: 00:16.4
921 00:48:47.652608 PCI: 00:16.5
922 00:48:47.655586 PCI: 00:19.1
923 00:48:47.655679 PCI: 00:19.2
924 00:48:47.658691 PCI: 00:1a.0
925 00:48:47.658788 PCI: 00:1c.0
926 00:48:47.658863 PCI: 00:1c.1
927 00:48:47.662505 PCI: 00:1c.2
928 00:48:47.662598 PCI: 00:1c.3
929 00:48:47.665446 PCI: 00:1c.4
930 00:48:47.665539 PCI: 00:1c.5
931 00:48:47.665623 PCI: 00:1c.6
932 00:48:47.669181 PCI: 00:1c.7
933 00:48:47.669274 PCI: 00:1d.1
934 00:48:47.672532 PCI: 00:1d.2
935 00:48:47.672625 PCI: 00:1d.3
936 00:48:47.675441 PCI: 00:1d.4
937 00:48:47.675533 PCI: 00:1d.5
938 00:48:47.675607 PCI: 00:1e.1
939 00:48:47.678674 PCI: 00:1f.1
940 00:48:47.678767 PCI: 00:1f.2
941 00:48:47.682064 PCI: 00:1f.6
942 00:48:47.685304 PCI: Check your devicetree.cb.
943 00:48:47.685427 PCI: 00:02.0 scanning...
944 00:48:47.688879 scan_generic_bus for PCI: 00:02.0
945 00:48:47.695641 scan_generic_bus for PCI: 00:02.0 done
946 00:48:47.698655 scan_bus: scanning of bus PCI: 00:02.0 took 10183 usecs
947 00:48:47.702214 PCI: 00:14.0 scanning...
948 00:48:47.705184 scan_static_bus for PCI: 00:14.0
949 00:48:47.709022 USB0 port 0 enabled
950 00:48:47.709125 USB0 port 0 scanning...
951 00:48:47.711992 scan_static_bus for USB0 port 0
952 00:48:47.715818 USB2 port 0 enabled
953 00:48:47.718827 USB2 port 1 enabled
954 00:48:47.718919 USB2 port 2 disabled
955 00:48:47.721928 USB2 port 3 disabled
956 00:48:47.725391 USB2 port 5 disabled
957 00:48:47.725483 USB2 port 6 enabled
958 00:48:47.728922 USB2 port 9 enabled
959 00:48:47.729048 USB3 port 0 enabled
960 00:48:47.731987 USB3 port 1 enabled
961 00:48:47.735717 USB3 port 2 enabled
962 00:48:47.735811 USB3 port 3 enabled
963 00:48:47.739054 USB3 port 4 disabled
964 00:48:47.742202 USB2 port 0 scanning...
965 00:48:47.745331 scan_static_bus for USB2 port 0
966 00:48:47.749151 scan_static_bus for USB2 port 0 done
967 00:48:47.752419 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
968 00:48:47.755599 USB2 port 1 scanning...
969 00:48:47.758711 scan_static_bus for USB2 port 1
970 00:48:47.761846 scan_static_bus for USB2 port 1 done
971 00:48:47.768836 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
972 00:48:47.771933 USB2 port 6 scanning...
973 00:48:47.775647 scan_static_bus for USB2 port 6
974 00:48:47.779191 scan_static_bus for USB2 port 6 done
975 00:48:47.782260 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
976 00:48:47.785021 USB2 port 9 scanning...
977 00:48:47.788809 scan_static_bus for USB2 port 9
978 00:48:47.791712 scan_static_bus for USB2 port 9 done
979 00:48:47.798356 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
980 00:48:47.802091 USB3 port 0 scanning...
981 00:48:47.805172 scan_static_bus for USB3 port 0
982 00:48:47.808670 scan_static_bus for USB3 port 0 done
983 00:48:47.811660 scan_bus: scanning of bus USB3 port 0 took 9685 usecs
984 00:48:47.815586 USB3 port 1 scanning...
985 00:48:47.818666 scan_static_bus for USB3 port 1
986 00:48:47.821978 scan_static_bus for USB3 port 1 done
987 00:48:47.828540 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
988 00:48:47.831575 USB3 port 2 scanning...
989 00:48:47.835228 scan_static_bus for USB3 port 2
990 00:48:47.838701 scan_static_bus for USB3 port 2 done
991 00:48:47.841614 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
992 00:48:47.845192 USB3 port 3 scanning...
993 00:48:47.848757 scan_static_bus for USB3 port 3
994 00:48:47.851916 scan_static_bus for USB3 port 3 done
995 00:48:47.858769 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
996 00:48:47.861933 scan_static_bus for USB0 port 0 done
997 00:48:47.868780 scan_bus: scanning of bus USB0 port 0 took 155262 usecs
998 00:48:47.871885 scan_static_bus for PCI: 00:14.0 done
999 00:48:47.878567 scan_bus: scanning of bus PCI: 00:14.0 took 172874 usecs
1000 00:48:47.878668 PCI: 00:15.0 scanning...
1001 00:48:47.881700 scan_generic_bus for PCI: 00:15.0
1002 00:48:47.888605 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 00:48:47.891740 scan_generic_bus for PCI: 00:15.0 done
1004 00:48:47.898267 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1005 00:48:47.898362 PCI: 00:15.1 scanning...
1006 00:48:47.901697 scan_generic_bus for PCI: 00:15.1
1007 00:48:47.908233 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 00:48:47.911972 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 00:48:47.914879 scan_generic_bus for PCI: 00:15.1 done
1010 00:48:47.921352 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1011 00:48:47.925226 PCI: 00:19.0 scanning...
1012 00:48:47.928386 scan_generic_bus for PCI: 00:19.0
1013 00:48:47.931454 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 00:48:47.935169 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 00:48:47.938023 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 00:48:47.944512 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 00:48:47.948121 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 00:48:47.951609 scan_generic_bus for PCI: 00:19.0 done
1019 00:48:47.958241 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1020 00:48:47.958334 PCI: 00:1d.0 scanning...
1021 00:48:47.964855 do_pci_scan_bridge for PCI: 00:1d.0
1022 00:48:47.964941 PCI: pci_scan_bus for bus 01
1023 00:48:47.968118 PCI: 01:00.0 [1c5c/1327] enabled
1024 00:48:47.974806 Enabling Common Clock Configuration
1025 00:48:47.978275 L1 Sub-State supported from root port 29
1026 00:48:47.981837 L1 Sub-State Support = 0xf
1027 00:48:47.985066 CommonModeRestoreTime = 0x28
1028 00:48:47.988250 Power On Value = 0x16, Power On Scale = 0x0
1029 00:48:47.988343 ASPM: Enabled L1
1030 00:48:47.994976 scan_bus: scanning of bus PCI: 00:1d.0 took 32768 usecs
1031 00:48:47.998529 PCI: 00:1e.2 scanning...
1032 00:48:48.001759 scan_generic_bus for PCI: 00:1e.2
1033 00:48:48.005263 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 00:48:48.008177 scan_generic_bus for PCI: 00:1e.2 done
1035 00:48:48.014741 scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs
1036 00:48:48.018422 PCI: 00:1e.3 scanning...
1037 00:48:48.021998 scan_generic_bus for PCI: 00:1e.3
1038 00:48:48.024888 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 00:48:48.028276 scan_generic_bus for PCI: 00:1e.3 done
1040 00:48:48.035053 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1041 00:48:48.035166 PCI: 00:1f.0 scanning...
1042 00:48:48.042103 scan_static_bus for PCI: 00:1f.0
1043 00:48:48.042222 PNP: 0c09.0 enabled
1044 00:48:48.044926 scan_static_bus for PCI: 00:1f.0 done
1045 00:48:48.051570 scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs
1046 00:48:48.055542 PCI: 00:1f.3 scanning...
1047 00:48:48.058741 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1048 00:48:48.061825 PCI: 00:1f.4 scanning...
1049 00:48:48.065090 scan_generic_bus for PCI: 00:1f.4
1050 00:48:48.068322 scan_generic_bus for PCI: 00:1f.4 done
1051 00:48:48.075130 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1052 00:48:48.078251 PCI: 00:1f.5 scanning...
1053 00:48:48.081751 scan_generic_bus for PCI: 00:1f.5
1054 00:48:48.085089 scan_generic_bus for PCI: 00:1f.5 done
1055 00:48:48.091446 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1056 00:48:48.098394 scan_bus: scanning of bus DOMAIN: 0000 took 604810 usecs
1057 00:48:48.101377 scan_static_bus for Root Device done
1058 00:48:48.105214 scan_bus: scanning of bus Root Device took 624712 usecs
1059 00:48:48.108385 done
1060 00:48:48.111329 Chrome EC: UHEPI supported
1061 00:48:48.114954 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 00:48:48.121397 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 00:48:48.128595 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 00:48:48.134872 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 00:48:48.138209 SPI flash protection: WPSW=0 SRP0=0
1066 00:48:48.144804 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 00:48:48.148443 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 00:48:48.151351 found VGA at PCI: 00:02.0
1069 00:48:48.154826 Setting up VGA for PCI: 00:02.0
1070 00:48:48.161183 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 00:48:48.164777 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 00:48:48.167888 Allocating resources...
1073 00:48:48.167986 Reading resources...
1074 00:48:48.174645 Root Device read_resources bus 0 link: 0
1075 00:48:48.177935 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 00:48:48.184639 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 00:48:48.188194 DOMAIN: 0000 read_resources bus 0 link: 0
1078 00:48:48.194552 PCI: 00:14.0 read_resources bus 0 link: 0
1079 00:48:48.197538 USB0 port 0 read_resources bus 0 link: 0
1080 00:48:48.206122 USB0 port 0 read_resources bus 0 link: 0 done
1081 00:48:48.209289 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 00:48:48.216644 PCI: 00:15.0 read_resources bus 1 link: 0
1083 00:48:48.220387 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 00:48:48.226444 PCI: 00:15.1 read_resources bus 2 link: 0
1085 00:48:48.230254 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 00:48:48.237068 PCI: 00:19.0 read_resources bus 3 link: 0
1087 00:48:48.244015 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 00:48:48.247358 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 00:48:48.254326 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 00:48:48.257205 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 00:48:48.264268 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 00:48:48.267586 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 00:48:48.274366 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 00:48:48.277412 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 00:48:48.284406 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 00:48:48.287553 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 00:48:48.294085 Root Device read_resources bus 0 link: 0 done
1098 00:48:48.297824 Done reading resources.
1099 00:48:48.301035 Show resources in subtree (Root Device)...After reading.
1100 00:48:48.307646 Root Device child on link 0 CPU_CLUSTER: 0
1101 00:48:48.311341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 00:48:48.311428 APIC: 00
1103 00:48:48.314587 APIC: 02
1104 00:48:48.314670 APIC: 05
1105 00:48:48.314740 APIC: 01
1106 00:48:48.317563 APIC: 03
1107 00:48:48.317655 APIC: 04
1108 00:48:48.321279 APIC: 07
1109 00:48:48.321370 APIC: 06
1110 00:48:48.324365 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 00:48:48.334287 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 00:48:48.390361 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 00:48:48.390484 PCI: 00:00.0
1114 00:48:48.390752 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 00:48:48.390858 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 00:48:48.392360 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 00:48:48.392621 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 00:48:48.440355 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 00:48:48.440647 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 00:48:48.440913 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 00:48:48.441057 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 00:48:48.441513 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 00:48:48.441631 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 00:48:48.490347 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 00:48:48.490994 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 00:48:48.491322 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 00:48:48.491591 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 00:48:48.491856 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 00:48:48.502258 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 00:48:48.502349 PCI: 00:02.0
1131 00:48:48.508498 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 00:48:48.518263 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 00:48:48.525009 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 00:48:48.528163 PCI: 00:04.0
1135 00:48:48.528254 PCI: 00:08.0
1136 00:48:48.538136 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 00:48:48.541328 PCI: 00:12.0
1138 00:48:48.551513 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 00:48:48.555196 PCI: 00:14.0 child on link 0 USB0 port 0
1140 00:48:48.565180 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 00:48:48.568239 USB0 port 0 child on link 0 USB2 port 0
1142 00:48:48.571671 USB2 port 0
1143 00:48:48.575124 USB2 port 1
1144 00:48:48.575215 USB2 port 2
1145 00:48:48.578328 USB2 port 3
1146 00:48:48.578418 USB2 port 5
1147 00:48:48.581415 USB2 port 6
1148 00:48:48.581535 USB2 port 9
1149 00:48:48.584707 USB3 port 0
1150 00:48:48.584797 USB3 port 1
1151 00:48:48.588155 USB3 port 2
1152 00:48:48.588268 USB3 port 3
1153 00:48:48.591711 USB3 port 4
1154 00:48:48.591803 PCI: 00:14.2
1155 00:48:48.601356 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 00:48:48.611692 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 00:48:48.614880 PCI: 00:14.3
1158 00:48:48.624708 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 00:48:48.627926 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 00:48:48.637639 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 00:48:48.641432 I2C: 01:15
1162 00:48:48.644539 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 00:48:48.654372 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 00:48:48.654465 I2C: 02:5d
1165 00:48:48.658170 GENERIC: 0.0
1166 00:48:48.658298 PCI: 00:16.0
1167 00:48:48.667697 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 00:48:48.671286 PCI: 00:17.0
1169 00:48:48.680921 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 00:48:48.687851 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 00:48:48.697509 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 00:48:48.704131 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 00:48:48.714216 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 00:48:48.721103 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 00:48:48.727237 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 00:48:48.737286 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 00:48:48.737403 I2C: 03:1a
1178 00:48:48.740822 I2C: 03:38
1179 00:48:48.740937 I2C: 03:39
1180 00:48:48.744051 I2C: 03:3a
1181 00:48:48.744163 I2C: 03:3b
1182 00:48:48.747114 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 00:48:48.757512 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 00:48:48.767642 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 00:48:48.777084 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 00:48:48.777178 PCI: 01:00.0
1187 00:48:48.787193 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 00:48:48.790335 PCI: 00:1e.0
1189 00:48:48.800179 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 00:48:48.810641 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 00:48:48.814019 PCI: 00:1e.2 child on link 0 SPI: 00
1192 00:48:48.823706 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 00:48:48.827468 SPI: 00
1194 00:48:48.830414 PCI: 00:1e.3 child on link 0 SPI: 01
1195 00:48:48.840456 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 00:48:48.840550 SPI: 01
1197 00:48:48.844238 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 00:48:48.853604 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 00:48:48.863934 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 00:48:48.864028 PNP: 0c09.0
1201 00:48:48.874177 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 00:48:48.874271 PCI: 00:1f.3
1203 00:48:48.883924 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 00:48:48.893428 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 00:48:48.897128 PCI: 00:1f.4
1206 00:48:48.906865 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 00:48:48.916720 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 00:48:48.916819 PCI: 00:1f.5
1209 00:48:48.926515 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 00:48:48.933156 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 00:48:48.939870 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 00:48:48.946625 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 00:48:48.949846 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 00:48:48.953049 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 00:48:48.956765 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 00:48:48.959919 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 00:48:48.966713 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 00:48:48.973435 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 00:48:48.983143 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 00:48:48.989614 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 00:48:48.996658 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 00:48:48.999862 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 00:48:49.009508 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 00:48:49.012901 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 00:48:49.019505 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 00:48:49.023364 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 00:48:49.026417 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 00:48:49.032950 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 00:48:49.036530 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 00:48:49.043144 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 00:48:49.046348 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 00:48:49.053045 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 00:48:49.056630 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 00:48:49.062905 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 00:48:49.066460 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 00:48:49.073213 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 00:48:49.076330 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 00:48:49.079440 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 00:48:49.086458 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 00:48:49.089534 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 00:48:49.096236 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 00:48:49.099068 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 00:48:49.106076 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 00:48:49.109167 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 00:48:49.115725 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 00:48:49.119262 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 00:48:49.129008 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 00:48:49.132809 avoid_fixed_resources: DOMAIN: 0000
1249 00:48:49.139035 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 00:48:49.142316 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 00:48:49.152500 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 00:48:49.158958 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 00:48:49.165788 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 00:48:49.175616 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 00:48:49.181989 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 00:48:49.188771 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 00:48:49.198761 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 00:48:49.205447 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 00:48:49.211689 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 00:48:49.218297 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 00:48:49.222079 Setting resources...
1262 00:48:49.228641 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 00:48:49.231958 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 00:48:49.235412 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 00:48:49.241695 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 00:48:49.245225 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 00:48:49.251605 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 00:48:49.254934 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 00:48:49.261716 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 00:48:49.271638 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 00:48:49.274693 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 00:48:49.281474 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 00:48:49.284697 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 00:48:49.291539 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 00:48:49.294350 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 00:48:49.301419 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 00:48:49.304428 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 00:48:49.311236 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 00:48:49.314266 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 00:48:49.321166 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 00:48:49.324501 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 00:48:49.327500 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 00:48:49.334236 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 00:48:49.337759 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 00:48:49.344135 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 00:48:49.347316 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 00:48:49.354501 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 00:48:49.357515 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 00:48:49.364477 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 00:48:49.367269 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 00:48:49.373935 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 00:48:49.377646 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 00:48:49.384481 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 00:48:49.390588 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 00:48:49.397525 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 00:48:49.404153 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 00:48:49.410955 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 00:48:49.417186 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 00:48:49.424338 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 00:48:49.427338 Root Device assign_resources, bus 0 link: 0
1301 00:48:49.434245 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 00:48:49.440994 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 00:48:49.451243 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 00:48:49.457390 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 00:48:49.467853 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 00:48:49.474092 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 00:48:49.484367 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 00:48:49.487500 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 00:48:49.490742 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 00:48:49.501197 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 00:48:49.507722 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 00:48:49.517738 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 00:48:49.524471 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 00:48:49.530725 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 00:48:49.534339 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 00:48:49.544001 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 00:48:49.547653 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 00:48:49.550837 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 00:48:49.561247 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 00:48:49.567418 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 00:48:49.577343 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 00:48:49.584217 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 00:48:49.590789 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 00:48:49.600806 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 00:48:49.607922 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 00:48:49.614208 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 00:48:49.620541 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 00:48:49.624210 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 00:48:49.633952 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 00:48:49.640776 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 00:48:49.650294 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 00:48:49.653595 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 00:48:49.663505 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 00:48:49.667364 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 00:48:49.677088 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 00:48:49.683483 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 00:48:49.690380 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 00:48:49.693267 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 00:48:49.703544 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 00:48:49.706546 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 00:48:49.710240 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 00:48:49.716948 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 00:48:49.720145 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 00:48:49.726969 LPC: Trying to open IO window from 800 size 1ff
1345 00:48:49.732993 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 00:48:49.743115 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 00:48:49.749599 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 00:48:49.759884 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 00:48:49.763448 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 00:48:49.769532 Root Device assign_resources, bus 0 link: 0
1351 00:48:49.769647 Done setting resources.
1352 00:48:49.776565 Show resources in subtree (Root Device)...After assigning values.
1353 00:48:49.783243 Root Device child on link 0 CPU_CLUSTER: 0
1354 00:48:49.786758 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 00:48:49.786849 APIC: 00
1356 00:48:49.789506 APIC: 02
1357 00:48:49.789602 APIC: 05
1358 00:48:49.789675 APIC: 01
1359 00:48:49.792904 APIC: 03
1360 00:48:49.792993 APIC: 04
1361 00:48:49.796600 APIC: 07
1362 00:48:49.796692 APIC: 06
1363 00:48:49.799884 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 00:48:49.809770 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 00:48:49.819648 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 00:48:49.822816 PCI: 00:00.0
1367 00:48:49.832737 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 00:48:49.842445 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 00:48:49.852341 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 00:48:49.859435 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 00:48:49.868806 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 00:48:49.879234 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 00:48:49.888841 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 00:48:49.898891 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 00:48:49.905515 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 00:48:49.915167 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 00:48:49.925050 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 00:48:49.935296 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 00:48:49.945396 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 00:48:49.955037 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 00:48:49.965382 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 00:48:49.971464 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 00:48:49.975186 PCI: 00:02.0
1384 00:48:49.985101 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 00:48:49.994654 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 00:48:50.005167 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 00:48:50.005270 PCI: 00:04.0
1388 00:48:50.008374 PCI: 00:08.0
1389 00:48:50.018190 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 00:48:50.021145 PCI: 00:12.0
1391 00:48:50.031415 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 00:48:50.034524 PCI: 00:14.0 child on link 0 USB0 port 0
1393 00:48:50.044546 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 00:48:50.048207 USB0 port 0 child on link 0 USB2 port 0
1395 00:48:50.051111 USB2 port 0
1396 00:48:50.054387 USB2 port 1
1397 00:48:50.054479 USB2 port 2
1398 00:48:50.057453 USB2 port 3
1399 00:48:50.057574 USB2 port 5
1400 00:48:50.061261 USB2 port 6
1401 00:48:50.061378 USB2 port 9
1402 00:48:50.064283 USB3 port 0
1403 00:48:50.064366 USB3 port 1
1404 00:48:50.067864 USB3 port 2
1405 00:48:50.067946 USB3 port 3
1406 00:48:50.071060 USB3 port 4
1407 00:48:50.071150 PCI: 00:14.2
1408 00:48:50.080961 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 00:48:50.094199 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 00:48:50.094304 PCI: 00:14.3
1411 00:48:50.103723 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 00:48:50.110698 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 00:48:50.120707 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 00:48:50.120800 I2C: 01:15
1415 00:48:50.123980 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 00:48:50.133653 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 00:48:50.137409 I2C: 02:5d
1418 00:48:50.137536 GENERIC: 0.0
1419 00:48:50.140555 PCI: 00:16.0
1420 00:48:50.150192 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 00:48:50.153869 PCI: 00:17.0
1422 00:48:50.163806 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 00:48:50.173643 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 00:48:50.183568 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 00:48:50.189780 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 00:48:50.200098 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 00:48:50.209844 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 00:48:50.213260 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 00:48:50.226616 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 00:48:50.226710 I2C: 03:1a
1431 00:48:50.226783 I2C: 03:38
1432 00:48:50.229456 I2C: 03:39
1433 00:48:50.229548 I2C: 03:3a
1434 00:48:50.233421 I2C: 03:3b
1435 00:48:50.236595 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 00:48:50.246337 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 00:48:50.256133 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 00:48:50.265796 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 00:48:50.269635 PCI: 01:00.0
1440 00:48:50.279377 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 00:48:50.279470 PCI: 00:1e.0
1442 00:48:50.292314 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 00:48:50.302461 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 00:48:50.305641 PCI: 00:1e.2 child on link 0 SPI: 00
1445 00:48:50.315575 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 00:48:50.319131 SPI: 00
1447 00:48:50.321950 PCI: 00:1e.3 child on link 0 SPI: 01
1448 00:48:50.331894 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 00:48:50.331986 SPI: 01
1450 00:48:50.338780 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 00:48:50.345246 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 00:48:50.355276 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 00:48:50.355368 PNP: 0c09.0
1454 00:48:50.365489 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 00:48:50.368612 PCI: 00:1f.3
1456 00:48:50.378516 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 00:48:50.388351 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 00:48:50.388445 PCI: 00:1f.4
1459 00:48:50.398188 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 00:48:50.408024 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 00:48:50.411821 PCI: 00:1f.5
1462 00:48:50.421102 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 00:48:50.424713 Done allocating resources.
1464 00:48:50.428264 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 00:48:50.431401 Enabling resources...
1466 00:48:50.434895 PCI: 00:00.0 subsystem <- 8086/9b61
1467 00:48:50.437776 PCI: 00:00.0 cmd <- 06
1468 00:48:50.441349 PCI: 00:02.0 subsystem <- 8086/9b41
1469 00:48:50.444867 PCI: 00:02.0 cmd <- 03
1470 00:48:50.447790 PCI: 00:08.0 cmd <- 06
1471 00:48:50.451409 PCI: 00:12.0 subsystem <- 8086/02f9
1472 00:48:50.454391 PCI: 00:12.0 cmd <- 02
1473 00:48:50.458224 PCI: 00:14.0 subsystem <- 8086/02ed
1474 00:48:50.461179 PCI: 00:14.0 cmd <- 02
1475 00:48:50.461262 PCI: 00:14.2 cmd <- 02
1476 00:48:50.468314 PCI: 00:14.3 subsystem <- 8086/02f0
1477 00:48:50.468437 PCI: 00:14.3 cmd <- 02
1478 00:48:50.471472 PCI: 00:15.0 subsystem <- 8086/02e8
1479 00:48:50.474632 PCI: 00:15.0 cmd <- 02
1480 00:48:50.478355 PCI: 00:15.1 subsystem <- 8086/02e9
1481 00:48:50.481312 PCI: 00:15.1 cmd <- 02
1482 00:48:50.484403 PCI: 00:16.0 subsystem <- 8086/02e0
1483 00:48:50.487543 PCI: 00:16.0 cmd <- 02
1484 00:48:50.490700 PCI: 00:17.0 subsystem <- 8086/02d3
1485 00:48:50.494336 PCI: 00:17.0 cmd <- 03
1486 00:48:50.497436 PCI: 00:19.0 subsystem <- 8086/02c5
1487 00:48:50.500943 PCI: 00:19.0 cmd <- 02
1488 00:48:50.504145 PCI: 00:1d.0 bridge ctrl <- 0013
1489 00:48:50.507913 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 00:48:50.510998 PCI: 00:1d.0 cmd <- 06
1491 00:48:50.514561 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 00:48:50.517663 PCI: 00:1e.0 cmd <- 06
1493 00:48:50.520668 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 00:48:50.520777 PCI: 00:1e.2 cmd <- 06
1495 00:48:50.527373 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 00:48:50.527458 PCI: 00:1e.3 cmd <- 02
1497 00:48:50.531423 PCI: 00:1f.0 subsystem <- 8086/0284
1498 00:48:50.534153 PCI: 00:1f.0 cmd <- 407
1499 00:48:50.537689 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 00:48:50.541233 PCI: 00:1f.3 cmd <- 02
1501 00:48:50.544266 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 00:48:50.547682 PCI: 00:1f.4 cmd <- 03
1503 00:48:50.550682 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 00:48:50.554191 PCI: 00:1f.5 cmd <- 406
1505 00:48:50.563013 PCI: 01:00.0 cmd <- 02
1506 00:48:50.567641 done.
1507 00:48:50.581736 ME: Version: 14.0.39.1367
1508 00:48:50.588710 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1509 00:48:50.591611 Initializing devices...
1510 00:48:50.591730 Root Device init ...
1511 00:48:50.598699 Chrome EC: Set SMI mask to 0x0000000000000000
1512 00:48:50.601711 Chrome EC: clear events_b mask to 0x0000000000000000
1513 00:48:50.608429 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 00:48:50.614725 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 00:48:50.621919 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 00:48:50.625102 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 00:48:50.628215 Root Device init finished in 35209 usecs
1518 00:48:50.631855 CPU_CLUSTER: 0 init ...
1519 00:48:50.638533 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 00:48:50.642687 PCI: 00:00.0 init ...
1521 00:48:50.646144 CPU TDP: 15 Watts
1522 00:48:50.648935 CPU PL2 = 64 Watts
1523 00:48:50.652584 PCI: 00:00.0 init finished in 7066 usecs
1524 00:48:50.656064 PCI: 00:02.0 init ...
1525 00:48:50.658851 PCI: 00:02.0 init finished in 2245 usecs
1526 00:48:50.662329 PCI: 00:08.0 init ...
1527 00:48:50.665890 PCI: 00:08.0 init finished in 2252 usecs
1528 00:48:50.669025 PCI: 00:12.0 init ...
1529 00:48:50.673042 PCI: 00:12.0 init finished in 2253 usecs
1530 00:48:50.676038 PCI: 00:14.0 init ...
1531 00:48:50.679038 PCI: 00:14.0 init finished in 2253 usecs
1532 00:48:50.682573 PCI: 00:14.2 init ...
1533 00:48:50.685621 PCI: 00:14.2 init finished in 2253 usecs
1534 00:48:50.688802 PCI: 00:14.3 init ...
1535 00:48:50.692368 PCI: 00:14.3 init finished in 2272 usecs
1536 00:48:50.695464 PCI: 00:15.0 init ...
1537 00:48:50.699223 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 00:48:50.702355 PCI: 00:15.0 init finished in 5979 usecs
1539 00:48:50.705469 PCI: 00:15.1 init ...
1540 00:48:50.708969 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 00:48:50.712094 PCI: 00:15.1 init finished in 5980 usecs
1542 00:48:50.715701 PCI: 00:16.0 init ...
1543 00:48:50.718999 PCI: 00:16.0 init finished in 2252 usecs
1544 00:48:50.723244 PCI: 00:19.0 init ...
1545 00:48:50.726230 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 00:48:50.732954 PCI: 00:19.0 init finished in 5980 usecs
1547 00:48:50.733047 PCI: 00:1d.0 init ...
1548 00:48:50.736020 Initializing PCH PCIe bridge.
1549 00:48:50.739806 PCI: 00:1d.0 init finished in 5287 usecs
1550 00:48:50.744214 PCI: 00:1f.0 init ...
1551 00:48:50.747753 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 00:48:50.754166 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 00:48:50.754258 IOAPIC: ID = 0x02
1554 00:48:50.757525 IOAPIC: Dumping registers
1555 00:48:50.760972 reg 0x0000: 0x02000000
1556 00:48:50.764477 reg 0x0001: 0x00770020
1557 00:48:50.764577 reg 0x0002: 0x00000000
1558 00:48:50.771326 PCI: 00:1f.0 init finished in 23548 usecs
1559 00:48:50.775050 PCI: 00:1f.4 init ...
1560 00:48:50.778110 PCI: 00:1f.4 init finished in 2262 usecs
1561 00:48:50.788611 PCI: 01:00.0 init ...
1562 00:48:50.791760 PCI: 01:00.0 init finished in 2252 usecs
1563 00:48:50.795955 PNP: 0c09.0 init ...
1564 00:48:50.799707 Google Chrome EC uptime: 11.059 seconds
1565 00:48:50.806431 Google Chrome AP resets since EC boot: 0
1566 00:48:50.809505 Google Chrome most recent AP reset causes:
1567 00:48:50.816259 Google Chrome EC reset flags at last EC boot: reset-pin
1568 00:48:50.819449 PNP: 0c09.0 init finished in 20585 usecs
1569 00:48:50.822743 Devices initialized
1570 00:48:50.822851 Show all devs... After init.
1571 00:48:50.825912 Root Device: enabled 1
1572 00:48:50.829615 CPU_CLUSTER: 0: enabled 1
1573 00:48:50.832602 DOMAIN: 0000: enabled 1
1574 00:48:50.832693 APIC: 00: enabled 1
1575 00:48:50.836171 PCI: 00:00.0: enabled 1
1576 00:48:50.839273 PCI: 00:02.0: enabled 1
1577 00:48:50.843037 PCI: 00:04.0: enabled 0
1578 00:48:50.843134 PCI: 00:05.0: enabled 0
1579 00:48:50.845924 PCI: 00:12.0: enabled 1
1580 00:48:50.849645 PCI: 00:12.5: enabled 0
1581 00:48:50.849765 PCI: 00:12.6: enabled 0
1582 00:48:50.852762 PCI: 00:14.0: enabled 1
1583 00:48:50.855697 PCI: 00:14.1: enabled 0
1584 00:48:50.859371 PCI: 00:14.3: enabled 1
1585 00:48:50.859472 PCI: 00:14.5: enabled 0
1586 00:48:50.862929 PCI: 00:15.0: enabled 1
1587 00:48:50.865905 PCI: 00:15.1: enabled 1
1588 00:48:50.869454 PCI: 00:15.2: enabled 0
1589 00:48:50.869574 PCI: 00:15.3: enabled 0
1590 00:48:50.872270 PCI: 00:16.0: enabled 1
1591 00:48:50.875576 PCI: 00:16.1: enabled 0
1592 00:48:50.879216 PCI: 00:16.2: enabled 0
1593 00:48:50.879339 PCI: 00:16.3: enabled 0
1594 00:48:50.882528 PCI: 00:16.4: enabled 0
1595 00:48:50.885494 PCI: 00:16.5: enabled 0
1596 00:48:50.889149 PCI: 00:17.0: enabled 1
1597 00:48:50.889255 PCI: 00:19.0: enabled 1
1598 00:48:50.892137 PCI: 00:19.1: enabled 0
1599 00:48:50.895838 PCI: 00:19.2: enabled 0
1600 00:48:50.895937 PCI: 00:1a.0: enabled 0
1601 00:48:50.898674 PCI: 00:1c.0: enabled 0
1602 00:48:50.902548 PCI: 00:1c.1: enabled 0
1603 00:48:50.905579 PCI: 00:1c.2: enabled 0
1604 00:48:50.905690 PCI: 00:1c.3: enabled 0
1605 00:48:50.908813 PCI: 00:1c.4: enabled 0
1606 00:48:50.911900 PCI: 00:1c.5: enabled 0
1607 00:48:50.915665 PCI: 00:1c.6: enabled 0
1608 00:48:50.915757 PCI: 00:1c.7: enabled 0
1609 00:48:50.918710 PCI: 00:1d.0: enabled 1
1610 00:48:50.922460 PCI: 00:1d.1: enabled 0
1611 00:48:50.925556 PCI: 00:1d.2: enabled 0
1612 00:48:50.925667 PCI: 00:1d.3: enabled 0
1613 00:48:50.928719 PCI: 00:1d.4: enabled 0
1614 00:48:50.931840 PCI: 00:1d.5: enabled 0
1615 00:48:50.931955 PCI: 00:1e.0: enabled 1
1616 00:48:50.935176 PCI: 00:1e.1: enabled 0
1617 00:48:50.938661 PCI: 00:1e.2: enabled 1
1618 00:48:50.941701 PCI: 00:1e.3: enabled 1
1619 00:48:50.941791 PCI: 00:1f.0: enabled 1
1620 00:48:50.945297 PCI: 00:1f.1: enabled 0
1621 00:48:50.948657 PCI: 00:1f.2: enabled 0
1622 00:48:50.952171 PCI: 00:1f.3: enabled 1
1623 00:48:50.952261 PCI: 00:1f.4: enabled 1
1624 00:48:50.955342 PCI: 00:1f.5: enabled 1
1625 00:48:50.958545 PCI: 00:1f.6: enabled 0
1626 00:48:50.961969 USB0 port 0: enabled 1
1627 00:48:50.962063 I2C: 01:15: enabled 1
1628 00:48:50.964873 I2C: 02:5d: enabled 1
1629 00:48:50.968313 GENERIC: 0.0: enabled 1
1630 00:48:50.968407 I2C: 03:1a: enabled 1
1631 00:48:50.971917 I2C: 03:38: enabled 1
1632 00:48:50.974886 I2C: 03:39: enabled 1
1633 00:48:50.974980 I2C: 03:3a: enabled 1
1634 00:48:50.978250 I2C: 03:3b: enabled 1
1635 00:48:50.981731 PCI: 00:00.0: enabled 1
1636 00:48:50.981827 SPI: 00: enabled 1
1637 00:48:50.984850 SPI: 01: enabled 1
1638 00:48:50.988813 PNP: 0c09.0: enabled 1
1639 00:48:50.988906 USB2 port 0: enabled 1
1640 00:48:50.991293 USB2 port 1: enabled 1
1641 00:48:50.994872 USB2 port 2: enabled 0
1642 00:48:50.994999 USB2 port 3: enabled 0
1643 00:48:50.998239 USB2 port 5: enabled 0
1644 00:48:51.001371 USB2 port 6: enabled 1
1645 00:48:51.004999 USB2 port 9: enabled 1
1646 00:48:51.005114 USB3 port 0: enabled 1
1647 00:48:51.007970 USB3 port 1: enabled 1
1648 00:48:51.011786 USB3 port 2: enabled 1
1649 00:48:51.011908 USB3 port 3: enabled 1
1650 00:48:51.014840 USB3 port 4: enabled 0
1651 00:48:51.017967 APIC: 02: enabled 1
1652 00:48:51.018084 APIC: 05: enabled 1
1653 00:48:51.021257 APIC: 01: enabled 1
1654 00:48:51.024804 APIC: 03: enabled 1
1655 00:48:51.024917 APIC: 04: enabled 1
1656 00:48:51.027941 APIC: 07: enabled 1
1657 00:48:51.028056 APIC: 06: enabled 1
1658 00:48:51.031074 PCI: 00:08.0: enabled 1
1659 00:48:51.034757 PCI: 00:14.2: enabled 1
1660 00:48:51.037943 PCI: 01:00.0: enabled 1
1661 00:48:51.041571 Disabling ACPI via APMC:
1662 00:48:51.041676 done.
1663 00:48:51.048163 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 00:48:51.051181 ELOG: NV offset 0xaf0000 size 0x4000
1665 00:48:51.057945 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 00:48:51.064777 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:51 UTC
1667 00:48:51.071452 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:51 UTC
1668 00:48:51.077604 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:51 UTC
1669 00:48:51.084298 ELOG: Event(9A) added with size 9 at 2023-05-23 00:48:51 UTC
1670 00:48:51.091166 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:51 UTC
1671 00:48:51.097630 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:51 UTC
1672 00:48:51.101381 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 00:48:51.108316 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:51 UTC
1674 00:48:51.118122 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 00:48:51.125033 ELOG: Event(A0) added with size 9 at 2023-05-23 00:48:51 UTC
1676 00:48:51.127934 elog_add_boot_reason: Logged dev mode boot
1677 00:48:51.131166 Finalize devices...
1678 00:48:51.131256 PCI: 00:17.0 final
1679 00:48:51.134931 Devices finalized
1680 00:48:51.138007 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 00:48:51.144850 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 00:48:51.147970 ME: HFSTS1 : 0x90000245
1683 00:48:51.151611 ME: HFSTS2 : 0x3B850126
1684 00:48:51.158184 ME: HFSTS3 : 0x00000020
1685 00:48:51.161195 ME: HFSTS4 : 0x00004800
1686 00:48:51.164349 ME: HFSTS5 : 0x00000000
1687 00:48:51.167595 ME: HFSTS6 : 0x40400006
1688 00:48:51.171309 ME: Manufacturing Mode : NO
1689 00:48:51.174232 ME: FW Partition Table : OK
1690 00:48:51.177938 ME: Bringup Loader Failure : NO
1691 00:48:51.181438 ME: Firmware Init Complete : YES
1692 00:48:51.184233 ME: Boot Options Present : NO
1693 00:48:51.187873 ME: Update In Progress : NO
1694 00:48:51.191364 ME: D0i3 Support : YES
1695 00:48:51.194517 ME: Low Power State Enabled : NO
1696 00:48:51.197966 ME: CPU Replaced : NO
1697 00:48:51.200722 ME: CPU Replacement Valid : YES
1698 00:48:51.204433 ME: Current Working State : 5
1699 00:48:51.207493 ME: Current Operation State : 1
1700 00:48:51.210644 ME: Current Operation Mode : 0
1701 00:48:51.214086 ME: Error Code : 0
1702 00:48:51.217531 ME: CPU Debug Disabled : YES
1703 00:48:51.220920 ME: TXT Support : NO
1704 00:48:51.227355 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 00:48:51.234016 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 00:48:51.234108 CBFS @ c08000 size 3f8000
1707 00:48:51.240967 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 00:48:51.244050 CBFS: Locating 'fallback/dsdt.aml'
1709 00:48:51.247287 CBFS: Found @ offset 10bb80 size 3fa5
1710 00:48:51.253831 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 00:48:51.256997 CBFS @ c08000 size 3f8000
1712 00:48:51.260385 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 00:48:51.263923 CBFS: Locating 'fallback/slic'
1714 00:48:51.268751 CBFS: 'fallback/slic' not found.
1715 00:48:51.275676 ACPI: Writing ACPI tables at 99b3e000.
1716 00:48:51.275784 ACPI: * FACS
1717 00:48:51.278729 ACPI: * DSDT
1718 00:48:51.282390 Ramoops buffer: 0x100000@0x99a3d000.
1719 00:48:51.285294 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 00:48:51.292694 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 00:48:51.295385 Google Chrome EC: version:
1722 00:48:51.298650 ro: helios_v2.0.2659-56403530b
1723 00:48:51.302239 rw: helios_v2.0.2849-c41de27e7d
1724 00:48:51.302366 running image: 1
1725 00:48:51.306187 ACPI: * FADT
1726 00:48:51.306273 SCI is IRQ9
1727 00:48:51.312767 ACPI: added table 1/32, length now 40
1728 00:48:51.312872 ACPI: * SSDT
1729 00:48:51.316314 Found 1 CPU(s) with 8 core(s) each.
1730 00:48:51.319271 Error: Could not locate 'wifi_sar' in VPD.
1731 00:48:51.325794 Checking CBFS for default SAR values
1732 00:48:51.329438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 00:48:51.332510 CBFS @ c08000 size 3f8000
1734 00:48:51.339234 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 00:48:51.342419 CBFS: Locating 'wifi_sar_defaults.hex'
1736 00:48:51.346175 CBFS: Found @ offset 5fac0 size 77
1737 00:48:51.349214 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 00:48:51.356145 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 00:48:51.359324 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 00:48:51.365985 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 00:48:51.368950 failed to find key in VPD: dsm_calib_r0_0
1742 00:48:51.378704 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 00:48:51.382463 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 00:48:51.385390 failed to find key in VPD: dsm_calib_r0_1
1745 00:48:51.395358 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 00:48:51.401925 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 00:48:51.405532 failed to find key in VPD: dsm_calib_r0_2
1748 00:48:51.415109 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 00:48:51.418935 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 00:48:51.425612 failed to find key in VPD: dsm_calib_r0_3
1751 00:48:51.432121 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 00:48:51.438334 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 00:48:51.441999 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 00:48:51.445178 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 00:48:51.448883 EC returned error result code 1
1756 00:48:51.452720 EC returned error result code 1
1757 00:48:51.456435 EC returned error result code 1
1758 00:48:51.463308 PS2K: Bad resp from EC. Vivaldi disabled!
1759 00:48:51.466960 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 00:48:51.473439 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 00:48:51.479715 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 00:48:51.483008 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 00:48:51.489724 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 00:48:51.496296 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 00:48:51.502806 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 00:48:51.506815 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 00:48:51.509464 ACPI: added table 2/32, length now 44
1768 00:48:51.512853 ACPI: * MCFG
1769 00:48:51.516307 ACPI: added table 3/32, length now 48
1770 00:48:51.519850 ACPI: * TPM2
1771 00:48:51.522877 TPM2 log created at 99a2d000
1772 00:48:51.526049 ACPI: added table 4/32, length now 52
1773 00:48:51.526130 ACPI: * MADT
1774 00:48:51.529756 SCI is IRQ9
1775 00:48:51.532734 ACPI: added table 5/32, length now 56
1776 00:48:51.532855 current = 99b43ac0
1777 00:48:51.536602 ACPI: * DMAR
1778 00:48:51.539511 ACPI: added table 6/32, length now 60
1779 00:48:51.542733 ACPI: * IGD OpRegion
1780 00:48:51.542845 GMA: Found VBT in CBFS
1781 00:48:51.546176 GMA: Found valid VBT in CBFS
1782 00:48:51.549651 ACPI: added table 7/32, length now 64
1783 00:48:51.552664 ACPI: * HPET
1784 00:48:51.555789 ACPI: added table 8/32, length now 68
1785 00:48:51.555914 ACPI: done.
1786 00:48:51.559592 ACPI tables: 31744 bytes.
1787 00:48:51.562659 smbios_write_tables: 99a2c000
1788 00:48:51.566556 EC returned error result code 3
1789 00:48:51.569710 Couldn't obtain OEM name from CBI
1790 00:48:51.572768 Create SMBIOS type 17
1791 00:48:51.575819 PCI: 00:00.0 (Intel Cannonlake)
1792 00:48:51.579566 PCI: 00:14.3 (Intel WiFi)
1793 00:48:51.582872 SMBIOS tables: 939 bytes.
1794 00:48:51.585885 Writing table forward entry at 0x00000500
1795 00:48:51.592687 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 00:48:51.596168 Writing coreboot table at 0x99b62000
1797 00:48:51.603086 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 00:48:51.605963 1. 0000000000001000-000000000009ffff: RAM
1799 00:48:51.608909 2. 00000000000a0000-00000000000fffff: RESERVED
1800 00:48:51.615642 3. 0000000000100000-0000000099a2bfff: RAM
1801 00:48:51.619031 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 00:48:51.625990 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 00:48:51.632254 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 00:48:51.635806 7. 000000009a000000-000000009f7fffff: RESERVED
1805 00:48:51.642062 8. 00000000e0000000-00000000efffffff: RESERVED
1806 00:48:51.645756 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 00:48:51.648774 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 00:48:51.655464 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 00:48:51.658458 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 00:48:51.665226 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 00:48:51.668982 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 00:48:51.675331 15. 0000000100000000-000000045e7fffff: RAM
1813 00:48:51.678572 Graphics framebuffer located at 0xc0000000
1814 00:48:51.681765 Passing 5 GPIOs to payload:
1815 00:48:51.685465 NAME | PORT | POLARITY | VALUE
1816 00:48:51.691771 write protect | undefined | high | low
1817 00:48:51.695294 lid | undefined | high | high
1818 00:48:51.701534 power | undefined | high | low
1819 00:48:51.708460 oprom | undefined | high | low
1820 00:48:51.712044 EC in RW | 0x000000cb | high | low
1821 00:48:51.715113 Board ID: 4
1822 00:48:51.718766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 00:48:51.721663 CBFS @ c08000 size 3f8000
1824 00:48:51.728535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 00:48:51.731466 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1826 00:48:51.735095 coreboot table: 1492 bytes.
1827 00:48:51.738168 IMD ROOT 0. 99fff000 00001000
1828 00:48:51.741849 IMD SMALL 1. 99ffe000 00001000
1829 00:48:51.745000 FSP MEMORY 2. 99c4e000 003b0000
1830 00:48:51.748156 CONSOLE 3. 99c2e000 00020000
1831 00:48:51.751867 FMAP 4. 99c2d000 0000054e
1832 00:48:51.754895 TIME STAMP 5. 99c2c000 00000910
1833 00:48:51.758430 VBOOT WORK 6. 99c18000 00014000
1834 00:48:51.762030 MRC DATA 7. 99c16000 00001958
1835 00:48:51.764744 ROMSTG STCK 8. 99c15000 00001000
1836 00:48:51.768417 AFTER CAR 9. 99c0b000 0000a000
1837 00:48:51.771677 RAMSTAGE 10. 99baf000 0005c000
1838 00:48:51.774721 REFCODE 11. 99b7a000 00035000
1839 00:48:51.778419 SMM BACKUP 12. 99b6a000 00010000
1840 00:48:51.781553 COREBOOT 13. 99b62000 00008000
1841 00:48:51.784629 ACPI 14. 99b3e000 00024000
1842 00:48:51.788330 ACPI GNVS 15. 99b3d000 00001000
1843 00:48:51.791605 RAMOOPS 16. 99a3d000 00100000
1844 00:48:51.795083 TPM2 TCGLOG17. 99a2d000 00010000
1845 00:48:51.797986 SMBIOS 18. 99a2c000 00000800
1846 00:48:51.801448 IMD small region:
1847 00:48:51.804578 IMD ROOT 0. 99ffec00 00000400
1848 00:48:51.808176 FSP RUNTIME 1. 99ffebe0 00000004
1849 00:48:51.811662 EC HOSTEVENT 2. 99ffebc0 00000008
1850 00:48:51.815049 POWER STATE 3. 99ffeb80 00000040
1851 00:48:51.817945 ROMSTAGE 4. 99ffeb60 00000004
1852 00:48:51.821641 MEM INFO 5. 99ffe9a0 000001b9
1853 00:48:51.824601 VPD 6. 99ffe920 0000006c
1854 00:48:51.828195 MTRR: Physical address space:
1855 00:48:51.835144 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 00:48:51.841146 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 00:48:51.847981 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 00:48:51.854749 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 00:48:51.861475 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 00:48:51.867650 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 00:48:51.871084 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 00:48:51.877910 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 00:48:51.881083 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 00:48:51.884126 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 00:48:51.887956 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 00:48:51.894149 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 00:48:51.897855 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 00:48:51.900874 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 00:48:51.903971 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 00:48:51.910588 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 00:48:51.914270 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 00:48:51.917309 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 00:48:51.920993 call enable_fixed_mtrr()
1874 00:48:51.923804 CPU physical address size: 39 bits
1875 00:48:51.927419 MTRR: default type WB/UC MTRR counts: 6/8.
1876 00:48:51.930839 MTRR: WB selected as default type.
1877 00:48:51.937288 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 00:48:51.944149 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 00:48:51.950576 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 00:48:51.956885 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 00:48:51.963698 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 00:48:51.970529 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 00:48:51.974076 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 00:48:51.976949 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 00:48:51.984025 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 00:48:51.986954 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 00:48:51.990183 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 00:48:51.993946 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 00:48:52.000076 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 00:48:52.003671 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 00:48:52.006711 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 00:48:52.010558 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 00:48:52.016740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 00:48:52.016845
1895 00:48:52.016921 MTRR check
1896 00:48:52.020592 Fixed MTRRs : Enabled
1897 00:48:52.023769 Variable MTRRs: Enabled
1898 00:48:52.023852
1899 00:48:52.023924 call enable_fixed_mtrr()
1900 00:48:52.030218 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 00:48:52.033920 CPU physical address size: 39 bits
1902 00:48:52.040299 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 00:48:52.043136 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 00:48:52.046778 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 00:48:52.049796 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 00:48:52.056767 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 00:48:52.059910 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 00:48:52.063656 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 00:48:52.066703 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 00:48:52.073453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 00:48:52.076583 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 00:48:52.079702 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 00:48:52.082801 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 00:48:52.089983 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 00:48:52.090093 call enable_fixed_mtrr()
1916 00:48:52.096766 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 00:48:52.099899 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 00:48:52.103044 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 00:48:52.106517 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 00:48:52.113363 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 00:48:52.116547 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 00:48:52.120128 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 00:48:52.123454 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 00:48:52.126213 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 00:48:52.132809 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 00:48:52.136377 CPU physical address size: 39 bits
1927 00:48:52.139920 call enable_fixed_mtrr()
1928 00:48:52.142969 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 00:48:52.146544 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 00:48:52.149516 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 00:48:52.156099 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 00:48:52.159593 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 00:48:52.162939 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 00:48:52.166120 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 00:48:52.172808 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 00:48:52.176028 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 00:48:52.179144 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 00:48:52.182900 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 00:48:52.189416 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 00:48:52.192653 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 00:48:52.196008 call enable_fixed_mtrr()
1942 00:48:52.199134 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 00:48:52.202220 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 00:48:52.206076 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 00:48:52.212754 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 00:48:52.215907 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 00:48:52.218878 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 00:48:52.222549 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 00:48:52.225515 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 00:48:52.232486 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 00:48:52.235726 CPU physical address size: 39 bits
1952 00:48:52.238698 call enable_fixed_mtrr()
1953 00:48:52.241843 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 00:48:52.245476 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 00:48:52.248850 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 00:48:52.255289 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 00:48:52.258586 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 00:48:52.262227 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 00:48:52.265189 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 00:48:52.271582 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 00:48:52.275220 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 00:48:52.278344 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 00:48:52.281935 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 00:48:52.288352 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 00:48:52.291913 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 00:48:52.295029 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 00:48:52.298101 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 00:48:52.304972 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 00:48:52.308058 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 00:48:52.311233 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 00:48:52.314818 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 00:48:52.321212 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 00:48:52.324878 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 00:48:52.328068 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 00:48:52.331168 call enable_fixed_mtrr()
1976 00:48:52.334868 call enable_fixed_mtrr()
1977 00:48:52.337896 CPU physical address size: 39 bits
1978 00:48:52.341638 CPU physical address size: 39 bits
1979 00:48:52.344723 CPU physical address size: 39 bits
1980 00:48:52.347721 CBFS @ c08000 size 3f8000
1981 00:48:52.351041 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1982 00:48:52.357914 CBFS: Locating 'fallback/payload'
1983 00:48:52.360855 CPU physical address size: 39 bits
1984 00:48:52.364431 CBFS: Found @ offset 1c96c0 size 3f798
1985 00:48:52.367422 Checking segment from ROM address 0xffdd16f8
1986 00:48:52.370959 Checking segment from ROM address 0xffdd1714
1987 00:48:52.377829 Loading segment from ROM address 0xffdd16f8
1988 00:48:52.380745 code (compression=0)
1989 00:48:52.387934 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 00:48:52.397488 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 00:48:52.397618 it's not compressed!
1992 00:48:52.490983 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 00:48:52.497253 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 00:48:52.500811 Loading segment from ROM address 0xffdd1714
1995 00:48:52.503900 Entry Point 0x30000000
1996 00:48:52.507502 Loaded segments
1997 00:48:52.513221 Finalizing chipset.
1998 00:48:52.516344 Finalizing SMM.
1999 00:48:52.519544 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2000 00:48:52.522604 mp_park_aps done after 0 msecs.
2001 00:48:52.529412 Jumping to boot code at 30000000(99b62000)
2002 00:48:52.536209 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 00:48:52.536303
2004 00:48:52.536376
2005 00:48:52.536444
2006 00:48:52.539242 Starting depthcharge on Helios...
2007 00:48:52.539333
2008 00:48:52.539694 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 00:48:52.539809 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 00:48:52.539904 Setting prompt string to ['hatch:']
2011 00:48:52.540014 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 00:48:52.549172 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 00:48:52.549266
2014 00:48:52.555560 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 00:48:52.555651
2016 00:48:52.562115 board_setup: Info: eMMC controller not present; skipping
2017 00:48:52.562217
2018 00:48:52.565579 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 00:48:52.565680
2020 00:48:52.572475 board_setup: Info: SDHCI controller not present; skipping
2021 00:48:52.572568
2022 00:48:52.578790 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 00:48:52.578887
2024 00:48:52.578959 Wipe memory regions:
2025 00:48:52.579027
2026 00:48:52.582409 [0x00000000001000, 0x000000000a0000)
2027 00:48:52.582501
2028 00:48:52.588740 [0x00000000100000, 0x00000030000000)
2029 00:48:52.651674
2030 00:48:52.655326 [0x00000030657430, 0x00000099a2c000)
2031 00:48:52.801684
2032 00:48:52.805147 [0x00000100000000, 0x0000045e800000)
2033 00:48:54.261192
2034 00:48:54.261339 R8152: Initializing
2035 00:48:54.261415
2036 00:48:54.264832 Version 9 (ocp_data = 6010)
2037 00:48:54.269061
2038 00:48:54.269153 R8152: Done initializing
2039 00:48:54.269227
2040 00:48:54.272104 Adding net device
2041 00:48:54.754800
2042 00:48:54.754963 R8152: Initializing
2043 00:48:54.755043
2044 00:48:54.758335 Version 6 (ocp_data = 5c30)
2045 00:48:54.758426
2046 00:48:54.761465 R8152: Done initializing
2047 00:48:54.761555
2048 00:48:54.765152 net_add_device: Attemp to include the same device
2049 00:48:54.768146
2050 00:48:54.775620 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 00:48:54.775711
2052 00:48:54.775783
2053 00:48:54.775850
2054 00:48:54.776139 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 00:48:54.876505 hatch: tftpboot 192.168.201.1 10419506/tftp-deploy-g_op_fvk/kernel/bzImage 10419506/tftp-deploy-g_op_fvk/kernel/cmdline 10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
2057 00:48:54.876666 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 00:48:54.876756 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 00:48:54.881281 tftpboot 192.168.201.1 10419506/tftp-deploy-g_op_fvk/kernel/bzImploy-g_op_fvk/kernel/cmdline 10419506/tftp-deploy-g_op_fvk/ramdisk/ramdisk.cpio.gz
2060 00:48:54.881380
2061 00:48:54.881455 Waiting for link
2062 00:48:55.082431
2063 00:48:55.082576 done.
2064 00:48:55.082653
2065 00:48:55.082728 MAC: 00:24:32:50:1a:59
2066 00:48:55.082795
2067 00:48:55.085363 Sending DHCP discover... done.
2068 00:48:55.085460
2069 00:48:55.088728 Waiting for reply... done.
2070 00:48:55.088824
2071 00:48:55.092272 Sending DHCP request... done.
2072 00:48:55.092370
2073 00:48:55.099096 Waiting for reply... done.
2074 00:48:55.099190
2075 00:48:55.099263 My ip is 192.168.201.14
2076 00:48:55.099331
2077 00:48:55.102205 The DHCP server ip is 192.168.201.1
2078 00:48:55.105953
2079 00:48:55.108976 TFTP server IP predefined by user: 192.168.201.1
2080 00:48:55.109070
2081 00:48:55.115840 Bootfile predefined by user: 10419506/tftp-deploy-g_op_fvk/kernel/bzImage
2082 00:48:55.115932
2083 00:48:55.119038 Sending tftp read request... done.
2084 00:48:55.119167
2085 00:48:55.122059 Waiting for the transfer...
2086 00:48:55.125654
2087 00:48:55.667091 00000000 ################################################################
2088 00:48:55.667283
2089 00:48:56.220980 00080000 ################################################################
2090 00:48:56.221128
2091 00:48:56.757515 00100000 ################################################################
2092 00:48:56.757710
2093 00:48:57.300156 00180000 ################################################################
2094 00:48:57.300307
2095 00:48:57.833944 00200000 ################################################################
2096 00:48:57.834095
2097 00:48:58.375894 00280000 ################################################################
2098 00:48:58.376042
2099 00:48:58.906267 00300000 ################################################################
2100 00:48:58.906416
2101 00:48:59.483953 00380000 ################################################################
2102 00:48:59.484102
2103 00:49:00.082157 00400000 ################################################################
2104 00:49:00.082301
2105 00:49:00.672468 00480000 ################################################################
2106 00:49:00.672615
2107 00:49:01.263953 00500000 ################################################################
2108 00:49:01.264102
2109 00:49:01.862524 00580000 ################################################################
2110 00:49:01.862672
2111 00:49:02.434137 00600000 ################################################################
2112 00:49:02.434284
2113 00:49:03.088605 00680000 ################################################################
2114 00:49:03.089165
2115 00:49:03.789922 00700000 ################################################################
2116 00:49:03.790439
2117 00:49:04.381281 00780000 ################################################################
2118 00:49:04.381432
2119 00:49:04.915640 00800000 ################################################################
2120 00:49:04.915789
2121 00:49:05.476123 00880000 ################################################################
2122 00:49:05.476274
2123 00:49:06.030959 00900000 ################################################################
2124 00:49:06.031108
2125 00:49:06.707685 00980000 ################################################################
2126 00:49:06.708205
2127 00:49:07.216950 00a00000 ############################################### done.
2128 00:49:07.217478
2129 00:49:07.220399 The bootfile was 10862592 bytes long.
2130 00:49:07.220839
2131 00:49:07.223767 Sending tftp read request... done.
2132 00:49:07.224203
2133 00:49:07.227090 Waiting for the transfer...
2134 00:49:07.227623
2135 00:49:07.822159 00000000 ################################################################
2136 00:49:07.822336
2137 00:49:08.380608 00080000 ################################################################
2138 00:49:08.380755
2139 00:49:08.915327 00100000 ################################################################
2140 00:49:08.915492
2141 00:49:09.451763 00180000 ################################################################
2142 00:49:09.451927
2143 00:49:10.021414 00200000 ################################################################
2144 00:49:10.021563
2145 00:49:10.575686 00280000 ################################################################
2146 00:49:10.575834
2147 00:49:11.112588 00300000 ################################################################
2148 00:49:11.112751
2149 00:49:11.656291 00380000 ################################################################
2150 00:49:11.656463
2151 00:49:12.185301 00400000 ################################################################
2152 00:49:12.185462
2153 00:49:12.742541 00480000 ################################################################
2154 00:49:12.742711
2155 00:49:13.302268 00500000 ################################################################
2156 00:49:13.302422
2157 00:49:13.835912 00580000 ################################################################
2158 00:49:13.836060
2159 00:49:13.940867 00600000 ############# done.
2160 00:49:13.941011
2161 00:49:13.944160 Sending tftp read request... done.
2162 00:49:13.944254
2163 00:49:13.947849 Waiting for the transfer...
2164 00:49:13.947944
2165 00:49:13.948018 00000000 # done.
2166 00:49:13.948090
2167 00:49:13.957458 Command line loaded dynamically from TFTP file: 10419506/tftp-deploy-g_op_fvk/kernel/cmdline
2168 00:49:13.957552
2169 00:49:13.984196 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10419506/extract-nfsrootfs-8rjzefah,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2170 00:49:13.984295
2171 00:49:13.990350 ec_init(0): CrosEC protocol v3 supported (256, 256)
2172 00:49:13.994746
2173 00:49:13.998132 Shutting down all USB controllers.
2174 00:49:13.998224
2175 00:49:13.998297 Removing current net device
2176 00:49:14.002139
2177 00:49:14.002231 Finalizing coreboot
2178 00:49:14.002305
2179 00:49:14.008338 Exiting depthcharge with code 4 at timestamp: 28813718
2180 00:49:14.008432
2181 00:49:14.008506
2182 00:49:14.008585 Starting kernel ...
2183 00:49:14.008651
2184 00:49:14.008715
2185 00:49:14.009115 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2186 00:49:14.009227 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2187 00:49:14.009320 Setting prompt string to ['Linux version [0-9]']
2188 00:49:14.009397 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 00:49:14.009472 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2191 00:53:35.009522 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2193 00:53:35.009882 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2195 00:53:35.010139 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2198 00:53:35.010582 end: 2 depthcharge-action (duration 00:05:00) [common]
2200 00:53:35.010959 Cleaning after the job
2201 00:53:35.011089 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/ramdisk
2202 00:53:35.012110 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/kernel
2203 00:53:35.013498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/nfsrootfs
2204 00:53:35.110333 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419506/tftp-deploy-g_op_fvk/modules
2205 00:53:35.111075 start: 4.1 power-off (timeout 00:00:30) [common]
2206 00:53:35.111271 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2207 00:53:35.190758 >> Command sent successfully.
2208 00:53:35.195800 Returned 0 in 0 seconds
2209 00:53:35.296429 end: 4.1 power-off (duration 00:00:00) [common]
2211 00:53:35.296782 start: 4.2 read-feedback (timeout 00:10:00) [common]
2212 00:53:35.297061 Listened to connection for namespace 'common' for up to 1s
2214 00:53:35.297461 Listened to connection for namespace 'common' for up to 1s
2215 00:53:36.297655 Finalising connection for namespace 'common'
2216 00:53:36.297832 Disconnecting from shell: Finalise
2217 00:53:36.297930
2218 00:53:36.398240 end: 4.2 read-feedback (duration 00:00:01) [common]
2219 00:53:36.398406 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419506
2220 00:53:36.850846 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419506
2221 00:53:36.851054 JobError: Your job cannot terminate cleanly.