Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 14:20:43.561301 lava-dispatcher, installed at version: 2023.08
2 14:20:43.561504 start: 0 validate
3 14:20:43.561632 Start time: 2023-10-20 14:20:43.561625+00:00 (UTC)
4 14:20:43.561759 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:20:43.561937 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 14:20:43.829584 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:20:43.829747 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.295-cip103-rt33%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:20:44.081182 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:20:44.081870 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.295-cip103-rt33%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:20:44.341080 validate duration: 0.78
12 14:20:44.342446 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:20:44.342996 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:20:44.343524 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:20:44.344132 Not decompressing ramdisk as can be used compressed.
16 14:20:44.344592 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 14:20:44.344933 saving as /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/ramdisk/rootfs.cpio.gz
18 14:20:44.345267 total size: 8418130 (8 MB)
19 14:20:44.352721 progress 0 % (0 MB)
20 14:20:44.364707 progress 5 % (0 MB)
21 14:20:44.371986 progress 10 % (0 MB)
22 14:20:44.377101 progress 15 % (1 MB)
23 14:20:44.381509 progress 20 % (1 MB)
24 14:20:44.385283 progress 25 % (2 MB)
25 14:20:44.388758 progress 30 % (2 MB)
26 14:20:44.391742 progress 35 % (2 MB)
27 14:20:44.394674 progress 40 % (3 MB)
28 14:20:44.397491 progress 45 % (3 MB)
29 14:20:44.400016 progress 50 % (4 MB)
30 14:20:44.402507 progress 55 % (4 MB)
31 14:20:44.404812 progress 60 % (4 MB)
32 14:20:44.406909 progress 65 % (5 MB)
33 14:20:44.409141 progress 70 % (5 MB)
34 14:20:44.411411 progress 75 % (6 MB)
35 14:20:44.413632 progress 80 % (6 MB)
36 14:20:44.415919 progress 85 % (6 MB)
37 14:20:44.418180 progress 90 % (7 MB)
38 14:20:44.420387 progress 95 % (7 MB)
39 14:20:44.422484 progress 100 % (8 MB)
40 14:20:44.422714 8 MB downloaded in 0.08 s (103.64 MB/s)
41 14:20:44.422871 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:20:44.423108 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:20:44.423194 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:20:44.423277 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:20:44.423417 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.295-cip103-rt33/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:20:44.423490 saving as /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/kernel/bzImage
48 14:20:44.423554 total size: 11493888 (10 MB)
49 14:20:44.423615 No compression specified
50 14:20:44.424726 progress 0 % (0 MB)
51 14:20:44.427934 progress 5 % (0 MB)
52 14:20:44.431067 progress 10 % (1 MB)
53 14:20:44.434063 progress 15 % (1 MB)
54 14:20:44.437344 progress 20 % (2 MB)
55 14:20:44.440456 progress 25 % (2 MB)
56 14:20:44.443733 progress 30 % (3 MB)
57 14:20:44.446803 progress 35 % (3 MB)
58 14:20:44.450031 progress 40 % (4 MB)
59 14:20:44.453014 progress 45 % (4 MB)
60 14:20:44.456218 progress 50 % (5 MB)
61 14:20:44.459224 progress 55 % (6 MB)
62 14:20:44.462510 progress 60 % (6 MB)
63 14:20:44.465533 progress 65 % (7 MB)
64 14:20:44.468641 progress 70 % (7 MB)
65 14:20:44.471785 progress 75 % (8 MB)
66 14:20:44.474827 progress 80 % (8 MB)
67 14:20:44.478073 progress 85 % (9 MB)
68 14:20:44.481064 progress 90 % (9 MB)
69 14:20:44.484319 progress 95 % (10 MB)
70 14:20:44.487395 progress 100 % (10 MB)
71 14:20:44.487634 10 MB downloaded in 0.06 s (171.07 MB/s)
72 14:20:44.487828 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:20:44.488190 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:20:44.488307 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:20:44.488421 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:20:44.488592 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.295-cip103-rt33/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:20:44.488691 saving as /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/modules/modules.tar
79 14:20:44.488786 total size: 484232 (0 MB)
80 14:20:44.488877 Using unxz to decompress xz
81 14:20:44.492962 progress 6 % (0 MB)
82 14:20:44.493364 progress 13 % (0 MB)
83 14:20:44.493603 progress 20 % (0 MB)
84 14:20:44.495411 progress 27 % (0 MB)
85 14:20:44.497450 progress 33 % (0 MB)
86 14:20:44.499404 progress 40 % (0 MB)
87 14:20:44.501380 progress 47 % (0 MB)
88 14:20:44.503358 progress 54 % (0 MB)
89 14:20:44.505359 progress 60 % (0 MB)
90 14:20:44.507558 progress 67 % (0 MB)
91 14:20:44.509592 progress 74 % (0 MB)
92 14:20:44.511748 progress 81 % (0 MB)
93 14:20:44.513705 progress 87 % (0 MB)
94 14:20:44.515706 progress 94 % (0 MB)
95 14:20:44.518243 progress 100 % (0 MB)
96 14:20:44.524728 0 MB downloaded in 0.04 s (12.85 MB/s)
97 14:20:44.524975 end: 1.3.1 http-download (duration 00:00:00) [common]
99 14:20:44.525242 end: 1.3 download-retry (duration 00:00:00) [common]
100 14:20:44.525338 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 14:20:44.525433 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 14:20:44.525514 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 14:20:44.525600 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 14:20:44.525868 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc
105 14:20:44.526012 makedir: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin
106 14:20:44.526120 makedir: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/tests
107 14:20:44.526220 makedir: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/results
108 14:20:44.526338 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-add-keys
109 14:20:44.526488 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-add-sources
110 14:20:44.526666 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-background-process-start
111 14:20:44.526800 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-background-process-stop
112 14:20:44.526929 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-common-functions
113 14:20:44.527056 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-echo-ipv4
114 14:20:44.527182 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-install-packages
115 14:20:44.527309 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-installed-packages
116 14:20:44.527435 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-os-build
117 14:20:44.527573 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-probe-channel
118 14:20:44.527739 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-probe-ip
119 14:20:44.528000 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-target-ip
120 14:20:44.528177 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-target-mac
121 14:20:44.528309 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-target-storage
122 14:20:44.528497 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-case
123 14:20:44.528640 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-event
124 14:20:44.528800 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-feedback
125 14:20:44.528937 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-raise
126 14:20:44.529066 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-reference
127 14:20:44.529192 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-runner
128 14:20:44.529319 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-set
129 14:20:44.529447 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-test-shell
130 14:20:44.529579 Updating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-install-packages (oe)
131 14:20:44.529732 Updating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/bin/lava-installed-packages (oe)
132 14:20:44.530031 Creating /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/environment
133 14:20:44.530189 LAVA metadata
134 14:20:44.530309 - LAVA_JOB_ID=11829244
135 14:20:44.530419 - LAVA_DISPATCHER_IP=192.168.201.1
136 14:20:44.530683 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 14:20:44.530806 skipped lava-vland-overlay
138 14:20:44.530923 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 14:20:44.531042 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 14:20:44.531134 skipped lava-multinode-overlay
141 14:20:44.531243 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 14:20:44.531358 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 14:20:44.531463 Loading test definitions
144 14:20:44.531589 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 14:20:44.531697 Using /lava-11829244 at stage 0
146 14:20:44.532133 uuid=11829244_1.4.2.3.1 testdef=None
147 14:20:44.532252 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 14:20:44.532366 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 14:20:44.533052 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 14:20:44.533306 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 14:20:44.534136 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 14:20:44.534372 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 14:20:44.534999 runner path: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/0/tests/0_dmesg test_uuid 11829244_1.4.2.3.1
156 14:20:44.535157 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 14:20:44.535388 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 14:20:44.535461 Using /lava-11829244 at stage 1
160 14:20:44.535761 uuid=11829244_1.4.2.3.5 testdef=None
161 14:20:44.535849 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 14:20:44.535933 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 14:20:44.536406 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 14:20:44.536624 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 14:20:44.537316 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 14:20:44.537544 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 14:20:44.538231 runner path: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/1/tests/1_bootrr test_uuid 11829244_1.4.2.3.5
170 14:20:44.538386 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 14:20:44.538595 Creating lava-test-runner.conf files
173 14:20:44.538658 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/0 for stage 0
174 14:20:44.538748 - 0_dmesg
175 14:20:44.538830 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11829244/lava-overlay-gdmmulpc/lava-11829244/1 for stage 1
176 14:20:44.538921 - 1_bootrr
177 14:20:44.539016 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 14:20:44.539101 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 14:20:44.548569 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 14:20:44.548677 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 14:20:44.548763 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 14:20:44.548849 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 14:20:44.548939 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 14:20:44.804810 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 14:20:44.805195 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 14:20:44.805309 extracting modules file /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11829244/extract-overlay-ramdisk-5lxhejxl/ramdisk
187 14:20:44.826554 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 14:20:44.826698 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 14:20:44.826793 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11829244/compress-overlay-d1uzir4c/overlay-1.4.2.4.tar.gz to ramdisk
190 14:20:44.826865 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11829244/compress-overlay-d1uzir4c/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11829244/extract-overlay-ramdisk-5lxhejxl/ramdisk
191 14:20:44.835618 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 14:20:44.835730 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 14:20:44.835824 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 14:20:44.835912 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 14:20:44.835990 Building ramdisk /var/lib/lava/dispatcher/tmp/11829244/extract-overlay-ramdisk-5lxhejxl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11829244/extract-overlay-ramdisk-5lxhejxl/ramdisk
196 14:20:44.973101 >> 53983 blocks
197 14:20:45.873570 rename /var/lib/lava/dispatcher/tmp/11829244/extract-overlay-ramdisk-5lxhejxl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
198 14:20:45.874085 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 14:20:45.874242 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 14:20:45.874378 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 14:20:45.874507 No mkimage arch provided, not using FIT.
202 14:20:45.874627 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 14:20:45.874744 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 14:20:45.874876 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 14:20:45.874998 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 14:20:45.875104 No LXC device requested
207 14:20:45.875213 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 14:20:45.875332 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 14:20:45.875445 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 14:20:45.875545 Checking files for TFTP limit of 4294967296 bytes.
211 14:20:45.876054 end: 1 tftp-deploy (duration 00:00:02) [common]
212 14:20:45.876188 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 14:20:45.876313 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 14:20:45.876479 substitutions:
215 14:20:45.876579 - {DTB}: None
216 14:20:45.876671 - {INITRD}: 11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
217 14:20:45.876760 - {KERNEL}: 11829244/tftp-deploy-c8p5zxtf/kernel/bzImage
218 14:20:45.876847 - {LAVA_MAC}: None
219 14:20:45.876933 - {PRESEED_CONFIG}: None
220 14:20:45.877018 - {PRESEED_LOCAL}: None
221 14:20:45.877103 - {RAMDISK}: 11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
222 14:20:45.877188 - {ROOT_PART}: None
223 14:20:45.877273 - {ROOT}: None
224 14:20:45.877358 - {SERVER_IP}: 192.168.201.1
225 14:20:45.877442 - {TEE}: None
226 14:20:45.877526 Parsed boot commands:
227 14:20:45.877609 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 14:20:45.877857 Parsed boot commands: tftpboot 192.168.201.1 11829244/tftp-deploy-c8p5zxtf/kernel/bzImage 11829244/tftp-deploy-c8p5zxtf/kernel/cmdline 11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
229 14:20:45.877947 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 14:20:45.878033 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 14:20:45.878131 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 14:20:45.878215 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 14:20:45.878286 Not connected, no need to disconnect.
234 14:20:45.878359 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 14:20:45.878440 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 14:20:45.878523 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-12'
237 14:20:45.882568 Setting prompt string to ['lava-test: # ']
238 14:20:45.883017 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 14:20:45.883176 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 14:20:45.883321 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 14:20:45.883458 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 14:20:45.883788 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
243 14:20:51.019994 >> Command sent successfully.
244 14:20:51.022919 Returned 0 in 5 seconds
245 14:20:51.123292 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 14:20:51.123621 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 14:20:51.123721 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 14:20:51.123813 Setting prompt string to 'Starting depthcharge on Voema...'
250 14:20:51.123881 Changing prompt to 'Starting depthcharge on Voema...'
251 14:20:51.123952 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 14:20:51.124218 [Enter `^Ec?' for help]
253 14:20:52.686320
254 14:20:52.686469
255 14:20:52.696276 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 14:20:52.699479 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
257 14:20:52.706244 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 14:20:52.710019 CPU: AES supported, TXT NOT supported, VT supported
259 14:20:52.716719 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 14:20:52.720325 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 14:20:52.726821 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 14:20:52.730408 VBOOT: Loading verstage.
263 14:20:52.733648 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 14:20:52.740102 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 14:20:52.743674 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 14:20:52.753608 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 14:20:52.760238 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 14:20:52.760324
269 14:20:52.760390
270 14:20:52.770725 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 14:20:52.786938 Probing TPM: . done!
272 14:20:52.790325 TPM ready after 0 ms
273 14:20:52.793584 Connected to device vid:did:rid of 1ae0:0028:00
274 14:20:52.804724 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
275 14:20:52.811552 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 14:20:52.814683 Initialized TPM device CR50 revision 0
277 14:20:52.871206 tlcl_send_startup: Startup return code is 0
278 14:20:52.871329 TPM: setup succeeded
279 14:20:52.886933 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 14:20:52.901099 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 14:20:52.913653 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 14:20:52.923737 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 14:20:52.927250 Chrome EC: UHEPI supported
284 14:20:52.930388 Phase 1
285 14:20:52.934005 FMAP: area GBB found @ 1805000 (458752 bytes)
286 14:20:52.944027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 14:20:52.950477 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 14:20:52.957051 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 14:20:52.964005 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 14:20:52.967372 Recovery requested (1009000e)
291 14:20:52.970742 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 14:20:52.981979 tlcl_extend: response is 0
293 14:20:52.988552 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 14:20:52.998482 tlcl_extend: response is 0
295 14:20:53.005157 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 14:20:53.011614 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 14:20:53.018430 BS: verstage times (exec / console): total (unknown) / 142 ms
298 14:20:53.018517
299 14:20:53.018583
300 14:20:53.031523 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 14:20:53.038207 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 14:20:53.041523 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 14:20:53.044859 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 14:20:53.051439 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 14:20:53.054688 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 14:20:53.058215 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 14:20:53.061367 TCO_STS: 0000 0000
308 14:20:53.064990 GEN_PMCON: d0015038 00002200
309 14:20:53.068191 GBLRST_CAUSE: 00000000 00000000
310 14:20:53.068277 HPR_CAUSE0: 00000000
311 14:20:53.071373 prev_sleep_state 5
312 14:20:53.074863 Boot Count incremented to 22408
313 14:20:53.081269 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 14:20:53.088102 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 14:20:53.094586 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 14:20:53.101279 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 14:20:53.105847 Chrome EC: UHEPI supported
318 14:20:53.112656 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 14:20:53.125253 Probing TPM: done!
320 14:20:53.132018 Connected to device vid:did:rid of 1ae0:0028:00
321 14:20:53.141918 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
322 14:20:53.145004 Initialized TPM device CR50 revision 0
323 14:20:53.160308 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 14:20:53.166821 MRC: Hash idx 0x100b comparison successful.
325 14:20:53.170427 MRC cache found, size faa8
326 14:20:53.170557 bootmode is set to: 2
327 14:20:53.173582 SPD index = 2
328 14:20:53.180323 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 14:20:53.183800 SPD: module type is LPDDR4X
330 14:20:53.187266 SPD: module part number is MT53D1G64D4NW-046
331 14:20:53.193673 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
332 14:20:53.197222 SPD: device width 16 bits, bus width 16 bits
333 14:20:53.200877 SPD: module size is 2048 MB (per channel)
334 14:20:53.631743 CBMEM:
335 14:20:53.635021 IMD: root @ 0x76fff000 254 entries.
336 14:20:53.638278 IMD: root @ 0x76ffec00 62 entries.
337 14:20:53.641435 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 14:20:53.648336 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 14:20:53.651430 External stage cache:
340 14:20:53.654626 IMD: root @ 0x7b3ff000 254 entries.
341 14:20:53.658051 IMD: root @ 0x7b3fec00 62 entries.
342 14:20:53.673029 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 14:20:53.679681 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 14:20:53.686141 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 14:20:53.699661 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 14:20:53.706541 cse_lite: Skip switching to RW in the recovery path
347 14:20:53.706653 8 DIMMs found
348 14:20:53.706755 SMM Memory Map
349 14:20:53.710052 SMRAM : 0x7b000000 0x800000
350 14:20:53.716521 Subregion 0: 0x7b000000 0x200000
351 14:20:53.719611 Subregion 1: 0x7b200000 0x200000
352 14:20:53.723200 Subregion 2: 0x7b400000 0x400000
353 14:20:53.723304 top_of_ram = 0x77000000
354 14:20:53.729785 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 14:20:53.736235 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 14:20:53.739584 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 14:20:53.746522 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 14:20:53.752883 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 14:20:53.759727 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 14:20:53.769413 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 14:20:53.772979 Processing 211 relocs. Offset value of 0x74c0b000
362 14:20:53.783019 BS: romstage times (exec / console): total (unknown) / 277 ms
363 14:20:53.788136
364 14:20:53.788246
365 14:20:53.798165 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 14:20:53.801623 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 14:20:53.811422 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 14:20:53.818068 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 14:20:53.824673 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 14:20:53.831205 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 14:20:53.875161 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 14:20:53.881527 Processing 5008 relocs. Offset value of 0x75d98000
373 14:20:53.885013 BS: postcar times (exec / console): total (unknown) / 59 ms
374 14:20:53.888291
375 14:20:53.888407
376 14:20:53.898282 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 14:20:53.898371 Normal boot
378 14:20:53.901448 FW_CONFIG value is 0x804c02
379 14:20:53.904815 PCI: 00:07.0 disabled by fw_config
380 14:20:53.908395 PCI: 00:07.1 disabled by fw_config
381 14:20:53.911449 PCI: 00:0d.2 disabled by fw_config
382 14:20:53.918236 PCI: 00:1c.7 disabled by fw_config
383 14:20:53.921386 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 14:20:53.928054 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 14:20:53.931286 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 14:20:53.938227 GENERIC: 0.0 disabled by fw_config
387 14:20:53.941481 GENERIC: 1.0 disabled by fw_config
388 14:20:53.944893 fw_config match found: DB_USB=USB3_ACTIVE
389 14:20:53.947976 fw_config match found: DB_USB=USB3_ACTIVE
390 14:20:53.951213 fw_config match found: DB_USB=USB3_ACTIVE
391 14:20:53.958085 fw_config match found: DB_USB=USB3_ACTIVE
392 14:20:53.961338 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 14:20:53.968029 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 14:20:53.977980 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 14:20:53.984598 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 14:20:53.987948 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 14:20:53.994722 microcode: Update skipped, already up-to-date
398 14:20:54.001603 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 14:20:54.028892 Detected 4 core, 8 thread CPU.
400 14:20:54.032029 Setting up SMI for CPU
401 14:20:54.035275 IED base = 0x7b400000
402 14:20:54.035361 IED size = 0x00400000
403 14:20:54.038843 Will perform SMM setup.
404 14:20:54.045273 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
405 14:20:54.051884 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 14:20:54.058594 Processing 16 relocs. Offset value of 0x00030000
407 14:20:54.061822 Attempting to start 7 APs
408 14:20:54.065320 Waiting for 10ms after sending INIT.
409 14:20:54.080525 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 14:20:54.080616 done.
411 14:20:54.084131 AP: slot 5 apic_id 4.
412 14:20:54.087472 AP: slot 4 apic_id 5.
413 14:20:54.087558 AP: slot 6 apic_id 2.
414 14:20:54.090601 AP: slot 2 apic_id 3.
415 14:20:54.093922 AP: slot 3 apic_id 7.
416 14:20:54.094004 AP: slot 7 apic_id 6.
417 14:20:54.100838 Waiting for 2nd SIPI to complete...done.
418 14:20:54.107182 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 14:20:54.113919 Processing 13 relocs. Offset value of 0x00038000
420 14:20:54.114005 Unable to locate Global NVS
421 14:20:54.123684 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 14:20:54.127242 Installing permanent SMM handler to 0x7b000000
423 14:20:54.137162 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 14:20:54.140201 Processing 794 relocs. Offset value of 0x7b010000
425 14:20:54.150424 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 14:20:54.153578 Processing 13 relocs. Offset value of 0x7b008000
427 14:20:54.160366 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 14:20:54.166861 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 14:20:54.170032 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 14:20:54.176805 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 14:20:54.183539 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 14:20:54.189892 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 14:20:54.196616 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 14:20:54.196732 Unable to locate Global NVS
435 14:20:54.206548 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 14:20:54.209794 Clearing SMI status registers
437 14:20:54.209912 SMI_STS: PM1
438 14:20:54.213178 PM1_STS: PWRBTN
439 14:20:54.219646 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 14:20:54.222945 In relocation handler: CPU 0
441 14:20:54.226632 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 14:20:54.233412 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 14:20:54.233526 Relocation complete.
444 14:20:54.243344 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 14:20:54.243432 In relocation handler: CPU 1
446 14:20:54.249862 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 14:20:54.249977 Relocation complete.
448 14:20:54.259593 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
449 14:20:54.259682 In relocation handler: CPU 2
450 14:20:54.266390 New SMBASE=0x7afff800 IEDBASE=0x7b400000
451 14:20:54.266473 Relocation complete.
452 14:20:54.273022 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
453 14:20:54.276343 In relocation handler: CPU 6
454 14:20:54.283065 New SMBASE=0x7affe800 IEDBASE=0x7b400000
455 14:20:54.286209 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 14:20:54.289728 Relocation complete.
457 14:20:54.296262 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
458 14:20:54.299588 In relocation handler: CPU 5
459 14:20:54.302886 New SMBASE=0x7affec00 IEDBASE=0x7b400000
460 14:20:54.306283 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 14:20:54.309572 Relocation complete.
462 14:20:54.316294 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
463 14:20:54.319475 In relocation handler: CPU 3
464 14:20:54.322834 New SMBASE=0x7afff400 IEDBASE=0x7b400000
465 14:20:54.326065 Relocation complete.
466 14:20:54.332899 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
467 14:20:54.336193 In relocation handler: CPU 7
468 14:20:54.339616 New SMBASE=0x7affe400 IEDBASE=0x7b400000
469 14:20:54.346214 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 14:20:54.346302 Relocation complete.
471 14:20:54.356241 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
472 14:20:54.359658 In relocation handler: CPU 4
473 14:20:54.362996 New SMBASE=0x7afff000 IEDBASE=0x7b400000
474 14:20:54.363113 Relocation complete.
475 14:20:54.366101 Initializing CPU #0
476 14:20:54.369612 CPU: vendor Intel device 806c1
477 14:20:54.372960 CPU: family 06, model 8c, stepping 01
478 14:20:54.376262 Clearing out pending MCEs
479 14:20:54.379484 Setting up local APIC...
480 14:20:54.379564 apic_id: 0x00 done.
481 14:20:54.382707 Turbo is available but hidden
482 14:20:54.385993 Turbo is available and visible
483 14:20:54.392806 microcode: Update skipped, already up-to-date
484 14:20:54.392920 CPU #0 initialized
485 14:20:54.396197 Initializing CPU #6
486 14:20:54.399337 Initializing CPU #2
487 14:20:54.402522 CPU: vendor Intel device 806c1
488 14:20:54.406108 CPU: family 06, model 8c, stepping 01
489 14:20:54.409328 CPU: vendor Intel device 806c1
490 14:20:54.412661 CPU: family 06, model 8c, stepping 01
491 14:20:54.412737 Initializing CPU #5
492 14:20:54.415892 Initializing CPU #4
493 14:20:54.419224 CPU: vendor Intel device 806c1
494 14:20:54.422453 CPU: family 06, model 8c, stepping 01
495 14:20:54.425815 CPU: vendor Intel device 806c1
496 14:20:54.429319 CPU: family 06, model 8c, stepping 01
497 14:20:54.432522 Clearing out pending MCEs
498 14:20:54.435774 Clearing out pending MCEs
499 14:20:54.439302 Setting up local APIC...
500 14:20:54.439386 Initializing CPU #3
501 14:20:54.442885 Initializing CPU #7
502 14:20:54.446396 CPU: vendor Intel device 806c1
503 14:20:54.450182 CPU: family 06, model 8c, stepping 01
504 14:20:54.453449 CPU: vendor Intel device 806c1
505 14:20:54.456766 CPU: family 06, model 8c, stepping 01
506 14:20:54.456845 Clearing out pending MCEs
507 14:20:54.460102 Clearing out pending MCEs
508 14:20:54.463331 Setting up local APIC...
509 14:20:54.466613 Clearing out pending MCEs
510 14:20:54.469917 Clearing out pending MCEs
511 14:20:54.470030 Setting up local APIC...
512 14:20:54.473167 Setting up local APIC...
513 14:20:54.476536 Setting up local APIC...
514 14:20:54.479868 apic_id: 0x04 done.
515 14:20:54.479957 apic_id: 0x05 done.
516 14:20:54.486471 microcode: Update skipped, already up-to-date
517 14:20:54.490046 microcode: Update skipped, already up-to-date
518 14:20:54.493197 Initializing CPU #1
519 14:20:54.493283 Setting up local APIC...
520 14:20:54.496715 apic_id: 0x02 done.
521 14:20:54.499962 apic_id: 0x03 done.
522 14:20:54.503294 microcode: Update skipped, already up-to-date
523 14:20:54.506835 microcode: Update skipped, already up-to-date
524 14:20:54.510033 CPU #6 initialized
525 14:20:54.513306 CPU #2 initialized
526 14:20:54.513419 apic_id: 0x06 done.
527 14:20:54.516574 apic_id: 0x07 done.
528 14:20:54.519862 microcode: Update skipped, already up-to-date
529 14:20:54.526540 microcode: Update skipped, already up-to-date
530 14:20:54.526627 CPU #7 initialized
531 14:20:54.529900 CPU #3 initialized
532 14:20:54.529985 CPU #5 initialized
533 14:20:54.533248 CPU: vendor Intel device 806c1
534 14:20:54.536462 CPU: family 06, model 8c, stepping 01
535 14:20:54.539636 Clearing out pending MCEs
536 14:20:54.542853 CPU #4 initialized
537 14:20:54.546340 Setting up local APIC...
538 14:20:54.546430 apic_id: 0x01 done.
539 14:20:54.552904 microcode: Update skipped, already up-to-date
540 14:20:54.552995 CPU #1 initialized
541 14:20:54.559534 bsp_do_flight_plan done after 454 msecs.
542 14:20:54.562992 CPU: frequency set to 4400 MHz
543 14:20:54.563089 Enabling SMIs.
544 14:20:54.569583 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 14:20:54.585328 SATAXPCIE1 indicates PCIe NVMe is present
546 14:20:54.588641 Probing TPM: done!
547 14:20:54.592235 Connected to device vid:did:rid of 1ae0:0028:00
548 14:20:54.602914 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
549 14:20:54.605678 Initialized TPM device CR50 revision 0
550 14:20:54.609271 Enabling S0i3.4
551 14:20:54.615917 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 14:20:54.618945 Found a VBT of 8704 bytes after decompression
553 14:20:54.625657 cse_lite: CSE RO boot. HybridStorageMode disabled
554 14:20:54.632233 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 14:20:54.707779 FSPS returned 0
556 14:20:54.711009 Executing Phase 1 of FspMultiPhaseSiInit
557 14:20:54.720965 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 14:20:54.724362 port C0 DISC req: usage 1 usb3 1 usb2 5
559 14:20:54.727537 Raw Buffer output 0 00000511
560 14:20:54.730701 Raw Buffer output 1 00000000
561 14:20:54.734481 pmc_send_ipc_cmd succeeded
562 14:20:54.741209 port C1 DISC req: usage 1 usb3 2 usb2 3
563 14:20:54.741319 Raw Buffer output 0 00000321
564 14:20:54.744620 Raw Buffer output 1 00000000
565 14:20:54.748658 pmc_send_ipc_cmd succeeded
566 14:20:54.753874 Detected 4 core, 8 thread CPU.
567 14:20:54.757188 Detected 4 core, 8 thread CPU.
568 14:20:54.957668 Display FSP Version Info HOB
569 14:20:54.961241 Reference Code - CPU = a.0.4c.31
570 14:20:54.964255 uCode Version = 0.0.0.86
571 14:20:54.967802 TXT ACM version = ff.ff.ff.ffff
572 14:20:54.970910 Reference Code - ME = a.0.4c.31
573 14:20:54.974241 MEBx version = 0.0.0.0
574 14:20:54.977808 ME Firmware Version = Consumer SKU
575 14:20:54.981033 Reference Code - PCH = a.0.4c.31
576 14:20:54.984337 PCH-CRID Status = Disabled
577 14:20:54.987655 PCH-CRID Original Value = ff.ff.ff.ffff
578 14:20:54.990991 PCH-CRID New Value = ff.ff.ff.ffff
579 14:20:54.994438 OPROM - RST - RAID = ff.ff.ff.ffff
580 14:20:54.997670 PCH Hsio Version = 4.0.0.0
581 14:20:55.000802 Reference Code - SA - System Agent = a.0.4c.31
582 14:20:55.004245 Reference Code - MRC = 2.0.0.1
583 14:20:55.007528 SA - PCIe Version = a.0.4c.31
584 14:20:55.011008 SA-CRID Status = Disabled
585 14:20:55.014193 SA-CRID Original Value = 0.0.0.1
586 14:20:55.017707 SA-CRID New Value = 0.0.0.1
587 14:20:55.021189 OPROM - VBIOS = ff.ff.ff.ffff
588 14:20:55.024804 IO Manageability Engine FW Version = 11.1.4.0
589 14:20:55.028603 PHY Build Version = 0.0.0.e0
590 14:20:55.032000 Thunderbolt(TM) FW Version = 0.0.0.0
591 14:20:55.038652 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 14:20:55.038742 ITSS IRQ Polarities Before:
593 14:20:55.041981 IPC0: 0xffffffff
594 14:20:55.042060 IPC1: 0xffffffff
595 14:20:55.045152 IPC2: 0xffffffff
596 14:20:55.045229 IPC3: 0xffffffff
597 14:20:55.048487 ITSS IRQ Polarities After:
598 14:20:55.051984 IPC0: 0xffffffff
599 14:20:55.052062 IPC1: 0xffffffff
600 14:20:55.055203 IPC2: 0xffffffff
601 14:20:55.055281 IPC3: 0xffffffff
602 14:20:55.061933 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 14:20:55.072004 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 14:20:55.085205 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 14:20:55.095220 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 14:20:55.101813 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
607 14:20:55.105314 Enumerating buses...
608 14:20:55.108423 Show all devs... Before device enumeration.
609 14:20:55.112055 Root Device: enabled 1
610 14:20:55.115172 DOMAIN: 0000: enabled 1
611 14:20:55.118502 CPU_CLUSTER: 0: enabled 1
612 14:20:55.118595 PCI: 00:00.0: enabled 1
613 14:20:55.121948 PCI: 00:02.0: enabled 1
614 14:20:55.125138 PCI: 00:04.0: enabled 1
615 14:20:55.128622 PCI: 00:05.0: enabled 1
616 14:20:55.128703 PCI: 00:06.0: enabled 0
617 14:20:55.131857 PCI: 00:07.0: enabled 0
618 14:20:55.135343 PCI: 00:07.1: enabled 0
619 14:20:55.138519 PCI: 00:07.2: enabled 0
620 14:20:55.138605 PCI: 00:07.3: enabled 0
621 14:20:55.141654 PCI: 00:08.0: enabled 1
622 14:20:55.144931 PCI: 00:09.0: enabled 0
623 14:20:55.145015 PCI: 00:0a.0: enabled 0
624 14:20:55.148453 PCI: 00:0d.0: enabled 1
625 14:20:55.151521 PCI: 00:0d.1: enabled 0
626 14:20:55.155092 PCI: 00:0d.2: enabled 0
627 14:20:55.155177 PCI: 00:0d.3: enabled 0
628 14:20:55.158266 PCI: 00:0e.0: enabled 0
629 14:20:55.161894 PCI: 00:10.2: enabled 1
630 14:20:55.165176 PCI: 00:10.6: enabled 0
631 14:20:55.165257 PCI: 00:10.7: enabled 0
632 14:20:55.168322 PCI: 00:12.0: enabled 0
633 14:20:55.171514 PCI: 00:12.6: enabled 0
634 14:20:55.174922 PCI: 00:13.0: enabled 0
635 14:20:55.175002 PCI: 00:14.0: enabled 1
636 14:20:55.178415 PCI: 00:14.1: enabled 0
637 14:20:55.181584 PCI: 00:14.2: enabled 1
638 14:20:55.181669 PCI: 00:14.3: enabled 1
639 14:20:55.184801 PCI: 00:15.0: enabled 1
640 14:20:55.188428 PCI: 00:15.1: enabled 1
641 14:20:55.191567 PCI: 00:15.2: enabled 1
642 14:20:55.191675 PCI: 00:15.3: enabled 1
643 14:20:55.194809 PCI: 00:16.0: enabled 1
644 14:20:55.197988 PCI: 00:16.1: enabled 0
645 14:20:55.201599 PCI: 00:16.2: enabled 0
646 14:20:55.201710 PCI: 00:16.3: enabled 0
647 14:20:55.204900 PCI: 00:16.4: enabled 0
648 14:20:55.208075 PCI: 00:16.5: enabled 0
649 14:20:55.211376 PCI: 00:17.0: enabled 1
650 14:20:55.211483 PCI: 00:19.0: enabled 0
651 14:20:55.214583 PCI: 00:19.1: enabled 1
652 14:20:55.217956 PCI: 00:19.2: enabled 0
653 14:20:55.221489 PCI: 00:1c.0: enabled 1
654 14:20:55.221605 PCI: 00:1c.1: enabled 0
655 14:20:55.224711 PCI: 00:1c.2: enabled 0
656 14:20:55.228177 PCI: 00:1c.3: enabled 0
657 14:20:55.228255 PCI: 00:1c.4: enabled 0
658 14:20:55.231341 PCI: 00:1c.5: enabled 0
659 14:20:55.234587 PCI: 00:1c.6: enabled 1
660 14:20:55.238191 PCI: 00:1c.7: enabled 0
661 14:20:55.238303 PCI: 00:1d.0: enabled 1
662 14:20:55.241389 PCI: 00:1d.1: enabled 0
663 14:20:55.244537 PCI: 00:1d.2: enabled 1
664 14:20:55.247871 PCI: 00:1d.3: enabled 0
665 14:20:55.247986 PCI: 00:1e.0: enabled 1
666 14:20:55.251244 PCI: 00:1e.1: enabled 0
667 14:20:55.254686 PCI: 00:1e.2: enabled 1
668 14:20:55.258067 PCI: 00:1e.3: enabled 1
669 14:20:55.258165 PCI: 00:1f.0: enabled 1
670 14:20:55.261385 PCI: 00:1f.1: enabled 0
671 14:20:55.264565 PCI: 00:1f.2: enabled 1
672 14:20:55.264658 PCI: 00:1f.3: enabled 1
673 14:20:55.267806 PCI: 00:1f.4: enabled 0
674 14:20:55.271368 PCI: 00:1f.5: enabled 1
675 14:20:55.274659 PCI: 00:1f.6: enabled 0
676 14:20:55.274747 PCI: 00:1f.7: enabled 0
677 14:20:55.277807 APIC: 00: enabled 1
678 14:20:55.281155 GENERIC: 0.0: enabled 1
679 14:20:55.284587 GENERIC: 0.0: enabled 1
680 14:20:55.284701 GENERIC: 1.0: enabled 1
681 14:20:55.287716 GENERIC: 0.0: enabled 1
682 14:20:55.291223 GENERIC: 1.0: enabled 1
683 14:20:55.291308 USB0 port 0: enabled 1
684 14:20:55.294418 GENERIC: 0.0: enabled 1
685 14:20:55.298004 USB0 port 0: enabled 1
686 14:20:55.300943 GENERIC: 0.0: enabled 1
687 14:20:55.301028 I2C: 00:1a: enabled 1
688 14:20:55.304576 I2C: 00:31: enabled 1
689 14:20:55.307758 I2C: 00:32: enabled 1
690 14:20:55.307870 I2C: 00:10: enabled 1
691 14:20:55.311227 I2C: 00:15: enabled 1
692 14:20:55.314310 GENERIC: 0.0: enabled 0
693 14:20:55.314395 GENERIC: 1.0: enabled 0
694 14:20:55.317881 GENERIC: 0.0: enabled 1
695 14:20:55.321090 SPI: 00: enabled 1
696 14:20:55.321175 SPI: 00: enabled 1
697 14:20:55.324337 PNP: 0c09.0: enabled 1
698 14:20:55.327836 GENERIC: 0.0: enabled 1
699 14:20:55.330967 USB3 port 0: enabled 1
700 14:20:55.331052 USB3 port 1: enabled 1
701 14:20:55.334553 USB3 port 2: enabled 0
702 14:20:55.337871 USB3 port 3: enabled 0
703 14:20:55.337955 USB2 port 0: enabled 0
704 14:20:55.340896 USB2 port 1: enabled 1
705 14:20:55.344327 USB2 port 2: enabled 1
706 14:20:55.344411 USB2 port 3: enabled 0
707 14:20:55.347647 USB2 port 4: enabled 1
708 14:20:55.350807 USB2 port 5: enabled 0
709 14:20:55.354220 USB2 port 6: enabled 0
710 14:20:55.354301 USB2 port 7: enabled 0
711 14:20:55.357607 USB2 port 8: enabled 0
712 14:20:55.360802 USB2 port 9: enabled 0
713 14:20:55.360881 USB3 port 0: enabled 0
714 14:20:55.364274 USB3 port 1: enabled 1
715 14:20:55.367586 USB3 port 2: enabled 0
716 14:20:55.370657 USB3 port 3: enabled 0
717 14:20:55.370766 GENERIC: 0.0: enabled 1
718 14:20:55.374246 GENERIC: 1.0: enabled 1
719 14:20:55.377444 APIC: 01: enabled 1
720 14:20:55.377561 APIC: 03: enabled 1
721 14:20:55.380720 APIC: 07: enabled 1
722 14:20:55.380820 APIC: 05: enabled 1
723 14:20:55.384022 APIC: 04: enabled 1
724 14:20:55.387477 APIC: 02: enabled 1
725 14:20:55.387588 APIC: 06: enabled 1
726 14:20:55.390829 Compare with tree...
727 14:20:55.394101 Root Device: enabled 1
728 14:20:55.394191 DOMAIN: 0000: enabled 1
729 14:20:55.397367 PCI: 00:00.0: enabled 1
730 14:20:55.400640 PCI: 00:02.0: enabled 1
731 14:20:55.403884 PCI: 00:04.0: enabled 1
732 14:20:55.407211 GENERIC: 0.0: enabled 1
733 14:20:55.407291 PCI: 00:05.0: enabled 1
734 14:20:55.410541 PCI: 00:06.0: enabled 0
735 14:20:55.413890 PCI: 00:07.0: enabled 0
736 14:20:55.417397 GENERIC: 0.0: enabled 1
737 14:20:55.420631 PCI: 00:07.1: enabled 0
738 14:20:55.420727 GENERIC: 1.0: enabled 1
739 14:20:55.423929 PCI: 00:07.2: enabled 0
740 14:20:55.427285 GENERIC: 0.0: enabled 1
741 14:20:55.430859 PCI: 00:07.3: enabled 0
742 14:20:55.433921 GENERIC: 1.0: enabled 1
743 14:20:55.434025 PCI: 00:08.0: enabled 1
744 14:20:55.437336 PCI: 00:09.0: enabled 0
745 14:20:55.440603 PCI: 00:0a.0: enabled 0
746 14:20:55.444009 PCI: 00:0d.0: enabled 1
747 14:20:55.447429 USB0 port 0: enabled 1
748 14:20:55.447515 USB3 port 0: enabled 1
749 14:20:55.450595 USB3 port 1: enabled 1
750 14:20:55.453808 USB3 port 2: enabled 0
751 14:20:55.457048 USB3 port 3: enabled 0
752 14:20:55.460272 PCI: 00:0d.1: enabled 0
753 14:20:55.463572 PCI: 00:0d.2: enabled 0
754 14:20:55.463679 GENERIC: 0.0: enabled 1
755 14:20:55.466858 PCI: 00:0d.3: enabled 0
756 14:20:55.470366 PCI: 00:0e.0: enabled 0
757 14:20:55.473501 PCI: 00:10.2: enabled 1
758 14:20:55.477223 PCI: 00:10.6: enabled 0
759 14:20:55.477306 PCI: 00:10.7: enabled 0
760 14:20:55.480380 PCI: 00:12.0: enabled 0
761 14:20:55.483531 PCI: 00:12.6: enabled 0
762 14:20:55.486846 PCI: 00:13.0: enabled 0
763 14:20:55.490399 PCI: 00:14.0: enabled 1
764 14:20:55.490482 USB0 port 0: enabled 1
765 14:20:55.493929 USB2 port 0: enabled 0
766 14:20:55.496844 USB2 port 1: enabled 1
767 14:20:55.500155 USB2 port 2: enabled 1
768 14:20:55.503592 USB2 port 3: enabled 0
769 14:20:55.503675 USB2 port 4: enabled 1
770 14:20:55.506902 USB2 port 5: enabled 0
771 14:20:55.510089 USB2 port 6: enabled 0
772 14:20:55.513353 USB2 port 7: enabled 0
773 14:20:55.517011 USB2 port 8: enabled 0
774 14:20:55.520230 USB2 port 9: enabled 0
775 14:20:55.520313 USB3 port 0: enabled 0
776 14:20:55.523495 USB3 port 1: enabled 1
777 14:20:55.526765 USB3 port 2: enabled 0
778 14:20:55.530126 USB3 port 3: enabled 0
779 14:20:55.533506 PCI: 00:14.1: enabled 0
780 14:20:55.533589 PCI: 00:14.2: enabled 1
781 14:20:55.536813 PCI: 00:14.3: enabled 1
782 14:20:55.540115 GENERIC: 0.0: enabled 1
783 14:20:55.543256 PCI: 00:15.0: enabled 1
784 14:20:55.546887 I2C: 00:1a: enabled 1
785 14:20:55.546970 I2C: 00:31: enabled 1
786 14:20:55.550006 I2C: 00:32: enabled 1
787 14:20:55.553222 PCI: 00:15.1: enabled 1
788 14:20:55.556746 I2C: 00:10: enabled 1
789 14:20:55.556830 PCI: 00:15.2: enabled 1
790 14:20:55.560099 PCI: 00:15.3: enabled 1
791 14:20:55.563263 PCI: 00:16.0: enabled 1
792 14:20:55.566498 PCI: 00:16.1: enabled 0
793 14:20:55.569957 PCI: 00:16.2: enabled 0
794 14:20:55.570059 PCI: 00:16.3: enabled 0
795 14:20:55.573370 PCI: 00:16.4: enabled 0
796 14:20:55.576752 PCI: 00:16.5: enabled 0
797 14:20:55.579858 PCI: 00:17.0: enabled 1
798 14:20:55.583111 PCI: 00:19.0: enabled 0
799 14:20:55.583208 PCI: 00:19.1: enabled 1
800 14:20:55.586584 I2C: 00:15: enabled 1
801 14:20:55.589786 PCI: 00:19.2: enabled 0
802 14:20:55.593341 PCI: 00:1d.0: enabled 1
803 14:20:55.596676 GENERIC: 0.0: enabled 1
804 14:20:55.596761 PCI: 00:1e.0: enabled 1
805 14:20:55.599717 PCI: 00:1e.1: enabled 0
806 14:20:55.603324 PCI: 00:1e.2: enabled 1
807 14:20:55.606617 SPI: 00: enabled 1
808 14:20:55.606702 PCI: 00:1e.3: enabled 1
809 14:20:55.610030 SPI: 00: enabled 1
810 14:20:55.613204 PCI: 00:1f.0: enabled 1
811 14:20:55.616432 PNP: 0c09.0: enabled 1
812 14:20:55.619757 PCI: 00:1f.1: enabled 0
813 14:20:55.619841 PCI: 00:1f.2: enabled 1
814 14:20:55.622956 GENERIC: 0.0: enabled 1
815 14:20:55.626575 GENERIC: 0.0: enabled 1
816 14:20:55.629673 GENERIC: 1.0: enabled 1
817 14:20:55.633221 PCI: 00:1f.3: enabled 1
818 14:20:55.633304 PCI: 00:1f.4: enabled 0
819 14:20:55.636540 PCI: 00:1f.5: enabled 1
820 14:20:55.688234 PCI: 00:1f.6: enabled 0
821 14:20:55.688348 PCI: 00:1f.7: enabled 0
822 14:20:55.688607 CPU_CLUSTER: 0: enabled 1
823 14:20:55.688700 APIC: 00: enabled 1
824 14:20:55.688768 APIC: 01: enabled 1
825 14:20:55.688854 APIC: 03: enabled 1
826 14:20:55.688916 APIC: 07: enabled 1
827 14:20:55.689000 APIC: 05: enabled 1
828 14:20:55.689116 APIC: 04: enabled 1
829 14:20:55.689191 APIC: 02: enabled 1
830 14:20:55.689250 APIC: 06: enabled 1
831 14:20:55.689305 Root Device scanning...
832 14:20:55.689388 scan_static_bus for Root Device
833 14:20:55.689495 DOMAIN: 0000 enabled
834 14:20:55.689583 CPU_CLUSTER: 0 enabled
835 14:20:55.689667 DOMAIN: 0000 scanning...
836 14:20:55.689751 PCI: pci_scan_bus for bus 00
837 14:20:55.689877 PCI: 00:00.0 [8086/0000] ops
838 14:20:55.689962 PCI: 00:00.0 [8086/9a12] enabled
839 14:20:55.716092 PCI: 00:02.0 [8086/0000] bus ops
840 14:20:55.716253 PCI: 00:02.0 [8086/9a40] enabled
841 14:20:55.716528 PCI: 00:04.0 [8086/0000] bus ops
842 14:20:55.716610 PCI: 00:04.0 [8086/9a03] enabled
843 14:20:55.716674 PCI: 00:05.0 [8086/9a19] enabled
844 14:20:55.716734 PCI: 00:07.0 [0000/0000] hidden
845 14:20:55.716804 PCI: 00:08.0 [8086/9a11] enabled
846 14:20:55.716864 PCI: 00:0a.0 [8086/9a0d] disabled
847 14:20:55.720026 PCI: 00:0d.0 [8086/0000] bus ops
848 14:20:55.720112 PCI: 00:0d.0 [8086/9a13] enabled
849 14:20:55.723294 PCI: 00:14.0 [8086/0000] bus ops
850 14:20:55.726456 PCI: 00:14.0 [8086/a0ed] enabled
851 14:20:55.729993 PCI: 00:14.2 [8086/a0ef] enabled
852 14:20:55.733302 PCI: 00:14.3 [8086/0000] bus ops
853 14:20:55.736482 PCI: 00:14.3 [8086/a0f0] enabled
854 14:20:55.740248 PCI: 00:15.0 [8086/0000] bus ops
855 14:20:55.743092 PCI: 00:15.0 [8086/a0e8] enabled
856 14:20:55.746521 PCI: 00:15.1 [8086/0000] bus ops
857 14:20:55.749718 PCI: 00:15.1 [8086/a0e9] enabled
858 14:20:55.753300 PCI: 00:15.2 [8086/0000] bus ops
859 14:20:55.756440 PCI: 00:15.2 [8086/a0ea] enabled
860 14:20:55.759780 PCI: 00:15.3 [8086/0000] bus ops
861 14:20:55.763301 PCI: 00:15.3 [8086/a0eb] enabled
862 14:20:55.766393 PCI: 00:16.0 [8086/0000] ops
863 14:20:55.769945 PCI: 00:16.0 [8086/a0e0] enabled
864 14:20:55.776560 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 14:20:55.779762 PCI: 00:19.0 [8086/0000] bus ops
866 14:20:55.783298 PCI: 00:19.0 [8086/a0c5] disabled
867 14:20:55.786364 PCI: 00:19.1 [8086/0000] bus ops
868 14:20:55.789739 PCI: 00:19.1 [8086/a0c6] enabled
869 14:20:55.792933 PCI: 00:1d.0 [8086/0000] bus ops
870 14:20:55.796308 PCI: 00:1d.0 [8086/a0b0] enabled
871 14:20:55.799675 PCI: 00:1e.0 [8086/0000] ops
872 14:20:55.803143 PCI: 00:1e.0 [8086/a0a8] enabled
873 14:20:55.806477 PCI: 00:1e.2 [8086/0000] bus ops
874 14:20:55.809804 PCI: 00:1e.2 [8086/a0aa] enabled
875 14:20:55.813209 PCI: 00:1e.3 [8086/0000] bus ops
876 14:20:55.816397 PCI: 00:1e.3 [8086/a0ab] enabled
877 14:20:55.819867 PCI: 00:1f.0 [8086/0000] bus ops
878 14:20:55.822875 PCI: 00:1f.0 [8086/a087] enabled
879 14:20:55.822960 RTC Init
880 14:20:55.826233 Set power on after power failure.
881 14:20:55.829711 Disabling Deep S3
882 14:20:55.829831 Disabling Deep S3
883 14:20:55.833007 Disabling Deep S4
884 14:20:55.833116 Disabling Deep S4
885 14:20:55.836238 Disabling Deep S5
886 14:20:55.836323 Disabling Deep S5
887 14:20:55.839579 PCI: 00:1f.2 [0000/0000] hidden
888 14:20:55.842825 PCI: 00:1f.3 [8086/0000] bus ops
889 14:20:55.846479 PCI: 00:1f.3 [8086/a0c8] enabled
890 14:20:55.849662 PCI: 00:1f.5 [8086/0000] bus ops
891 14:20:55.852910 PCI: 00:1f.5 [8086/a0a4] enabled
892 14:20:55.856412 PCI: Leftover static devices:
893 14:20:55.859634 PCI: 00:10.2
894 14:20:55.859746 PCI: 00:10.6
895 14:20:55.862949 PCI: 00:10.7
896 14:20:55.863034 PCI: 00:06.0
897 14:20:55.863101 PCI: 00:07.1
898 14:20:55.866332 PCI: 00:07.2
899 14:20:55.866418 PCI: 00:07.3
900 14:20:55.869577 PCI: 00:09.0
901 14:20:55.869662 PCI: 00:0d.1
902 14:20:55.869729 PCI: 00:0d.2
903 14:20:55.872853 PCI: 00:0d.3
904 14:20:55.872938 PCI: 00:0e.0
905 14:20:55.876289 PCI: 00:12.0
906 14:20:55.876374 PCI: 00:12.6
907 14:20:55.876441 PCI: 00:13.0
908 14:20:55.879532 PCI: 00:14.1
909 14:20:55.879617 PCI: 00:16.1
910 14:20:55.882883 PCI: 00:16.2
911 14:20:55.882969 PCI: 00:16.3
912 14:20:55.886201 PCI: 00:16.4
913 14:20:55.886288 PCI: 00:16.5
914 14:20:55.886355 PCI: 00:17.0
915 14:20:55.889408 PCI: 00:19.2
916 14:20:55.889494 PCI: 00:1e.1
917 14:20:55.892833 PCI: 00:1f.1
918 14:20:55.892918 PCI: 00:1f.4
919 14:20:55.892984 PCI: 00:1f.6
920 14:20:55.896014 PCI: 00:1f.7
921 14:20:55.899745 PCI: Check your devicetree.cb.
922 14:20:55.902696 PCI: 00:02.0 scanning...
923 14:20:55.906079 scan_generic_bus for PCI: 00:02.0
924 14:20:55.909492 scan_generic_bus for PCI: 00:02.0 done
925 14:20:55.912588 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 14:20:55.915893 PCI: 00:04.0 scanning...
927 14:20:55.919500 scan_generic_bus for PCI: 00:04.0
928 14:20:55.922613 GENERIC: 0.0 enabled
929 14:20:55.929230 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 14:20:55.932581 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 14:20:55.935824 PCI: 00:0d.0 scanning...
932 14:20:55.939063 scan_static_bus for PCI: 00:0d.0
933 14:20:55.942316 USB0 port 0 enabled
934 14:20:55.942401 USB0 port 0 scanning...
935 14:20:55.945873 scan_static_bus for USB0 port 0
936 14:20:55.949168 USB3 port 0 enabled
937 14:20:55.952350 USB3 port 1 enabled
938 14:20:55.952435 USB3 port 2 disabled
939 14:20:55.955841 USB3 port 3 disabled
940 14:20:55.958947 USB3 port 0 scanning...
941 14:20:55.962334 scan_static_bus for USB3 port 0
942 14:20:55.965582 scan_static_bus for USB3 port 0 done
943 14:20:55.968867 scan_bus: bus USB3 port 0 finished in 6 msecs
944 14:20:55.972324 USB3 port 1 scanning...
945 14:20:55.975520 scan_static_bus for USB3 port 1
946 14:20:55.978976 scan_static_bus for USB3 port 1 done
947 14:20:55.982416 scan_bus: bus USB3 port 1 finished in 6 msecs
948 14:20:55.988863 scan_static_bus for USB0 port 0 done
949 14:20:55.992285 scan_bus: bus USB0 port 0 finished in 43 msecs
950 14:20:55.995377 scan_static_bus for PCI: 00:0d.0 done
951 14:20:56.002007 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 14:20:56.002093 PCI: 00:14.0 scanning...
953 14:20:56.005303 scan_static_bus for PCI: 00:14.0
954 14:20:56.008939 USB0 port 0 enabled
955 14:20:56.012335 USB0 port 0 scanning...
956 14:20:56.015351 scan_static_bus for USB0 port 0
957 14:20:56.015436 USB2 port 0 disabled
958 14:20:56.018904 USB2 port 1 enabled
959 14:20:56.022021 USB2 port 2 enabled
960 14:20:56.022131 USB2 port 3 disabled
961 14:20:56.025609 USB2 port 4 enabled
962 14:20:56.028741 USB2 port 5 disabled
963 14:20:56.028844 USB2 port 6 disabled
964 14:20:56.031966 USB2 port 7 disabled
965 14:20:56.032049 USB2 port 8 disabled
966 14:20:56.035351 USB2 port 9 disabled
967 14:20:56.038616 USB3 port 0 disabled
968 14:20:56.038723 USB3 port 1 enabled
969 14:20:56.041938 USB3 port 2 disabled
970 14:20:56.045177 USB3 port 3 disabled
971 14:20:56.045253 USB2 port 1 scanning...
972 14:20:56.048598 scan_static_bus for USB2 port 1
973 14:20:56.055204 scan_static_bus for USB2 port 1 done
974 14:20:56.058795 scan_bus: bus USB2 port 1 finished in 6 msecs
975 14:20:56.062101 USB2 port 2 scanning...
976 14:20:56.065287 scan_static_bus for USB2 port 2
977 14:20:56.068729 scan_static_bus for USB2 port 2 done
978 14:20:56.071909 scan_bus: bus USB2 port 2 finished in 6 msecs
979 14:20:56.075082 USB2 port 4 scanning...
980 14:20:56.078642 scan_static_bus for USB2 port 4
981 14:20:56.081958 scan_static_bus for USB2 port 4 done
982 14:20:56.085033 scan_bus: bus USB2 port 4 finished in 6 msecs
983 14:20:56.088752 USB3 port 1 scanning...
984 14:20:56.091859 scan_static_bus for USB3 port 1
985 14:20:56.095159 scan_static_bus for USB3 port 1 done
986 14:20:56.101843 scan_bus: bus USB3 port 1 finished in 6 msecs
987 14:20:56.105161 scan_static_bus for USB0 port 0 done
988 14:20:56.108503 scan_bus: bus USB0 port 0 finished in 93 msecs
989 14:20:56.112031 scan_static_bus for PCI: 00:14.0 done
990 14:20:56.118514 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
991 14:20:56.121689 PCI: 00:14.3 scanning...
992 14:20:56.125036 scan_static_bus for PCI: 00:14.3
993 14:20:56.125149 GENERIC: 0.0 enabled
994 14:20:56.131818 scan_static_bus for PCI: 00:14.3 done
995 14:20:56.135049 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 14:20:56.138232 PCI: 00:15.0 scanning...
997 14:20:56.141686 scan_static_bus for PCI: 00:15.0
998 14:20:56.141802 I2C: 00:1a enabled
999 14:20:56.145009 I2C: 00:31 enabled
1000 14:20:56.148171 I2C: 00:32 enabled
1001 14:20:56.151678 scan_static_bus for PCI: 00:15.0 done
1002 14:20:56.154869 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 14:20:56.158371 PCI: 00:15.1 scanning...
1004 14:20:56.161678 scan_static_bus for PCI: 00:15.1
1005 14:20:56.164945 I2C: 00:10 enabled
1006 14:20:56.168170 scan_static_bus for PCI: 00:15.1 done
1007 14:20:56.171471 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 14:20:56.174896 PCI: 00:15.2 scanning...
1009 14:20:56.178104 scan_static_bus for PCI: 00:15.2
1010 14:20:56.181703 scan_static_bus for PCI: 00:15.2 done
1011 14:20:56.184935 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 14:20:56.188149 PCI: 00:15.3 scanning...
1013 14:20:56.191421 scan_static_bus for PCI: 00:15.3
1014 14:20:56.195007 scan_static_bus for PCI: 00:15.3 done
1015 14:20:56.201506 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 14:20:56.205025 PCI: 00:19.1 scanning...
1017 14:20:56.208443 scan_static_bus for PCI: 00:19.1
1018 14:20:56.208528 I2C: 00:15 enabled
1019 14:20:56.211886 scan_static_bus for PCI: 00:19.1 done
1020 14:20:56.218062 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 14:20:56.221462 PCI: 00:1d.0 scanning...
1022 14:20:56.224676 do_pci_scan_bridge for PCI: 00:1d.0
1023 14:20:56.227921 PCI: pci_scan_bus for bus 01
1024 14:20:56.231552 PCI: 01:00.0 [15b7/5009] enabled
1025 14:20:56.231644 GENERIC: 0.0 enabled
1026 14:20:56.234609 Enabling Common Clock Configuration
1027 14:20:56.241094 L1 Sub-State supported from root port 29
1028 14:20:56.244591 L1 Sub-State Support = 0x5
1029 14:20:56.244677 CommonModeRestoreTime = 0x28
1030 14:20:56.251382 Power On Value = 0x16, Power On Scale = 0x0
1031 14:20:56.251468 ASPM: Enabled L1
1032 14:20:56.257882 PCIe: Max_Payload_Size adjusted to 128
1033 14:20:56.261145 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 14:20:56.264469 PCI: 00:1e.2 scanning...
1035 14:20:56.268320 scan_generic_bus for PCI: 00:1e.2
1036 14:20:56.268404 SPI: 00 enabled
1037 14:20:56.275043 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 14:20:56.278551 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 14:20:56.282051 PCI: 00:1e.3 scanning...
1040 14:20:56.285052 scan_generic_bus for PCI: 00:1e.3
1041 14:20:56.288730 SPI: 00 enabled
1042 14:20:56.295209 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 14:20:56.298486 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 14:20:56.301666 PCI: 00:1f.0 scanning...
1045 14:20:56.305265 scan_static_bus for PCI: 00:1f.0
1046 14:20:56.305369 PNP: 0c09.0 enabled
1047 14:20:56.308392 PNP: 0c09.0 scanning...
1048 14:20:56.311644 scan_static_bus for PNP: 0c09.0
1049 14:20:56.314940 scan_static_bus for PNP: 0c09.0 done
1050 14:20:56.321676 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 14:20:56.325178 scan_static_bus for PCI: 00:1f.0 done
1052 14:20:56.328431 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 14:20:56.331798 PCI: 00:1f.2 scanning...
1054 14:20:56.334820 scan_static_bus for PCI: 00:1f.2
1055 14:20:56.338420 GENERIC: 0.0 enabled
1056 14:20:56.341659 GENERIC: 0.0 scanning...
1057 14:20:56.344761 scan_static_bus for GENERIC: 0.0
1058 14:20:56.344871 GENERIC: 0.0 enabled
1059 14:20:56.348055 GENERIC: 1.0 enabled
1060 14:20:56.351491 scan_static_bus for GENERIC: 0.0 done
1061 14:20:56.358333 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 14:20:56.361608 scan_static_bus for PCI: 00:1f.2 done
1063 14:20:56.364887 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 14:20:56.368054 PCI: 00:1f.3 scanning...
1065 14:20:56.371355 scan_static_bus for PCI: 00:1f.3
1066 14:20:56.374715 scan_static_bus for PCI: 00:1f.3 done
1067 14:20:56.378215 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 14:20:56.381303 PCI: 00:1f.5 scanning...
1069 14:20:56.384717 scan_generic_bus for PCI: 00:1f.5
1070 14:20:56.391317 scan_generic_bus for PCI: 00:1f.5 done
1071 14:20:56.394704 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 14:20:56.397947 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1073 14:20:56.404752 scan_static_bus for Root Device done
1074 14:20:56.408030 scan_bus: bus Root Device finished in 735 msecs
1075 14:20:56.408139 done
1076 14:20:56.414555 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1077 14:20:56.417917 Chrome EC: UHEPI supported
1078 14:20:56.424324 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 14:20:56.431045 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 14:20:56.434433 SPI flash protection: WPSW=0 SRP0=0
1081 14:20:56.437691 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 14:20:56.444368 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 14:20:56.447734 found VGA at PCI: 00:02.0
1084 14:20:56.451121 Setting up VGA for PCI: 00:02.0
1085 14:20:56.454224 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 14:20:56.460793 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 14:20:56.464179 Allocating resources...
1088 14:20:56.464287 Reading resources...
1089 14:20:56.470800 Root Device read_resources bus 0 link: 0
1090 14:20:56.474175 DOMAIN: 0000 read_resources bus 0 link: 0
1091 14:20:56.477350 PCI: 00:04.0 read_resources bus 1 link: 0
1092 14:20:56.484216 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 14:20:56.487732 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 14:20:56.494197 USB0 port 0 read_resources bus 0 link: 0
1095 14:20:56.497611 USB0 port 0 read_resources bus 0 link: 0 done
1096 14:20:56.504277 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 14:20:56.507709 PCI: 00:14.0 read_resources bus 0 link: 0
1098 14:20:56.510796 USB0 port 0 read_resources bus 0 link: 0
1099 14:20:56.518728 USB0 port 0 read_resources bus 0 link: 0 done
1100 14:20:56.521946 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 14:20:56.528820 PCI: 00:14.3 read_resources bus 0 link: 0
1102 14:20:56.531959 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 14:20:56.538368 PCI: 00:15.0 read_resources bus 0 link: 0
1104 14:20:56.541708 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 14:20:56.548656 PCI: 00:15.1 read_resources bus 0 link: 0
1106 14:20:56.551809 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 14:20:56.559053 PCI: 00:19.1 read_resources bus 0 link: 0
1108 14:20:56.562320 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 14:20:56.569013 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 14:20:56.572082 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 14:20:56.578720 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 14:20:56.581991 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 14:20:56.588904 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 14:20:56.592092 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 14:20:56.598730 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 14:20:56.601981 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 14:20:56.605450 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 14:20:56.612210 GENERIC: 0.0 read_resources bus 0 link: 0
1119 14:20:56.615626 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 14:20:56.622035 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 14:20:56.628914 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 14:20:56.632194 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 14:20:56.635512 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 14:20:56.642051 Root Device read_resources bus 0 link: 0 done
1125 14:20:56.645546 Done reading resources.
1126 14:20:56.649081 Show resources in subtree (Root Device)...After reading.
1127 14:20:56.655425 Root Device child on link 0 DOMAIN: 0000
1128 14:20:56.658870 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 14:20:56.668662 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 14:20:56.678919 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 14:20:56.679003 PCI: 00:00.0
1132 14:20:56.688738 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 14:20:56.698484 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 14:20:56.708481 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 14:20:56.718509 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 14:20:56.724975 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 14:20:56.734926 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 14:20:56.744919 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 14:20:56.754609 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 14:20:56.764712 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 14:20:56.774639 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 14:20:56.781416 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 14:20:56.791431 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 14:20:56.801242 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 14:20:56.810860 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 14:20:56.821142 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 14:20:56.831016 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 14:20:56.840999 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 14:20:56.847450 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 14:20:56.857466 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 14:20:56.867484 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 14:20:56.870637 PCI: 00:02.0
1153 14:20:56.880536 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:20:56.890544 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 14:20:56.897310 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 14:20:56.903893 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 14:20:56.913985 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 14:20:56.914071 GENERIC: 0.0
1159 14:20:56.917242 PCI: 00:05.0
1160 14:20:56.927317 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 14:20:56.930477 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 14:20:56.933611 GENERIC: 0.0
1163 14:20:56.933700 PCI: 00:08.0
1164 14:20:56.943644 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 14:20:56.946911 PCI: 00:0a.0
1166 14:20:56.950497 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 14:20:56.960336 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 14:20:56.963572 USB0 port 0 child on link 0 USB3 port 0
1169 14:20:56.966838 USB3 port 0
1170 14:20:56.966921 USB3 port 1
1171 14:20:56.970166 USB3 port 2
1172 14:20:56.973886 USB3 port 3
1173 14:20:56.977134 PCI: 00:14.0 child on link 0 USB0 port 0
1174 14:20:56.986702 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 14:20:56.990253 USB0 port 0 child on link 0 USB2 port 0
1176 14:20:56.993621 USB2 port 0
1177 14:20:56.993697 USB2 port 1
1178 14:20:56.996753 USB2 port 2
1179 14:20:56.996837 USB2 port 3
1180 14:20:57.000138 USB2 port 4
1181 14:20:57.000218 USB2 port 5
1182 14:20:57.003405 USB2 port 6
1183 14:20:57.003477 USB2 port 7
1184 14:20:57.006930 USB2 port 8
1185 14:20:57.006999 USB2 port 9
1186 14:20:57.010280 USB3 port 0
1187 14:20:57.013628 USB3 port 1
1188 14:20:57.013715 USB3 port 2
1189 14:20:57.016786 USB3 port 3
1190 14:20:57.016863 PCI: 00:14.2
1191 14:20:57.026766 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 14:20:57.036934 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 14:20:57.040081 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 14:20:57.050102 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 14:20:57.053430 GENERIC: 0.0
1196 14:20:57.056485 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 14:20:57.066790 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 14:20:57.069980 I2C: 00:1a
1199 14:20:57.070088 I2C: 00:31
1200 14:20:57.073265 I2C: 00:32
1201 14:20:57.076843 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 14:20:57.086791 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:20:57.086879 I2C: 00:10
1204 14:20:57.089809 PCI: 00:15.2
1205 14:20:57.099834 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:20:57.099961 PCI: 00:15.3
1207 14:20:57.109706 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 14:20:57.113378 PCI: 00:16.0
1209 14:20:57.123274 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 14:20:57.123424 PCI: 00:19.0
1211 14:20:57.129627 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 14:20:57.139568 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 14:20:57.139650 I2C: 00:15
1214 14:20:57.146230 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 14:20:57.153061 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 14:20:57.162964 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 14:20:57.172916 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 14:20:57.173000 GENERIC: 0.0
1219 14:20:57.176066 PCI: 01:00.0
1220 14:20:57.186028 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 14:20:57.196213 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1222 14:20:57.196299 PCI: 00:1e.0
1223 14:20:57.209270 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1224 14:20:57.212802 PCI: 00:1e.2 child on link 0 SPI: 00
1225 14:20:57.222576 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 14:20:57.222664 SPI: 00
1227 14:20:57.229178 PCI: 00:1e.3 child on link 0 SPI: 00
1228 14:20:57.239205 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 14:20:57.239291 SPI: 00
1230 14:20:57.242778 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1231 14:20:57.252531 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1232 14:20:57.252611 PNP: 0c09.0
1233 14:20:57.262610 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 14:20:57.265736 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1235 14:20:57.275584 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1236 14:20:57.285742 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1237 14:20:57.289071 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1238 14:20:57.292287 GENERIC: 0.0
1239 14:20:57.295616 GENERIC: 1.0
1240 14:20:57.295699 PCI: 00:1f.3
1241 14:20:57.305578 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1242 14:20:57.315571 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1243 14:20:57.319078 PCI: 00:1f.5
1244 14:20:57.325467 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 14:20:57.332169 CPU_CLUSTER: 0 child on link 0 APIC: 00
1246 14:20:57.332274 APIC: 00
1247 14:20:57.332368 APIC: 01
1248 14:20:57.335481 APIC: 03
1249 14:20:57.335565 APIC: 07
1250 14:20:57.339073 APIC: 05
1251 14:20:57.339158 APIC: 04
1252 14:20:57.339221 APIC: 02
1253 14:20:57.341931 APIC: 06
1254 14:20:57.348922 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1255 14:20:57.355236 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1256 14:20:57.362028 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1257 14:20:57.365182 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1258 14:20:57.372032 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1259 14:20:57.375321 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1260 14:20:57.381871 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1261 14:20:57.388438 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1262 14:20:57.398511 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1263 14:20:57.405228 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1264 14:20:57.411774 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1265 14:20:57.418582 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1266 14:20:57.424783 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1267 14:20:57.435161 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1268 14:20:57.435280 DOMAIN: 0000: Resource ranges:
1269 14:20:57.441575 * Base: 1000, Size: 800, Tag: 100
1270 14:20:57.444829 * Base: 1900, Size: e700, Tag: 100
1271 14:20:57.448183 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1272 14:20:57.454967 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1273 14:20:57.461659 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1274 14:20:57.471761 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1275 14:20:57.478268 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1276 14:20:57.484819 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1277 14:20:57.494924 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1278 14:20:57.501347 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1279 14:20:57.507982 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1280 14:20:57.518096 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1281 14:20:57.524397 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1282 14:20:57.530844 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1283 14:20:57.540950 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1284 14:20:57.547561 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1285 14:20:57.554264 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1286 14:20:57.564059 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1287 14:20:57.570744 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1288 14:20:57.577460 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1289 14:20:57.587273 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1290 14:20:57.594059 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1291 14:20:57.600607 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1292 14:20:57.610279 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1293 14:20:57.616988 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1294 14:20:57.623772 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1295 14:20:57.633602 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1296 14:20:57.636949 DOMAIN: 0000: Resource ranges:
1297 14:20:57.640317 * Base: 7fc00000, Size: 40400000, Tag: 200
1298 14:20:57.643568 * Base: d0000000, Size: 28000000, Tag: 200
1299 14:20:57.646985 * Base: fa000000, Size: 1000000, Tag: 200
1300 14:20:57.653580 * Base: fb001000, Size: 2fff000, Tag: 200
1301 14:20:57.656767 * Base: fe010000, Size: 2e000, Tag: 200
1302 14:20:57.660299 * Base: fe03f000, Size: d41000, Tag: 200
1303 14:20:57.663569 * Base: fed88000, Size: 8000, Tag: 200
1304 14:20:57.670250 * Base: fed93000, Size: d000, Tag: 200
1305 14:20:57.673587 * Base: feda2000, Size: 1e000, Tag: 200
1306 14:20:57.676669 * Base: fede0000, Size: 1220000, Tag: 200
1307 14:20:57.683428 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1308 14:20:57.689876 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1309 14:20:57.696827 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1310 14:20:57.703277 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1311 14:20:57.710112 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1312 14:20:57.716486 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1313 14:20:57.723409 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1314 14:20:57.730029 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1315 14:20:57.736388 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1316 14:20:57.743199 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1317 14:20:57.749978 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1318 14:20:57.756393 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1319 14:20:57.763182 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1320 14:20:57.769780 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1321 14:20:57.776318 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1322 14:20:57.783032 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1323 14:20:57.789484 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1324 14:20:57.796276 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1325 14:20:57.802620 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1326 14:20:57.809571 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1327 14:20:57.815968 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1328 14:20:57.822706 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1329 14:20:57.829257 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1330 14:20:57.835835 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1331 14:20:57.842754 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1332 14:20:57.845969 PCI: 00:1d.0: Resource ranges:
1333 14:20:57.852772 * Base: 7fc00000, Size: 100000, Tag: 200
1334 14:20:57.859261 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1335 14:20:57.865973 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1336 14:20:57.872652 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1337 14:20:57.879059 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1338 14:20:57.885681 Root Device assign_resources, bus 0 link: 0
1339 14:20:57.888905 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 14:20:57.899016 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1341 14:20:57.905500 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1342 14:20:57.912235 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1343 14:20:57.922609 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1344 14:20:57.925677 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 14:20:57.932445 PCI: 00:04.0 assign_resources, bus 1 link: 0
1346 14:20:57.938979 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1347 14:20:57.949197 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1348 14:20:57.955775 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1349 14:20:57.958944 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 14:20:57.965672 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1351 14:20:57.972153 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1352 14:20:57.978975 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 14:20:57.982337 PCI: 00:14.0 assign_resources, bus 0 link: 0
1354 14:20:57.992106 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1355 14:20:57.998942 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1356 14:20:58.005626 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1357 14:20:58.012312 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 14:20:58.015521 PCI: 00:14.3 assign_resources, bus 0 link: 0
1359 14:20:58.025324 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1360 14:20:58.028644 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 14:20:58.032388 PCI: 00:15.0 assign_resources, bus 0 link: 0
1362 14:20:58.042253 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1363 14:20:58.045467 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 14:20:58.052231 PCI: 00:15.1 assign_resources, bus 0 link: 0
1365 14:20:58.058931 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1366 14:20:58.069096 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1367 14:20:58.075560 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1368 14:20:58.085592 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1369 14:20:58.088761 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 14:20:58.091985 PCI: 00:19.1 assign_resources, bus 0 link: 0
1371 14:20:58.101887 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1372 14:20:58.112044 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1373 14:20:58.121700 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1374 14:20:58.125161 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 14:20:58.131710 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1376 14:20:58.141665 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1377 14:20:58.144984 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 14:20:58.154869 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1379 14:20:58.158428 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 14:20:58.164977 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1381 14:20:58.171414 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1382 14:20:58.174929 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 14:20:58.181485 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1384 14:20:58.185079 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 14:20:58.191606 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1386 14:20:58.194855 LPC: Trying to open IO window from 800 size 1ff
1387 14:20:58.204736 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 14:20:58.211250 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 14:20:58.221243 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 14:20:58.224578 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 14:20:58.228026 Root Device assign_resources, bus 0 link: 0
1392 14:20:58.231341 Done setting resources.
1393 14:20:58.238049 Show resources in subtree (Root Device)...After assigning values.
1394 14:20:58.241143 Root Device child on link 0 DOMAIN: 0000
1395 14:20:58.247747 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 14:20:58.254459 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 14:20:58.264306 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 14:20:58.267784 PCI: 00:00.0
1399 14:20:58.277664 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 14:20:58.287713 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 14:20:58.297657 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 14:20:58.304067 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 14:20:58.314148 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 14:20:58.324214 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1405 14:20:58.333920 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1406 14:20:58.344035 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1407 14:20:58.350617 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1408 14:20:58.360437 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1409 14:20:58.370492 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1410 14:20:58.380350 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1411 14:20:58.390216 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1412 14:20:58.397159 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1413 14:20:58.407095 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1414 14:20:58.416678 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1415 14:20:58.426781 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1416 14:20:58.436607 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1417 14:20:58.446731 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1418 14:20:58.456573 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1419 14:20:58.456668 PCI: 00:02.0
1420 14:20:58.466538 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1421 14:20:58.479936 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1422 14:20:58.486393 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1423 14:20:58.493245 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1424 14:20:58.502940 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1425 14:20:58.503028 GENERIC: 0.0
1426 14:20:58.506450 PCI: 00:05.0
1427 14:20:58.516174 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1428 14:20:58.523021 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1429 14:20:58.523107 GENERIC: 0.0
1430 14:20:58.526278 PCI: 00:08.0
1431 14:20:58.536007 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1432 14:20:58.536110 PCI: 00:0a.0
1433 14:20:58.542842 PCI: 00:0d.0 child on link 0 USB0 port 0
1434 14:20:58.552942 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1435 14:20:58.556200 USB0 port 0 child on link 0 USB3 port 0
1436 14:20:58.559350 USB3 port 0
1437 14:20:58.559454 USB3 port 1
1438 14:20:58.562581 USB3 port 2
1439 14:20:58.562682 USB3 port 3
1440 14:20:58.566129 PCI: 00:14.0 child on link 0 USB0 port 0
1441 14:20:58.579348 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1442 14:20:58.582861 USB0 port 0 child on link 0 USB2 port 0
1443 14:20:58.582969 USB2 port 0
1444 14:20:58.585950 USB2 port 1
1445 14:20:58.586033 USB2 port 2
1446 14:20:58.589372 USB2 port 3
1447 14:20:58.592818 USB2 port 4
1448 14:20:58.592901 USB2 port 5
1449 14:20:58.596034 USB2 port 6
1450 14:20:58.596117 USB2 port 7
1451 14:20:58.599416 USB2 port 8
1452 14:20:58.599499 USB2 port 9
1453 14:20:58.602537 USB3 port 0
1454 14:20:58.602619 USB3 port 1
1455 14:20:58.605992 USB3 port 2
1456 14:20:58.606075 USB3 port 3
1457 14:20:58.609421 PCI: 00:14.2
1458 14:20:58.619407 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1459 14:20:58.629094 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1460 14:20:58.632447 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1461 14:20:58.645725 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1462 14:20:58.645849 GENERIC: 0.0
1463 14:20:58.649046 PCI: 00:15.0 child on link 0 I2C: 00:1a
1464 14:20:58.659063 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1465 14:20:58.662375 I2C: 00:1a
1466 14:20:58.662458 I2C: 00:31
1467 14:20:58.665877 I2C: 00:32
1468 14:20:58.669060 PCI: 00:15.1 child on link 0 I2C: 00:10
1469 14:20:58.679164 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1470 14:20:58.682318 I2C: 00:10
1471 14:20:58.682415 PCI: 00:15.2
1472 14:20:58.692354 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1473 14:20:58.695628 PCI: 00:15.3
1474 14:20:58.705454 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1475 14:20:58.708902 PCI: 00:16.0
1476 14:20:58.718672 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1477 14:20:58.718760 PCI: 00:19.0
1478 14:20:58.722217 PCI: 00:19.1 child on link 0 I2C: 00:15
1479 14:20:58.735524 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1480 14:20:58.735650 I2C: 00:15
1481 14:20:58.738705 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1482 14:20:58.748698 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1483 14:20:58.761928 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1484 14:20:58.771922 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1485 14:20:58.772008 GENERIC: 0.0
1486 14:20:58.775044 PCI: 01:00.0
1487 14:20:58.785219 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1488 14:20:58.794982 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1489 14:20:58.798437 PCI: 00:1e.0
1490 14:20:58.808396 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1491 14:20:58.811453 PCI: 00:1e.2 child on link 0 SPI: 00
1492 14:20:58.821496 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1493 14:20:58.825032 SPI: 00
1494 14:20:58.828292 PCI: 00:1e.3 child on link 0 SPI: 00
1495 14:20:58.838280 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1496 14:20:58.838364 SPI: 00
1497 14:20:58.844652 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1498 14:20:58.851441 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1499 14:20:58.854692 PNP: 0c09.0
1500 14:20:58.861306 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1501 14:20:58.868094 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1502 14:20:58.877921 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1503 14:20:58.884533 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1504 14:20:58.891183 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1505 14:20:58.891267 GENERIC: 0.0
1506 14:20:58.894726 GENERIC: 1.0
1507 14:20:58.894809 PCI: 00:1f.3
1508 14:20:58.907678 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1509 14:20:58.917580 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1510 14:20:58.917664 PCI: 00:1f.5
1511 14:20:58.927649 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1512 14:20:58.934231 CPU_CLUSTER: 0 child on link 0 APIC: 00
1513 14:20:58.934315 APIC: 00
1514 14:20:58.934379 APIC: 01
1515 14:20:58.937748 APIC: 03
1516 14:20:58.937870 APIC: 07
1517 14:20:58.941006 APIC: 05
1518 14:20:58.941087 APIC: 04
1519 14:20:58.941151 APIC: 02
1520 14:20:58.944302 APIC: 06
1521 14:20:58.947751 Done allocating resources.
1522 14:20:58.950946 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1523 14:20:58.957714 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1524 14:20:58.960911 Configure GPIOs for I2S audio on UP4.
1525 14:20:58.968344 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1526 14:20:58.971552 Enabling resources...
1527 14:20:58.975119 PCI: 00:00.0 subsystem <- 8086/9a12
1528 14:20:58.978272 PCI: 00:00.0 cmd <- 06
1529 14:20:58.981676 PCI: 00:02.0 subsystem <- 8086/9a40
1530 14:20:58.984937 PCI: 00:02.0 cmd <- 03
1531 14:20:58.988006 PCI: 00:04.0 subsystem <- 8086/9a03
1532 14:20:58.991396 PCI: 00:04.0 cmd <- 02
1533 14:20:58.994730 PCI: 00:05.0 subsystem <- 8086/9a19
1534 14:20:58.994813 PCI: 00:05.0 cmd <- 02
1535 14:20:59.001207 PCI: 00:08.0 subsystem <- 8086/9a11
1536 14:20:59.001314 PCI: 00:08.0 cmd <- 06
1537 14:20:59.004498 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 14:20:59.007754 PCI: 00:0d.0 cmd <- 02
1539 14:20:59.011555 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 14:20:59.014621 PCI: 00:14.0 cmd <- 02
1541 14:20:59.017704 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 14:20:59.021010 PCI: 00:14.2 cmd <- 02
1543 14:20:59.024358 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 14:20:59.027839 PCI: 00:14.3 cmd <- 02
1545 14:20:59.030983 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 14:20:59.034475 PCI: 00:15.0 cmd <- 02
1547 14:20:59.037539 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 14:20:59.040938 PCI: 00:15.1 cmd <- 02
1549 14:20:59.044240 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 14:20:59.044322 PCI: 00:15.2 cmd <- 02
1551 14:20:59.050925 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 14:20:59.051008 PCI: 00:15.3 cmd <- 02
1553 14:20:59.054366 PCI: 00:16.0 subsystem <- 8086/a0e0
1554 14:20:59.057434 PCI: 00:16.0 cmd <- 02
1555 14:20:59.060689 PCI: 00:19.1 subsystem <- 8086/a0c6
1556 14:20:59.064292 PCI: 00:19.1 cmd <- 02
1557 14:20:59.067540 PCI: 00:1d.0 bridge ctrl <- 0013
1558 14:20:59.070697 PCI: 00:1d.0 subsystem <- 8086/a0b0
1559 14:20:59.074205 PCI: 00:1d.0 cmd <- 06
1560 14:20:59.077439 PCI: 00:1e.0 subsystem <- 8086/a0a8
1561 14:20:59.080928 PCI: 00:1e.0 cmd <- 06
1562 14:20:59.083915 PCI: 00:1e.2 subsystem <- 8086/a0aa
1563 14:20:59.087093 PCI: 00:1e.2 cmd <- 06
1564 14:20:59.090565 PCI: 00:1e.3 subsystem <- 8086/a0ab
1565 14:20:59.093763 PCI: 00:1e.3 cmd <- 02
1566 14:20:59.096966 PCI: 00:1f.0 subsystem <- 8086/a087
1567 14:20:59.097049 PCI: 00:1f.0 cmd <- 407
1568 14:20:59.103867 PCI: 00:1f.3 subsystem <- 8086/a0c8
1569 14:20:59.103949 PCI: 00:1f.3 cmd <- 02
1570 14:20:59.107335 PCI: 00:1f.5 subsystem <- 8086/a0a4
1571 14:20:59.110350 PCI: 00:1f.5 cmd <- 406
1572 14:20:59.115653 PCI: 01:00.0 cmd <- 02
1573 14:20:59.119942 done.
1574 14:20:59.123336 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1575 14:20:59.126443 Initializing devices...
1576 14:20:59.129754 Root Device init
1577 14:20:59.133184 Chrome EC: Set SMI mask to 0x0000000000000000
1578 14:20:59.140210 Chrome EC: clear events_b mask to 0x0000000000000000
1579 14:20:59.146428 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1580 14:20:59.152836 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1581 14:20:59.159436 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1582 14:20:59.162613 Chrome EC: Set WAKE mask to 0x0000000000000000
1583 14:20:59.170576 fw_config match found: DB_USB=USB3_ACTIVE
1584 14:20:59.173723 Configure Right Type-C port orientation for retimer
1585 14:20:59.176981 Root Device init finished in 45 msecs
1586 14:20:59.181170 PCI: 00:00.0 init
1587 14:20:59.184659 CPU TDP = 9 Watts
1588 14:20:59.184740 CPU PL1 = 9 Watts
1589 14:20:59.187856 CPU PL2 = 40 Watts
1590 14:20:59.191192 CPU PL4 = 83 Watts
1591 14:20:59.194817 PCI: 00:00.0 init finished in 8 msecs
1592 14:20:59.194899 PCI: 00:02.0 init
1593 14:20:59.197981 GMA: Found VBT in CBFS
1594 14:20:59.201179 GMA: Found valid VBT in CBFS
1595 14:20:59.207870 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1596 14:20:59.214466 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1597 14:20:59.217755 PCI: 00:02.0 init finished in 18 msecs
1598 14:20:59.221075 PCI: 00:05.0 init
1599 14:20:59.224530 PCI: 00:05.0 init finished in 0 msecs
1600 14:20:59.227620 PCI: 00:08.0 init
1601 14:20:59.231081 PCI: 00:08.0 init finished in 0 msecs
1602 14:20:59.234331 PCI: 00:14.0 init
1603 14:20:59.237554 PCI: 00:14.0 init finished in 0 msecs
1604 14:20:59.241040 PCI: 00:14.2 init
1605 14:20:59.244229 PCI: 00:14.2 init finished in 0 msecs
1606 14:20:59.247864 PCI: 00:15.0 init
1607 14:20:59.247947 I2C bus 0 version 0x3230302a
1608 14:20:59.254199 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1609 14:20:59.257642 PCI: 00:15.0 init finished in 6 msecs
1610 14:20:59.257754 PCI: 00:15.1 init
1611 14:20:59.260781 I2C bus 1 version 0x3230302a
1612 14:20:59.264269 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1613 14:20:59.267683 PCI: 00:15.1 init finished in 6 msecs
1614 14:20:59.271254 PCI: 00:15.2 init
1615 14:20:59.274531 I2C bus 2 version 0x3230302a
1616 14:20:59.277669 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1617 14:20:59.281116 PCI: 00:15.2 init finished in 6 msecs
1618 14:20:59.284282 PCI: 00:15.3 init
1619 14:20:59.287909 I2C bus 3 version 0x3230302a
1620 14:20:59.290932 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1621 14:20:59.294429 PCI: 00:15.3 init finished in 6 msecs
1622 14:20:59.297677 PCI: 00:16.0 init
1623 14:20:59.301188 PCI: 00:16.0 init finished in 0 msecs
1624 14:20:59.304386 PCI: 00:19.1 init
1625 14:20:59.304512 I2C bus 5 version 0x3230302a
1626 14:20:59.311074 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1627 14:20:59.314272 PCI: 00:19.1 init finished in 6 msecs
1628 14:20:59.314354 PCI: 00:1d.0 init
1629 14:20:59.317570 Initializing PCH PCIe bridge.
1630 14:20:59.320809 PCI: 00:1d.0 init finished in 3 msecs
1631 14:20:59.325042 PCI: 00:1f.0 init
1632 14:20:59.328395 IOAPIC: Initializing IOAPIC at 0xfec00000
1633 14:20:59.335216 IOAPIC: Bootstrap Processor Local APIC = 0x00
1634 14:20:59.335298 IOAPIC: ID = 0x02
1635 14:20:59.338271 IOAPIC: Dumping registers
1636 14:20:59.341712 reg 0x0000: 0x02000000
1637 14:20:59.344871 reg 0x0001: 0x00770020
1638 14:20:59.344952 reg 0x0002: 0x00000000
1639 14:20:59.351829 PCI: 00:1f.0 init finished in 21 msecs
1640 14:20:59.351911 PCI: 00:1f.2 init
1641 14:20:59.355107 Disabling ACPI via APMC.
1642 14:20:59.359727 APMC done.
1643 14:20:59.362742 PCI: 00:1f.2 init finished in 6 msecs
1644 14:20:59.374380 PCI: 01:00.0 init
1645 14:20:59.377971 PCI: 01:00.0 init finished in 0 msecs
1646 14:20:59.380978 PNP: 0c09.0 init
1647 14:20:59.384561 Google Chrome EC uptime: 8.288 seconds
1648 14:20:59.390979 Google Chrome AP resets since EC boot: 1
1649 14:20:59.394414 Google Chrome most recent AP reset causes:
1650 14:20:59.397561 0.456: 32775 shutdown: entering G3
1651 14:20:59.404281 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1652 14:20:59.407766 PNP: 0c09.0 init finished in 22 msecs
1653 14:20:59.413253 Devices initialized
1654 14:20:59.416315 Show all devs... After init.
1655 14:20:59.419726 Root Device: enabled 1
1656 14:20:59.419808 DOMAIN: 0000: enabled 1
1657 14:20:59.423056 CPU_CLUSTER: 0: enabled 1
1658 14:20:59.426694 PCI: 00:00.0: enabled 1
1659 14:20:59.429746 PCI: 00:02.0: enabled 1
1660 14:20:59.429871 PCI: 00:04.0: enabled 1
1661 14:20:59.433280 PCI: 00:05.0: enabled 1
1662 14:20:59.436485 PCI: 00:06.0: enabled 0
1663 14:20:59.439622 PCI: 00:07.0: enabled 0
1664 14:20:59.439703 PCI: 00:07.1: enabled 0
1665 14:20:59.443151 PCI: 00:07.2: enabled 0
1666 14:20:59.446386 PCI: 00:07.3: enabled 0
1667 14:20:59.449674 PCI: 00:08.0: enabled 1
1668 14:20:59.449755 PCI: 00:09.0: enabled 0
1669 14:20:59.453017 PCI: 00:0a.0: enabled 0
1670 14:20:59.456359 PCI: 00:0d.0: enabled 1
1671 14:20:59.459911 PCI: 00:0d.1: enabled 0
1672 14:20:59.459993 PCI: 00:0d.2: enabled 0
1673 14:20:59.463146 PCI: 00:0d.3: enabled 0
1674 14:20:59.466393 PCI: 00:0e.0: enabled 0
1675 14:20:59.466474 PCI: 00:10.2: enabled 1
1676 14:20:59.469550 PCI: 00:10.6: enabled 0
1677 14:20:59.473162 PCI: 00:10.7: enabled 0
1678 14:20:59.476223 PCI: 00:12.0: enabled 0
1679 14:20:59.476305 PCI: 00:12.6: enabled 0
1680 14:20:59.479541 PCI: 00:13.0: enabled 0
1681 14:20:59.482939 PCI: 00:14.0: enabled 1
1682 14:20:59.486229 PCI: 00:14.1: enabled 0
1683 14:20:59.486311 PCI: 00:14.2: enabled 1
1684 14:20:59.489425 PCI: 00:14.3: enabled 1
1685 14:20:59.492975 PCI: 00:15.0: enabled 1
1686 14:20:59.496228 PCI: 00:15.1: enabled 1
1687 14:20:59.496310 PCI: 00:15.2: enabled 1
1688 14:20:59.499469 PCI: 00:15.3: enabled 1
1689 14:20:59.502920 PCI: 00:16.0: enabled 1
1690 14:20:59.503003 PCI: 00:16.1: enabled 0
1691 14:20:59.506024 PCI: 00:16.2: enabled 0
1692 14:20:59.509598 PCI: 00:16.3: enabled 0
1693 14:20:59.512652 PCI: 00:16.4: enabled 0
1694 14:20:59.512734 PCI: 00:16.5: enabled 0
1695 14:20:59.516164 PCI: 00:17.0: enabled 0
1696 14:20:59.519319 PCI: 00:19.0: enabled 0
1697 14:20:59.522871 PCI: 00:19.1: enabled 1
1698 14:20:59.522953 PCI: 00:19.2: enabled 0
1699 14:20:59.525998 PCI: 00:1c.0: enabled 1
1700 14:20:59.529432 PCI: 00:1c.1: enabled 0
1701 14:20:59.532829 PCI: 00:1c.2: enabled 0
1702 14:20:59.532911 PCI: 00:1c.3: enabled 0
1703 14:20:59.535994 PCI: 00:1c.4: enabled 0
1704 14:20:59.539370 PCI: 00:1c.5: enabled 0
1705 14:20:59.542532 PCI: 00:1c.6: enabled 1
1706 14:20:59.542614 PCI: 00:1c.7: enabled 0
1707 14:20:59.546036 PCI: 00:1d.0: enabled 1
1708 14:20:59.549310 PCI: 00:1d.1: enabled 0
1709 14:20:59.549392 PCI: 00:1d.2: enabled 1
1710 14:20:59.552630 PCI: 00:1d.3: enabled 0
1711 14:20:59.556001 PCI: 00:1e.0: enabled 1
1712 14:20:59.559223 PCI: 00:1e.1: enabled 0
1713 14:20:59.559305 PCI: 00:1e.2: enabled 1
1714 14:20:59.562513 PCI: 00:1e.3: enabled 1
1715 14:20:59.565666 PCI: 00:1f.0: enabled 1
1716 14:20:59.569214 PCI: 00:1f.1: enabled 0
1717 14:20:59.569296 PCI: 00:1f.2: enabled 1
1718 14:20:59.572504 PCI: 00:1f.3: enabled 1
1719 14:20:59.575743 PCI: 00:1f.4: enabled 0
1720 14:20:59.579329 PCI: 00:1f.5: enabled 1
1721 14:20:59.579411 PCI: 00:1f.6: enabled 0
1722 14:20:59.582428 PCI: 00:1f.7: enabled 0
1723 14:20:59.585605 APIC: 00: enabled 1
1724 14:20:59.585745 GENERIC: 0.0: enabled 1
1725 14:20:59.588842 GENERIC: 0.0: enabled 1
1726 14:20:59.592507 GENERIC: 1.0: enabled 1
1727 14:20:59.595589 GENERIC: 0.0: enabled 1
1728 14:20:59.595691 GENERIC: 1.0: enabled 1
1729 14:20:59.599191 USB0 port 0: enabled 1
1730 14:20:59.602421 GENERIC: 0.0: enabled 1
1731 14:20:59.602503 USB0 port 0: enabled 1
1732 14:20:59.605971 GENERIC: 0.0: enabled 1
1733 14:20:59.608989 I2C: 00:1a: enabled 1
1734 14:20:59.612278 I2C: 00:31: enabled 1
1735 14:20:59.612360 I2C: 00:32: enabled 1
1736 14:20:59.615748 I2C: 00:10: enabled 1
1737 14:20:59.618983 I2C: 00:15: enabled 1
1738 14:20:59.619065 GENERIC: 0.0: enabled 0
1739 14:20:59.622262 GENERIC: 1.0: enabled 0
1740 14:20:59.625701 GENERIC: 0.0: enabled 1
1741 14:20:59.625808 SPI: 00: enabled 1
1742 14:20:59.628976 SPI: 00: enabled 1
1743 14:20:59.632165 PNP: 0c09.0: enabled 1
1744 14:20:59.632248 GENERIC: 0.0: enabled 1
1745 14:20:59.635601 USB3 port 0: enabled 1
1746 14:20:59.639106 USB3 port 1: enabled 1
1747 14:20:59.642313 USB3 port 2: enabled 0
1748 14:20:59.642396 USB3 port 3: enabled 0
1749 14:20:59.645495 USB2 port 0: enabled 0
1750 14:20:59.648776 USB2 port 1: enabled 1
1751 14:20:59.648858 USB2 port 2: enabled 1
1752 14:20:59.652099 USB2 port 3: enabled 0
1753 14:20:59.655454 USB2 port 4: enabled 1
1754 14:20:59.655536 USB2 port 5: enabled 0
1755 14:20:59.658751 USB2 port 6: enabled 0
1756 14:20:59.661935 USB2 port 7: enabled 0
1757 14:20:59.665481 USB2 port 8: enabled 0
1758 14:20:59.665563 USB2 port 9: enabled 0
1759 14:20:59.668916 USB3 port 0: enabled 0
1760 14:20:59.672162 USB3 port 1: enabled 1
1761 14:20:59.672249 USB3 port 2: enabled 0
1762 14:20:59.675534 USB3 port 3: enabled 0
1763 14:20:59.678596 GENERIC: 0.0: enabled 1
1764 14:20:59.682070 GENERIC: 1.0: enabled 1
1765 14:20:59.682175 APIC: 01: enabled 1
1766 14:20:59.685347 APIC: 03: enabled 1
1767 14:20:59.685449 APIC: 07: enabled 1
1768 14:20:59.688461 APIC: 05: enabled 1
1769 14:20:59.692089 APIC: 04: enabled 1
1770 14:20:59.692213 APIC: 02: enabled 1
1771 14:20:59.695216 APIC: 06: enabled 1
1772 14:20:59.698720 PCI: 01:00.0: enabled 1
1773 14:20:59.701878 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1774 14:20:59.708602 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1775 14:20:59.711698 ELOG: NV offset 0xf30000 size 0x1000
1776 14:20:59.718439 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1777 14:20:59.725079 ELOG: Event(17) added with size 13 at 2023-10-20 14:20:58 UTC
1778 14:20:59.731415 ELOG: Event(92) added with size 9 at 2023-10-20 14:20:58 UTC
1779 14:20:59.738041 ELOG: Event(93) added with size 9 at 2023-10-20 14:20:58 UTC
1780 14:20:59.744827 ELOG: Event(9E) added with size 10 at 2023-10-20 14:20:58 UTC
1781 14:20:59.751685 ELOG: Event(9F) added with size 14 at 2023-10-20 14:20:58 UTC
1782 14:20:59.757904 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1783 14:20:59.764581 ELOG: Event(A1) added with size 10 at 2023-10-20 14:20:58 UTC
1784 14:20:59.771253 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1785 14:20:59.777722 ELOG: Event(A0) added with size 9 at 2023-10-20 14:20:58 UTC
1786 14:20:59.781021 elog_add_boot_reason: Logged dev mode boot
1787 14:20:59.787713 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1788 14:20:59.787802 Finalize devices...
1789 14:20:59.790849 Devices finalized
1790 14:20:59.797763 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1791 14:20:59.800833 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1792 14:20:59.807550 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1793 14:20:59.810871 ME: HFSTS1 : 0x80030055
1794 14:20:59.817200 ME: HFSTS2 : 0x30280116
1795 14:20:59.820761 ME: HFSTS3 : 0x00000050
1796 14:20:59.823908 ME: HFSTS4 : 0x00004000
1797 14:20:59.830803 ME: HFSTS5 : 0x00000000
1798 14:20:59.833990 ME: HFSTS6 : 0x40400006
1799 14:20:59.837162 ME: Manufacturing Mode : YES
1800 14:20:59.840726 ME: SPI Protection Mode Enabled : NO
1801 14:20:59.847375 ME: FW Partition Table : OK
1802 14:20:59.850602 ME: Bringup Loader Failure : NO
1803 14:20:59.853900 ME: Firmware Init Complete : NO
1804 14:20:59.857187 ME: Boot Options Present : NO
1805 14:20:59.860386 ME: Update In Progress : NO
1806 14:20:59.863869 ME: D0i3 Support : YES
1807 14:20:59.867398 ME: Low Power State Enabled : NO
1808 14:20:59.870282 ME: CPU Replaced : YES
1809 14:20:59.877013 ME: CPU Replacement Valid : YES
1810 14:20:59.880452 ME: Current Working State : 5
1811 14:20:59.883683 ME: Current Operation State : 1
1812 14:20:59.887244 ME: Current Operation Mode : 3
1813 14:20:59.890367 ME: Error Code : 0
1814 14:20:59.893625 ME: Enhanced Debug Mode : NO
1815 14:20:59.896912 ME: CPU Debug Disabled : YES
1816 14:20:59.900252 ME: TXT Support : NO
1817 14:20:59.906930 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1818 14:20:59.913629 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1819 14:20:59.916885 CBFS: 'fallback/slic' not found.
1820 14:20:59.923479 ACPI: Writing ACPI tables at 76b01000.
1821 14:20:59.923561 ACPI: * FACS
1822 14:20:59.927020 ACPI: * DSDT
1823 14:20:59.930254 Ramoops buffer: 0x100000@0x76a00000.
1824 14:20:59.933323 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1825 14:20:59.940019 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1826 14:20:59.943318 Google Chrome EC: version:
1827 14:20:59.946785 ro: voema_v2.0.10114-a447f03e46
1828 14:20:59.949885 rw: voema_v2.0.10114-a447f03e46
1829 14:20:59.949961 running image: 2
1830 14:20:59.956559 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1831 14:20:59.961062 ACPI: * FADT
1832 14:20:59.961138 SCI is IRQ9
1833 14:20:59.967708 ACPI: added table 1/32, length now 40
1834 14:20:59.967786 ACPI: * SSDT
1835 14:20:59.970979 Found 1 CPU(s) with 8 core(s) each.
1836 14:20:59.977669 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1837 14:20:59.981106 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1838 14:20:59.984385 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1839 14:20:59.987888 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1840 14:20:59.994280 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1841 14:21:00.000626 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1842 14:21:00.004224 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1843 14:21:00.010714 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1844 14:21:00.017280 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1845 14:21:00.020757 \_SB.PCI0.RP09: Added StorageD3Enable property
1846 14:21:00.027073 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1847 14:21:00.030504 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1848 14:21:00.037058 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1849 14:21:00.040261 PS2K: Passing 80 keymaps to kernel
1850 14:21:00.047171 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1851 14:21:00.053829 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1852 14:21:00.060201 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1853 14:21:00.066926 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1854 14:21:00.073582 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1855 14:21:00.080256 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1856 14:21:00.086863 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1857 14:21:00.093644 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1858 14:21:00.096886 ACPI: added table 2/32, length now 44
1859 14:21:00.096999 ACPI: * MCFG
1860 14:21:00.100174 ACPI: added table 3/32, length now 48
1861 14:21:00.103542 ACPI: * TPM2
1862 14:21:00.106645 TPM2 log created at 0x769f0000
1863 14:21:00.110053 ACPI: added table 4/32, length now 52
1864 14:21:00.110133 ACPI: * MADT
1865 14:21:00.113703 SCI is IRQ9
1866 14:21:00.116677 ACPI: added table 5/32, length now 56
1867 14:21:00.120043 current = 76b09850
1868 14:21:00.120150 ACPI: * DMAR
1869 14:21:00.123505 ACPI: added table 6/32, length now 60
1870 14:21:00.126653 ACPI: added table 7/32, length now 64
1871 14:21:00.130039 ACPI: * HPET
1872 14:21:00.133270 ACPI: added table 8/32, length now 68
1873 14:21:00.133376 ACPI: done.
1874 14:21:00.136512 ACPI tables: 35216 bytes.
1875 14:21:00.139887 smbios_write_tables: 769ef000
1876 14:21:00.143432 EC returned error result code 3
1877 14:21:00.146751 Couldn't obtain OEM name from CBI
1878 14:21:00.150011 Create SMBIOS type 16
1879 14:21:00.153169 Create SMBIOS type 17
1880 14:21:00.156686 GENERIC: 0.0 (WIFI Device)
1881 14:21:00.156790 SMBIOS tables: 1734 bytes.
1882 14:21:00.163283 Writing table forward entry at 0x00000500
1883 14:21:00.170076 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1884 14:21:00.173308 Writing coreboot table at 0x76b25000
1885 14:21:00.176399 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1886 14:21:00.183267 1. 0000000000001000-000000000009ffff: RAM
1887 14:21:00.186563 2. 00000000000a0000-00000000000fffff: RESERVED
1888 14:21:00.189916 3. 0000000000100000-00000000769eefff: RAM
1889 14:21:00.196285 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1890 14:21:00.202946 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1891 14:21:00.209542 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1892 14:21:00.212949 7. 0000000077000000-000000007fbfffff: RESERVED
1893 14:21:00.216453 8. 00000000c0000000-00000000cfffffff: RESERVED
1894 14:21:00.222908 9. 00000000f8000000-00000000f9ffffff: RESERVED
1895 14:21:00.226231 10. 00000000fb000000-00000000fb000fff: RESERVED
1896 14:21:00.233095 11. 00000000fe000000-00000000fe00ffff: RESERVED
1897 14:21:00.236331 12. 00000000fed80000-00000000fed87fff: RESERVED
1898 14:21:00.242778 13. 00000000fed90000-00000000fed92fff: RESERVED
1899 14:21:00.246155 14. 00000000feda0000-00000000feda1fff: RESERVED
1900 14:21:00.249257 15. 00000000fedc0000-00000000feddffff: RESERVED
1901 14:21:00.256027 16. 0000000100000000-00000004803fffff: RAM
1902 14:21:00.259611 Passing 4 GPIOs to payload:
1903 14:21:00.262980 NAME | PORT | POLARITY | VALUE
1904 14:21:00.269372 lid | undefined | high | high
1905 14:21:00.272833 power | undefined | high | low
1906 14:21:00.279297 oprom | undefined | high | low
1907 14:21:00.286034 EC in RW | 0x000000e5 | high | high
1908 14:21:00.289353 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1909 14:21:00.292616 coreboot table: 1576 bytes.
1910 14:21:00.295851 IMD ROOT 0. 0x76fff000 0x00001000
1911 14:21:00.302615 IMD SMALL 1. 0x76ffe000 0x00001000
1912 14:21:00.305882 FSP MEMORY 2. 0x76c4e000 0x003b0000
1913 14:21:00.309306 VPD 3. 0x76c4d000 0x00000367
1914 14:21:00.312471 RO MCACHE 4. 0x76c4c000 0x00000fdc
1915 14:21:00.315901 CONSOLE 5. 0x76c2c000 0x00020000
1916 14:21:00.319394 FMAP 6. 0x76c2b000 0x00000578
1917 14:21:00.322694 TIME STAMP 7. 0x76c2a000 0x00000910
1918 14:21:00.326115 VBOOT WORK 8. 0x76c16000 0x00014000
1919 14:21:00.332700 ROMSTG STCK 9. 0x76c15000 0x00001000
1920 14:21:00.336059 AFTER CAR 10. 0x76c0a000 0x0000b000
1921 14:21:00.339432 RAMSTAGE 11. 0x76b97000 0x00073000
1922 14:21:00.342642 REFCODE 12. 0x76b42000 0x00055000
1923 14:21:00.345885 SMM BACKUP 13. 0x76b32000 0x00010000
1924 14:21:00.349293 4f444749 14. 0x76b30000 0x00002000
1925 14:21:00.352964 EXT VBT15. 0x76b2d000 0x0000219f
1926 14:21:00.356199 COREBOOT 16. 0x76b25000 0x00008000
1927 14:21:00.359334 ACPI 17. 0x76b01000 0x00024000
1928 14:21:00.362619 ACPI GNVS 18. 0x76b00000 0x00001000
1929 14:21:00.369300 RAMOOPS 19. 0x76a00000 0x00100000
1930 14:21:00.372803 TPM2 TCGLOG20. 0x769f0000 0x00010000
1931 14:21:00.375967 SMBIOS 21. 0x769ef000 0x00000800
1932 14:21:00.376051 IMD small region:
1933 14:21:00.382841 IMD ROOT 0. 0x76ffec00 0x00000400
1934 14:21:00.386129 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1935 14:21:00.389365 POWER STATE 2. 0x76ffeb80 0x00000044
1936 14:21:00.392565 ROMSTAGE 3. 0x76ffeb60 0x00000004
1937 14:21:00.396036 MEM INFO 4. 0x76ffe980 0x000001e0
1938 14:21:00.402555 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1939 14:21:00.405816 MTRR: Physical address space:
1940 14:21:00.412820 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1941 14:21:00.419526 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1942 14:21:00.425877 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1943 14:21:00.429296 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1944 14:21:00.435829 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1945 14:21:00.442563 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1946 14:21:00.449021 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1947 14:21:00.452447 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 14:21:00.458897 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 14:21:00.462243 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 14:21:00.465734 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 14:21:00.468986 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 14:21:00.475807 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 14:21:00.478960 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 14:21:00.482176 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 14:21:00.485440 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 14:21:00.488955 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 14:21:00.495656 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 14:21:00.498732 call enable_fixed_mtrr()
1959 14:21:00.502239 CPU physical address size: 39 bits
1960 14:21:00.505566 MTRR: default type WB/UC MTRR counts: 6/7.
1961 14:21:00.508842 MTRR: WB selected as default type.
1962 14:21:00.515582 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1963 14:21:00.522073 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1964 14:21:00.528776 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1965 14:21:00.535242 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1966 14:21:00.541971 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1967 14:21:00.548703 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1968 14:21:00.548786
1969 14:21:00.551754 MTRR check
1970 14:21:00.555174 Fixed MTRRs : Enabled
1971 14:21:00.555285 Variable MTRRs: Enabled
1972 14:21:00.555386
1973 14:21:00.561956 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 14:21:00.564948 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 14:21:00.568315 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 14:21:00.571642 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 14:21:00.578429 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 14:21:00.581870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 14:21:00.584967 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 14:21:00.588424 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 14:21:00.591660 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 14:21:00.598280 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 14:21:00.601742 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 14:21:00.608329 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1985 14:21:00.611669 call enable_fixed_mtrr()
1986 14:21:00.615292 Checking cr50 for pending updates
1987 14:21:00.619266 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 14:21:00.622348 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 14:21:00.625620 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 14:21:00.632426 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 14:21:00.635515 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 14:21:00.638818 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 14:21:00.642337 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 14:21:00.648853 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 14:21:00.652024 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 14:21:00.655525 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 14:21:00.658995 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 14:21:00.665287 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 14:21:00.668726 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 14:21:00.675362 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 14:21:00.678690 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 14:21:00.682074 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 14:21:00.685198 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 14:21:00.691983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 14:21:00.695195 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 14:21:00.698363 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 14:21:00.701973 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 14:21:00.708369 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 14:21:00.711943 call enable_fixed_mtrr()
2010 14:21:00.715099 call enable_fixed_mtrr()
2011 14:21:00.718339 CPU physical address size: 39 bits
2012 14:21:00.721673 Reading cr50 TPM mode
2013 14:21:00.725335 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 14:21:00.728735 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 14:21:00.731946 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 14:21:00.738713 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 14:21:00.741996 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 14:21:00.745290 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 14:21:00.748738 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 14:21:00.754982 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 14:21:00.758675 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 14:21:00.761930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 14:21:00.765354 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 14:21:00.771717 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 14:21:00.775098 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 14:21:00.778250 call enable_fixed_mtrr()
2027 14:21:00.781747 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 14:21:00.788375 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 14:21:00.791504 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 14:21:00.794973 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 14:21:00.798098 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 14:21:00.804894 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 14:21:00.808029 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 14:21:00.811614 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 14:21:00.814685 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 14:21:00.818989 CPU physical address size: 39 bits
2037 14:21:00.825786 call enable_fixed_mtrr()
2038 14:21:00.828898 CPU physical address size: 39 bits
2039 14:21:00.832320 CPU physical address size: 39 bits
2040 14:21:00.838958 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 14:21:00.842493 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 14:21:00.845704 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 14:21:00.848943 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 14:21:00.855805 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 14:21:00.858866 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 14:21:00.862318 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 14:21:00.865605 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 14:21:00.872294 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 14:21:00.875449 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 14:21:00.878692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 14:21:00.882272 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 14:21:00.890033 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 14:21:00.893124 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 14:21:00.896457 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 14:21:00.899972 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 14:21:00.906673 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 14:21:00.909896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 14:21:00.913111 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 14:21:00.916547 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 14:21:00.923040 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 14:21:00.926538 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 14:21:00.929799 call enable_fixed_mtrr()
2063 14:21:00.933057 call enable_fixed_mtrr()
2064 14:21:00.939681 BS: BS_PAYLOAD_LOAD entry times (exec / console): 110 / 7 ms
2065 14:21:00.942753 CPU physical address size: 39 bits
2066 14:21:00.946123 CPU physical address size: 39 bits
2067 14:21:00.956071 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2068 14:21:00.959563 CPU physical address size: 39 bits
2069 14:21:00.962782 Checking segment from ROM address 0xffc02b38
2070 14:21:00.966219 Checking segment from ROM address 0xffc02b54
2071 14:21:00.972747 Loading segment from ROM address 0xffc02b38
2072 14:21:00.972831 code (compression=0)
2073 14:21:00.982666 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2074 14:21:00.992654 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2075 14:21:00.992777 it's not compressed!
2076 14:21:01.133801 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2077 14:21:01.140057 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2078 14:21:01.147244 Loading segment from ROM address 0xffc02b54
2079 14:21:01.150493 Entry Point 0x30000000
2080 14:21:01.150575 Loaded segments
2081 14:21:01.156986 BS: BS_PAYLOAD_LOAD run times (exec / console): 149 / 63 ms
2082 14:21:01.202633 Finalizing chipset.
2083 14:21:01.205828 Finalizing SMM.
2084 14:21:01.205926 APMC done.
2085 14:21:01.212482 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2086 14:21:01.215928 mp_park_aps done after 0 msecs.
2087 14:21:01.219170 Jumping to boot code at 0x30000000(0x76b25000)
2088 14:21:01.229480 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2089 14:21:01.229563
2090 14:21:01.229627
2091 14:21:01.229687
2092 14:21:01.232556 Starting depthcharge on Voema...
2093 14:21:01.232638
2094 14:21:01.232980 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2095 14:21:01.233078 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2096 14:21:01.233160 Setting prompt string to ['volteer:']
2097 14:21:01.233237 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2098 14:21:01.242408 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2099 14:21:01.242493
2100 14:21:01.249015 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2101 14:21:01.249098
2102 14:21:01.252461 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2103 14:21:01.255692
2104 14:21:01.259006 Failed to find eMMC card reader
2105 14:21:01.259185
2106 14:21:01.259266 Wipe memory regions:
2107 14:21:01.259327
2108 14:21:01.265622 [0x00000000001000, 0x000000000a0000)
2109 14:21:01.265705
2110 14:21:01.268686 [0x00000000100000, 0x00000030000000)
2111 14:21:01.302616
2112 14:21:01.306144 [0x00000032662db0, 0x000000769ef000)
2113 14:21:01.353961
2114 14:21:01.357006 [0x00000100000000, 0x00000480400000)
2115 14:21:01.975432
2116 14:21:01.978725 ec_init: CrosEC protocol v3 supported (256, 256)
2117 14:21:02.411292
2118 14:21:02.411796 R8152: Initializing
2119 14:21:02.412134
2120 14:21:02.414252 Version 6 (ocp_data = 5c30)
2121 14:21:02.414693
2122 14:21:02.417892 R8152: Done initializing
2123 14:21:02.418322
2124 14:21:02.421024 Adding net device
2125 14:21:02.722400
2126 14:21:02.725647 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2127 14:21:02.726225
2128 14:21:02.726825
2129 14:21:02.727291
2130 14:21:02.729407 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2132 14:21:02.830742 volteer: tftpboot 192.168.201.1 11829244/tftp-deploy-c8p5zxtf/kernel/bzImage 11829244/tftp-deploy-c8p5zxtf/kernel/cmdline 11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
2133 14:21:02.831537 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2134 14:21:02.832318 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2135 14:21:02.836211 tftpboot 192.168.201.1 11829244/tftp-deploy-c8p5zxtf/kernel/bzImaploy-c8p5zxtf/kernel/cmdline 11829244/tftp-deploy-c8p5zxtf/ramdisk/ramdisk.cpio.gz
2136 14:21:02.836782
2137 14:21:02.837218 Waiting for link
2138 14:21:03.040221
2139 14:21:03.040916 done.
2140 14:21:03.041516
2141 14:21:03.042186 MAC: 00:24:32:30:78:e4
2142 14:21:03.042704
2143 14:21:03.043602 Sending DHCP discover... done.
2144 14:21:03.044206
2145 14:21:03.046705 Waiting for reply... done.
2146 14:21:03.047295
2147 14:21:03.050509 Sending DHCP request... done.
2148 14:21:03.051101
2149 14:21:03.057494 Waiting for reply... done.
2150 14:21:03.058192
2151 14:21:03.058689 My ip is 192.168.201.13
2152 14:21:03.059110
2153 14:21:03.060838 The DHCP server ip is 192.168.201.1
2154 14:21:03.064256
2155 14:21:03.067852 TFTP server IP predefined by user: 192.168.201.1
2156 14:21:03.068438
2157 14:21:03.074150 Bootfile predefined by user: 11829244/tftp-deploy-c8p5zxtf/kernel/bzImage
2158 14:21:03.074695
2159 14:21:03.077516 Sending tftp read request... done.
2160 14:21:03.078108
2161 14:21:03.086929 Waiting for the transfer...
2162 14:21:03.087522
2163 14:21:03.710236 00000000 ################################################################
2164 14:21:03.710407
2165 14:21:04.258643 00080000 ################################################################
2166 14:21:04.258803
2167 14:21:04.827036 00100000 ################################################################
2168 14:21:04.827181
2169 14:21:05.387761 00180000 ################################################################
2170 14:21:05.387951
2171 14:21:05.952943 00200000 ################################################################
2172 14:21:05.953091
2173 14:21:06.534276 00280000 ################################################################
2174 14:21:06.534414
2175 14:21:07.081247 00300000 ################################################################
2176 14:21:07.081423
2177 14:21:07.633269 00380000 ################################################################
2178 14:21:07.633439
2179 14:21:08.172850 00400000 ################################################################
2180 14:21:08.173000
2181 14:21:08.715365 00480000 ################################################################
2182 14:21:08.715501
2183 14:21:09.278966 00500000 ################################################################
2184 14:21:09.279519
2185 14:21:09.973194 00580000 ################################################################
2186 14:21:09.973796
2187 14:21:10.695908 00600000 ################################################################
2188 14:21:10.696548
2189 14:21:11.307722 00680000 ################################################################
2190 14:21:11.308256
2191 14:21:11.901092 00700000 ################################################################
2192 14:21:11.901256
2193 14:21:12.468224 00780000 ################################################################
2194 14:21:12.469063
2195 14:21:13.052814 00800000 ################################################################
2196 14:21:13.052949
2197 14:21:13.614078 00880000 ################################################################
2198 14:21:13.614215
2199 14:21:14.189657 00900000 ################################################################
2200 14:21:14.189828
2201 14:21:14.781037 00980000 ################################################################
2202 14:21:14.781228
2203 14:21:15.459703 00a00000 ################################################################
2204 14:21:15.460315
2205 14:21:16.102323 00a80000 ############################################################ done.
2206 14:21:16.102470
2207 14:21:16.105673 The bootfile was 11493888 bytes long.
2208 14:21:16.105808
2209 14:21:16.108949 Sending tftp read request... done.
2210 14:21:16.109032
2211 14:21:16.112121 Waiting for the transfer...
2212 14:21:16.112203
2213 14:21:16.665597 00000000 ################################################################
2214 14:21:16.665799
2215 14:21:17.300890 00080000 ################################################################
2216 14:21:17.301037
2217 14:21:17.919555 00100000 ################################################################
2218 14:21:17.920082
2219 14:21:18.587490 00180000 ################################################################
2220 14:21:18.588198
2221 14:21:19.232327 00200000 ################################################################
2222 14:21:19.232845
2223 14:21:19.887504 00280000 ################################################################
2224 14:21:19.888311
2225 14:21:20.461183 00300000 ################################################################
2226 14:21:20.461341
2227 14:21:21.054222 00380000 ################################################################
2228 14:21:21.054373
2229 14:21:21.649563 00400000 ################################################################
2230 14:21:21.650249
2231 14:21:22.261099 00480000 ################################################################
2232 14:21:22.261249
2233 14:21:22.818577 00500000 ################################################################
2234 14:21:22.818773
2235 14:21:23.378543 00580000 ################################################################
2236 14:21:23.378690
2237 14:21:23.921460 00600000 ################################################################
2238 14:21:23.921620
2239 14:21:24.444808 00680000 ################################################################
2240 14:21:24.444945
2241 14:21:24.972471 00700000 ################################################################
2242 14:21:24.972619
2243 14:21:25.488834 00780000 ################################################################
2244 14:21:25.488984
2245 14:21:26.036591 00800000 ################################################################
2246 14:21:26.036741
2247 14:21:26.358157 00880000 ###################################### done.
2248 14:21:26.358298
2249 14:21:26.361365 Sending tftp read request... done.
2250 14:21:26.361452
2251 14:21:26.364868 Waiting for the transfer...
2252 14:21:26.364960
2253 14:21:26.365030 00000000 # done.
2254 14:21:26.365097
2255 14:21:26.374697 Command line loaded dynamically from TFTP file: 11829244/tftp-deploy-c8p5zxtf/kernel/cmdline
2256 14:21:26.374802
2257 14:21:26.391311 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2258 14:21:26.395399
2259 14:21:26.398690 Shutting down all USB controllers.
2260 14:21:26.398802
2261 14:21:26.398890 Removing current net device
2262 14:21:26.398971
2263 14:21:26.402001 Finalizing coreboot
2264 14:21:26.402124
2265 14:21:26.408431 Exiting depthcharge with code 4 at timestamp: 33748855
2266 14:21:26.408568
2267 14:21:26.408674
2268 14:21:26.408772 Starting kernel ...
2269 14:21:26.408866
2270 14:21:26.408959
2271 14:21:26.409469 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2272 14:21:26.409624 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2273 14:21:26.409748 Setting prompt string to ['Linux version [0-9]']
2274 14:21:26.409875 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2275 14:21:26.409989 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2277 14:25:45.410612 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2279 14:25:45.411700 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2281 14:25:45.412543 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2284 14:25:45.413978 end: 2 depthcharge-action (duration 00:05:00) [common]
2286 14:25:45.415300 Cleaning after the job
2287 14:25:45.415390 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/ramdisk
2288 14:25:45.416669 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/kernel
2289 14:25:45.418408 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11829244/tftp-deploy-c8p5zxtf/modules
2290 14:25:45.418992 start: 5.1 power-off (timeout 00:00:30) [common]
2291 14:25:45.419145 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2292 14:25:45.497192 >> Command sent successfully.
2293 14:25:45.503887 Returned 0 in 0 seconds
2294 14:25:45.604897 end: 5.1 power-off (duration 00:00:00) [common]
2296 14:25:45.606324 start: 5.2 read-feedback (timeout 00:10:00) [common]
2297 14:25:45.607477 Listened to connection for namespace 'common' for up to 1s
2298 14:25:46.608192 Finalising connection for namespace 'common'
2299 14:25:46.608886 Disconnecting from shell: Finalise
2300 14:25:46.609308
2301 14:25:46.710311 end: 5.2 read-feedback (duration 00:00:01) [common]
2302 14:25:46.710943 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11829244
2303 14:25:46.766287 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11829244
2304 14:25:46.766494 JobError: Your job cannot terminate cleanly.