[Enter `^Ec?' for help] coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)... CPU: Intel(R) Celeron(R) 7305 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423 CPU: AES supported, TXT NOT supported, VT supported Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384 Cache size = 8 MiB MCH: device id 4619 (rev 04) is Alderlake-P PCH: device id 5182 (rev 01) is Raptorlake-P SKU IGD: device id 46b3 (rev 0c) is Alderlake P GT2 VBOOT: Loading verstage. FMAP: Found "FLASH" version 1.1 at 0x1804000. FMAP: base = 0x0 size = 0x2000000 #areas = 37 FMAP: area COREBOOT found @ 1875000 (7909376 bytes) CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)... Probing TPM I2C: I2C bus 1 version 0x3230302a DW I2C bus 1 at 0xfe022000 (400 KHz) I2C TX abort detected (00000001) cr50_i2c_read: Address write failed .done! DID_VID 0x00281ae0 TPM ready after 0 ms cr50 TPM 2.0 (i2c 1:0x50 id 0x28) Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001 tlcl_send_startup: Startup return code is 0 TPM: setup succeeded src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0 Chrome EC: UHEPI supported Reading cr50 boot mode Cr50 says boot_mode is VERIFIED_RW(0x00). Phase 1 FMAP: area GBB found @ 1805000 (458752 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0 Phase 2 Phase 3 FMAP: area GBB found @ 1805000 (458752 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) VB2:vb2_verify_keyblock() Checking keyblock signature... VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) VB2:vb2_verify_fw_preamble() Verifying preamble. VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW Phase 4 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW Saving vboot hash. TPM: Extending digest for `VBOOT: boot mode` into PCR 0 tlcl_extend: response is 0 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1 tlcl_extend: response is 0 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured tlcl_lock_nv_write: response is 0 tlcl_lock_nv_write: response is 0 Slot B is selected FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600 BS: verstage times (exec / console): total (unknown) / 267 ms coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)... Google Chrome EC: version: ro: moli_v2.0.19454-8a70cbdcf0 rw: moli_v2.0.22464-d4ba27cabb running image: 2 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d EC took 940us to calculate image hash VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d VB2:sync_ec() select_rw=RW(active) EC returned error result code 1 PARAM_LIMIT_POWER not supported by EC. Waited 7367us to clear limit power flag. pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 TCO_STS: 0000 0000 GEN_PMCON: d0015038 00002200 GBLRST_CAUSE: 00000000 00000000 HPR_CAUSE0: 00000000 prev_sleep_state 5 Abort disabling TXT, as CPU is not TXT capable. cse_lite: Number of partitions = 3 cse_lite: Current partition = RO cse_lite: Next partition = RO cse_lite: Flags = 0x7 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff) cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff) FMAP: area SI_ME found @ 1000 (5238784 bytes) SF: Detected 00 0000 with sector size 0x1000, total 0x2000000 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4 cse_lite: CSE CBFS RW version : 16.1.25.2049 CSE Sub-partition update not required cse_lite: Set Boot Partition Info Command (RW) HECI: Global Reset(Type:1) Command +�F���s Alderlake-P PCH: device id 5182 (rev 01) is Raptorlake-P SKU IGD: device id 46b3 (rev 0c) is Alderlake P GT2 VBOOT: Loading verstage. FMAP: Found "FLASH" version 1.1 at 0x1804000. FMAP: base = 0x0 size = 0x2000000 #areas = 37 FMAP: area COREBOOT found @ 1875000 (7909376 bytes) CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)... Probing TPM I2C: I2C bus 1 version 0x3230302a DW I2C bus 1 at 0xfe022000 (400 KHz) done! DID_VID 0x00281ae0 TPM ready after 0 ms cr50 TPM 2.0 (i2c 1:0x50 id 0x28) Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001 tlcl_send_startup: Startup return code is 0 TPM: setup succeeded src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0 Chrome EC: UHEPI supported Reading cr50 boot mode Cr50 says boot_mode is VERIFIED_RW(0x00). Phase 1 FMAP: area GBB found @ 1805000 (458752 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0 Phase 2 Phase 3 FMAP: area GBB found @ 1805000 (458752 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) VB2:vb2_verify_keyblock() Checking keyblock signature... VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) FMAP: area VBLOCK_B found @ 1000000 (65536 bytes) VB2:vb2_verify_fw_preamble() Verifying preamble. VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW Phase 4 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW Saving vboot hash. TPM: Extending digest for `VBOOT: boot mode` into PCR 0 tlcl_extend: response is 0 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1 tlcl_extend: response is 0 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured tlcl_lock_nv_write: response is 0 tlcl_lock_nv_write: response is 0 Slot B is selected FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600 BS: verstage times (exec / console): total (unknown) / 260 ms coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)... Google Chrome EC: version: ro: moli_v2.0.19454-8a70cbdcf0 rw: moli_v2.0.22464-d4ba27cabb running image: 2 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d EC took 955us to calculate image hash VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d VB2:sync_ec() select_rw=RW(active) EC returned error result code 1 PARAM_LIMIT_POWER not supported by EC. Waited 7357us to clear limit power flag. pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 TCO_STS: 0000 0000 GEN_PMCON: d1001038 00002200 GBLRST_CAUSE: 00000040 00000000 HPR_CAUSE0: 00000000 prev_sleep_state 5 Abort disabling TXT, as CPU is not TXT capable. cse_lite: Number of partitions = 3 cse_lite: Current partition = RW cse_lite: Next partition = RW cse_lite: Flags = 0x7 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff) cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff) FMAP: area SI_ME found @ 1000 (5238784 bytes) SF: Detected 00 0000 with sector size 0x1000, total 0x2000000 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4 cse_lite: CSE CBFS RW version : 16.1.25.2049 CSE Sub-partition update not required Boot Count incremented to 4375 CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes) Probing TPM I2C: done! DID_VID 0x00281ae0 Locality already claimed cr50 TPM 2.0 (i2c 1:0x50 id 0x28) src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0 MRC: Hash idx 0x100d comparison successful. MRC cache found, size f6c8 bootmode is set to: 2 FW_CONFIG value from CBI is 0x64 fw_config match found: STORAGE=STORAGE_EMMC FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes) SPD_CACHE: cache found, size 0x1000 SPD_CACHE: DIMM0 is the same No memory dimm at address 51 SPD_CACHE: DIMM1 is not present No memory dimm at address 52 SPD_CACHE: DIMM2 is not present No memory dimm at address 53 SPD_CACHE: DIMM3 is not present Use the SPD cache data SPD: module type is DDR4 SPD: module part number is M471A5244CB0-CWE SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb SPD: device width 16 bits, bus width 64 bits SPD: module size is 4096 MB (per channel) CBMEM: IMD: root @ 0x76fff000 254 entries. IMD: root @ 0x76ffec00 62 entries. FMAP: area RO_VPD found @ 1800000 (16384 bytes) FMAP: area RW_VPD found @ f29000 (8192 bytes) RW_VPD is uninitialized or empty. FMAP: area COREBOOT found @ 1875000 (7909376 bytes) External stage cache: IMD: root @ 0x7bbff000 254 entries. IMD: root @ 0x7bbfec00 62 entries. FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. MRC: 'RW_MRC_CACHE' does not need update. 1 DIMMs found SMM Memory Map SMRAM : 0x7b800000 0x800000 Subregion 0: 0x7b800000 0x200000 Subregion 1: 0x7ba00000 0x200000 Subregion 2: 0x7bc00000 0x400000 top_of_ram = 0x77000000 MTRR Range: Start=76000000 End=77000000 (Size 1000000) MTRR Range: Start=7b800000 End=7c000000 (Size 800000) MTRR Range: Start=f9000000 End=fa000000 (Size 1000000) MTRR Range: Start=ff000000 End=0 (Size 1000000) Normal boot CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60 Processing 237 relocs. Offset value of 0x74ab9000 CLFLUSH [0x76ab9000, 0x76ac3e60] CLFLUSH [0x76abea80, 0x76abea84] BS: romstage times (exec / console): total (unknown) / 418 ms CLFLUSH [0x76ab8000, 0x77000000] CLFLUSH [0x7ba00000, 0x7bc00000] coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 postcar starting (log level: 8)... Normal boot FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0 Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50 Processing 5882 relocs. Offset value of 0x72a2e000 BS: postcar times (exec / console): total (unknown) / 54 ms coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 ramstage starting (log level: 8)... Reserving BERT start 76a1d000, size 10000 Normal boot FMAP: area RO_VPD found @ 1800000 (16384 bytes) MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000 FMAP: area RW_VPD found @ f29000 (8192 bytes) Google Chrome EC: version: ro: moli_v2.0.19454-8a70cbdcf0 rw: moli_v2.0.22464-d4ba27cabb running image: 2 ACPI _SWS is PM1 Index 8 GPE Index -1 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms FW_CONFIG value from CBI is 0x64 PCI: 00:06.0 disabled by fw_config fw_config match found: STORAGE=STORAGE_EMMC fw_config match found: STORAGE=STORAGE_EMMC FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes) CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080 microcode: sig=0x906a4 pf=0x80 revision=0x423 microcode: Update skipped, already up-to-date CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8 Detected 5 core, 5 thread CPU. Setting up SMI for CPU IED base = 0x7bc00000 IED size = 0x00400000 Will perform SMM setup. CPU: Intel(R) Celeron(R) 7305. LAPIC 0x0 in XAPIC mode. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 Processing 18 relocs. Offset value of 0x00030000 Attempting to start 4 APs Waiting for 10ms after sending INIT. Waiting for SIPI to complete... done. LAPIC 0x10 in XAPIC mode. Waiting for SIPI to complete... done. LAPIC 0x14 in XAPIC mode. LAPIC 0x12 in XAPIC mode. AP: slot 4 apic_id 10, MCU rev: 0x00000423 AP: slot 2 apic_id 14, MCU rev: 0x00000423 LAPIC 0x16 in XAPIC mode. AP: slot 1 apic_id 12, MCU rev: 0x00000423 AP: slot 3 apic_id 16, MCU rev: 0x00000423 smm_setup_relocation_handler: enter smm_setup_relocation_handler: exit Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208 Processing 11 relocs. Offset value of 0x00038000 smm_module_setup_stub: stack_top = 0x7b802800 smm_module_setup_stub: per cpu stack_size = 0x800 smm_module_setup_stub: runtime.start32_offset = 0x4c smm_module_setup_stub: runtime.smm_size = 0x10000 SMM Module: stub loaded at 38000. Will call 0x76a5220d Installing permanent SMM handler to 0x7b800000 FX_SAVE [0x7b9ff600-0x7ba00000] HANDLER [0x7b9f6000-0x7b9ff528] CPU 0 ss0 [0x7b9f5c00-0x7b9f6000] stub0 [0x7b9ee000-0x7b9ee208] CPU 1 ss1 [0x7b9f5800-0x7b9f5c00] stub1 [0x7b9edc00-0x7b9ede08] CPU 2 ss2 [0x7b9f5400-0x7b9f5800] stub2 [0x7b9ed800-0x7b9eda08] CPU 3 ss3 [0x7b9f5000-0x7b9f5400] stub3 [0x7b9ed400-0x7b9ed608] CPU 4 ss4 [0x7b9f4c00-0x7b9f5000] stub4 [0x7b9ed000-0x7b9ed208] stacks [0x7b800000-0x7b802800] Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528 Processing 255 relocs. Offset value of 0x7b9f6000 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208 Processing 11 relocs. Offset value of 0x7b9ee000 smm_module_setup_stub: stack_top = 0x7b802800 smm_module_setup_stub: per cpu stack_size = 0x800 smm_module_setup_stub: runtime.start32_offset = 0x4c smm_module_setup_stub: runtime.smm_size = 0x200000 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c Clearing SMI status registers SMI_STS: PM1 PM1_STS: WAK PWRBTN smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0 In relocation handler: CPU 0 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000 Writing SMRR. base = 0x7b800006, mask=0xff800c00 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4 In relocation handler: CPU 4 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000 Writing SMRR. base = 0x7b800006, mask=0xff800c00 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1 In relocation handler: CPU 1 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000 Writing SMRR. base = 0x7b800006, mask=0xff800c00 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2 In relocation handler: CPU 2 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000 Writing SMRR. base = 0x7b800006, mask=0xff800c00 Relocation complete. smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3 In relocation handler: CPU 3 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000 Writing SMRR. base = 0x7b800006, mask=0xff800c00 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 906a4 CPU: family 06, model 9a, stepping 04 Clearing out pending MCEs cpu: energy policy set to 7 Turbo is unavailable microcode: Update skipped, already up-to-date CPU #0 initialized Initializing CPU #1 Initializing CPU #3 Initializing CPU #2 Initializing CPU #4 CPU: vendor Intel device 906a4 CPU: family 06, model 9a, stepping 04 CPU: vendor Intel device 906a4 CPU: family 06, model 9a, stepping 04 CPU: vendor Intel device 906a4 CPU: family 06, model 9a, stepping 04 Clearing out pending MCEs Clearing out pending MCEs CPU: vendor Intel device 906a4 CPU: family 06, model 9a, stepping 04 cpu: energy policy set to 7 Clearing out pending MCEs cpu: energy policy set to 7 Clearing out pending MCEs microcode: Update skipped, already up-to-date CPU #3 initialized cpu: energy policy set to 7 cpu: energy policy set to 7 microcode: Update skipped, already up-to-date CPU #2 initialized microcode: Update skipped, already up-to-date CPU #4 initialized microcode: Update skipped, already up-to-date CPU #1 initialized bsp_do_flight_plan done after 453 msecs. Enabling SMIs. BS: BS_DEV_INIT_CHIPS entry times (exec / console): 244 / 352 ms Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214) Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123) Probing TPM I2C: done! DID_VID 0x00281ae0 Locality already claimed cr50 TPM 2.0 (i2c 1:0x50 id 0x28) Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9 Enabling GPIO PM b/c CR50 has long IRQ pulse support fw_config match found: AUDIO=NAU88L25B_I2S CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4 Found a VBT of 8704 bytes after decompression PsysPmax = 214W PCI 1.0, PIN A, using IRQ #16 PCI 2.0, PIN A, using IRQ #17 PCI 4.0, PIN A, using IRQ #18 PCI 5.0, PIN A, using IRQ #16 PCI 6.0, PIN A, using IRQ #16 PCI 6.2, PIN C, using IRQ #18 PCI 7.0, PIN A, using IRQ #19 PCI 7.1, PIN B, using IRQ #20 PCI 7.2, PIN C, using IRQ #21 PCI 7.3, PIN D, using IRQ #22 PCI 8.0, PIN A, using IRQ #23 PCI D.0, PIN A, using IRQ #17 PCI D.1, PIN B, using IRQ #19 PCI 10.0, PIN A, using IRQ #24 PCI 10.1, PIN B, using IRQ #25 PCI 10.6, PIN C, using IRQ #20 PCI 10.7, PIN D, using IRQ #21 PCI 11.0, PIN A, using IRQ #26 PCI 11.1, PIN B, using IRQ #27 PCI 11.2, PIN C, using IRQ #28 PCI 11.3, PIN D, using IRQ #29 PCI 12.0, PIN A, using IRQ #30 PCI 12.6, PIN B, using IRQ #31 PCI 12.7, PIN C, using IRQ #22 PCI 13.0, PIN A, using IRQ #32 PCI 13.1, PIN B, using IRQ #33 PCI 13.2, PIN C, using IRQ #34 PCI 13.3, PIN D, using IRQ #35 PCI 14.0, PIN B, using IRQ #23 PCI 14.1, PIN A, using IRQ #36 PCI 14.3, PIN C, using IRQ #17 PCI 15.0, PIN A, using IRQ #37 PCI 15.1, PIN B, using IRQ #38 PCI 15.2, PIN C, using IRQ #39 PCI 15.3, PIN D, using IRQ #40 PCI 16.0, PIN A, using IRQ #18 PCI 16.1, PIN B, using IRQ #19 PCI 16.2, PIN C, using IRQ #20 PCI 16.3, PIN D, using IRQ #21 PCI 16.4, PIN A, using IRQ #18 PCI 16.5, PIN B, using IRQ #19 PCI 17.0, PIN A, using IRQ #22 PCI 19.0, PIN A, using IRQ #41 PCI 19.1, PIN B, using IRQ #42 PCI 19.2, PIN C, using IRQ #43 PCI 1C.0, PIN A, using IRQ #16 PCI 1C.1, PIN B, using IRQ #17 PCI 1C.2, PIN C, using IRQ #18 PCI 1C.3, PIN D, using IRQ #19 PCI 1C.4, PIN A, using IRQ #16 PCI 1C.5, PIN B, using IRQ #17 PCI 1C.6, PIN C, using IRQ #18 PCI 1C.7, PIN D, using IRQ #19 PCI 1D.0, PIN A, using IRQ #16 PCI 1D.1, PIN B, using IRQ #17 PCI 1D.2, PIN C, using IRQ #18 PCI 1D.3, PIN D, using IRQ #19 PCI 1E.0, PIN A, using IRQ #23 PCI 1E.1, PIN B, using IRQ #20 PCI 1E.2, PIN C, using IRQ #44 PCI 1E.3, PIN D, using IRQ #45 PCI 1F.3, PIN B, using IRQ #22 PCI 1F.4, PIN C, using IRQ #23 PCI 1F.6, PIN D, using IRQ #20 PCI 1F.7, PIN A, using IRQ #21 IRQ: Using dynamically assigned PCI IO-APIC IRQs WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called FSPS returned 0 Executing Phase 1 of FspMultiPhaseSiInit FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called port C0 DISC req: usage 1 usb3 1 usb2 1 Raw Buffer output 0 00000111 Raw Buffer output 1 00000000 pmc_send_ipc_cmd succeeded port C1 DISC req: usage 1 usb3 3 usb2 3 Raw Buffer output 0 00000331 Raw Buffer output 1 00000000 pmc_send_ipc_cmd succeeded AP Mode Entry enabled, skip waiting for DisplayPort connection Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Detected 5 core, 5 thread CPU. Display FSP Version Info HOB Reference Code - CPU = c.0.65.70 uCode Version = 0.0.4.23 TXT ACM version = ff.ff.ff.ffff Reference Code - ME = c.0.65.70 MEBx version = 0.0.0.0 ME Firmware Version = Lite SKU Reference Code - PCH = c.0.65.70 PCH-CRID Status = Disabled PCH-CRID Original Value = ff.ff.ff.ffff PCH-CRID New Value = ff.ff.ff.ffff OPROM - RST - RAID = ff.ff.ff.ffff PCH Hsio Version = 4.0.0.0 Reference Code - SA - System Agent = c.0.65.70 Reference Code - MRC = 0.0.3.80 SA - PCIe Version = c.0.65.70 SA-CRID Status = Disabled SA-CRID Original Value = 0.0.0.4 SA-CRID New Value = 0.0.0.4 OPROM - VBIOS = ff.ff.ff.ffff IO Manageability Engine FW Version = 24.0.4.0 PHY Build Version = 0.0.0.2016 Thunderbolt(TM) FW Version = 11.5.0.0 System Agent Manageability Engine FW Version = ff.ff.ff.ffff Found PCIe Root Port #7 at PCI: 00:1c.0. Found PCIe Root Port #8 at PCI: 00:1c.7. Found PCIe Root Port #12 at PCI: 00:1d.0. pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing. Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0. Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0. Found PCIe Root Port #1 at PCI: 00:07.0. Found PCIe Root Port #2 at PCI: 00:07.1. Found PCIe Root Port #3 at PCI: 00:07.2. Sending EOP early from SoC HECI: Sending End-of-Post BS: BS_DEV_INIT_CHIPS run times (exec / console): 181 / 545 ms Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 DOMAIN: 0000: enabled 1 GPIO: 0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:01.1: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:06.2: enabled 0 PCI: 00:07.0: enabled 1 PCI: 00:07.1: enabled 1 PCI: 00:07.2: enabled 1 PCI: 00:07.3: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:0d.0: enabled 1 PCI: 00:0d.1: enabled 0 PCI: 00:0d.2: enabled 1 PCI: 00:0d.3: enabled 1 PCI: 00:0e.0: enabled 0 PCI: 00:10.0: enabled 0 PCI: 00:10.1: enabled 0 PCI: 00:10.6: enabled 0 PCI: 00:10.7: enabled 0 PCI: 00:12.0: enabled 0 PCI: 00:12.6: enabled 0 PCI: 00:12.7: enabled 0 PCI: 00:13.0: enabled 0 PCI: 00:14.0: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 0 PCI: 00:15.3: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:16.5: enabled 0 PCI: 00:17.0: enabled 1 PCI: 00:19.0: enabled 0 PCI: 00:19.1: enabled 0 PCI: 00:19.2: enabled 0 PCI: 00:1a.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.7: enabled 1 PCI: 00:1d.0: enabled 0 PCI: 00:1d.1: enabled 0 PCI: 00:1d.2: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 1 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 0 PCI: 00:1e.3: enabled 1 PCI: 00:1f.0: enabled 1 PCI: 00:1f.1: enabled 0 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 PCI: 00:1f.7: enabled 0 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 USB0 port 0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 USB0 port 0: enabled 1 GENERIC: 0.0: enabled 1 I2C: 00:1a: enabled 1 I2C: 00:50: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 PNP: 0c09.0: enabled 1 GENERIC: 0.0: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 0 USB3 port 2: enabled 1 USB3 port 3: enabled 0 USB2 port 0: enabled 1 USB2 port 1: enabled 0 USB2 port 2: enabled 1 USB2 port 3: enabled 1 USB2 port 4: enabled 1 USB2 port 5: enabled 1 USB2 port 6: enabled 1 USB2 port 7: enabled 1 USB2 port 8: enabled 0 USB2 port 9: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 1 USB3 port 2: enabled 1 USB3 port 3: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 APIC: 00: enabled 1 APIC: 12: enabled 1 APIC: 14: enabled 1 APIC: 16: enabled 1 APIC: 10: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: 12: enabled 1 APIC: 14: enabled 1 APIC: 16: enabled 1 APIC: 10: enabled 1 DOMAIN: 0000: enabled 1 GPIO: 0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:01.1: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:04.0: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:06.2: enabled 0 PCI: 00:07.0: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:07.1: enabled 1 GENERIC: 1.0: enabled 1 PCI: 00:07.2: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:0d.0: enabled 1 USB0 port 0: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 0 USB3 port 2: enabled 1 USB3 port 3: enabled 0 PCI: 00:0d.1: enabled 0 PCI: 00:0d.2: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:0d.3: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:0e.0: enabled 0 PCI: 00:10.0: enabled 0 PCI: 00:10.1: enabled 0 PCI: 00:10.6: enabled 0 PCI: 00:10.7: enabled 0 PCI: 00:12.0: enabled 0 PCI: 00:12.6: enabled 0 PCI: 00:12.7: enabled 0 PCI: 00:13.0: enabled 0 PCI: 00:14.0: enabled 1 USB0 port 0: enabled 1 USB2 port 0: enabled 1 USB2 port 1: enabled 0 USB2 port 2: enabled 1 USB2 port 3: enabled 1 USB2 port 4: enabled 1 USB2 port 5: enabled 1 USB2 port 6: enabled 1 USB2 port 7: enabled 1 USB2 port 8: enabled 0 USB2 port 9: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 1 USB3 port 2: enabled 1 USB3 port 3: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:15.0: enabled 1 I2C: 00:1a: enabled 1 PCI: 00:15.1: enabled 1 I2C: 00:50: enabled 1 PCI: 00:15.2: enabled 0 PCI: 00:15.3: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:16.5: enabled 0 PCI: 00:17.0: enabled 1 PCI: 00:19.0: enabled 0 PCI: 00:19.1: enabled 0 PCI: 00:19.2: enabled 0 PCI: 00:1a.0: enabled 0 PCI: 00:1c.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:1c.7: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:1d.0: enabled 1 GENERIC: 0.0: enabled 1 PCI: 00:1e.0: enabled 1 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 0 PCI: 00:1e.3: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 0c09.0: enabled 1 PCI: 00:1f.1: enabled 0 PCI: 00:1f.2: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 PCI: 00:1f.7: enabled 0 Root Device scanning... scan_static_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0000] ops PCI: 00:00.0 [8086/4619] enabled PCI: 00:02.0 [8086/0000] bus ops PCI: 00:02.0 [8086/46b3] enabled PCI: 00:04.0 [8086/0000] bus ops PCI: 00:04.0 [8086/461d] enabled PCI: 00:07.0 subordinate bus PCI Express PCI: 00:07.0 hot-plug capable PCI: 00:07.0 [8086/466e] enabled PCI: 00:07.1 subordinate bus PCI Express PCI: 00:07.1 hot-plug capable PCI: 00:07.1 [8086/463f] enabled PCI: 00:07.2 subordinate bus PCI Express PCI: 00:07.2 hot-plug capable PCI: 00:07.2 [8086/462f] enabled PCI: 00:08.0 [8086/464f] disabled PCI: 00:0a.0 [8086/467d] enabled PCI: 00:0d.0 [8086/0000] bus ops PCI: 00:0d.0 [8086/461e] enabled PCI: 00:0d.2 [8086/0000] bus ops PCI: 00:0d.2 [8086/463e] enabled PCI: 00:0d.3 [8086/0000] bus ops PCI: 00:0d.3 [8086/466d] enabled PCI: 00:14.0 [8086/0000] bus ops PCI: 00:14.0 [8086/51ed] enabled PCI: 00:14.2 [8086/51ef] enabled PCI: 00:14.3 [8086/0000] bus ops PCI: 00:14.3 [8086/51f0] enabled PCI: 00:15.0 [8086/0000] bus ops PCI: 00:15.0 [8086/51e8] enabled PCI: 00:15.1 [8086/0000] bus ops PCI: 00:15.1 [8086/51e9] enabled PCI: 00:16.0 [8086/0000] ops PCI: 00:16.0 [8086/51e0] enabled PCI: Static device PCI: 00:17.0 not found, disabling it. PCI: 00:1c.0 [8086/0000] bus ops PCI: 00:1c.0 [8086/51be] enabled PCI: 00:1c.7 [8086/0000] bus ops PCI: 00:1c.7 [8086/51bf] enabled PCI: 00:1d.0 [8086/0000] bus ops PCI: 00:1d.0 [8086/51b3] enabled PCI: 00:1e.0 [8086/0000] ops PCI: 00:1e.0 [8086/51a8] enabled PCI: 00:1e.3 [8086/0000] bus ops PCI: 00:1e.3 [8086/51ab] enabled PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/5182] enabled RTC Init Set power on after power failure. Disabling Deep S3 Disabling Deep S3 Disabling Deep S4 Disabling Deep S4 Disabling Deep S5 Disabling Deep S5 PCI: 00:1f.2 [0000/0000] hidden PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/51c8] enabled PCI: 00:1f.4 [8086/0000] bus ops PCI: 00:1f.4 [8086/51a3] enabled PCI: 00:1f.5 [8086/0000] bus ops PCI: 00:1f.5 [8086/51a4] enabled GPIO: 0 enabled PCI: Leftover static devices: PCI: 00:01.0 PCI: 00:01.1 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:06.2 PCI: 00:09.0 PCI: 00:0d.1 PCI: 00:0e.0 PCI: 00:10.0 PCI: 00:10.1 PCI: 00:10.6 PCI: 00:10.7 PCI: 00:12.0 PCI: 00:12.6 PCI: 00:12.7 PCI: 00:13.0 PCI: 00:14.1 PCI: 00:15.2 PCI: 00:15.3 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:16.4 PCI: 00:16.5 PCI: 00:17.0 PCI: 00:19.0 PCI: 00:19.1 PCI: 00:19.2 PCI: 00:1a.0 PCI: 00:1e.1 PCI: 00:1e.2 PCI: 00:1f.1 PCI: 00:1f.6 PCI: 00:1f.7 PCI: Check your devicetree.cb. PCI: 00:02.0 scanning... scan_generic_bus for PCI: 00:02.0 scan_generic_bus for PCI: 00:02.0 done scan_bus: bus PCI: 00:02.0 finished in 7 msecs PCI: 00:04.0 scanning... scan_generic_bus for PCI: 00:04.0 GENERIC: 0.0 enabled bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done scan_bus: bus PCI: 00:04.0 finished in 11 msecs PCI: 00:07.0 scanning... do_pci_scan_bridge for PCI: 00:07.0 PCI: pci_scan_bus for bus 01 GENERIC: 0.0 enabled scan_bus: bus PCI: 00:07.0 finished in 8 msecs PCI: 00:07.1 scanning... do_pci_scan_bridge for PCI: 00:07.1 PCI: pci_scan_bus for bus 2c GENERIC: 1.0 enabled scan_bus: bus PCI: 00:07.1 finished in 8 msecs PCI: 00:07.2 scanning... do_pci_scan_bridge for PCI: 00:07.2 PCI: pci_scan_bus for bus 57 GENERIC: 0.0 enabled scan_bus: bus PCI: 00:07.2 finished in 8 msecs PCI: 00:0d.0 scanning... scan_static_bus for PCI: 00:0d.0 USB0 port 0 enabled USB0 port 0 scanning... scan_static_bus for USB0 port 0 USB3 port 0 enabled USB3 port 1 disabled USB3 port 2 enabled USB3 port 3 disabled USB3 port 0 scanning... scan_static_bus for USB3 port 0 scan_static_bus for USB3 port 0 done scan_bus: bus USB3 port 0 finished in 6 msecs USB3 port 2 scanning... scan_static_bus for USB3 port 2 scan_static_bus for USB3 port 2 done scan_bus: bus USB3 port 2 finished in 6 msecs scan_static_bus for USB0 port 0 done scan_bus: bus USB0 port 0 finished in 43 msecs scan_static_bus for PCI: 00:0d.0 done scan_bus: bus PCI: 00:0d.0 finished in 59 msecs PCI: 00:0d.2 scanning... scan_generic_bus for PCI: 00:0d.2 GENERIC: 0.0 enabled bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done scan_bus: bus PCI: 00:0d.2 finished in 11 msecs PCI: 00:0d.3 scanning... scan_generic_bus for PCI: 00:0d.3 GENERIC: 0.0 enabled bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done scan_bus: bus PCI: 00:0d.3 finished in 11 msecs PCI: 00:14.0 scanning... scan_static_bus for PCI: 00:14.0 USB0 port 0 enabled USB0 port 0 scanning... scan_static_bus for USB0 port 0 USB2 port 0 enabled USB2 port 1 disabled USB2 port 2 enabled USB2 port 3 enabled USB2 port 4 enabled USB2 port 5 enabled USB2 port 6 enabled USB2 port 7 enabled USB2 port 8 disabled USB2 port 9 enabled USB3 port 0 enabled USB3 port 1 enabled USB3 port 2 enabled USB3 port 3 enabled USB2 port 0 scanning... scan_static_bus for USB2 port 0 scan_static_bus for USB2 port 0 done scan_bus: bus USB2 port 0 finished in 6 msecs USB2 port 2 scanning... scan_static_bus for USB2 port 2 scan_static_bus for USB2 port 2 done scan_bus: bus USB2 port 2 finished in 6 msecs USB2 port 3 scanning... scan_static_bus for USB2 port 3 scan_static_bus for USB2 port 3 done scan_bus: bus USB2 port 3 finished in 6 msecs USB2 port 4 scanning... scan_static_bus for USB2 port 4 scan_static_bus for USB2 port 4 done scan_bus: bus USB2 port 4 finished in 6 msecs USB2 port 5 scanning... scan_static_bus for USB2 port 5 scan_static_bus for USB2 port 5 done scan_bus: bus USB2 port 5 finished in 6 msecs USB2 port 6 scanning... scan_static_bus for USB2 port 6 scan_static_bus for USB2 port 6 done scan_bus: bus USB2 port 6 finished in 6 msecs USB2 port 7 scanning... scan_static_bus for USB2 port 7 scan_static_bus for USB2 port 7 done scan_bus: bus USB2 port 7 finished in 6 msecs USB2 port 9 scanning... scan_static_bus for USB2 port 9 scan_static_bus for USB2 port 9 done scan_bus: bus USB2 port 9 finished in 6 msecs USB3 port 0 scanning... scan_static_bus for USB3 port 0 scan_static_bus for USB3 port 0 done scan_bus: bus USB3 port 0 finished in 6 msecs USB3 port 1 scanning... scan_static_bus for USB3 port 1 scan_static_bus for USB3 port 1 done scan_bus: bus USB3 port 1 finished in 6 msecs USB3 port 2 scanning... scan_static_bus for USB3 port 2 scan_static_bus for USB3 port 2 done scan_bus: bus USB3 port 2 finished in 6 msecs USB3 port 3 scanning... scan_static_bus for USB3 port 3 scan_static_bus for USB3 port 3 done scan_bus: bus USB3 port 3 finished in 6 msecs scan_static_bus for USB0 port 0 done scan_bus: bus USB0 port 0 finished in 203 msecs scan_static_bus for PCI: 00:14.0 done scan_bus: bus PCI: 00:14.0 finished in 219 msecs PCI: 00:14.3 scanning... scan_static_bus for PCI: 00:14.3 GENERIC: 0.0 enabled scan_static_bus for PCI: 00:14.3 done scan_bus: bus PCI: 00:14.3 finished in 9 msecs PCI: 00:15.0 scanning... scan_static_bus for PCI: 00:15.0 I2C: 00:1a enabled scan_static_bus for PCI: 00:15.0 done scan_bus: bus PCI: 00:15.0 finished in 9 msecs PCI: 00:15.1 scanning... scan_static_bus for PCI: 00:15.1 I2C: 00:50 enabled scan_static_bus for PCI: 00:15.1 done scan_bus: bus PCI: 00:15.1 finished in 9 msecs PCI: 00:1c.0 scanning... do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 82 PCI: 82:00.0 [10ec/0000] ops PCI: 82:00.0 [10ec/8168] enabled Enabling Common Clock Configuration L1 Sub-State supported from root port 28 L1 Sub-State Support = 0xf CommonModeRestoreTime = 0x96 Power On Value = 0xf, Power On Scale = 0x1 ASPM: Enabled L1 PCIe: Max_Payload_Size adjusted to 128 PCI: 82:00.0: Enabled LTR PCI: 82:00.0: Programmed LTR max latencies scan_bus: bus PCI: 00:1c.0 finished in 43 msecs PCI: 00:1c.7 scanning... do_pci_scan_bridge for PCI: 00:1c.7 PCI: pci_scan_bus for bus 83 PCI: 83:00.0 [17a0/9755] enabled GENERIC: 0.0 enabled Enabling Common Clock Configuration L1 Sub-State supported from root port 28 L1 Sub-State Support = 0xf CommonModeRestoreTime = 0xff Power On Value = 0x1f, Power On Scale = 0x2 ASPM: Enabled L0s and L1 PCIe: Max_Payload_Size adjusted to 128 PCI: 83:00.0: Enabled LTR PCI: 83:00.0: Programmed LTR max latencies scan_bus: bus PCI: 00:1c.7 finished in 43 msecs PCI: 00:1d.0 scanning... do_pci_scan_bridge for PCI: 00:1d.0 PCI: pci_scan_bus for bus 84 PCI: 84:00.0 [1217/8760] enabled GENERIC: 0.0 enabled L1 Sub-State supported from root port 29 L1 Sub-State Support = 0xa CommonModeRestoreTime = 0x78 Power On Value = 0x16, Power On Scale = 0x0 ASPM: Enabled L1 PCIe: Max_Payload_Size adjusted to 128 PCI: 84:00.0: Enabled LTR PCI: 84:00.0: Programmed LTR max latencies scan_bus: bus PCI: 00:1d.0 finished in 38 msecs PCI: 00:1e.3 scanning... scan_generic_bus for PCI: 00:1e.3 scan_generic_bus for PCI: 00:1e.3 done scan_bus: bus PCI: 00:1e.3 finished in 7 msecs PCI: 00:1f.0 scanning... scan_static_bus for PCI: 00:1f.0 PNP: 0c09.0 enabled PNP: 0c09.0 scanning... scan_static_bus for PNP: 0c09.0 scan_static_bus for PNP: 0c09.0 done scan_bus: bus PNP: 0c09.0 finished in 6 msecs scan_static_bus for PCI: 00:1f.0 done scan_bus: bus PCI: 00:1f.0 finished in 23 msecs PCI: 00:1f.2 scanning... scan_static_bus for PCI: 00:1f.2 GENERIC: 0.0 enabled GENERIC: 0.0 scanning... scan_static_bus for GENERIC: 0.0 GENERIC: 0.0 enabled GENERIC: 1.0 enabled scan_static_bus for GENERIC: 0.0 done scan_bus: bus GENERIC: 0.0 finished in 11 msecs scan_static_bus for PCI: 00:1f.2 done scan_bus: bus PCI: 00:1f.2 finished in 28 msecs PCI: 00:1f.3 scanning... scan_static_bus for PCI: 00:1f.3 scan_static_bus for PCI: 00:1f.3 done scan_bus: bus PCI: 00:1f.3 finished in 7 msecs PCI: 00:1f.4 scanning... scan_generic_bus for PCI: 00:1f.4 scan_generic_bus for PCI: 00:1f.4 done scan_bus: bus PCI: 00:1f.4 finished in 7 msecs PCI: 00:1f.5 scanning... scan_generic_bus for PCI: 00:1f.5 scan_generic_bus for PCI: 00:1f.5 done scan_bus: bus PCI: 00:1f.5 finished in 7 msecs scan_bus: bus DOMAIN: 0000 finished in 990 msecs scan_static_bus for Root Device done scan_bus: bus Root Device finished in 1009 msecs done BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes) SF: Detected 00 0000 with sector size 0x1000, total 0x2000000 SPI flash protection: WPSW=0 SRP0=1 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000 PCI: 00:04.0 read_resources bus 1 link: 0 PCI: 00:04.0 read_resources bus 1 link: 0 done PCI: 00:07.0 read_resources bus 1 link: 0 PCI: 00:07.0 read_resources bus 1 link: 0 done PCI: 00:07.1 read_resources bus 44 link: 0 PCI: 00:07.1 read_resources bus 44 link: 0 done PCI: 00:07.2 read_resources bus 87 link: 0 PCI: 00:07.2 read_resources bus 87 link: 0 done PCI: 00:0d.0 read_resources bus 0 link: 0 USB0 port 0 read_resources bus 0 link: 0 USB0 port 0 read_resources bus 0 link: 0 done PCI: 00:0d.0 read_resources bus 0 link: 0 done PCI: 00:0d.2 read_resources bus 2 link: 0 PCI: 00:0d.2 read_resources bus 2 link: 0 done PCI: 00:0d.3 read_resources bus 3 link: 0 PCI: 00:0d.3 read_resources bus 3 link: 0 done PCI: 00:14.0 read_resources bus 0 link: 0 USB0 port 0 read_resources bus 0 link: 0 USB0 port 0 read_resources bus 0 link: 0 done PCI: 00:14.0 read_resources bus 0 link: 0 done PCI: 00:14.3 read_resources bus 0 link: 0 PCI: 00:14.3 read_resources bus 0 link: 0 done PCI: 00:15.0 read_resources bus 0 link: 0 PCI: 00:15.0 read_resources bus 0 link: 0 done PCI: 00:15.1 read_resources bus 0 link: 0 PCI: 00:15.1 read_resources bus 0 link: 0 done PCI: 00:1c.0 read_resources bus 130 link: 0 PCI: 00:1c.0 read_resources bus 130 link: 0 done PCI: 00:1c.7 read_resources bus 131 link: 0 PCI: 00:1c.7 read_resources bus 131 link: 0 done PCI: 00:1d.0 read_resources bus 132 link: 0 PCI: 00:1d.0 read_resources bus 132 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.2 read_resources bus 0 link: 0 GENERIC: 0.0 read_resources bus 0 link: 0 GENERIC: 0.0 read_resources bus 0 link: 0 done PCI: 00:1f.2 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 12 APIC: 14 APIC: 16 APIC: 10 DOMAIN: 0000 child on link 0 GPIO: 0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100 GPIO: 0 PCI: 00:00.0 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:04.0 child on link 0 GENERIC: 0.0 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 GENERIC: 0.0 PCI: 00:07.0 child on link 0 GENERIC: 0.0 PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 GENERIC: 0.0 NONE NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:07.1 child on link 0 GENERIC: 1.0 PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 GENERIC: 1.0 NONE NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:07.2 child on link 0 GENERIC: 0.0 PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 GENERIC: 0.0 NONE NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:08.0 PCI: 00:0a.0 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:0d.0 child on link 0 USB0 port 0 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 USB0 port 0 child on link 0 USB3 port 0 USB3 port 0 USB3 port 1 USB3 port 2 USB3 port 3 PCI: 00:0d.2 child on link 0 GENERIC: 0.0 PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10 PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 GENERIC: 0.0 PCI: 00:0d.3 child on link 0 GENERIC: 0.0 PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10 PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 GENERIC: 0.0 PCI: 00:14.0 child on link 0 USB0 port 0 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 USB0 port 0 child on link 0 USB2 port 0 USB2 port 0 USB2 port 1 USB2 port 2 USB2 port 3 USB2 port 4 USB2 port 5 USB2 port 6 USB2 port 7 USB2 port 8 USB2 port 9 USB3 port 0 USB3 port 1 USB3 port 2 USB3 port 3 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 PCI: 00:14.3 child on link 0 GENERIC: 0.0 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 GENERIC: 0.0 PCI: 00:15.0 child on link 0 I2C: 00:1a PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 I2C: 00:1a PCI: 00:15.1 child on link 0 I2C: 00:50 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 I2C: 00:50 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.0 child on link 0 PCI: 82:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 82:00.0 PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20 PCI: 00:1c.7 child on link 0 GENERIC: 0.0 PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 GENERIC: 0.0 PCI: 83:00.0 PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:1d.0 child on link 0 GENERIC: 0.0 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 GENERIC: 0.0 PCI: 84:00.0 PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1e.0 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10 PCI: 00:1e.3 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.0 child on link 0 PNP: 0c09.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PNP: 0c09.0 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.2 child on link 0 GENERIC: 0.0 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1 GENERIC: 0.0 child on link 0 GENERIC: 0.0 GENERIC: 0.0 GENERIC: 1.0 PCI: 00:1f.3 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20 PCI: 00:1f.4 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 PCI: 00:1f.5 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff NONE 18 * [0x0 - 0x1fff] io PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff NONE 10 * [0x0 - 0xc1fffff] mem PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff NONE 14 * [0x0 - 0x1bffffff] prefmem PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff NONE 18 * [0x0 - 0x1fff] io PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff NONE 10 * [0x0 - 0xc1fffff] mem PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff NONE 14 * [0x0 - 0x1bffffff] prefmem PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff NONE 18 * [0x0 - 0x1fff] io PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff NONE 10 * [0x0 - 0xc1fffff] mem PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff NONE 14 * [0x0 - 0x1bffffff] prefmem PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 82:00.0 10 * [0x0 - 0xff] io PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 82:00.0 20 * [0x0 - 0x3fff] mem PCI: 82:00.0 18 * [0x4000 - 0x4fff] mem PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 83:00.0 10 * [0x0 - 0xfff] mem PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 84:00.0 10 * [0x0 - 0x3fff] mem PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed) update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed) update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed) DOMAIN: 0000: Resource ranges: * Base: 1000, Size: 800, Tag: 100 * Base: 1900, Size: d6a0, Tag: 100 * Base: efc0, Size: 1040, Tag: 100 PCI: 00:07.0 1c * [0x2000 - 0x3fff] limit: 3fff io PCI: 00:07.1 1c * [0x4000 - 0x5fff] limit: 5fff io PCI: 00:07.2 1c * [0x6000 - 0x7fff] limit: 7fff io PCI: 00:1c.0 1c * [0x8000 - 0x8fff] limit: 8fff io PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed) update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed) update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed) update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed) update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed) update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed) update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed) update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed) update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed) update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed) update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed) update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed) update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed) update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed) update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed) update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed) update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed) update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed) update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed) update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed) update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed) update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed) update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed) update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed) update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed) update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed) update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed) update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed) update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed) update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed) DOMAIN: 0000: Resource ranges: * Base: 80400000, Size: 3fc00000, Tag: 200 * Base: d0000000, Size: 28000000, Tag: 200 * Base: fa000000, Size: 1000000, Tag: 200 * Base: fb001000, Size: 17ff000, Tag: 200 * Base: fe800000, Size: 300000, Tag: 200 * Base: feb80000, Size: 80000, Tag: 200 * Base: fed00000, Size: 40000, Tag: 200 * Base: fed70000, Size: 10000, Tag: 200 * Base: fed88000, Size: 8000, Tag: 200 * Base: fed93000, Size: d000, Tag: 200 * Base: feda2000, Size: 1e000, Tag: 200 * Base: fede0000, Size: 1220000, Tag: 200 * Base: 17fc00000, Size: 7e80400000, Tag: 100200 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem PCI: 00:07.0 20 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem PCI: 00:07.1 20 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem PCI: 00:07.2 20 * [0xac200000 - 0xb83fffff] limit: b83fffff mem PCI: 00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem PCI: 00:1c.7 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem PCI: 00:1d.0 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem PCI: 00:1f.3 20 * [0x80700000 - 0x807fffff] limit: 807fffff mem PCI: 00:0d.2 10 * [0x80800000 - 0x8083ffff] limit: 8083ffff mem PCI: 00:0d.3 10 * [0x80840000 - 0x8087ffff] limit: 8087ffff mem PCI: 00:04.0 10 * [0x80880000 - 0x8089ffff] limit: 8089ffff mem PCI: 00:0d.0 10 * [0x808a0000 - 0x808affff] limit: 808affff mem PCI: 00:14.0 10 * [0x808b0000 - 0x808bffff] limit: 808bffff mem PCI: 00:0a.0 10 * [0x808c0000 - 0x808c7fff] limit: 808c7fff mem PCI: 00:14.2 10 * [0x808c8000 - 0x808cbfff] limit: 808cbfff mem PCI: 00:14.3 10 * [0x808cc000 - 0x808cffff] limit: 808cffff mem PCI: 00:1f.3 10 * [0x808d0000 - 0x808d3fff] limit: 808d3fff mem PCI: 00:0d.2 18 * [0x808d4000 - 0x808d4fff] limit: 808d4fff mem PCI: 00:0d.3 18 * [0x808d5000 - 0x808d5fff] limit: 808d5fff mem PCI: 00:14.2 18 * [0x808d6000 - 0x808d6fff] limit: 808d6fff mem PCI: 00:15.0 10 * [0x808d7000 - 0x808d7fff] limit: 808d7fff mem PCI: 00:15.1 10 * [0x808d8000 - 0x808d8fff] limit: 808d8fff mem PCI: 00:16.0 10 * [0x808d9000 - 0x808d9fff] limit: 808d9fff mem PCI: 00:1e.3 10 * [0x808da000 - 0x808dafff] limit: 808dafff mem PCI: 00:1f.5 10 * [0x808db000 - 0x808dbfff] limit: 808dbfff mem PCI: 00:1f.4 10 * [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem PCI: 00:07.0 24 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem PCI: 00:07.1 24 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem PCI: 00:07.2 24 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff PCI: 00:07.0: Resource ranges: * Base: 2000, Size: 2000, Tag: 100 NONE 18 * [0x2000 - 0x3fff] limit: 3fff io PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff PCI: 00:07.0: Resource ranges: * Base: 17fc00000, Size: 1c000000, Tag: 1200 NONE 14 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff PCI: 00:07.0: Resource ranges: * Base: 82000000, Size: c200000, Tag: 200 NONE 10 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff PCI: 00:07.1: Resource ranges: * Base: 4000, Size: 2000, Tag: 100 NONE 18 * [0x4000 - 0x5fff] limit: 5fff io PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff PCI: 00:07.1: Resource ranges: * Base: 19bc00000, Size: 1c000000, Tag: 1200 NONE 14 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff PCI: 00:07.1: Resource ranges: * Base: a0000000, Size: c200000, Tag: 200 NONE 10 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff PCI: 00:07.2: Resource ranges: * Base: 6000, Size: 2000, Tag: 100 NONE 18 * [0x6000 - 0x7fff] limit: 7fff io PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff PCI: 00:07.2: Resource ranges: * Base: 1b7c00000, Size: 1c000000, Tag: 1200 NONE 14 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff PCI: 00:07.2: Resource ranges: * Base: ac200000, Size: c200000, Tag: 200 NONE 10 * [0xac200000 - 0xb83fffff] limit: b83fffff mem PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff PCI: 00:1c.0: Resource ranges: * Base: 8000, Size: 1000, Tag: 100 PCI: 82:00.0 10 * [0x8000 - 0x80ff] limit: 80ff io PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff PCI: 00:1c.0: Resource ranges: * Base: 80400000, Size: 100000, Tag: 200 PCI: 82:00.0 20 * [0x80400000 - 0x80403fff] limit: 80403fff mem PCI: 82:00.0 18 * [0x80404000 - 0x80404fff] limit: 80404fff mem PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff PCI: 00:1c.7: Resource ranges: * Base: 80500000, Size: 100000, Tag: 200 PCI: 83:00.0 10 * [0x80500000 - 0x80500fff] limit: 80500fff mem PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff PCI: 00:1d.0: Resource ranges: * Base: 80600000, Size: 100000, Tag: 200 PCI: 84:00.0 10 * [0x80600000 - 0x80603fff] limit: 80603fff mem PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done === Resource allocator: DOMAIN: 0000 - resource allocation complete === Root Device assign_resources, bus 0 link: 0 DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64 PCI: 00:04.0 assign_resources, bus 1 link: 0 PCI: 00:04.0 assign_resources, bus 1 link: 0 done PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem PCI: 00:07.0 assign_resources, bus 1 link: 0 PCI: 00:07.0 assign_resources, bus 1 link: 0 done PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem PCI: 00:07.1 assign_resources, bus 44 link: 0 PCI: 00:07.1 assign_resources, bus 44 link: 0 done PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem PCI: 00:07.2 assign_resources, bus 87 link: 0 PCI: 00:07.2 assign_resources, bus 87 link: 0 done PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64 PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64 PCI: 00:0d.0 assign_resources, bus 0 link: 0 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64 PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64 PCI: 00:0d.2 assign_resources, bus 2 link: 0 PCI: 00:0d.2 assign_resources, bus 2 link: 0 done PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64 PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64 PCI: 00:0d.3 assign_resources, bus 3 link: 0 PCI: 00:0d.3 assign_resources, bus 3 link: 0 done PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64 PCI: 00:14.0 assign_resources, bus 0 link: 0 PCI: 00:14.0 assign_resources, bus 0 link: 0 done PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64 PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.3 assign_resources, bus 0 link: 0 PCI: 00:14.3 assign_resources, bus 0 link: 0 done PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64 PCI: 00:15.0 assign_resources, bus 0 link: 0 PCI: 00:15.0 assign_resources, bus 0 link: 0 done PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64 PCI: 00:15.1 assign_resources, bus 0 link: 0 PCI: 00:15.1 assign_resources, bus 0 link: 0 done PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64 PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem PCI: 00:1c.0 assign_resources, bus 130 link: 0 PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64 PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 assign_resources, bus 130 link: 0 done PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem PCI: 00:1c.7 assign_resources, bus 131 link: 0 PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem PCI: 00:1c.7 assign_resources, bus 131 link: 0 done PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem PCI: 00:1d.0 assign_resources, bus 132 link: 0 PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1d.0 assign_resources, bus 132 link: 0 done PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64 PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done LPC: Trying to open IO window from 800 size 1ff PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64 PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem DOMAIN: 0000 assign_resources, bus 0 link: 0 done Root Device assign_resources, bus 0 link: 0 done Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 12 APIC: 14 APIC: 16 APIC: 10 DOMAIN: 0000 child on link 0 GPIO: 0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100 GPIO: 0 PCI: 00:00.0 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b PCI: 00:02.0 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20 PCI: 00:04.0 child on link 0 GENERIC: 0.0 PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10 GENERIC: 0.0 PCI: 00:07.0 child on link 0 GENERIC: 0.0 PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24 PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20 GENERIC: 0.0 NONE NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10 NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14 NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18 PCI: 00:07.1 child on link 0 GENERIC: 1.0 PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20 GENERIC: 1.0 NONE NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10 NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14 NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18 PCI: 00:07.2 child on link 0 GENERIC: 0.0 PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20 GENERIC: 0.0 NONE NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10 NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14 NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18 PCI: 00:08.0 PCI: 00:0a.0 PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10 PCI: 00:0d.0 child on link 0 USB0 port 0 PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10 USB0 port 0 child on link 0 USB3 port 0 USB3 port 0 USB3 port 1 USB3 port 2 USB3 port 3 PCI: 00:0d.2 child on link 0 GENERIC: 0.0 PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10 PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18 GENERIC: 0.0 PCI: 00:0d.3 child on link 0 GENERIC: 0.0 PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10 PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18 GENERIC: 0.0 PCI: 00:14.0 child on link 0 USB0 port 0 PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10 USB0 port 0 child on link 0 USB2 port 0 USB2 port 0 USB2 port 1 USB2 port 2 USB2 port 3 USB2 port 4 USB2 port 5 USB2 port 6 USB2 port 7 USB2 port 8 USB2 port 9 USB3 port 0 USB3 port 1 USB3 port 2 USB3 port 3 PCI: 00:14.2 PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10 PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18 PCI: 00:14.3 child on link 0 GENERIC: 0.0 PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10 GENERIC: 0.0 PCI: 00:15.0 child on link 0 I2C: 00:1a PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10 I2C: 00:1a PCI: 00:15.1 child on link 0 I2C: 00:50 PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10 I2C: 00:50 PCI: 00:16.0 PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10 PCI: 00:1c.0 child on link 0 PCI: 82:00.0 PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20 PCI: 82:00.0 PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10 PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18 PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20 PCI: 00:1c.7 child on link 0 GENERIC: 0.0 PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20 GENERIC: 0.0 PCI: 83:00.0 PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10 PCI: 00:1d.0 child on link 0 GENERIC: 0.0 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20 GENERIC: 0.0 PCI: 84:00.0 PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10 PCI: 00:1e.0 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10 PCI: 00:1e.3 PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10 PCI: 00:1f.0 child on link 0 PNP: 0c09.0 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 PNP: 0c09.0 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0 PCI: 00:1f.2 child on link 0 GENERIC: 0.0 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1 GENERIC: 0.0 child on link 0 GENERIC: 0.0 GENERIC: 0.0 GENERIC: 1.0 PCI: 00:1f.3 PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10 PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20 PCI: 00:1f.4 PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 PCI: 00:1f.5 PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10 Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 5 / 4328 ms coreboot skipped calling FSP notify phase: 00000020. fw_config match found: AUDIO=NAU88L25B_I2S BT offload enabled over I2S with NAU88L25B BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms Enabling resources... PCI: 00:00.0 subsystem <- 8086/4619 PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 8086/46b3 PCI: 00:02.0 cmd <- 03 PCI: 00:04.0 subsystem <- 8086/461d PCI: 00:04.0 cmd <- 02 PCI: 00:07.0 bridge ctrl <- 0013 PCI: 00:07.0 cmd <- 07 PCI: 00:07.1 bridge ctrl <- 0013 PCI: 00:07.1 cmd <- 07 PCI: 00:07.2 bridge ctrl <- 0013 PCI: 00:07.2 cmd <- 07 PCI: 00:0a.0 subsystem <- 8086/467d PCI: 00:0a.0 cmd <- 02 PCI: 00:0d.0 subsystem <- 8086/461e PCI: 00:0d.0 cmd <- 02 PCI: 00:0d.2 subsystem <- 8086/463e PCI: 00:0d.2 cmd <- 02 PCI: 00:0d.3 subsystem <- 8086/466d PCI: 00:0d.3 cmd <- 02 PCI: 00:14.0 subsystem <- 8086/51ed PCI: 00:14.0 cmd <- 02 PCI: 00:14.2 subsystem <- 8086/51ef PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 8086/51f0 PCI: 00:14.3 cmd <- 02 PCI: 00:15.0 subsystem <- 8086/51e8 PCI: 00:15.0 cmd <- 02 PCI: 00:15.1 subsystem <- 8086/51e9 PCI: 00:15.1 cmd <- 06 PCI: 00:16.0 subsystem <- 8086/51e0 PCI: 00:16.0 cmd <- 02 PCI: 00:1c.0 bridge ctrl <- 0013 PCI: 00:1c.0 subsystem <- 8086/51be PCI: 00:1c.0 cmd <- 07 PCI: 00:1c.7 bridge ctrl <- 0013 PCI: 00:1c.7 subsystem <- 8086/51bf PCI: 00:1c.7 cmd <- 06 PCI: 00:1d.0 bridge ctrl <- 0013 PCI: 00:1d.0 subsystem <- 8086/51b3 PCI: 00:1d.0 cmd <- 06 PCI: 00:1e.0 subsystem <- 8086/51a8 PCI: 00:1e.0 cmd <- 06 PCI: 00:1e.3 subsystem <- 8086/51ab PCI: 00:1e.3 cmd <- 02 PCI: 00:1f.0 subsystem <- 8086/5182 PCI: 00:1f.0 cmd <- 407 PCI: 00:1f.3 subsystem <- 8086/51c8 PCI: 00:1f.3 cmd <- 02 PCI: 00:1f.4 subsystem <- 8086/51a3 PCI: 00:1f.4 cmd <- 03 PCI: 00:1f.5 subsystem <- 8086/51a4 PCI: 00:1f.5 cmd <- 406 PCI: 82:00.0 cmd <- 03 PCI: 83:00.0 cmd <- 06 PCI: 84:00.0 cmd <- 02 done. BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms ME: Version: Unavailable BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms Initializing devices... Root Device init mainboard: EC init Chrome EC: Set SMI mask to 0x0000000000000000 Chrome EC: UHEPI supported Chrome EC: clear events_b mask to 0x0000000000000000 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004 Chrome EC: Set WAKE mask to 0x0000000000000000 Root Device init finished in 39 msecs PCI: 00:00.0 init CPU TDP = 15 Watts CPU PL1 = 55 Watts CPU PL2 = 55 Watts CPU PsysPL2 = 90 Watts CPU PL4 = 123 Watts PCI: 00:00.0 init finished in 10 msecs PCI: 00:02.0 init GMA: Found VBT in CBFS GMA: Found valid VBT in CBFS Graphics hand-off block not found PCI: 00:02.0 init finished in 8 msecs PCI: 00:0a.0 init PCI: 00:0a.0 init finished in 0 msecs PCI: 00:14.0 init PCI: 00:14.0 init finished in 0 msecs PCI: 00:14.2 init PCI: 00:14.2 init finished in 0 msecs PCI: 00:15.0 init I2C bus 0 version 0x3230302a DW I2C bus 0 at 0x808d7000 (400 KHz) PCI: 00:15.0 init finished in 6 msecs PCI: 00:15.1 init I2C bus 1 version 0x3230302a DW I2C bus 1 at 0x808d8000 (400 KHz) PCI: 00:15.1 init finished in 6 msecs PCI: 00:16.0 init PCI: 00:16.0 init finished in 0 msecs PCI: 00:1c.0 init Initializing PCH PCIe bridge. PCI: 00:1c.0 init finished in 3 msecs PCI: 00:1c.7 init Initializing PCH PCIe bridge. PCI: 00:1c.7 init finished in 3 msecs PCI: 00:1d.0 init Initializing PCH PCIe bridge. PCI: 00:1d.0 init finished in 3 msecs PCI: 00:1f.0 init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00770020 reg 0x0002: 0x00000000 IOAPIC: 120 interrupts IOAPIC: Clearing IOAPIC at 0xfec00000 IOAPIC: vector 0x00 value 0x00000000 0x00010000 IOAPIC: vector 0x01 value 0x00000000 0x00010000 IOAPIC: vector 0x02 value 0x00000000 0x00010000 IOAPIC: vector 0x03 value 0x00000000 0x00010000 IOAPIC: vector 0x04 value 0x00000000 0x00010000 IOAPIC: vector 0x05 value 0x00000000 0x00010000 IOAPIC: vector 0x06 value 0x00000000 0x00010000 IOAPIC: vector 0x07 value 0x00000000 0x00010000 IOAPIC: vector 0x08 value 0x00000000 0x00010000 IOAPIC: vector 0x09 value 0x00000000 0x00010000 IOAPIC: vector 0x0a value 0x00000000 0x00010000 IOAPIC: vector 0x0b value 0x00000000 0x00010000 IOAPIC: vector 0x0c value 0x00000000 0x00010000 IOAPIC: vector 0x0d value 0x00000000 0x00010000 IOAPIC: vector 0x0e value 0x00000000 0x00010000 IOAPIC: vector 0x0f value 0x00000000 0x00010000 IOAPIC: vector 0x10 value 0x00000000 0x00010000 IOAPIC: vector 0x11 value 0x00000000 0x00010000 IOAPIC: vector 0x12 value 0x00000000 0x00010000 IOAPIC: vector 0x13 value 0x00000000 0x00010000 IOAPIC: vector 0x14 value 0x00000000 0x00010000 IOAPIC: vector 0x15 value 0x00000000 0x00010000 IOAPIC: vector 0x16 value 0x00000000 0x00010000 IOAPIC: vector 0x17 value 0x00000000 0x00010000 IOAPIC: vector 0x18 value 0x00000000 0x00010000 IOAPIC: vector 0x19 value 0x00000000 0x00010000 IOAPIC: vector 0x1a value 0x00000000 0x00010000 IOAPIC: vector 0x1b value 0x00000000 0x00010000 IOAPIC: vector 0x1c value 0x00000000 0x00010000 IOAPIC: vector 0x1d value 0x00000000 0x00010000 IOAPIC: vector 0x1e value 0x00000000 0x00010000 IOAPIC: vector 0x1f value 0x00000000 0x00010000 IOAPIC: vector 0x20 value 0x00000000 0x00010000 IOAPIC: vector 0x21 value 0x00000000 0x00010000 IOAPIC: vector 0x22 value 0x00000000 0x00010000 IOAPIC: vector 0x23 value 0x00000000 0x00010000 IOAPIC: vector 0x24 value 0x00000000 0x00010000 IOAPIC: vector 0x25 value 0x00000000 0x00010000 IOAPIC: vector 0x26 value 0x00000000 0x00010000 IOAPIC: vector 0x27 value 0x00000000 0x00010000 IOAPIC: vector 0x28 value 0x00000000 0x00010000 IOAPIC: vector 0x29 value 0x00000000 0x00010000 IOAPIC: vector 0x2a value 0x00000000 0x00010000 IOAPIC: vector 0x2b value 0x00000000 0x00010000 IOAPIC: vector 0x2c value 0x00000000 0x00010000 IOAPIC: vector 0x2d value 0x00000000 0x00010000 IOAPIC: vector 0x2e value 0x00000000 0x00010000 IOAPIC: vector 0x2f value 0x00000000 0x00010000 IOAPIC: vector 0x30 value 0x00000000 0x00010000 IOAPIC: vector 0x31 value 0x00000000 0x00010000 IOAPIC: vector 0x32 value 0x00000000 0x00010000 IOAPIC: vector 0x33 value 0x00000000 0x00010000 IOAPIC: vector 0x34 value 0x00000000 0x00010000 IOAPIC: vector 0x35 value 0x00000000 0x00010000 IOAPIC: vector 0x36 value 0x00000000 0x00010000 IOAPIC: vector 0x37 value 0x00000000 0x00010000 IOAPIC: vector 0x38 value 0x00000000 0x00010000 IOAPIC: vector 0x39 value 0x00000000 0x00010000 IOAPIC: vector 0x3a value 0x00000000 0x00010000 IOAPIC: vector 0x3b value 0x00000000 0x00010000 IOAPIC: vector 0x3c value 0x00000000 0x00010000 IOAPIC: vector 0x3d value 0x00000000 0x00010000 IOAPIC: vector 0x3e value 0x00000000 0x00010000 IOAPIC: vector 0x3f value 0x00000000 0x00010000 IOAPIC: vector 0x40 value 0x00000000 0x00010000 IOAPIC: vector 0x41 value 0x00000000 0x00010000 IOAPIC: vector 0x42 value 0x00000000 0x00010000 IOAPIC: vector 0x43 value 0x00000000 0x00010000 IOAPIC: vector 0x44 value 0x00000000 0x00010000 IOAPIC: vector 0x45 value 0x00000000 0x00010000 IOAPIC: vector 0x46 value 0x00000000 0x00010000 IOAPIC: vector 0x47 value 0x00000000 0x00010000 IOAPIC: vector 0x48 value 0x00000000 0x00010000 IOAPIC: vector 0x49 value 0x00000000 0x00010000 IOAPIC: vector 0x4a value 0x00000000 0x00010000 IOAPIC: vector 0x4b value 0x00000000 0x00010000 IOAPIC: vector 0x4c value 0x00000000 0x00010000 IOAPIC: vector 0x4d value 0x00000000 0x00010000 IOAPIC: vector 0x4e value 0x00000000 0x00010000 IOAPIC: vector 0x4f value 0x00000000 0x00010000 IOAPIC: vector 0x50 value 0x00000000 0x00010000 IOAPIC: vector 0x51 value 0x00000000 0x00010000 IOAPIC: vector 0x52 value 0x00000000 0x00010000 IOAPIC: vector 0x53 value 0x00000000 0x00010000 IOAPIC: vector 0x54 value 0x00000000 0x00010000 IOAPIC: vector 0x55 value 0x00000000 0x00010000 IOAPIC: vector 0x56 value 0x00000000 0x00010000 IOAPIC: vector 0x57 value 0x00000000 0x00010000 IOAPIC: vector 0x58 value 0x00000000 0x00010000 IOAPIC: vector 0x59 value 0x00000000 0x00010000 IOAPIC: vector 0x5a value 0x00000000 0x00010000 IOAPIC: vector 0x5b value 0x00000000 0x00010000 IOAPIC: vector 0x5c value 0x00000000 0x00010000 IOAPIC: vector 0x5d value 0x00000000 0x00010000 IOAPIC: vector 0x5e value 0x00000000 0x00010000 IOAPIC: vector 0x5f value 0x00000000 0x00010000 IOAPIC: vector 0x60 value 0x00000000 0x00010000 IOAPIC: vector 0x61 value 0x00000000 0x00010000 IOAPIC: vector 0x62 value 0x00000000 0x00010000 IOAPIC: vector 0x63 value 0x00000000 0x00010000 IOAPIC: vector 0x64 value 0x00000000 0x00010000 IOAPIC: vector 0x65 value 0x00000000 0x00010000 IOAPIC: vector 0x66 value 0x00000000 0x00010000 IOAPIC: vector 0x67 value 0x00000000 0x00010000 IOAPIC: vector 0x68 value 0x00000000 0x00010000 IOAPIC: vector 0x69 value 0x00000000 0x00010000 IOAPIC: vector 0x6a value 0x00000000 0x00010000 IOAPIC: vector 0x6b value 0x00000000 0x00010000 IOAPIC: vector 0x6c value 0x00000000 0x00010000 IOAPIC: vector 0x6d value 0x00000000 0x00010000 IOAPIC: vector 0x6e value 0x00000000 0x00010000 IOAPIC: vector 0x6f value 0x00000000 0x00010000 IOAPIC: vector 0x70 value 0x00000000 0x00010000 IOAPIC: vector 0x71 value 0x00000000 0x00010000 IOAPIC: vector 0x72 value 0x00000000 0x00010000 IOAPIC: vector 0x73 value 0x00000000 0x00010000 IOAPIC: vector 0x74 value 0x00000000 0x00010000 IOAPIC: vector 0x75 value 0x00000000 0x00010000 IOAPIC: vector 0x76 value 0x00000000 0x00010000 IOAPIC: vector 0x77 value 0x00000000 0x00010000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: vector 0x00 value 0x00000000 0x00000700 PCI: 00:1f.0 init finished in 606 msecs PCI: 00:1f.2 init apm_control: Disabling ACPI. APMC done. PCI: 00:1f.2 init finished in 6 msecs PCI: 00:1f.3 init PCI: 00:1f.3 init finished in 0 msecs PCI: 00:1f.4 init PCI: 00:1f.4 init finished in 0 msecs PCI: 82:00.0 init FMAP: area RO_VPD found @ 1800000 (16384 bytes) Located 'ethernet_mac0' in VPD r8168: Resetting NIC...done r8168: Programming MAC Address...done r8168: Customized LED 0x482 r8168: read back LED setting as 0x482 PCI: 82:00.0 init finished in 21 msecs PCI: 83:00.0 init PCI: 83:00.0 init finished in 0 msecs PCI: 84:00.0 init PCI: 84:00.0 init finished in 0 msecs PNP: 0c09.0 init Google Chrome EC uptime: 13.435 seconds Google Chrome AP resets since EC boot: 1 Google Chrome most recent AP reset causes: 0.311: 32775 shutdown: entering G3 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump PNP: 0c09.0 init finished in 23 msecs GENERIC: 0.0 init GENERIC: 0.0 init finished in 0 msecs GENERIC: 1.0 init GENERIC: 1.0 init finished in 0 msecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 DOMAIN: 0000: enabled 1 GPIO: 0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:01.1: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:06.2: enabled 0 PCI: 00:07.0: enabled 1 PCI: 00:07.1: enabled 1 PCI: 00:07.2: enabled 1 PCI: 00:07.3: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 0 PCI: 00:0a.0: enabled 1 PCI: 00:0d.0: enabled 1 PCI: 00:0d.1: enabled 0 PCI: 00:0d.2: enabled 1 PCI: 00:0d.3: enabled 1 PCI: 00:0e.0: enabled 0 PCI: 00:10.0: enabled 0 PCI: 00:10.1: enabled 0 PCI: 00:10.6: enabled 0 PCI: 00:10.7: enabled 0 PCI: 00:12.0: enabled 0 PCI: 00:12.6: enabled 0 PCI: 00:12.7: enabled 0 PCI: 00:13.0: enabled 0 PCI: 00:14.0: enabled 1 PCI: 00:14.1: enabled 0 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PCI: 00:15.0: enabled 1 PCI: 00:15.1: enabled 1 PCI: 00:15.2: enabled 0 PCI: 00:15.3: enabled 0 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:16.4: enabled 0 PCI: 00:16.5: enabled 0 PCI: 00:17.0: enabled 0 PCI: 00:19.0: enabled 0 PCI: 00:19.1: enabled 0 PCI: 00:19.2: enabled 0 PCI: 00:1a.0: enabled 0 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 0 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:1c.7: enabled 1 PCI: 00:1d.0: enabled 0 PCI: 00:1d.1: enabled 0 PCI: 00:1d.2: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 1 PCI: 00:1e.1: enabled 0 PCI: 00:1e.2: enabled 0 PCI: 00:1e.3: enabled 1 PCI: 00:1f.0: enabled 1 PCI: 00:1f.1: enabled 0 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 PCI: 00:1f.4: enabled 1 PCI: 00:1f.5: enabled 1 PCI: 00:1f.6: enabled 0 PCI: 00:1f.7: enabled 0 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 USB0 port 0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 USB0 port 0: enabled 1 GENERIC: 0.0: enabled 1 I2C: 00:1a: enabled 1 I2C: 00:50: enabled 1 PCI: 00:00.0: enabled 1 PCI: 82:00.0: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 0.0: enabled 1 PNP: 0c09.0: enabled 1 GENERIC: 0.0: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 0 USB3 port 2: enabled 1 USB3 port 3: enabled 0 USB2 port 0: enabled 1 USB2 port 1: enabled 0 USB2 port 2: enabled 1 USB2 port 3: enabled 1 USB2 port 4: enabled 1 USB2 port 5: enabled 1 USB2 port 6: enabled 1 USB2 port 7: enabled 1 USB2 port 8: enabled 0 USB2 port 9: enabled 1 USB3 port 0: enabled 1 USB3 port 1: enabled 1 USB3 port 2: enabled 1 USB3 port 3: enabled 1 GENERIC: 0.0: enabled 1 GENERIC: 1.0: enabled 1 APIC: 00: enabled 1 APIC: 12: enabled 1 APIC: 14: enabled 1 APIC: 16: enabled 1 APIC: 10: enabled 1 NONE: enabled 1 NONE: enabled 1 NONE: enabled 1 PCI: 83:00.0: enabled 1 PCI: 84:00.0: enabled 1 BS: BS_DEV_INIT run times (exec / console): 9 / 1157 ms FMAP: area RW_ELOG found @ f20000 (16384 bytes) ELOG: NV offset 0xf20000 size 0x4000 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024 ELOG: Event(17) added with size 13 at 2023-12-28 20:25:20 UTC ELOG: Event(9E) added with size 10 at 2023-12-28 20:25:20 UTC ELOG: Event(9F) added with size 14 at 2023-12-28 20:25:20 UTC BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms ELOG: Event(A0) added with size 9 at 2023-12-28 20:25:20 UTC elog_add_boot_reason: Logged dev mode boot BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms Finalize devices... PCI: 00:16.0 final CSE RW Firmware Version: 16.1.25.2049 PCI: 00:1f.2 final PCI: 00:1f.4 final GENERIC: 0.0 final added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0 GENERIC: 1.0 final added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0 Devices finalized BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms FMAP: area RW_NVRAM found @ f2b000 (24576 bytes) BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms ME: HFSTS1 : 0x90000245 ME: HFSTS2 : 0x32850116 ME: HFSTS3 : 0x00000050 ME: HFSTS4 : 0x00004000 ME: HFSTS5 : 0x00000000 ME: HFSTS6 : 0x40600006 ME: Manufacturing Mode : NO ME: SPI Protection Mode Enabled : YES ME: FPFs Committed : YES ME: Manufacturing Vars Locked : YES ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: D0i3 Support : YES ME: Low Power State Enabled : NO ME: CPU Replaced : YES ME: CPU Replacement Valid : YES ME: Current Working State : 5 ME: Current Operation State : 1 ME: Current Operation Mode : 0 ME: Error Code : 0 ME: Enhanced Debug Mode : NO ME: CPU Debug Disabled : YES ME: TXT Support : NO ME: WP for RO is enabled : YES ME: RO write protection scope - Start=0x1000, End=0x1A6FFF BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms Ramoops buffer: 0x100000@0x76898000. BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7686c000. ACPI: * FACS ACPI: * DSDT PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000 ACPI: * FADT SCI is IRQ9 ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 5/5 physical/logical core(s) each. \_SB.PCI0.PEPD: Intel Power Engine Plug-in \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2 \_SB.DPTF: Intel DPTF at GENERIC: 0.0 \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0 \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1 \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2 USB Type-C 0 mapped to EC port 0 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0 \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0 USB Type-C 2 mapped to EC port 1 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0 \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0 \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3) \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3) \_SB.PCI0.RP09: Added StorageD3Enable property EC returned error result code 1 PS2K: Bad resp from EC. Vivaldi disabled! \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3 \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5 \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6 \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TPM2 TPM2 log created at 0x7685c000 ACPI: added table 4/32, length now 52 ACPI: * LPIT ACPI: added table 5/32, length now 56 ACPI: * MADT SCI is IRQ9 ACPI: added table 6/32, length now 60 cmd_reg from pmc_make_ipc_cmd 1052838 CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00 PMC CrashLog size in discovery mode: 0xC00 cpu crashlog bar addr: 0x808C0000 cpu discovery table offset: 0x6030 cpu_crashlog_discovery_table buffer count: 0x3 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000 PMC crashLog size in discovery mode : 0xC00 Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM. discover mode PMC crashlog size adjusted to: 0x200 Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM. discover mode PMC crashlog size adjusted to: 0x0 m_cpu_crashLog_size : 0x3480 bytes CPU crashLog present. CPU crash data size: 0x3480 bytes in 0x3 region(s). Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM. current = 76875cf0 ACPI: * DMAR ACPI: added table 7/32, length now 64 ACPI: added table 8/32, length now 68 ACPI: * HPET ACPI: added table 9/32, length now 72 ACPI: done. ACPI tables: 40480 bytes. smbios_write_tables: 76856000 EC returned error result code 3 Couldn't obtain OEM name from CBI Create SMBIOS type 16 Create SMBIOS type 17 Create SMBIOS type 20 GENERIC: 0.0 (WIFI Device) SMBIOS tables: 982 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955 Writing coreboot table at 0x76890000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-0000000076855fff: RAM 4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES 5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES 7. 0000000077000000-00000000803fffff: RESERVED 8. 00000000c0000000-00000000cfffffff: RESERVED 9. 00000000f8000000-00000000f9ffffff: RESERVED 10. 00000000fb000000-00000000fb000fff: RESERVED 11. 00000000fc800000-00000000fe7fffff: RESERVED 12. 00000000feb00000-00000000feb7ffff: RESERVED 13. 00000000fec00000-00000000fecfffff: RESERVED 14. 00000000fed40000-00000000fed6ffff: RESERVED 15. 00000000fed80000-00000000fed87fff: RESERVED 16. 00000000fed90000-00000000fed92fff: RESERVED 17. 00000000feda0000-00000000feda1fff: RESERVED 18. 00000000fedc0000-00000000feddffff: RESERVED 19. 0000000100000000-000000017fbfffff: RAM Passing 4 GPIOs to payload: NAME | PORT | POLARITY | VALUE lid | undefined | high | high power | undefined | high | low oprom | undefined | high | low EC in RW | 0x00000151 | high | high Board ID: 3 FW config: 0x64 Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum d392 coreboot table: 1788 bytes. IMD ROOT 0. 0x76fff000 0x00001000 IMD SMALL 1. 0x76ffe000 0x00001000 FSP MEMORY 2. 0x76afe000 0x00500000 CONSOLE 3. 0x76ade000 0x00020000 RW MCACHE 4. 0x76add000 0x00000464 RO MCACHE 5. 0x76adc000 0x00001000 FMAP 6. 0x76adb000 0x0000064a TIME STAMP 7. 0x76ada000 0x00000910 VBOOT WORK 8. 0x76ac6000 0x00014000 MEM INFO 9. 0x76ac5000 0x000003b8 ROMSTG STCK10. 0x76ac4000 0x00001000 AFTER CAR 11. 0x76ab8000 0x0000c000 RAMSTAGE 12. 0x76a2d000 0x0008b000 ACPI BERT 13. 0x76a1d000 0x00010000 CHROMEOS NVS14. 0x76a1c000 0x00000f00 REFCODE 15. 0x769ad000 0x0006f000 SMM BACKUP 16. 0x7699d000 0x00010000 IGD OPREGION17. 0x76998000 0x000041fd RAMOOPS 18. 0x76898000 0x00100000 COREBOOT 19. 0x76890000 0x00008000 ACPI 20. 0x7686c000 0x00024000 TPM2 TCGLOG21. 0x7685c000 0x00010000 PMC CRASHLOG22. 0x7685b000 0x00000c00 CPU CRASHLOG23. 0x76857000 0x00003480 SMBIOS 24. 0x76856000 0x00001000 IMD small region: IMD ROOT 0. 0x76ffec00 0x00000400 FSP RUNTIME 1. 0x76ffebe0 0x00000004 VPD 2. 0x76ffeba0 0x00000032 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020 POWER STATE 4. 0x76ffeb20 0x00000044 ROMSTAGE 5. 0x76ffeb00 0x00000004 ACPI GNVS 6. 0x76ffeaa0 0x00000048 TYPE_C INFO 7. 0x76ffea80 0x0000000c BS: BS_WRITE_TABLES run times (exec / console): 7 / 704 ms MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0 0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6 0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 39 bits MTRR: default type WB/UC MTRR counts: 13/6. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6 MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() call enable_fixed_mtrr() CPU physical address size: 39 bits CPU physical address size: 39 bits call enable_fixed_mtrr() CPU physical address size: 39 bits CPU physical address size: 39 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled BS: BS_WRITE_TABLES exit times (exec / console): 141 / 156 ms Checking cr50 for pending updates Reading cr50 TPM mode BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434 Checking segment from ROM address 0xff1f03ac Checking segment from ROM address 0xff1f03c8 Loading segment from ROM address 0xff1f03ac code (compression=1) New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226 Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226 using LZMA [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4 Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88 Loading segment from ROM address 0xff1f03c8 Entry Point 0x30000000 Loaded segments BS: BS_PAYLOAD_LOAD run times (exec / console): 46 / 62 ms coreboot skipped calling FSP notify phase: 00000040. coreboot skipped calling FSP notify phase: 000000f0. BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms Finalizing chipset. apm_control: Finalizing SMM. APMC done. CSE: EOP requested action: continue boot HECI: CSE device 16.1 is disabled HECI: CSE device 16.2 is disabled HECI: CSE device 16.3 is disabled HECI: CSE device 16.4 is disabled HECI: CSE device 16.5 is disabled BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 27 ms mp_park_aps done after 0 msecs. Jumping to boot code at 0x30000000(0x76890000) CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes Starting depthcharge on Moli... WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime! WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime! Looking for NVMe Controller 0x30062398 @ 00:06:00 Looking for NVMe Controller 0x30062440 @ 00:1d:00 Wipe memory regions: [0x00000000001000, 0x000000000a0000) [0x00000000100000, 0x00000030000000) [0x00000032665e30, 0x00000076856000) [0x00000100000000, 0x0000017fc00000) ec_init: CrosEC protocol v3 supported (256, 256) R8152: Initializing Version 6 (ocp_data = 5c30) R8152: Done initializing Adding net device [firmware-brya-14505.B-collabora] Sep 8 2023 15:56:17 brask: tftpboot 192.168.201.1 12402971/tftp-deploy-8ply11sy/kernel/bzImage 12402971/tftp-deploy-8ply11sy/kernel/cmdline 12402971/tftp-deploy-8ply11sy/ramdisk/ramdisk.cpio.gz tftpboot 192.168.201.1 12402971/tftp-deploy-8ply11sy/kernel/bzIploy-8ply11sy/kernel/cmdline 12402971/tftp-deploy-8ply11sy/ramdisk/ramdisk.cpio.gz Waiting for link done. MAC: 00:13:3b:00:0f:7e Sending DHCP discover... done. Waiting for reply... done. Sending DHCP request... done. Waiting for reply... done. My ip is 192.168.201.135 The DHCP server ip is 192.168.201.1 TFTP server IP predefined by user: 192.168.201.1 Bootfile predefined by user: 12402971/tftp-deploy-8ply11sy/kernel/bzImage Sending tftp read request... done. Waiting for the transfer... 00000000 ################################################################ 00080000 ################################################################ 00100000 ################################################################ 00180000 ################################################################ 00200000 ################################################################ 00280000 ################################################################ 00300000 ################################################################ 00380000 ################################################################ 00400000 ################################################################ 00480000 ################################################################ 00500000 ################################################################ 00580000 ################################################################ 00600000 ################################################################ 00680000 ################################################################ 00700000 ################################################################ 00780000 ################################################################ 00800000 ################################################################ 00880000 ################################################################ 00900000 ################################################################ 00980000 ################################################################ 00a00000 ################################################################ 00a80000 ################################################################ 00b00000 ###### done. The bootfile was 11579392 bytes long. Sending tftp read request... done. Waiting for the transfer... 00000000 ################################################################ 00080000 ################################################################ 00100000 ################################################################ 00180000 ################################################################ 00200000 ################################################################ 00280000 ################################################################ 00300000 ################################################################ 00380000 ################################################################ 00400000 ################################################################ 00480000 ################################################################ 00500000 ################################################################ 00580000 ################################################ done. Sending tftp read request... done. Waiting for the transfer... 00000000 # done. Command line loaded dynamically from TFTP file: 12402971/tftp-deploy-8ply11sy/kernel/cmdline The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12402971/extract-nfsrootfs-jxbxa2za,tcp,hard ip=dhcp tftpserverip=192.168.201.1 Shutting down all USB controllers. Removing current net device Finalizing coreboot Exiting depthcharge with code 4 at timestamp: 34241895 Starting kernel ...