Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 18:07:34.770128 lava-dispatcher, installed at version: 2024.05
2 18:07:34.770324 start: 0 validate
3 18:07:34.770441 Start time: 2024-07-12 18:07:34.770436+00:00 (UTC)
4 18:07:34.770563 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:07:34.770706 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 18:07:35.032399 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:07:35.033208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.317-cip111-rt37%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-12%2Fkernel%2FbzImage exists
8 18:07:39.039584 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:07:39.040355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.317-cip111-rt37%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-12%2Fmodules.tar.xz exists
10 18:07:40.045510 validate duration: 5.28
12 18:07:40.045904 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:07:40.046038 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:07:40.046149 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:07:40.046356 Not decompressing ramdisk as can be used compressed.
16 18:07:40.046475 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 18:07:40.046559 saving as /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/ramdisk/rootfs.cpio.gz
18 18:07:40.046642 total size: 8417901 (8 MB)
19 18:07:40.048125 progress 0 % (0 MB)
20 18:07:40.051589 progress 5 % (0 MB)
21 18:07:40.055073 progress 10 % (0 MB)
22 18:07:40.058769 progress 15 % (1 MB)
23 18:07:40.062400 progress 20 % (1 MB)
24 18:07:40.066046 progress 25 % (2 MB)
25 18:07:40.069593 progress 30 % (2 MB)
26 18:07:40.072736 progress 35 % (2 MB)
27 18:07:40.076300 progress 40 % (3 MB)
28 18:07:40.079767 progress 45 % (3 MB)
29 18:07:40.083375 progress 50 % (4 MB)
30 18:07:40.086148 progress 55 % (4 MB)
31 18:07:40.088283 progress 60 % (4 MB)
32 18:07:40.090406 progress 65 % (5 MB)
33 18:07:40.092598 progress 70 % (5 MB)
34 18:07:40.094727 progress 75 % (6 MB)
35 18:07:40.096949 progress 80 % (6 MB)
36 18:07:40.099069 progress 85 % (6 MB)
37 18:07:40.101156 progress 90 % (7 MB)
38 18:07:40.103346 progress 95 % (7 MB)
39 18:07:40.105277 progress 100 % (8 MB)
40 18:07:40.105499 8 MB downloaded in 0.06 s (136.41 MB/s)
41 18:07:40.105645 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:07:40.105858 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:07:40.105935 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:07:40.106009 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:07:40.106137 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.317-cip111-rt37/x86_64/defconfig+x86-board/gcc-12/kernel/bzImage
47 18:07:40.106196 saving as /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/kernel/bzImage
48 18:07:40.106249 total size: 17089024 (16 MB)
49 18:07:40.106302 No compression specified
50 18:07:40.107348 progress 0 % (0 MB)
51 18:07:40.111561 progress 5 % (0 MB)
52 18:07:40.115751 progress 10 % (1 MB)
53 18:07:40.119898 progress 15 % (2 MB)
54 18:07:40.124070 progress 20 % (3 MB)
55 18:07:40.128247 progress 25 % (4 MB)
56 18:07:40.132461 progress 30 % (4 MB)
57 18:07:40.136606 progress 35 % (5 MB)
58 18:07:40.140722 progress 40 % (6 MB)
59 18:07:40.144870 progress 45 % (7 MB)
60 18:07:40.148979 progress 50 % (8 MB)
61 18:07:40.153192 progress 55 % (8 MB)
62 18:07:40.157332 progress 60 % (9 MB)
63 18:07:40.161490 progress 65 % (10 MB)
64 18:07:40.165799 progress 70 % (11 MB)
65 18:07:40.170084 progress 75 % (12 MB)
66 18:07:40.174298 progress 80 % (13 MB)
67 18:07:40.178518 progress 85 % (13 MB)
68 18:07:40.183038 progress 90 % (14 MB)
69 18:07:40.187244 progress 95 % (15 MB)
70 18:07:40.191476 progress 100 % (16 MB)
71 18:07:40.191661 16 MB downloaded in 0.09 s (190.82 MB/s)
72 18:07:40.191804 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:07:40.192034 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:07:40.192113 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:07:40.192188 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:07:40.192298 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.317-cip111-rt37/x86_64/defconfig+x86-board/gcc-12/modules.tar.xz
78 18:07:40.192358 saving as /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/modules/modules.tar
79 18:07:40.192410 total size: 1260488 (1 MB)
80 18:07:40.192464 Using unxz to decompress xz
81 18:07:40.193909 progress 2 % (0 MB)
82 18:07:40.194330 progress 7 % (0 MB)
83 18:07:40.197977 progress 12 % (0 MB)
84 18:07:40.201997 progress 18 % (0 MB)
85 18:07:40.205960 progress 23 % (0 MB)
86 18:07:40.209828 progress 28 % (0 MB)
87 18:07:40.213470 progress 33 % (0 MB)
88 18:07:40.217715 progress 38 % (0 MB)
89 18:07:40.221350 progress 44 % (0 MB)
90 18:07:40.224626 progress 49 % (0 MB)
91 18:07:40.228791 progress 54 % (0 MB)
92 18:07:40.232270 progress 59 % (0 MB)
93 18:07:40.236490 progress 64 % (0 MB)
94 18:07:40.240323 progress 70 % (0 MB)
95 18:07:40.243582 progress 75 % (0 MB)
96 18:07:40.247228 progress 80 % (0 MB)
97 18:07:40.251561 progress 85 % (1 MB)
98 18:07:40.255144 progress 90 % (1 MB)
99 18:07:40.259070 progress 96 % (1 MB)
100 18:07:40.268550 1 MB downloaded in 0.08 s (15.79 MB/s)
101 18:07:40.268750 end: 1.3.1 http-download (duration 00:00:00) [common]
103 18:07:40.268962 end: 1.3 download-retry (duration 00:00:00) [common]
104 18:07:40.269039 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
105 18:07:40.269141 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
106 18:07:40.269226 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
107 18:07:40.269296 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
108 18:07:40.269461 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2
109 18:07:40.269604 makedir: /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin
110 18:07:40.269694 makedir: /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/tests
111 18:07:40.269777 makedir: /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/results
112 18:07:40.269858 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-add-keys
113 18:07:40.269979 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-add-sources
114 18:07:40.270090 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-background-process-start
115 18:07:40.270205 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-background-process-stop
116 18:07:40.270326 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-common-functions
117 18:07:40.270439 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-echo-ipv4
118 18:07:40.270547 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-install-packages
119 18:07:40.270657 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-installed-packages
120 18:07:40.270763 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-os-build
121 18:07:40.270871 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-probe-channel
122 18:07:40.270978 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-probe-ip
123 18:07:40.271084 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-target-ip
124 18:07:40.271190 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-target-mac
125 18:07:40.271297 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-target-storage
126 18:07:40.271405 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-case
127 18:07:40.271514 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-event
128 18:07:40.271622 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-feedback
129 18:07:40.271732 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-raise
130 18:07:40.271845 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-reference
131 18:07:40.271955 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-runner
132 18:07:40.272061 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-set
133 18:07:40.272168 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-test-shell
134 18:07:40.272277 Updating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-install-packages (oe)
135 18:07:40.272412 Updating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/bin/lava-installed-packages (oe)
136 18:07:40.272518 Creating /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/environment
137 18:07:40.272604 LAVA metadata
138 18:07:40.272676 - LAVA_JOB_ID=14808682
139 18:07:40.272732 - LAVA_DISPATCHER_IP=192.168.201.1
140 18:07:40.272821 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
141 18:07:40.272876 skipped lava-vland-overlay
142 18:07:40.272941 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
143 18:07:40.273011 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
144 18:07:40.273063 skipped lava-multinode-overlay
145 18:07:40.273164 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
146 18:07:40.273252 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
147 18:07:40.273315 Loading test definitions
148 18:07:40.273388 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
149 18:07:40.273445 Using /lava-14808682 at stage 0
150 18:07:40.273738 uuid=14808682_1.4.2.3.1 testdef=None
151 18:07:40.273817 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
152 18:07:40.273891 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
153 18:07:40.274325 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
155 18:07:40.274522 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
156 18:07:40.275093 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
158 18:07:40.275298 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
159 18:07:40.275847 runner path: /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/0/tests/0_dmesg test_uuid 14808682_1.4.2.3.1
160 18:07:40.275986 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
162 18:07:40.276171 Creating lava-test-runner.conf files
163 18:07:40.276226 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14808682/lava-overlay-43mldjh2/lava-14808682/0 for stage 0
164 18:07:40.276319 - 0_dmesg
165 18:07:40.276451 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
166 18:07:40.276526 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
167 18:07:40.282561 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
168 18:07:40.282666 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
169 18:07:40.282746 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
170 18:07:40.282823 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
171 18:07:40.282897 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
172 18:07:40.504751 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
173 18:07:40.504897 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
174 18:07:40.504972 extracting modules file /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14808682/extract-overlay-ramdisk-a9baa4p5/ramdisk
175 18:07:40.539854 end: 1.4.4 extract-modules (duration 00:00:00) [common]
176 18:07:40.539993 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
177 18:07:40.540072 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14808682/compress-overlay-uyk9uo28/overlay-1.4.2.4.tar.gz to ramdisk
178 18:07:40.540131 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14808682/compress-overlay-uyk9uo28/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14808682/extract-overlay-ramdisk-a9baa4p5/ramdisk
179 18:07:40.546979 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
180 18:07:40.547115 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
181 18:07:40.547244 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
182 18:07:40.547357 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
183 18:07:40.547421 Building ramdisk /var/lib/lava/dispatcher/tmp/14808682/extract-overlay-ramdisk-a9baa4p5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14808682/extract-overlay-ramdisk-a9baa4p5/ramdisk
184 18:07:40.705854 >> 62601 blocks
185 18:07:41.756857 rename /var/lib/lava/dispatcher/tmp/14808682/extract-overlay-ramdisk-a9baa4p5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz
186 18:07:41.757051 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
187 18:07:41.757181 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
188 18:07:41.757289 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
189 18:07:41.757384 No mkimage arch provided, not using FIT.
190 18:07:41.757484 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
191 18:07:41.757582 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
192 18:07:41.757683 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
193 18:07:41.757783 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
194 18:07:41.757865 No LXC device requested
195 18:07:41.757961 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
196 18:07:41.758058 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
197 18:07:41.758152 end: 1.6 deploy-device-env (duration 00:00:00) [common]
198 18:07:41.758237 Checking files for TFTP limit of 4294967296 bytes.
199 18:07:41.758623 end: 1 tftp-deploy (duration 00:00:02) [common]
200 18:07:41.758735 start: 2 depthcharge-action (timeout 00:05:00) [common]
201 18:07:41.758838 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
202 18:07:41.758965 substitutions:
203 18:07:41.759047 - {DTB}: None
204 18:07:41.759127 - {INITRD}: 14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz
205 18:07:41.759206 - {KERNEL}: 14808682/tftp-deploy-qn8rm97p/kernel/bzImage
206 18:07:41.759284 - {LAVA_MAC}: None
207 18:07:41.759361 - {PRESEED_CONFIG}: None
208 18:07:41.759437 - {PRESEED_LOCAL}: None
209 18:07:41.759514 - {RAMDISK}: 14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz
210 18:07:41.759596 - {ROOT_PART}: None
211 18:07:41.759672 - {ROOT}: None
212 18:07:41.759748 - {SERVER_IP}: 192.168.201.1
213 18:07:41.759824 - {TEE}: None
214 18:07:41.759900 Parsed boot commands:
215 18:07:41.759974 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
216 18:07:41.760148 Parsed boot commands: tftpboot 192.168.201.1 14808682/tftp-deploy-qn8rm97p/kernel/bzImage 14808682/tftp-deploy-qn8rm97p/kernel/cmdline 14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz
217 18:07:41.760253 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
218 18:07:41.760356 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
219 18:07:41.760457 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
220 18:07:41.760554 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
221 18:07:41.760634 Not connected, no need to disconnect.
222 18:07:41.760726 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
223 18:07:41.760821 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
224 18:07:41.760901 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-3'
225 18:07:41.763924 Setting prompt string to ['lava-test: # ']
226 18:07:41.764251 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
227 18:07:41.764349 end: 2.2.1 reset-connection (duration 00:00:00) [common]
228 18:07:41.764436 start: 2.2.2 reset-device (timeout 00:05:00) [common]
229 18:07:41.764514 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
230 18:07:41.764694 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3', '--port=1', '--command=reboot']
231 18:07:46.895628 >> Command sent successfully.
232 18:07:46.900053 Returned 0 in 5 seconds
233 18:07:46.900192 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
235 18:07:46.900392 end: 2.2.2 reset-device (duration 00:00:05) [common]
236 18:07:46.900487 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
237 18:07:46.900560 Setting prompt string to 'Starting depthcharge on Magolor...'
238 18:07:46.900625 Changing prompt to 'Starting depthcharge on Magolor...'
239 18:07:46.900690 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
240 18:07:46.901091 [Enter `^Ec?' for help]
241 18:07:48.137847
242 18:07:48.137982
243 18:07:48.148880 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
244 18:07:48.151745 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
245 18:07:48.154862 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
246 18:07:48.161855 CPU: AES supported, TXT NOT supported, VT supported
247 18:07:48.165462 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
248 18:07:48.171673 PCH: device id 4d87 (rev 01) is Jasperlake Super
249 18:07:48.175236 IGD: device id 4e55 (rev 01) is Jasperlake GT4
250 18:07:48.177919 VBOOT: Loading verstage.
251 18:07:48.185028 FMAP: Found "FLASH" version 1.1 at 0xc04000.
252 18:07:48.188315 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
253 18:07:48.195754 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
254 18:07:48.198920 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
255 18:07:48.198999
256 18:07:48.202332
257 18:07:48.213072 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
258 18:07:48.226487 Probing TPM: . done!
259 18:07:48.229445 TPM ready after 0 ms
260 18:07:48.232945 Connected to device vid:did:rid of 1ae0:0028:00
261 18:07:48.244296 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
262 18:07:48.251035 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 18:07:48.254404 Initialized TPM device CR50 revision 0
264 18:07:48.311707 tlcl_send_startup: Startup return code is 0
265 18:07:48.311854 TPM: setup succeeded
266 18:07:48.325856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 18:07:48.339442 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 18:07:48.354664 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 18:07:48.364730 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 18:07:48.367873 Chrome EC: UHEPI supported
271 18:07:48.371202 Phase 1
272 18:07:48.374517 FMAP: area GBB found @ c05000 (12288 bytes)
273 18:07:48.381375 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1 / 0x7
274 18:07:48.389404 VB2:vb2_check_recovery() We have a recovery request: 0x1 / 0x7
275 18:07:48.392354 Recovery requested (1009000e)
276 18:07:48.395523 TPM: Extending digest for VBOOT: boot mode into PCR 0
277 18:07:48.406719 tlcl_extend: response is 0
278 18:07:48.413386 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
279 18:07:48.422687 tlcl_extend: response is 0
280 18:07:48.429784 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
281 18:07:48.432733 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
282 18:07:48.439966 BS: verstage times (exec / console): total (unknown) / 124 ms
283 18:07:48.440072
284 18:07:48.440133
285 18:07:48.450543 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
286 18:07:48.457413 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
287 18:07:48.464296 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
288 18:07:48.467245 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
289 18:07:48.471099 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
290 18:07:48.477004 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
291 18:07:48.480977 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
292 18:07:48.484044 TCO_STS: 0000 0001
293 18:07:48.484131 GEN_PMCON: d0015038 00002200
294 18:07:48.487343 GBLRST_CAUSE: 00000000 00000000
295 18:07:48.490716 prev_sleep_state 5
296 18:07:48.493536 Boot Count incremented to 2900
297 18:07:48.500100 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
298 18:07:48.503731 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
299 18:07:48.506985 Chrome EC: UHEPI supported
300 18:07:48.514849 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
301 18:07:48.521369 Probing TPM: done!
302 18:07:48.527795 Connected to device vid:did:rid of 1ae0:0028:00
303 18:07:48.537603 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
304 18:07:48.541580 Initialized TPM device CR50 revision 0
305 18:07:48.558733 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
306 18:07:48.565741 MRC: Hash idx 0x100b comparison successful.
307 18:07:48.565872 MRC cache found, size 5458
308 18:07:48.569400 bootmode is set to: 2
309 18:07:48.572412 SPD INDEX = 0
310 18:07:48.575955 CBFS: Found 'spd.bin' @0x40c40 size 0x600
311 18:07:48.579387 SPD: module type is LPDDR4X
312 18:07:48.582798 SPD: module part number is MT53E512M32D2NP-046 WT:E
313 18:07:48.589034 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
314 18:07:48.595358 SPD: device width 16 bits, bus width 32 bits
315 18:07:48.599138 SPD: module size is 4096 MB (per channel)
316 18:07:48.602373 meminit_channels: DRAM half-populated
317 18:07:48.684416 CBMEM:
318 18:07:48.687818 IMD: root @ 0x76fff000 254 entries.
319 18:07:48.690665 IMD: root @ 0x76ffec00 62 entries.
320 18:07:48.694136 FMAP: area RO_VPD found @ c00000 (16384 bytes)
321 18:07:48.700693 WARNING: RO_VPD is uninitialized or empty.
322 18:07:48.704142 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
323 18:07:48.707988 External stage cache:
324 18:07:48.711210 IMD: root @ 0x7b3ff000 254 entries.
325 18:07:48.714589 IMD: root @ 0x7b3fec00 62 entries.
326 18:07:48.724495 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
327 18:07:48.730496 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 18:07:48.737109 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
329 18:07:48.745908 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 18:07:48.752374 cse_lite: Skip switching to RW in the recovery path
331 18:07:48.752479 1 DIMMs found
332 18:07:48.752569 SMM Memory Map
333 18:07:48.755816 SMRAM : 0x7b000000 0x800000
334 18:07:48.759143 Subregion 0: 0x7b000000 0x200000
335 18:07:48.765675 Subregion 1: 0x7b200000 0x200000
336 18:07:48.769307 Subregion 2: 0x7b400000 0x400000
337 18:07:48.769457 top_of_ram = 0x77000000
338 18:07:48.775431 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 18:07:48.783148 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 18:07:48.785770 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 18:07:48.792604 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
342 18:07:48.795274 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
343 18:07:48.807795 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
344 18:07:48.811217 Processing 188 relocs. Offset value of 0x74c0e000
345 18:07:48.820902 BS: romstage times (exec / console): total (unknown) / 255 ms
346 18:07:48.825396
347 18:07:48.825515
348 18:07:48.835933 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
349 18:07:48.841914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 18:07:48.845396 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
351 18:07:48.852153 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
352 18:07:48.908615 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
353 18:07:48.915219 Processing 4805 relocs. Offset value of 0x75da8000
354 18:07:48.921812 BS: postcar times (exec / console): total (unknown) / 42 ms
355 18:07:48.921918
356 18:07:48.921977
357 18:07:48.931401 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
358 18:07:48.931506 Normal boot
359 18:07:48.935520 EC returned error result code 3
360 18:07:48.938936 FW_CONFIG value is 0x204
361 18:07:48.941708 GENERIC: 0.0 disabled by fw_config
362 18:07:48.948495 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
363 18:07:48.951714 I2C: 00:10 disabled by fw_config
364 18:07:48.955077 I2C: 00:10 disabled by fw_config
365 18:07:48.958357 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
366 18:07:48.965600 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
367 18:07:48.968412 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 18:07:48.975085 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
369 18:07:48.978617 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
370 18:07:48.981584 I2C: 00:10 disabled by fw_config
371 18:07:48.988610 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
372 18:07:48.994990 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
373 18:07:48.998535 I2C: 00:1a disabled by fw_config
374 18:07:49.001741 I2C: 00:1a disabled by fw_config
375 18:07:49.008443 fw_config match found: AUDIO_AMP=UNPROVISIONED
376 18:07:49.011811 fw_config match found: AUDIO_AMP=UNPROVISIONED
377 18:07:49.015360 GENERIC: 0.0 disabled by fw_config
378 18:07:49.021699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 18:07:49.024971 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
380 18:07:49.031875 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
381 18:07:49.034845 microcode: Update skipped, already up-to-date
382 18:07:49.041579 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
383 18:07:49.067487 Detected 2 core, 2 thread CPU.
384 18:07:49.070833 Setting up SMI for CPU
385 18:07:49.074098 IED base = 0x7b400000
386 18:07:49.074554 IED size = 0x00400000
387 18:07:49.077100 Will perform SMM setup.
388 18:07:49.080467 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
389 18:07:49.090447 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 18:07:49.093950 Processing 16 relocs. Offset value of 0x00030000
391 18:07:49.098186 Attempting to start 1 APs
392 18:07:49.101306 Waiting for 10ms after sending INIT.
393 18:07:49.117511 Waiting for 1st SIPI to complete...done.
394 18:07:49.118040 AP: slot 1 apic_id 2.
395 18:07:49.124073 Waiting for 2nd SIPI to complete...done.
396 18:07:49.130642 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
397 18:07:49.137832 Processing 13 relocs. Offset value of 0x00038000
398 18:07:49.138183 Unable to locate Global NVS
399 18:07:49.147419 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
400 18:07:49.150747 Installing permanent SMM handler to 0x7b000000
401 18:07:49.160895 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
402 18:07:49.164221 Processing 704 relocs. Offset value of 0x7b010000
403 18:07:49.173433 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
404 18:07:49.176844 Processing 13 relocs. Offset value of 0x7b008000
405 18:07:49.183684 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
406 18:07:49.187089 Unable to locate Global NVS
407 18:07:49.193815 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
408 18:07:49.196660 Clearing SMI status registers
409 18:07:49.197147 SMI_STS: PM1
410 18:07:49.199851 PM1_STS: PWRBTN
411 18:07:49.200175 TCO_STS: INTRD_DET
412 18:07:49.210260 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
413 18:07:49.213485 In relocation handler: CPU 0
414 18:07:49.216557 New SMBASE=0x7b000000 IEDBASE=0x7b400000
415 18:07:49.219926 Writing SMRR. base = 0x7b000006, mask=0xff800800
416 18:07:49.224690 Relocation complete.
417 18:07:49.231431 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
418 18:07:49.234193 In relocation handler: CPU 1
419 18:07:49.237826 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
420 18:07:49.241621 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 18:07:49.243889 Relocation complete.
422 18:07:49.247508 Initializing CPU #0
423 18:07:49.250543 CPU: vendor Intel device 906c0
424 18:07:49.253921 CPU: family 06, model 9c, stepping 00
425 18:07:49.257049 Clearing out pending MCEs
426 18:07:49.257173 Setting up local APIC...
427 18:07:49.260178 apic_id: 0x00 done.
428 18:07:49.264006 Turbo is available but hidden
429 18:07:49.266897 Turbo is available and visible
430 18:07:49.270635 microcode: Update skipped, already up-to-date
431 18:07:49.274191 CPU #0 initialized
432 18:07:49.274269 Initializing CPU #1
433 18:07:49.276900 CPU: vendor Intel device 906c0
434 18:07:49.283769 CPU: family 06, model 9c, stepping 00
435 18:07:49.283850 Clearing out pending MCEs
436 18:07:49.286947 Setting up local APIC...
437 18:07:49.290569 apic_id: 0x02 done.
438 18:07:49.294201 microcode: Update skipped, already up-to-date
439 18:07:49.297233 CPU #1 initialized
440 18:07:49.300060 bsp_do_flight_plan done after 174 msecs.
441 18:07:49.303599 CPU: frequency set to 2800 MHz
442 18:07:49.303710 Enabling SMIs.
443 18:07:49.310031 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
444 18:07:49.321820 Probing TPM: done!
445 18:07:49.328488 Connected to device vid:did:rid of 1ae0:0028:00
446 18:07:49.337914 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
447 18:07:49.341520 Initialized TPM device CR50 revision 0
448 18:07:49.344780 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
449 18:07:49.351703 Found a VBT of 7680 bytes after decompression
450 18:07:49.358315 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
451 18:07:49.393681 Detected 2 core, 2 thread CPU.
452 18:07:49.397003 Detected 2 core, 2 thread CPU.
453 18:07:49.758671 Display FSP Version Info HOB
454 18:07:49.761678 Reference Code - CPU = 8.7.22.30
455 18:07:49.765039 uCode Version = 24.0.0.1f
456 18:07:49.768601 TXT ACM version = ff.ff.ff.ffff
457 18:07:49.771636 Reference Code - ME = 8.7.22.30
458 18:07:49.775032 MEBx version = 0.0.0.0
459 18:07:49.778393 ME Firmware Version = Consumer SKU
460 18:07:49.781769 Reference Code - PCH = 8.7.22.30
461 18:07:49.785057 PCH-CRID Status = Disabled
462 18:07:49.788627 PCH-CRID Original Value = ff.ff.ff.ffff
463 18:07:49.791918 PCH-CRID New Value = ff.ff.ff.ffff
464 18:07:49.794870 OPROM - RST - RAID = ff.ff.ff.ffff
465 18:07:49.798459 PCH Hsio Version = 4.0.0.0
466 18:07:49.802253 Reference Code - SA - System Agent = 8.7.22.30
467 18:07:49.805995 Reference Code - MRC = 0.0.4.68
468 18:07:49.810152 SA - PCIe Version = 8.7.22.30
469 18:07:49.813632 SA-CRID Status = Disabled
470 18:07:49.816731 SA-CRID Original Value = 0.0.0.0
471 18:07:49.817016 SA-CRID New Value = 0.0.0.0
472 18:07:49.819461 OPROM - VBIOS = ff.ff.ff.ffff
473 18:07:49.826901 IO Manageability Engine FW Version = ff.ff.ff.ffff
474 18:07:49.830205 PHY Build Version = ff.ff.ff.ffff
475 18:07:49.834034 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
476 18:07:49.840394 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
477 18:07:49.843630 ITSS IRQ Polarities Before:
478 18:07:49.843863 IPC0: 0xffffffff
479 18:07:49.847074 IPC1: 0xffffffff
480 18:07:49.847281 IPC2: 0xffffffff
481 18:07:49.850774 IPC3: 0xffffffff
482 18:07:49.850980 ITSS IRQ Polarities After:
483 18:07:49.853877 IPC0: 0xffffffff
484 18:07:49.856788 IPC1: 0xffffffff
485 18:07:49.856971 IPC2: 0xffffffff
486 18:07:49.860890 IPC3: 0xffffffff
487 18:07:49.870248 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
488 18:07:49.876584 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
489 18:07:49.880163 Enumerating buses...
490 18:07:49.883582 Show all devs... Before device enumeration.
491 18:07:49.886775 Root Device: enabled 1
492 18:07:49.890049 CPU_CLUSTER: 0: enabled 1
493 18:07:49.890236 DOMAIN: 0000: enabled 1
494 18:07:49.893523 PCI: 00:00.0: enabled 1
495 18:07:49.896832 PCI: 00:02.0: enabled 1
496 18:07:49.900000 PCI: 00:04.0: enabled 1
497 18:07:49.900187 PCI: 00:05.0: enabled 1
498 18:07:49.903161 PCI: 00:09.0: enabled 0
499 18:07:49.906384 PCI: 00:12.6: enabled 0
500 18:07:49.909787 PCI: 00:14.0: enabled 1
501 18:07:49.910034 PCI: 00:14.1: enabled 0
502 18:07:49.913503 PCI: 00:14.2: enabled 0
503 18:07:49.916718 PCI: 00:14.3: enabled 1
504 18:07:49.916968 PCI: 00:14.5: enabled 1
505 18:07:49.920441 PCI: 00:15.0: enabled 1
506 18:07:49.923159 PCI: 00:15.1: enabled 1
507 18:07:49.926575 PCI: 00:15.2: enabled 1
508 18:07:49.926759 PCI: 00:15.3: enabled 1
509 18:07:49.929866 PCI: 00:16.0: enabled 1
510 18:07:49.933745 PCI: 00:16.1: enabled 0
511 18:07:49.936908 PCI: 00:16.4: enabled 0
512 18:07:49.937150 PCI: 00:16.5: enabled 0
513 18:07:49.940017 PCI: 00:17.0: enabled 0
514 18:07:49.942831 PCI: 00:19.0: enabled 1
515 18:07:49.946463 PCI: 00:19.1: enabled 0
516 18:07:49.946691 PCI: 00:19.2: enabled 1
517 18:07:49.949534 PCI: 00:1a.0: enabled 1
518 18:07:49.953206 PCI: 00:1c.0: enabled 0
519 18:07:49.953390 PCI: 00:1c.1: enabled 0
520 18:07:49.956707 PCI: 00:1c.2: enabled 0
521 18:07:49.959320 PCI: 00:1c.3: enabled 0
522 18:07:49.963133 PCI: 00:1c.4: enabled 0
523 18:07:49.963320 PCI: 00:1c.5: enabled 0
524 18:07:49.966134 PCI: 00:1c.6: enabled 0
525 18:07:49.969162 PCI: 00:1c.7: enabled 1
526 18:07:49.972629 PCI: 00:1e.0: enabled 0
527 18:07:49.972815 PCI: 00:1e.1: enabled 0
528 18:07:49.975732 PCI: 00:1e.2: enabled 1
529 18:07:49.979363 PCI: 00:1e.3: enabled 0
530 18:07:49.982382 PCI: 00:1f.0: enabled 1
531 18:07:49.982569 PCI: 00:1f.1: enabled 1
532 18:07:49.986278 PCI: 00:1f.2: enabled 1
533 18:07:49.989102 PCI: 00:1f.3: enabled 1
534 18:07:49.992655 PCI: 00:1f.4: enabled 0
535 18:07:49.992841 PCI: 00:1f.5: enabled 1
536 18:07:49.996403 PCI: 00:1f.7: enabled 0
537 18:07:49.999434 GENERIC: 0.0: enabled 1
538 18:07:49.999621 GENERIC: 0.0: enabled 1
539 18:07:50.002328 USB0 port 0: enabled 1
540 18:07:50.005766 GENERIC: 0.0: enabled 1
541 18:07:50.009267 I2C: 00:2c: enabled 1
542 18:07:50.009520 I2C: 00:15: enabled 1
543 18:07:50.012712 GENERIC: 0.0: enabled 0
544 18:07:50.015863 I2C: 00:15: enabled 1
545 18:07:50.016050 I2C: 00:10: enabled 0
546 18:07:50.018829 I2C: 00:10: enabled 0
547 18:07:50.022844 I2C: 00:2c: enabled 1
548 18:07:50.023068 I2C: 00:40: enabled 1
549 18:07:50.025776 I2C: 00:10: enabled 1
550 18:07:50.028929 I2C: 00:39: enabled 1
551 18:07:50.029246 I2C: 00:36: enabled 1
552 18:07:50.032584 I2C: 00:10: enabled 0
553 18:07:50.035575 I2C: 00:0c: enabled 1
554 18:07:50.035965 I2C: 00:50: enabled 1
555 18:07:50.039250 I2C: 00:1a: enabled 1
556 18:07:50.042239 I2C: 00:1a: enabled 0
557 18:07:50.042797 I2C: 00:1a: enabled 0
558 18:07:50.045774 I2C: 00:28: enabled 1
559 18:07:50.049605 I2C: 00:29: enabled 1
560 18:07:50.049995 PCI: 00:00.0: enabled 1
561 18:07:50.052503 SPI: 00: enabled 1
562 18:07:50.056596 PNP: 0c09.0: enabled 1
563 18:07:50.059130 GENERIC: 0.0: enabled 0
564 18:07:50.059522 USB2 port 0: enabled 1
565 18:07:50.062279 USB2 port 1: enabled 1
566 18:07:50.065526 USB2 port 2: enabled 1
567 18:07:50.066049 USB2 port 3: enabled 1
568 18:07:50.068906 USB2 port 4: enabled 0
569 18:07:50.072303 USB2 port 5: enabled 1
570 18:07:50.072741 USB2 port 6: enabled 0
571 18:07:50.075765 USB2 port 7: enabled 1
572 18:07:50.078848 USB3 port 0: enabled 1
573 18:07:50.081983 USB3 port 1: enabled 1
574 18:07:50.082448 USB3 port 2: enabled 1
575 18:07:50.085383 USB3 port 3: enabled 1
576 18:07:50.088830 APIC: 00: enabled 1
577 18:07:50.089354 APIC: 02: enabled 1
578 18:07:50.092279 Compare with tree...
579 18:07:50.095389 Root Device: enabled 1
580 18:07:50.095933 CPU_CLUSTER: 0: enabled 1
581 18:07:50.098866 APIC: 00: enabled 1
582 18:07:50.101975 APIC: 02: enabled 1
583 18:07:50.105145 DOMAIN: 0000: enabled 1
584 18:07:50.105425 PCI: 00:00.0: enabled 1
585 18:07:50.108543 PCI: 00:02.0: enabled 1
586 18:07:50.111602 PCI: 00:04.0: enabled 1
587 18:07:50.115018 GENERIC: 0.0: enabled 1
588 18:07:50.118367 PCI: 00:05.0: enabled 1
589 18:07:50.118594 GENERIC: 0.0: enabled 1
590 18:07:50.121792 PCI: 00:09.0: enabled 0
591 18:07:50.124749 PCI: 00:12.6: enabled 0
592 18:07:50.128103 PCI: 00:14.0: enabled 1
593 18:07:50.131755 USB0 port 0: enabled 1
594 18:07:50.131896 USB2 port 0: enabled 1
595 18:07:50.134667 USB2 port 1: enabled 1
596 18:07:50.137829 USB2 port 2: enabled 1
597 18:07:50.141301 USB2 port 3: enabled 1
598 18:07:50.144903 USB2 port 4: enabled 0
599 18:07:50.145042 USB2 port 5: enabled 1
600 18:07:50.147887 USB2 port 6: enabled 0
601 18:07:50.151193 USB2 port 7: enabled 1
602 18:07:50.154302 USB3 port 0: enabled 1
603 18:07:50.157770 USB3 port 1: enabled 1
604 18:07:50.161155 USB3 port 2: enabled 1
605 18:07:50.161297 USB3 port 3: enabled 1
606 18:07:50.164749 PCI: 00:14.1: enabled 0
607 18:07:50.167723 PCI: 00:14.2: enabled 0
608 18:07:50.171196 PCI: 00:14.3: enabled 1
609 18:07:50.174562 GENERIC: 0.0: enabled 1
610 18:07:50.174748 PCI: 00:14.5: enabled 1
611 18:07:50.177930 PCI: 00:15.0: enabled 1
612 18:07:50.181011 I2C: 00:2c: enabled 1
613 18:07:50.184362 I2C: 00:15: enabled 1
614 18:07:50.187611 PCI: 00:15.1: enabled 1
615 18:07:50.187770 PCI: 00:15.2: enabled 1
616 18:07:50.190732 GENERIC: 0.0: enabled 0
617 18:07:50.194295 I2C: 00:15: enabled 1
618 18:07:50.196983 I2C: 00:10: enabled 0
619 18:07:50.200963 I2C: 00:10: enabled 0
620 18:07:50.201066 I2C: 00:2c: enabled 1
621 18:07:50.203646 I2C: 00:40: enabled 1
622 18:07:50.206825 I2C: 00:10: enabled 1
623 18:07:50.210667 I2C: 00:39: enabled 1
624 18:07:50.210744 PCI: 00:15.3: enabled 1
625 18:07:50.213891 I2C: 00:36: enabled 1
626 18:07:50.217072 I2C: 00:10: enabled 0
627 18:07:50.220359 I2C: 00:0c: enabled 1
628 18:07:50.220465 I2C: 00:50: enabled 1
629 18:07:50.223947 PCI: 00:16.0: enabled 1
630 18:07:50.227118 PCI: 00:16.1: enabled 0
631 18:07:50.230705 PCI: 00:16.4: enabled 0
632 18:07:50.233817 PCI: 00:16.5: enabled 0
633 18:07:50.233894 PCI: 00:17.0: enabled 0
634 18:07:50.236812 PCI: 00:19.0: enabled 1
635 18:07:50.240077 I2C: 00:1a: enabled 1
636 18:07:50.243440 I2C: 00:1a: enabled 0
637 18:07:50.243561 I2C: 00:1a: enabled 0
638 18:07:50.246652 I2C: 00:28: enabled 1
639 18:07:50.250119 I2C: 00:29: enabled 1
640 18:07:50.253526 PCI: 00:19.1: enabled 0
641 18:07:50.257066 PCI: 00:19.2: enabled 1
642 18:07:50.257210 PCI: 00:1a.0: enabled 1
643 18:07:50.260404 PCI: 00:1e.0: enabled 0
644 18:07:50.263728 PCI: 00:1e.1: enabled 0
645 18:07:50.266797 PCI: 00:1e.2: enabled 1
646 18:07:50.266895 SPI: 00: enabled 1
647 18:07:50.270527 PCI: 00:1e.3: enabled 0
648 18:07:50.273072 PCI: 00:1f.0: enabled 1
649 18:07:50.276290 PNP: 0c09.0: enabled 1
650 18:07:50.280644 PCI: 00:1f.1: enabled 1
651 18:07:50.280749 PCI: 00:1f.2: enabled 1
652 18:07:50.282930 PCI: 00:1f.3: enabled 1
653 18:07:50.286381 GENERIC: 0.0: enabled 0
654 18:07:50.290743 PCI: 00:1f.4: enabled 0
655 18:07:50.293073 PCI: 00:1f.5: enabled 1
656 18:07:50.293199 PCI: 00:1f.7: enabled 0
657 18:07:50.296452 Root Device scanning...
658 18:07:50.299865 scan_static_bus for Root Device
659 18:07:50.303067 CPU_CLUSTER: 0 enabled
660 18:07:50.306441 DOMAIN: 0000 enabled
661 18:07:50.306528 DOMAIN: 0000 scanning...
662 18:07:50.309510 PCI: pci_scan_bus for bus 00
663 18:07:50.312984 PCI: 00:00.0 [8086/0000] ops
664 18:07:50.316581 PCI: 00:00.0 [8086/4e22] enabled
665 18:07:50.319343 PCI: 00:02.0 [8086/0000] bus ops
666 18:07:50.322932 PCI: 00:02.0 [8086/4e55] enabled
667 18:07:50.326364 PCI: 00:04.0 [8086/0000] bus ops
668 18:07:50.329263 PCI: 00:04.0 [8086/4e03] enabled
669 18:07:50.332647 PCI: 00:05.0 [8086/0000] bus ops
670 18:07:50.336413 PCI: 00:05.0 [8086/4e19] enabled
671 18:07:50.339285 PCI: 00:08.0 [8086/4e11] enabled
672 18:07:50.343053 PCI: 00:14.0 [8086/0000] bus ops
673 18:07:50.346433 PCI: 00:14.0 [8086/4ded] enabled
674 18:07:50.349473 PCI: 00:14.2 [8086/4def] disabled
675 18:07:50.353163 PCI: 00:14.3 [8086/0000] bus ops
676 18:07:50.356178 PCI: 00:14.3 [8086/4df0] enabled
677 18:07:50.359586 PCI: 00:14.5 [8086/0000] ops
678 18:07:50.363255 PCI: 00:14.5 [8086/4df8] enabled
679 18:07:50.365835 PCI: 00:15.0 [8086/0000] bus ops
680 18:07:50.369261 PCI: 00:15.0 [8086/4de8] enabled
681 18:07:50.373091 PCI: 00:15.1 [8086/0000] bus ops
682 18:07:50.376388 PCI: 00:15.1 [8086/4de9] enabled
683 18:07:50.379293 PCI: 00:15.2 [8086/0000] bus ops
684 18:07:50.382774 PCI: 00:15.2 [8086/4dea] enabled
685 18:07:50.386400 PCI: 00:15.3 [8086/0000] bus ops
686 18:07:50.388785 PCI: 00:15.3 [8086/4deb] enabled
687 18:07:50.392078 PCI: 00:16.0 [8086/0000] ops
688 18:07:50.395690 PCI: 00:16.0 [8086/4de0] enabled
689 18:07:50.398685 PCI: 00:19.0 [8086/0000] bus ops
690 18:07:50.402097 PCI: 00:19.0 [8086/4dc5] enabled
691 18:07:50.405532 PCI: 00:19.2 [8086/0000] ops
692 18:07:50.408925 PCI: 00:19.2 [8086/4dc7] enabled
693 18:07:50.412219 PCI: 00:1a.0 [8086/0000] ops
694 18:07:50.415534 PCI: 00:1a.0 [8086/4dc4] enabled
695 18:07:50.418851 PCI: 00:1e.0 [8086/0000] ops
696 18:07:50.422154 PCI: 00:1e.0 [8086/4da8] disabled
697 18:07:50.425177 PCI: 00:1e.2 [8086/0000] bus ops
698 18:07:50.428517 PCI: 00:1e.2 [8086/4daa] enabled
699 18:07:50.431869 PCI: 00:1f.0 [8086/0000] bus ops
700 18:07:50.435576 PCI: 00:1f.0 [8086/4d87] enabled
701 18:07:50.438809 PCI: Static device PCI: 00:1f.1 not found, disabling it.
702 18:07:50.442489 RTC Init
703 18:07:50.445420 Set power on after power failure.
704 18:07:50.445542 Disabling Deep S3
705 18:07:50.448886 Disabling Deep S3
706 18:07:50.451911 Disabling Deep S4
707 18:07:50.452000 Disabling Deep S4
708 18:07:50.455177 Disabling Deep S5
709 18:07:50.455295 Disabling Deep S5
710 18:07:50.458406 PCI: 00:1f.2 [0000/0000] hidden
711 18:07:50.462645 PCI: 00:1f.3 [8086/0000] bus ops
712 18:07:50.464982 PCI: 00:1f.3 [8086/4dc8] enabled
713 18:07:50.468382 PCI: 00:1f.5 [8086/0000] bus ops
714 18:07:50.471761 PCI: 00:1f.5 [8086/4da4] enabled
715 18:07:50.474657 PCI: Leftover static devices:
716 18:07:50.478223 PCI: 00:12.6
717 18:07:50.478343 PCI: 00:09.0
718 18:07:50.478447 PCI: 00:14.1
719 18:07:50.481557 PCI: 00:16.1
720 18:07:50.481667 PCI: 00:16.4
721 18:07:50.485705 PCI: 00:16.5
722 18:07:50.485827 PCI: 00:17.0
723 18:07:50.485938 PCI: 00:19.1
724 18:07:50.489064 PCI: 00:1e.1
725 18:07:50.489164 PCI: 00:1e.3
726 18:07:50.489233 PCI: 00:1f.1
727 18:07:50.493044 PCI: 00:1f.4
728 18:07:50.493160 PCI: 00:1f.7
729 18:07:50.496257 PCI: Check your devicetree.cb.
730 18:07:50.499306 PCI: 00:02.0 scanning...
731 18:07:50.503308 scan_generic_bus for PCI: 00:02.0
732 18:07:50.506103 scan_generic_bus for PCI: 00:02.0 done
733 18:07:50.510340 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
734 18:07:50.512918 PCI: 00:04.0 scanning...
735 18:07:50.516290 scan_generic_bus for PCI: 00:04.0
736 18:07:50.519346 GENERIC: 0.0 enabled
737 18:07:50.526128 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
738 18:07:50.529431 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
739 18:07:50.532481 PCI: 00:05.0 scanning...
740 18:07:50.535781 scan_generic_bus for PCI: 00:05.0
741 18:07:50.539671 GENERIC: 0.0 enabled
742 18:07:50.542669 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
743 18:07:50.549203 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
744 18:07:50.552519 PCI: 00:14.0 scanning...
745 18:07:50.556045 scan_static_bus for PCI: 00:14.0
746 18:07:50.556132 USB0 port 0 enabled
747 18:07:50.558857 USB0 port 0 scanning...
748 18:07:50.562485 scan_static_bus for USB0 port 0
749 18:07:50.565834 USB2 port 0 enabled
750 18:07:50.565959 USB2 port 1 enabled
751 18:07:50.568900 USB2 port 2 enabled
752 18:07:50.572613 USB2 port 3 enabled
753 18:07:50.572725 USB2 port 4 disabled
754 18:07:50.575635 USB2 port 5 enabled
755 18:07:50.575722 USB2 port 6 disabled
756 18:07:50.578913 USB2 port 7 enabled
757 18:07:50.582449 USB3 port 0 enabled
758 18:07:50.582536 USB3 port 1 enabled
759 18:07:50.586135 USB3 port 2 enabled
760 18:07:50.588979 USB3 port 3 enabled
761 18:07:50.589100 USB2 port 0 scanning...
762 18:07:50.592268 scan_static_bus for USB2 port 0
763 18:07:50.595439 scan_static_bus for USB2 port 0 done
764 18:07:50.602674 scan_bus: bus USB2 port 0 finished in 6 msecs
765 18:07:50.605594 USB2 port 1 scanning...
766 18:07:50.608870 scan_static_bus for USB2 port 1
767 18:07:50.612001 scan_static_bus for USB2 port 1 done
768 18:07:50.615492 scan_bus: bus USB2 port 1 finished in 6 msecs
769 18:07:50.618727 USB2 port 2 scanning...
770 18:07:50.622452 scan_static_bus for USB2 port 2
771 18:07:50.625197 scan_static_bus for USB2 port 2 done
772 18:07:50.628839 scan_bus: bus USB2 port 2 finished in 6 msecs
773 18:07:50.631928 USB2 port 3 scanning...
774 18:07:50.635249 scan_static_bus for USB2 port 3
775 18:07:50.638864 scan_static_bus for USB2 port 3 done
776 18:07:50.644962 scan_bus: bus USB2 port 3 finished in 6 msecs
777 18:07:50.645076 USB2 port 5 scanning...
778 18:07:50.648541 scan_static_bus for USB2 port 5
779 18:07:50.652313 scan_static_bus for USB2 port 5 done
780 18:07:50.659042 scan_bus: bus USB2 port 5 finished in 6 msecs
781 18:07:50.661777 USB2 port 7 scanning...
782 18:07:50.664996 scan_static_bus for USB2 port 7
783 18:07:50.668366 scan_static_bus for USB2 port 7 done
784 18:07:50.671467 scan_bus: bus USB2 port 7 finished in 6 msecs
785 18:07:50.674962 USB3 port 0 scanning...
786 18:07:50.678244 scan_static_bus for USB3 port 0
787 18:07:50.681567 scan_static_bus for USB3 port 0 done
788 18:07:50.684798 scan_bus: bus USB3 port 0 finished in 6 msecs
789 18:07:50.688925 USB3 port 1 scanning...
790 18:07:50.691373 scan_static_bus for USB3 port 1
791 18:07:50.694642 scan_static_bus for USB3 port 1 done
792 18:07:50.701739 scan_bus: bus USB3 port 1 finished in 6 msecs
793 18:07:50.701838 USB3 port 2 scanning...
794 18:07:50.704588 scan_static_bus for USB3 port 2
795 18:07:50.711118 scan_static_bus for USB3 port 2 done
796 18:07:50.715013 scan_bus: bus USB3 port 2 finished in 6 msecs
797 18:07:50.718200 USB3 port 3 scanning...
798 18:07:50.721651 scan_static_bus for USB3 port 3
799 18:07:50.724460 scan_static_bus for USB3 port 3 done
800 18:07:50.727751 scan_bus: bus USB3 port 3 finished in 6 msecs
801 18:07:50.731117 scan_static_bus for USB0 port 0 done
802 18:07:50.738704 scan_bus: bus USB0 port 0 finished in 172 msecs
803 18:07:50.741246 scan_static_bus for PCI: 00:14.0 done
804 18:07:50.744476 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
805 18:07:50.748041 PCI: 00:14.3 scanning...
806 18:07:50.751242 scan_static_bus for PCI: 00:14.3
807 18:07:50.754405 GENERIC: 0.0 enabled
808 18:07:50.757925 scan_static_bus for PCI: 00:14.3 done
809 18:07:50.760986 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
810 18:07:50.764559 PCI: 00:15.0 scanning...
811 18:07:50.768380 scan_static_bus for PCI: 00:15.0
812 18:07:50.771297 I2C: 00:2c enabled
813 18:07:50.771391 I2C: 00:15 enabled
814 18:07:50.774225 scan_static_bus for PCI: 00:15.0 done
815 18:07:50.780815 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
816 18:07:50.784316 PCI: 00:15.1 scanning...
817 18:07:50.788130 scan_static_bus for PCI: 00:15.1
818 18:07:50.790835 scan_static_bus for PCI: 00:15.1 done
819 18:07:50.794510 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
820 18:07:50.798132 PCI: 00:15.2 scanning...
821 18:07:50.801017 scan_static_bus for PCI: 00:15.2
822 18:07:50.804419 GENERIC: 0.0 disabled
823 18:07:50.804533 I2C: 00:15 enabled
824 18:07:50.808159 I2C: 00:10 disabled
825 18:07:50.810733 I2C: 00:10 disabled
826 18:07:50.810812 I2C: 00:2c enabled
827 18:07:50.814003 I2C: 00:40 enabled
828 18:07:50.814106 I2C: 00:10 enabled
829 18:07:50.817548 I2C: 00:39 enabled
830 18:07:50.820659 scan_static_bus for PCI: 00:15.2 done
831 18:07:50.827621 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
832 18:07:50.828158 PCI: 00:15.3 scanning...
833 18:07:50.831290 scan_static_bus for PCI: 00:15.3
834 18:07:50.834600 I2C: 00:36 enabled
835 18:07:50.837429 I2C: 00:10 disabled
836 18:07:50.837703 I2C: 00:0c enabled
837 18:07:50.840716 I2C: 00:50 enabled
838 18:07:50.844422 scan_static_bus for PCI: 00:15.3 done
839 18:07:50.847490 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
840 18:07:50.850504 PCI: 00:19.0 scanning...
841 18:07:50.853834 scan_static_bus for PCI: 00:19.0
842 18:07:50.857367 I2C: 00:1a enabled
843 18:07:50.857487 I2C: 00:1a disabled
844 18:07:50.861024 I2C: 00:1a disabled
845 18:07:50.863751 I2C: 00:28 enabled
846 18:07:50.863871 I2C: 00:29 enabled
847 18:07:50.866725 scan_static_bus for PCI: 00:19.0 done
848 18:07:50.873401 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
849 18:07:50.876942 PCI: 00:1e.2 scanning...
850 18:07:50.880613 scan_generic_bus for PCI: 00:1e.2
851 18:07:50.881005 SPI: 00 enabled
852 18:07:50.887032 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
853 18:07:50.890292 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
854 18:07:50.893941 PCI: 00:1f.0 scanning...
855 18:07:50.896473 scan_static_bus for PCI: 00:1f.0
856 18:07:50.900008 PNP: 0c09.0 enabled
857 18:07:50.903301 PNP: 0c09.0 scanning...
858 18:07:50.906916 scan_static_bus for PNP: 0c09.0
859 18:07:50.909644 scan_static_bus for PNP: 0c09.0 done
860 18:07:50.913084 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
861 18:07:50.916866 scan_static_bus for PCI: 00:1f.0 done
862 18:07:50.922849 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
863 18:07:50.922927 PCI: 00:1f.3 scanning...
864 18:07:50.926354 scan_static_bus for PCI: 00:1f.3
865 18:07:50.929909 GENERIC: 0.0 disabled
866 18:07:50.932798 scan_static_bus for PCI: 00:1f.3 done
867 18:07:50.939820 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
868 18:07:50.939899 PCI: 00:1f.5 scanning...
869 18:07:50.946170 scan_generic_bus for PCI: 00:1f.5
870 18:07:50.950189 scan_generic_bus for PCI: 00:1f.5 done
871 18:07:50.953237 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
872 18:07:50.959626 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
873 18:07:50.963205 scan_static_bus for Root Device done
874 18:07:50.966881 scan_bus: bus Root Device finished in 665 msecs
875 18:07:50.966985 done
876 18:07:50.973203 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
877 18:07:50.976364 Chrome EC: UHEPI supported
878 18:07:50.982783 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
879 18:07:50.989741 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
880 18:07:50.992690 SPI flash protection: WPSW=0 SRP0=0
881 18:07:50.996588 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
882 18:07:51.002443 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
883 18:07:51.006179 found VGA at PCI: 00:02.0
884 18:07:51.009148 Setting up VGA for PCI: 00:02.0
885 18:07:51.012770 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
886 18:07:51.019209 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
887 18:07:51.022347 Allocating resources...
888 18:07:51.022433 Reading resources...
889 18:07:51.028895 Root Device read_resources bus 0 link: 0
890 18:07:51.032607 CPU_CLUSTER: 0 read_resources bus 0 link: 0
891 18:07:51.035624 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
892 18:07:51.042895 DOMAIN: 0000 read_resources bus 0 link: 0
893 18:07:51.045737 PCI: 00:04.0 read_resources bus 1 link: 0
894 18:07:51.052732 PCI: 00:04.0 read_resources bus 1 link: 0 done
895 18:07:51.055743 PCI: 00:05.0 read_resources bus 2 link: 0
896 18:07:51.062570 PCI: 00:05.0 read_resources bus 2 link: 0 done
897 18:07:51.066134 PCI: 00:14.0 read_resources bus 0 link: 0
898 18:07:51.070031 USB0 port 0 read_resources bus 0 link: 0
899 18:07:51.077540 USB0 port 0 read_resources bus 0 link: 0 done
900 18:07:51.080668 PCI: 00:14.0 read_resources bus 0 link: 0 done
901 18:07:51.084470 PCI: 00:14.3 read_resources bus 0 link: 0
902 18:07:51.143990 PCI: 00:14.3 read_resources bus 0 link: 0 done
903 18:07:51.144123 PCI: 00:15.0 read_resources bus 0 link: 0
904 18:07:51.144415 PCI: 00:15.0 read_resources bus 0 link: 0 done
905 18:07:51.144865 PCI: 00:15.2 read_resources bus 0 link: 0
906 18:07:51.145150 PCI: 00:15.2 read_resources bus 0 link: 0 done
907 18:07:51.145219 PCI: 00:15.3 read_resources bus 0 link: 0
908 18:07:51.146254 PCI: 00:15.3 read_resources bus 0 link: 0 done
909 18:07:51.146544 PCI: 00:19.0 read_resources bus 0 link: 0
910 18:07:51.146635 PCI: 00:19.0 read_resources bus 0 link: 0 done
911 18:07:51.146719 PCI: 00:1e.2 read_resources bus 3 link: 0
912 18:07:51.147088 PCI: 00:1e.2 read_resources bus 3 link: 0 done
913 18:07:51.195314 PCI: 00:1f.0 read_resources bus 0 link: 0
914 18:07:51.195427 PCI: 00:1f.0 read_resources bus 0 link: 0 done
915 18:07:51.195912 PCI: 00:1f.3 read_resources bus 0 link: 0
916 18:07:51.196171 PCI: 00:1f.3 read_resources bus 0 link: 0 done
917 18:07:51.196236 DOMAIN: 0000 read_resources bus 0 link: 0 done
918 18:07:51.196481 Root Device read_resources bus 0 link: 0 done
919 18:07:51.196924 Done reading resources.
920 18:07:51.197026 Show resources in subtree (Root Device)...After reading.
921 18:07:51.197665 Root Device child on link 0 CPU_CLUSTER: 0
922 18:07:51.197932 CPU_CLUSTER: 0 child on link 0 APIC: 00
923 18:07:51.198024 APIC: 00
924 18:07:51.198106 APIC: 02
925 18:07:51.198197 DOMAIN: 0000 child on link 0 PCI: 00:00.0
926 18:07:51.204551 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
927 18:07:51.213841 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
928 18:07:51.213920 PCI: 00:00.0
929 18:07:51.224284 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
930 18:07:51.233914 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
931 18:07:51.243775 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
932 18:07:51.250463 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
933 18:07:51.260492 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
934 18:07:51.270932 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
935 18:07:51.280868 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
936 18:07:51.290745 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
937 18:07:51.300215 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
938 18:07:51.306741 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
939 18:07:51.317156 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
940 18:07:51.327416 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
941 18:07:51.336580 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
942 18:07:51.343624 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
943 18:07:51.353319 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
944 18:07:51.363387 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
945 18:07:51.373548 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
946 18:07:51.383286 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
947 18:07:51.393079 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
948 18:07:51.393657 PCI: 00:02.0
949 18:07:51.403286 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
950 18:07:51.412782 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
951 18:07:51.423200 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
952 18:07:51.425983 PCI: 00:04.0 child on link 0 GENERIC: 0.0
953 18:07:51.436094 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
954 18:07:51.439404 GENERIC: 0.0
955 18:07:51.442594 PCI: 00:05.0 child on link 0 GENERIC: 0.0
956 18:07:51.452682 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
957 18:07:51.455604 GENERIC: 0.0
958 18:07:51.455775 PCI: 00:08.0
959 18:07:51.465360 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 18:07:51.472616 PCI: 00:14.0 child on link 0 USB0 port 0
961 18:07:51.482324 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
962 18:07:51.485417 USB0 port 0 child on link 0 USB2 port 0
963 18:07:51.489555 USB2 port 0
964 18:07:51.489933 USB2 port 1
965 18:07:51.491964 USB2 port 2
966 18:07:51.492240 USB2 port 3
967 18:07:51.495166 USB2 port 4
968 18:07:51.495335 USB2 port 5
969 18:07:51.499654 USB2 port 6
970 18:07:51.499908 USB2 port 7
971 18:07:51.502462 USB3 port 0
972 18:07:51.502668 USB3 port 1
973 18:07:51.505530 USB3 port 2
974 18:07:51.505742 USB3 port 3
975 18:07:51.508630 PCI: 00:14.2
976 18:07:51.512242 PCI: 00:14.3 child on link 0 GENERIC: 0.0
977 18:07:51.522115 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
978 18:07:51.525518 GENERIC: 0.0
979 18:07:51.525668 PCI: 00:14.5
980 18:07:51.534880 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
981 18:07:51.541532 PCI: 00:15.0 child on link 0 I2C: 00:2c
982 18:07:51.551626 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
983 18:07:51.551727 I2C: 00:2c
984 18:07:51.551788 I2C: 00:15
985 18:07:51.554736 PCI: 00:15.1
986 18:07:51.564651 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 18:07:51.568080 PCI: 00:15.2 child on link 0 GENERIC: 0.0
988 18:07:51.578118 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 18:07:51.581928 GENERIC: 0.0
990 18:07:51.582083 I2C: 00:15
991 18:07:51.584593 I2C: 00:10
992 18:07:51.584689 I2C: 00:10
993 18:07:51.588132 I2C: 00:2c
994 18:07:51.588242 I2C: 00:40
995 18:07:51.591641 I2C: 00:10
996 18:07:51.591774 I2C: 00:39
997 18:07:51.595214 PCI: 00:15.3 child on link 0 I2C: 00:36
998 18:07:51.604711 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 18:07:51.607958 I2C: 00:36
1000 18:07:51.608095 I2C: 00:10
1001 18:07:51.611166 I2C: 00:0c
1002 18:07:51.611278 I2C: 00:50
1003 18:07:51.614501 PCI: 00:16.0
1004 18:07:51.624331 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 18:07:51.627625 PCI: 00:19.0 child on link 0 I2C: 00:1a
1006 18:07:51.637548 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 18:07:51.641437 I2C: 00:1a
1008 18:07:51.641550 I2C: 00:1a
1009 18:07:51.644932 I2C: 00:1a
1010 18:07:51.645030 I2C: 00:28
1011 18:07:51.647271 I2C: 00:29
1012 18:07:51.647370 PCI: 00:19.2
1013 18:07:51.657547 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1014 18:07:51.667184 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1015 18:07:51.671053 PCI: 00:1a.0
1016 18:07:51.680824 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 18:07:51.680936 PCI: 00:1e.0
1018 18:07:51.687215 PCI: 00:1e.2 child on link 0 SPI: 00
1019 18:07:51.697203 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1020 18:07:51.697311 SPI: 00
1021 18:07:51.700262 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1022 18:07:51.710499 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1023 18:07:51.710580 PNP: 0c09.0
1024 18:07:51.720747 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1025 18:07:51.723744 PCI: 00:1f.2
1026 18:07:51.730155 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1027 18:07:51.740348 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1028 18:07:51.743216 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1029 18:07:51.754833 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1030 18:07:51.764369 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1031 18:07:51.768171 GENERIC: 0.0
1032 18:07:51.768281 PCI: 00:1f.5
1033 18:07:51.778430 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1034 18:07:51.784493 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1035 18:07:51.791332 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1036 18:07:51.798090 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1037 18:07:51.808056 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1038 18:07:51.814122 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1039 18:07:51.820850 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1040 18:07:51.824259 DOMAIN: 0000: Resource ranges:
1041 18:07:51.827433 * Base: 1000, Size: 800, Tag: 100
1042 18:07:51.831195 * Base: 1900, Size: e700, Tag: 100
1043 18:07:51.837603 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1044 18:07:51.843970 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1045 18:07:51.850715 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1046 18:07:51.856960 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1047 18:07:51.867087 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1048 18:07:51.873500 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1049 18:07:51.880375 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1050 18:07:51.887183 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1051 18:07:51.896964 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1052 18:07:51.903597 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1053 18:07:51.910314 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1054 18:07:51.920023 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1055 18:07:51.926638 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1056 18:07:51.933407 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1057 18:07:51.942984 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1058 18:07:51.949372 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1059 18:07:51.956153 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1060 18:07:51.966400 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1061 18:07:51.972505 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1062 18:07:51.979392 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1063 18:07:51.989374 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1064 18:07:51.995910 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1065 18:07:52.002546 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1066 18:07:52.012210 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1067 18:07:52.015920 DOMAIN: 0000: Resource ranges:
1068 18:07:52.019302 * Base: 7fc00000, Size: 40400000, Tag: 200
1069 18:07:52.022500 * Base: d0000000, Size: 2b000000, Tag: 200
1070 18:07:52.029188 * Base: fb001000, Size: 2fff000, Tag: 200
1071 18:07:52.032328 * Base: fe010000, Size: 22000, Tag: 200
1072 18:07:52.035690 * Base: fe033000, Size: a4d000, Tag: 200
1073 18:07:52.039156 * Base: fea88000, Size: 2f8000, Tag: 200
1074 18:07:52.045393 * Base: fed88000, Size: 8000, Tag: 200
1075 18:07:52.048491 * Base: fed93000, Size: d000, Tag: 200
1076 18:07:52.052091 * Base: feda2000, Size: 125e000, Tag: 200
1077 18:07:52.058882 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1078 18:07:52.065252 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1079 18:07:52.072174 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1080 18:07:52.078514 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1081 18:07:52.085057 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1082 18:07:52.092117 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1083 18:07:52.098852 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1084 18:07:52.105418 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1085 18:07:52.111782 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1086 18:07:52.118480 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1087 18:07:52.125047 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1088 18:07:52.131410 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1089 18:07:52.138218 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1090 18:07:52.145012 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1091 18:07:52.151423 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1092 18:07:52.158365 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1093 18:07:52.164886 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1094 18:07:52.171308 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1095 18:07:52.178153 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1096 18:07:52.184654 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1097 18:07:52.191540 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1098 18:07:52.197855 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1099 18:07:52.204220 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1100 18:07:52.207791 Root Device assign_resources, bus 0 link: 0
1101 18:07:52.214285 DOMAIN: 0000 assign_resources, bus 0 link: 0
1102 18:07:52.220962 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1103 18:07:52.231608 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1104 18:07:52.237818 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1105 18:07:52.247582 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1106 18:07:52.250531 PCI: 00:04.0 assign_resources, bus 1 link: 0
1107 18:07:52.253982 PCI: 00:04.0 assign_resources, bus 1 link: 0
1108 18:07:52.263977 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1109 18:07:52.267186 PCI: 00:05.0 assign_resources, bus 2 link: 0
1110 18:07:52.273614 PCI: 00:05.0 assign_resources, bus 2 link: 0
1111 18:07:52.280062 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1112 18:07:52.286875 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1113 18:07:52.293632 PCI: 00:14.0 assign_resources, bus 0 link: 0
1114 18:07:52.297273 PCI: 00:14.0 assign_resources, bus 0 link: 0
1115 18:07:52.307295 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1116 18:07:52.309952 PCI: 00:14.3 assign_resources, bus 0 link: 0
1117 18:07:52.317313 PCI: 00:14.3 assign_resources, bus 0 link: 0
1118 18:07:52.323337 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1119 18:07:52.330274 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1120 18:07:52.337263 PCI: 00:15.0 assign_resources, bus 0 link: 0
1121 18:07:52.340210 PCI: 00:15.0 assign_resources, bus 0 link: 0
1122 18:07:52.349970 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1123 18:07:52.356685 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1124 18:07:52.359891 PCI: 00:15.2 assign_resources, bus 0 link: 0
1125 18:07:52.367211 PCI: 00:15.2 assign_resources, bus 0 link: 0
1126 18:07:52.373557 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1127 18:07:52.380239 PCI: 00:15.3 assign_resources, bus 0 link: 0
1128 18:07:52.383158 PCI: 00:15.3 assign_resources, bus 0 link: 0
1129 18:07:52.390028 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1130 18:07:52.400094 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1131 18:07:52.403166 PCI: 00:19.0 assign_resources, bus 0 link: 0
1132 18:07:52.410280 PCI: 00:19.0 assign_resources, bus 0 link: 0
1133 18:07:52.416548 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1134 18:07:52.426505 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1135 18:07:52.432675 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1136 18:07:52.436654 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1137 18:07:52.442980 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1138 18:07:52.446068 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1139 18:07:52.452999 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1140 18:07:52.456053 LPC: Trying to open IO window from 800 size 1ff
1141 18:07:52.465862 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1142 18:07:52.472647 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1143 18:07:52.475887 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1144 18:07:52.482493 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1145 18:07:52.489142 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1146 18:07:52.495567 DOMAIN: 0000 assign_resources, bus 0 link: 0
1147 18:07:52.498911 Root Device assign_resources, bus 0 link: 0
1148 18:07:52.502480 Done setting resources.
1149 18:07:52.509085 Show resources in subtree (Root Device)...After assigning values.
1150 18:07:52.512464 Root Device child on link 0 CPU_CLUSTER: 0
1151 18:07:52.515861 CPU_CLUSTER: 0 child on link 0 APIC: 00
1152 18:07:52.519036 APIC: 00
1153 18:07:52.519114 APIC: 02
1154 18:07:52.522048 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1155 18:07:52.532100 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1156 18:07:52.541791 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1157 18:07:52.545588 PCI: 00:00.0
1158 18:07:52.555933 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1159 18:07:52.561810 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1160 18:07:52.571929 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1161 18:07:52.581500 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1162 18:07:52.591722 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1163 18:07:52.601385 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1164 18:07:52.608181 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1165 18:07:52.617960 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1166 18:07:52.627960 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1167 18:07:52.637968 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1168 18:07:52.647930 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1169 18:07:52.657818 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1170 18:07:52.664764 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1171 18:07:52.674682 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1172 18:07:52.684332 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1173 18:07:52.694287 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1174 18:07:52.704117 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1175 18:07:52.714073 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1176 18:07:52.720425 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1177 18:07:52.724249 PCI: 00:02.0
1178 18:07:52.734108 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1179 18:07:52.743845 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1180 18:07:52.753443 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1181 18:07:52.757229 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1182 18:07:52.770119 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1183 18:07:52.770198 GENERIC: 0.0
1184 18:07:52.773678 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1185 18:07:52.786577 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1186 18:07:52.786656 GENERIC: 0.0
1187 18:07:52.789921 PCI: 00:08.0
1188 18:07:52.799862 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1189 18:07:52.803689 PCI: 00:14.0 child on link 0 USB0 port 0
1190 18:07:52.813083 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1191 18:07:52.820318 USB0 port 0 child on link 0 USB2 port 0
1192 18:07:52.820394 USB2 port 0
1193 18:07:52.822964 USB2 port 1
1194 18:07:52.823041 USB2 port 2
1195 18:07:52.826719 USB2 port 3
1196 18:07:52.826795 USB2 port 4
1197 18:07:52.829599 USB2 port 5
1198 18:07:52.829674 USB2 port 6
1199 18:07:52.833145 USB2 port 7
1200 18:07:52.833221 USB3 port 0
1201 18:07:52.836597 USB3 port 1
1202 18:07:52.836673 USB3 port 2
1203 18:07:52.839609 USB3 port 3
1204 18:07:52.839685 PCI: 00:14.2
1205 18:07:52.846376 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1206 18:07:52.857370 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1207 18:07:52.857451 GENERIC: 0.0
1208 18:07:52.859525 PCI: 00:14.5
1209 18:07:52.869883 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1210 18:07:52.872785 PCI: 00:15.0 child on link 0 I2C: 00:2c
1211 18:07:52.882537 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1212 18:07:52.886273 I2C: 00:2c
1213 18:07:52.886349 I2C: 00:15
1214 18:07:52.889171 PCI: 00:15.1
1215 18:07:52.899127 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1216 18:07:52.902614 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1217 18:07:52.912479 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1218 18:07:52.915722 GENERIC: 0.0
1219 18:07:52.915800 I2C: 00:15
1220 18:07:52.919088 I2C: 00:10
1221 18:07:52.919188 I2C: 00:10
1222 18:07:52.922429 I2C: 00:2c
1223 18:07:52.922506 I2C: 00:40
1224 18:07:52.925698 I2C: 00:10
1225 18:07:52.925797 I2C: 00:39
1226 18:07:52.932129 PCI: 00:15.3 child on link 0 I2C: 00:36
1227 18:07:52.942524 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1228 18:07:52.942604 I2C: 00:36
1229 18:07:52.945477 I2C: 00:10
1230 18:07:52.945552 I2C: 00:0c
1231 18:07:52.949211 I2C: 00:50
1232 18:07:52.949310 PCI: 00:16.0
1233 18:07:52.958826 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1234 18:07:52.962148 PCI: 00:19.0 child on link 0 I2C: 00:1a
1235 18:07:52.975543 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1236 18:07:52.975622 I2C: 00:1a
1237 18:07:52.978995 I2C: 00:1a
1238 18:07:52.979071 I2C: 00:1a
1239 18:07:52.979136 I2C: 00:28
1240 18:07:52.981842 I2C: 00:29
1241 18:07:52.981918 PCI: 00:19.2
1242 18:07:52.994900 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1243 18:07:53.005334 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1244 18:07:53.005412 PCI: 00:1a.0
1245 18:07:53.018457 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1246 18:07:53.018535 PCI: 00:1e.0
1247 18:07:53.021822 PCI: 00:1e.2 child on link 0 SPI: 00
1248 18:07:53.031318 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1249 18:07:53.034675 SPI: 00
1250 18:07:53.038924 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1251 18:07:53.048055 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1252 18:07:53.048133 PNP: 0c09.0
1253 18:07:53.058351 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1254 18:07:53.058428 PCI: 00:1f.2
1255 18:07:53.067738 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1256 18:07:53.077465 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1257 18:07:53.081276 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1258 18:07:53.090894 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1259 18:07:53.104467 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1260 18:07:53.104546 GENERIC: 0.0
1261 18:07:53.107295 PCI: 00:1f.5
1262 18:07:53.117454 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1263 18:07:53.120803 Done allocating resources.
1264 18:07:53.123856 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2096 ms
1265 18:07:53.127552 Enabling resources...
1266 18:07:53.130870 PCI: 00:00.0 subsystem <- 8086/4e22
1267 18:07:53.134517 PCI: 00:00.0 cmd <- 06
1268 18:07:53.137926 PCI: 00:02.0 subsystem <- 8086/4e55
1269 18:07:53.141426 PCI: 00:02.0 cmd <- 03
1270 18:07:53.144383 PCI: 00:04.0 subsystem <- 8086/4e03
1271 18:07:53.147687 PCI: 00:04.0 cmd <- 02
1272 18:07:53.151115 PCI: 00:05.0 bridge ctrl <- 0003
1273 18:07:53.154293 PCI: 00:05.0 subsystem <- 8086/4e19
1274 18:07:53.157397 PCI: 00:05.0 cmd <- 02
1275 18:07:53.157471 PCI: 00:08.0 cmd <- 06
1276 18:07:53.164000 PCI: 00:14.0 subsystem <- 8086/4ded
1277 18:07:53.164075 PCI: 00:14.0 cmd <- 02
1278 18:07:53.167196 PCI: 00:14.3 subsystem <- 8086/4df0
1279 18:07:53.170460 PCI: 00:14.3 cmd <- 02
1280 18:07:53.173864 PCI: 00:14.5 subsystem <- 8086/4df8
1281 18:07:53.177123 PCI: 00:14.5 cmd <- 06
1282 18:07:53.180351 PCI: 00:15.0 subsystem <- 8086/4de8
1283 18:07:53.184086 PCI: 00:15.0 cmd <- 02
1284 18:07:53.187054 PCI: 00:15.1 subsystem <- 8086/4de9
1285 18:07:53.190102 PCI: 00:15.1 cmd <- 02
1286 18:07:53.193610 PCI: 00:15.2 subsystem <- 8086/4dea
1287 18:07:53.197305 PCI: 00:15.2 cmd <- 02
1288 18:07:53.200639 PCI: 00:15.3 subsystem <- 8086/4deb
1289 18:07:53.200715 PCI: 00:15.3 cmd <- 02
1290 18:07:53.204076 PCI: 00:16.0 subsystem <- 8086/4de0
1291 18:07:53.206969 PCI: 00:16.0 cmd <- 02
1292 18:07:53.210117 PCI: 00:19.0 subsystem <- 8086/4dc5
1293 18:07:53.213726 PCI: 00:19.0 cmd <- 02
1294 18:07:53.217479 PCI: 00:19.2 subsystem <- 8086/4dc7
1295 18:07:53.220255 PCI: 00:19.2 cmd <- 06
1296 18:07:53.223611 PCI: 00:1a.0 subsystem <- 8086/4dc4
1297 18:07:53.226816 PCI: 00:1a.0 cmd <- 06
1298 18:07:53.230594 PCI: 00:1e.2 subsystem <- 8086/4daa
1299 18:07:53.233641 PCI: 00:1e.2 cmd <- 06
1300 18:07:53.236688 PCI: 00:1f.0 subsystem <- 8086/4d87
1301 18:07:53.236764 PCI: 00:1f.0 cmd <- 407
1302 18:07:53.243597 PCI: 00:1f.3 subsystem <- 8086/4dc8
1303 18:07:53.243673 PCI: 00:1f.3 cmd <- 02
1304 18:07:53.246820 PCI: 00:1f.5 subsystem <- 8086/4da4
1305 18:07:53.250341 PCI: 00:1f.5 cmd <- 406
1306 18:07:53.255430 done.
1307 18:07:53.258365 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1308 18:07:53.261891 Initializing devices...
1309 18:07:53.264847 Root Device init
1310 18:07:53.264921 mainboard: EC init
1311 18:07:53.271458 Chrome EC: Set SMI mask to 0x0000000000000000
1312 18:07:53.274766 Chrome EC: clear events_b mask to 0x0000000000000000
1313 18:07:53.281845 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1314 18:07:53.288187 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1315 18:07:53.294888 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1316 18:07:53.298328 Chrome EC: Set WAKE mask to 0x0000000000000000
1317 18:07:53.301412 Root Device init finished in 35 msecs
1318 18:07:53.305385 PCI: 00:00.0 init
1319 18:07:53.309128 CPU TDP = 6 Watts
1320 18:07:53.309260 CPU PL1 = 7 Watts
1321 18:07:53.312013 CPU PL2 = 12 Watts
1322 18:07:53.315597 PCI: 00:00.0 init finished in 6 msecs
1323 18:07:53.318852 PCI: 00:02.0 init
1324 18:07:53.322338 GMA: Found VBT in CBFS
1325 18:07:53.322415 GMA: Found valid VBT in CBFS
1326 18:07:53.328932 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1327 18:07:53.335699 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1328 18:07:53.342411 PCI: 00:02.0 init finished in 18 msecs
1329 18:07:53.342488 PCI: 00:08.0 init
1330 18:07:53.348497 PCI: 00:08.0 init finished in 0 msecs
1331 18:07:53.348574 PCI: 00:14.0 init
1332 18:07:53.352144 XHCI: Updated LFPS sampling OFF time to 9 ms
1333 18:07:53.358610 PCI: 00:14.0 init finished in 4 msecs
1334 18:07:53.358688 PCI: 00:15.0 init
1335 18:07:53.362296 I2C bus 0 version 0x3230302a
1336 18:07:53.365640 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1337 18:07:53.372031 PCI: 00:15.0 init finished in 6 msecs
1338 18:07:53.372108 PCI: 00:15.1 init
1339 18:07:53.374864 I2C bus 1 version 0x3230302a
1340 18:07:53.378604 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1341 18:07:53.381693 PCI: 00:15.1 init finished in 6 msecs
1342 18:07:53.385145 PCI: 00:15.2 init
1343 18:07:53.388843 I2C bus 2 version 0x3230302a
1344 18:07:53.391790 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1345 18:07:53.395314 PCI: 00:15.2 init finished in 6 msecs
1346 18:07:53.398426 PCI: 00:15.3 init
1347 18:07:53.401636 I2C bus 3 version 0x3230302a
1348 18:07:53.405348 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1349 18:07:53.408384 PCI: 00:15.3 init finished in 6 msecs
1350 18:07:53.411459 PCI: 00:16.0 init
1351 18:07:53.415195 PCI: 00:16.0 init finished in 0 msecs
1352 18:07:53.415272 PCI: 00:19.0 init
1353 18:07:53.418614 I2C bus 4 version 0x3230302a
1354 18:07:53.421464 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1355 18:07:53.424750 PCI: 00:19.0 init finished in 6 msecs
1356 18:07:53.429008 PCI: 00:1a.0 init
1357 18:07:53.432260 PCI: 00:1a.0 init finished in 0 msecs
1358 18:07:53.435489 PCI: 00:1f.0 init
1359 18:07:53.438933 IOAPIC: Initializing IOAPIC at 0xfec00000
1360 18:07:53.446029 IOAPIC: Bootstrap Processor Local APIC = 0x00
1361 18:07:53.446106 IOAPIC: ID = 0x02
1362 18:07:53.448932 IOAPIC: Dumping registers
1363 18:07:53.452146 reg 0x0000: 0x02000000
1364 18:07:53.452246 reg 0x0001: 0x00770020
1365 18:07:53.455306 reg 0x0002: 0x00000000
1366 18:07:53.459190 PCI: 00:1f.0 init finished in 21 msecs
1367 18:07:53.461825 PCI: 00:1f.2 init
1368 18:07:53.465951 Disabling ACPI via APMC.
1369 18:07:53.468876 APMC done.
1370 18:07:53.472528 PCI: 00:1f.2 init finished in 5 msecs
1371 18:07:53.482621 PNP: 0c09.0 init
1372 18:07:53.486272 Google Chrome EC uptime: 6.533 seconds
1373 18:07:53.492947 Google Chrome AP resets since EC boot: 0
1374 18:07:53.496647 Google Chrome most recent AP reset causes:
1375 18:07:53.502787 Google Chrome EC reset flags at last EC boot: reset-pin
1376 18:07:53.506240 PNP: 0c09.0 init finished in 18 msecs
1377 18:07:53.506316 Devices initialized
1378 18:07:53.509083 Show all devs... After init.
1379 18:07:53.512747 Root Device: enabled 1
1380 18:07:53.515915 CPU_CLUSTER: 0: enabled 1
1381 18:07:53.519332 DOMAIN: 0000: enabled 1
1382 18:07:53.519411 PCI: 00:00.0: enabled 1
1383 18:07:53.522646 PCI: 00:02.0: enabled 1
1384 18:07:53.525910 PCI: 00:04.0: enabled 1
1385 18:07:53.525986 PCI: 00:05.0: enabled 1
1386 18:07:53.529112 PCI: 00:09.0: enabled 0
1387 18:07:53.532447 PCI: 00:12.6: enabled 0
1388 18:07:53.535795 PCI: 00:14.0: enabled 1
1389 18:07:53.535872 PCI: 00:14.1: enabled 0
1390 18:07:53.538959 PCI: 00:14.2: enabled 0
1391 18:07:53.542198 PCI: 00:14.3: enabled 1
1392 18:07:53.546110 PCI: 00:14.5: enabled 1
1393 18:07:53.546185 PCI: 00:15.0: enabled 1
1394 18:07:53.548943 PCI: 00:15.1: enabled 1
1395 18:07:53.552503 PCI: 00:15.2: enabled 1
1396 18:07:53.556228 PCI: 00:15.3: enabled 1
1397 18:07:53.556325 PCI: 00:16.0: enabled 1
1398 18:07:53.559264 PCI: 00:16.1: enabled 0
1399 18:07:53.562224 PCI: 00:16.4: enabled 0
1400 18:07:53.562299 PCI: 00:16.5: enabled 0
1401 18:07:53.565638 PCI: 00:17.0: enabled 0
1402 18:07:53.569101 PCI: 00:19.0: enabled 1
1403 18:07:53.572028 PCI: 00:19.1: enabled 0
1404 18:07:53.572104 PCI: 00:19.2: enabled 1
1405 18:07:53.575783 PCI: 00:1a.0: enabled 1
1406 18:07:53.578837 PCI: 00:1c.0: enabled 0
1407 18:07:53.582401 PCI: 00:1c.1: enabled 0
1408 18:07:53.582481 PCI: 00:1c.2: enabled 0
1409 18:07:53.585548 PCI: 00:1c.3: enabled 0
1410 18:07:53.588906 PCI: 00:1c.4: enabled 0
1411 18:07:53.591947 PCI: 00:1c.5: enabled 0
1412 18:07:53.592023 PCI: 00:1c.6: enabled 0
1413 18:07:53.595286 PCI: 00:1c.7: enabled 1
1414 18:07:53.598546 PCI: 00:1e.0: enabled 0
1415 18:07:53.602057 PCI: 00:1e.1: enabled 0
1416 18:07:53.602135 PCI: 00:1e.2: enabled 1
1417 18:07:53.605151 PCI: 00:1e.3: enabled 0
1418 18:07:53.608519 PCI: 00:1f.0: enabled 1
1419 18:07:53.608598 PCI: 00:1f.1: enabled 0
1420 18:07:53.612067 PCI: 00:1f.2: enabled 1
1421 18:07:53.615230 PCI: 00:1f.3: enabled 1
1422 18:07:53.618580 PCI: 00:1f.4: enabled 0
1423 18:07:53.618658 PCI: 00:1f.5: enabled 1
1424 18:07:53.622419 PCI: 00:1f.7: enabled 0
1425 18:07:53.625254 GENERIC: 0.0: enabled 1
1426 18:07:53.628422 GENERIC: 0.0: enabled 1
1427 18:07:53.628498 USB0 port 0: enabled 1
1428 18:07:53.631699 GENERIC: 0.0: enabled 1
1429 18:07:53.634883 I2C: 00:2c: enabled 1
1430 18:07:53.634960 I2C: 00:15: enabled 1
1431 18:07:53.638229 GENERIC: 0.0: enabled 0
1432 18:07:53.641887 I2C: 00:15: enabled 1
1433 18:07:53.641967 I2C: 00:10: enabled 0
1434 18:07:53.645008 I2C: 00:10: enabled 0
1435 18:07:53.648408 I2C: 00:2c: enabled 1
1436 18:07:53.651979 I2C: 00:40: enabled 1
1437 18:07:53.652058 I2C: 00:10: enabled 1
1438 18:07:53.655072 I2C: 00:39: enabled 1
1439 18:07:53.658661 I2C: 00:36: enabled 1
1440 18:07:53.658740 I2C: 00:10: enabled 0
1441 18:07:53.662037 I2C: 00:0c: enabled 1
1442 18:07:53.665356 I2C: 00:50: enabled 1
1443 18:07:53.665432 I2C: 00:1a: enabled 1
1444 18:07:53.667984 I2C: 00:1a: enabled 0
1445 18:07:53.671626 I2C: 00:1a: enabled 0
1446 18:07:53.671702 I2C: 00:28: enabled 1
1447 18:07:53.674750 I2C: 00:29: enabled 1
1448 18:07:53.678574 PCI: 00:00.0: enabled 1
1449 18:07:53.678649 SPI: 00: enabled 1
1450 18:07:53.681342 PNP: 0c09.0: enabled 1
1451 18:07:53.685080 GENERIC: 0.0: enabled 0
1452 18:07:53.685165 USB2 port 0: enabled 1
1453 18:07:53.688046 USB2 port 1: enabled 1
1454 18:07:53.691512 USB2 port 2: enabled 1
1455 18:07:53.694801 USB2 port 3: enabled 1
1456 18:07:53.694897 USB2 port 4: enabled 0
1457 18:07:53.698109 USB2 port 5: enabled 1
1458 18:07:53.701718 USB2 port 6: enabled 0
1459 18:07:53.701795 USB2 port 7: enabled 1
1460 18:07:53.704630 USB3 port 0: enabled 1
1461 18:07:53.707821 USB3 port 1: enabled 1
1462 18:07:53.707898 USB3 port 2: enabled 1
1463 18:07:53.711315 USB3 port 3: enabled 1
1464 18:07:53.714991 APIC: 00: enabled 1
1465 18:07:53.715066 APIC: 02: enabled 1
1466 18:07:53.717795 PCI: 00:08.0: enabled 1
1467 18:07:53.724676 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1468 18:07:53.728011 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1469 18:07:53.731280 ELOG: NV offset 0xbfa000 size 0x1000
1470 18:07:53.738918 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1471 18:07:53.745515 ELOG: Event(17) added with size 13 at 2024-07-12 18:07:52 UTC
1472 18:07:53.752217 ELOG: Event(92) added with size 9 at 2024-07-12 18:07:52 UTC
1473 18:07:53.758746 ELOG: Event(93) added with size 9 at 2024-07-12 18:07:52 UTC
1474 18:07:53.766022 ELOG: Event(9E) added with size 10 at 2024-07-12 18:07:52 UTC
1475 18:07:53.772605 ELOG: Event(9F) added with size 14 at 2024-07-12 18:07:52 UTC
1476 18:07:53.776093 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1477 18:07:53.782396 ELOG: Event(A1) added with size 10 at 2024-07-12 18:07:52 UTC
1478 18:07:53.792118 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x01
1479 18:07:53.798695 ELOG: Event(A0) added with size 9 at 2024-07-12 18:07:52 UTC
1480 18:07:53.802378 elog_add_boot_reason: Logged dev mode boot
1481 18:07:53.808891 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1482 18:07:53.808968 Finalize devices...
1483 18:07:53.812355 Devices finalized
1484 18:07:53.815504 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1485 18:07:53.822159 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1486 18:07:53.828553 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1487 18:07:53.832152 ME: HFSTS1 : 0x80030045
1488 18:07:53.835711 ME: HFSTS2 : 0x30280136
1489 18:07:53.838875 ME: HFSTS3 : 0x00000050
1490 18:07:53.845058 ME: HFSTS4 : 0x00004000
1491 18:07:53.848599 ME: HFSTS5 : 0x00000000
1492 18:07:53.851859 ME: HFSTS6 : 0x40400006
1493 18:07:53.855191 ME: Manufacturing Mode : NO
1494 18:07:53.858840 ME: FW Partition Table : OK
1495 18:07:53.862291 ME: Bringup Loader Failure : NO
1496 18:07:53.865109 ME: Firmware Init Complete : NO
1497 18:07:53.868564 ME: Boot Options Present : NO
1498 18:07:53.872064 ME: Update In Progress : NO
1499 18:07:53.875155 ME: D0i3 Support : YES
1500 18:07:53.878538 ME: Low Power State Enabled : NO
1501 18:07:53.881842 ME: CPU Replaced : YES
1502 18:07:53.885059 ME: CPU Replacement Valid : YES
1503 18:07:53.888537 ME: Current Working State : 5
1504 18:07:53.891820 ME: Current Operation State : 1
1505 18:07:53.895979 ME: Current Operation Mode : 3
1506 18:07:53.898401 ME: Error Code : 0
1507 18:07:53.901716 ME: CPU Debug Disabled : YES
1508 18:07:53.905222 ME: TXT Support : NO
1509 18:07:53.911555 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1510 18:07:53.914834 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1511 18:07:53.922903 ACPI: Writing ACPI tables at 76b27000.
1512 18:07:53.922981 ACPI: * FACS
1513 18:07:53.925332 ACPI: * DSDT
1514 18:07:53.928874 Ramoops buffer: 0x100000@0x76a26000.
1515 18:07:53.931970 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1516 18:07:53.938802 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1517 18:07:53.942218 Google Chrome EC: version:
1518 18:07:53.945975 ro: magolor_1.1.9999-103b6f9
1519 18:07:53.948796 rw: magolor_1.1.9999-103b6f9
1520 18:07:53.948872 running image: 1
1521 18:07:53.955109 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1522 18:07:53.958850 ACPI: * FADT
1523 18:07:53.958927 SCI is IRQ9
1524 18:07:53.965803 ACPI: added table 1/32, length now 40
1525 18:07:53.965879 ACPI: * SSDT
1526 18:07:53.968866 Found 1 CPU(s) with 2 core(s) each.
1527 18:07:53.972554 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1528 18:07:53.979043 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1529 18:07:53.982258 Could not locate 'wifi_sar' in VPD.
1530 18:07:53.985557 Checking CBFS for default SAR values
1531 18:07:53.992068 wifi_sar_defaults.hex has bad len in CBFS
1532 18:07:53.996146 failed from getting SAR limits!
1533 18:07:53.999233 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1534 18:07:54.005591 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1535 18:07:54.009585 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1536 18:07:54.015527 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1537 18:07:54.019226 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1538 18:07:54.025822 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1539 18:07:54.028827 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1540 18:07:54.035403 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1541 18:07:54.041964 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1542 18:07:54.045531 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1543 18:07:54.052447 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1544 18:07:54.058586 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1545 18:07:54.061984 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1546 18:07:54.068505 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1547 18:07:54.071880 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1548 18:07:54.080539 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1549 18:07:54.084084 PS2K: Passing 101 keymaps to kernel
1550 18:07:54.090384 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1551 18:07:54.097078 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1552 18:07:54.100416 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1553 18:07:54.107294 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1554 18:07:54.113716 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1555 18:07:54.117078 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1556 18:07:54.123308 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1557 18:07:54.130186 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1558 18:07:54.133480 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1559 18:07:54.139942 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1560 18:07:54.143968 ACPI: added table 2/32, length now 44
1561 18:07:54.147190 ACPI: * MCFG
1562 18:07:54.150232 ACPI: added table 3/32, length now 48
1563 18:07:54.150308 ACPI: * TPM2
1564 18:07:54.153428 TPM2 log created at 0x76a16000
1565 18:07:54.157338 ACPI: added table 4/32, length now 52
1566 18:07:54.160258 ACPI: * MADT
1567 18:07:54.160334 SCI is IRQ9
1568 18:07:54.163296 ACPI: added table 5/32, length now 56
1569 18:07:54.166601 current = 76b2d580
1570 18:07:54.170239 ACPI: * DMAR
1571 18:07:54.173363 ACPI: added table 6/32, length now 60
1572 18:07:54.176333 ACPI: added table 7/32, length now 64
1573 18:07:54.176409 ACPI: * HPET
1574 18:07:54.183162 ACPI: added table 8/32, length now 68
1575 18:07:54.183238 ACPI: done.
1576 18:07:54.186688 ACPI tables: 26304 bytes.
1577 18:07:54.189902 smbios_write_tables: 76a15000
1578 18:07:54.193358 EC returned error result code 3
1579 18:07:54.196729 Couldn't obtain OEM name from CBI
1580 18:07:54.200235 Create SMBIOS type 16
1581 18:07:54.200311 Create SMBIOS type 17
1582 18:07:54.203350 GENERIC: 0.0 (WIFI Device)
1583 18:07:54.206335 SMBIOS tables: 913 bytes.
1584 18:07:54.209736 Writing table forward entry at 0x00000500
1585 18:07:54.216588 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1586 18:07:54.220230 Writing coreboot table at 0x76b4b000
1587 18:07:54.226067 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1588 18:07:54.229287 1. 0000000000001000-000000000009ffff: RAM
1589 18:07:54.236111 2. 00000000000a0000-00000000000fffff: RESERVED
1590 18:07:54.239505 3. 0000000000100000-0000000076a14fff: RAM
1591 18:07:54.246109 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1592 18:07:54.249149 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1593 18:07:54.256501 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1594 18:07:54.259065 7. 0000000077000000-000000007fbfffff: RESERVED
1595 18:07:54.265644 8. 00000000c0000000-00000000cfffffff: RESERVED
1596 18:07:54.269248 9. 00000000fb000000-00000000fb000fff: RESERVED
1597 18:07:54.276211 10. 00000000fe000000-00000000fe00ffff: RESERVED
1598 18:07:54.279140 11. 00000000fea80000-00000000fea87fff: RESERVED
1599 18:07:54.285493 12. 00000000fed80000-00000000fed87fff: RESERVED
1600 18:07:54.289128 13. 00000000fed90000-00000000fed92fff: RESERVED
1601 18:07:54.292763 14. 00000000feda0000-00000000feda1fff: RESERVED
1602 18:07:54.298934 15. 0000000100000000-00000001803fffff: RAM
1603 18:07:54.303127 Passing 4 GPIOs to payload:
1604 18:07:54.305750 NAME | PORT | POLARITY | VALUE
1605 18:07:54.312846 lid | undefined | high | high
1606 18:07:54.315658 power | undefined | high | low
1607 18:07:54.322913 oprom | undefined | high | low
1608 18:07:54.328712 EC in RW | 0x000000b9 | high | low
1609 18:07:54.332082 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum da7d
1610 18:07:54.335395 coreboot table: 1504 bytes.
1611 18:07:54.338746 IMD ROOT 0. 0x76fff000 0x00001000
1612 18:07:54.345673 IMD SMALL 1. 0x76ffe000 0x00001000
1613 18:07:54.348926 FSP MEMORY 2. 0x76c4e000 0x003b0000
1614 18:07:54.351990 CONSOLE 3. 0x76c2e000 0x00020000
1615 18:07:54.355636 FMAP 4. 0x76c2d000 0x00000578
1616 18:07:54.358963 TIME STAMP 5. 0x76c2c000 0x00000910
1617 18:07:54.362086 VBOOT WORK 6. 0x76c18000 0x00014000
1618 18:07:54.365549 ROMSTG STCK 7. 0x76c17000 0x00001000
1619 18:07:54.369078 AFTER CAR 8. 0x76c0d000 0x0000a000
1620 18:07:54.372326 RAMSTAGE 9. 0x76ba7000 0x00066000
1621 18:07:54.378717 REFCODE 10. 0x76b67000 0x00040000
1622 18:07:54.381908 SMM BACKUP 11. 0x76b57000 0x00010000
1623 18:07:54.385297 4f444749 12. 0x76b55000 0x00002000
1624 18:07:54.388432 EXT VBT13. 0x76b53000 0x00001c43
1625 18:07:54.392038 COREBOOT 14. 0x76b4b000 0x00008000
1626 18:07:54.395633 ACPI 15. 0x76b27000 0x00024000
1627 18:07:54.398852 ACPI GNVS 16. 0x76b26000 0x00001000
1628 18:07:54.402107 RAMOOPS 17. 0x76a26000 0x00100000
1629 18:07:54.405042 TPM2 TCGLOG18. 0x76a16000 0x00010000
1630 18:07:54.412349 SMBIOS 19. 0x76a15000 0x00000800
1631 18:07:54.412427 IMD small region:
1632 18:07:54.415103 IMD ROOT 0. 0x76ffec00 0x00000400
1633 18:07:54.418223 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1634 18:07:54.425372 VPD 2. 0x76ffeba0 0x00000027
1635 18:07:54.428902 POWER STATE 3. 0x76ffeb60 0x00000040
1636 18:07:54.431670 ROMSTAGE 4. 0x76ffeb40 0x00000004
1637 18:07:54.435602 MEM INFO 5. 0x76ffe960 0x000001e0
1638 18:07:54.441516 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1639 18:07:54.445112 MTRR: Physical address space:
1640 18:07:54.452059 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1641 18:07:54.458170 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1642 18:07:54.461954 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1643 18:07:54.467935 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1644 18:07:54.475107 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1645 18:07:54.481074 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1646 18:07:54.488271 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1647 18:07:54.491688 MTRR: Fixed MSR 0x250 0x0606060606060606
1648 18:07:54.495049 MTRR: Fixed MSR 0x258 0x0606060606060606
1649 18:07:54.500959 MTRR: Fixed MSR 0x259 0x0000000000000000
1650 18:07:54.504838 MTRR: Fixed MSR 0x268 0x0606060606060606
1651 18:07:54.507549 MTRR: Fixed MSR 0x269 0x0606060606060606
1652 18:07:54.511416 MTRR: Fixed MSR 0x26a 0x0606060606060606
1653 18:07:54.517867 MTRR: Fixed MSR 0x26b 0x0606060606060606
1654 18:07:54.520802 MTRR: Fixed MSR 0x26c 0x0606060606060606
1655 18:07:54.524587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1656 18:07:54.527866 MTRR: Fixed MSR 0x26e 0x0606060606060606
1657 18:07:54.534281 MTRR: Fixed MSR 0x26f 0x0606060606060606
1658 18:07:54.534359 call enable_fixed_mtrr()
1659 18:07:54.541149 CPU physical address size: 39 bits
1660 18:07:54.544054 MTRR: default type WB/UC MTRR counts: 6/5.
1661 18:07:54.547686 MTRR: UC selected as default type.
1662 18:07:54.554136 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1663 18:07:54.560947 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1664 18:07:54.567739 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1665 18:07:54.570701 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1666 18:07:54.577238 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1667 18:07:54.580463
1668 18:07:54.580539 MTRR check
1669 18:07:54.584459 Fixed MTRRs : Enabled
1670 18:07:54.584536 Variable MTRRs: Enabled
1671 18:07:54.584595
1672 18:07:54.590478 MTRR: Fixed MSR 0x250 0x0606060606060606
1673 18:07:54.593643 MTRR: Fixed MSR 0x258 0x0606060606060606
1674 18:07:54.597141 MTRR: Fixed MSR 0x259 0x0000000000000000
1675 18:07:54.600580 MTRR: Fixed MSR 0x268 0x0606060606060606
1676 18:07:54.607259 MTRR: Fixed MSR 0x269 0x0606060606060606
1677 18:07:54.610651 MTRR: Fixed MSR 0x26a 0x0606060606060606
1678 18:07:54.613823 MTRR: Fixed MSR 0x26b 0x0606060606060606
1679 18:07:54.617223 MTRR: Fixed MSR 0x26c 0x0606060606060606
1680 18:07:54.620479 MTRR: Fixed MSR 0x26d 0x0606060606060606
1681 18:07:54.627005 MTRR: Fixed MSR 0x26e 0x0606060606060606
1682 18:07:54.630484 MTRR: Fixed MSR 0x26f 0x0606060606060606
1683 18:07:54.636951 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1684 18:07:54.640671 call enable_fixed_mtrr()
1685 18:07:54.644363 Checking cr50 for pending updates
1686 18:07:54.644439 CPU physical address size: 39 bits
1687 18:07:54.649387 Reading cr50 TPM mode
1688 18:07:54.659357 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1689 18:07:54.666424 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1690 18:07:54.669608 Checking segment from ROM address 0xfff9d5b8
1691 18:07:54.676401 Checking segment from ROM address 0xfff9d5d4
1692 18:07:54.680084 Loading segment from ROM address 0xfff9d5b8
1693 18:07:54.683564 code (compression=0)
1694 18:07:54.689476 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1695 18:07:54.699980 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1696 18:07:54.703023 it's not compressed!
1697 18:07:54.827992 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1698 18:07:54.834390 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1699 18:07:54.842256 Loading segment from ROM address 0xfff9d5d4
1700 18:07:54.845437 Entry Point 0x30000000
1701 18:07:54.845514 Loaded segments
1702 18:07:54.851928 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1703 18:07:54.867763 Finalizing chipset.
1704 18:07:54.871307 Finalizing SMM.
1705 18:07:54.871385 APMC done.
1706 18:07:54.878017 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1707 18:07:54.881029 mp_park_aps done after 0 msecs.
1708 18:07:54.884503 Jumping to boot code at 0x30000000(0x76b4b000)
1709 18:07:54.894692 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1710 18:07:54.894771
1711 18:07:54.894830
1712 18:07:54.894885
1713 18:07:54.897644 Starting depthcharge on Magolor...
1714 18:07:54.897719
1715 18:07:54.898039 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1716 18:07:54.898128 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1717 18:07:54.898204 Setting prompt string to ['dedede:']
1718 18:07:54.898269 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1719 18:07:54.908256 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1720 18:07:54.908333
1721 18:07:54.914398 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1722 18:07:54.914474
1723 18:07:54.917790 fw_config match found: AUDIO_AMP=UNPROVISIONED
1724 18:07:54.917867
1725 18:07:54.921080 Wipe memory regions:
1726 18:07:54.921202
1727 18:07:54.924581 [0x00000000001000, 0x000000000a0000)
1728 18:07:54.924657
1729 18:07:54.928340 [0x00000000100000, 0x00000030000000)
1730 18:07:55.056216
1731 18:07:55.059645 [0x00000031062170, 0x00000076a15000)
1732 18:07:55.228787
1733 18:07:55.232501 [0x00000100000000, 0x00000180400000)
1734 18:07:56.294091
1735 18:07:56.294205 R8152: Initializing
1736 18:07:56.294266
1737 18:07:56.298337 Version 9 (ocp_data = 6010)
1738 18:07:56.298414
1739 18:07:56.300489 R8152: Done initializing
1740 18:07:56.300564
1741 18:07:56.304362 Adding net device
1742 18:07:56.304439
1743 18:07:56.307470 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1744 18:07:56.307548
1745 18:07:56.311026
1746 18:07:56.311306 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1747 18:07:56.311389 Sending line: 'tftpboot 192.168.201.1 14808682/tftp-deploy-qn8rm97p/kernel/bzImage 14808682/tftp-deploy-qn8rm97p/kernel/cmdline 14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz'
1749 18:07:56.411839 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1750 18:07:56.411919 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1751 18:07:56.416871 dedede: tftpboot 192.168.201.1 14808682/tftp-deploy-qn8rm97p/kernel/bzImploy-qn8rm97p/kernel/cmdline 14808682/tftp-deploy-qn8rm97p/ramdisk/ramdisk.cpio.gz
1752 18:07:56.416949
1753 18:07:56.417008 Waiting for link
1754 18:07:56.618678
1755 18:07:56.618789 done.
1756 18:07:56.618847
1757 18:07:56.618902 MAC: 00:e0:4c:75:0d:b4
1758 18:07:56.618954
1759 18:07:56.622201 Sending DHCP discover... done.
1760 18:07:56.622278
1761 18:07:56.625280 Waiting for reply... done.
1762 18:07:56.625357
1763 18:07:56.628097 Sending DHCP request... done.
1764 18:07:56.628173
1765 18:07:56.631686 Waiting for reply... done.
1766 18:07:56.631762
1767 18:07:56.635111 My ip is 192.168.201.20
1768 18:07:56.635187
1769 18:07:56.638090 The DHCP server ip is 192.168.201.1
1770 18:07:56.638165
1771 18:07:56.644920 TFTP server IP predefined by user: 192.168.201.1
1772 18:07:56.644997
1773 18:07:56.651530 Bootfile predefined by user: 14808682/tftp-deploy-qn8rm97p/kernel/bzImage
1774 18:07:56.651607
1775 18:07:56.654539 Sending tftp read request... done.
1776 18:07:56.654618
1777 18:07:56.657926 Waiting for the transfer...
1778 18:07:56.658011
1779 18:07:56.950440 00000000 ################################################################
1780 18:07:56.950549
1781 18:07:57.232021 00080000 ################################################################
1782 18:07:57.232136
1783 18:07:57.495947 00100000 ################################################################
1784 18:07:57.496063
1785 18:07:57.770563 00180000 ################################################################
1786 18:07:57.770673
1787 18:07:58.030541 00200000 ################################################################
1788 18:07:58.030660
1789 18:07:58.300316 00280000 ################################################################
1790 18:07:58.300453
1791 18:07:58.561238 00300000 ################################################################
1792 18:07:58.561350
1793 18:07:58.824654 00380000 ################################################################
1794 18:07:58.824800
1795 18:07:59.089917 00400000 ################################################################
1796 18:07:59.090029
1797 18:07:59.366215 00480000 ################################################################
1798 18:07:59.366344
1799 18:07:59.633480 00500000 ################################################################
1800 18:07:59.633603
1801 18:07:59.897527 00580000 ################################################################
1802 18:07:59.897646
1803 18:08:00.161874 00600000 ################################################################
1804 18:08:00.161993
1805 18:08:00.428397 00680000 ################################################################
1806 18:08:00.428522
1807 18:08:00.683761 00700000 ################################################################
1808 18:08:00.683880
1809 18:08:00.935880 00780000 ################################################################
1810 18:08:00.936000
1811 18:08:01.181249 00800000 ################################################################
1812 18:08:01.181368
1813 18:08:01.438675 00880000 ################################################################
1814 18:08:01.438813
1815 18:08:01.694405 00900000 ################################################################
1816 18:08:01.694524
1817 18:08:01.965587 00980000 ################################################################
1818 18:08:01.965730
1819 18:08:02.240754 00a00000 ################################################################
1820 18:08:02.240875
1821 18:08:02.509009 00a80000 ################################################################
1822 18:08:02.509194
1823 18:08:02.772248 00b00000 ################################################################
1824 18:08:02.772371
1825 18:08:03.024969 00b80000 ################################################################
1826 18:08:03.025121
1827 18:08:03.284047 00c00000 ################################################################
1828 18:08:03.284170
1829 18:08:03.531620 00c80000 ################################################################
1830 18:08:03.531745
1831 18:08:03.782971 00d00000 ################################################################
1832 18:08:03.783108
1833 18:08:04.033974 00d80000 ################################################################
1834 18:08:04.034101
1835 18:08:04.294380 00e00000 ################################################################
1836 18:08:04.294511
1837 18:08:04.584563 00e80000 ################################################################
1838 18:08:04.584689
1839 18:08:04.851042 00f00000 ################################################################
1840 18:08:04.851178
1841 18:08:05.107159 00f80000 ################################################################
1842 18:08:05.107277
1843 18:08:05.271300 01000000 ####################################### done.
1844 18:08:05.271424
1845 18:08:05.274352 The bootfile was 17089024 bytes long.
1846 18:08:05.274426
1847 18:08:05.277762 Sending tftp read request... done.
1848 18:08:05.277838
1849 18:08:05.280959 Waiting for the transfer...
1850 18:08:05.281033
1851 18:08:05.534683 00000000 ################################################################
1852 18:08:05.534824
1853 18:08:05.783789 00080000 ################################################################
1854 18:08:05.783929
1855 18:08:06.047972 00100000 ################################################################
1856 18:08:06.048132
1857 18:08:06.309433 00180000 ################################################################
1858 18:08:06.309588
1859 18:08:06.573787 00200000 ################################################################
1860 18:08:06.573914
1861 18:08:06.852504 00280000 ################################################################
1862 18:08:06.852654
1863 18:08:07.125417 00300000 ################################################################
1864 18:08:07.125544
1865 18:08:07.404094 00380000 ################################################################
1866 18:08:07.404245
1867 18:08:07.682039 00400000 ################################################################
1868 18:08:07.682155
1869 18:08:07.954031 00480000 ################################################################
1870 18:08:07.954147
1871 18:08:08.214890 00500000 ################################################################
1872 18:08:08.215020
1873 18:08:08.460531 00580000 ################################################################
1874 18:08:08.460649
1875 18:08:08.724006 00600000 ################################################################
1876 18:08:08.724136
1877 18:08:08.976205 00680000 ################################################################
1878 18:08:08.976372
1879 18:08:09.250378 00700000 ################################################################
1880 18:08:09.250500
1881 18:08:09.526501 00780000 ################################################################
1882 18:08:09.526646
1883 18:08:09.784285 00800000 ################################################################
1884 18:08:09.784414
1885 18:08:10.033022 00880000 ################################################################
1886 18:08:10.033165
1887 18:08:10.282159 00900000 ################################################################
1888 18:08:10.282330
1889 18:08:10.467917 00980000 ################################################ done.
1890 18:08:10.468067
1891 18:08:10.471004 Sending tftp read request... done.
1892 18:08:10.471105
1893 18:08:10.474475 Waiting for the transfer...
1894 18:08:10.474576
1895 18:08:10.474662 00000000 # done.
1896 18:08:10.474753
1897 18:08:10.484725 Command line loaded dynamically from TFTP file: 14808682/tftp-deploy-qn8rm97p/kernel/cmdline
1898 18:08:10.484824
1899 18:08:10.497516 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1900 18:08:10.502017
1901 18:08:10.504725 ec_init: CrosEC protocol v3 supported (256, 256)
1902 18:08:10.514666
1903 18:08:10.518150 Shutting down all USB controllers.
1904 18:08:10.518216
1905 18:08:10.518280 Removing current net device
1906 18:08:10.518333
1907 18:08:10.521105 Finalizing coreboot
1908 18:08:10.521202
1909 18:08:10.527688 Exiting depthcharge with code 4 at timestamp: 22430237
1910 18:08:10.527759
1911 18:08:10.527816
1912 18:08:10.527876 Starting kernel ...
1913 18:08:10.527928
1914 18:08:10.527977
1915 18:08:10.528375 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
1916 18:08:10.528468 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
1917 18:08:10.528532 Setting prompt string to ['Linux version [0-9]']
1918 18:08:10.528597 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1919 18:08:10.528662 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1921 18:12:41.529480 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
1923 18:12:41.530463 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
1925 18:12:41.531253 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1928 18:12:41.532549 end: 2 depthcharge-action (duration 00:05:00) [common]
1930 18:12:41.533677 Cleaning after the job
1931 18:12:41.534158 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/ramdisk
1932 18:12:41.540408 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/kernel
1933 18:12:41.549962 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808682/tftp-deploy-qn8rm97p/modules
1934 18:12:41.554788 start: 4.1 power-off (timeout 00:00:30) [common]
1935 18:12:41.555457 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3', '--port=1', '--command=off']
1936 18:12:41.650816 >> Command sent successfully.
1937 18:12:41.654477 Returned 0 in 0 seconds
1938 18:12:41.654636 end: 4.1 power-off (duration 00:00:00) [common]
1940 18:12:41.654866 start: 4.2 read-feedback (timeout 00:05:00) [common]
1941 18:12:41.655029 Listened to connection for namespace 'common' for up to 1s
1943 18:12:41.655394 Listened to connection for namespace 'common' for up to 1s
1944 18:12:41.656186 Listened to connection for namespace 'common' for up to 1s
1945 18:12:41.660192 Listened to connection for namespace 'common' for up to 1s
1946 18:12:41.664989 Listened to connection for namespace 'common' for up to 1s
1947 18:12:41.669585 Listened to connection for namespace 'common' for up to 1s
1948 18:12:41.673424 Listened to connection for namespace 'common' for up to 1s
1949 18:12:41.678026 Listened to connection for namespace 'common' for up to 1s
1950 18:12:41.681794 Listened to connection for namespace 'common' for up to 1s
1951 18:12:41.686391 Listened to connection for namespace 'common' for up to 1s
1952 18:12:41.690169 Listened to connection for namespace 'common' for up to 1s
1953 18:12:41.693961 Listened to connection for namespace 'common' for up to 1s
1954 18:12:41.707524 Listened to connection for namespace 'common' for up to 1s
1955 18:12:41.724654 Listened to connection for namespace 'common' for up to 1s
1956 18:12:41.725708 Listened to connection for namespace 'common' for up to 1s
1957 18:12:41.728160 Listened to connection for namespace 'common' for up to 1s
1958 18:12:42.656284 Finalising connection for namespace 'common'
1959 18:12:42.656908 Disconnecting from shell: Finalise
1960 18:12:42.657440
1961 18:12:42.758481 end: 4.2 read-feedback (duration 00:00:01) [common]
1962 18:12:42.759100 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14808682
1963 18:12:42.811972 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14808682
1964 18:12:42.812194 JobError: Your job cannot terminate cleanly.