Boot log: acer-cp514-2h-1130g7-volteer

    1 18:07:34.437976  lava-dispatcher, installed at version: 2024.05
    2 18:07:34.438226  start: 0 validate
    3 18:07:34.438339  Start time: 2024-07-12 18:07:34.438334+00:00 (UTC)
    4 18:07:34.438464  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:07:34.438606  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 18:07:34.697864  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:07:34.698025  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.317-cip111-rt37%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-12%2Fkernel%2FbzImage exists
    8 18:07:34.958129  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:07:34.958360  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.317-cip111-rt37%2Fx86_64%2Fdefconfig%2Bx86-board%2Fgcc-12%2Fmodules.tar.xz exists
   10 18:07:39.265533  validate duration: 4.83
   12 18:07:39.265856  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 18:07:39.265981  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 18:07:39.266092  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 18:07:39.266270  Not decompressing ramdisk as can be used compressed.
   16 18:07:39.266359  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 18:07:39.266422  saving as /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/ramdisk/rootfs.cpio.gz
   18 18:07:39.266479  total size: 8417901 (8 MB)
   19 18:07:40.598452  progress   0 % (0 MB)
   20 18:07:40.605609  progress   5 % (0 MB)
   21 18:07:40.607792  progress  10 % (0 MB)
   22 18:07:40.609892  progress  15 % (1 MB)
   23 18:07:40.612046  progress  20 % (1 MB)
   24 18:07:40.614196  progress  25 % (2 MB)
   25 18:07:40.616356  progress  30 % (2 MB)
   26 18:07:40.618376  progress  35 % (2 MB)
   27 18:07:40.620524  progress  40 % (3 MB)
   28 18:07:40.622673  progress  45 % (3 MB)
   29 18:07:40.624802  progress  50 % (4 MB)
   30 18:07:40.626898  progress  55 % (4 MB)
   31 18:07:40.629060  progress  60 % (4 MB)
   32 18:07:40.631032  progress  65 % (5 MB)
   33 18:07:40.633108  progress  70 % (5 MB)
   34 18:07:40.635173  progress  75 % (6 MB)
   35 18:07:40.637221  progress  80 % (6 MB)
   36 18:07:40.639277  progress  85 % (6 MB)
   37 18:07:40.641329  progress  90 % (7 MB)
   38 18:07:40.643382  progress  95 % (7 MB)
   39 18:07:40.645315  progress 100 % (8 MB)
   40 18:07:40.645536  8 MB downloaded in 1.38 s (5.82 MB/s)
   41 18:07:40.645676  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 18:07:40.645891  end: 1.1 download-retry (duration 00:00:01) [common]
   44 18:07:40.645968  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 18:07:40.646042  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 18:07:40.646182  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.317-cip111-rt37/x86_64/defconfig+x86-board/gcc-12/kernel/bzImage
   47 18:07:40.646242  saving as /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/kernel/bzImage
   48 18:07:40.646294  total size: 17089024 (16 MB)
   49 18:07:40.646346  No compression specified
   50 18:07:40.647343  progress   0 % (0 MB)
   51 18:07:40.651632  progress   5 % (0 MB)
   52 18:07:40.655772  progress  10 % (1 MB)
   53 18:07:40.659920  progress  15 % (2 MB)
   54 18:07:40.664038  progress  20 % (3 MB)
   55 18:07:40.668147  progress  25 % (4 MB)
   56 18:07:40.672250  progress  30 % (4 MB)
   57 18:07:40.676356  progress  35 % (5 MB)
   58 18:07:40.680584  progress  40 % (6 MB)
   59 18:07:40.684755  progress  45 % (7 MB)
   60 18:07:40.688866  progress  50 % (8 MB)
   61 18:07:40.693302  progress  55 % (8 MB)
   62 18:07:40.697448  progress  60 % (9 MB)
   63 18:07:40.701610  progress  65 % (10 MB)
   64 18:07:40.705963  progress  70 % (11 MB)
   65 18:07:40.710084  progress  75 % (12 MB)
   66 18:07:40.714227  progress  80 % (13 MB)
   67 18:07:40.718431  progress  85 % (13 MB)
   68 18:07:40.722532  progress  90 % (14 MB)
   69 18:07:40.726574  progress  95 % (15 MB)
   70 18:07:40.730621  progress 100 % (16 MB)
   71 18:07:40.730780  16 MB downloaded in 0.08 s (192.91 MB/s)
   72 18:07:40.730919  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 18:07:40.731126  end: 1.2 download-retry (duration 00:00:00) [common]
   75 18:07:40.731204  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 18:07:40.731278  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 18:07:40.731410  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.317-cip111-rt37/x86_64/defconfig+x86-board/gcc-12/modules.tar.xz
   78 18:07:40.731469  saving as /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/modules/modules.tar
   79 18:07:40.731520  total size: 1260488 (1 MB)
   80 18:07:40.731574  Using unxz to decompress xz
   81 18:07:40.733091  progress   2 % (0 MB)
   82 18:07:40.733472  progress   7 % (0 MB)
   83 18:07:40.736829  progress  12 % (0 MB)
   84 18:07:40.740487  progress  18 % (0 MB)
   85 18:07:40.744266  progress  23 % (0 MB)
   86 18:07:40.747828  progress  28 % (0 MB)
   87 18:07:40.751353  progress  33 % (0 MB)
   88 18:07:40.755498  progress  38 % (0 MB)
   89 18:07:40.759188  progress  44 % (0 MB)
   90 18:07:40.762392  progress  49 % (0 MB)
   91 18:07:40.766526  progress  54 % (0 MB)
   92 18:07:40.769915  progress  59 % (0 MB)
   93 18:07:40.773966  progress  64 % (0 MB)
   94 18:07:40.777785  progress  70 % (0 MB)
   95 18:07:40.781135  progress  75 % (0 MB)
   96 18:07:40.784714  progress  80 % (0 MB)
   97 18:07:40.789013  progress  85 % (1 MB)
   98 18:07:40.792620  progress  90 % (1 MB)
   99 18:07:40.796452  progress  96 % (1 MB)
  100 18:07:40.805880  1 MB downloaded in 0.07 s (16.17 MB/s)
  101 18:07:40.806043  end: 1.3.1 http-download (duration 00:00:00) [common]
  103 18:07:40.806306  end: 1.3 download-retry (duration 00:00:00) [common]
  104 18:07:40.806383  start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
  105 18:07:40.806462  start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
  106 18:07:40.806531  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  107 18:07:40.806601  start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
  108 18:07:40.806768  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc
  109 18:07:40.806883  makedir: /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin
  110 18:07:40.806972  makedir: /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/tests
  111 18:07:40.807059  makedir: /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/results
  112 18:07:40.807142  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-add-keys
  113 18:07:40.807260  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-add-sources
  114 18:07:40.807372  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-background-process-start
  115 18:07:40.807483  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-background-process-stop
  116 18:07:40.807605  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-common-functions
  117 18:07:40.807717  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-echo-ipv4
  118 18:07:40.807828  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-install-packages
  119 18:07:40.807938  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-installed-packages
  120 18:07:40.808046  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-os-build
  121 18:07:40.808154  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-probe-channel
  122 18:07:40.808263  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-probe-ip
  123 18:07:40.808370  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-target-ip
  124 18:07:40.808478  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-target-mac
  125 18:07:40.808586  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-target-storage
  126 18:07:40.808696  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-case
  127 18:07:40.808804  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-event
  128 18:07:40.808912  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-feedback
  129 18:07:40.809022  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-raise
  130 18:07:40.809164  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-reference
  131 18:07:40.809350  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-runner
  132 18:07:40.809538  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-set
  133 18:07:40.809718  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-test-shell
  134 18:07:40.809848  Updating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-install-packages (oe)
  135 18:07:40.809988  Updating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/bin/lava-installed-packages (oe)
  136 18:07:40.810105  Creating /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/environment
  137 18:07:40.810230  LAVA metadata
  138 18:07:40.810295  - LAVA_JOB_ID=14808677
  139 18:07:40.810350  - LAVA_DISPATCHER_IP=192.168.201.1
  140 18:07:40.810438  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
  141 18:07:40.810493  skipped lava-vland-overlay
  142 18:07:40.810558  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  143 18:07:40.810629  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
  144 18:07:40.810684  skipped lava-multinode-overlay
  145 18:07:40.810748  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  146 18:07:40.810815  start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
  147 18:07:40.810877  Loading test definitions
  148 18:07:40.810949  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
  149 18:07:40.811009  Using /lava-14808677 at stage 0
  150 18:07:40.811402  uuid=14808677_1.4.2.3.1 testdef=None
  151 18:07:40.811487  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  152 18:07:40.811563  start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
  153 18:07:40.812000  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  155 18:07:40.812198  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
  156 18:07:40.812888  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  158 18:07:40.813219  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
  159 18:07:40.814014  runner path: /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/0/tests/0_dmesg test_uuid 14808677_1.4.2.3.1
  160 18:07:40.814182  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  162 18:07:40.814369  Creating lava-test-runner.conf files
  163 18:07:40.814424  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14808677/lava-overlay-2yh5qajc/lava-14808677/0 for stage 0
  164 18:07:40.814503  - 0_dmesg
  165 18:07:40.814590  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  166 18:07:40.814664  start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
  167 18:07:40.821096  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  168 18:07:40.821196  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
  169 18:07:40.821275  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  170 18:07:40.821352  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  171 18:07:40.821426  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
  172 18:07:41.068954  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  173 18:07:41.069131  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  174 18:07:41.069239  extracting modules file /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14808677/extract-overlay-ramdisk-qvzo62ub/ramdisk
  175 18:07:41.120082  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  176 18:07:41.120256  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  177 18:07:41.120381  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14808677/compress-overlay-gh08x5ze/overlay-1.4.2.4.tar.gz to ramdisk
  178 18:07:41.120467  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14808677/compress-overlay-gh08x5ze/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14808677/extract-overlay-ramdisk-qvzo62ub/ramdisk
  179 18:07:41.131173  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  180 18:07:41.131334  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  181 18:07:41.131454  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  182 18:07:41.131554  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  183 18:07:41.131629  Building ramdisk /var/lib/lava/dispatcher/tmp/14808677/extract-overlay-ramdisk-qvzo62ub/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14808677/extract-overlay-ramdisk-qvzo62ub/ramdisk
  184 18:07:41.319458  >> 62601 blocks

  185 18:07:42.701974  rename /var/lib/lava/dispatcher/tmp/14808677/extract-overlay-ramdisk-qvzo62ub/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz
  186 18:07:42.702214  end: 1.4.7 compress-ramdisk (duration 00:00:02) [common]
  187 18:07:42.702345  start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
  188 18:07:42.702464  start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
  189 18:07:42.702568  No mkimage arch provided, not using FIT.
  190 18:07:42.702679  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  191 18:07:42.702789  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  192 18:07:42.702908  end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
  193 18:07:42.703022  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
  194 18:07:42.703115  No LXC device requested
  195 18:07:42.703224  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  196 18:07:42.703394  start: 1.6 deploy-device-env (timeout 00:09:57) [common]
  197 18:07:42.703507  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  198 18:07:42.703599  Checking files for TFTP limit of 4294967296 bytes.
  199 18:07:42.704016  end: 1 tftp-deploy (duration 00:00:03) [common]
  200 18:07:42.704143  start: 2 depthcharge-action (timeout 00:05:00) [common]
  201 18:07:42.704261  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  202 18:07:42.704401  substitutions:
  203 18:07:42.704492  - {DTB}: None
  204 18:07:42.704578  - {INITRD}: 14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz
  205 18:07:42.704663  - {KERNEL}: 14808677/tftp-deploy-g6ci4d03/kernel/bzImage
  206 18:07:42.704747  - {LAVA_MAC}: None
  207 18:07:42.704829  - {PRESEED_CONFIG}: None
  208 18:07:42.704919  - {PRESEED_LOCAL}: None
  209 18:07:42.705031  - {RAMDISK}: 14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz
  210 18:07:42.705123  - {ROOT_PART}: None
  211 18:07:42.705205  - {ROOT}: None
  212 18:07:42.705286  - {SERVER_IP}: 192.168.201.1
  213 18:07:42.705367  - {TEE}: None
  214 18:07:42.705449  Parsed boot commands:
  215 18:07:42.705528  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  216 18:07:42.705728  Parsed boot commands: tftpboot 192.168.201.1 14808677/tftp-deploy-g6ci4d03/kernel/bzImage 14808677/tftp-deploy-g6ci4d03/kernel/cmdline 14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz
  217 18:07:42.705853  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  218 18:07:42.705968  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  219 18:07:42.706083  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  220 18:07:42.706205  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  221 18:07:42.706296  Not connected, no need to disconnect.
  222 18:07:42.706403  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  223 18:07:42.706514  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  224 18:07:42.706605  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-3'
  225 18:07:42.710866  Setting prompt string to ['lava-test: # ']
  226 18:07:42.711309  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  227 18:07:42.711450  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  228 18:07:42.711578  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  229 18:07:42.711698  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  230 18:07:42.711956  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-3', '--port=1', '--command=reboot']
  231 18:07:51.872857  >> Command sent successfully.
  232 18:07:51.877296  Returned 0 in 9 seconds
  233 18:07:51.877538  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  235 18:07:51.877899  end: 2.2.2 reset-device (duration 00:00:09) [common]
  236 18:07:51.878045  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  237 18:07:51.878177  Setting prompt string to 'Starting depthcharge on Voema...'
  238 18:07:51.878276  Changing prompt to 'Starting depthcharge on Voema...'
  239 18:07:51.878388  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  240 18:07:51.878886  [Enter `^Ec?' for help]

  241 18:07:53.961813  

  242 18:07:53.961926  

  243 18:07:53.971711  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  244 18:07:53.975224  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  245 18:07:53.981482  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  246 18:07:53.985238  CPU: AES supported, TXT NOT supported, VT supported

  247 18:07:53.991469  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  248 18:07:53.998536  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  249 18:07:54.001665  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  250 18:07:54.004936  VBOOT: Loading verstage.

  251 18:07:54.008021  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  252 18:07:54.015177  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  253 18:07:54.018059  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  254 18:07:54.028717  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  255 18:07:54.035537  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  256 18:07:54.035616  

  257 18:07:54.035674  

  258 18:07:54.048746  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  259 18:07:54.062655  Probing TPM: . done!

  260 18:07:54.065783  TPM ready after 0 ms

  261 18:07:54.069488  Connected to device vid:did:rid of 1ae0:0028:00

  262 18:07:54.080571  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  263 18:07:54.086930  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  264 18:07:54.090442  Initialized TPM device CR50 revision 0

  265 18:07:54.145280  tlcl_send_startup: Startup return code is 0

  266 18:07:54.145412  TPM: setup succeeded

  267 18:07:54.155509  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  268 18:07:54.169301  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  269 18:07:54.181972  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  270 18:07:54.191787  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  271 18:07:54.195520  Chrome EC: UHEPI supported

  272 18:07:54.198587  Phase 1

  273 18:07:54.202289  FMAP: area GBB found @ 1805000 (458752 bytes)

  274 18:07:54.212350  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  275 18:07:54.218760  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  276 18:07:54.225328  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  277 18:07:54.232062  VB2:vb2_check_recovery() Recovery was requested manually

  278 18:07:54.235659  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  279 18:07:54.239068  Recovery requested (1009000e)

  280 18:07:54.245693  TPM: Extending digest for VBOOT: boot mode into PCR 0

  281 18:07:54.255691  tlcl_extend: response is 0

  282 18:07:54.262276  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  283 18:07:54.272436  tlcl_extend: response is 0

  284 18:07:54.279101  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  285 18:07:54.285537  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  286 18:07:54.292658  BS: verstage times (exec / console): total (unknown) / 147 ms

  287 18:07:54.292740  

  288 18:07:54.292806  

  289 18:07:54.305599  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  290 18:07:54.312304  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  291 18:07:54.315507  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  292 18:07:54.318747  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  293 18:07:54.325801  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  294 18:07:54.329067  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  295 18:07:54.332025  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  296 18:07:54.335298  TCO_STS:   0000 0000

  297 18:07:54.338931  GEN_PMCON: d0015038 00002200

  298 18:07:54.342235  GBLRST_CAUSE: 00000000 00000000

  299 18:07:54.342315  HPR_CAUSE0: 00000000

  300 18:07:54.345287  prev_sleep_state 5

  301 18:07:54.348743  Boot Count incremented to 33978

  302 18:07:54.355575  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  303 18:07:54.361761  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  304 18:07:54.368512  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  305 18:07:54.375215  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  306 18:07:54.379863  Chrome EC: UHEPI supported

  307 18:07:54.386427  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  308 18:07:54.399178  Probing TPM:  done!

  309 18:07:54.406075  Connected to device vid:did:rid of 1ae0:0028:00

  310 18:07:54.415766  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  311 18:07:54.420041  Initialized TPM device CR50 revision 0

  312 18:07:54.434538  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  313 18:07:54.440972  MRC: Hash idx 0x100b comparison successful.

  314 18:07:54.444167  MRC cache found, size faa8

  315 18:07:54.444273  bootmode is set to: 2

  316 18:07:54.447965  SPD index = 0

  317 18:07:54.454603  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  318 18:07:54.457564  SPD: module type is LPDDR4X

  319 18:07:54.461109  SPD: module part number is MT53E512M64D4NW-046

  320 18:07:54.467806  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  321 18:07:54.471418  SPD: device width 16 bits, bus width 16 bits

  322 18:07:54.477904  SPD: module size is 1024 MB (per channel)

  323 18:07:54.910740  CBMEM:

  324 18:07:54.913894  IMD: root @ 0x76fff000 254 entries.

  325 18:07:54.916983  IMD: root @ 0x76ffec00 62 entries.

  326 18:07:54.920885  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  327 18:07:54.927192  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  328 18:07:54.930697  External stage cache:

  329 18:07:54.933720  IMD: root @ 0x7b3ff000 254 entries.

  330 18:07:54.937264  IMD: root @ 0x7b3fec00 62 entries.

  331 18:07:54.952399  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  332 18:07:54.958941  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  333 18:07:54.965262  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  334 18:07:54.979586  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  335 18:07:54.986607  cse_lite: Skip switching to RW in the recovery path

  336 18:07:54.986687  8 DIMMs found

  337 18:07:54.986749  SMM Memory Map

  338 18:07:54.989897  SMRAM       : 0x7b000000 0x800000

  339 18:07:54.992927   Subregion 0: 0x7b000000 0x200000

  340 18:07:54.999957   Subregion 1: 0x7b200000 0x200000

  341 18:07:55.003062   Subregion 2: 0x7b400000 0x400000

  342 18:07:55.003153  top_of_ram = 0x77000000

  343 18:07:55.009773  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  344 18:07:55.016360  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  345 18:07:55.019444  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  346 18:07:55.026303  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  347 18:07:55.032933  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  348 18:07:55.039073  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  349 18:07:55.049051  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  350 18:07:55.055540  Processing 211 relocs. Offset value of 0x74c0b000

  351 18:07:55.062655  BS: romstage times (exec / console): total (unknown) / 277 ms

  352 18:07:55.068651  

  353 18:07:55.068728  

  354 18:07:55.078471  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  355 18:07:55.081703  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  356 18:07:55.091449  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  357 18:07:55.098666  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  358 18:07:55.105132  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  359 18:07:55.111789  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  360 18:07:55.158389  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  361 18:07:55.165169  Processing 5008 relocs. Offset value of 0x75d98000

  362 18:07:55.168511  BS: postcar times (exec / console): total (unknown) / 59 ms

  363 18:07:55.171954  

  364 18:07:55.172122  

  365 18:07:55.181920  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  366 18:07:55.182000  Normal boot

  367 18:07:55.185056  FW_CONFIG value is 0x804c02

  368 18:07:55.188162  PCI: 00:07.0 disabled by fw_config

  369 18:07:55.191918  PCI: 00:07.1 disabled by fw_config

  370 18:07:55.195105  PCI: 00:0d.2 disabled by fw_config

  371 18:07:55.201606  PCI: 00:1c.7 disabled by fw_config

  372 18:07:55.204848  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  373 18:07:55.212006  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  374 18:07:55.215076  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  375 18:07:55.218303  GENERIC: 0.0 disabled by fw_config

  376 18:07:55.224905  GENERIC: 1.0 disabled by fw_config

  377 18:07:55.228223  fw_config match found: DB_USB=USB3_ACTIVE

  378 18:07:55.231393  fw_config match found: DB_USB=USB3_ACTIVE

  379 18:07:55.235116  fw_config match found: DB_USB=USB3_ACTIVE

  380 18:07:55.241607  fw_config match found: DB_USB=USB3_ACTIVE

  381 18:07:55.244710  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  382 18:07:55.251615  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  383 18:07:55.261639  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  384 18:07:55.267919  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  385 18:07:55.271585  microcode: sig=0x806c1 pf=0x80 revision=0x86

  386 18:07:55.278026  microcode: Update skipped, already up-to-date

  387 18:07:55.284553  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  388 18:07:55.312126  Detected 4 core, 8 thread CPU.

  389 18:07:55.315409  Setting up SMI for CPU

  390 18:07:55.319145  IED base = 0x7b400000

  391 18:07:55.319250  IED size = 0x00400000

  392 18:07:55.322299  Will perform SMM setup.

  393 18:07:55.328705  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  394 18:07:55.335428  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  395 18:07:55.342391  Processing 16 relocs. Offset value of 0x00030000

  396 18:07:55.345612  Attempting to start 7 APs

  397 18:07:55.348847  Waiting for 10ms after sending INIT.

  398 18:07:55.364265  Waiting for 1st SIPI to complete...AP: slot 7 apic_id 4.

  399 18:07:55.367430  AP: slot 3 apic_id 5.

  400 18:07:55.371059  AP: slot 1 apic_id 1.

  401 18:07:55.371151  AP: slot 4 apic_id 7.

  402 18:07:55.374123  AP: slot 5 apic_id 6.

  403 18:07:55.377789  AP: slot 6 apic_id 2.

  404 18:07:55.377882  AP: slot 2 apic_id 3.

  405 18:07:55.377972  done.

  406 18:07:55.385280  Waiting for 2nd SIPI to complete...done.

  407 18:07:55.391720  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  408 18:07:55.395248  Processing 13 relocs. Offset value of 0x00038000

  409 18:07:55.398573  Unable to locate Global NVS

  410 18:07:55.405211  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  411 18:07:55.411949  Installing permanent SMM handler to 0x7b000000

  412 18:07:55.418527  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  413 18:07:55.424986  Processing 794 relocs. Offset value of 0x7b010000

  414 18:07:55.431328  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  415 18:07:55.438368  Processing 13 relocs. Offset value of 0x7b008000

  416 18:07:55.445066  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  417 18:07:55.448325  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  418 18:07:55.454942  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  419 18:07:55.461487  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  420 18:07:55.467910  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  421 18:07:55.474676  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  422 18:07:55.477774  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  423 18:07:55.481674  Unable to locate Global NVS

  424 18:07:55.488064  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  425 18:07:55.492417  Clearing SMI status registers

  426 18:07:55.495395  SMI_STS: PM1 

  427 18:07:55.495470  PM1_STS: PWRBTN 

  428 18:07:55.505330  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  429 18:07:55.505443  In relocation handler: CPU 0

  430 18:07:55.511971  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  431 18:07:55.515406  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  432 18:07:55.518894  Relocation complete.

  433 18:07:55.525899  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  434 18:07:55.529049  In relocation handler: CPU 1

  435 18:07:55.532389  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  436 18:07:55.535558  Relocation complete.

  437 18:07:55.542245  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  438 18:07:55.545928  In relocation handler: CPU 2

  439 18:07:55.548869  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  440 18:07:55.552523  Relocation complete.

  441 18:07:55.558960  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  442 18:07:55.562055  In relocation handler: CPU 6

  443 18:07:55.566006  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  444 18:07:55.569154  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  445 18:07:55.572404  Relocation complete.

  446 18:07:55.578821  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  447 18:07:55.582451  In relocation handler: CPU 7

  448 18:07:55.585442  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  449 18:07:55.592279  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  450 18:07:55.595572  Relocation complete.

  451 18:07:55.602003  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  452 18:07:55.605717  In relocation handler: CPU 3

  453 18:07:55.608743  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  454 18:07:55.608822  Relocation complete.

  455 18:07:55.618830  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  456 18:07:55.622348  In relocation handler: CPU 5

  457 18:07:55.625507  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  458 18:07:55.629085  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  459 18:07:55.631985  Relocation complete.

  460 18:07:55.639269  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  461 18:07:55.642618  In relocation handler: CPU 4

  462 18:07:55.645847  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  463 18:07:55.649042  Relocation complete.

  464 18:07:55.649148  Initializing CPU #0

  465 18:07:55.652352  CPU: vendor Intel device 806c1

  466 18:07:55.659199  CPU: family 06, model 8c, stepping 01

  467 18:07:55.659293  Clearing out pending MCEs

  468 18:07:55.662303  Setting up local APIC...

  469 18:07:55.665361   apic_id: 0x00 done.

  470 18:07:55.668645  Turbo is available but hidden

  471 18:07:55.672528  Turbo is available and visible

  472 18:07:55.675751  microcode: Update skipped, already up-to-date

  473 18:07:55.679044  CPU #0 initialized

  474 18:07:55.679144  Initializing CPU #1

  475 18:07:55.682242  Initializing CPU #6

  476 18:07:55.685325  Initializing CPU #2

  477 18:07:55.688983  CPU: vendor Intel device 806c1

  478 18:07:55.692142  CPU: family 06, model 8c, stepping 01

  479 18:07:55.692261  Initializing CPU #7

  480 18:07:55.695514  Initializing CPU #3

  481 18:07:55.698714  Initializing CPU #4

  482 18:07:55.698867  Initializing CPU #5

  483 18:07:55.701958  CPU: vendor Intel device 806c1

  484 18:07:55.705244  CPU: family 06, model 8c, stepping 01

  485 18:07:55.708916  CPU: vendor Intel device 806c1

  486 18:07:55.712290  CPU: family 06, model 8c, stepping 01

  487 18:07:55.715812  Clearing out pending MCEs

  488 18:07:55.718723  Clearing out pending MCEs

  489 18:07:55.721805  Setting up local APIC...

  490 18:07:55.721897  Clearing out pending MCEs

  491 18:07:55.725643  CPU: vendor Intel device 806c1

  492 18:07:55.731945  CPU: family 06, model 8c, stepping 01

  493 18:07:55.732023  Setting up local APIC...

  494 18:07:55.735193  CPU: vendor Intel device 806c1

  495 18:07:55.738961  CPU: family 06, model 8c, stepping 01

  496 18:07:55.742042  CPU: vendor Intel device 806c1

  497 18:07:55.745606  CPU: family 06, model 8c, stepping 01

  498 18:07:55.748569  Clearing out pending MCEs

  499 18:07:55.751821  Clearing out pending MCEs

  500 18:07:55.755264  Setting up local APIC...

  501 18:07:55.758693  Setting up local APIC...

  502 18:07:55.758770   apic_id: 0x02 done.

  503 18:07:55.761859  Clearing out pending MCEs

  504 18:07:55.765567  microcode: Update skipped, already up-to-date

  505 18:07:55.768343  Setting up local APIC...

  506 18:07:55.771945  CPU: vendor Intel device 806c1

  507 18:07:55.775265  CPU: family 06, model 8c, stepping 01

  508 18:07:55.778476   apic_id: 0x05 done.

  509 18:07:55.781738  Setting up local APIC...

  510 18:07:55.781814  CPU #6 initialized

  511 18:07:55.784880   apic_id: 0x03 done.

  512 18:07:55.788270   apic_id: 0x04 done.

  513 18:07:55.792058  microcode: Update skipped, already up-to-date

  514 18:07:55.795095  microcode: Update skipped, already up-to-date

  515 18:07:55.798342  CPU #3 initialized

  516 18:07:55.798418  CPU #7 initialized

  517 18:07:55.801801  Clearing out pending MCEs

  518 18:07:55.804901   apic_id: 0x07 done.

  519 18:07:55.808241   apic_id: 0x06 done.

  520 18:07:55.811510  microcode: Update skipped, already up-to-date

  521 18:07:55.815360  microcode: Update skipped, already up-to-date

  522 18:07:55.818576  CPU #4 initialized

  523 18:07:55.821427  microcode: Update skipped, already up-to-date

  524 18:07:55.824936  CPU #5 initialized

  525 18:07:55.825013  CPU #2 initialized

  526 18:07:55.828623  Setting up local APIC...

  527 18:07:55.831505   apic_id: 0x01 done.

  528 18:07:55.834964  microcode: Update skipped, already up-to-date

  529 18:07:55.838109  CPU #1 initialized

  530 18:07:55.841963  bsp_do_flight_plan done after 455 msecs.

  531 18:07:55.845249  CPU: frequency set to 4000 MHz

  532 18:07:55.848541  Enabling SMIs.

  533 18:07:55.854849  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  534 18:07:55.869409  SATAXPCIE1 indicates PCIe NVMe is present

  535 18:07:55.872871  Probing TPM:  done!

  536 18:07:55.876235  Connected to device vid:did:rid of 1ae0:0028:00

  537 18:07:55.886493  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  538 18:07:55.890332  Initialized TPM device CR50 revision 0

  539 18:07:55.893420  Enabling S0i3.4

  540 18:07:55.899844  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  541 18:07:55.903196  Found a VBT of 8704 bytes after decompression

  542 18:07:55.909819  cse_lite: CSE RO boot. HybridStorageMode disabled

  543 18:07:55.916286  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  544 18:07:55.992324  FSPS returned 0

  545 18:07:55.995369  Executing Phase 1 of FspMultiPhaseSiInit

  546 18:07:56.005736  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  547 18:07:56.009128  port C0 DISC req: usage 1 usb3 1 usb2 5

  548 18:07:56.012579  Raw Buffer output 0 00000511

  549 18:07:56.015637  Raw Buffer output 1 00000000

  550 18:07:56.019393  pmc_send_ipc_cmd succeeded

  551 18:07:56.025902  port C1 DISC req: usage 1 usb3 2 usb2 3

  552 18:07:56.025978  Raw Buffer output 0 00000321

  553 18:07:56.029245  Raw Buffer output 1 00000000

  554 18:07:56.033486  pmc_send_ipc_cmd succeeded

  555 18:07:56.038420  Detected 4 core, 8 thread CPU.

  556 18:07:56.041629  Detected 4 core, 8 thread CPU.

  557 18:07:56.276030  Display FSP Version Info HOB

  558 18:07:56.279331  Reference Code - CPU = a.0.4c.31

  559 18:07:56.282660  uCode Version = 0.0.0.86

  560 18:07:56.285939  TXT ACM version = ff.ff.ff.ffff

  561 18:07:56.289143  Reference Code - ME = a.0.4c.31

  562 18:07:56.292519  MEBx version = 0.0.0.0

  563 18:07:56.295935  ME Firmware Version = Consumer SKU

  564 18:07:56.299099  Reference Code - PCH = a.0.4c.31

  565 18:07:56.302275  PCH-CRID Status = Disabled

  566 18:07:56.305689  PCH-CRID Original Value = ff.ff.ff.ffff

  567 18:07:56.309006  PCH-CRID New Value = ff.ff.ff.ffff

  568 18:07:56.312376  OPROM - RST - RAID = ff.ff.ff.ffff

  569 18:07:56.316060  PCH Hsio Version = 4.0.0.0

  570 18:07:56.319472  Reference Code - SA - System Agent = a.0.4c.31

  571 18:07:56.322747  Reference Code - MRC = 2.0.0.1

  572 18:07:56.325966  SA - PCIe Version = a.0.4c.31

  573 18:07:56.329018  SA-CRID Status = Disabled

  574 18:07:56.332512  SA-CRID Original Value = 0.0.0.1

  575 18:07:56.335825  SA-CRID New Value = 0.0.0.1

  576 18:07:56.338927  OPROM - VBIOS = ff.ff.ff.ffff

  577 18:07:56.342672  IO Manageability Engine FW Version = 11.1.4.0

  578 18:07:56.345693  PHY Build Version = 0.0.0.e0

  579 18:07:56.349329  Thunderbolt(TM) FW Version = 0.0.0.0

  580 18:07:56.355654  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  581 18:07:56.358914  ITSS IRQ Polarities Before:

  582 18:07:56.359012  IPC0: 0xffffffff

  583 18:07:56.362384  IPC1: 0xffffffff

  584 18:07:56.362479  IPC2: 0xffffffff

  585 18:07:56.365839  IPC3: 0xffffffff

  586 18:07:56.369209  ITSS IRQ Polarities After:

  587 18:07:56.369311  IPC0: 0xffffffff

  588 18:07:56.372221  IPC1: 0xffffffff

  589 18:07:56.372326  IPC2: 0xffffffff

  590 18:07:56.375822  IPC3: 0xffffffff

  591 18:07:56.378964  Found PCIe Root Port #9 at PCI: 00:1d.0.

  592 18:07:56.392405  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  593 18:07:56.402690  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  594 18:07:56.415281  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  595 18:07:56.421966  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  596 18:07:56.422070  Enumerating buses...

  597 18:07:56.428502  Show all devs... Before device enumeration.

  598 18:07:56.431849  Root Device: enabled 1

  599 18:07:56.431925  DOMAIN: 0000: enabled 1

  600 18:07:56.435712  CPU_CLUSTER: 0: enabled 1

  601 18:07:56.438686  PCI: 00:00.0: enabled 1

  602 18:07:56.441713  PCI: 00:02.0: enabled 1

  603 18:07:56.441807  PCI: 00:04.0: enabled 1

  604 18:07:56.445233  PCI: 00:05.0: enabled 1

  605 18:07:56.448640  PCI: 00:06.0: enabled 0

  606 18:07:56.448741  PCI: 00:07.0: enabled 0

  607 18:07:56.452039  PCI: 00:07.1: enabled 0

  608 18:07:56.455352  PCI: 00:07.2: enabled 0

  609 18:07:56.458370  PCI: 00:07.3: enabled 0

  610 18:07:56.458447  PCI: 00:08.0: enabled 1

  611 18:07:56.461984  PCI: 00:09.0: enabled 0

  612 18:07:56.464978  PCI: 00:0a.0: enabled 0

  613 18:07:56.468760  PCI: 00:0d.0: enabled 1

  614 18:07:56.468855  PCI: 00:0d.1: enabled 0

  615 18:07:56.471620  PCI: 00:0d.2: enabled 0

  616 18:07:56.475030  PCI: 00:0d.3: enabled 0

  617 18:07:56.478768  PCI: 00:0e.0: enabled 0

  618 18:07:56.478846  PCI: 00:10.2: enabled 1

  619 18:07:56.481672  PCI: 00:10.6: enabled 0

  620 18:07:56.485227  PCI: 00:10.7: enabled 0

  621 18:07:56.488647  PCI: 00:12.0: enabled 0

  622 18:07:56.488746  PCI: 00:12.6: enabled 0

  623 18:07:56.491999  PCI: 00:13.0: enabled 0

  624 18:07:56.495180  PCI: 00:14.0: enabled 1

  625 18:07:56.495280  PCI: 00:14.1: enabled 0

  626 18:07:56.498403  PCI: 00:14.2: enabled 1

  627 18:07:56.501689  PCI: 00:14.3: enabled 1

  628 18:07:56.505059  PCI: 00:15.0: enabled 1

  629 18:07:56.505172  PCI: 00:15.1: enabled 1

  630 18:07:56.508237  PCI: 00:15.2: enabled 1

  631 18:07:56.511409  PCI: 00:15.3: enabled 1

  632 18:07:56.514655  PCI: 00:16.0: enabled 1

  633 18:07:56.514731  PCI: 00:16.1: enabled 0

  634 18:07:56.517880  PCI: 00:16.2: enabled 0

  635 18:07:56.521787  PCI: 00:16.3: enabled 0

  636 18:07:56.524928  PCI: 00:16.4: enabled 0

  637 18:07:56.525005  PCI: 00:16.5: enabled 0

  638 18:07:56.527885  PCI: 00:17.0: enabled 1

  639 18:07:56.531195  PCI: 00:19.0: enabled 0

  640 18:07:56.534669  PCI: 00:19.1: enabled 1

  641 18:07:56.534739  PCI: 00:19.2: enabled 0

  642 18:07:56.537871  PCI: 00:1c.0: enabled 1

  643 18:07:56.541245  PCI: 00:1c.1: enabled 0

  644 18:07:56.541322  PCI: 00:1c.2: enabled 0

  645 18:07:56.544447  PCI: 00:1c.3: enabled 0

  646 18:07:56.547874  PCI: 00:1c.4: enabled 0

  647 18:07:56.551627  PCI: 00:1c.5: enabled 0

  648 18:07:56.551705  PCI: 00:1c.6: enabled 1

  649 18:07:56.554670  PCI: 00:1c.7: enabled 0

  650 18:07:56.557915  PCI: 00:1d.0: enabled 1

  651 18:07:56.561209  PCI: 00:1d.1: enabled 0

  652 18:07:56.561295  PCI: 00:1d.2: enabled 1

  653 18:07:56.564746  PCI: 00:1d.3: enabled 0

  654 18:07:56.567847  PCI: 00:1e.0: enabled 1

  655 18:07:56.570916  PCI: 00:1e.1: enabled 0

  656 18:07:56.571017  PCI: 00:1e.2: enabled 1

  657 18:07:56.574627  PCI: 00:1e.3: enabled 1

  658 18:07:56.577521  PCI: 00:1f.0: enabled 1

  659 18:07:56.581315  PCI: 00:1f.1: enabled 0

  660 18:07:56.581416  PCI: 00:1f.2: enabled 1

  661 18:07:56.584226  PCI: 00:1f.3: enabled 1

  662 18:07:56.587704  PCI: 00:1f.4: enabled 0

  663 18:07:56.587803  PCI: 00:1f.5: enabled 1

  664 18:07:56.591163  PCI: 00:1f.6: enabled 0

  665 18:07:56.594334  PCI: 00:1f.7: enabled 0

  666 18:07:56.598110  APIC: 00: enabled 1

  667 18:07:56.598189  GENERIC: 0.0: enabled 1

  668 18:07:56.600933  GENERIC: 0.0: enabled 1

  669 18:07:56.604175  GENERIC: 1.0: enabled 1

  670 18:07:56.607676  GENERIC: 0.0: enabled 1

  671 18:07:56.607754  GENERIC: 1.0: enabled 1

  672 18:07:56.611006  USB0 port 0: enabled 1

  673 18:07:56.614085  GENERIC: 0.0: enabled 1

  674 18:07:56.614193  USB0 port 0: enabled 1

  675 18:07:56.617874  GENERIC: 0.0: enabled 1

  676 18:07:56.621265  I2C: 00:1a: enabled 1

  677 18:07:56.624525  I2C: 00:31: enabled 1

  678 18:07:56.624623  I2C: 00:32: enabled 1

  679 18:07:56.627728  I2C: 00:10: enabled 1

  680 18:07:56.631056  I2C: 00:15: enabled 1

  681 18:07:56.631133  GENERIC: 0.0: enabled 0

  682 18:07:56.634167  GENERIC: 1.0: enabled 0

  683 18:07:56.637611  GENERIC: 0.0: enabled 1

  684 18:07:56.637714  SPI: 00: enabled 1

  685 18:07:56.640936  SPI: 00: enabled 1

  686 18:07:56.644159  PNP: 0c09.0: enabled 1

  687 18:07:56.644236  GENERIC: 0.0: enabled 1

  688 18:07:56.647442  USB3 port 0: enabled 1

  689 18:07:56.650681  USB3 port 1: enabled 1

  690 18:07:56.654036  USB3 port 2: enabled 0

  691 18:07:56.654147  USB3 port 3: enabled 0

  692 18:07:56.657295  USB2 port 0: enabled 0

  693 18:07:56.660576  USB2 port 1: enabled 1

  694 18:07:56.660672  USB2 port 2: enabled 1

  695 18:07:56.664113  USB2 port 3: enabled 0

  696 18:07:56.667403  USB2 port 4: enabled 1

  697 18:07:56.667503  USB2 port 5: enabled 0

  698 18:07:56.670614  USB2 port 6: enabled 0

  699 18:07:56.674199  USB2 port 7: enabled 0

  700 18:07:56.677211  USB2 port 8: enabled 0

  701 18:07:56.677305  USB2 port 9: enabled 0

  702 18:07:56.680197  USB3 port 0: enabled 0

  703 18:07:56.684016  USB3 port 1: enabled 1

  704 18:07:56.684116  USB3 port 2: enabled 0

  705 18:07:56.686862  USB3 port 3: enabled 0

  706 18:07:56.690672  GENERIC: 0.0: enabled 1

  707 18:07:56.693683  GENERIC: 1.0: enabled 1

  708 18:07:56.693787  APIC: 01: enabled 1

  709 18:07:56.697152  APIC: 03: enabled 1

  710 18:07:56.697257  APIC: 05: enabled 1

  711 18:07:56.700178  APIC: 07: enabled 1

  712 18:07:56.703822  APIC: 06: enabled 1

  713 18:07:56.703900  APIC: 02: enabled 1

  714 18:07:56.706802  APIC: 04: enabled 1

  715 18:07:56.710127  Compare with tree...

  716 18:07:56.710230  Root Device: enabled 1

  717 18:07:56.713988   DOMAIN: 0000: enabled 1

  718 18:07:56.716704    PCI: 00:00.0: enabled 1

  719 18:07:56.720005    PCI: 00:02.0: enabled 1

  720 18:07:56.720084    PCI: 00:04.0: enabled 1

  721 18:07:56.723852     GENERIC: 0.0: enabled 1

  722 18:07:56.727389    PCI: 00:05.0: enabled 1

  723 18:07:56.730007    PCI: 00:06.0: enabled 0

  724 18:07:56.733375    PCI: 00:07.0: enabled 0

  725 18:07:56.733471     GENERIC: 0.0: enabled 1

  726 18:07:56.736664    PCI: 00:07.1: enabled 0

  727 18:07:56.740637     GENERIC: 1.0: enabled 1

  728 18:07:56.743287    PCI: 00:07.2: enabled 0

  729 18:07:56.746497     GENERIC: 0.0: enabled 1

  730 18:07:56.750054    PCI: 00:07.3: enabled 0

  731 18:07:56.750153     GENERIC: 1.0: enabled 1

  732 18:07:56.753216    PCI: 00:08.0: enabled 1

  733 18:07:56.756499    PCI: 00:09.0: enabled 0

  734 18:07:56.759864    PCI: 00:0a.0: enabled 0

  735 18:07:56.763325    PCI: 00:0d.0: enabled 1

  736 18:07:56.763404     USB0 port 0: enabled 1

  737 18:07:56.766802      USB3 port 0: enabled 1

  738 18:07:56.769776      USB3 port 1: enabled 1

  739 18:07:56.772997      USB3 port 2: enabled 0

  740 18:07:56.776404      USB3 port 3: enabled 0

  741 18:07:56.776483    PCI: 00:0d.1: enabled 0

  742 18:07:56.780105    PCI: 00:0d.2: enabled 0

  743 18:07:56.783006     GENERIC: 0.0: enabled 1

  744 18:07:56.786761    PCI: 00:0d.3: enabled 0

  745 18:07:56.789720    PCI: 00:0e.0: enabled 0

  746 18:07:56.789798    PCI: 00:10.2: enabled 1

  747 18:07:56.792958    PCI: 00:10.6: enabled 0

  748 18:07:56.796656    PCI: 00:10.7: enabled 0

  749 18:07:56.799798    PCI: 00:12.0: enabled 0

  750 18:07:56.802968    PCI: 00:12.6: enabled 0

  751 18:07:56.803077    PCI: 00:13.0: enabled 0

  752 18:07:56.806176    PCI: 00:14.0: enabled 1

  753 18:07:56.809598     USB0 port 0: enabled 1

  754 18:07:56.813180      USB2 port 0: enabled 0

  755 18:07:56.816458      USB2 port 1: enabled 1

  756 18:07:56.819597      USB2 port 2: enabled 1

  757 18:07:56.819701      USB2 port 3: enabled 0

  758 18:07:56.822817      USB2 port 4: enabled 1

  759 18:07:56.826147      USB2 port 5: enabled 0

  760 18:07:56.829403      USB2 port 6: enabled 0

  761 18:07:56.833194      USB2 port 7: enabled 0

  762 18:07:56.833292      USB2 port 8: enabled 0

  763 18:07:56.835969      USB2 port 9: enabled 0

  764 18:07:56.840013      USB3 port 0: enabled 0

  765 18:07:56.842644      USB3 port 1: enabled 1

  766 18:07:56.846436      USB3 port 2: enabled 0

  767 18:07:56.849756      USB3 port 3: enabled 0

  768 18:07:56.849855    PCI: 00:14.1: enabled 0

  769 18:07:56.852877    PCI: 00:14.2: enabled 1

  770 18:07:56.856256    PCI: 00:14.3: enabled 1

  771 18:07:56.859469     GENERIC: 0.0: enabled 1

  772 18:07:56.862795    PCI: 00:15.0: enabled 1

  773 18:07:56.862893     I2C: 00:1a: enabled 1

  774 18:07:56.866206     I2C: 00:31: enabled 1

  775 18:07:56.869448     I2C: 00:32: enabled 1

  776 18:07:56.872879    PCI: 00:15.1: enabled 1

  777 18:07:56.872980     I2C: 00:10: enabled 1

  778 18:07:56.876019    PCI: 00:15.2: enabled 1

  779 18:07:56.879147    PCI: 00:15.3: enabled 1

  780 18:07:56.882227    PCI: 00:16.0: enabled 1

  781 18:07:56.885989    PCI: 00:16.1: enabled 0

  782 18:07:56.886090    PCI: 00:16.2: enabled 0

  783 18:07:56.889364    PCI: 00:16.3: enabled 0

  784 18:07:56.893000    PCI: 00:16.4: enabled 0

  785 18:07:56.895995    PCI: 00:16.5: enabled 0

  786 18:07:56.899209    PCI: 00:17.0: enabled 1

  787 18:07:56.899314    PCI: 00:19.0: enabled 0

  788 18:07:56.902252    PCI: 00:19.1: enabled 1

  789 18:07:56.905698     I2C: 00:15: enabled 1

  790 18:07:56.908931    PCI: 00:19.2: enabled 0

  791 18:07:56.912052    PCI: 00:1d.0: enabled 1

  792 18:07:56.912153     GENERIC: 0.0: enabled 1

  793 18:07:56.915862    PCI: 00:1e.0: enabled 1

  794 18:07:56.918951    PCI: 00:1e.1: enabled 0

  795 18:07:56.922482    PCI: 00:1e.2: enabled 1

  796 18:07:56.922583     SPI: 00: enabled 1

  797 18:07:56.925669    PCI: 00:1e.3: enabled 1

  798 18:07:56.929021     SPI: 00: enabled 1

  799 18:07:56.979205    PCI: 00:1f.0: enabled 1

  800 18:07:56.979328     PNP: 0c09.0: enabled 1

  801 18:07:56.979422    PCI: 00:1f.1: enabled 0

  802 18:07:56.979696    PCI: 00:1f.2: enabled 1

  803 18:07:56.979784     GENERIC: 0.0: enabled 1

  804 18:07:56.979872      GENERIC: 0.0: enabled 1

  805 18:07:56.979955      GENERIC: 1.0: enabled 1

  806 18:07:56.980040    PCI: 00:1f.3: enabled 1

  807 18:07:56.980121    PCI: 00:1f.4: enabled 0

  808 18:07:56.980205    PCI: 00:1f.5: enabled 1

  809 18:07:56.980286    PCI: 00:1f.6: enabled 0

  810 18:07:56.980370    PCI: 00:1f.7: enabled 0

  811 18:07:56.980464   CPU_CLUSTER: 0: enabled 1

  812 18:07:56.980547    APIC: 00: enabled 1

  813 18:07:56.980629    APIC: 01: enabled 1

  814 18:07:56.980711    APIC: 03: enabled 1

  815 18:07:56.980792    APIC: 05: enabled 1

  816 18:07:56.980876    APIC: 07: enabled 1

  817 18:07:56.980962    APIC: 06: enabled 1

  818 18:07:56.981048    APIC: 02: enabled 1

  819 18:07:57.020268    APIC: 04: enabled 1

  820 18:07:57.020390  Root Device scanning...

  821 18:07:57.021071  scan_static_bus for Root Device

  822 18:07:57.021149  DOMAIN: 0000 enabled

  823 18:07:57.021209  CPU_CLUSTER: 0 enabled

  824 18:07:57.021447  DOMAIN: 0000 scanning...

  825 18:07:57.021539  PCI: pci_scan_bus for bus 00

  826 18:07:57.021622  PCI: 00:00.0 [8086/0000] ops

  827 18:07:57.021710  PCI: 00:00.0 [8086/9a12] enabled

  828 18:07:57.021792  PCI: 00:02.0 [8086/0000] bus ops

  829 18:07:57.021878  PCI: 00:02.0 [8086/9a40] enabled

  830 18:07:57.021970  PCI: 00:04.0 [8086/0000] bus ops

  831 18:07:57.022055  PCI: 00:04.0 [8086/9a03] enabled

  832 18:07:57.024917  PCI: 00:05.0 [8086/9a19] enabled

  833 18:07:57.025017  PCI: 00:07.0 [0000/0000] hidden

  834 18:07:57.028374  PCI: 00:08.0 [8086/9a11] enabled

  835 18:07:57.031521  PCI: 00:0a.0 [8086/9a0d] disabled

  836 18:07:57.035222  PCI: 00:0d.0 [8086/0000] bus ops

  837 18:07:57.038421  PCI: 00:0d.0 [8086/9a13] enabled

  838 18:07:57.041603  PCI: 00:14.0 [8086/0000] bus ops

  839 18:07:57.044860  PCI: 00:14.0 [8086/a0ed] enabled

  840 18:07:57.048175  PCI: 00:14.2 [8086/a0ef] enabled

  841 18:07:57.051665  PCI: 00:14.3 [8086/0000] bus ops

  842 18:07:57.054952  PCI: 00:14.3 [8086/a0f0] enabled

  843 18:07:57.058044  PCI: 00:15.0 [8086/0000] bus ops

  844 18:07:57.061483  PCI: 00:15.0 [8086/a0e8] enabled

  845 18:07:57.064765  PCI: 00:15.1 [8086/0000] bus ops

  846 18:07:57.067891  PCI: 00:15.1 [8086/a0e9] enabled

  847 18:07:57.071424  PCI: 00:15.2 [8086/0000] bus ops

  848 18:07:57.074763  PCI: 00:15.2 [8086/a0ea] enabled

  849 18:07:57.078147  PCI: 00:15.3 [8086/0000] bus ops

  850 18:07:57.081522  PCI: 00:15.3 [8086/a0eb] enabled

  851 18:07:57.084868  PCI: 00:16.0 [8086/0000] ops

  852 18:07:57.088170  PCI: 00:16.0 [8086/a0e0] enabled

  853 18:07:57.094586  PCI: Static device PCI: 00:17.0 not found, disabling it.

  854 18:07:57.098245  PCI: 00:19.0 [8086/0000] bus ops

  855 18:07:57.101732  PCI: 00:19.0 [8086/a0c5] disabled

  856 18:07:57.104703  PCI: 00:19.1 [8086/0000] bus ops

  857 18:07:57.108191  PCI: 00:19.1 [8086/a0c6] enabled

  858 18:07:57.111435  PCI: 00:1d.0 [8086/0000] bus ops

  859 18:07:57.115054  PCI: 00:1d.0 [8086/a0b0] enabled

  860 18:07:57.118095  PCI: 00:1e.0 [8086/0000] ops

  861 18:07:57.121233  PCI: 00:1e.0 [8086/a0a8] enabled

  862 18:07:57.124656  PCI: 00:1e.2 [8086/0000] bus ops

  863 18:07:57.127850  PCI: 00:1e.2 [8086/a0aa] enabled

  864 18:07:57.131677  PCI: 00:1e.3 [8086/0000] bus ops

  865 18:07:57.134688  PCI: 00:1e.3 [8086/a0ab] enabled

  866 18:07:57.137887  PCI: 00:1f.0 [8086/0000] bus ops

  867 18:07:57.141612  PCI: 00:1f.0 [8086/a087] enabled

  868 18:07:57.141713  RTC Init

  869 18:07:57.144704  Set power on after power failure.

  870 18:07:57.147915  Disabling Deep S3

  871 18:07:57.148013  Disabling Deep S3

  872 18:07:57.151720  Disabling Deep S4

  873 18:07:57.151815  Disabling Deep S4

  874 18:07:57.154555  Disabling Deep S5

  875 18:07:57.157844  Disabling Deep S5

  876 18:07:57.161548  PCI: 00:1f.2 [0000/0000] hidden

  877 18:07:57.164697  PCI: 00:1f.3 [8086/0000] bus ops

  878 18:07:57.168093  PCI: 00:1f.3 [8086/a0c8] enabled

  879 18:07:57.171625  PCI: 00:1f.5 [8086/0000] bus ops

  880 18:07:57.174308  PCI: 00:1f.5 [8086/a0a4] enabled

  881 18:07:57.177669  PCI: Leftover static devices:

  882 18:07:57.177761  PCI: 00:10.2

  883 18:07:57.177822  PCI: 00:10.6

  884 18:07:57.181595  PCI: 00:10.7

  885 18:07:57.181674  PCI: 00:06.0

  886 18:07:57.184353  PCI: 00:07.1

  887 18:07:57.184430  PCI: 00:07.2

  888 18:07:57.184490  PCI: 00:07.3

  889 18:07:57.187554  PCI: 00:09.0

  890 18:07:57.187632  PCI: 00:0d.1

  891 18:07:57.190984  PCI: 00:0d.2

  892 18:07:57.191060  PCI: 00:0d.3

  893 18:07:57.191120  PCI: 00:0e.0

  894 18:07:57.194473  PCI: 00:12.0

  895 18:07:57.194551  PCI: 00:12.6

  896 18:07:57.197653  PCI: 00:13.0

  897 18:07:57.197731  PCI: 00:14.1

  898 18:07:57.201064  PCI: 00:16.1

  899 18:07:57.201141  PCI: 00:16.2

  900 18:07:57.201201  PCI: 00:16.3

  901 18:07:57.204359  PCI: 00:16.4

  902 18:07:57.204461  PCI: 00:16.5

  903 18:07:57.208140  PCI: 00:17.0

  904 18:07:57.208246  PCI: 00:19.2

  905 18:07:57.208335  PCI: 00:1e.1

  906 18:07:57.211421  PCI: 00:1f.1

  907 18:07:57.211498  PCI: 00:1f.4

  908 18:07:57.214630  PCI: 00:1f.6

  909 18:07:57.214736  PCI: 00:1f.7

  910 18:07:57.217655  PCI: Check your devicetree.cb.

  911 18:07:57.221473  PCI: 00:02.0 scanning...

  912 18:07:57.224448  scan_generic_bus for PCI: 00:02.0

  913 18:07:57.228021  scan_generic_bus for PCI: 00:02.0 done

  914 18:07:57.231246  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  915 18:07:57.234431  PCI: 00:04.0 scanning...

  916 18:07:57.237672  scan_generic_bus for PCI: 00:04.0

  917 18:07:57.241195  GENERIC: 0.0 enabled

  918 18:07:57.247751  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  919 18:07:57.251526  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  920 18:07:57.254565  PCI: 00:0d.0 scanning...

  921 18:07:57.258084  scan_static_bus for PCI: 00:0d.0

  922 18:07:57.261424  USB0 port 0 enabled

  923 18:07:57.261501  USB0 port 0 scanning...

  924 18:07:57.264714  scan_static_bus for USB0 port 0

  925 18:07:57.267933  USB3 port 0 enabled

  926 18:07:57.270992  USB3 port 1 enabled

  927 18:07:57.271089  USB3 port 2 disabled

  928 18:07:57.275029  USB3 port 3 disabled

  929 18:07:57.277760  USB3 port 0 scanning...

  930 18:07:57.281771  scan_static_bus for USB3 port 0

  931 18:07:57.284544  scan_static_bus for USB3 port 0 done

  932 18:07:57.287640  scan_bus: bus USB3 port 0 finished in 6 msecs

  933 18:07:57.291043  USB3 port 1 scanning...

  934 18:07:57.294306  scan_static_bus for USB3 port 1

  935 18:07:57.297565  scan_static_bus for USB3 port 1 done

  936 18:07:57.304200  scan_bus: bus USB3 port 1 finished in 6 msecs

  937 18:07:57.307554  scan_static_bus for USB0 port 0 done

  938 18:07:57.310759  scan_bus: bus USB0 port 0 finished in 43 msecs

  939 18:07:57.314105  scan_static_bus for PCI: 00:0d.0 done

  940 18:07:57.320571  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  941 18:07:57.320678  PCI: 00:14.0 scanning...

  942 18:07:57.324436  scan_static_bus for PCI: 00:14.0

  943 18:07:57.327673  USB0 port 0 enabled

  944 18:07:57.330880  USB0 port 0 scanning...

  945 18:07:57.333817  scan_static_bus for USB0 port 0

  946 18:07:57.337595  USB2 port 0 disabled

  947 18:07:57.337670  USB2 port 1 enabled

  948 18:07:57.340996  USB2 port 2 enabled

  949 18:07:57.341073  USB2 port 3 disabled

  950 18:07:57.344430  USB2 port 4 enabled

  951 18:07:57.347303  USB2 port 5 disabled

  952 18:07:57.347416  USB2 port 6 disabled

  953 18:07:57.350697  USB2 port 7 disabled

  954 18:07:57.354341  USB2 port 8 disabled

  955 18:07:57.354455  USB2 port 9 disabled

  956 18:07:57.357638  USB3 port 0 disabled

  957 18:07:57.360787  USB3 port 1 enabled

  958 18:07:57.360867  USB3 port 2 disabled

  959 18:07:57.363919  USB3 port 3 disabled

  960 18:07:57.367385  USB2 port 1 scanning...

  961 18:07:57.370543  scan_static_bus for USB2 port 1

  962 18:07:57.373732  scan_static_bus for USB2 port 1 done

  963 18:07:57.377499  scan_bus: bus USB2 port 1 finished in 6 msecs

  964 18:07:57.380708  USB2 port 2 scanning...

  965 18:07:57.383919  scan_static_bus for USB2 port 2

  966 18:07:57.387114  scan_static_bus for USB2 port 2 done

  967 18:07:57.390977  scan_bus: bus USB2 port 2 finished in 6 msecs

  968 18:07:57.394303  USB2 port 4 scanning...

  969 18:07:57.397481  scan_static_bus for USB2 port 4

  970 18:07:57.400648  scan_static_bus for USB2 port 4 done

  971 18:07:57.407075  scan_bus: bus USB2 port 4 finished in 6 msecs

  972 18:07:57.407188  USB3 port 1 scanning...

  973 18:07:57.410335  scan_static_bus for USB3 port 1

  974 18:07:57.417249  scan_static_bus for USB3 port 1 done

  975 18:07:57.420479  scan_bus: bus USB3 port 1 finished in 6 msecs

  976 18:07:57.423754  scan_static_bus for USB0 port 0 done

  977 18:07:57.430012  scan_bus: bus USB0 port 0 finished in 93 msecs

  978 18:07:57.433844  scan_static_bus for PCI: 00:14.0 done

  979 18:07:57.437067  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  980 18:07:57.440129  PCI: 00:14.3 scanning...

  981 18:07:57.443667  scan_static_bus for PCI: 00:14.3

  982 18:07:57.446740  GENERIC: 0.0 enabled

  983 18:07:57.449965  scan_static_bus for PCI: 00:14.3 done

  984 18:07:57.453642  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  985 18:07:57.456868  PCI: 00:15.0 scanning...

  986 18:07:57.459903  scan_static_bus for PCI: 00:15.0

  987 18:07:57.463443  I2C: 00:1a enabled

  988 18:07:57.463541  I2C: 00:31 enabled

  989 18:07:57.466606  I2C: 00:32 enabled

  990 18:07:57.470047  scan_static_bus for PCI: 00:15.0 done

  991 18:07:57.473069  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  992 18:07:57.476639  PCI: 00:15.1 scanning...

  993 18:07:57.479984  scan_static_bus for PCI: 00:15.1

  994 18:07:57.483302  I2C: 00:10 enabled

  995 18:07:57.486316  scan_static_bus for PCI: 00:15.1 done

  996 18:07:57.490062  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  997 18:07:57.493483  PCI: 00:15.2 scanning...

  998 18:07:57.496630  scan_static_bus for PCI: 00:15.2

  999 18:07:57.499858  scan_static_bus for PCI: 00:15.2 done

 1000 18:07:57.506273  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1001 18:07:57.509562  PCI: 00:15.3 scanning...

 1002 18:07:57.512796  scan_static_bus for PCI: 00:15.3

 1003 18:07:57.516633  scan_static_bus for PCI: 00:15.3 done

 1004 18:07:57.519548  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1005 18:07:57.522875  PCI: 00:19.1 scanning...

 1006 18:07:57.526047  scan_static_bus for PCI: 00:19.1

 1007 18:07:57.529907  I2C: 00:15 enabled

 1008 18:07:57.532935  scan_static_bus for PCI: 00:19.1 done

 1009 18:07:57.536478  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1010 18:07:57.539757  PCI: 00:1d.0 scanning...

 1011 18:07:57.542951  do_pci_scan_bridge for PCI: 00:1d.0

 1012 18:07:57.546687  PCI: pci_scan_bus for bus 01

 1013 18:07:57.549626  PCI: 01:00.0 [1c5c/174a] enabled

 1014 18:07:57.552897  GENERIC: 0.0 enabled

 1015 18:07:57.556023  Enabling Common Clock Configuration

 1016 18:07:57.559828  L1 Sub-State supported from root port 29

 1017 18:07:57.563088  L1 Sub-State Support = 0xf

 1018 18:07:57.566257  CommonModeRestoreTime = 0x28

 1019 18:07:57.569479  Power On Value = 0x16, Power On Scale = 0x0

 1020 18:07:57.573029  ASPM: Enabled L1

 1021 18:07:57.575916  PCIe: Max_Payload_Size adjusted to 128

 1022 18:07:57.579406  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1023 18:07:57.582604  PCI: 00:1e.2 scanning...

 1024 18:07:57.586512  scan_generic_bus for PCI: 00:1e.2

 1025 18:07:57.589526  SPI: 00 enabled

 1026 18:07:57.592446  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1027 18:07:57.599145  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1028 18:07:57.602487  PCI: 00:1e.3 scanning...

 1029 18:07:57.606252  scan_generic_bus for PCI: 00:1e.3

 1030 18:07:57.606354  SPI: 00 enabled

 1031 18:07:57.612799  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1032 18:07:57.619246  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1033 18:07:57.619323  PCI: 00:1f.0 scanning...

 1034 18:07:57.622448  scan_static_bus for PCI: 00:1f.0

 1035 18:07:57.626070  PNP: 0c09.0 enabled

 1036 18:07:57.629505  PNP: 0c09.0 scanning...

 1037 18:07:57.632763  scan_static_bus for PNP: 0c09.0

 1038 18:07:57.636057  scan_static_bus for PNP: 0c09.0 done

 1039 18:07:57.639072  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1040 18:07:57.642550  scan_static_bus for PCI: 00:1f.0 done

 1041 18:07:57.648936  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1042 18:07:57.652652  PCI: 00:1f.2 scanning...

 1043 18:07:57.655901  scan_static_bus for PCI: 00:1f.2

 1044 18:07:57.655998  GENERIC: 0.0 enabled

 1045 18:07:57.658924  GENERIC: 0.0 scanning...

 1046 18:07:57.662339  scan_static_bus for GENERIC: 0.0

 1047 18:07:57.665689  GENERIC: 0.0 enabled

 1048 18:07:57.668873  GENERIC: 1.0 enabled

 1049 18:07:57.672359  scan_static_bus for GENERIC: 0.0 done

 1050 18:07:57.675908  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1051 18:07:57.679034  scan_static_bus for PCI: 00:1f.2 done

 1052 18:07:57.685841  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1053 18:07:57.685975  PCI: 00:1f.3 scanning...

 1054 18:07:57.689064  scan_static_bus for PCI: 00:1f.3

 1055 18:07:57.695616  scan_static_bus for PCI: 00:1f.3 done

 1056 18:07:57.698939  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1057 18:07:57.702363  PCI: 00:1f.5 scanning...

 1058 18:07:57.705542  scan_generic_bus for PCI: 00:1f.5

 1059 18:07:57.709120  scan_generic_bus for PCI: 00:1f.5 done

 1060 18:07:57.712784  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1061 18:07:57.718853  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1062 18:07:57.722644  scan_static_bus for Root Device done

 1063 18:07:57.729163  scan_bus: bus Root Device finished in 737 msecs

 1064 18:07:57.729270  done

 1065 18:07:57.735562  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1066 18:07:57.738757  Chrome EC: UHEPI supported

 1067 18:07:57.742023  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1068 18:07:57.748880  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1069 18:07:57.752338  SPI flash protection: WPSW=0 SRP0=0

 1070 18:07:57.759292  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1071 18:07:57.765606  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1072 18:07:57.765690  found VGA at PCI: 00:02.0

 1073 18:07:57.768827  Setting up VGA for PCI: 00:02.0

 1074 18:07:57.775437  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1075 18:07:57.778831  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1076 18:07:57.781980  Allocating resources...

 1077 18:07:57.785478  Reading resources...

 1078 18:07:57.788727  Root Device read_resources bus 0 link: 0

 1079 18:07:57.792418  DOMAIN: 0000 read_resources bus 0 link: 0

 1080 18:07:57.798752  PCI: 00:04.0 read_resources bus 1 link: 0

 1081 18:07:57.801986  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1082 18:07:57.809609  PCI: 00:0d.0 read_resources bus 0 link: 0

 1083 18:07:57.812857  USB0 port 0 read_resources bus 0 link: 0

 1084 18:07:57.819568  USB0 port 0 read_resources bus 0 link: 0 done

 1085 18:07:57.822940  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1086 18:07:57.825611  PCI: 00:14.0 read_resources bus 0 link: 0

 1087 18:07:57.832681  USB0 port 0 read_resources bus 0 link: 0

 1088 18:07:57.836174  USB0 port 0 read_resources bus 0 link: 0 done

 1089 18:07:57.842650  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1090 18:07:57.846354  PCI: 00:14.3 read_resources bus 0 link: 0

 1091 18:07:57.852886  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1092 18:07:57.856172  PCI: 00:15.0 read_resources bus 0 link: 0

 1093 18:07:57.862933  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1094 18:07:57.866373  PCI: 00:15.1 read_resources bus 0 link: 0

 1095 18:07:57.873073  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1096 18:07:57.876265  PCI: 00:19.1 read_resources bus 0 link: 0

 1097 18:07:57.883043  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1098 18:07:57.886327  PCI: 00:1d.0 read_resources bus 1 link: 0

 1099 18:07:57.893112  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1100 18:07:57.896586  PCI: 00:1e.2 read_resources bus 2 link: 0

 1101 18:07:57.903715  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1102 18:07:57.906242  PCI: 00:1e.3 read_resources bus 3 link: 0

 1103 18:07:57.913528  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1104 18:07:57.916832  PCI: 00:1f.0 read_resources bus 0 link: 0

 1105 18:07:57.923386  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1106 18:07:57.926732  PCI: 00:1f.2 read_resources bus 0 link: 0

 1107 18:07:57.930022  GENERIC: 0.0 read_resources bus 0 link: 0

 1108 18:07:57.937181  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1109 18:07:57.939917  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1110 18:07:57.947926  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1111 18:07:57.950964  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1112 18:07:57.957384  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1113 18:07:57.960661  Root Device read_resources bus 0 link: 0 done

 1114 18:07:57.963990  Done reading resources.

 1115 18:07:57.970710  Show resources in subtree (Root Device)...After reading.

 1116 18:07:57.974160   Root Device child on link 0 DOMAIN: 0000

 1117 18:07:57.977626    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1118 18:07:57.987496    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1119 18:07:57.997330    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1120 18:07:58.000469     PCI: 00:00.0

 1121 18:07:58.007340     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1122 18:07:58.017136     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1123 18:07:58.027173     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1124 18:07:58.037292     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1125 18:07:58.047340     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1126 18:07:58.056841     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1127 18:07:58.063906     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1128 18:07:58.073801     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1129 18:07:58.083606     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1130 18:07:58.093779     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1131 18:07:58.103365     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1132 18:07:58.113843     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1133 18:07:58.120639     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1134 18:07:58.130422     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1135 18:07:58.140399     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1136 18:07:58.150293     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1137 18:07:58.160471     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1138 18:07:58.166871     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1139 18:07:58.177007     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1140 18:07:58.187058     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1141 18:07:58.190040     PCI: 00:02.0

 1142 18:07:58.200289     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1143 18:07:58.210126     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1144 18:07:58.216882     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1145 18:07:58.223176     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1146 18:07:58.233022     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1147 18:07:58.233106      GENERIC: 0.0

 1148 18:07:58.236530     PCI: 00:05.0

 1149 18:07:58.246578     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1150 18:07:58.249789     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1151 18:07:58.253107      GENERIC: 0.0

 1152 18:07:58.253184     PCI: 00:08.0

 1153 18:07:58.262994     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1154 18:07:58.266381     PCI: 00:0a.0

 1155 18:07:58.269723     PCI: 00:0d.0 child on link 0 USB0 port 0

 1156 18:07:58.279654     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1157 18:07:58.286481      USB0 port 0 child on link 0 USB3 port 0

 1158 18:07:58.286569       USB3 port 0

 1159 18:07:58.289719       USB3 port 1

 1160 18:07:58.289820       USB3 port 2

 1161 18:07:58.292987       USB3 port 3

 1162 18:07:58.296487     PCI: 00:14.0 child on link 0 USB0 port 0

 1163 18:07:58.306380     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1164 18:07:58.309444      USB0 port 0 child on link 0 USB2 port 0

 1165 18:07:58.312713       USB2 port 0

 1166 18:07:58.312817       USB2 port 1

 1167 18:07:58.316269       USB2 port 2

 1168 18:07:58.316405       USB2 port 3

 1169 18:07:58.319927       USB2 port 4

 1170 18:07:58.323070       USB2 port 5

 1171 18:07:58.323185       USB2 port 6

 1172 18:07:58.326208       USB2 port 7

 1173 18:07:58.326341       USB2 port 8

 1174 18:07:58.329407       USB2 port 9

 1175 18:07:58.329526       USB3 port 0

 1176 18:07:58.333148       USB3 port 1

 1177 18:07:58.333285       USB3 port 2

 1178 18:07:58.336221       USB3 port 3

 1179 18:07:58.336321     PCI: 00:14.2

 1180 18:07:58.346553     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 18:07:58.356046     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1182 18:07:58.362983     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1183 18:07:58.372678     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1184 18:07:58.372815      GENERIC: 0.0

 1185 18:07:58.375976     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1186 18:07:58.386208     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1187 18:07:58.389516      I2C: 00:1a

 1188 18:07:58.389607      I2C: 00:31

 1189 18:07:58.392904      I2C: 00:32

 1190 18:07:58.396254     PCI: 00:15.1 child on link 0 I2C: 00:10

 1191 18:07:58.406312     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 18:07:58.409645      I2C: 00:10

 1193 18:07:58.409763     PCI: 00:15.2

 1194 18:07:58.419113     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 18:07:58.422774     PCI: 00:15.3

 1196 18:07:58.432725     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 18:07:58.432850     PCI: 00:16.0

 1198 18:07:58.442633     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 18:07:58.445837     PCI: 00:19.0

 1200 18:07:58.449400     PCI: 00:19.1 child on link 0 I2C: 00:15

 1201 18:07:58.459620     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1202 18:07:58.459745      I2C: 00:15

 1203 18:07:58.465874     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1204 18:07:58.472584     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1205 18:07:58.482622     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1206 18:07:58.492692     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1207 18:07:58.496026      GENERIC: 0.0

 1208 18:07:58.496116      PCI: 01:00.0

 1209 18:07:58.505990      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 18:07:58.516112      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1211 18:07:58.526064      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1212 18:07:58.526183     PCI: 00:1e.0

 1213 18:07:58.538801     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1214 18:07:58.542806     PCI: 00:1e.2 child on link 0 SPI: 00

 1215 18:07:58.552119     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1216 18:07:58.552227      SPI: 00

 1217 18:07:58.555720     PCI: 00:1e.3 child on link 0 SPI: 00

 1218 18:07:58.565662     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 18:07:58.569257      SPI: 00

 1220 18:07:58.572386     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1221 18:07:58.582388     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1222 18:07:58.582496      PNP: 0c09.0

 1223 18:07:58.592290      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 18:07:58.595702     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1225 18:07:58.605819     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1226 18:07:58.615055     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1227 18:07:58.618407      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1228 18:07:58.621741       GENERIC: 0.0

 1229 18:07:58.621818       GENERIC: 1.0

 1230 18:07:58.625563     PCI: 00:1f.3

 1231 18:07:58.635561     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1232 18:07:58.644849     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1233 18:07:58.644930     PCI: 00:1f.5

 1234 18:07:58.655290     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1235 18:07:58.658350    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1236 18:07:58.662165     APIC: 00

 1237 18:07:58.662268     APIC: 01

 1238 18:07:58.662357     APIC: 03

 1239 18:07:58.665473     APIC: 05

 1240 18:07:58.665577     APIC: 07

 1241 18:07:58.668734     APIC: 06

 1242 18:07:58.668829     APIC: 02

 1243 18:07:58.668917     APIC: 04

 1244 18:07:58.678424  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1245 18:07:58.681648   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1246 18:07:58.688455   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1247 18:07:58.695045   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1248 18:07:58.698115    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1249 18:07:58.705308    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1250 18:07:58.707899    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1251 18:07:58.715257   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1252 18:07:58.721498   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1253 18:07:58.731226   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1254 18:07:58.737766  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1255 18:07:58.744905  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1256 18:07:58.751406   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1257 18:07:58.758174   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1258 18:07:58.768027   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1259 18:07:58.771232   DOMAIN: 0000: Resource ranges:

 1260 18:07:58.774562   * Base: 1000, Size: 800, Tag: 100

 1261 18:07:58.777934   * Base: 1900, Size: e700, Tag: 100

 1262 18:07:58.781118    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1263 18:07:58.788066  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1264 18:07:58.794284  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1265 18:07:58.804637   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1266 18:07:58.810695   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1267 18:07:58.817900   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1268 18:07:58.827605   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1269 18:07:58.834069   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1270 18:07:58.840941   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1271 18:07:58.850953   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1272 18:07:58.857320   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1273 18:07:58.863757   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1274 18:07:58.874038   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1275 18:07:58.880683   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1276 18:07:58.887249   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1277 18:07:58.897091   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1278 18:07:58.903808   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1279 18:07:58.910407   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1280 18:07:58.920188   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1281 18:07:58.926844   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1282 18:07:58.933502   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1283 18:07:58.943306   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1284 18:07:58.950260   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1285 18:07:58.956338   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1286 18:07:58.966465   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1287 18:07:58.969644   DOMAIN: 0000: Resource ranges:

 1288 18:07:58.973587   * Base: 7fc00000, Size: 40400000, Tag: 200

 1289 18:07:58.976502   * Base: d0000000, Size: 28000000, Tag: 200

 1290 18:07:58.983465   * Base: fa000000, Size: 1000000, Tag: 200

 1291 18:07:58.986417   * Base: fb001000, Size: 2fff000, Tag: 200

 1292 18:07:58.989765   * Base: fe010000, Size: 2e000, Tag: 200

 1293 18:07:58.992951   * Base: fe03f000, Size: d41000, Tag: 200

 1294 18:07:58.999466   * Base: fed88000, Size: 8000, Tag: 200

 1295 18:07:59.003216   * Base: fed93000, Size: d000, Tag: 200

 1296 18:07:59.006288   * Base: feda2000, Size: 1e000, Tag: 200

 1297 18:07:59.009563   * Base: fede0000, Size: 1220000, Tag: 200

 1298 18:07:59.016087   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1299 18:07:59.022747    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1300 18:07:59.029179    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1301 18:07:59.035920    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1302 18:07:59.042865    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1303 18:07:59.049322    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1304 18:07:59.055717    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1305 18:07:59.062462    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1306 18:07:59.069616    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1307 18:07:59.075684    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1308 18:07:59.082197    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1309 18:07:59.089006    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1310 18:07:59.095972    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1311 18:07:59.102312    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1312 18:07:59.109410    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1313 18:07:59.115844    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1314 18:07:59.122399    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1315 18:07:59.129416    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1316 18:07:59.135336    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1317 18:07:59.142022    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1318 18:07:59.149330    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1319 18:07:59.155428    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1320 18:07:59.162365    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1321 18:07:59.168505  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1322 18:07:59.178617  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1323 18:07:59.181815   PCI: 00:1d.0: Resource ranges:

 1324 18:07:59.185116   * Base: 7fc00000, Size: 100000, Tag: 200

 1325 18:07:59.192183    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1326 18:07:59.198845    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1327 18:07:59.205423    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1328 18:07:59.211793  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1329 18:07:59.218804  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1330 18:07:59.225281  Root Device assign_resources, bus 0 link: 0

 1331 18:07:59.228621  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1332 18:07:59.238638  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1333 18:07:59.245403  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1334 18:07:59.255060  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1335 18:07:59.261658  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1336 18:07:59.265067  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1337 18:07:59.271862  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1338 18:07:59.278281  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1339 18:07:59.288433  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1340 18:07:59.295521  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1341 18:07:59.301694  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1342 18:07:59.305051  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1343 18:07:59.314890  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1344 18:07:59.318531  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1345 18:07:59.321559  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1346 18:07:59.331381  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1347 18:07:59.337927  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1348 18:07:59.347917  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1349 18:07:59.351294  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1350 18:07:59.354771  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1351 18:07:59.365091  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1352 18:07:59.368716  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1353 18:07:59.375043  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1354 18:07:59.381850  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1355 18:07:59.385222  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1356 18:07:59.391873  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1357 18:07:59.398228  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1358 18:07:59.408661  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1359 18:07:59.415353  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1360 18:07:59.425424  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1361 18:07:59.428485  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1362 18:07:59.435131  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1363 18:07:59.441672  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1364 18:07:59.451608  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1365 18:07:59.461959  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1366 18:07:59.465295  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1367 18:07:59.475142  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1368 18:07:59.481819  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1369 18:07:59.488511  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1370 18:07:59.494626  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1371 18:07:59.501293  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1372 18:07:59.508273  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1373 18:07:59.511672  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1374 18:07:59.517899  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1375 18:07:59.524642  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1376 18:07:59.527999  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1377 18:07:59.534917  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1378 18:07:59.538139  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1379 18:07:59.544487  LPC: Trying to open IO window from 800 size 1ff

 1380 18:07:59.551696  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1381 18:07:59.561368  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1382 18:07:59.567769  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1383 18:07:59.571165  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1384 18:07:59.578271  Root Device assign_resources, bus 0 link: 0

 1385 18:07:59.581522  Done setting resources.

 1386 18:07:59.588189  Show resources in subtree (Root Device)...After assigning values.

 1387 18:07:59.591514   Root Device child on link 0 DOMAIN: 0000

 1388 18:07:59.594845    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1389 18:07:59.604371    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1390 18:07:59.614736    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1391 18:07:59.614857     PCI: 00:00.0

 1392 18:07:59.624665     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1393 18:07:59.634415     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1394 18:07:59.644081     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1395 18:07:59.654095     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1396 18:07:59.664221     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1397 18:07:59.670655     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1398 18:07:59.680840     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1399 18:07:59.690757     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1400 18:07:59.700555     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1401 18:07:59.710585     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1402 18:07:59.720493     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1403 18:07:59.727208     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1404 18:07:59.737528     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1405 18:07:59.747539     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1406 18:07:59.757371     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1407 18:07:59.767503     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1408 18:07:59.777088     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1409 18:07:59.783929     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1410 18:07:59.793584     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1411 18:07:59.803506     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1412 18:07:59.806993     PCI: 00:02.0

 1413 18:07:59.816880     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1414 18:07:59.826997     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1415 18:07:59.836955     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1416 18:07:59.840289     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1417 18:07:59.850156     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1418 18:07:59.853428      GENERIC: 0.0

 1419 18:07:59.853521     PCI: 00:05.0

 1420 18:07:59.866919     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1421 18:07:59.869968     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1422 18:07:59.870063      GENERIC: 0.0

 1423 18:07:59.873025     PCI: 00:08.0

 1424 18:07:59.883043     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1425 18:07:59.886919     PCI: 00:0a.0

 1426 18:07:59.889792     PCI: 00:0d.0 child on link 0 USB0 port 0

 1427 18:07:59.899716     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1428 18:07:59.902938      USB0 port 0 child on link 0 USB3 port 0

 1429 18:07:59.906181       USB3 port 0

 1430 18:07:59.906279       USB3 port 1

 1431 18:07:59.909526       USB3 port 2

 1432 18:07:59.913013       USB3 port 3

 1433 18:07:59.916394     PCI: 00:14.0 child on link 0 USB0 port 0

 1434 18:07:59.926522     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1435 18:07:59.929465      USB0 port 0 child on link 0 USB2 port 0

 1436 18:07:59.933212       USB2 port 0

 1437 18:07:59.933312       USB2 port 1

 1438 18:07:59.936584       USB2 port 2

 1439 18:07:59.936684       USB2 port 3

 1440 18:07:59.939740       USB2 port 4

 1441 18:07:59.939835       USB2 port 5

 1442 18:07:59.943012       USB2 port 6

 1443 18:07:59.946423       USB2 port 7

 1444 18:07:59.946498       USB2 port 8

 1445 18:07:59.949764       USB2 port 9

 1446 18:07:59.949860       USB3 port 0

 1447 18:07:59.952992       USB3 port 1

 1448 18:07:59.953087       USB3 port 2

 1449 18:07:59.956412       USB3 port 3

 1450 18:07:59.956506     PCI: 00:14.2

 1451 18:07:59.966404     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1452 18:07:59.976420     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1453 18:07:59.982817     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1454 18:07:59.992914     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1455 18:07:59.993018      GENERIC: 0.0

 1456 18:07:59.999191     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1457 18:08:00.009405     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1458 18:08:00.009509      I2C: 00:1a

 1459 18:08:00.012472      I2C: 00:31

 1460 18:08:00.012549      I2C: 00:32

 1461 18:08:00.019486     PCI: 00:15.1 child on link 0 I2C: 00:10

 1462 18:08:00.029390     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1463 18:08:00.029490      I2C: 00:10

 1464 18:08:00.032462     PCI: 00:15.2

 1465 18:08:00.042514     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1466 18:08:00.042618     PCI: 00:15.3

 1467 18:08:00.052229     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1468 18:08:00.055500     PCI: 00:16.0

 1469 18:08:00.065627     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1470 18:08:00.068803     PCI: 00:19.0

 1471 18:08:00.072279     PCI: 00:19.1 child on link 0 I2C: 00:15

 1472 18:08:00.082083     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1473 18:08:00.082208      I2C: 00:15

 1474 18:08:00.089295     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1475 18:08:00.099086     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1476 18:08:00.108940     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1477 18:08:00.118659     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1478 18:08:00.122281      GENERIC: 0.0

 1479 18:08:00.122385      PCI: 01:00.0

 1480 18:08:00.132064      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1481 18:08:00.145230      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1482 18:08:00.155273      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1483 18:08:00.155395     PCI: 00:1e.0

 1484 18:08:00.168360     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1485 18:08:00.172368     PCI: 00:1e.2 child on link 0 SPI: 00

 1486 18:08:00.182160     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1487 18:08:00.182245      SPI: 00

 1488 18:08:00.185346     PCI: 00:1e.3 child on link 0 SPI: 00

 1489 18:08:00.198588     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1490 18:08:00.198690      SPI: 00

 1491 18:08:00.201834     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1492 18:08:00.212129     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1493 18:08:00.212241      PNP: 0c09.0

 1494 18:08:00.222227      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1495 18:08:00.225302     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1496 18:08:00.235048     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1497 18:08:00.245129     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1498 18:08:00.248581      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1499 18:08:00.252084       GENERIC: 0.0

 1500 18:08:00.254999       GENERIC: 1.0

 1501 18:08:00.255080     PCI: 00:1f.3

 1502 18:08:00.265141     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1503 18:08:00.275346     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1504 18:08:00.278366     PCI: 00:1f.5

 1505 18:08:00.288271     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1506 18:08:00.291663    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1507 18:08:00.294955     APIC: 00

 1508 18:08:00.295063     APIC: 01

 1509 18:08:00.295151     APIC: 03

 1510 18:08:00.298205     APIC: 05

 1511 18:08:00.298302     APIC: 07

 1512 18:08:00.298392     APIC: 06

 1513 18:08:00.301565     APIC: 02

 1514 18:08:00.301641     APIC: 04

 1515 18:08:00.304913  Done allocating resources.

 1516 18:08:00.311584  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1517 18:08:00.318131  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1518 18:08:00.321636  Configure GPIOs for I2S audio on UP4.

 1519 18:08:00.328376  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1520 18:08:00.331666  Enabling resources...

 1521 18:08:00.334982  PCI: 00:00.0 subsystem <- 8086/9a12

 1522 18:08:00.338323  PCI: 00:00.0 cmd <- 06

 1523 18:08:00.341546  PCI: 00:02.0 subsystem <- 8086/9a40

 1524 18:08:00.341648  PCI: 00:02.0 cmd <- 03

 1525 18:08:00.348177  PCI: 00:04.0 subsystem <- 8086/9a03

 1526 18:08:00.348275  PCI: 00:04.0 cmd <- 02

 1527 18:08:00.351880  PCI: 00:05.0 subsystem <- 8086/9a19

 1528 18:08:00.354907  PCI: 00:05.0 cmd <- 02

 1529 18:08:00.358259  PCI: 00:08.0 subsystem <- 8086/9a11

 1530 18:08:00.361885  PCI: 00:08.0 cmd <- 06

 1531 18:08:00.364834  PCI: 00:0d.0 subsystem <- 8086/9a13

 1532 18:08:00.368746  PCI: 00:0d.0 cmd <- 02

 1533 18:08:00.371478  PCI: 00:14.0 subsystem <- 8086/a0ed

 1534 18:08:00.374934  PCI: 00:14.0 cmd <- 02

 1535 18:08:00.378446  PCI: 00:14.2 subsystem <- 8086/a0ef

 1536 18:08:00.381622  PCI: 00:14.2 cmd <- 02

 1537 18:08:00.384975  PCI: 00:14.3 subsystem <- 8086/a0f0

 1538 18:08:00.385077  PCI: 00:14.3 cmd <- 02

 1539 18:08:00.392003  PCI: 00:15.0 subsystem <- 8086/a0e8

 1540 18:08:00.392111  PCI: 00:15.0 cmd <- 02

 1541 18:08:00.395292  PCI: 00:15.1 subsystem <- 8086/a0e9

 1542 18:08:00.398568  PCI: 00:15.1 cmd <- 02

 1543 18:08:00.401816  PCI: 00:15.2 subsystem <- 8086/a0ea

 1544 18:08:00.405286  PCI: 00:15.2 cmd <- 02

 1545 18:08:00.408684  PCI: 00:15.3 subsystem <- 8086/a0eb

 1546 18:08:00.411868  PCI: 00:15.3 cmd <- 02

 1547 18:08:00.415174  PCI: 00:16.0 subsystem <- 8086/a0e0

 1548 18:08:00.418580  PCI: 00:16.0 cmd <- 02

 1549 18:08:00.421879  PCI: 00:19.1 subsystem <- 8086/a0c6

 1550 18:08:00.425221  PCI: 00:19.1 cmd <- 02

 1551 18:08:00.428512  PCI: 00:1d.0 bridge ctrl <- 0013

 1552 18:08:00.431835  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1553 18:08:00.431919  PCI: 00:1d.0 cmd <- 06

 1554 18:08:00.438954  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1555 18:08:00.439062  PCI: 00:1e.0 cmd <- 06

 1556 18:08:00.442274  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1557 18:08:00.445455  PCI: 00:1e.2 cmd <- 06

 1558 18:08:00.448605  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1559 18:08:00.451870  PCI: 00:1e.3 cmd <- 02

 1560 18:08:00.455196  PCI: 00:1f.0 subsystem <- 8086/a087

 1561 18:08:00.458631  PCI: 00:1f.0 cmd <- 407

 1562 18:08:00.461936  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1563 18:08:00.465199  PCI: 00:1f.3 cmd <- 02

 1564 18:08:00.468450  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1565 18:08:00.471941  PCI: 00:1f.5 cmd <- 406

 1566 18:08:00.475078  PCI: 01:00.0 cmd <- 02

 1567 18:08:00.479343  done.

 1568 18:08:00.482810  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1569 18:08:00.486044  Initializing devices...

 1570 18:08:00.489432  Root Device init

 1571 18:08:00.492596  Chrome EC: Set SMI mask to 0x0000000000000000

 1572 18:08:00.499442  Chrome EC: clear events_b mask to 0x0000000000000000

 1573 18:08:00.505886  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1574 18:08:00.512314  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1575 18:08:00.515907  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1576 18:08:00.522876  Chrome EC: Set WAKE mask to 0x0000000000000000

 1577 18:08:00.529299  fw_config match found: DB_USB=USB3_ACTIVE

 1578 18:08:00.532891  Configure Right Type-C port orientation for retimer

 1579 18:08:00.536164  Root Device init finished in 44 msecs

 1580 18:08:00.539878  PCI: 00:00.0 init

 1581 18:08:00.543269  CPU TDP = 9 Watts

 1582 18:08:00.543358  CPU PL1 = 9 Watts

 1583 18:08:00.546627  CPU PL2 = 40 Watts

 1584 18:08:00.550000  CPU PL4 = 83 Watts

 1585 18:08:00.553141  PCI: 00:00.0 init finished in 8 msecs

 1586 18:08:00.553219  PCI: 00:02.0 init

 1587 18:08:00.556555  GMA: Found VBT in CBFS

 1588 18:08:00.559853  GMA: Found valid VBT in CBFS

 1589 18:08:00.566646  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1590 18:08:00.573264                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1591 18:08:00.576458  PCI: 00:02.0 init finished in 18 msecs

 1592 18:08:00.579646  PCI: 00:05.0 init

 1593 18:08:00.582947  PCI: 00:05.0 init finished in 0 msecs

 1594 18:08:00.586628  PCI: 00:08.0 init

 1595 18:08:00.589640  PCI: 00:08.0 init finished in 0 msecs

 1596 18:08:00.592849  PCI: 00:14.0 init

 1597 18:08:00.596858  PCI: 00:14.0 init finished in 0 msecs

 1598 18:08:00.599954  PCI: 00:14.2 init

 1599 18:08:00.602777  PCI: 00:14.2 init finished in 0 msecs

 1600 18:08:00.606702  PCI: 00:15.0 init

 1601 18:08:00.606783  I2C bus 0 version 0x3230302a

 1602 18:08:00.613206  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1603 18:08:00.616466  PCI: 00:15.0 init finished in 6 msecs

 1604 18:08:00.616549  PCI: 00:15.1 init

 1605 18:08:00.619814  I2C bus 1 version 0x3230302a

 1606 18:08:00.623033  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1607 18:08:00.626354  PCI: 00:15.1 init finished in 6 msecs

 1608 18:08:00.629586  PCI: 00:15.2 init

 1609 18:08:00.633474  I2C bus 2 version 0x3230302a

 1610 18:08:00.636457  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1611 18:08:00.640003  PCI: 00:15.2 init finished in 6 msecs

 1612 18:08:00.643149  PCI: 00:15.3 init

 1613 18:08:00.646385  I2C bus 3 version 0x3230302a

 1614 18:08:00.649654  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1615 18:08:00.652966  PCI: 00:15.3 init finished in 6 msecs

 1616 18:08:00.656248  PCI: 00:16.0 init

 1617 18:08:00.659582  PCI: 00:16.0 init finished in 0 msecs

 1618 18:08:00.662891  PCI: 00:19.1 init

 1619 18:08:00.662985  I2C bus 5 version 0x3230302a

 1620 18:08:00.669906  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1621 18:08:00.673173  PCI: 00:19.1 init finished in 6 msecs

 1622 18:08:00.673256  PCI: 00:1d.0 init

 1623 18:08:00.676497  Initializing PCH PCIe bridge.

 1624 18:08:00.679857  PCI: 00:1d.0 init finished in 3 msecs

 1625 18:08:00.684378  PCI: 00:1f.0 init

 1626 18:08:00.687566  IOAPIC: Initializing IOAPIC at 0xfec00000

 1627 18:08:00.694172  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1628 18:08:00.694278  IOAPIC: ID = 0x02

 1629 18:08:00.697246  IOAPIC: Dumping registers

 1630 18:08:00.700903    reg 0x0000: 0x02000000

 1631 18:08:00.703867    reg 0x0001: 0x00770020

 1632 18:08:00.703960    reg 0x0002: 0x00000000

 1633 18:08:00.710406  PCI: 00:1f.0 init finished in 21 msecs

 1634 18:08:00.710495  PCI: 00:1f.2 init

 1635 18:08:00.713617  Disabling ACPI via APMC.

 1636 18:08:00.716977  APMC done.

 1637 18:08:00.720236  PCI: 00:1f.2 init finished in 5 msecs

 1638 18:08:00.732525  PCI: 01:00.0 init

 1639 18:08:00.735738  PCI: 01:00.0 init finished in 0 msecs

 1640 18:08:00.739212  PNP: 0c09.0 init

 1641 18:08:00.742568  Google Chrome EC uptime: 10.166 seconds

 1642 18:08:00.749177  Google Chrome AP resets since EC boot: 0

 1643 18:08:00.751933  Google Chrome most recent AP reset causes:

 1644 18:08:00.759104  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1645 18:08:00.762173  PNP: 0c09.0 init finished in 19 msecs

 1646 18:08:00.767704  Devices initialized

 1647 18:08:00.771055  Show all devs... After init.

 1648 18:08:00.774394  Root Device: enabled 1

 1649 18:08:00.774464  DOMAIN: 0000: enabled 1

 1650 18:08:00.777605  CPU_CLUSTER: 0: enabled 1

 1651 18:08:00.781205  PCI: 00:00.0: enabled 1

 1652 18:08:00.784591  PCI: 00:02.0: enabled 1

 1653 18:08:00.784667  PCI: 00:04.0: enabled 1

 1654 18:08:00.787564  PCI: 00:05.0: enabled 1

 1655 18:08:00.790986  PCI: 00:06.0: enabled 0

 1656 18:08:00.794275  PCI: 00:07.0: enabled 0

 1657 18:08:00.794353  PCI: 00:07.1: enabled 0

 1658 18:08:00.797621  PCI: 00:07.2: enabled 0

 1659 18:08:00.801023  PCI: 00:07.3: enabled 0

 1660 18:08:00.804343  PCI: 00:08.0: enabled 1

 1661 18:08:00.804418  PCI: 00:09.0: enabled 0

 1662 18:08:00.807750  PCI: 00:0a.0: enabled 0

 1663 18:08:00.810760  PCI: 00:0d.0: enabled 1

 1664 18:08:00.814357  PCI: 00:0d.1: enabled 0

 1665 18:08:00.814433  PCI: 00:0d.2: enabled 0

 1666 18:08:00.817603  PCI: 00:0d.3: enabled 0

 1667 18:08:00.820805  PCI: 00:0e.0: enabled 0

 1668 18:08:00.820902  PCI: 00:10.2: enabled 1

 1669 18:08:00.824228  PCI: 00:10.6: enabled 0

 1670 18:08:00.827657  PCI: 00:10.7: enabled 0

 1671 18:08:00.830769  PCI: 00:12.0: enabled 0

 1672 18:08:00.830844  PCI: 00:12.6: enabled 0

 1673 18:08:00.834213  PCI: 00:13.0: enabled 0

 1674 18:08:00.837664  PCI: 00:14.0: enabled 1

 1675 18:08:00.841023  PCI: 00:14.1: enabled 0

 1676 18:08:00.841101  PCI: 00:14.2: enabled 1

 1677 18:08:00.844321  PCI: 00:14.3: enabled 1

 1678 18:08:00.847706  PCI: 00:15.0: enabled 1

 1679 18:08:00.851011  PCI: 00:15.1: enabled 1

 1680 18:08:00.851088  PCI: 00:15.2: enabled 1

 1681 18:08:00.854205  PCI: 00:15.3: enabled 1

 1682 18:08:00.857537  PCI: 00:16.0: enabled 1

 1683 18:08:00.857615  PCI: 00:16.1: enabled 0

 1684 18:08:00.860838  PCI: 00:16.2: enabled 0

 1685 18:08:00.864113  PCI: 00:16.3: enabled 0

 1686 18:08:00.867319  PCI: 00:16.4: enabled 0

 1687 18:08:00.867418  PCI: 00:16.5: enabled 0

 1688 18:08:00.870608  PCI: 00:17.0: enabled 0

 1689 18:08:00.873831  PCI: 00:19.0: enabled 0

 1690 18:08:00.877259  PCI: 00:19.1: enabled 1

 1691 18:08:00.877362  PCI: 00:19.2: enabled 0

 1692 18:08:00.880724  PCI: 00:1c.0: enabled 1

 1693 18:08:00.883801  PCI: 00:1c.1: enabled 0

 1694 18:08:00.887591  PCI: 00:1c.2: enabled 0

 1695 18:08:00.887667  PCI: 00:1c.3: enabled 0

 1696 18:08:00.890359  PCI: 00:1c.4: enabled 0

 1697 18:08:00.894196  PCI: 00:1c.5: enabled 0

 1698 18:08:00.897168  PCI: 00:1c.6: enabled 1

 1699 18:08:00.897245  PCI: 00:1c.7: enabled 0

 1700 18:08:00.900639  PCI: 00:1d.0: enabled 1

 1701 18:08:00.903785  PCI: 00:1d.1: enabled 0

 1702 18:08:00.903888  PCI: 00:1d.2: enabled 1

 1703 18:08:00.907130  PCI: 00:1d.3: enabled 0

 1704 18:08:00.910652  PCI: 00:1e.0: enabled 1

 1705 18:08:00.913595  PCI: 00:1e.1: enabled 0

 1706 18:08:00.913690  PCI: 00:1e.2: enabled 1

 1707 18:08:00.917148  PCI: 00:1e.3: enabled 1

 1708 18:08:00.920654  PCI: 00:1f.0: enabled 1

 1709 18:08:00.924014  PCI: 00:1f.1: enabled 0

 1710 18:08:00.924116  PCI: 00:1f.2: enabled 1

 1711 18:08:00.927092  PCI: 00:1f.3: enabled 1

 1712 18:08:00.930759  PCI: 00:1f.4: enabled 0

 1713 18:08:00.933732  PCI: 00:1f.5: enabled 1

 1714 18:08:00.933833  PCI: 00:1f.6: enabled 0

 1715 18:08:00.936845  PCI: 00:1f.7: enabled 0

 1716 18:08:00.940774  APIC: 00: enabled 1

 1717 18:08:00.940867  GENERIC: 0.0: enabled 1

 1718 18:08:00.943927  GENERIC: 0.0: enabled 1

 1719 18:08:00.947253  GENERIC: 1.0: enabled 1

 1720 18:08:00.950606  GENERIC: 0.0: enabled 1

 1721 18:08:00.950678  GENERIC: 1.0: enabled 1

 1722 18:08:00.954035  USB0 port 0: enabled 1

 1723 18:08:00.957320  GENERIC: 0.0: enabled 1

 1724 18:08:00.957422  USB0 port 0: enabled 1

 1725 18:08:00.960802  GENERIC: 0.0: enabled 1

 1726 18:08:00.964045  I2C: 00:1a: enabled 1

 1727 18:08:00.966875  I2C: 00:31: enabled 1

 1728 18:08:00.966958  I2C: 00:32: enabled 1

 1729 18:08:00.970027  I2C: 00:10: enabled 1

 1730 18:08:00.973386  I2C: 00:15: enabled 1

 1731 18:08:00.973485  GENERIC: 0.0: enabled 0

 1732 18:08:00.976699  GENERIC: 1.0: enabled 0

 1733 18:08:00.980560  GENERIC: 0.0: enabled 1

 1734 18:08:00.980636  SPI: 00: enabled 1

 1735 18:08:00.983938  SPI: 00: enabled 1

 1736 18:08:00.987037  PNP: 0c09.0: enabled 1

 1737 18:08:00.987106  GENERIC: 0.0: enabled 1

 1738 18:08:00.990241  USB3 port 0: enabled 1

 1739 18:08:00.993654  USB3 port 1: enabled 1

 1740 18:08:00.996724  USB3 port 2: enabled 0

 1741 18:08:00.996817  USB3 port 3: enabled 0

 1742 18:08:01.000251  USB2 port 0: enabled 0

 1743 18:08:01.003232  USB2 port 1: enabled 1

 1744 18:08:01.003306  USB2 port 2: enabled 1

 1745 18:08:01.007096  USB2 port 3: enabled 0

 1746 18:08:01.010176  USB2 port 4: enabled 1

 1747 18:08:01.010283  USB2 port 5: enabled 0

 1748 18:08:01.013418  USB2 port 6: enabled 0

 1749 18:08:01.017103  USB2 port 7: enabled 0

 1750 18:08:01.020186  USB2 port 8: enabled 0

 1751 18:08:01.020256  USB2 port 9: enabled 0

 1752 18:08:01.023796  USB3 port 0: enabled 0

 1753 18:08:01.026832  USB3 port 1: enabled 1

 1754 18:08:01.026922  USB3 port 2: enabled 0

 1755 18:08:01.029878  USB3 port 3: enabled 0

 1756 18:08:01.033627  GENERIC: 0.0: enabled 1

 1757 18:08:01.037066  GENERIC: 1.0: enabled 1

 1758 18:08:01.037144  APIC: 01: enabled 1

 1759 18:08:01.039895  APIC: 03: enabled 1

 1760 18:08:01.039972  APIC: 05: enabled 1

 1761 18:08:01.043742  APIC: 07: enabled 1

 1762 18:08:01.046655  APIC: 06: enabled 1

 1763 18:08:01.046733  APIC: 02: enabled 1

 1764 18:08:01.050117  APIC: 04: enabled 1

 1765 18:08:01.053449  PCI: 01:00.0: enabled 1

 1766 18:08:01.056830  BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms

 1767 18:08:01.063411  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1768 18:08:01.066664  ELOG: NV offset 0xf30000 size 0x1000

 1769 18:08:01.073377  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1770 18:08:01.079914  ELOG: Event(17) added with size 13 at 2024-07-12 18:08:01 UTC

 1771 18:08:01.086485  ELOG: Event(92) added with size 9 at 2024-07-12 18:08:01 UTC

 1772 18:08:01.093201  ELOG: Event(93) added with size 9 at 2024-07-12 18:08:01 UTC

 1773 18:08:01.099928  ELOG: Event(9E) added with size 10 at 2024-07-12 18:08:01 UTC

 1774 18:08:01.106377  ELOG: Event(9F) added with size 14 at 2024-07-12 18:08:01 UTC

 1775 18:08:01.113056  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1776 18:08:01.116063  ELOG: Event(A1) added with size 10 at 2024-07-12 18:08:01 UTC

 1777 18:08:01.123102  elog_add_boot_reason: Logged recovery mode boot, reason: 0x02

 1778 18:08:01.129235  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1779 18:08:01.133088  Finalize devices...

 1780 18:08:01.133164  Devices finalized

 1781 18:08:01.139227  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1782 18:08:01.142594  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1783 18:08:01.149463  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1784 18:08:01.156409  ME: HFSTS1                      : 0x80030055

 1785 18:08:01.159653  ME: HFSTS2                      : 0x30280116

 1786 18:08:01.162724  ME: HFSTS3                      : 0x00000050

 1787 18:08:01.169256  ME: HFSTS4                      : 0x00004000

 1788 18:08:01.173142  ME: HFSTS5                      : 0x00000000

 1789 18:08:01.175863  ME: HFSTS6                      : 0x00400006

 1790 18:08:01.179109  ME: Manufacturing Mode          : YES

 1791 18:08:01.186349  ME: SPI Protection Mode Enabled : NO

 1792 18:08:01.189622  ME: FW Partition Table          : OK

 1793 18:08:01.192897  ME: Bringup Loader Failure      : NO

 1794 18:08:01.196293  ME: Firmware Init Complete      : NO

 1795 18:08:01.199601  ME: Boot Options Present        : NO

 1796 18:08:01.202944  ME: Update In Progress          : NO

 1797 18:08:01.205612  ME: D0i3 Support                : YES

 1798 18:08:01.208978  ME: Low Power State Enabled     : NO

 1799 18:08:01.215705  ME: CPU Replaced                : YES

 1800 18:08:01.219300  ME: CPU Replacement Valid       : YES

 1801 18:08:01.222378  ME: Current Working State       : 5

 1802 18:08:01.225486  ME: Current Operation State     : 1

 1803 18:08:01.229441  ME: Current Operation Mode      : 3

 1804 18:08:01.232575  ME: Error Code                  : 0

 1805 18:08:01.235832  ME: Enhanced Debug Mode         : NO

 1806 18:08:01.239001  ME: CPU Debug Disabled          : YES

 1807 18:08:01.242581  ME: TXT Support                 : NO

 1808 18:08:01.248686  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1809 18:08:01.255511  ELOG: Event(91) added with size 10 at 2024-07-12 18:08:01 UTC

 1810 18:08:01.262221  Chrome EC: clear events_b mask to 0x0000000020004000

 1811 18:08:01.269376  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1812 18:08:01.275801  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1813 18:08:01.279108  CBFS: 'fallback/slic' not found.

 1814 18:08:01.282445  ACPI: Writing ACPI tables at 76b01000.

 1815 18:08:01.285672  ACPI:    * FACS

 1816 18:08:01.285751  ACPI:    * DSDT

 1817 18:08:01.288976  Ramoops buffer: 0x100000@0x76a00000.

 1818 18:08:01.295557  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1819 18:08:01.299016  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1820 18:08:01.303030  Google Chrome EC: version:

 1821 18:08:01.306481  	ro: voema_v2.0.7540-147f8d37d1

 1822 18:08:01.309511  	rw: voema_v2.0.7540-147f8d37d1

 1823 18:08:01.312400    running image: 1

 1824 18:08:01.319308  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1825 18:08:01.322462  ACPI:    * FADT

 1826 18:08:01.322546  SCI is IRQ9

 1827 18:08:01.325627  ACPI: added table 1/32, length now 40

 1828 18:08:01.329480  ACPI:     * SSDT

 1829 18:08:01.332611  Found 1 CPU(s) with 8 core(s) each.

 1830 18:08:01.335805  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1831 18:08:01.342212  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1832 18:08:01.345533  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1833 18:08:01.349447  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1834 18:08:01.355770  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1835 18:08:01.362416  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1836 18:08:01.365819  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1837 18:08:01.372317  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1838 18:08:01.378952  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1839 18:08:01.382266  \_SB.PCI0.RP09: Added StorageD3Enable property

 1840 18:08:01.385810  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1841 18:08:01.392243  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1842 18:08:01.399094  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1843 18:08:01.402306  PS2K: Passing 80 keymaps to kernel

 1844 18:08:01.408912  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1845 18:08:01.415762  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1846 18:08:01.422364  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1847 18:08:01.429112  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1848 18:08:01.435546  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1849 18:08:01.441967  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1850 18:08:01.448955  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1851 18:08:01.455586  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1852 18:08:01.458943  ACPI: added table 2/32, length now 44

 1853 18:08:01.459025  ACPI:    * MCFG

 1854 18:08:01.465221  ACPI: added table 3/32, length now 48

 1855 18:08:01.465299  ACPI:    * TPM2

 1856 18:08:01.468858  TPM2 log created at 0x769f0000

 1857 18:08:01.472198  ACPI: added table 4/32, length now 52

 1858 18:08:01.475486  ACPI:    * MADT

 1859 18:08:01.475593  SCI is IRQ9

 1860 18:08:01.478703  ACPI: added table 5/32, length now 56

 1861 18:08:01.482107  current = 76b09850

 1862 18:08:01.482205  ACPI:    * DMAR

 1863 18:08:01.485206  ACPI: added table 6/32, length now 60

 1864 18:08:01.492134  ACPI: added table 7/32, length now 64

 1865 18:08:01.492230  ACPI:    * HPET

 1866 18:08:01.495088  ACPI: added table 8/32, length now 68

 1867 18:08:01.498960  ACPI: done.

 1868 18:08:01.499039  ACPI tables: 35216 bytes.

 1869 18:08:01.501611  smbios_write_tables: 769ef000

 1870 18:08:01.505428  EC returned error result code 3

 1871 18:08:01.508719  Couldn't obtain OEM name from CBI

 1872 18:08:01.511963  Create SMBIOS type 16

 1873 18:08:01.515371  Create SMBIOS type 17

 1874 18:08:01.518621  GENERIC: 0.0 (WIFI Device)

 1875 18:08:01.518697  SMBIOS tables: 1750 bytes.

 1876 18:08:01.525349  Writing table forward entry at 0x00000500

 1877 18:08:01.531942  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1878 18:08:01.534975  Writing coreboot table at 0x76b25000

 1879 18:08:01.542019   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1880 18:08:01.545161   1. 0000000000001000-000000000009ffff: RAM

 1881 18:08:01.548441   2. 00000000000a0000-00000000000fffff: RESERVED

 1882 18:08:01.554950   3. 0000000000100000-00000000769eefff: RAM

 1883 18:08:01.558810   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1884 18:08:01.564900   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1885 18:08:01.571507   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1886 18:08:01.575211   7. 0000000077000000-000000007fbfffff: RESERVED

 1887 18:08:01.578403   8. 00000000c0000000-00000000cfffffff: RESERVED

 1888 18:08:01.584851   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1889 18:08:01.588202  10. 00000000fb000000-00000000fb000fff: RESERVED

 1890 18:08:01.594985  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1891 18:08:01.598325  12. 00000000fed80000-00000000fed87fff: RESERVED

 1892 18:08:01.605043  13. 00000000fed90000-00000000fed92fff: RESERVED

 1893 18:08:01.608069  14. 00000000feda0000-00000000feda1fff: RESERVED

 1894 18:08:01.615157  15. 00000000fedc0000-00000000feddffff: RESERVED

 1895 18:08:01.618486  16. 0000000100000000-00000002803fffff: RAM

 1896 18:08:01.621667  Passing 4 GPIOs to payload:

 1897 18:08:01.624993              NAME |       PORT | POLARITY |     VALUE

 1898 18:08:01.631713               lid |  undefined |     high |      high

 1899 18:08:01.635150             power |  undefined |     high |       low

 1900 18:08:01.641243             oprom |  undefined |     high |       low

 1901 18:08:01.648258          EC in RW | 0x000000e5 |     high |       low

 1902 18:08:01.654702  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4cd8

 1903 18:08:01.654815  coreboot table: 1576 bytes.

 1904 18:08:01.661114  IMD ROOT    0. 0x76fff000 0x00001000

 1905 18:08:01.664904  IMD SMALL   1. 0x76ffe000 0x00001000

 1906 18:08:01.668299  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1907 18:08:01.671534  VPD         3. 0x76c4d000 0x00000367

 1908 18:08:01.674754  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1909 18:08:01.677828  CONSOLE     5. 0x76c2c000 0x00020000

 1910 18:08:01.681591  FMAP        6. 0x76c2b000 0x00000578

 1911 18:08:01.684839  TIME STAMP  7. 0x76c2a000 0x00000910

 1912 18:08:01.688506  VBOOT WORK  8. 0x76c16000 0x00014000

 1913 18:08:01.694438  ROMSTG STCK 9. 0x76c15000 0x00001000

 1914 18:08:01.697696  AFTER CAR  10. 0x76c0a000 0x0000b000

 1915 18:08:01.701697  RAMSTAGE   11. 0x76b97000 0x00073000

 1916 18:08:01.704720  REFCODE    12. 0x76b42000 0x00055000

 1917 18:08:01.708420  SMM BACKUP 13. 0x76b32000 0x00010000

 1918 18:08:01.711651  4f444749   14. 0x76b30000 0x00002000

 1919 18:08:01.714815  EXT VBT15. 0x76b2d000 0x0000219f

 1920 18:08:01.718264  COREBOOT   16. 0x76b25000 0x00008000

 1921 18:08:01.721443  ACPI       17. 0x76b01000 0x00024000

 1922 18:08:01.728193  ACPI GNVS  18. 0x76b00000 0x00001000

 1923 18:08:01.731460  RAMOOPS    19. 0x76a00000 0x00100000

 1924 18:08:01.734759  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1925 18:08:01.738075  SMBIOS     21. 0x769ef000 0x00000800

 1926 18:08:01.738185  IMD small region:

 1927 18:08:01.744513    IMD ROOT    0. 0x76ffec00 0x00000400

 1928 18:08:01.748120    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1929 18:08:01.751165    POWER STATE 2. 0x76ffeb80 0x00000044

 1930 18:08:01.754868    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1931 18:08:01.757814    MEM INFO    4. 0x76ffe980 0x000001e0

 1932 18:08:01.764635  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1933 18:08:01.767846  MTRR: Physical address space:

 1934 18:08:01.774436  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1935 18:08:01.781125  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1936 18:08:01.787826  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1937 18:08:01.794656  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1938 18:08:01.797770  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1939 18:08:01.804593  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1940 18:08:01.810849  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1941 18:08:01.814095  MTRR: Fixed MSR 0x250 0x0606060606060606

 1942 18:08:01.820964  MTRR: Fixed MSR 0x258 0x0606060606060606

 1943 18:08:01.824625  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 18:08:01.828022  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 18:08:01.831202  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 18:08:01.837472  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 18:08:01.840826  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 18:08:01.844259  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 18:08:01.847639  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 18:08:01.854263  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 18:08:01.857524  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 18:08:01.860698  call enable_fixed_mtrr()

 1953 18:08:01.863943  CPU physical address size: 39 bits

 1954 18:08:01.867568  MTRR: default type WB/UC MTRR counts: 6/6.

 1955 18:08:01.870615  MTRR: UC selected as default type.

 1956 18:08:01.877775  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1957 18:08:01.884453  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1958 18:08:01.890803  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1959 18:08:01.897387  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1960 18:08:01.904111  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1961 18:08:01.910606  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1962 18:08:01.910680  

 1963 18:08:01.914032  MTRR check

 1964 18:08:01.914112  Fixed MTRRs   : Enabled

 1965 18:08:01.917437  Variable MTRRs: Enabled

 1966 18:08:01.917536  

 1967 18:08:01.920591  MTRR: Fixed MSR 0x250 0x0606060606060606

 1968 18:08:01.927033  MTRR: Fixed MSR 0x258 0x0606060606060606

 1969 18:08:01.930906  MTRR: Fixed MSR 0x259 0x0000000000000000

 1970 18:08:01.934028  MTRR: Fixed MSR 0x268 0x0606060606060606

 1971 18:08:01.937291  MTRR: Fixed MSR 0x269 0x0606060606060606

 1972 18:08:01.940636  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1973 18:08:01.947120  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1974 18:08:01.950485  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1975 18:08:01.953791  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1976 18:08:01.956991  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1977 18:08:01.963709  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1978 18:08:01.967015  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 18:08:01.970211  call enable_fixed_mtrr()

 1980 18:08:01.973447  MTRR: Fixed MSR 0x258 0x0606060606060606

 1981 18:08:01.977095  MTRR: Fixed MSR 0x259 0x0000000000000000

 1982 18:08:01.983440  MTRR: Fixed MSR 0x268 0x0606060606060606

 1983 18:08:01.986557  MTRR: Fixed MSR 0x269 0x0606060606060606

 1984 18:08:01.990329  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1985 18:08:01.993639  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1986 18:08:02.000299  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1987 18:08:02.003751  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1988 18:08:02.006414  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1989 18:08:02.009748  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1990 18:08:02.013753  CPU physical address size: 39 bits

 1991 18:08:02.020299  call enable_fixed_mtrr()

 1992 18:08:02.024129  MTRR: Fixed MSR 0x250 0x0606060606060606

 1993 18:08:02.027137  MTRR: Fixed MSR 0x250 0x0606060606060606

 1994 18:08:02.030556  MTRR: Fixed MSR 0x258 0x0606060606060606

 1995 18:08:02.037161  MTRR: Fixed MSR 0x259 0x0000000000000000

 1996 18:08:02.040802  MTRR: Fixed MSR 0x268 0x0606060606060606

 1997 18:08:02.043976  MTRR: Fixed MSR 0x269 0x0606060606060606

 1998 18:08:02.047169  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1999 18:08:02.050450  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2000 18:08:02.057060  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2001 18:08:02.060491  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2002 18:08:02.063539  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2003 18:08:02.067251  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2004 18:08:02.074556  MTRR: Fixed MSR 0x258 0x0606060606060606

 2005 18:08:02.074652  call enable_fixed_mtrr()

 2006 18:08:02.081062  MTRR: Fixed MSR 0x259 0x0000000000000000

 2007 18:08:02.084235  MTRR: Fixed MSR 0x268 0x0606060606060606

 2008 18:08:02.087777  MTRR: Fixed MSR 0x269 0x0606060606060606

 2009 18:08:02.090805  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2010 18:08:02.097822  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2011 18:08:02.101209  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2012 18:08:02.104453  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2013 18:08:02.107842  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2014 18:08:02.114227  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2015 18:08:02.117592  CPU physical address size: 39 bits

 2016 18:08:02.120925  call enable_fixed_mtrr()

 2017 18:08:02.127618  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2018 18:08:02.130909  MTRR: Fixed MSR 0x250 0x0606060606060606

 2019 18:08:02.137319  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2020 18:08:02.144283  MTRR: Fixed MSR 0x258 0x0606060606060606

 2021 18:08:02.147197  MTRR: Fixed MSR 0x259 0x0000000000000000

 2022 18:08:02.150623  MTRR: Fixed MSR 0x268 0x0606060606060606

 2023 18:08:02.154294  MTRR: Fixed MSR 0x269 0x0606060606060606

 2024 18:08:02.161009  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2025 18:08:02.163689  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2026 18:08:02.167003  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2027 18:08:02.170713  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2028 18:08:02.173729  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2029 18:08:02.180204  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2030 18:08:02.183531  Checking segment from ROM address 0xffc02b38

 2031 18:08:02.187483  call enable_fixed_mtrr()

 2032 18:08:02.193876  Checking segment from ROM address 0xffc02b54

 2033 18:08:02.197063  CPU physical address size: 39 bits

 2034 18:08:02.200656  Loading segment from ROM address 0xffc02b38

 2035 18:08:02.203747  CPU physical address size: 39 bits

 2036 18:08:02.207547    code (compression=0)

 2037 18:08:02.210697  CPU physical address size: 39 bits

 2038 18:08:02.220317    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2039 18:08:02.223610  MTRR: Fixed MSR 0x250 0x0606060606060606

 2040 18:08:02.226885  MTRR: Fixed MSR 0x250 0x0606060606060606

 2041 18:08:02.230306  MTRR: Fixed MSR 0x258 0x0606060606060606

 2042 18:08:02.236931  MTRR: Fixed MSR 0x259 0x0000000000000000

 2043 18:08:02.240118  MTRR: Fixed MSR 0x268 0x0606060606060606

 2044 18:08:02.243561  MTRR: Fixed MSR 0x269 0x0606060606060606

 2045 18:08:02.246870  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2046 18:08:02.253492  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2047 18:08:02.256453  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2048 18:08:02.260228  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2049 18:08:02.263275  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2050 18:08:02.269735  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2051 18:08:02.273156  MTRR: Fixed MSR 0x258 0x0606060606060606

 2052 18:08:02.276325  call enable_fixed_mtrr()

 2053 18:08:02.280062  MTRR: Fixed MSR 0x259 0x0000000000000000

 2054 18:08:02.283172  MTRR: Fixed MSR 0x268 0x0606060606060606

 2055 18:08:02.289547  MTRR: Fixed MSR 0x269 0x0606060606060606

 2056 18:08:02.292869  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2057 18:08:02.296245  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2058 18:08:02.299362  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2059 18:08:02.306220  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2060 18:08:02.309713  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2061 18:08:02.312653  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2062 18:08:02.315838  CPU physical address size: 39 bits

 2063 18:08:02.320716  call enable_fixed_mtrr()

 2064 18:08:02.330466  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2065 18:08:02.333841  CPU physical address size: 39 bits

 2066 18:08:02.333940  it's not compressed!

 2067 18:08:02.473896  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2068 18:08:02.481138  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2069 18:08:02.487842  Loading segment from ROM address 0xffc02b54

 2070 18:08:02.487918    Entry Point 0x30000000

 2071 18:08:02.490558  Loaded segments

 2072 18:08:02.497602  BS: BS_PAYLOAD_LOAD run times (exec / console): 299 / 65 ms

 2073 18:08:02.540245  Finalizing chipset.

 2074 18:08:02.543393  Finalizing SMM.

 2075 18:08:02.543494  APMC done.

 2076 18:08:02.550400  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2077 18:08:02.553579  mp_park_aps done after 0 msecs.

 2078 18:08:02.557081  Jumping to boot code at 0x30000000(0x76b25000)

 2079 18:08:02.567080  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2080 18:08:02.567191  

 2081 18:08:02.567281  

 2082 18:08:02.567373  

 2083 18:08:02.570528  Starting depthcharge on Voema...

 2084 18:08:02.570625  

 2085 18:08:02.571023  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2086 18:08:02.571146  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2087 18:08:02.571254  Setting prompt string to ['volteer:']
 2088 18:08:02.571356  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:40)
 2089 18:08:02.580598  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2090 18:08:02.580710  

 2091 18:08:02.586711  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2092 18:08:02.586796  

 2093 18:08:02.590264  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2094 18:08:02.594259  

 2095 18:08:02.594361  Failed to find eMMC card reader

 2096 18:08:02.594449  

 2097 18:08:02.597964  Wipe memory regions:

 2098 18:08:02.598062  

 2099 18:08:02.601075  	[0x00000000001000, 0x000000000a0000)

 2100 18:08:02.601150  

 2101 18:08:02.604081  	[0x00000000100000, 0x00000030000000)

 2102 18:08:02.631977  

 2103 18:08:02.635131  	[0x00000032662db0, 0x000000769ef000)

 2104 18:08:02.670437  

 2105 18:08:02.673668  	[0x00000100000000, 0x00000280400000)

 2106 18:08:02.872966  

 2107 18:08:02.876857  ec_init: CrosEC protocol v3 supported (256, 256)

 2108 18:08:02.876962  

 2109 18:08:02.883122  update_port_state: port C0 state: usb enable 1 mux conn 0

 2110 18:08:02.883231  

 2111 18:08:02.893432  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2112 18:08:02.896637  

 2113 18:08:02.899949  pmc_check_ipc_sts: STS_BUSY done after 1962 us

 2114 18:08:02.900032  

 2115 18:08:02.903296  send_conn_disc_msg: pmc_send_cmd succeeded

 2116 18:08:03.336986  

 2117 18:08:03.337128  R8152: Initializing

 2118 18:08:03.337222  

 2119 18:08:03.340159  Version 6 (ocp_data = 5c30)

 2120 18:08:03.340236  

 2121 18:08:03.343977  R8152: Done initializing

 2122 18:08:03.344055  

 2123 18:08:03.346840  Adding net device

 2124 18:08:03.649644  

 2125 18:08:03.653044  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2126 18:08:03.653139  

 2127 18:08:03.653219  


 2128 18:08:03.656167  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 18:08:03.656260  Sending line: 'tftpboot 192.168.201.1 14808677/tftp-deploy-g6ci4d03/kernel/bzImage 14808677/tftp-deploy-g6ci4d03/kernel/cmdline 14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz'
 2131 18:08:03.756735  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2132 18:08:03.756841  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2133 18:08:03.761102  volteer: tftpboot 192.168.201.1 14808677/tftp-deploy-g6ci4d03/kernel/bzImploy-g6ci4d03/kernel/cmdline 14808677/tftp-deploy-g6ci4d03/ramdisk/ramdisk.cpio.gz

 2134 18:08:03.761209  

 2135 18:08:03.761296  Waiting for link

 2136 18:08:03.964919  

 2137 18:08:03.965047  done.

 2138 18:08:03.965128  

 2139 18:08:03.965201  MAC: 00:24:32:30:7c:e4

 2140 18:08:03.965271  

 2141 18:08:03.968461  Sending DHCP discover... done.

 2142 18:08:03.968540  

 2143 18:08:03.971701  Waiting for reply... done.

 2144 18:08:03.971779  

 2145 18:08:03.975196  Sending DHCP request... done.

 2146 18:08:03.975295  

 2147 18:08:04.004161  Waiting for reply... done.

 2148 18:08:04.004326  

 2149 18:08:04.004414  My ip is 192.168.201.23

 2150 18:08:04.004496  

 2151 18:08:04.007862  The DHCP server ip is 192.168.201.1

 2152 18:08:04.010856  

 2153 18:08:04.014713  TFTP server IP predefined by user: 192.168.201.1

 2154 18:08:04.014809  

 2155 18:08:04.021165  Bootfile predefined by user: 14808677/tftp-deploy-g6ci4d03/kernel/bzImage

 2156 18:08:04.021244  

 2157 18:08:04.024446  Sending tftp read request... done.

 2158 18:08:04.024514  

 2159 18:08:04.030940  Waiting for the transfer... 

 2160 18:08:04.031029  

 2161 18:08:04.539871  00000000 ################################################################

 2162 18:08:04.539984  

 2163 18:08:05.045303  00080000 ################################################################

 2164 18:08:05.045422  

 2165 18:08:05.564281  00100000 ################################################################

 2166 18:08:05.564410  

 2167 18:08:06.081585  00180000 ################################################################

 2168 18:08:06.081699  

 2169 18:08:06.604727  00200000 ################################################################

 2170 18:08:06.604846  

 2171 18:08:07.136028  00280000 ################################################################

 2172 18:08:07.136140  

 2173 18:08:07.660213  00300000 ################################################################

 2174 18:08:07.660356  

 2175 18:08:08.178852  00380000 ################################################################

 2176 18:08:08.178974  

 2177 18:08:08.701763  00400000 ################################################################

 2178 18:08:08.701875  

 2179 18:08:09.227849  00480000 ################################################################

 2180 18:08:09.227966  

 2181 18:08:09.753332  00500000 ################################################################

 2182 18:08:09.753473  

 2183 18:08:10.271219  00580000 ################################################################

 2184 18:08:10.271362  

 2185 18:08:10.804593  00600000 ################################################################

 2186 18:08:10.804738  

 2187 18:08:11.327713  00680000 ################################################################

 2188 18:08:11.327861  

 2189 18:08:11.851552  00700000 ################################################################

 2190 18:08:11.851693  

 2191 18:08:12.367898  00780000 ################################################################

 2192 18:08:12.368035  

 2193 18:08:12.886337  00800000 ################################################################

 2194 18:08:12.886483  

 2195 18:08:13.408354  00880000 ################################################################

 2196 18:08:13.408507  

 2197 18:08:13.927507  00900000 ################################################################

 2198 18:08:13.927659  

 2199 18:08:14.446059  00980000 ################################################################

 2200 18:08:14.446209  

 2201 18:08:14.963892  00a00000 ################################################################

 2202 18:08:14.964040  

 2203 18:08:15.486808  00a80000 ################################################################

 2204 18:08:15.486948  

 2205 18:08:16.007591  00b00000 ################################################################

 2206 18:08:16.007728  

 2207 18:08:16.525853  00b80000 ################################################################

 2208 18:08:16.526000  

 2209 18:08:17.041764  00c00000 ################################################################

 2210 18:08:17.041905  

 2211 18:08:17.562546  00c80000 ################################################################

 2212 18:08:17.562733  

 2213 18:08:18.084691  00d00000 ################################################################

 2214 18:08:18.084801  

 2215 18:08:18.611982  00d80000 ################################################################

 2216 18:08:18.612092  

 2217 18:08:19.130515  00e00000 ################################################################

 2218 18:08:19.130635  

 2219 18:08:19.658184  00e80000 ################################################################

 2220 18:08:19.658296  

 2221 18:08:20.179557  00f00000 ################################################################

 2222 18:08:20.179670  

 2223 18:08:20.703535  00f80000 ################################################################

 2224 18:08:20.703649  

 2225 18:08:21.010900  01000000 ####################################### done.

 2226 18:08:21.011030  

 2227 18:08:21.014162  The bootfile was 17089024 bytes long.

 2228 18:08:21.014256  

 2229 18:08:21.017476  Sending tftp read request... done.

 2230 18:08:21.017554  

 2231 18:08:21.021187  Waiting for the transfer... 

 2232 18:08:21.021281  

 2233 18:08:21.538159  00000000 ################################################################

 2234 18:08:21.538277  

 2235 18:08:22.050254  00080000 ################################################################

 2236 18:08:22.050367  

 2237 18:08:22.573132  00100000 ################################################################

 2238 18:08:22.573273  

 2239 18:08:23.098459  00180000 ################################################################

 2240 18:08:23.098573  

 2241 18:08:23.617774  00200000 ################################################################

 2242 18:08:23.617926  

 2243 18:08:24.130660  00280000 ################################################################

 2244 18:08:24.130794  

 2245 18:08:24.650538  00300000 ################################################################

 2246 18:08:24.650664  

 2247 18:08:25.168417  00380000 ################################################################

 2248 18:08:25.168534  

 2249 18:08:25.684621  00400000 ################################################################

 2250 18:08:25.684736  

 2251 18:08:26.200482  00480000 ################################################################

 2252 18:08:26.200619  

 2253 18:08:26.713558  00500000 ################################################################

 2254 18:08:26.713674  

 2255 18:08:27.227212  00580000 ################################################################

 2256 18:08:27.227326  

 2257 18:08:27.756992  00600000 ################################################################

 2258 18:08:27.757141  

 2259 18:08:28.267950  00680000 ################################################################

 2260 18:08:28.268063  

 2261 18:08:28.778827  00700000 ################################################################

 2262 18:08:28.778987  

 2263 18:08:29.301611  00780000 ################################################################

 2264 18:08:29.301725  

 2265 18:08:29.824267  00800000 ################################################################

 2266 18:08:29.824418  

 2267 18:08:30.354130  00880000 ################################################################

 2268 18:08:30.354276  

 2269 18:08:30.874659  00900000 ################################################################

 2270 18:08:30.874782  

 2271 18:08:31.257121  00980000 ############################################### done.

 2272 18:08:31.257318  

 2273 18:08:31.260186  Sending tftp read request... done.

 2274 18:08:31.260282  

 2275 18:08:31.264191  Waiting for the transfer... 

 2276 18:08:31.264263  

 2277 18:08:31.264322  00000000 # done.

 2278 18:08:31.264384  

 2279 18:08:31.273544  Command line loaded dynamically from TFTP file: 14808677/tftp-deploy-g6ci4d03/kernel/cmdline

 2280 18:08:31.273643  

 2281 18:08:31.289809  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2282 18:08:31.295709  

 2283 18:08:31.299276  Shutting down all USB controllers.

 2284 18:08:31.299349  

 2285 18:08:31.299433  Removing current net device

 2286 18:08:31.299514  

 2287 18:08:31.302234  Finalizing coreboot

 2288 18:08:31.302304  

 2289 18:08:31.309110  Exiting depthcharge with code 4 at timestamp: 37389967

 2290 18:08:31.309218  

 2291 18:08:31.309305  

 2292 18:08:31.309397  Starting kernel ...

 2293 18:08:31.309483  

 2294 18:08:31.309565  

 2295 18:08:31.310320  end: 2.2.4 bootloader-commands (duration 00:00:29) [common]
 2296 18:08:31.310446  start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
 2297 18:08:31.310542  Setting prompt string to ['Linux version [0-9]']
 2298 18:08:31.310639  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2299 18:08:31.310731  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2301 18:12:42.311421  end: 2.2.5 auto-login-action (duration 00:04:11) [common]
 2303 18:12:42.312403  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
 2305 18:12:42.313196  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2308 18:12:42.314536  end: 2 depthcharge-action (duration 00:05:00) [common]
 2310 18:12:42.315659  Cleaning after the job
 2311 18:12:42.316119  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/ramdisk
 2312 18:12:42.322289  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/kernel
 2313 18:12:42.331515  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14808677/tftp-deploy-g6ci4d03/modules
 2314 18:12:42.332546  start: 4.1 power-off (timeout 00:00:30) [common]
 2315 18:12:42.332673  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-3', '--port=1', '--command=off']
 2316 18:12:44.408902  >> Command sent successfully.
 2317 18:12:44.415712  Returned 0 in 2 seconds
 2318 18:12:44.415871  end: 4.1 power-off (duration 00:00:02) [common]
 2320 18:12:44.416099  start: 4.2 read-feedback (timeout 00:04:58) [common]
 2321 18:12:44.416275  Listened to connection for namespace 'common' for up to 1s
 2323 18:12:44.416681  Listened to connection for namespace 'common' for up to 1s
 2324 18:12:45.417580  Finalising connection for namespace 'common'
 2325 18:12:45.418294  Disconnecting from shell: Finalise
 2326 18:12:45.418829  
 2327 18:12:45.519889  end: 4.2 read-feedback (duration 00:00:01) [common]
 2328 18:12:45.520543  Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14808677
 2329 18:12:45.541003  Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14808677
 2330 18:12:45.541133  JobError: Your job cannot terminate cleanly.