Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 02:52:39.025051 lava-dispatcher, installed at version: 2022.04
2 02:52:39.025227 start: 0 validate
3 02:52:39.025359 Start time: 2022-06-28 02:52:39.025351+00:00 (UTC)
4 02:52:39.025491 Using caching service: 'http://localhost/cache/?uri=%s'
5 02:52:39.025618 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220624.0%2Fx86%2Frootfs.cpio.gz exists
6 02:52:39.321031 Using caching service: 'http://localhost/cache/?uri=%s'
7 02:52:39.321794 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.249-cip76%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 02:52:39.615073 Using caching service: 'http://localhost/cache/?uri=%s'
9 02:52:39.615267 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.249-cip76%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 02:52:39.907011 validate duration: 0.88
12 02:52:39.907292 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 02:52:39.907401 start: 1.1 download-retry (timeout 00:10:00) [common]
14 02:52:39.907498 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 02:52:39.907596 Not decompressing ramdisk as can be used compressed.
16 02:52:39.907677 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220624.0/x86/rootfs.cpio.gz
17 02:52:39.907744 saving as /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/ramdisk/rootfs.cpio.gz
18 02:52:39.907804 total size: 8415744 (8MB)
19 02:52:39.908940 progress 0% (0MB)
20 02:52:39.911057 progress 5% (0MB)
21 02:52:39.913182 progress 10% (0MB)
22 02:52:39.915365 progress 15% (1MB)
23 02:52:39.917433 progress 20% (1MB)
24 02:52:39.919542 progress 25% (2MB)
25 02:52:39.921610 progress 30% (2MB)
26 02:52:39.923566 progress 35% (2MB)
27 02:52:39.925618 progress 40% (3MB)
28 02:52:39.927738 progress 45% (3MB)
29 02:52:39.929779 progress 50% (4MB)
30 02:52:39.931859 progress 55% (4MB)
31 02:52:39.933928 progress 60% (4MB)
32 02:52:39.935849 progress 65% (5MB)
33 02:52:39.937875 progress 70% (5MB)
34 02:52:39.939944 progress 75% (6MB)
35 02:52:39.941969 progress 80% (6MB)
36 02:52:39.944043 progress 85% (6MB)
37 02:52:39.946075 progress 90% (7MB)
38 02:52:39.948068 progress 95% (7MB)
39 02:52:39.950178 progress 100% (8MB)
40 02:52:39.950445 8MB downloaded in 0.04s (188.24MB/s)
41 02:52:39.950596 end: 1.1.1 http-download (duration 00:00:00) [common]
43 02:52:39.950843 end: 1.1 download-retry (duration 00:00:00) [common]
44 02:52:39.950980 start: 1.2 download-retry (timeout 00:10:00) [common]
45 02:52:39.951069 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 02:52:39.951169 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.249-cip76/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 02:52:39.951238 saving as /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/kernel/bzImage
48 02:52:39.951299 total size: 8953856 (8MB)
49 02:52:39.951360 No compression specified
50 02:52:41.951908 progress 0% (0MB)
51 02:52:41.954202 progress 5% (0MB)
52 02:52:41.956539 progress 10% (0MB)
53 02:52:41.958567 progress 15% (1MB)
54 02:52:41.960839 progress 20% (1MB)
55 02:52:41.963115 progress 25% (2MB)
56 02:52:41.965231 progress 30% (2MB)
57 02:52:41.967499 progress 35% (3MB)
58 02:52:41.969706 progress 40% (3MB)
59 02:52:41.971790 progress 45% (3MB)
60 02:52:41.973947 progress 50% (4MB)
61 02:52:41.976156 progress 55% (4MB)
62 02:52:41.978145 progress 60% (5MB)
63 02:52:41.980335 progress 65% (5MB)
64 02:52:41.982460 progress 70% (6MB)
65 02:52:41.984485 progress 75% (6MB)
66 02:52:41.986619 progress 80% (6MB)
67 02:52:41.988778 progress 85% (7MB)
68 02:52:41.990759 progress 90% (7MB)
69 02:52:41.992920 progress 95% (8MB)
70 02:52:41.995150 progress 100% (8MB)
71 02:52:41.995330 8MB downloaded in 2.04s (4.18MB/s)
72 02:52:41.995477 end: 1.2.1 http-download (duration 00:00:02) [common]
74 02:52:41.995708 end: 1.2 download-retry (duration 00:00:02) [common]
75 02:52:41.995793 start: 1.3 download-retry (timeout 00:09:58) [common]
76 02:52:41.995878 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 02:52:41.995980 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.249-cip76/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 02:52:41.996045 saving as /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/modules/modules.tar
79 02:52:41.996105 total size: 64932 (0MB)
80 02:52:41.996165 Using unxz to decompress xz
81 02:52:41.999651 progress 50% (0MB)
82 02:52:42.000010 progress 100% (0MB)
83 02:52:42.004264 0MB downloaded in 0.01s (7.60MB/s)
84 02:52:42.004477 end: 1.3.1 http-download (duration 00:00:00) [common]
86 02:52:42.004726 end: 1.3 download-retry (duration 00:00:00) [common]
87 02:52:42.004820 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 02:52:42.004915 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 02:52:42.005041 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 02:52:42.005156 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 02:52:42.005316 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin
92 02:52:42.005422 makedir: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin
93 02:52:42.005505 makedir: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/tests
94 02:52:42.005587 makedir: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/results
95 02:52:42.005689 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-add-keys
96 02:52:42.005816 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-add-sources
97 02:52:42.005931 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-background-process-start
98 02:52:42.006040 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-background-process-stop
99 02:52:42.006147 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-common-functions
100 02:52:42.006254 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-echo-ipv4
101 02:52:42.006362 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-install-packages
102 02:52:42.006470 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-installed-packages
103 02:52:42.006575 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-os-build
104 02:52:42.006681 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-probe-channel
105 02:52:42.006789 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-probe-ip
106 02:52:42.006903 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-target-ip
107 02:52:42.007075 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-target-mac
108 02:52:42.007186 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-target-storage
109 02:52:42.007297 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-case
110 02:52:42.007403 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-event
111 02:52:42.007510 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-feedback
112 02:52:42.007616 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-raise
113 02:52:42.007726 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-reference
114 02:52:42.007831 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-runner
115 02:52:42.007936 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-set
116 02:52:42.008042 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-test-shell
117 02:52:42.008149 Updating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-install-packages (oe)
118 02:52:42.008260 Updating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/bin/lava-installed-packages (oe)
119 02:52:42.008357 Creating /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/environment
120 02:52:42.008487 LAVA metadata
121 02:52:42.008570 - LAVA_JOB_ID=6693637
122 02:52:42.008633 - LAVA_DISPATCHER_IP=192.168.201.1
123 02:52:42.008733 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 02:52:42.008798 skipped lava-vland-overlay
125 02:52:42.008874 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 02:52:42.008960 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 02:52:42.009037 skipped lava-multinode-overlay
128 02:52:42.009124 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 02:52:42.009206 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 02:52:42.009281 Loading test definitions
131 02:52:42.009376 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 02:52:42.009454 Using /lava-6693637 at stage 0
133 02:52:42.009755 uuid=6693637_1.4.2.3.1 testdef=None
134 02:52:42.009844 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 02:52:42.009932 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 02:52:42.010410 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 02:52:42.010640 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 02:52:42.011341 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 02:52:42.011579 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 02:52:42.012114 runner path: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/0/tests/0_dmesg test_uuid 6693637_1.4.2.3.1
143 02:52:42.012261 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 02:52:42.012521 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 02:52:42.012594 Using /lava-6693637 at stage 1
147 02:52:42.012829 uuid=6693637_1.4.2.3.5 testdef=None
148 02:52:42.012918 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 02:52:42.013004 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 02:52:42.013516 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 02:52:42.013737 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 02:52:42.014298 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 02:52:42.014529 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 02:52:42.015106 runner path: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/1/tests/1_bootrr test_uuid 6693637_1.4.2.3.5
157 02:52:42.015245 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 02:52:42.015450 Creating lava-test-runner.conf files
160 02:52:42.015514 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/0 for stage 0
161 02:52:42.015593 - 0_dmesg
162 02:52:42.015668 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6693637/lava-overlay-fud7dbin/lava-6693637/1 for stage 1
163 02:52:42.015749 - 1_bootrr
164 02:52:42.015837 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 02:52:42.015925 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 02:52:42.021994 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 02:52:42.022100 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 02:52:42.022202 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 02:52:42.022292 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 02:52:42.022377 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 02:52:42.207879 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 02:52:42.208201 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 02:52:42.208316 extracting modules file /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6693637/extract-overlay-ramdisk-dtiei6zd/ramdisk
174 02:52:42.212506 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 02:52:42.212618 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 02:52:42.212705 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6693637/compress-overlay-bn4xa2q_/overlay-1.4.2.4.tar.gz to ramdisk
177 02:52:42.212779 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6693637/compress-overlay-bn4xa2q_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6693637/extract-overlay-ramdisk-dtiei6zd/ramdisk
178 02:52:42.216627 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 02:52:42.216737 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 02:52:42.216831 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 02:52:42.216925 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 02:52:42.217007 Building ramdisk /var/lib/lava/dispatcher/tmp/6693637/extract-overlay-ramdisk-dtiei6zd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6693637/extract-overlay-ramdisk-dtiei6zd/ramdisk
183 02:52:42.281909 >> 48236 blocks
184 02:52:43.063052 rename /var/lib/lava/dispatcher/tmp/6693637/extract-overlay-ramdisk-dtiei6zd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
185 02:52:43.063453 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 02:52:43.063578 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 02:52:43.063680 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 02:52:43.063777 No mkimage arch provided, not using FIT.
189 02:52:43.063868 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 02:52:43.063952 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 02:52:43.064051 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 02:52:43.064148 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 02:52:43.064227 No LXC device requested
194 02:52:43.064352 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 02:52:43.064458 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 02:52:43.064556 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 02:52:43.064628 Checking files for TFTP limit of 4294967296 bytes.
198 02:52:43.065164 end: 1 tftp-deploy (duration 00:00:03) [common]
199 02:52:43.065291 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 02:52:43.065417 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 02:52:43.065603 substitutions:
202 02:52:43.065672 - {DTB}: None
203 02:52:43.065740 - {INITRD}: 6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
204 02:52:43.065849 - {KERNEL}: 6693637/tftp-deploy-gmtewm03/kernel/bzImage
205 02:52:43.065933 - {LAVA_MAC}: None
206 02:52:43.065992 - {PRESEED_CONFIG}: None
207 02:52:43.066072 - {PRESEED_LOCAL}: None
208 02:52:43.066146 - {RAMDISK}: 6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
209 02:52:43.066218 - {ROOT_PART}: None
210 02:52:43.066297 - {ROOT}: None
211 02:52:43.066354 - {SERVER_IP}: 192.168.201.1
212 02:52:43.066411 - {TEE}: None
213 02:52:43.066491 Parsed boot commands:
214 02:52:43.066548 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 02:52:43.066725 Parsed boot commands: tftpboot 192.168.201.1 6693637/tftp-deploy-gmtewm03/kernel/bzImage 6693637/tftp-deploy-gmtewm03/kernel/cmdline 6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
216 02:52:43.066821 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 02:52:43.066923 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 02:52:43.067028 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 02:52:43.067174 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 02:52:43.067259 Not connected, no need to disconnect.
221 02:52:43.067335 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 02:52:43.067420 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 02:52:43.067490 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 02:52:43.070443 Setting prompt string to ['lava-test: # ']
225 02:52:43.070778 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 02:52:43.070905 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 02:52:43.071021 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 02:52:43.071143 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 02:52:43.071332 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 02:52:43.091783 >> Command sent successfully.
231 02:52:43.093794 Returned 0 in 0 seconds
232 02:52:43.194473 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 02:52:43.195076 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 02:52:43.195178 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 02:52:43.195264 Setting prompt string to 'Starting depthcharge on Helios...'
237 02:52:43.195332 Changing prompt to 'Starting depthcharge on Helios...'
238 02:52:43.195397 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 02:52:43.195656 [Enter `^Ec?' for help]
240 02:52:49.940319
241 02:52:49.940527
242 02:52:49.949664 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 02:52:49.952938 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 02:52:49.959664 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 02:52:49.963064 CPU: AES supported, TXT NOT supported, VT supported
246 02:52:49.969627 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 02:52:49.976164 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 02:52:49.979205 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 02:52:49.982836 VBOOT: Loading verstage.
250 02:52:49.989500 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 02:52:49.992602 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 02:52:49.999131 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 02:52:49.999252 CBFS @ c08000 size 3f8000
254 02:52:50.006032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 02:52:50.009180 CBFS: Locating 'fallback/verstage'
256 02:52:50.015404 CBFS: Found @ offset 10fb80 size 1072c
257 02:52:50.015525
258 02:52:50.015627
259 02:52:50.025603 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 02:52:50.041050 Probing TPM: . done!
261 02:52:50.044510 TPM ready after 0 ms
262 02:52:50.047822 Connected to device vid:did:rid of 1ae0:0028:00
263 02:52:50.058084 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 02:52:50.061333 Initialized TPM device CR50 revision 0
265 02:52:50.105939 tlcl_send_startup: Startup return code is 0
266 02:52:50.106120 TPM: setup succeeded
267 02:52:50.118726 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 02:52:50.122237 Chrome EC: UHEPI supported
269 02:52:50.125805 Phase 1
270 02:52:50.128784 FMAP: area GBB found @ c05000 (12288 bytes)
271 02:52:50.135512 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 02:52:50.138711 Phase 2
273 02:52:50.138823 Phase 3
274 02:52:50.142012 FMAP: area GBB found @ c05000 (12288 bytes)
275 02:52:50.148411 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 02:52:50.155294 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 02:52:50.158666 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 02:52:50.165071 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 02:52:50.181095 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 02:52:50.184326 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 02:52:50.191053 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 02:52:50.195291 Phase 4
283 02:52:50.198475 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 02:52:50.205287 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 02:52:50.384899 VB2:vb2_rsa_verify_digest() Digest check failed!
286 02:52:50.391404 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 02:52:50.391500 Saving nvdata
288 02:52:50.394511 Reboot requested (10020007)
289 02:52:50.397713 board_reset() called!
290 02:52:50.397792 full_reset() called!
291 02:52:54.907010
292 02:52:54.907312
293 02:52:54.916723 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 02:52:54.919967 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 02:52:54.926771 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 02:52:54.930087 CPU: AES supported, TXT NOT supported, VT supported
297 02:52:54.936722 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 02:52:54.939755 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 02:52:54.946349 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 02:52:54.949735 VBOOT: Loading verstage.
301 02:52:54.953248 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 02:52:54.959483 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 02:52:54.966104 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 02:52:54.966333 CBFS @ c08000 size 3f8000
305 02:52:54.972597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 02:52:54.976077 CBFS: Locating 'fallback/verstage'
307 02:52:54.979179 CBFS: Found @ offset 10fb80 size 1072c
308 02:52:54.983711
309 02:52:54.983944
310 02:52:54.993666 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 02:52:55.008179 Probing TPM: . done!
312 02:52:55.011315 TPM ready after 0 ms
313 02:52:55.014707 Connected to device vid:did:rid of 1ae0:0028:00
314 02:52:55.024845 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 02:52:55.028375 Initialized TPM device CR50 revision 0
316 02:52:55.072537 tlcl_send_startup: Startup return code is 0
317 02:52:55.073024 TPM: setup succeeded
318 02:52:55.084855 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 02:52:55.088580 Chrome EC: UHEPI supported
320 02:52:55.091718 Phase 1
321 02:52:55.094959 FMAP: area GBB found @ c05000 (12288 bytes)
322 02:52:55.101548 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 02:52:55.108348 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 02:52:55.111467 Recovery requested (1009000e)
325 02:52:55.117653 Saving nvdata
326 02:52:55.123436 tlcl_extend: response is 0
327 02:52:55.132189 tlcl_extend: response is 0
328 02:52:55.139108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 02:52:55.142388 CBFS @ c08000 size 3f8000
330 02:52:55.148927 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 02:52:55.152303 CBFS: Locating 'fallback/romstage'
332 02:52:55.155470 CBFS: Found @ offset 80 size 145fc
333 02:52:55.158676 Accumulated console time in verstage 98 ms
334 02:52:55.159023
335 02:52:55.159281
336 02:52:55.172098 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 02:52:55.178564 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 02:52:55.182163 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 02:52:55.185244 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 02:52:55.191846 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 02:52:55.194992 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 02:52:55.198398 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 02:52:55.201748 TCO_STS: 0000 0000
344 02:52:55.205018 GEN_PMCON: e0015238 00000200
345 02:52:55.208218 GBLRST_CAUSE: 00000000 00000000
346 02:52:55.208451 prev_sleep_state 5
347 02:52:55.212114 Boot Count incremented to 24005
348 02:52:55.218441 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 02:52:55.221706 CBFS @ c08000 size 3f8000
350 02:52:55.228547 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 02:52:55.228685 CBFS: Locating 'fspm.bin'
352 02:52:55.234913 CBFS: Found @ offset 5ffc0 size 71000
353 02:52:55.238154 Chrome EC: UHEPI supported
354 02:52:55.244893 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 02:52:55.248416 Probing TPM: done!
356 02:52:55.255062 Connected to device vid:did:rid of 1ae0:0028:00
357 02:52:55.265112 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 02:52:55.271861 Initialized TPM device CR50 revision 0
359 02:52:55.281083 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 02:52:55.287816 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 02:52:55.291087 MRC cache found, size 1948
362 02:52:55.294475 bootmode is set to: 2
363 02:52:55.297641 PRMRR disabled by config.
364 02:52:55.301025 SPD INDEX = 1
365 02:52:55.304396 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 02:52:55.307708 CBFS @ c08000 size 3f8000
367 02:52:55.314224 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 02:52:55.314311 CBFS: Locating 'spd.bin'
369 02:52:55.317465 CBFS: Found @ offset 5fb80 size 400
370 02:52:55.320910 SPD: module type is LPDDR3
371 02:52:55.323983 SPD: module part is
372 02:52:55.330597 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 02:52:55.334037 SPD: device width 4 bits, bus width 8 bits
374 02:52:55.337055 SPD: module size is 4096 MB (per channel)
375 02:52:55.340787 memory slot: 0 configuration done.
376 02:52:55.343958 memory slot: 2 configuration done.
377 02:52:55.395188 CBMEM:
378 02:52:55.398539 IMD: root @ 99fff000 254 entries.
379 02:52:55.401988 IMD: root @ 99ffec00 62 entries.
380 02:52:55.405141 External stage cache:
381 02:52:55.408384 IMD: root @ 9abff000 254 entries.
382 02:52:55.411927 IMD: root @ 9abfec00 62 entries.
383 02:52:55.418354 Chrome EC: clear events_b mask to 0x0000000020004000
384 02:52:55.432246 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 02:52:55.447519 tlcl_write: response is 0
386 02:52:55.456716 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 02:52:55.463215 MRC: TPM MRC hash updated successfully.
388 02:52:55.463304 2 DIMMs found
389 02:52:55.466803 SMM Memory Map
390 02:52:55.470153 SMRAM : 0x9a000000 0x1000000
391 02:52:55.473526 Subregion 0: 0x9a000000 0xa00000
392 02:52:55.476563 Subregion 1: 0x9aa00000 0x200000
393 02:52:55.480012 Subregion 2: 0x9ac00000 0x400000
394 02:52:55.483383 top_of_ram = 0x9a000000
395 02:52:55.486705 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 02:52:55.493192 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 02:52:55.496242 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 02:52:55.503078 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 02:52:55.506168 CBFS @ c08000 size 3f8000
400 02:52:55.509476 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 02:52:55.512822 CBFS: Locating 'fallback/postcar'
402 02:52:55.519515 CBFS: Found @ offset 107000 size 4b44
403 02:52:55.525696 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 02:52:55.536137 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 02:52:55.539139 Processing 180 relocs. Offset value of 0x97c0c000
406 02:52:55.547806 Accumulated console time in romstage 286 ms
407 02:52:55.547894
408 02:52:55.547981
409 02:52:55.558134 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 02:52:55.564449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 02:52:55.567624 CBFS @ c08000 size 3f8000
412 02:52:55.574069 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 02:52:55.577318 CBFS: Locating 'fallback/ramstage'
414 02:52:55.580783 CBFS: Found @ offset 43380 size 1b9e8
415 02:52:55.587014 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 02:52:55.619598 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 02:52:55.626237 Processing 3976 relocs. Offset value of 0x98db0000
418 02:52:55.629357 Accumulated console time in postcar 52 ms
419 02:52:55.629669
420 02:52:55.629871
421 02:52:55.639307 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 02:52:55.645737 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 02:52:55.649254 WARNING: RO_VPD is uninitialized or empty.
424 02:52:55.652448 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 02:52:55.658822 WARNING: RW_VPD is uninitialized or empty.
426 02:52:55.659095 Normal boot.
427 02:52:55.665439 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 02:52:55.668730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 02:52:55.671954 CBFS @ c08000 size 3f8000
430 02:52:55.678637 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 02:52:55.681927 CBFS: Locating 'cpu_microcode_blob.bin'
432 02:52:55.685034 CBFS: Found @ offset 14700 size 2ec00
433 02:52:55.688606 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 02:52:55.691866 Skip microcode update
435 02:52:55.698241 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 02:52:55.698510 CBFS @ c08000 size 3f8000
437 02:52:55.704978 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 02:52:55.708319 CBFS: Locating 'fsps.bin'
439 02:52:55.711606 CBFS: Found @ offset d1fc0 size 35000
440 02:52:55.737638 Detected 4 core, 8 thread CPU.
441 02:52:55.741150 Setting up SMI for CPU
442 02:52:55.744685 IED base = 0x9ac00000
443 02:52:55.745263 IED size = 0x00400000
444 02:52:55.747652 Will perform SMM setup.
445 02:52:55.754463 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 02:52:55.760944 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 02:52:55.764075 Processing 16 relocs. Offset value of 0x00030000
448 02:52:55.767611 Attempting to start 7 APs
449 02:52:55.771242 Waiting for 10ms after sending INIT.
450 02:52:55.787331 Waiting for 1st SIPI to complete...done.
451 02:52:55.787648 AP: slot 2 apic_id 1.
452 02:52:55.793989 Waiting for 2nd SIPI to complete...done.
453 02:52:55.794319 AP: slot 3 apic_id 3.
454 02:52:55.797013 AP: slot 1 apic_id 2.
455 02:52:55.800773 AP: slot 5 apic_id 7.
456 02:52:55.801137 AP: slot 4 apic_id 6.
457 02:52:55.803683 AP: slot 7 apic_id 5.
458 02:52:55.806931 AP: slot 6 apic_id 4.
459 02:52:55.813354 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 02:52:55.820072 Processing 13 relocs. Offset value of 0x00038000
461 02:52:55.826553 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 02:52:55.830015 Installing SMM handler to 0x9a000000
463 02:52:55.836468 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 02:52:55.843236 Processing 658 relocs. Offset value of 0x9a010000
465 02:52:55.849930 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 02:52:55.856516 Processing 13 relocs. Offset value of 0x9a008000
467 02:52:55.859825 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 02:52:55.866139 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 02:52:55.872763 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 02:52:55.879487 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 02:52:55.882773 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 02:52:55.889390 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 02:52:55.895811 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 02:52:55.902468 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 02:52:55.905827 Clearing SMI status registers
476 02:52:55.906140 SMI_STS: PM1
477 02:52:55.909188 PM1_STS: PWRBTN
478 02:52:55.909526 TCO_STS: SECOND_TO
479 02:52:55.912575 New SMBASE 0x9a000000
480 02:52:55.915651 In relocation handler: CPU 0
481 02:52:55.918814 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 02:52:55.925595 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 02:52:55.925923 Relocation complete.
484 02:52:55.928603 New SMBASE 0x99fff800
485 02:52:55.931785 In relocation handler: CPU 2
486 02:52:55.935140 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 02:52:55.941993 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 02:52:55.942228 Relocation complete.
489 02:52:55.945097 New SMBASE 0x99ffe800
490 02:52:55.948476 In relocation handler: CPU 6
491 02:52:55.951557 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
492 02:52:55.957959 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 02:52:55.958192 Relocation complete.
494 02:52:55.961415 New SMBASE 0x99ffe400
495 02:52:55.964841 In relocation handler: CPU 7
496 02:52:55.968060 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
497 02:52:55.974735 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 02:52:55.974943 Relocation complete.
499 02:52:55.978088 New SMBASE 0x99ffec00
500 02:52:55.981321 In relocation handler: CPU 5
501 02:52:55.984489 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
502 02:52:55.991042 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 02:52:55.991163 Relocation complete.
504 02:52:55.994391 New SMBASE 0x99fff000
505 02:52:55.997688 In relocation handler: CPU 4
506 02:52:56.001284 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
507 02:52:56.007817 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 02:52:56.007938 Relocation complete.
509 02:52:56.011056 New SMBASE 0x99fffc00
510 02:52:56.014308 In relocation handler: CPU 1
511 02:52:56.017439 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
512 02:52:56.024117 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 02:52:56.024214 Relocation complete.
514 02:52:56.027518 New SMBASE 0x99fff400
515 02:52:56.030709 In relocation handler: CPU 3
516 02:52:56.033870 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 02:52:56.040527 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 02:52:56.040619 Relocation complete.
519 02:52:56.043756 Initializing CPU #0
520 02:52:56.047133 CPU: vendor Intel device 806ec
521 02:52:56.050280 CPU: family 06, model 8e, stepping 0c
522 02:52:56.053488 Clearing out pending MCEs
523 02:52:56.057002 Setting up local APIC...
524 02:52:56.057154 apic_id: 0x00 done.
525 02:52:56.060191 Turbo is available but hidden
526 02:52:56.063391 Turbo is available and visible
527 02:52:56.066930 VMX status: enabled
528 02:52:56.070054 IA32_FEATURE_CONTROL status: locked
529 02:52:56.070140 Skip microcode update
530 02:52:56.073405 CPU #0 initialized
531 02:52:56.076923 Initializing CPU #2
532 02:52:56.077014 Initializing CPU #5
533 02:52:56.080095 Initializing CPU #4
534 02:52:56.083347 CPU: vendor Intel device 806ec
535 02:52:56.086650 CPU: family 06, model 8e, stepping 0c
536 02:52:56.090035 CPU: vendor Intel device 806ec
537 02:52:56.093245 CPU: family 06, model 8e, stepping 0c
538 02:52:56.096933 Clearing out pending MCEs
539 02:52:56.100094 Clearing out pending MCEs
540 02:52:56.100186 Setting up local APIC...
541 02:52:56.103267 Initializing CPU #3
542 02:52:56.106702 Initializing CPU #1
543 02:52:56.109834 CPU: vendor Intel device 806ec
544 02:52:56.113044 CPU: family 06, model 8e, stepping 0c
545 02:52:56.116805 CPU: vendor Intel device 806ec
546 02:52:56.119914 CPU: family 06, model 8e, stepping 0c
547 02:52:56.122961 Clearing out pending MCEs
548 02:52:56.123046 Clearing out pending MCEs
549 02:52:56.126581 Setting up local APIC...
550 02:52:56.129593 CPU: vendor Intel device 806ec
551 02:52:56.133096 CPU: family 06, model 8e, stepping 0c
552 02:52:56.136389 Clearing out pending MCEs
553 02:52:56.139933 apic_id: 0x03 done.
554 02:52:56.143196 Setting up local APIC...
555 02:52:56.143642 Setting up local APIC...
556 02:52:56.146350 Initializing CPU #6
557 02:52:56.149845 Initializing CPU #7
558 02:52:56.153058 CPU: vendor Intel device 806ec
559 02:52:56.156201 CPU: family 06, model 8e, stepping 0c
560 02:52:56.159583 CPU: vendor Intel device 806ec
561 02:52:56.162734 CPU: family 06, model 8e, stepping 0c
562 02:52:56.166122 Clearing out pending MCEs
563 02:52:56.166362 Clearing out pending MCEs
564 02:52:56.169172 Setting up local APIC...
565 02:52:56.172546 VMX status: enabled
566 02:52:56.172696 apic_id: 0x02 done.
567 02:52:56.175870 IA32_FEATURE_CONTROL status: locked
568 02:52:56.179153 VMX status: enabled
569 02:52:56.182834 Skip microcode update
570 02:52:56.185954 IA32_FEATURE_CONTROL status: locked
571 02:52:56.186423 CPU #3 initialized
572 02:52:56.189531 Skip microcode update
573 02:52:56.192576 apic_id: 0x04 done.
574 02:52:56.195743 Setting up local APIC...
575 02:52:56.196145 apic_id: 0x07 done.
576 02:52:56.199173 apic_id: 0x06 done.
577 02:52:56.199503 VMX status: enabled
578 02:52:56.202597 VMX status: enabled
579 02:52:56.205710 IA32_FEATURE_CONTROL status: locked
580 02:52:56.208949 IA32_FEATURE_CONTROL status: locked
581 02:52:56.212217 Skip microcode update
582 02:52:56.215719 Skip microcode update
583 02:52:56.216137 CPU #5 initialized
584 02:52:56.219007 CPU #4 initialized
585 02:52:56.219515 VMX status: enabled
586 02:52:56.222367 apic_id: 0x05 done.
587 02:52:56.225780 IA32_FEATURE_CONTROL status: locked
588 02:52:56.228833 VMX status: enabled
589 02:52:56.229171 Skip microcode update
590 02:52:56.235603 IA32_FEATURE_CONTROL status: locked
591 02:52:56.235960 CPU #6 initialized
592 02:52:56.238945 Skip microcode update
593 02:52:56.242348 Setting up local APIC...
594 02:52:56.242710 CPU #1 initialized
595 02:52:56.245400 CPU #7 initialized
596 02:52:56.245736 apic_id: 0x01 done.
597 02:52:56.248648 VMX status: enabled
598 02:52:56.252147 IA32_FEATURE_CONTROL status: locked
599 02:52:56.255370 Skip microcode update
600 02:52:56.255620 CPU #2 initialized
601 02:52:56.261790 bsp_do_flight_plan done after 466 msecs.
602 02:52:56.265260 CPU: frequency set to 4200 MHz
603 02:52:56.265428 Enabling SMIs.
604 02:52:56.268119 Locking SMM.
605 02:52:56.281873 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 02:52:56.284943 CBFS @ c08000 size 3f8000
607 02:52:56.291612 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 02:52:56.291781 CBFS: Locating 'vbt.bin'
609 02:52:56.295043 CBFS: Found @ offset 5f5c0 size 499
610 02:52:56.302015 Found a VBT of 4608 bytes after decompression
611 02:52:56.484708 Display FSP Version Info HOB
612 02:52:56.487787 Reference Code - CPU = 9.0.1e.30
613 02:52:56.491084 uCode Version = 0.0.0.ca
614 02:52:56.494380 TXT ACM version = ff.ff.ff.ffff
615 02:52:56.497407 Display FSP Version Info HOB
616 02:52:56.500608 Reference Code - ME = 9.0.1e.30
617 02:52:56.504163 MEBx version = 0.0.0.0
618 02:52:56.507061 ME Firmware Version = Consumer SKU
619 02:52:56.510735 Display FSP Version Info HOB
620 02:52:56.513840 Reference Code - CML PCH = 9.0.1e.30
621 02:52:56.516987 PCH-CRID Status = Disabled
622 02:52:56.520510 PCH-CRID Original Value = ff.ff.ff.ffff
623 02:52:56.523742 PCH-CRID New Value = ff.ff.ff.ffff
624 02:52:56.526891 OPROM - RST - RAID = ff.ff.ff.ffff
625 02:52:56.530091 ChipsetInit Base Version = ff.ff.ff.ffff
626 02:52:56.536983 ChipsetInit Oem Version = ff.ff.ff.ffff
627 02:52:56.537319 Display FSP Version Info HOB
628 02:52:56.543333 Reference Code - SA - System Agent = 9.0.1e.30
629 02:52:56.546536 Reference Code - MRC = 0.7.1.6c
630 02:52:56.549762 SA - PCIe Version = 9.0.1e.30
631 02:52:56.553269 SA-CRID Status = Disabled
632 02:52:56.556361 SA-CRID Original Value = 0.0.0.c
633 02:52:56.556671 SA-CRID New Value = 0.0.0.c
634 02:52:56.559635 OPROM - VBIOS = ff.ff.ff.ffff
635 02:52:56.563357 RTC Init
636 02:52:56.566521 Set power on after power failure.
637 02:52:56.566841 Disabling Deep S3
638 02:52:56.569878 Disabling Deep S3
639 02:52:56.573186 Disabling Deep S4
640 02:52:56.573502 Disabling Deep S4
641 02:52:56.576344 Disabling Deep S5
642 02:52:56.576659 Disabling Deep S5
643 02:52:56.582922 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
644 02:52:56.586240 Enumerating buses...
645 02:52:56.589529 Show all devs... Before device enumeration.
646 02:52:56.592833 Root Device: enabled 1
647 02:52:56.596346 CPU_CLUSTER: 0: enabled 1
648 02:52:56.596660 DOMAIN: 0000: enabled 1
649 02:52:56.599442 APIC: 00: enabled 1
650 02:52:56.602676 PCI: 00:00.0: enabled 1
651 02:52:56.603021 PCI: 00:02.0: enabled 1
652 02:52:56.605763 PCI: 00:04.0: enabled 0
653 02:52:56.609020 PCI: 00:05.0: enabled 0
654 02:52:56.612462 PCI: 00:12.0: enabled 1
655 02:52:56.612800 PCI: 00:12.5: enabled 0
656 02:52:56.615914 PCI: 00:12.6: enabled 0
657 02:52:56.619118 PCI: 00:14.0: enabled 1
658 02:52:56.622351 PCI: 00:14.1: enabled 0
659 02:52:56.622665 PCI: 00:14.3: enabled 1
660 02:52:56.625496 PCI: 00:14.5: enabled 0
661 02:52:56.628921 PCI: 00:15.0: enabled 1
662 02:52:56.631981 PCI: 00:15.1: enabled 1
663 02:52:56.632324 PCI: 00:15.2: enabled 0
664 02:52:56.635203 PCI: 00:15.3: enabled 0
665 02:52:56.638729 PCI: 00:16.0: enabled 1
666 02:52:56.641904 PCI: 00:16.1: enabled 0
667 02:52:56.642094 PCI: 00:16.2: enabled 0
668 02:52:56.645106 PCI: 00:16.3: enabled 0
669 02:52:56.648342 PCI: 00:16.4: enabled 0
670 02:52:56.651812 PCI: 00:16.5: enabled 0
671 02:52:56.652003 PCI: 00:17.0: enabled 1
672 02:52:56.655245 PCI: 00:19.0: enabled 1
673 02:52:56.658279 PCI: 00:19.1: enabled 0
674 02:52:56.661614 PCI: 00:19.2: enabled 0
675 02:52:56.661804 PCI: 00:1a.0: enabled 0
676 02:52:56.664913 PCI: 00:1c.0: enabled 0
677 02:52:56.668292 PCI: 00:1c.1: enabled 0
678 02:52:56.671506 PCI: 00:1c.2: enabled 0
679 02:52:56.671698 PCI: 00:1c.3: enabled 0
680 02:52:56.674798 PCI: 00:1c.4: enabled 0
681 02:52:56.677980 PCI: 00:1c.5: enabled 0
682 02:52:56.678169 PCI: 00:1c.6: enabled 0
683 02:52:56.681380 PCI: 00:1c.7: enabled 0
684 02:52:56.684355 PCI: 00:1d.0: enabled 1
685 02:52:56.687776 PCI: 00:1d.1: enabled 0
686 02:52:56.687976 PCI: 00:1d.2: enabled 0
687 02:52:56.691144 PCI: 00:1d.3: enabled 0
688 02:52:56.694504 PCI: 00:1d.4: enabled 0
689 02:52:56.697486 PCI: 00:1d.5: enabled 1
690 02:52:56.697663 PCI: 00:1e.0: enabled 1
691 02:52:56.700627 PCI: 00:1e.1: enabled 0
692 02:52:56.703920 PCI: 00:1e.2: enabled 1
693 02:52:56.707130 PCI: 00:1e.3: enabled 1
694 02:52:56.707356 PCI: 00:1f.0: enabled 1
695 02:52:56.710466 PCI: 00:1f.1: enabled 1
696 02:52:56.714052 PCI: 00:1f.2: enabled 1
697 02:52:56.717136 PCI: 00:1f.3: enabled 1
698 02:52:56.717318 PCI: 00:1f.4: enabled 1
699 02:52:56.720346 PCI: 00:1f.5: enabled 1
700 02:52:56.723723 PCI: 00:1f.6: enabled 0
701 02:52:56.726939 USB0 port 0: enabled 1
702 02:52:56.727138 I2C: 00:15: enabled 1
703 02:52:56.730147 I2C: 00:5d: enabled 1
704 02:52:56.733239 GENERIC: 0.0: enabled 1
705 02:52:56.733429 I2C: 00:1a: enabled 1
706 02:52:56.736504 I2C: 00:38: enabled 1
707 02:52:56.739910 I2C: 00:39: enabled 1
708 02:52:56.743088 I2C: 00:3a: enabled 1
709 02:52:56.743278 I2C: 00:3b: enabled 1
710 02:52:56.746260 PCI: 00:00.0: enabled 1
711 02:52:56.749556 SPI: 00: enabled 1
712 02:52:56.749747 SPI: 01: enabled 1
713 02:52:56.752877 PNP: 0c09.0: enabled 1
714 02:52:56.756293 USB2 port 0: enabled 1
715 02:52:56.756515 USB2 port 1: enabled 1
716 02:52:56.759174 USB2 port 2: enabled 0
717 02:52:56.762637 USB2 port 3: enabled 0
718 02:52:56.762836 USB2 port 5: enabled 0
719 02:52:56.766045 USB2 port 6: enabled 1
720 02:52:56.769291 USB2 port 9: enabled 1
721 02:52:56.772403 USB3 port 0: enabled 1
722 02:52:56.772670 USB3 port 1: enabled 1
723 02:52:56.775808 USB3 port 2: enabled 1
724 02:52:56.779034 USB3 port 3: enabled 1
725 02:52:56.779259 USB3 port 4: enabled 0
726 02:52:56.782298 APIC: 02: enabled 1
727 02:52:56.785356 APIC: 01: enabled 1
728 02:52:56.785606 APIC: 03: enabled 1
729 02:52:56.788602 APIC: 06: enabled 1
730 02:52:56.792230 APIC: 07: enabled 1
731 02:52:56.792425 APIC: 04: enabled 1
732 02:52:56.795263 APIC: 05: enabled 1
733 02:52:56.798622 Compare with tree...
734 02:52:56.798813 Root Device: enabled 1
735 02:52:56.801865 CPU_CLUSTER: 0: enabled 1
736 02:52:56.805249 APIC: 00: enabled 1
737 02:52:56.805529 APIC: 02: enabled 1
738 02:52:56.808336 APIC: 01: enabled 1
739 02:52:56.811859 APIC: 03: enabled 1
740 02:52:56.812050 APIC: 06: enabled 1
741 02:52:56.814918 APIC: 07: enabled 1
742 02:52:56.818335 APIC: 04: enabled 1
743 02:52:56.821930 APIC: 05: enabled 1
744 02:52:56.822487 DOMAIN: 0000: enabled 1
745 02:52:56.824988 PCI: 00:00.0: enabled 1
746 02:52:56.828317 PCI: 00:02.0: enabled 1
747 02:52:56.831573 PCI: 00:04.0: enabled 0
748 02:52:56.835005 PCI: 00:05.0: enabled 0
749 02:52:56.835496 PCI: 00:12.0: enabled 1
750 02:52:56.838310 PCI: 00:12.5: enabled 0
751 02:52:56.841304 PCI: 00:12.6: enabled 0
752 02:52:56.844544 PCI: 00:14.0: enabled 1
753 02:52:56.847834 USB0 port 0: enabled 1
754 02:52:56.848130 USB2 port 0: enabled 1
755 02:52:56.851268 USB2 port 1: enabled 1
756 02:52:56.854242 USB2 port 2: enabled 0
757 02:52:56.857592 USB2 port 3: enabled 0
758 02:52:56.861211 USB2 port 5: enabled 0
759 02:52:56.863921 USB2 port 6: enabled 1
760 02:52:56.864196 USB2 port 9: enabled 1
761 02:52:56.867278 USB3 port 0: enabled 1
762 02:52:56.870393 USB3 port 1: enabled 1
763 02:52:56.873839 USB3 port 2: enabled 1
764 02:52:56.877058 USB3 port 3: enabled 1
765 02:52:56.880417 USB3 port 4: enabled 0
766 02:52:56.880587 PCI: 00:14.1: enabled 0
767 02:52:56.883597 PCI: 00:14.3: enabled 1
768 02:52:56.887074 PCI: 00:14.5: enabled 0
769 02:52:56.890252 PCI: 00:15.0: enabled 1
770 02:52:56.893553 I2C: 00:15: enabled 1
771 02:52:56.893663 PCI: 00:15.1: enabled 1
772 02:52:56.896670 I2C: 00:5d: enabled 1
773 02:52:56.899944 GENERIC: 0.0: enabled 1
774 02:52:56.903452 PCI: 00:15.2: enabled 0
775 02:52:56.906484 PCI: 00:15.3: enabled 0
776 02:52:56.906573 PCI: 00:16.0: enabled 1
777 02:52:56.909735 PCI: 00:16.1: enabled 0
778 02:52:56.913037 PCI: 00:16.2: enabled 0
779 02:52:56.916289 PCI: 00:16.3: enabled 0
780 02:52:56.919717 PCI: 00:16.4: enabled 0
781 02:52:56.919821 PCI: 00:16.5: enabled 0
782 02:52:56.923045 PCI: 00:17.0: enabled 1
783 02:52:56.926319 PCI: 00:19.0: enabled 1
784 02:52:56.929542 I2C: 00:1a: enabled 1
785 02:52:56.929633 I2C: 00:38: enabled 1
786 02:52:56.932591 I2C: 00:39: enabled 1
787 02:52:56.936205 I2C: 00:3a: enabled 1
788 02:52:56.939180 I2C: 00:3b: enabled 1
789 02:52:56.942707 PCI: 00:19.1: enabled 0
790 02:52:56.942793 PCI: 00:19.2: enabled 0
791 02:52:56.945954 PCI: 00:1a.0: enabled 0
792 02:52:56.949021 PCI: 00:1c.0: enabled 0
793 02:52:56.952263 PCI: 00:1c.1: enabled 0
794 02:52:56.955496 PCI: 00:1c.2: enabled 0
795 02:52:56.955585 PCI: 00:1c.3: enabled 0
796 02:52:56.958807 PCI: 00:1c.4: enabled 0
797 02:52:56.962132 PCI: 00:1c.5: enabled 0
798 02:52:56.965343 PCI: 00:1c.6: enabled 0
799 02:52:56.968778 PCI: 00:1c.7: enabled 0
800 02:52:56.968878 PCI: 00:1d.0: enabled 1
801 02:52:56.971914 PCI: 00:1d.1: enabled 0
802 02:52:56.975139 PCI: 00:1d.2: enabled 0
803 02:52:56.978478 PCI: 00:1d.3: enabled 0
804 02:52:56.981766 PCI: 00:1d.4: enabled 0
805 02:52:56.981863 PCI: 00:1d.5: enabled 1
806 02:52:56.985141 PCI: 00:00.0: enabled 1
807 02:52:56.988338 PCI: 00:1e.0: enabled 1
808 02:52:56.991500 PCI: 00:1e.1: enabled 0
809 02:52:56.994795 PCI: 00:1e.2: enabled 1
810 02:52:56.994885 SPI: 00: enabled 1
811 02:52:56.997996 PCI: 00:1e.3: enabled 1
812 02:52:57.001392 SPI: 01: enabled 1
813 02:52:57.004566 PCI: 00:1f.0: enabled 1
814 02:52:57.004655 PNP: 0c09.0: enabled 1
815 02:52:57.008161 PCI: 00:1f.1: enabled 1
816 02:52:57.011453 PCI: 00:1f.2: enabled 1
817 02:52:57.014435 PCI: 00:1f.3: enabled 1
818 02:52:57.017676 PCI: 00:1f.4: enabled 1
819 02:52:57.017765 PCI: 00:1f.5: enabled 1
820 02:52:57.021088 PCI: 00:1f.6: enabled 0
821 02:52:57.024166 Root Device scanning...
822 02:52:57.027429 scan_static_bus for Root Device
823 02:52:57.031036 CPU_CLUSTER: 0 enabled
824 02:52:57.031124 DOMAIN: 0000 enabled
825 02:52:57.034222 DOMAIN: 0000 scanning...
826 02:52:57.037411 PCI: pci_scan_bus for bus 00
827 02:52:57.040623 PCI: 00:00.0 [8086/0000] ops
828 02:52:57.043938 PCI: 00:00.0 [8086/9b61] enabled
829 02:52:57.047424 PCI: 00:02.0 [8086/0000] bus ops
830 02:52:57.050566 PCI: 00:02.0 [8086/9b41] enabled
831 02:52:57.054304 PCI: 00:04.0 [8086/1903] disabled
832 02:52:57.056995 PCI: 00:08.0 [8086/1911] enabled
833 02:52:57.060133 PCI: 00:12.0 [8086/02f9] enabled
834 02:52:57.063514 PCI: 00:14.0 [8086/0000] bus ops
835 02:52:57.066813 PCI: 00:14.0 [8086/02ed] enabled
836 02:52:57.070033 PCI: 00:14.2 [8086/02ef] enabled
837 02:52:57.073400 PCI: 00:14.3 [8086/02f0] enabled
838 02:52:57.076608 PCI: 00:15.0 [8086/0000] bus ops
839 02:52:57.079690 PCI: 00:15.0 [8086/02e8] enabled
840 02:52:57.083219 PCI: 00:15.1 [8086/0000] bus ops
841 02:52:57.086232 PCI: 00:15.1 [8086/02e9] enabled
842 02:52:57.089750 PCI: 00:16.0 [8086/0000] ops
843 02:52:57.092851 PCI: 00:16.0 [8086/02e0] enabled
844 02:52:57.096253 PCI: 00:17.0 [8086/0000] ops
845 02:52:57.099541 PCI: 00:17.0 [8086/02d3] enabled
846 02:52:57.102835 PCI: 00:19.0 [8086/0000] bus ops
847 02:52:57.106124 PCI: 00:19.0 [8086/02c5] enabled
848 02:52:57.109172 PCI: 00:1d.0 [8086/0000] bus ops
849 02:52:57.112570 PCI: 00:1d.0 [8086/02b0] enabled
850 02:52:57.119044 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 02:52:57.122252 PCI: 00:1e.0 [8086/0000] ops
852 02:52:57.125836 PCI: 00:1e.0 [8086/02a8] enabled
853 02:52:57.129051 PCI: 00:1e.2 [8086/0000] bus ops
854 02:52:57.132080 PCI: 00:1e.2 [8086/02aa] enabled
855 02:52:57.135357 PCI: 00:1e.3 [8086/0000] bus ops
856 02:52:57.138809 PCI: 00:1e.3 [8086/02ab] enabled
857 02:52:57.142292 PCI: 00:1f.0 [8086/0000] bus ops
858 02:52:57.145540 PCI: 00:1f.0 [8086/0284] enabled
859 02:52:57.151912 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 02:52:57.158200 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 02:52:57.161518 PCI: 00:1f.3 [8086/0000] bus ops
862 02:52:57.164982 PCI: 00:1f.3 [8086/02c8] enabled
863 02:52:57.168240 PCI: 00:1f.4 [8086/0000] bus ops
864 02:52:57.171254 PCI: 00:1f.4 [8086/02a3] enabled
865 02:52:57.174830 PCI: 00:1f.5 [8086/0000] bus ops
866 02:52:57.177921 PCI: 00:1f.5 [8086/02a4] enabled
867 02:52:57.181213 PCI: Leftover static devices:
868 02:52:57.181324 PCI: 00:05.0
869 02:52:57.181391 PCI: 00:12.5
870 02:52:57.184604 PCI: 00:12.6
871 02:52:57.184689 PCI: 00:14.1
872 02:52:57.188079 PCI: 00:14.5
873 02:52:57.188173 PCI: 00:15.2
874 02:52:57.188245 PCI: 00:15.3
875 02:52:57.191052 PCI: 00:16.1
876 02:52:57.191146 PCI: 00:16.2
877 02:52:57.194261 PCI: 00:16.3
878 02:52:57.194347 PCI: 00:16.4
879 02:52:57.197833 PCI: 00:16.5
880 02:52:57.197919 PCI: 00:19.1
881 02:52:57.197986 PCI: 00:19.2
882 02:52:57.200946 PCI: 00:1a.0
883 02:52:57.201031 PCI: 00:1c.0
884 02:52:57.204122 PCI: 00:1c.1
885 02:52:57.204207 PCI: 00:1c.2
886 02:52:57.207411 PCI: 00:1c.3
887 02:52:57.207496 PCI: 00:1c.4
888 02:52:57.207561 PCI: 00:1c.5
889 02:52:57.210535 PCI: 00:1c.6
890 02:52:57.210623 PCI: 00:1c.7
891 02:52:57.214152 PCI: 00:1d.1
892 02:52:57.214238 PCI: 00:1d.2
893 02:52:57.214305 PCI: 00:1d.3
894 02:52:57.217373 PCI: 00:1d.4
895 02:52:57.217457 PCI: 00:1d.5
896 02:52:57.220652 PCI: 00:1e.1
897 02:52:57.220736 PCI: 00:1f.1
898 02:52:57.223800 PCI: 00:1f.2
899 02:52:57.223883 PCI: 00:1f.6
900 02:52:57.226884 PCI: Check your devicetree.cb.
901 02:52:57.230551 PCI: 00:02.0 scanning...
902 02:52:57.233830 scan_generic_bus for PCI: 00:02.0
903 02:52:57.237073 scan_generic_bus for PCI: 00:02.0 done
904 02:52:57.243525 scan_bus: scanning of bus PCI: 00:02.0 took 10203 usecs
905 02:52:57.243615 PCI: 00:14.0 scanning...
906 02:52:57.247076 scan_static_bus for PCI: 00:14.0
907 02:52:57.250162 USB0 port 0 enabled
908 02:52:57.253533 USB0 port 0 scanning...
909 02:52:57.256717 scan_static_bus for USB0 port 0
910 02:52:57.260334 USB2 port 0 enabled
911 02:52:57.260420 USB2 port 1 enabled
912 02:52:57.263204 USB2 port 2 disabled
913 02:52:57.263292 USB2 port 3 disabled
914 02:52:57.266553 USB2 port 5 disabled
915 02:52:57.270092 USB2 port 6 enabled
916 02:52:57.270177 USB2 port 9 enabled
917 02:52:57.273313 USB3 port 0 enabled
918 02:52:57.276550 USB3 port 1 enabled
919 02:52:57.276640 USB3 port 2 enabled
920 02:52:57.279733 USB3 port 3 enabled
921 02:52:57.283033 USB3 port 4 disabled
922 02:52:57.283119 USB2 port 0 scanning...
923 02:52:57.286220 scan_static_bus for USB2 port 0
924 02:52:57.289668 scan_static_bus for USB2 port 0 done
925 02:52:57.296282 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
926 02:52:57.299545 USB2 port 1 scanning...
927 02:52:57.302805 scan_static_bus for USB2 port 1
928 02:52:57.306011 scan_static_bus for USB2 port 1 done
929 02:52:57.312554 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
930 02:52:57.312662 USB2 port 6 scanning...
931 02:52:57.315745 scan_static_bus for USB2 port 6
932 02:52:57.322421 scan_static_bus for USB2 port 6 done
933 02:52:57.325601 scan_bus: scanning of bus USB2 port 6 took 9716 usecs
934 02:52:57.328822 USB2 port 9 scanning...
935 02:52:57.332181 scan_static_bus for USB2 port 9
936 02:52:57.335335 scan_static_bus for USB2 port 9 done
937 02:52:57.341861 scan_bus: scanning of bus USB2 port 9 took 9712 usecs
938 02:52:57.345025 USB3 port 0 scanning...
939 02:52:57.348615 scan_static_bus for USB3 port 0
940 02:52:57.351631 scan_static_bus for USB3 port 0 done
941 02:52:57.355105 scan_bus: scanning of bus USB3 port 0 took 9713 usecs
942 02:52:57.358323 USB3 port 1 scanning...
943 02:52:57.361530 scan_static_bus for USB3 port 1
944 02:52:57.364847 scan_static_bus for USB3 port 1 done
945 02:52:57.371342 scan_bus: scanning of bus USB3 port 1 took 9716 usecs
946 02:52:57.374720 USB3 port 2 scanning...
947 02:52:57.378115 scan_static_bus for USB3 port 2
948 02:52:57.381183 scan_static_bus for USB3 port 2 done
949 02:52:57.387732 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
950 02:52:57.387817 USB3 port 3 scanning...
951 02:52:57.391365 scan_static_bus for USB3 port 3
952 02:52:57.397606 scan_static_bus for USB3 port 3 done
953 02:52:57.401071 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
954 02:52:57.404270 scan_static_bus for USB0 port 0 done
955 02:52:57.410828 scan_bus: scanning of bus USB0 port 0 took 155464 usecs
956 02:52:57.413976 scan_static_bus for PCI: 00:14.0 done
957 02:52:57.420425 scan_bus: scanning of bus PCI: 00:14.0 took 173087 usecs
958 02:52:57.423956 PCI: 00:15.0 scanning...
959 02:52:57.427117 scan_generic_bus for PCI: 00:15.0
960 02:52:57.430461 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 02:52:57.433625 scan_generic_bus for PCI: 00:15.0 done
962 02:52:57.440148 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
963 02:52:57.443302 PCI: 00:15.1 scanning...
964 02:52:57.446467 scan_generic_bus for PCI: 00:15.1
965 02:52:57.449838 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 02:52:57.453204 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 02:52:57.459777 scan_generic_bus for PCI: 00:15.1 done
968 02:52:57.462885 scan_bus: scanning of bus PCI: 00:15.1 took 18614 usecs
969 02:52:57.466166 PCI: 00:19.0 scanning...
970 02:52:57.469595 scan_generic_bus for PCI: 00:19.0
971 02:52:57.476000 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 02:52:57.479481 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 02:52:57.482763 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 02:52:57.485708 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 02:52:57.492394 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 02:52:57.495634 scan_generic_bus for PCI: 00:19.0 done
977 02:52:57.499090 scan_bus: scanning of bus PCI: 00:19.0 took 30758 usecs
978 02:52:57.502307 PCI: 00:1d.0 scanning...
979 02:52:57.505453 do_pci_scan_bridge for PCI: 00:1d.0
980 02:52:57.508859 PCI: pci_scan_bus for bus 01
981 02:52:57.512072 PCI: 01:00.0 [1c5c/1327] enabled
982 02:52:57.515272 Enabling Common Clock Configuration
983 02:52:57.521965 L1 Sub-State supported from root port 29
984 02:52:57.525197 L1 Sub-State Support = 0xf
985 02:52:57.525281 CommonModeRestoreTime = 0x28
986 02:52:57.532003 Power On Value = 0x16, Power On Scale = 0x0
987 02:52:57.532088 ASPM: Enabled L1
988 02:52:57.538214 scan_bus: scanning of bus PCI: 00:1d.0 took 32817 usecs
989 02:52:57.541602 PCI: 00:1e.2 scanning...
990 02:52:57.544885 scan_generic_bus for PCI: 00:1e.2
991 02:52:57.547882 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 02:52:57.551252 scan_generic_bus for PCI: 00:1e.2 done
993 02:52:57.558074 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
994 02:52:57.561007 PCI: 00:1e.3 scanning...
995 02:52:57.564412 scan_generic_bus for PCI: 00:1e.3
996 02:52:57.567579 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 02:52:57.570790 scan_generic_bus for PCI: 00:1e.3 done
998 02:52:57.577369 scan_bus: scanning of bus PCI: 00:1e.3 took 14024 usecs
999 02:52:57.580699 PCI: 00:1f.0 scanning...
1000 02:52:57.583996 scan_static_bus for PCI: 00:1f.0
1001 02:52:57.584081 PNP: 0c09.0 enabled
1002 02:52:57.590469 scan_static_bus for PCI: 00:1f.0 done
1003 02:52:57.593710 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1004 02:52:57.596976 PCI: 00:1f.3 scanning...
1005 02:52:57.603591 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1006 02:52:57.606979 PCI: 00:1f.4 scanning...
1007 02:52:57.610171 scan_generic_bus for PCI: 00:1f.4
1008 02:52:57.613570 scan_generic_bus for PCI: 00:1f.4 done
1009 02:52:57.620024 scan_bus: scanning of bus PCI: 00:1f.4 took 10201 usecs
1010 02:52:57.620110 PCI: 00:1f.5 scanning...
1011 02:52:57.626492 scan_generic_bus for PCI: 00:1f.5
1012 02:52:57.629729 scan_generic_bus for PCI: 00:1f.5 done
1013 02:52:57.633173 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1014 02:52:57.639903 scan_bus: scanning of bus DOMAIN: 0000 took 605373 usecs
1015 02:52:57.643038 scan_static_bus for Root Device done
1016 02:52:57.649436 scan_bus: scanning of bus Root Device took 625258 usecs
1017 02:52:57.649522 done
1018 02:52:57.652684 Chrome EC: UHEPI supported
1019 02:52:57.659150 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 02:52:57.665737 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 02:52:57.672331 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 02:52:57.678825 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 02:52:57.682077 SPI flash protection: WPSW=0 SRP0=0
1024 02:52:57.685472 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 02:52:57.692035 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 02:52:57.695416 found VGA at PCI: 00:02.0
1027 02:52:57.698640 Setting up VGA for PCI: 00:02.0
1028 02:52:57.705008 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 02:52:57.708374 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 02:52:57.711577 Allocating resources...
1031 02:52:57.711671 Reading resources...
1032 02:52:57.718205 Root Device read_resources bus 0 link: 0
1033 02:52:57.721295 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 02:52:57.728060 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 02:52:57.731291 DOMAIN: 0000 read_resources bus 0 link: 0
1036 02:52:57.738181 PCI: 00:14.0 read_resources bus 0 link: 0
1037 02:52:57.741355 USB0 port 0 read_resources bus 0 link: 0
1038 02:52:57.749295 USB0 port 0 read_resources bus 0 link: 0 done
1039 02:52:57.752732 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 02:52:57.759953 PCI: 00:15.0 read_resources bus 1 link: 0
1041 02:52:57.763160 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 02:52:57.769981 PCI: 00:15.1 read_resources bus 2 link: 0
1043 02:52:57.773123 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 02:52:57.780672 PCI: 00:19.0 read_resources bus 3 link: 0
1045 02:52:57.787510 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 02:52:57.790599 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 02:52:57.797099 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 02:52:57.800382 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 02:52:57.806931 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 02:52:57.810386 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 02:52:57.816745 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 02:52:57.819999 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 02:52:57.826687 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 02:52:57.833425 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 02:52:57.836724 Root Device read_resources bus 0 link: 0 done
1056 02:52:57.839717 Done reading resources.
1057 02:52:57.846396 Show resources in subtree (Root Device)...After reading.
1058 02:52:57.849721 Root Device child on link 0 CPU_CLUSTER: 0
1059 02:52:57.853032 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 02:52:57.856075 APIC: 00
1061 02:52:57.856160 APIC: 02
1062 02:52:57.859458 APIC: 01
1063 02:52:57.859543 APIC: 03
1064 02:52:57.859610 APIC: 06
1065 02:52:57.862678 APIC: 07
1066 02:52:57.862763 APIC: 04
1067 02:52:57.862830 APIC: 05
1068 02:52:57.874169 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 02:52:57.881334 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 02:52:57.893477 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 02:52:57.893567 PCI: 00:00.0
1072 02:52:57.902307 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 02:52:57.908931 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 02:52:57.920753 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 02:52:57.929429 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 02:52:57.935798 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 02:52:57.945978 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 02:52:57.960541 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 02:52:58.003636 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 02:52:58.003749 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 02:52:58.004007 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 02:52:58.004265 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 02:52:58.049101 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 02:52:58.049403 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 02:52:58.049485 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 02:52:58.049908 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 02:52:58.050365 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 02:52:58.050442 PCI: 00:02.0
1089 02:52:58.099170 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 02:52:58.099562 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 02:52:58.099890 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 02:52:58.099961 PCI: 00:04.0
1093 02:52:58.100024 PCI: 00:08.0
1094 02:52:58.100084 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 02:52:58.100158 PCI: 00:12.0
1096 02:52:58.100772 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 02:52:58.100859 PCI: 00:14.0 child on link 0 USB0 port 0
1098 02:52:58.131091 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 02:52:58.131369 USB0 port 0 child on link 0 USB2 port 0
1100 02:52:58.131441 USB2 port 0
1101 02:52:58.131506 USB2 port 1
1102 02:52:58.131565 USB2 port 2
1103 02:52:58.131623 USB2 port 3
1104 02:52:58.131681 USB2 port 5
1105 02:52:58.131736 USB2 port 6
1106 02:52:58.131980 USB2 port 9
1107 02:52:58.132046 USB3 port 0
1108 02:52:58.132103 USB3 port 1
1109 02:52:58.132160 USB3 port 2
1110 02:52:58.165520 USB3 port 3
1111 02:52:58.165663 USB3 port 4
1112 02:52:58.165747 PCI: 00:14.2
1113 02:52:58.166035 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 02:52:58.166110 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 02:52:58.166362 PCI: 00:14.3
1116 02:52:58.171107 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 02:52:58.174346 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 02:52:58.180872 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 02:52:58.183971 I2C: 01:15
1120 02:52:58.187221 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 02:52:58.196912 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 02:52:58.200420 I2C: 02:5d
1123 02:52:58.200511 GENERIC: 0.0
1124 02:52:58.203650 PCI: 00:16.0
1125 02:52:58.213393 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 02:52:58.213476 PCI: 00:17.0
1127 02:52:58.223163 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 02:52:58.232969 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 02:52:58.239551 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 02:52:58.249144 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 02:52:58.255803 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 02:52:58.265543 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 02:52:58.272022 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 02:52:58.281996 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 02:52:58.282084 I2C: 03:1a
1136 02:52:58.285116 I2C: 03:38
1137 02:52:58.285194 I2C: 03:39
1138 02:52:58.285256 I2C: 03:3a
1139 02:52:58.288361 I2C: 03:3b
1140 02:52:58.291784 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 02:52:58.301712 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 02:52:58.311631 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 02:52:58.321493 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 02:52:58.321579 PCI: 01:00.0
1145 02:52:58.331281 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 02:52:58.334627 PCI: 00:1e.0
1147 02:52:58.344226 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 02:52:58.353809 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 02:52:58.360403 PCI: 00:1e.2 child on link 0 SPI: 00
1150 02:52:58.370110 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 02:52:58.370199 SPI: 00
1152 02:52:58.373195 PCI: 00:1e.3 child on link 0 SPI: 01
1153 02:52:58.383247 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 02:52:58.386477 SPI: 01
1155 02:52:58.389592 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 02:52:58.399458 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 02:52:58.405966 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 02:52:58.409226 PNP: 0c09.0
1159 02:52:58.418837 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 02:52:58.418961 PCI: 00:1f.3
1161 02:52:58.428994 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 02:52:58.438630 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 02:52:58.441837 PCI: 00:1f.4
1164 02:52:58.451867 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 02:52:58.458223 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 02:52:58.461434 PCI: 00:1f.5
1167 02:52:58.471296 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 02:52:58.477795 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 02:52:58.484124 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 02:52:58.491114 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 02:52:58.494230 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 02:52:58.497355 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 02:52:58.500513 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 02:52:58.503701 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 02:52:58.510440 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 02:52:58.516760 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 02:52:58.526783 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 02:52:58.533081 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 02:52:58.539846 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 02:52:58.546311 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 02:52:58.552829 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 02:52:58.556061 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 02:52:58.562557 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 02:52:58.566006 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 02:52:58.572433 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 02:52:58.575686 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 02:52:58.582192 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 02:52:58.585737 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 02:52:58.592001 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 02:52:58.595433 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 02:52:58.601946 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 02:52:58.605169 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 02:52:58.611671 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 02:52:58.614837 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 02:52:58.621585 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 02:52:58.624822 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 02:52:58.631232 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 02:52:58.634602 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 02:52:58.641119 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 02:52:58.644514 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 02:52:58.650759 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 02:52:58.653979 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 02:52:58.660608 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 02:52:58.663833 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 02:52:58.673838 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 02:52:58.676865 avoid_fixed_resources: DOMAIN: 0000
1207 02:52:58.683486 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 02:52:58.690066 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 02:52:58.696603 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 02:52:58.702930 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 02:52:58.712847 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 02:52:58.719483 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 02:52:58.726034 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 02:52:58.736022 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 02:52:58.742572 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 02:52:58.748961 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 02:52:58.755401 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 02:52:58.765372 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 02:52:58.765456 Setting resources...
1220 02:52:58.771644 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 02:52:58.775149 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 02:52:58.781361 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 02:52:58.784697 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 02:52:58.788208 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 02:52:58.794404 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 02:52:58.801249 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 02:52:58.807560 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 02:52:58.814048 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 02:52:58.821018 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 02:52:58.824088 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 02:52:58.830449 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 02:52:58.834034 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 02:52:58.840507 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 02:52:58.843778 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 02:52:58.850318 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 02:52:58.853601 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 02:52:58.860107 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 02:52:58.863160 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 02:52:58.869580 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 02:52:58.873115 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 02:52:58.879602 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 02:52:58.883105 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 02:52:58.889365 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 02:52:58.892875 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 02:52:58.899254 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 02:52:58.902694 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 02:52:58.909156 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 02:52:58.912338 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 02:52:58.918717 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 02:52:58.922159 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 02:52:58.928614 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 02:52:58.935050 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 02:52:58.941465 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 02:52:58.948116 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 02:52:58.957770 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 02:52:58.961432 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 02:52:58.967762 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 02:52:58.974313 Root Device assign_resources, bus 0 link: 0
1259 02:52:58.977511 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 02:52:58.987482 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 02:52:58.993938 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 02:52:59.003639 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 02:52:59.010245 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 02:52:59.020191 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 02:52:59.026653 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 02:52:59.032934 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 02:52:59.036375 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 02:52:59.046403 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 02:52:59.052774 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 02:52:59.062547 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 02:52:59.069213 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 02:52:59.075826 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 02:52:59.078715 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 02:52:59.088703 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 02:52:59.092018 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 02:52:59.095264 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 02:52:59.105208 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 02:52:59.111842 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 02:52:59.121552 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 02:52:59.127990 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 02:52:59.137985 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 02:52:59.144425 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 02:52:59.150791 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 02:52:59.160721 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 02:52:59.163713 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 02:52:59.170283 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 02:52:59.176867 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 02:52:59.186791 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 02:52:59.196518 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 02:52:59.199835 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 02:52:59.209609 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 02:52:59.213056 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 02:52:59.222730 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 02:52:59.229269 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 02:52:59.232388 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 02:52:59.239220 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 02:52:59.245564 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 02:52:59.252332 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 02:52:59.255477 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 02:52:59.262193 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 02:52:59.265454 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 02:52:59.271962 LPC: Trying to open IO window from 800 size 1ff
1303 02:52:59.278604 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 02:52:59.288304 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 02:52:59.294694 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 02:52:59.304741 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 02:52:59.307824 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 02:52:59.314531 Root Device assign_resources, bus 0 link: 0
1309 02:52:59.314615 Done setting resources.
1310 02:52:59.321078 Show resources in subtree (Root Device)...After assigning values.
1311 02:52:59.327606 Root Device child on link 0 CPU_CLUSTER: 0
1312 02:52:59.330916 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 02:52:59.331018 APIC: 00
1314 02:52:59.334240 APIC: 02
1315 02:52:59.334324 APIC: 01
1316 02:52:59.337355 APIC: 03
1317 02:52:59.337440 APIC: 06
1318 02:52:59.337507 APIC: 07
1319 02:52:59.340588 APIC: 04
1320 02:52:59.340674 APIC: 05
1321 02:52:59.343758 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 02:52:59.353876 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 02:52:59.366855 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 02:52:59.366951 PCI: 00:00.0
1325 02:52:59.376608 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 02:52:59.386384 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 02:52:59.395940 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 02:52:59.405935 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 02:52:59.415612 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 02:52:59.425484 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 02:52:59.431788 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 02:52:59.441837 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 02:52:59.451441 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 02:52:59.461536 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 02:52:59.471370 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 02:52:59.480966 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 02:52:59.490622 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 02:52:59.500555 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 02:52:59.507040 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 02:52:59.516980 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 02:52:59.520040 PCI: 00:02.0
1342 02:52:59.529917 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 02:52:59.539758 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 02:52:59.549718 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 02:52:59.552961 PCI: 00:04.0
1346 02:52:59.553048 PCI: 00:08.0
1347 02:52:59.562671 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 02:52:59.565852 PCI: 00:12.0
1349 02:52:59.575818 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 02:52:59.578767 PCI: 00:14.0 child on link 0 USB0 port 0
1351 02:52:59.588934 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 02:52:59.595558 USB0 port 0 child on link 0 USB2 port 0
1353 02:52:59.595648 USB2 port 0
1354 02:52:59.598587 USB2 port 1
1355 02:52:59.598674 USB2 port 2
1356 02:52:59.602005 USB2 port 3
1357 02:52:59.602092 USB2 port 5
1358 02:52:59.605082 USB2 port 6
1359 02:52:59.608222 USB2 port 9
1360 02:52:59.608308 USB3 port 0
1361 02:52:59.611727 USB3 port 1
1362 02:52:59.611814 USB3 port 2
1363 02:52:59.614743 USB3 port 3
1364 02:52:59.614830 USB3 port 4
1365 02:52:59.618318 PCI: 00:14.2
1366 02:52:59.628109 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 02:52:59.637804 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 02:52:59.640982 PCI: 00:14.3
1369 02:52:59.650712 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 02:52:59.653967 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 02:52:59.664008 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 02:52:59.666908 I2C: 01:15
1373 02:52:59.670505 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 02:52:59.680005 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 02:52:59.683565 I2C: 02:5d
1376 02:52:59.683653 GENERIC: 0.0
1377 02:52:59.686762 PCI: 00:16.0
1378 02:52:59.696575 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 02:52:59.696664 PCI: 00:17.0
1380 02:52:59.709478 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 02:52:59.719387 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 02:52:59.725691 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 02:52:59.735478 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 02:52:59.745534 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 02:52:59.755092 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 02:52:59.758363 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 02:52:59.771293 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 02:52:59.771388 I2C: 03:1a
1389 02:52:59.774851 I2C: 03:38
1390 02:52:59.774981 I2C: 03:39
1391 02:52:59.775072 I2C: 03:3a
1392 02:52:59.778088 I2C: 03:3b
1393 02:52:59.781332 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 02:52:59.791394 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 02:52:59.801139 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 02:52:59.810902 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 02:52:59.814036 PCI: 01:00.0
1398 02:52:59.823710 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 02:52:59.827259 PCI: 00:1e.0
1400 02:52:59.837001 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 02:52:59.846822 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 02:52:59.850038 PCI: 00:1e.2 child on link 0 SPI: 00
1403 02:52:59.863208 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 02:52:59.863296 SPI: 00
1405 02:52:59.866530 PCI: 00:1e.3 child on link 0 SPI: 01
1406 02:52:59.876336 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 02:52:59.879309 SPI: 01
1408 02:52:59.882641 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 02:52:59.892609 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 02:52:59.899120 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 02:52:59.902430 PNP: 0c09.0
1412 02:52:59.912298 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 02:52:59.912384 PCI: 00:1f.3
1414 02:52:59.921935 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 02:52:59.931624 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 02:52:59.935169 PCI: 00:1f.4
1417 02:52:59.945082 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 02:52:59.954865 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 02:52:59.954993 PCI: 00:1f.5
1420 02:52:59.967760 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 02:52:59.967879 Done allocating resources.
1422 02:52:59.974338 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 02:52:59.977521 Enabling resources...
1424 02:52:59.980806 PCI: 00:00.0 subsystem <- 8086/9b61
1425 02:52:59.983955 PCI: 00:00.0 cmd <- 06
1426 02:52:59.987347 PCI: 00:02.0 subsystem <- 8086/9b41
1427 02:52:59.990641 PCI: 00:02.0 cmd <- 03
1428 02:52:59.993917 PCI: 00:08.0 cmd <- 06
1429 02:52:59.997047 PCI: 00:12.0 subsystem <- 8086/02f9
1430 02:53:00.000507 PCI: 00:12.0 cmd <- 02
1431 02:53:00.003390 PCI: 00:14.0 subsystem <- 8086/02ed
1432 02:53:00.006649 PCI: 00:14.0 cmd <- 02
1433 02:53:00.006731 PCI: 00:14.2 cmd <- 02
1434 02:53:00.013539 PCI: 00:14.3 subsystem <- 8086/02f0
1435 02:53:00.013622 PCI: 00:14.3 cmd <- 02
1436 02:53:00.019836 PCI: 00:15.0 subsystem <- 8086/02e8
1437 02:53:00.019925 PCI: 00:15.0 cmd <- 02
1438 02:53:00.023334 PCI: 00:15.1 subsystem <- 8086/02e9
1439 02:53:00.026659 PCI: 00:15.1 cmd <- 02
1440 02:53:00.029983 PCI: 00:16.0 subsystem <- 8086/02e0
1441 02:53:00.033118 PCI: 00:16.0 cmd <- 02
1442 02:53:00.036096 PCI: 00:17.0 subsystem <- 8086/02d3
1443 02:53:00.039586 PCI: 00:17.0 cmd <- 03
1444 02:53:00.042768 PCI: 00:19.0 subsystem <- 8086/02c5
1445 02:53:00.046159 PCI: 00:19.0 cmd <- 02
1446 02:53:00.049377 PCI: 00:1d.0 bridge ctrl <- 0013
1447 02:53:00.052816 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 02:53:00.056042 PCI: 00:1d.0 cmd <- 06
1449 02:53:00.059144 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 02:53:00.062343 PCI: 00:1e.0 cmd <- 06
1451 02:53:00.065492 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 02:53:00.068799 PCI: 00:1e.2 cmd <- 06
1453 02:53:00.072210 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 02:53:00.075266 PCI: 00:1e.3 cmd <- 02
1455 02:53:00.078851 PCI: 00:1f.0 subsystem <- 8086/0284
1456 02:53:00.082102 PCI: 00:1f.0 cmd <- 407
1457 02:53:00.085246 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 02:53:00.085336 PCI: 00:1f.3 cmd <- 02
1459 02:53:00.092047 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 02:53:00.092127 PCI: 00:1f.4 cmd <- 03
1461 02:53:00.098348 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 02:53:00.098433 PCI: 00:1f.5 cmd <- 406
1463 02:53:00.108187 PCI: 01:00.0 cmd <- 02
1464 02:53:00.113350 done.
1465 02:53:00.122763 ME: Version: 14.0.39.1367
1466 02:53:00.129069 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1467 02:53:00.132220 Initializing devices...
1468 02:53:00.132299 Root Device init ...
1469 02:53:00.139055 Chrome EC: Set SMI mask to 0x0000000000000000
1470 02:53:00.145246 Chrome EC: clear events_b mask to 0x0000000000000000
1471 02:53:00.148794 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 02:53:00.155347 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 02:53:00.161970 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 02:53:00.165050 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 02:53:00.171577 Root Device init finished in 35156 usecs
1476 02:53:00.174825 CPU_CLUSTER: 0 init ...
1477 02:53:00.178080 CPU_CLUSTER: 0 init finished in 2449 usecs
1478 02:53:00.183208 PCI: 00:00.0 init ...
1479 02:53:00.186372 CPU TDP: 15 Watts
1480 02:53:00.189927 CPU PL2 = 64 Watts
1481 02:53:00.193118 PCI: 00:00.0 init finished in 7079 usecs
1482 02:53:00.196162 PCI: 00:02.0 init ...
1483 02:53:00.199575 PCI: 00:02.0 init finished in 2253 usecs
1484 02:53:00.202806 PCI: 00:08.0 init ...
1485 02:53:00.206080 PCI: 00:08.0 init finished in 2252 usecs
1486 02:53:00.209284 PCI: 00:12.0 init ...
1487 02:53:00.212710 PCI: 00:12.0 init finished in 2245 usecs
1488 02:53:00.215779 PCI: 00:14.0 init ...
1489 02:53:00.219095 PCI: 00:14.0 init finished in 2253 usecs
1490 02:53:00.222294 PCI: 00:14.2 init ...
1491 02:53:00.225633 PCI: 00:14.2 init finished in 2252 usecs
1492 02:53:00.229006 PCI: 00:14.3 init ...
1493 02:53:00.232079 PCI: 00:14.3 init finished in 2261 usecs
1494 02:53:00.235657 PCI: 00:15.0 init ...
1495 02:53:00.239017 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 02:53:00.245526 PCI: 00:15.0 init finished in 5977 usecs
1497 02:53:00.245611 PCI: 00:15.1 init ...
1498 02:53:00.251924 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 02:53:00.255184 PCI: 00:15.1 init finished in 5978 usecs
1500 02:53:00.258661 PCI: 00:16.0 init ...
1501 02:53:00.262023 PCI: 00:16.0 init finished in 2252 usecs
1502 02:53:00.264934 PCI: 00:19.0 init ...
1503 02:53:00.268212 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 02:53:00.271573 PCI: 00:19.0 init finished in 5979 usecs
1505 02:53:00.274740 PCI: 00:1d.0 init ...
1506 02:53:00.278270 Initializing PCH PCIe bridge.
1507 02:53:00.281444 PCI: 00:1d.0 init finished in 5287 usecs
1508 02:53:00.285064 PCI: 00:1f.0 init ...
1509 02:53:00.291384 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 02:53:00.294905 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 02:53:00.295001 IOAPIC: ID = 0x02
1512 02:53:00.298086 IOAPIC: Dumping registers
1513 02:53:00.301480 reg 0x0000: 0x02000000
1514 02:53:00.304389 reg 0x0001: 0x00770020
1515 02:53:00.307742 reg 0x0002: 0x00000000
1516 02:53:00.311226 PCI: 00:1f.0 init finished in 23557 usecs
1517 02:53:00.314665 PCI: 00:1f.4 init ...
1518 02:53:00.317542 PCI: 00:1f.4 init finished in 2263 usecs
1519 02:53:00.329124 PCI: 01:00.0 init ...
1520 02:53:00.332320 PCI: 01:00.0 init finished in 2253 usecs
1521 02:53:00.336976 PNP: 0c09.0 init ...
1522 02:53:00.343529 Google Chrome EC uptime: 11.153 seconds
1523 02:53:00.346637 Google Chrome AP resets since EC boot: 0
1524 02:53:00.349836 Google Chrome most recent AP reset causes:
1525 02:53:00.356554 Google Chrome EC reset flags at last EC boot: reset-pin
1526 02:53:00.359742 PNP: 0c09.0 init finished in 20615 usecs
1527 02:53:00.363027 Devices initialized
1528 02:53:00.366209 Show all devs... After init.
1529 02:53:00.366293 Root Device: enabled 1
1530 02:53:00.369466 CPU_CLUSTER: 0: enabled 1
1531 02:53:00.372825 DOMAIN: 0000: enabled 1
1532 02:53:00.376029 APIC: 00: enabled 1
1533 02:53:00.376114 PCI: 00:00.0: enabled 1
1534 02:53:00.379658 PCI: 00:02.0: enabled 1
1535 02:53:00.382657 PCI: 00:04.0: enabled 0
1536 02:53:00.385755 PCI: 00:05.0: enabled 0
1537 02:53:00.385839 PCI: 00:12.0: enabled 1
1538 02:53:00.389052 PCI: 00:12.5: enabled 0
1539 02:53:00.392484 PCI: 00:12.6: enabled 0
1540 02:53:00.395735 PCI: 00:14.0: enabled 1
1541 02:53:00.395853 PCI: 00:14.1: enabled 0
1542 02:53:00.398829 PCI: 00:14.3: enabled 1
1543 02:53:00.402220 PCI: 00:14.5: enabled 0
1544 02:53:00.402305 PCI: 00:15.0: enabled 1
1545 02:53:00.405429 PCI: 00:15.1: enabled 1
1546 02:53:00.408685 PCI: 00:15.2: enabled 0
1547 02:53:00.411773 PCI: 00:15.3: enabled 0
1548 02:53:00.411859 PCI: 00:16.0: enabled 1
1549 02:53:00.415018 PCI: 00:16.1: enabled 0
1550 02:53:00.418375 PCI: 00:16.2: enabled 0
1551 02:53:00.421596 PCI: 00:16.3: enabled 0
1552 02:53:00.421712 PCI: 00:16.4: enabled 0
1553 02:53:00.424916 PCI: 00:16.5: enabled 0
1554 02:53:00.428266 PCI: 00:17.0: enabled 1
1555 02:53:00.431519 PCI: 00:19.0: enabled 1
1556 02:53:00.431605 PCI: 00:19.1: enabled 0
1557 02:53:00.434783 PCI: 00:19.2: enabled 0
1558 02:53:00.437945 PCI: 00:1a.0: enabled 0
1559 02:53:00.441496 PCI: 00:1c.0: enabled 0
1560 02:53:00.441583 PCI: 00:1c.1: enabled 0
1561 02:53:00.444551 PCI: 00:1c.2: enabled 0
1562 02:53:00.447878 PCI: 00:1c.3: enabled 0
1563 02:53:00.450922 PCI: 00:1c.4: enabled 0
1564 02:53:00.451007 PCI: 00:1c.5: enabled 0
1565 02:53:00.454480 PCI: 00:1c.6: enabled 0
1566 02:53:00.457702 PCI: 00:1c.7: enabled 0
1567 02:53:00.460806 PCI: 00:1d.0: enabled 1
1568 02:53:00.460891 PCI: 00:1d.1: enabled 0
1569 02:53:00.464477 PCI: 00:1d.2: enabled 0
1570 02:53:00.467382 PCI: 00:1d.3: enabled 0
1571 02:53:00.470661 PCI: 00:1d.4: enabled 0
1572 02:53:00.470746 PCI: 00:1d.5: enabled 0
1573 02:53:00.473975 PCI: 00:1e.0: enabled 1
1574 02:53:00.477198 PCI: 00:1e.1: enabled 0
1575 02:53:00.480386 PCI: 00:1e.2: enabled 1
1576 02:53:00.480472 PCI: 00:1e.3: enabled 1
1577 02:53:00.483602 PCI: 00:1f.0: enabled 1
1578 02:53:00.486876 PCI: 00:1f.1: enabled 0
1579 02:53:00.490093 PCI: 00:1f.2: enabled 0
1580 02:53:00.490178 PCI: 00:1f.3: enabled 1
1581 02:53:00.493538 PCI: 00:1f.4: enabled 1
1582 02:53:00.496608 PCI: 00:1f.5: enabled 1
1583 02:53:00.500129 PCI: 00:1f.6: enabled 0
1584 02:53:00.500221 USB0 port 0: enabled 1
1585 02:53:00.503269 I2C: 01:15: enabled 1
1586 02:53:00.506606 I2C: 02:5d: enabled 1
1587 02:53:00.506693 GENERIC: 0.0: enabled 1
1588 02:53:00.509675 I2C: 03:1a: enabled 1
1589 02:53:00.513017 I2C: 03:38: enabled 1
1590 02:53:00.513104 I2C: 03:39: enabled 1
1591 02:53:00.516432 I2C: 03:3a: enabled 1
1592 02:53:00.519748 I2C: 03:3b: enabled 1
1593 02:53:00.522871 PCI: 00:00.0: enabled 1
1594 02:53:00.523001 SPI: 00: enabled 1
1595 02:53:00.526023 SPI: 01: enabled 1
1596 02:53:00.526109 PNP: 0c09.0: enabled 1
1597 02:53:00.529473 USB2 port 0: enabled 1
1598 02:53:00.532451 USB2 port 1: enabled 1
1599 02:53:00.536059 USB2 port 2: enabled 0
1600 02:53:00.536146 USB2 port 3: enabled 0
1601 02:53:00.539316 USB2 port 5: enabled 0
1602 02:53:00.542202 USB2 port 6: enabled 1
1603 02:53:00.545457 USB2 port 9: enabled 1
1604 02:53:00.545543 USB3 port 0: enabled 1
1605 02:53:00.548941 USB3 port 1: enabled 1
1606 02:53:00.552054 USB3 port 2: enabled 1
1607 02:53:00.552145 USB3 port 3: enabled 1
1608 02:53:00.555468 USB3 port 4: enabled 0
1609 02:53:00.558650 APIC: 02: enabled 1
1610 02:53:00.558737 APIC: 01: enabled 1
1611 02:53:00.561781 APIC: 03: enabled 1
1612 02:53:00.565218 APIC: 06: enabled 1
1613 02:53:00.565305 APIC: 07: enabled 1
1614 02:53:00.568497 APIC: 04: enabled 1
1615 02:53:00.571789 APIC: 05: enabled 1
1616 02:53:00.571876 PCI: 00:08.0: enabled 1
1617 02:53:00.574914 PCI: 00:14.2: enabled 1
1618 02:53:00.578033 PCI: 01:00.0: enabled 1
1619 02:53:00.581582 Disabling ACPI via APMC:
1620 02:53:00.584889 done.
1621 02:53:00.588139 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 02:53:00.591257 ELOG: NV offset 0xaf0000 size 0x4000
1623 02:53:00.598480 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 02:53:00.605350 ELOG: Event(17) added with size 13 at 2022-06-28 02:52:41 UTC
1625 02:53:00.611943 POST: Unexpected post code in previous boot: 0x73
1626 02:53:00.618039 ELOG: Event(A3) added with size 11 at 2022-06-28 02:52:41 UTC
1627 02:53:00.624598 ELOG: Event(92) added with size 9 at 2022-06-28 02:52:41 UTC
1628 02:53:00.631170 ELOG: Event(93) added with size 9 at 2022-06-28 02:52:41 UTC
1629 02:53:00.637861 ELOG: Event(9A) added with size 9 at 2022-06-28 02:52:41 UTC
1630 02:53:00.644434 ELOG: Event(9E) added with size 10 at 2022-06-28 02:52:41 UTC
1631 02:53:00.650671 ELOG: Event(9F) added with size 14 at 2022-06-28 02:52:41 UTC
1632 02:53:00.654042 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1633 02:53:00.660581 ELOG: Event(A1) added with size 10 at 2022-06-28 02:52:41 UTC
1634 02:53:00.670420 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 02:53:00.677000 ELOG: Event(A0) added with size 9 at 2022-06-28 02:52:41 UTC
1636 02:53:00.680214 elog_add_boot_reason: Logged dev mode boot
1637 02:53:00.680300 Finalize devices...
1638 02:53:00.683503 PCI: 00:17.0 final
1639 02:53:00.686705 Devices finalized
1640 02:53:00.689913 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 02:53:00.696331 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 02:53:00.699815 ME: HFSTS1 : 0x90000245
1643 02:53:00.702784 ME: HFSTS2 : 0x3B850126
1644 02:53:00.709509 ME: HFSTS3 : 0x00000020
1645 02:53:00.712736 ME: HFSTS4 : 0x00004800
1646 02:53:00.716001 ME: HFSTS5 : 0x00000000
1647 02:53:00.719232 ME: HFSTS6 : 0x40400006
1648 02:53:00.722487 ME: Manufacturing Mode : NO
1649 02:53:00.725751 ME: FW Partition Table : OK
1650 02:53:00.728962 ME: Bringup Loader Failure : NO
1651 02:53:00.735395 ME: Firmware Init Complete : YES
1652 02:53:00.738865 ME: Boot Options Present : NO
1653 02:53:00.742153 ME: Update In Progress : NO
1654 02:53:00.745439 ME: D0i3 Support : YES
1655 02:53:00.748440 ME: Low Power State Enabled : NO
1656 02:53:00.751842 ME: CPU Replaced : NO
1657 02:53:00.755111 ME: CPU Replacement Valid : YES
1658 02:53:00.758390 ME: Current Working State : 5
1659 02:53:00.761722 ME: Current Operation State : 1
1660 02:53:00.764920 ME: Current Operation Mode : 0
1661 02:53:00.768245 ME: Error Code : 0
1662 02:53:00.771296 ME: CPU Debug Disabled : YES
1663 02:53:00.774531 ME: TXT Support : NO
1664 02:53:00.777781 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 02:53:00.784465 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 02:53:00.787703 CBFS @ c08000 size 3f8000
1667 02:53:00.794410 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 02:53:00.797644 CBFS: Locating 'fallback/dsdt.aml'
1669 02:53:00.801092 CBFS: Found @ offset 10bb80 size 3fa5
1670 02:53:00.804141 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 02:53:00.807269 CBFS @ c08000 size 3f8000
1672 02:53:00.813811 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 02:53:00.816959 CBFS: Locating 'fallback/slic'
1674 02:53:00.824208 CBFS: 'fallback/slic' not found.
1675 02:53:00.827163 ACPI: Writing ACPI tables at 99b3e000.
1676 02:53:00.827249 ACPI: * FACS
1677 02:53:00.830669 ACPI: * DSDT
1678 02:53:00.834021 Ramoops buffer: 0x100000@0x99a3d000.
1679 02:53:00.837296 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 02:53:00.843834 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 02:53:00.846825 Google Chrome EC: version:
1682 02:53:00.850228 ro: helios_v2.0.2659-56403530b
1683 02:53:00.853539 rw: helios_v2.0.2849-c41de27e7d
1684 02:53:00.853625 running image: 1
1685 02:53:00.858314 ACPI: * FADT
1686 02:53:00.858400 SCI is IRQ9
1687 02:53:00.864583 ACPI: added table 1/32, length now 40
1688 02:53:00.864668 ACPI: * SSDT
1689 02:53:00.868047 Found 1 CPU(s) with 8 core(s) each.
1690 02:53:00.874436 Error: Could not locate 'wifi_sar' in VPD.
1691 02:53:00.877680 Checking CBFS for default SAR values
1692 02:53:00.881030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 02:53:00.884395 CBFS @ c08000 size 3f8000
1694 02:53:00.890808 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 02:53:00.893957 CBFS: Locating 'wifi_sar_defaults.hex'
1696 02:53:00.897527 CBFS: Found @ offset 5fac0 size 77
1697 02:53:00.900415 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 02:53:00.907111 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 02:53:00.910228 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 02:53:00.916952 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 02:53:00.920320 failed to find key in VPD: dsm_calib_r0_0
1702 02:53:00.930036 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 02:53:00.936585 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 02:53:00.939848 failed to find key in VPD: dsm_calib_r0_1
1705 02:53:00.946307 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 02:53:00.952852 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 02:53:00.956028 failed to find key in VPD: dsm_calib_r0_2
1708 02:53:00.965943 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 02:53:00.972477 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 02:53:00.975720 failed to find key in VPD: dsm_calib_r0_3
1711 02:53:00.985700 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 02:53:00.988600 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 02:53:00.995161 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 02:53:00.998623 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 02:53:01.001924 EC returned error result code 1
1716 02:53:01.005437 EC returned error result code 1
1717 02:53:01.008754 EC returned error result code 1
1718 02:53:01.015291 PS2K: Bad resp from EC. Vivaldi disabled!
1719 02:53:01.021660 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 02:53:01.025293 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 02:53:01.031575 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 02:53:01.034931 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 02:53:01.041309 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 02:53:01.047776 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 02:53:01.054368 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 02:53:01.060911 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 02:53:01.064044 ACPI: added table 2/32, length now 44
1728 02:53:01.064130 ACPI: * MCFG
1729 02:53:01.067346 ACPI: added table 3/32, length now 48
1730 02:53:01.070618 ACPI: * TPM2
1731 02:53:01.073960 TPM2 log created at 99a2d000
1732 02:53:01.077418 ACPI: added table 4/32, length now 52
1733 02:53:01.077503 ACPI: * MADT
1734 02:53:01.080519 SCI is IRQ9
1735 02:53:01.083980 ACPI: added table 5/32, length now 56
1736 02:53:01.087102 current = 99b43ac0
1737 02:53:01.087188 ACPI: * DMAR
1738 02:53:01.090344 ACPI: added table 6/32, length now 60
1739 02:53:01.093613 ACPI: * IGD OpRegion
1740 02:53:01.096668 GMA: Found VBT in CBFS
1741 02:53:01.100063 GMA: Found valid VBT in CBFS
1742 02:53:01.103297 ACPI: added table 7/32, length now 64
1743 02:53:01.103374 ACPI: * HPET
1744 02:53:01.109718 ACPI: added table 8/32, length now 68
1745 02:53:01.109799 ACPI: done.
1746 02:53:01.112994 ACPI tables: 31744 bytes.
1747 02:53:01.116442 smbios_write_tables: 99a2c000
1748 02:53:01.119830 EC returned error result code 3
1749 02:53:01.122891 Couldn't obtain OEM name from CBI
1750 02:53:01.126287 Create SMBIOS type 17
1751 02:53:01.129694 PCI: 00:00.0 (Intel Cannonlake)
1752 02:53:01.129772 PCI: 00:14.3 (Intel WiFi)
1753 02:53:01.132733 SMBIOS tables: 939 bytes.
1754 02:53:01.139456 Writing table forward entry at 0x00000500
1755 02:53:01.142555 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 02:53:01.148883 Writing coreboot table at 0x99b62000
1757 02:53:01.152236 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 02:53:01.158781 1. 0000000000001000-000000000009ffff: RAM
1759 02:53:01.162191 2. 00000000000a0000-00000000000fffff: RESERVED
1760 02:53:01.165555 3. 0000000000100000-0000000099a2bfff: RAM
1761 02:53:01.171969 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 02:53:01.178735 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 02:53:01.185100 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 02:53:01.188313 7. 000000009a000000-000000009f7fffff: RESERVED
1765 02:53:01.191569 8. 00000000e0000000-00000000efffffff: RESERVED
1766 02:53:01.198417 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 02:53:01.201451 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 02:53:01.208054 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 02:53:01.211397 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 02:53:01.218105 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 02:53:01.221080 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 02:53:01.224435 15. 0000000100000000-000000045e7fffff: RAM
1773 02:53:01.230863 Graphics framebuffer located at 0xc0000000
1774 02:53:01.233974 Passing 5 GPIOs to payload:
1775 02:53:01.237327 NAME | PORT | POLARITY | VALUE
1776 02:53:01.244105 write protect | undefined | high | low
1777 02:53:01.247318 lid | undefined | high | high
1778 02:53:01.253792 power | undefined | high | low
1779 02:53:01.260481 oprom | undefined | high | low
1780 02:53:01.263706 EC in RW | 0x000000cb | high | low
1781 02:53:01.266784 Board ID: 4
1782 02:53:01.269957 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 02:53:01.273463 CBFS @ c08000 size 3f8000
1784 02:53:01.279803 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 02:53:01.286241 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum ef9
1786 02:53:01.289486 coreboot table: 1452 bytes.
1787 02:53:01.293053 IMD ROOT 0. 99fff000 00001000
1788 02:53:01.296277 IMD SMALL 1. 99ffe000 00001000
1789 02:53:01.299520 FSP MEMORY 2. 99c4e000 003b0000
1790 02:53:01.302680 CONSOLE 3. 99c2e000 00020000
1791 02:53:01.306113 FMAP 4. 99c2d000 0000054e
1792 02:53:01.309040 TIME STAMP 5. 99c2c000 00000910
1793 02:53:01.312382 VBOOT WORK 6. 99c18000 00014000
1794 02:53:01.315926 MRC DATA 7. 99c16000 00001958
1795 02:53:01.319064 ROMSTG STCK 8. 99c15000 00001000
1796 02:53:01.322413 AFTER CAR 9. 99c0b000 0000a000
1797 02:53:01.325662 RAMSTAGE 10. 99baf000 0005c000
1798 02:53:01.329074 REFCODE 11. 99b7a000 00035000
1799 02:53:01.332393 SMM BACKUP 12. 99b6a000 00010000
1800 02:53:01.335564 COREBOOT 13. 99b62000 00008000
1801 02:53:01.338834 ACPI 14. 99b3e000 00024000
1802 02:53:01.342090 ACPI GNVS 15. 99b3d000 00001000
1803 02:53:01.345167 RAMOOPS 16. 99a3d000 00100000
1804 02:53:01.348492 TPM2 TCGLOG17. 99a2d000 00010000
1805 02:53:01.351620 SMBIOS 18. 99a2c000 00000800
1806 02:53:01.351711 IMD small region:
1807 02:53:01.358252 IMD ROOT 0. 99ffec00 00000400
1808 02:53:01.361433 FSP RUNTIME 1. 99ffebe0 00000004
1809 02:53:01.364691 EC HOSTEVENT 2. 99ffebc0 00000008
1810 02:53:01.368075 POWER STATE 3. 99ffeb80 00000040
1811 02:53:01.371202 ROMSTAGE 4. 99ffeb60 00000004
1812 02:53:01.374663 MEM INFO 5. 99ffe9a0 000001b9
1813 02:53:01.377916 MTRR: Physical address space:
1814 02:53:01.384379 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 02:53:01.390767 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 02:53:01.397483 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1817 02:53:01.400664 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1818 02:53:01.407512 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 02:53:01.413970 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 02:53:01.420363 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1821 02:53:01.423692 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 02:53:01.430514 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 02:53:01.433354 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 02:53:01.436894 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 02:53:01.440099 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 02:53:01.446504 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 02:53:01.449671 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 02:53:01.453013 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 02:53:01.456236 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 02:53:01.463011 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 02:53:01.466029 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 02:53:01.469450 call enable_fixed_mtrr()
1833 02:53:01.472609 CPU physical address size: 39 bits
1834 02:53:01.475884 MTRR: default type WB/UC MTRR counts: 6/8.
1835 02:53:01.479289 MTRR: WB selected as default type.
1836 02:53:01.485578 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1837 02:53:01.492227 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1838 02:53:01.498704 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1839 02:53:01.505041 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1840 02:53:01.511698 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1841 02:53:01.518309 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1842 02:53:01.521466 MTRR: Fixed MSR 0x250 0x0606060606060606
1843 02:53:01.528191 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 02:53:01.531290 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 02:53:01.534934 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 02:53:01.538062 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 02:53:01.544770 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 02:53:01.548035 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 02:53:01.551265 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 02:53:01.554223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 02:53:01.561197 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 02:53:01.564095 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 02:53:01.564183
1854 02:53:01.564251 MTRR check
1855 02:53:01.567600 Fixed MTRRs : Enabled
1856 02:53:01.570647 Variable MTRRs: Enabled
1857 02:53:01.570761
1858 02:53:01.574027 call enable_fixed_mtrr()
1859 02:53:01.577291 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 02:53:01.580617 CPU physical address size: 39 bits
1861 02:53:01.587228 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 02:53:01.590402 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 02:53:01.596912 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 02:53:01.600130 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 02:53:01.603341 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 02:53:01.606607 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 02:53:01.613174 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 02:53:01.616462 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 02:53:01.619558 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 02:53:01.623077 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 02:53:01.629870 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 02:53:01.632838 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 02:53:01.636034 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 02:53:01.642529 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 02:53:01.642614 call enable_fixed_mtrr()
1876 02:53:01.649411 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 02:53:01.652547 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 02:53:01.655634 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 02:53:01.659037 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 02:53:01.665418 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 02:53:01.669007 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 02:53:01.672277 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 02:53:01.675262 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 02:53:01.682116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 02:53:01.685150 CPU physical address size: 39 bits
1886 02:53:01.688397 call enable_fixed_mtrr()
1887 02:53:01.691765 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 02:53:01.694859 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 02:53:01.698191 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 02:53:01.705078 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 02:53:01.708398 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 02:53:01.711420 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 02:53:01.714794 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 02:53:01.721299 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 02:53:01.724532 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 02:53:01.727742 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 02:53:01.731036 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 02:53:01.737676 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 02:53:01.741045 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 02:53:01.744225 call enable_fixed_mtrr()
1901 02:53:01.747363 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 02:53:01.750776 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 02:53:01.754019 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 02:53:01.760603 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 02:53:01.763940 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 02:53:01.766881 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 02:53:01.770122 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 02:53:01.776574 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 02:53:01.779753 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 02:53:01.783060 CPU physical address size: 39 bits
1911 02:53:01.786523 call enable_fixed_mtrr()
1912 02:53:01.789491 CBFS @ c08000 size 3f8000
1913 02:53:01.796285 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1914 02:53:01.799501 CPU physical address size: 39 bits
1915 02:53:01.802764 CBFS: Locating 'fallback/payload'
1916 02:53:01.805995 CPU physical address size: 39 bits
1917 02:53:01.809177 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 02:53:01.812743 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 02:53:01.816097 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 02:53:01.822552 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 02:53:01.825735 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 02:53:01.828940 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 02:53:01.832442 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 02:53:01.839019 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 02:53:01.842173 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 02:53:01.845297 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 02:53:01.848649 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 02:53:01.855319 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 02:53:01.858257 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 02:53:01.861742 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 02:53:01.868324 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 02:53:01.871441 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 02:53:01.874757 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 02:53:01.877931 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 02:53:01.884342 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 02:53:01.887979 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 02:53:01.891020 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 02:53:01.894193 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 02:53:01.897866 call enable_fixed_mtrr()
1940 02:53:01.901158 call enable_fixed_mtrr()
1941 02:53:01.904495 CPU physical address size: 39 bits
1942 02:53:01.907765 CPU physical address size: 39 bits
1943 02:53:01.911050 CBFS: Found @ offset 1c96c0 size 3f798
1944 02:53:01.917411 Checking segment from ROM address 0xffdd16f8
1945 02:53:01.920731 Checking segment from ROM address 0xffdd1714
1946 02:53:01.924327 Loading segment from ROM address 0xffdd16f8
1947 02:53:01.927374 code (compression=0)
1948 02:53:01.937244 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1949 02:53:01.943692 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1950 02:53:01.946819 it's not compressed!
1951 02:53:02.039047 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1952 02:53:02.045872 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1953 02:53:02.048978 Loading segment from ROM address 0xffdd1714
1954 02:53:02.052237 Entry Point 0x30000000
1955 02:53:02.055545 Loaded segments
1956 02:53:02.061109 Finalizing chipset.
1957 02:53:02.064419 Finalizing SMM.
1958 02:53:02.067898 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1959 02:53:02.070859 mp_park_aps done after 0 msecs.
1960 02:53:02.077578 Jumping to boot code at 30000000(99b62000)
1961 02:53:02.084091 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1962 02:53:02.084211
1963 02:53:02.087258 Starting depthcharge on Helios...
1964 02:53:02.087722 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1965 02:53:02.087870 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1966 02:53:02.087991 Setting prompt string to ['hatch:']
1967 02:53:02.088105 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1968 02:53:02.097220 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1969 02:53:02.103762 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1970 02:53:02.110167 board_setup: Info: eMMC controller not present; skipping
1971 02:53:02.113650 New NVMe Controller 0x30053ac0 @ 00:1d:00
1972 02:53:02.120162 board_setup: Info: SDHCI controller not present; skipping
1973 02:53:02.126829 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1974 02:53:02.126948 Wipe memory regions:
1975 02:53:02.133316 [0x00000000001000, 0x000000000a0000)
1976 02:53:02.136659 [0x00000000100000, 0x00000030000000)
1977 02:53:02.200412 [0x00000030657430, 0x00000099a2c000)
1978 02:53:02.333887 [0x00000100000000, 0x0000045e800000)
1979 02:53:03.652603 R8152: Initializing
1980 02:53:03.655715 Version 9 (ocp_data = 6010)
1981 02:53:03.660006 R8152: Done initializing
1982 02:53:03.663522 Adding net device
1983 02:53:04.032968 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1984 02:53:04.033148
1985 02:53:04.033473 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1987 02:53:04.134258 hatch: tftpboot 192.168.201.1 6693637/tftp-deploy-gmtewm03/kernel/bzImage 6693637/tftp-deploy-gmtewm03/kernel/cmdline 6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
1988 02:53:04.134431 Setting prompt string to ['Starting kernel']
1989 02:53:04.134537 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1990 02:53:04.134640 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
1991 02:53:04.138654 tftpboot 192.168.201.1 6693637/tftp-deploy-gmtewm03/kernel/bzImoy-gmtewm03/kernel/cmdline 6693637/tftp-deploy-gmtewm03/ramdisk/ramdisk.cpio.gz
1992 02:53:04.138772 Waiting for link
1993 02:53:04.339847 done.
1994 02:53:04.340022 MAC: f4:f5:e8:50:e7:f3
1995 02:53:04.342650 Sending DHCP discover... done.
1996 02:53:04.346012 Waiting for reply... done.
1997 02:53:04.349184 Sending DHCP request... done.
1998 02:53:04.352651 Waiting for reply... done.
1999 02:53:04.355773 My ip is 192.168.201.16
2000 02:53:04.359044 The DHCP server ip is 192.168.201.1
2001 02:53:04.362323 TFTP server IP predefined by user: 192.168.201.1
2002 02:53:04.368951 Bootfile predefined by user: 6693637/tftp-deploy-gmtewm03/kernel/bzImage
2003 02:53:04.372182 Sending tftp read request... done.
2004 02:53:04.378823 Waiting for the transfer...
2005 02:53:04.661114 00000000 ################################################################
2006 02:53:04.934164 00080000 ################################################################
2007 02:53:05.197226 00100000 ################################################################
2008 02:53:05.430033 00180000 ################################################################
2009 02:53:05.672334 00200000 ################################################################
2010 02:53:05.926099 00280000 ################################################################
2011 02:53:06.184047 00300000 ################################################################
2012 02:53:06.463475 00380000 ################################################################
2013 02:53:06.738500 00400000 ################################################################
2014 02:53:07.016946 00480000 ################################################################
2015 02:53:07.291984 00500000 ################################################################
2016 02:53:07.575506 00580000 ################################################################
2017 02:53:07.842849 00600000 ################################################################
2018 02:53:08.083059 00680000 ################################################################
2019 02:53:08.308505 00700000 ################################################################
2020 02:53:08.556855 00780000 ################################################################
2021 02:53:08.843346 00800000 ################################################################
2022 02:53:08.866131 00880000 ###### done.
2023 02:53:08.869752 The bootfile was 8953856 bytes long.
2024 02:53:08.872677 Sending tftp read request... done.
2025 02:53:08.876065 Waiting for the transfer...
2026 02:53:09.152000 00000000 ################################################################
2027 02:53:09.400915 00080000 ################################################################
2028 02:53:09.657864 00100000 ################################################################
2029 02:53:09.911747 00180000 ################################################################
2030 02:53:10.175885 00200000 ################################################################
2031 02:53:10.465380 00280000 ################################################################
2032 02:53:10.758222 00300000 ################################################################
2033 02:53:11.053351 00380000 ################################################################
2034 02:53:11.354696 00400000 ################################################################
2035 02:53:11.622547 00480000 ################################################################
2036 02:53:11.906013 00500000 ################################################################
2037 02:53:12.173889 00580000 ################################################################
2038 02:53:12.447533 00600000 ################################################################
2039 02:53:12.740048 00680000 ################################################################
2040 02:53:13.031667 00700000 ################################################################
2041 02:53:13.317471 00780000 ################################################################
2042 02:53:13.424450 00800000 ####################### done.
2043 02:53:13.427563 Sending tftp read request... done.
2044 02:53:13.427660 Waiting for the transfer...
2045 02:53:13.430688 00000000 # done.
2046 02:53:13.440838 Command line loaded dynamically from TFTP file: 6693637/tftp-deploy-gmtewm03/kernel/cmdline
2047 02:53:13.456905 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2048 02:53:13.463400 ec_init(0): CrosEC protocol v3 supported (256, 256)
2049 02:53:13.470965 Shutting down all USB controllers.
2050 02:53:13.471271 Removing current net device
2051 02:53:13.475226 Finalizing coreboot
2052 02:53:13.481810 Exiting depthcharge with code 4 at timestamp: 18694068
2053 02:53:13.482303
2054 02:53:13.482627 Starting kernel ...
2055 02:53:13.482981
2056 02:53:13.483285
2057 02:53:13.484050 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2058 02:53:13.484495 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2059 02:53:13.484838 Setting prompt string to ['Linux version [0-9]']
2060 02:53:13.485163 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2061 02:53:13.485496 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2063 02:57:43.485343 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2065 02:57:43.486569 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2067 02:57:43.487528 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2070 02:57:43.488939 end: 2 depthcharge-action (duration 00:05:00) [common]
2072 02:57:43.490076 Cleaning after the job
2073 02:57:43.490572 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/ramdisk
2074 02:57:43.493759 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/kernel
2075 02:57:43.496980 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693637/tftp-deploy-gmtewm03/modules
2076 02:57:43.497959 start: 5.1 power-off (timeout 00:00:30) [common]
2077 02:57:43.498857 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2078 02:57:43.557778 >> Command sent successfully.
2079 02:57:43.560793 Returned 0 in 0 seconds
2080 02:57:43.662020 end: 5.1 power-off (duration 00:00:00) [common]
2082 02:57:43.663537 start: 5.2 read-feedback (timeout 00:10:00) [common]
2083 02:57:43.664649 Listened to connection for namespace 'common' for up to 1s
2084 02:57:44.667136 Finalising connection for namespace 'common'
2085 02:57:44.667794 Disconnecting from shell: Finalise
2086 02:57:44.768944 end: 5.2 read-feedback (duration 00:00:01) [common]
2087 02:57:44.769112 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6693637
2088 02:57:44.773950 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6693637
2089 02:57:44.774103 JobError: Your job cannot terminate cleanly.