Boot log: asus-cx9400-volteer

    1 02:52:52.598455  lava-dispatcher, installed at version: 2022.04
    2 02:52:52.598628  start: 0 validate
    3 02:52:52.598763  Start time: 2022-06-28 02:52:52.598755+00:00 (UTC)
    4 02:52:52.598882  Using caching service: 'http://localhost/cache/?uri=%s'
    5 02:52:52.599005  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220624.0%2Fx86%2Frootfs.cpio.gz exists
    6 02:52:52.886848  Using caching service: 'http://localhost/cache/?uri=%s'
    7 02:52:52.887018  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.249-cip76%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 02:52:53.179304  Using caching service: 'http://localhost/cache/?uri=%s'
    9 02:52:53.180010  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.249-cip76%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 02:52:53.482245  validate duration: 0.88
   12 02:52:53.483585  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 02:52:53.484181  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 02:52:53.484727  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 02:52:53.485292  Not decompressing ramdisk as can be used compressed.
   16 02:52:53.485801  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220624.0/x86/rootfs.cpio.gz
   17 02:52:53.486184  saving as /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/ramdisk/rootfs.cpio.gz
   18 02:52:53.486539  total size: 8415744 (8MB)
   19 02:52:53.492004  progress   0% (0MB)
   20 02:52:53.504014  progress   5% (0MB)
   21 02:52:53.511558  progress  10% (0MB)
   22 02:52:53.517058  progress  15% (1MB)
   23 02:52:53.521494  progress  20% (1MB)
   24 02:52:53.525359  progress  25% (2MB)
   25 02:52:53.528762  progress  30% (2MB)
   26 02:52:53.531614  progress  35% (2MB)
   27 02:52:53.534617  progress  40% (3MB)
   28 02:52:53.537256  progress  45% (3MB)
   29 02:52:53.539836  progress  50% (4MB)
   30 02:52:53.542186  progress  55% (4MB)
   31 02:52:53.544539  progress  60% (4MB)
   32 02:52:53.546516  progress  65% (5MB)
   33 02:52:53.548641  progress  70% (5MB)
   34 02:52:53.550773  progress  75% (6MB)
   35 02:52:53.552764  progress  80% (6MB)
   36 02:52:53.554811  progress  85% (6MB)
   37 02:52:53.556813  progress  90% (7MB)
   38 02:52:53.558777  progress  95% (7MB)
   39 02:52:53.560792  progress 100% (8MB)
   40 02:52:53.561059  8MB downloaded in 0.07s (107.69MB/s)
   41 02:52:53.561212  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 02:52:53.561456  end: 1.1 download-retry (duration 00:00:00) [common]
   44 02:52:53.561544  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 02:52:53.561670  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 02:52:53.561773  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.249-cip76/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 02:52:53.561840  saving as /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/kernel/bzImage
   48 02:52:53.561900  total size: 8953856 (8MB)
   49 02:52:53.561988  No compression specified
   50 02:52:56.069975  progress   0% (0MB)
   51 02:52:56.075106  progress   5% (0MB)
   52 02:52:56.077335  progress  10% (0MB)
   53 02:52:56.079372  progress  15% (1MB)
   54 02:52:56.081543  progress  20% (1MB)
   55 02:52:56.083755  progress  25% (2MB)
   56 02:52:56.085777  progress  30% (2MB)
   57 02:52:56.087952  progress  35% (3MB)
   58 02:52:56.090166  progress  40% (3MB)
   59 02:52:56.092186  progress  45% (3MB)
   60 02:52:56.094363  progress  50% (4MB)
   61 02:52:56.096506  progress  55% (4MB)
   62 02:52:56.098504  progress  60% (5MB)
   63 02:52:56.100689  progress  65% (5MB)
   64 02:52:56.102829  progress  70% (6MB)
   65 02:52:56.104819  progress  75% (6MB)
   66 02:52:56.106966  progress  80% (6MB)
   67 02:52:56.109098  progress  85% (7MB)
   68 02:52:56.111221  progress  90% (7MB)
   69 02:52:56.113367  progress  95% (8MB)
   70 02:52:56.115531  progress 100% (8MB)
   71 02:52:56.115712  8MB downloaded in 2.55s (3.34MB/s)
   72 02:52:56.115862  end: 1.2.1 http-download (duration 00:00:03) [common]
   74 02:52:56.116097  end: 1.2 download-retry (duration 00:00:03) [common]
   75 02:52:56.116184  start: 1.3 download-retry (timeout 00:09:57) [common]
   76 02:52:56.116268  start: 1.3.1 http-download (timeout 00:09:57) [common]
   77 02:52:56.116370  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.249-cip76/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 02:52:56.116438  saving as /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/modules/modules.tar
   79 02:52:56.116499  total size: 64932 (0MB)
   80 02:52:56.116559  Using unxz to decompress xz
   81 02:52:56.119788  progress  50% (0MB)
   82 02:52:56.120144  progress 100% (0MB)
   83 02:52:56.124230  0MB downloaded in 0.01s (8.02MB/s)
   84 02:52:56.124443  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 02:52:56.124699  end: 1.3 download-retry (duration 00:00:00) [common]
   87 02:52:56.124793  start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
   88 02:52:56.124887  start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
   89 02:52:56.124971  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 02:52:56.125055  start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
   91 02:52:56.125211  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1
   92 02:52:56.125319  makedir: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin
   93 02:52:56.125403  makedir: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/tests
   94 02:52:56.125482  makedir: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/results
   95 02:52:56.125611  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-add-keys
   96 02:52:56.125783  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-add-sources
   97 02:52:56.125898  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-background-process-start
   98 02:52:56.126008  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-background-process-stop
   99 02:52:56.126150  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-common-functions
  100 02:52:56.126259  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-echo-ipv4
  101 02:52:56.126369  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-install-packages
  102 02:52:56.126494  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-installed-packages
  103 02:52:56.126653  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-os-build
  104 02:52:56.126761  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-probe-channel
  105 02:52:56.126872  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-probe-ip
  106 02:52:56.126980  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-target-ip
  107 02:52:56.127088  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-target-mac
  108 02:52:56.127196  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-target-storage
  109 02:52:56.127307  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-case
  110 02:52:56.127415  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-event
  111 02:52:56.127523  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-feedback
  112 02:52:56.127631  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-raise
  113 02:52:56.127741  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-reference
  114 02:52:56.127849  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-runner
  115 02:52:56.127954  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-set
  116 02:52:56.128060  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-test-shell
  117 02:52:56.128168  Updating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-install-packages (oe)
  118 02:52:56.128281  Updating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/bin/lava-installed-packages (oe)
  119 02:52:56.128381  Creating /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/environment
  120 02:52:56.128468  LAVA metadata
  121 02:52:56.128538  - LAVA_JOB_ID=6693671
  122 02:52:56.128604  - LAVA_DISPATCHER_IP=192.168.201.1
  123 02:52:56.128703  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
  124 02:52:56.128768  skipped lava-vland-overlay
  125 02:52:56.128844  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 02:52:56.128928  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
  127 02:52:56.128990  skipped lava-multinode-overlay
  128 02:52:56.129064  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 02:52:56.129145  start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
  130 02:52:56.129218  Loading test definitions
  131 02:52:56.129315  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
  132 02:52:56.129390  Using /lava-6693671 at stage 0
  133 02:52:56.129709  uuid=6693671_1.4.2.3.1 testdef=None
  134 02:52:56.129806  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 02:52:56.129896  start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
  136 02:52:56.130403  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 02:52:56.130630  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
  139 02:52:56.131192  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 02:52:56.131431  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
  142 02:52:56.131961  runner path: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/0/tests/0_dmesg test_uuid 6693671_1.4.2.3.1
  143 02:52:56.132108  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 02:52:56.132338  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
  146 02:52:56.132411  Using /lava-6693671 at stage 1
  147 02:52:56.132650  uuid=6693671_1.4.2.3.5 testdef=None
  148 02:52:56.132740  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 02:52:56.132827  start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
  150 02:52:56.133261  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 02:52:56.133486  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
  153 02:52:56.134103  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 02:52:56.134337  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
  156 02:52:56.134877  runner path: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/1/tests/1_bootrr test_uuid 6693671_1.4.2.3.5
  157 02:52:56.135018  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 02:52:56.135263  Creating lava-test-runner.conf files
  160 02:52:56.135328  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/0 for stage 0
  161 02:52:56.135411  - 0_dmesg
  162 02:52:56.135491  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6693671/lava-overlay-705pe0m1/lava-6693671/1 for stage 1
  163 02:52:56.135573  - 1_bootrr
  164 02:52:56.135706  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 02:52:56.135820  start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
  166 02:52:56.142021  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 02:52:56.142128  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
  168 02:52:56.142219  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 02:52:56.142305  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 02:52:56.142400  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  171 02:52:56.322864  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 02:52:56.323197  start: 1.4.4 extract-modules (timeout 00:09:57) [common]
  173 02:52:56.323304  extracting modules file /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6693671/extract-overlay-ramdisk-bz_up0x0/ramdisk
  174 02:52:56.327437  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 02:52:56.327549  start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
  176 02:52:56.327632  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6693671/compress-overlay-mho1bi0o/overlay-1.4.2.4.tar.gz to ramdisk
  177 02:52:56.327705  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6693671/compress-overlay-mho1bi0o/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6693671/extract-overlay-ramdisk-bz_up0x0/ramdisk
  178 02:52:56.331428  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 02:52:56.331534  start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
  180 02:52:56.331624  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 02:52:56.331718  start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
  182 02:52:56.331796  Building ramdisk /var/lib/lava/dispatcher/tmp/6693671/extract-overlay-ramdisk-bz_up0x0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6693671/extract-overlay-ramdisk-bz_up0x0/ramdisk
  183 02:52:56.394695  >> 48236 blocks

  184 02:52:57.177958  rename /var/lib/lava/dispatcher/tmp/6693671/extract-overlay-ramdisk-bz_up0x0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
  185 02:52:57.178367  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 02:52:57.178491  start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
  187 02:52:57.178592  start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
  188 02:52:57.178684  No mkimage arch provided, not using FIT.
  189 02:52:57.178797  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 02:52:57.178887  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 02:52:57.178983  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 02:52:57.179079  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
  193 02:52:57.179158  No LXC device requested
  194 02:52:57.179239  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 02:52:57.179328  start: 1.6 deploy-device-env (timeout 00:09:56) [common]
  196 02:52:57.179408  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 02:52:57.179476  Checking files for TFTP limit of 4294967296 bytes.
  198 02:52:57.179850  end: 1 tftp-deploy (duration 00:00:04) [common]
  199 02:52:57.179955  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 02:52:57.180052  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 02:52:57.180178  substitutions:
  202 02:52:57.180248  - {DTB}: None
  203 02:52:57.180315  - {INITRD}: 6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
  204 02:52:57.180376  - {KERNEL}: 6693671/tftp-deploy-yabv7xgk/kernel/bzImage
  205 02:52:57.180435  - {LAVA_MAC}: None
  206 02:52:57.180492  - {PRESEED_CONFIG}: None
  207 02:52:57.180549  - {PRESEED_LOCAL}: None
  208 02:52:57.180606  - {RAMDISK}: 6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
  209 02:52:57.180662  - {ROOT_PART}: None
  210 02:52:57.180719  - {ROOT}: None
  211 02:52:57.180782  - {SERVER_IP}: 192.168.201.1
  212 02:52:57.180872  - {TEE}: None
  213 02:52:57.180943  Parsed boot commands:
  214 02:52:57.180998  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 02:52:57.181150  Parsed boot commands: tftpboot 192.168.201.1 6693671/tftp-deploy-yabv7xgk/kernel/bzImage 6693671/tftp-deploy-yabv7xgk/kernel/cmdline 6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
  216 02:52:57.181245  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 02:52:57.181335  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 02:52:57.181430  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 02:52:57.181517  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 02:52:57.181594  Not connected, no need to disconnect.
  221 02:52:57.181674  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 02:52:57.181761  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 02:52:57.181826  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
  224 02:52:57.184516  Setting prompt string to ['lava-test: # ']
  225 02:52:57.184823  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 02:52:57.184943  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 02:52:57.185039  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 02:52:57.185134  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 02:52:57.185317  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
  230 02:52:57.204118  >> Command sent successfully.

  231 02:52:57.206001  Returned 0 in 0 seconds
  232 02:52:57.306758  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 02:52:57.307323  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 02:52:57.307425  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 02:52:57.307512  Setting prompt string to 'Starting depthcharge on Voema...'
  237 02:52:57.307577  Changing prompt to 'Starting depthcharge on Voema...'
  238 02:52:57.307644  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 02:52:57.307907  [Enter `^Ec?' for help]
  240 02:53:04.937123  
  241 02:53:04.937291  
  242 02:53:04.946993  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  243 02:53:04.950325  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
  244 02:53:04.956676  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  245 02:53:04.960274  CPU: AES supported, TXT NOT supported, VT supported
  246 02:53:04.967128  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  247 02:53:04.973215  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  248 02:53:04.976523  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  249 02:53:04.980180  VBOOT: Loading verstage.
  250 02:53:04.983713  FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
  251 02:53:04.989888  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  252 02:53:04.993451  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  253 02:53:05.004143  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  254 02:53:05.010786  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  255 02:53:05.010870  
  256 02:53:05.010936  
  257 02:53:05.023871  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  258 02:53:05.037449  Probing TPM: . done!
  259 02:53:05.041241  TPM ready after 0 ms
  260 02:53:05.044190  Connected to device vid:did:rid of 1ae0:0028:00
  261 02:53:05.055911  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  262 02:53:05.062577  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  263 02:53:05.065628  Initialized TPM device CR50 revision 0
  264 02:53:05.114792  tlcl_send_startup: Startup return code is 0
  265 02:53:05.114900  TPM: setup succeeded
  266 02:53:05.130100  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  267 02:53:05.144339  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  268 02:53:05.157051  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  269 02:53:05.167291  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  270 02:53:05.171682  Chrome EC: UHEPI supported
  271 02:53:05.174769  Phase 1
  272 02:53:05.178022  FMAP: area GBB found @ 1805000 (458752 bytes)
  273 02:53:05.188307  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  274 02:53:05.194970  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  275 02:53:05.201650  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  276 02:53:05.208419  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  277 02:53:05.211194  Recovery requested (1009000e)
  278 02:53:05.215271  TPM: Extending digest for VBOOT: boot mode into PCR 0
  279 02:53:05.226007  tlcl_extend: response is 0
  280 02:53:05.232746  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  281 02:53:05.242572  tlcl_extend: response is 0
  282 02:53:05.249445  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  283 02:53:05.255825  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  284 02:53:05.262732  BS: verstage times (exec / console): total (unknown) / 142 ms
  285 02:53:05.262817  
  286 02:53:05.262883  
  287 02:53:05.275914  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  288 02:53:05.282562  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  289 02:53:05.285866  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  290 02:53:05.289415  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  291 02:53:05.295949  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  292 02:53:05.298981  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  293 02:53:05.302288  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  294 02:53:05.305515  TCO_STS:   0000 0000
  295 02:53:05.309128  GEN_PMCON: d0015038 00002200
  296 02:53:05.312196  GBLRST_CAUSE: 00000000 00000000
  297 02:53:05.312283  HPR_CAUSE0: 00000000
  298 02:53:05.315841  prev_sleep_state 5
  299 02:53:05.318994  Boot Count incremented to 7784
  300 02:53:05.326135  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  301 02:53:05.332656  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  302 02:53:05.338899  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  303 02:53:05.345614  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  304 02:53:05.350392  Chrome EC: UHEPI supported
  305 02:53:05.356937  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  306 02:53:05.369997  Probing TPM:  done!
  307 02:53:05.378179  Connected to device vid:did:rid of 1ae0:0028:00
  308 02:53:05.385076  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  309 02:53:05.394990  Initialized TPM device CR50 revision 0
  310 02:53:05.405192  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  311 02:53:05.411844  MRC: Hash idx 0x100b comparison successful.
  312 02:53:05.415162  MRC cache found, size faa8
  313 02:53:05.415564  bootmode is set to: 2
  314 02:53:05.418202  SPD index = 0
  315 02:53:05.424998  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  316 02:53:05.428293  SPD: module type is LPDDR4X
  317 02:53:05.432164  SPD: module part number is MT53E512M64D4NW-046
  318 02:53:05.438045  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
  319 02:53:05.441762  SPD: device width 16 bits, bus width 16 bits
  320 02:53:05.448125  SPD: module size is 1024 MB (per channel)
  321 02:53:05.880321  CBMEM:
  322 02:53:05.883843  IMD: root @ 0x76fff000 254 entries.
  323 02:53:05.886977  IMD: root @ 0x76ffec00 62 entries.
  324 02:53:05.890440  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  325 02:53:05.897160  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  326 02:53:05.900553  External stage cache:
  327 02:53:05.903850  IMD: root @ 0x7b3ff000 254 entries.
  328 02:53:05.907299  IMD: root @ 0x7b3fec00 62 entries.
  329 02:53:05.922161  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  330 02:53:05.928453  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  331 02:53:05.935783  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  332 02:53:05.949721  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  333 02:53:05.956203  cse_lite: Skip switching to RW in the recovery path
  334 02:53:05.956653  8 DIMMs found
  335 02:53:05.957012  SMM Memory Map
  336 02:53:05.960068  SMRAM       : 0x7b000000 0x800000
  337 02:53:05.963829   Subregion 0: 0x7b000000 0x200000
  338 02:53:05.967031   Subregion 1: 0x7b200000 0x200000
  339 02:53:05.970314   Subregion 2: 0x7b400000 0x400000
  340 02:53:05.973598  top_of_ram = 0x77000000
  341 02:53:05.980450  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  342 02:53:05.983727  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  343 02:53:05.990345  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  344 02:53:05.993562  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  345 02:53:06.003982  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  346 02:53:06.009782  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  347 02:53:06.020087  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  348 02:53:06.023486  Processing 211 relocs. Offset value of 0x74c0b000
  349 02:53:06.032808  BS: romstage times (exec / console): total (unknown) / 277 ms
  350 02:53:06.038153  
  351 02:53:06.038690  
  352 02:53:06.048187  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  353 02:53:06.051482  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  354 02:53:06.061152  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  355 02:53:06.068435  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  356 02:53:06.074711  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  357 02:53:06.081440  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  358 02:53:06.128371  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  359 02:53:06.134326  Processing 5008 relocs. Offset value of 0x75d98000
  360 02:53:06.141297  BS: postcar times (exec / console): total (unknown) / 59 ms
  361 02:53:06.141773  
  362 02:53:06.142133  
  363 02:53:06.151233  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  364 02:53:06.151553  Normal boot
  365 02:53:06.154661  FW_CONFIG value is 0x804c02
  366 02:53:06.157857  PCI: 00:07.0 disabled by fw_config
  367 02:53:06.160916  PCI: 00:07.1 disabled by fw_config
  368 02:53:06.163804  PCI: 00:0d.2 disabled by fw_config
  369 02:53:06.170877  PCI: 00:1c.7 disabled by fw_config
  370 02:53:06.174062  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  371 02:53:06.180543  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  372 02:53:06.184307  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  373 02:53:06.190649  GENERIC: 0.0 disabled by fw_config
  374 02:53:06.193778  GENERIC: 1.0 disabled by fw_config
  375 02:53:06.197331  fw_config match found: DB_USB=USB3_ACTIVE
  376 02:53:06.200560  fw_config match found: DB_USB=USB3_ACTIVE
  377 02:53:06.203683  fw_config match found: DB_USB=USB3_ACTIVE
  378 02:53:06.210664  fw_config match found: DB_USB=USB3_ACTIVE
  379 02:53:06.213867  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  380 02:53:06.220396  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  381 02:53:06.230559  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  382 02:53:06.237362  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  383 02:53:06.240261  microcode: sig=0x806c1 pf=0x80 revision=0x86
  384 02:53:06.246902  microcode: Update skipped, already up-to-date
  385 02:53:06.253516  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  386 02:53:06.281532  Detected 4 core, 8 thread CPU.
  387 02:53:06.284702  Setting up SMI for CPU
  388 02:53:06.287990  IED base = 0x7b400000
  389 02:53:06.288164  IED size = 0x00400000
  390 02:53:06.291051  Will perform SMM setup.
  391 02:53:06.298018  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
  392 02:53:06.304914  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  393 02:53:06.311250  Processing 16 relocs. Offset value of 0x00030000
  394 02:53:06.314755  Attempting to start 7 APs
  395 02:53:06.317789  Waiting for 10ms after sending INIT.
  396 02:53:06.333346  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  397 02:53:06.336587  AP: slot 4 apic_id 5.
  398 02:53:06.340585  AP: slot 5 apic_id 4.
  399 02:53:06.340883  AP: slot 2 apic_id 3.
  400 02:53:06.343272  AP: slot 6 apic_id 2.
  401 02:53:06.346838  AP: slot 3 apic_id 7.
  402 02:53:06.347183  AP: slot 7 apic_id 6.
  403 02:53:06.350039  done.
  404 02:53:06.353548  Waiting for 2nd SIPI to complete...done.
  405 02:53:06.360127  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  406 02:53:06.366443  Processing 13 relocs. Offset value of 0x00038000
  407 02:53:06.370108  Unable to locate Global NVS
  408 02:53:06.376688  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  409 02:53:06.379824  Installing permanent SMM handler to 0x7b000000
  410 02:53:06.389828  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  411 02:53:06.393268  Processing 794 relocs. Offset value of 0x7b010000
  412 02:53:06.403140  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  413 02:53:06.406450  Processing 13 relocs. Offset value of 0x7b008000
  414 02:53:06.413306  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  415 02:53:06.419828  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  416 02:53:06.426410  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  417 02:53:06.430098  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  418 02:53:06.436267  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  419 02:53:06.442926  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  420 02:53:06.449532  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  421 02:53:06.453036  Unable to locate Global NVS
  422 02:53:06.459437  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  423 02:53:06.462566  Clearing SMI status registers
  424 02:53:06.466249  SMI_STS: PM1 
  425 02:53:06.466791  PM1_STS: PWRBTN 
  426 02:53:06.472631  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  427 02:53:06.476574  In relocation handler: CPU 0
  428 02:53:06.479380  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  429 02:53:06.486101  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  430 02:53:06.489484  Relocation complete.
  431 02:53:06.496013  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  432 02:53:06.499560  In relocation handler: CPU 1
  433 02:53:06.502790  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  434 02:53:06.503340  Relocation complete.
  435 02:53:06.512591  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  436 02:53:06.515966  In relocation handler: CPU 5
  437 02:53:06.519275  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  438 02:53:06.522906  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  439 02:53:06.526311  Relocation complete.
  440 02:53:06.532858  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  441 02:53:06.536182  In relocation handler: CPU 4
  442 02:53:06.539283  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  443 02:53:06.542729  Relocation complete.
  444 02:53:06.549050  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  445 02:53:06.552541  In relocation handler: CPU 2
  446 02:53:06.555756  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  447 02:53:06.558903  Relocation complete.
  448 02:53:06.565999  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  449 02:53:06.569060  In relocation handler: CPU 6
  450 02:53:06.572142  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  451 02:53:06.579076  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  452 02:53:06.579622  Relocation complete.
  453 02:53:06.585536  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  454 02:53:06.589679  In relocation handler: CPU 7
  455 02:53:06.595527  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  456 02:53:06.598847  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  457 02:53:06.602653  Relocation complete.
  458 02:53:06.609042  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  459 02:53:06.612325  In relocation handler: CPU 3
  460 02:53:06.615716  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  461 02:53:06.619101  Relocation complete.
  462 02:53:06.619652  Initializing CPU #0
  463 02:53:06.622840  CPU: vendor Intel device 806c1
  464 02:53:06.626534  CPU: family 06, model 8c, stepping 01
  465 02:53:06.629494  Clearing out pending MCEs
  466 02:53:06.632802  Setting up local APIC...
  467 02:53:06.636120   apic_id: 0x00 done.
  468 02:53:06.636708  Turbo is available but hidden
  469 02:53:06.640007  Turbo is available and visible
  470 02:53:06.645801  microcode: Update skipped, already up-to-date
  471 02:53:06.646340  CPU #0 initialized
  472 02:53:06.649486  Initializing CPU #3
  473 02:53:06.652621  Initializing CPU #7
  474 02:53:06.655777  CPU: vendor Intel device 806c1
  475 02:53:06.659426  CPU: family 06, model 8c, stepping 01
  476 02:53:06.662750  CPU: vendor Intel device 806c1
  477 02:53:06.666007  CPU: family 06, model 8c, stepping 01
  478 02:53:06.669047  Clearing out pending MCEs
  479 02:53:06.669614  Clearing out pending MCEs
  480 02:53:06.672548  Setting up local APIC...
  481 02:53:06.675715  Initializing CPU #6
  482 02:53:06.676161  Initializing CPU #2
  483 02:53:06.679107  CPU: vendor Intel device 806c1
  484 02:53:06.685998  CPU: family 06, model 8c, stepping 01
  485 02:53:06.686553  Initializing CPU #4
  486 02:53:06.689275  Initializing CPU #5
  487 02:53:06.689750  Initializing CPU #1
  488 02:53:06.692390  Clearing out pending MCEs
  489 02:53:06.696310  Setting up local APIC...
  490 02:53:06.699479  CPU: vendor Intel device 806c1
  491 02:53:06.702128  CPU: family 06, model 8c, stepping 01
  492 02:53:06.705915  CPU: vendor Intel device 806c1
  493 02:53:06.709277  CPU: family 06, model 8c, stepping 01
  494 02:53:06.712382  Clearing out pending MCEs
  495 02:53:06.715689  Clearing out pending MCEs
  496 02:53:06.716243  Setting up local APIC...
  497 02:53:06.719214   apic_id: 0x07 done.
  498 02:53:06.722323   apic_id: 0x06 done.
  499 02:53:06.722875   apic_id: 0x05 done.
  500 02:53:06.725505  Setting up local APIC...
  501 02:53:06.728750  Setting up local APIC...
  502 02:53:06.732159  microcode: Update skipped, already up-to-date
  503 02:53:06.738760  microcode: Update skipped, already up-to-date
  504 02:53:06.739316  CPU #7 initialized
  505 02:53:06.742193  CPU #3 initialized
  506 02:53:06.745527  microcode: Update skipped, already up-to-date
  507 02:53:06.749466   apic_id: 0x04 done.
  508 02:53:06.752156  CPU #4 initialized
  509 02:53:06.755251  microcode: Update skipped, already up-to-date
  510 02:53:06.758821  CPU: vendor Intel device 806c1
  511 02:53:06.761837  CPU: family 06, model 8c, stepping 01
  512 02:53:06.765350   apic_id: 0x02 done.
  513 02:53:06.765817  Clearing out pending MCEs
  514 02:53:06.768737  CPU #5 initialized
  515 02:53:06.771717  microcode: Update skipped, already up-to-date
  516 02:53:06.775414  Setting up local APIC...
  517 02:53:06.778533  CPU: vendor Intel device 806c1
  518 02:53:06.781740  CPU: family 06, model 8c, stepping 01
  519 02:53:06.785494   apic_id: 0x03 done.
  520 02:53:06.788340  CPU #6 initialized
  521 02:53:06.791915  microcode: Update skipped, already up-to-date
  522 02:53:06.795212  Clearing out pending MCEs
  523 02:53:06.795665  CPU #2 initialized
  524 02:53:06.798240  Setting up local APIC...
  525 02:53:06.801727   apic_id: 0x01 done.
  526 02:53:06.805491  microcode: Update skipped, already up-to-date
  527 02:53:06.808487  CPU #1 initialized
  528 02:53:06.811926  bsp_do_flight_plan done after 455 msecs.
  529 02:53:06.815310  CPU: frequency set to 4000 MHz
  530 02:53:06.815865  Enabling SMIs.
  531 02:53:06.821474  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  532 02:53:06.838828  SATAXPCIE1 indicates PCIe NVMe is present
  533 02:53:06.842442  Probing TPM:  done!
  534 02:53:06.845365  Connected to device vid:did:rid of 1ae0:0028:00
  535 02:53:06.855905  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  536 02:53:06.859242  Initialized TPM device CR50 revision 0
  537 02:53:06.862462  Enabling S0i3.4
  538 02:53:06.869345  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  539 02:53:06.872923  Found a VBT of 8704 bytes after decompression
  540 02:53:06.879429  cse_lite: CSE RO boot. HybridStorageMode disabled
  541 02:53:06.886177  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  542 02:53:06.962728  FSPS returned 0
  543 02:53:06.965326  Executing Phase 1 of FspMultiPhaseSiInit
  544 02:53:06.975703  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  545 02:53:06.978680  port C0 DISC req: usage 1 usb3 1 usb2 5
  546 02:53:06.982594  Raw Buffer output 0 00000511
  547 02:53:06.985740  Raw Buffer output 1 00000000
  548 02:53:06.989149  pmc_send_ipc_cmd succeeded
  549 02:53:06.995815  port C1 DISC req: usage 1 usb3 2 usb2 3
  550 02:53:06.996353  Raw Buffer output 0 00000321
  551 02:53:06.998954  Raw Buffer output 1 00000000
  552 02:53:07.003282  pmc_send_ipc_cmd succeeded
  553 02:53:07.008428  Detected 4 core, 8 thread CPU.
  554 02:53:07.011552  Detected 4 core, 8 thread CPU.
  555 02:53:07.247024  Display FSP Version Info HOB
  556 02:53:07.249749  Reference Code - CPU = a.0.4c.31
  557 02:53:07.252977  uCode Version = 0.0.0.86
  558 02:53:07.256542  TXT ACM version = ff.ff.ff.ffff
  559 02:53:07.259499  Reference Code - ME = a.0.4c.31
  560 02:53:07.262850  MEBx version = 0.0.0.0
  561 02:53:07.265871  ME Firmware Version = Consumer SKU
  562 02:53:07.269552  Reference Code - PCH = a.0.4c.31
  563 02:53:07.272776  PCH-CRID Status = Disabled
  564 02:53:07.276708  PCH-CRID Original Value = ff.ff.ff.ffff
  565 02:53:07.279452  PCH-CRID New Value = ff.ff.ff.ffff
  566 02:53:07.282863  OPROM - RST - RAID = ff.ff.ff.ffff
  567 02:53:07.286276  PCH Hsio Version = 4.0.0.0
  568 02:53:07.289675  Reference Code - SA - System Agent = a.0.4c.31
  569 02:53:07.293108  Reference Code - MRC = 2.0.0.1
  570 02:53:07.295995  SA - PCIe Version = a.0.4c.31
  571 02:53:07.299522  SA-CRID Status = Disabled
  572 02:53:07.302762  SA-CRID Original Value = 0.0.0.1
  573 02:53:07.306211  SA-CRID New Value = 0.0.0.1
  574 02:53:07.309912  OPROM - VBIOS = ff.ff.ff.ffff
  575 02:53:07.312700  IO Manageability Engine FW Version = 11.1.4.0
  576 02:53:07.316093  PHY Build Version = 0.0.0.e0
  577 02:53:07.319773  Thunderbolt(TM) FW Version = 0.0.0.0
  578 02:53:07.326039  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  579 02:53:07.329711  ITSS IRQ Polarities Before:
  580 02:53:07.330266  IPC0: 0xffffffff
  581 02:53:07.332698  IPC1: 0xffffffff
  582 02:53:07.333142  IPC2: 0xffffffff
  583 02:53:07.335879  IPC3: 0xffffffff
  584 02:53:07.339081  ITSS IRQ Polarities After:
  585 02:53:07.339164  IPC0: 0xffffffff
  586 02:53:07.341995  IPC1: 0xffffffff
  587 02:53:07.342078  IPC2: 0xffffffff
  588 02:53:07.345544  IPC3: 0xffffffff
  589 02:53:07.349170  Found PCIe Root Port #9 at PCI: 00:1d.0.
  590 02:53:07.362558  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  591 02:53:07.372631  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  592 02:53:07.385829  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  593 02:53:07.392073  BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
  594 02:53:07.392391  Enumerating buses...
  595 02:53:07.398997  Show all devs... Before device enumeration.
  596 02:53:07.402549  Root Device: enabled 1
  597 02:53:07.403025  DOMAIN: 0000: enabled 1
  598 02:53:07.405719  CPU_CLUSTER: 0: enabled 1
  599 02:53:07.408914  PCI: 00:00.0: enabled 1
  600 02:53:07.412073  PCI: 00:02.0: enabled 1
  601 02:53:07.412514  PCI: 00:04.0: enabled 1
  602 02:53:07.415347  PCI: 00:05.0: enabled 1
  603 02:53:07.419264  PCI: 00:06.0: enabled 0
  604 02:53:07.419803  PCI: 00:07.0: enabled 0
  605 02:53:07.422042  PCI: 00:07.1: enabled 0
  606 02:53:07.425560  PCI: 00:07.2: enabled 0
  607 02:53:07.429018  PCI: 00:07.3: enabled 0
  608 02:53:07.429562  PCI: 00:08.0: enabled 1
  609 02:53:07.432164  PCI: 00:09.0: enabled 0
  610 02:53:07.435881  PCI: 00:0a.0: enabled 0
  611 02:53:07.439014  PCI: 00:0d.0: enabled 1
  612 02:53:07.439561  PCI: 00:0d.1: enabled 0
  613 02:53:07.442627  PCI: 00:0d.2: enabled 0
  614 02:53:07.445947  PCI: 00:0d.3: enabled 0
  615 02:53:07.449341  PCI: 00:0e.0: enabled 0
  616 02:53:07.449914  PCI: 00:10.2: enabled 1
  617 02:53:07.452363  PCI: 00:10.6: enabled 0
  618 02:53:07.455889  PCI: 00:10.7: enabled 0
  619 02:53:07.456429  PCI: 00:12.0: enabled 0
  620 02:53:07.458750  PCI: 00:12.6: enabled 0
  621 02:53:07.462039  PCI: 00:13.0: enabled 0
  622 02:53:07.465460  PCI: 00:14.0: enabled 1
  623 02:53:07.466032  PCI: 00:14.1: enabled 0
  624 02:53:07.468730  PCI: 00:14.2: enabled 1
  625 02:53:07.472198  PCI: 00:14.3: enabled 1
  626 02:53:07.475479  PCI: 00:15.0: enabled 1
  627 02:53:07.475918  PCI: 00:15.1: enabled 1
  628 02:53:07.478825  PCI: 00:15.2: enabled 1
  629 02:53:07.482070  PCI: 00:15.3: enabled 1
  630 02:53:07.485776  PCI: 00:16.0: enabled 1
  631 02:53:07.486324  PCI: 00:16.1: enabled 0
  632 02:53:07.488999  PCI: 00:16.2: enabled 0
  633 02:53:07.492214  PCI: 00:16.3: enabled 0
  634 02:53:07.495174  PCI: 00:16.4: enabled 0
  635 02:53:07.495611  PCI: 00:16.5: enabled 0
  636 02:53:07.499130  PCI: 00:17.0: enabled 1
  637 02:53:07.501829  PCI: 00:19.0: enabled 0
  638 02:53:07.502266  PCI: 00:19.1: enabled 1
  639 02:53:07.505675  PCI: 00:19.2: enabled 0
  640 02:53:07.508485  PCI: 00:1c.0: enabled 1
  641 02:53:07.511657  PCI: 00:1c.1: enabled 0
  642 02:53:07.512097  PCI: 00:1c.2: enabled 0
  643 02:53:07.515746  PCI: 00:1c.3: enabled 0
  644 02:53:07.518885  PCI: 00:1c.4: enabled 0
  645 02:53:07.521757  PCI: 00:1c.5: enabled 0
  646 02:53:07.522196  PCI: 00:1c.6: enabled 1
  647 02:53:07.525847  PCI: 00:1c.7: enabled 0
  648 02:53:07.528742  PCI: 00:1d.0: enabled 1
  649 02:53:07.532168  PCI: 00:1d.1: enabled 0
  650 02:53:07.532603  PCI: 00:1d.2: enabled 1
  651 02:53:07.535387  PCI: 00:1d.3: enabled 0
  652 02:53:07.539086  PCI: 00:1e.0: enabled 1
  653 02:53:07.539630  PCI: 00:1e.1: enabled 0
  654 02:53:07.541991  PCI: 00:1e.2: enabled 1
  655 02:53:07.545272  PCI: 00:1e.3: enabled 1
  656 02:53:07.548659  PCI: 00:1f.0: enabled 1
  657 02:53:07.549197  PCI: 00:1f.1: enabled 0
  658 02:53:07.551786  PCI: 00:1f.2: enabled 1
  659 02:53:07.555603  PCI: 00:1f.3: enabled 1
  660 02:53:07.558697  PCI: 00:1f.4: enabled 0
  661 02:53:07.559251  PCI: 00:1f.5: enabled 1
  662 02:53:07.562088  PCI: 00:1f.6: enabled 0
  663 02:53:07.564969  PCI: 00:1f.7: enabled 0
  664 02:53:07.565508  APIC: 00: enabled 1
  665 02:53:07.568382  GENERIC: 0.0: enabled 1
  666 02:53:07.571981  GENERIC: 0.0: enabled 1
  667 02:53:07.574945  GENERIC: 1.0: enabled 1
  668 02:53:07.575426  GENERIC: 0.0: enabled 1
  669 02:53:07.578368  GENERIC: 1.0: enabled 1
  670 02:53:07.581824  USB0 port 0: enabled 1
  671 02:53:07.585011  GENERIC: 0.0: enabled 1
  672 02:53:07.585551  USB0 port 0: enabled 1
  673 02:53:07.588922  GENERIC: 0.0: enabled 1
  674 02:53:07.591525  I2C: 00:1a: enabled 1
  675 02:53:07.591964  I2C: 00:31: enabled 1
  676 02:53:07.595276  I2C: 00:32: enabled 1
  677 02:53:07.598432  I2C: 00:10: enabled 1
  678 02:53:07.598975  I2C: 00:15: enabled 1
  679 02:53:07.601890  GENERIC: 0.0: enabled 0
  680 02:53:07.605156  GENERIC: 1.0: enabled 0
  681 02:53:07.608369  GENERIC: 0.0: enabled 1
  682 02:53:07.608913  SPI: 00: enabled 1
  683 02:53:07.611956  SPI: 00: enabled 1
  684 02:53:07.612637  PNP: 0c09.0: enabled 1
  685 02:53:07.614746  GENERIC: 0.0: enabled 1
  686 02:53:07.618339  USB3 port 0: enabled 1
  687 02:53:07.621529  USB3 port 1: enabled 1
  688 02:53:07.622094  USB3 port 2: enabled 0
  689 02:53:07.624784  USB3 port 3: enabled 0
  690 02:53:07.628286  USB2 port 0: enabled 0
  691 02:53:07.628726  USB2 port 1: enabled 1
  692 02:53:07.631339  USB2 port 2: enabled 1
  693 02:53:07.635037  USB2 port 3: enabled 0
  694 02:53:07.638479  USB2 port 4: enabled 1
  695 02:53:07.639018  USB2 port 5: enabled 0
  696 02:53:07.641674  USB2 port 6: enabled 0
  697 02:53:07.645276  USB2 port 7: enabled 0
  698 02:53:07.645852  USB2 port 8: enabled 0
  699 02:53:07.648340  USB2 port 9: enabled 0
  700 02:53:07.651913  USB3 port 0: enabled 0
  701 02:53:07.655018  USB3 port 1: enabled 1
  702 02:53:07.655556  USB3 port 2: enabled 0
  703 02:53:07.658384  USB3 port 3: enabled 0
  704 02:53:07.661363  GENERIC: 0.0: enabled 1
  705 02:53:07.661847  GENERIC: 1.0: enabled 1
  706 02:53:07.664555  APIC: 01: enabled 1
  707 02:53:07.667815  APIC: 03: enabled 1
  708 02:53:07.668253  APIC: 07: enabled 1
  709 02:53:07.671456  APIC: 05: enabled 1
  710 02:53:07.671894  APIC: 04: enabled 1
  711 02:53:07.674698  APIC: 02: enabled 1
  712 02:53:07.678228  APIC: 06: enabled 1
  713 02:53:07.678666  Compare with tree...
  714 02:53:07.681495  Root Device: enabled 1
  715 02:53:07.684902   DOMAIN: 0000: enabled 1
  716 02:53:07.688182    PCI: 00:00.0: enabled 1
  717 02:53:07.688723    PCI: 00:02.0: enabled 1
  718 02:53:07.691219    PCI: 00:04.0: enabled 1
  719 02:53:07.694793     GENERIC: 0.0: enabled 1
  720 02:53:07.698170    PCI: 00:05.0: enabled 1
  721 02:53:07.701320    PCI: 00:06.0: enabled 0
  722 02:53:07.701790    PCI: 00:07.0: enabled 0
  723 02:53:07.704548     GENERIC: 0.0: enabled 1
  724 02:53:07.707685    PCI: 00:07.1: enabled 0
  725 02:53:07.711293     GENERIC: 1.0: enabled 1
  726 02:53:07.714589    PCI: 00:07.2: enabled 0
  727 02:53:07.717707     GENERIC: 0.0: enabled 1
  728 02:53:07.718147    PCI: 00:07.3: enabled 0
  729 02:53:07.721293     GENERIC: 1.0: enabled 1
  730 02:53:07.724291    PCI: 00:08.0: enabled 1
  731 02:53:07.728460    PCI: 00:09.0: enabled 0
  732 02:53:07.731745    PCI: 00:0a.0: enabled 0
  733 02:53:07.732286    PCI: 00:0d.0: enabled 1
  734 02:53:07.734180     USB0 port 0: enabled 1
  735 02:53:07.738222      USB3 port 0: enabled 1
  736 02:53:07.741203      USB3 port 1: enabled 1
  737 02:53:07.744516      USB3 port 2: enabled 0
  738 02:53:07.745063      USB3 port 3: enabled 0
  739 02:53:07.747900    PCI: 00:0d.1: enabled 0
  740 02:53:07.751189    PCI: 00:0d.2: enabled 0
  741 02:53:07.754474     GENERIC: 0.0: enabled 1
  742 02:53:07.757791    PCI: 00:0d.3: enabled 0
  743 02:53:07.758334    PCI: 00:0e.0: enabled 0
  744 02:53:07.761058    PCI: 00:10.2: enabled 1
  745 02:53:07.764766    PCI: 00:10.6: enabled 0
  746 02:53:07.767575    PCI: 00:10.7: enabled 0
  747 02:53:07.771469    PCI: 00:12.0: enabled 0
  748 02:53:07.772030    PCI: 00:12.6: enabled 0
  749 02:53:07.774157    PCI: 00:13.0: enabled 0
  750 02:53:07.777796    PCI: 00:14.0: enabled 1
  751 02:53:07.780964     USB0 port 0: enabled 1
  752 02:53:07.784631      USB2 port 0: enabled 0
  753 02:53:07.785168      USB2 port 1: enabled 1
  754 02:53:07.788065      USB2 port 2: enabled 1
  755 02:53:07.790952      USB2 port 3: enabled 0
  756 02:53:07.793915      USB2 port 4: enabled 1
  757 02:53:07.797950      USB2 port 5: enabled 0
  758 02:53:07.800882      USB2 port 6: enabled 0
  759 02:53:07.801440      USB2 port 7: enabled 0
  760 02:53:07.803954      USB2 port 8: enabled 0
  761 02:53:07.807547      USB2 port 9: enabled 0
  762 02:53:07.810627      USB3 port 0: enabled 0
  763 02:53:07.813876      USB3 port 1: enabled 1
  764 02:53:07.814315      USB3 port 2: enabled 0
  765 02:53:07.817400      USB3 port 3: enabled 0
  766 02:53:07.821021    PCI: 00:14.1: enabled 0
  767 02:53:07.824267    PCI: 00:14.2: enabled 1
  768 02:53:07.827205    PCI: 00:14.3: enabled 1
  769 02:53:07.830521     GENERIC: 0.0: enabled 1
  770 02:53:07.831076    PCI: 00:15.0: enabled 1
  771 02:53:07.834348     I2C: 00:1a: enabled 1
  772 02:53:07.837680     I2C: 00:31: enabled 1
  773 02:53:07.841024     I2C: 00:32: enabled 1
  774 02:53:07.841596    PCI: 00:15.1: enabled 1
  775 02:53:07.844816     I2C: 00:10: enabled 1
  776 02:53:07.847498    PCI: 00:15.2: enabled 1
  777 02:53:07.850786    PCI: 00:15.3: enabled 1
  778 02:53:07.853986    PCI: 00:16.0: enabled 1
  779 02:53:07.854526    PCI: 00:16.1: enabled 0
  780 02:53:07.857135    PCI: 00:16.2: enabled 0
  781 02:53:07.860659    PCI: 00:16.3: enabled 0
  782 02:53:07.864019    PCI: 00:16.4: enabled 0
  783 02:53:07.864483    PCI: 00:16.5: enabled 0
  784 02:53:07.867230    PCI: 00:17.0: enabled 1
  785 02:53:07.871749    PCI: 00:19.0: enabled 0
  786 02:53:07.874905    PCI: 00:19.1: enabled 1
  787 02:53:07.875376     I2C: 00:15: enabled 1
  788 02:53:07.878242    PCI: 00:19.2: enabled 0
  789 02:53:07.881176    PCI: 00:1d.0: enabled 1
  790 02:53:07.885236     GENERIC: 0.0: enabled 1
  791 02:53:07.888323    PCI: 00:1e.0: enabled 1
  792 02:53:07.888867    PCI: 00:1e.1: enabled 0
  793 02:53:07.891299    PCI: 00:1e.2: enabled 1
  794 02:53:07.894584     SPI: 00: enabled 1
  795 02:53:07.898104    PCI: 00:1e.3: enabled 1
  796 02:53:07.898541     SPI: 00: enabled 1
  797 02:53:07.901602    PCI: 00:1f.0: enabled 1
  798 02:53:07.953436     PNP: 0c09.0: enabled 1
  799 02:53:07.954074    PCI: 00:1f.1: enabled 0
  800 02:53:07.954466    PCI: 00:1f.2: enabled 1
  801 02:53:07.954829     GENERIC: 0.0: enabled 1
  802 02:53:07.955175      GENERIC: 0.0: enabled 1
  803 02:53:07.955510      GENERIC: 1.0: enabled 1
  804 02:53:07.955838    PCI: 00:1f.3: enabled 1
  805 02:53:07.956560    PCI: 00:1f.4: enabled 0
  806 02:53:07.956933    PCI: 00:1f.5: enabled 1
  807 02:53:07.957269    PCI: 00:1f.6: enabled 0
  808 02:53:07.957615    PCI: 00:1f.7: enabled 0
  809 02:53:07.957942   CPU_CLUSTER: 0: enabled 1
  810 02:53:07.958261    APIC: 00: enabled 1
  811 02:53:07.958572    APIC: 01: enabled 1
  812 02:53:07.958885    APIC: 03: enabled 1
  813 02:53:07.959195    APIC: 07: enabled 1
  814 02:53:07.959504    APIC: 05: enabled 1
  815 02:53:07.959809    APIC: 04: enabled 1
  816 02:53:07.960119    APIC: 02: enabled 1
  817 02:53:07.960432    APIC: 06: enabled 1
  818 02:53:08.003677  Root Device scanning...
  819 02:53:08.004341  scan_static_bus for Root Device
  820 02:53:08.004737  DOMAIN: 0000 enabled
  821 02:53:08.005100  CPU_CLUSTER: 0 enabled
  822 02:53:08.005448  DOMAIN: 0000 scanning...
  823 02:53:08.006201  PCI: pci_scan_bus for bus 00
  824 02:53:08.006548  PCI: 00:00.0 [8086/0000] ops
  825 02:53:08.006891  PCI: 00:00.0 [8086/9a12] enabled
  826 02:53:08.007227  PCI: 00:02.0 [8086/0000] bus ops
  827 02:53:08.007555  PCI: 00:02.0 [8086/9a40] enabled
  828 02:53:08.007911  PCI: 00:04.0 [8086/0000] bus ops
  829 02:53:08.008250  PCI: 00:04.0 [8086/9a03] enabled
  830 02:53:08.008642  PCI: 00:05.0 [8086/9a19] enabled
  831 02:53:08.009019  PCI: 00:07.0 [0000/0000] hidden
  832 02:53:08.009383  PCI: 00:08.0 [8086/9a11] enabled
  833 02:53:08.009749  PCI: 00:0a.0 [8086/9a0d] disabled
  834 02:53:08.053960  PCI: 00:0d.0 [8086/0000] bus ops
  835 02:53:08.054559  PCI: 00:0d.0 [8086/9a13] enabled
  836 02:53:08.054948  PCI: 00:14.0 [8086/0000] bus ops
  837 02:53:08.055305  PCI: 00:14.0 [8086/a0ed] enabled
  838 02:53:08.056088  PCI: 00:14.2 [8086/a0ef] enabled
  839 02:53:08.056483  PCI: 00:14.3 [8086/0000] bus ops
  840 02:53:08.056825  PCI: 00:14.3 [8086/a0f0] enabled
  841 02:53:08.057154  PCI: 00:15.0 [8086/0000] bus ops
  842 02:53:08.057484  PCI: 00:15.0 [8086/a0e8] enabled
  843 02:53:08.057849  PCI: 00:15.1 [8086/0000] bus ops
  844 02:53:08.058174  PCI: 00:15.1 [8086/a0e9] enabled
  845 02:53:08.058491  PCI: 00:15.2 [8086/0000] bus ops
  846 02:53:08.058807  PCI: 00:15.2 [8086/a0ea] enabled
  847 02:53:08.059492  PCI: 00:15.3 [8086/0000] bus ops
  848 02:53:08.059847  PCI: 00:15.3 [8086/a0eb] enabled
  849 02:53:08.092725  PCI: 00:16.0 [8086/0000] ops
  850 02:53:08.093387  PCI: 00:16.0 [8086/a0e0] enabled
  851 02:53:08.093912  PCI: Static device PCI: 00:17.0 not found, disabling it.
  852 02:53:08.094295  PCI: 00:19.0 [8086/0000] bus ops
  853 02:53:08.095052  PCI: 00:19.0 [8086/a0c5] disabled
  854 02:53:08.095477  PCI: 00:19.1 [8086/0000] bus ops
  855 02:53:08.095867  PCI: 00:19.1 [8086/a0c6] enabled
  856 02:53:08.096250  PCI: 00:1d.0 [8086/0000] bus ops
  857 02:53:08.096627  PCI: 00:1d.0 [8086/a0b0] enabled
  858 02:53:08.097004  PCI: 00:1e.0 [8086/0000] ops
  859 02:53:08.097374  PCI: 00:1e.0 [8086/a0a8] enabled
  860 02:53:08.098164  PCI: 00:1e.2 [8086/0000] bus ops
  861 02:53:08.098560  PCI: 00:1e.2 [8086/a0aa] enabled
  862 02:53:08.100180  PCI: 00:1e.3 [8086/0000] bus ops
  863 02:53:08.103561  PCI: 00:1e.3 [8086/a0ab] enabled
  864 02:53:08.106974  PCI: 00:1f.0 [8086/0000] bus ops
  865 02:53:08.110114  PCI: 00:1f.0 [8086/a087] enabled
  866 02:53:08.113676  RTC Init
  867 02:53:08.116956  Set power on after power failure.
  868 02:53:08.117546  Disabling Deep S3
  869 02:53:08.120244  Disabling Deep S3
  870 02:53:08.120844  Disabling Deep S4
  871 02:53:08.123912  Disabling Deep S4
  872 02:53:08.126958  Disabling Deep S5
  873 02:53:08.127471  Disabling Deep S5
  874 02:53:08.129677  PCI: 00:1f.2 [0000/0000] hidden
  875 02:53:08.133489  PCI: 00:1f.3 [8086/0000] bus ops
  876 02:53:08.136427  PCI: 00:1f.3 [8086/a0c8] enabled
  877 02:53:08.139944  PCI: 00:1f.5 [8086/0000] bus ops
  878 02:53:08.143578  PCI: 00:1f.5 [8086/a0a4] enabled
  879 02:53:08.146886  PCI: Leftover static devices:
  880 02:53:08.147479  PCI: 00:10.2
  881 02:53:08.150279  PCI: 00:10.6
  882 02:53:08.150872  PCI: 00:10.7
  883 02:53:08.153504  PCI: 00:06.0
  884 02:53:08.154129  PCI: 00:07.1
  885 02:53:08.154514  PCI: 00:07.2
  886 02:53:08.157005  PCI: 00:07.3
  887 02:53:08.157624  PCI: 00:09.0
  888 02:53:08.160032  PCI: 00:0d.1
  889 02:53:08.160622  PCI: 00:0d.2
  890 02:53:08.163004  PCI: 00:0d.3
  891 02:53:08.163487  PCI: 00:0e.0
  892 02:53:08.163866  PCI: 00:12.0
  893 02:53:08.166862  PCI: 00:12.6
  894 02:53:08.167346  PCI: 00:13.0
  895 02:53:08.170151  PCI: 00:14.1
  896 02:53:08.170588  PCI: 00:16.1
  897 02:53:08.170933  PCI: 00:16.2
  898 02:53:08.172726  PCI: 00:16.3
  899 02:53:08.173167  PCI: 00:16.4
  900 02:53:08.176240  PCI: 00:16.5
  901 02:53:08.176678  PCI: 00:17.0
  902 02:53:08.179787  PCI: 00:19.2
  903 02:53:08.180222  PCI: 00:1e.1
  904 02:53:08.180568  PCI: 00:1f.1
  905 02:53:08.183020  PCI: 00:1f.4
  906 02:53:08.183571  PCI: 00:1f.6
  907 02:53:08.186165  PCI: 00:1f.7
  908 02:53:08.189971  PCI: Check your devicetree.cb.
  909 02:53:08.190616  PCI: 00:02.0 scanning...
  910 02:53:08.193142  scan_generic_bus for PCI: 00:02.0
  911 02:53:08.199550  scan_generic_bus for PCI: 00:02.0 done
  912 02:53:08.202946  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  913 02:53:08.206096  PCI: 00:04.0 scanning...
  914 02:53:08.209618  scan_generic_bus for PCI: 00:04.0
  915 02:53:08.212967  GENERIC: 0.0 enabled
  916 02:53:08.216187  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  917 02:53:08.222752  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  918 02:53:08.225882  PCI: 00:0d.0 scanning...
  919 02:53:08.229391  scan_static_bus for PCI: 00:0d.0
  920 02:53:08.229868  USB0 port 0 enabled
  921 02:53:08.232502  USB0 port 0 scanning...
  922 02:53:08.236112  scan_static_bus for USB0 port 0
  923 02:53:08.239023  USB3 port 0 enabled
  924 02:53:08.239473  USB3 port 1 enabled
  925 02:53:08.242478  USB3 port 2 disabled
  926 02:53:08.245906  USB3 port 3 disabled
  927 02:53:08.246457  USB3 port 0 scanning...
  928 02:53:08.249400  scan_static_bus for USB3 port 0
  929 02:53:08.256058  scan_static_bus for USB3 port 0 done
  930 02:53:08.259213  scan_bus: bus USB3 port 0 finished in 6 msecs
  931 02:53:08.262360  USB3 port 1 scanning...
  932 02:53:08.265522  scan_static_bus for USB3 port 1
  933 02:53:08.269195  scan_static_bus for USB3 port 1 done
  934 02:53:08.272623  scan_bus: bus USB3 port 1 finished in 6 msecs
  935 02:53:08.275725  scan_static_bus for USB0 port 0 done
  936 02:53:08.282735  scan_bus: bus USB0 port 0 finished in 43 msecs
  937 02:53:08.285756  scan_static_bus for PCI: 00:0d.0 done
  938 02:53:08.289035  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  939 02:53:08.292400  PCI: 00:14.0 scanning...
  940 02:53:08.295578  scan_static_bus for PCI: 00:14.0
  941 02:53:08.298644  USB0 port 0 enabled
  942 02:53:08.302086  USB0 port 0 scanning...
  943 02:53:08.305677  scan_static_bus for USB0 port 0
  944 02:53:08.306269  USB2 port 0 disabled
  945 02:53:08.309354  USB2 port 1 enabled
  946 02:53:08.310011  USB2 port 2 enabled
  947 02:53:08.312180  USB2 port 3 disabled
  948 02:53:08.315678  USB2 port 4 enabled
  949 02:53:08.316281  USB2 port 5 disabled
  950 02:53:08.318890  USB2 port 6 disabled
  951 02:53:08.321823  USB2 port 7 disabled
  952 02:53:08.322311  USB2 port 8 disabled
  953 02:53:08.325326  USB2 port 9 disabled
  954 02:53:08.328432  USB3 port 0 disabled
  955 02:53:08.328923  USB3 port 1 enabled
  956 02:53:08.332083  USB3 port 2 disabled
  957 02:53:08.335363  USB3 port 3 disabled
  958 02:53:08.335952  USB2 port 1 scanning...
  959 02:53:08.339058  scan_static_bus for USB2 port 1
  960 02:53:08.342200  scan_static_bus for USB2 port 1 done
  961 02:53:08.348699  scan_bus: bus USB2 port 1 finished in 6 msecs
  962 02:53:08.352171  USB2 port 2 scanning...
  963 02:53:08.355131  scan_static_bus for USB2 port 2
  964 02:53:08.358491  scan_static_bus for USB2 port 2 done
  965 02:53:08.361987  scan_bus: bus USB2 port 2 finished in 6 msecs
  966 02:53:08.365232  USB2 port 4 scanning...
  967 02:53:08.368644  scan_static_bus for USB2 port 4
  968 02:53:08.371599  scan_static_bus for USB2 port 4 done
  969 02:53:08.375069  scan_bus: bus USB2 port 4 finished in 6 msecs
  970 02:53:08.378394  USB3 port 1 scanning...
  971 02:53:08.381893  scan_static_bus for USB3 port 1
  972 02:53:08.385244  scan_static_bus for USB3 port 1 done
  973 02:53:08.392326  scan_bus: bus USB3 port 1 finished in 6 msecs
  974 02:53:08.394806  scan_static_bus for USB0 port 0 done
  975 02:53:08.398234  scan_bus: bus USB0 port 0 finished in 93 msecs
  976 02:53:08.401806  scan_static_bus for PCI: 00:14.0 done
  977 02:53:08.408002  scan_bus: bus PCI: 00:14.0 finished in 110 msecs
  978 02:53:08.411521  PCI: 00:14.3 scanning...
  979 02:53:08.414617  scan_static_bus for PCI: 00:14.3
  980 02:53:08.415201  GENERIC: 0.0 enabled
  981 02:53:08.418195  scan_static_bus for PCI: 00:14.3 done
  982 02:53:08.424707  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  983 02:53:08.427810  PCI: 00:15.0 scanning...
  984 02:53:08.431431  scan_static_bus for PCI: 00:15.0
  985 02:53:08.431914  I2C: 00:1a enabled
  986 02:53:08.434787  I2C: 00:31 enabled
  987 02:53:08.438639  I2C: 00:32 enabled
  988 02:53:08.441038  scan_static_bus for PCI: 00:15.0 done
  989 02:53:08.445112  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
  990 02:53:08.449052  PCI: 00:15.1 scanning...
  991 02:53:08.451976  scan_static_bus for PCI: 00:15.1
  992 02:53:08.452476  I2C: 00:10 enabled
  993 02:53:08.455187  scan_static_bus for PCI: 00:15.1 done
  994 02:53:08.461916  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
  995 02:53:08.465128  PCI: 00:15.2 scanning...
  996 02:53:08.468314  scan_static_bus for PCI: 00:15.2
  997 02:53:08.471645  scan_static_bus for PCI: 00:15.2 done
  998 02:53:08.475534  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
  999 02:53:08.478334  PCI: 00:15.3 scanning...
 1000 02:53:08.481611  scan_static_bus for PCI: 00:15.3
 1001 02:53:08.485358  scan_static_bus for PCI: 00:15.3 done
 1002 02:53:08.491998  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1003 02:53:08.492589  PCI: 00:19.1 scanning...
 1004 02:53:08.495151  scan_static_bus for PCI: 00:19.1
 1005 02:53:08.498296  I2C: 00:15 enabled
 1006 02:53:08.501879  scan_static_bus for PCI: 00:19.1 done
 1007 02:53:08.508568  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1008 02:53:08.509176  PCI: 00:1d.0 scanning...
 1009 02:53:08.514756  do_pci_scan_bridge for PCI: 00:1d.0
 1010 02:53:08.515236  PCI: pci_scan_bus for bus 01
 1011 02:53:08.518459  PCI: 01:00.0 [1c5c/174a] enabled
 1012 02:53:08.521609  GENERIC: 0.0 enabled
 1013 02:53:08.525228  Enabling Common Clock Configuration
 1014 02:53:08.531788  L1 Sub-State supported from root port 29
 1015 02:53:08.532235  L1 Sub-State Support = 0xf
 1016 02:53:08.534699  CommonModeRestoreTime = 0x28
 1017 02:53:08.541816  Power On Value = 0x16, Power On Scale = 0x0
 1018 02:53:08.542407  ASPM: Enabled L1
 1019 02:53:08.545162  PCIe: Max_Payload_Size adjusted to 128
 1020 02:53:08.551880  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1021 02:53:08.554993  PCI: 00:1e.2 scanning...
 1022 02:53:08.558426  scan_generic_bus for PCI: 00:1e.2
 1023 02:53:08.559012  SPI: 00 enabled
 1024 02:53:08.564600  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1025 02:53:08.568161  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1026 02:53:08.571339  PCI: 00:1e.3 scanning...
 1027 02:53:08.575060  scan_generic_bus for PCI: 00:1e.3
 1028 02:53:08.577778  SPI: 00 enabled
 1029 02:53:08.584843  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1030 02:53:08.588149  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1031 02:53:08.591388  PCI: 00:1f.0 scanning...
 1032 02:53:08.594427  scan_static_bus for PCI: 00:1f.0
 1033 02:53:08.595012  PNP: 0c09.0 enabled
 1034 02:53:08.597870  PNP: 0c09.0 scanning...
 1035 02:53:08.601412  scan_static_bus for PNP: 0c09.0
 1036 02:53:08.604971  scan_static_bus for PNP: 0c09.0 done
 1037 02:53:08.611457  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1038 02:53:08.614378  scan_static_bus for PCI: 00:1f.0 done
 1039 02:53:08.618052  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1040 02:53:08.621503  PCI: 00:1f.2 scanning...
 1041 02:53:08.624422  scan_static_bus for PCI: 00:1f.2
 1042 02:53:08.627537  GENERIC: 0.0 enabled
 1043 02:53:08.630897  GENERIC: 0.0 scanning...
 1044 02:53:08.634396  scan_static_bus for GENERIC: 0.0
 1045 02:53:08.634877  GENERIC: 0.0 enabled
 1046 02:53:08.637832  GENERIC: 1.0 enabled
 1047 02:53:08.640963  scan_static_bus for GENERIC: 0.0 done
 1048 02:53:08.647729  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1049 02:53:08.651448  scan_static_bus for PCI: 00:1f.2 done
 1050 02:53:08.654330  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1051 02:53:08.657793  PCI: 00:1f.3 scanning...
 1052 02:53:08.661437  scan_static_bus for PCI: 00:1f.3
 1053 02:53:08.664330  scan_static_bus for PCI: 00:1f.3 done
 1054 02:53:08.670814  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1055 02:53:08.671396  PCI: 00:1f.5 scanning...
 1056 02:53:08.673938  scan_generic_bus for PCI: 00:1f.5
 1057 02:53:08.681149  scan_generic_bus for PCI: 00:1f.5 done
 1058 02:53:08.684198  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1059 02:53:08.690984  scan_bus: bus DOMAIN: 0000 finished in 717 msecs
 1060 02:53:08.693851  scan_static_bus for Root Device done
 1061 02:53:08.697245  scan_bus: bus Root Device finished in 737 msecs
 1062 02:53:08.697765  done
 1063 02:53:08.704111  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
 1064 02:53:08.707251  Chrome EC: UHEPI supported
 1065 02:53:08.713870  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1066 02:53:08.720712  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1067 02:53:08.724435  SPI flash protection: WPSW=0 SRP0=0
 1068 02:53:08.730438  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1069 02:53:08.733831  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1070 02:53:08.737243  found VGA at PCI: 00:02.0
 1071 02:53:08.740812  Setting up VGA for PCI: 00:02.0
 1072 02:53:08.747096  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1073 02:53:08.750305  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1074 02:53:08.754257  Allocating resources...
 1075 02:53:08.757308  Reading resources...
 1076 02:53:08.760142  Root Device read_resources bus 0 link: 0
 1077 02:53:08.763845  DOMAIN: 0000 read_resources bus 0 link: 0
 1078 02:53:08.770113  PCI: 00:04.0 read_resources bus 1 link: 0
 1079 02:53:08.774615  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1080 02:53:08.780466  PCI: 00:0d.0 read_resources bus 0 link: 0
 1081 02:53:08.783559  USB0 port 0 read_resources bus 0 link: 0
 1082 02:53:08.790164  USB0 port 0 read_resources bus 0 link: 0 done
 1083 02:53:08.793487  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1084 02:53:08.800324  PCI: 00:14.0 read_resources bus 0 link: 0
 1085 02:53:08.803319  USB0 port 0 read_resources bus 0 link: 0
 1086 02:53:08.810066  USB0 port 0 read_resources bus 0 link: 0 done
 1087 02:53:08.813654  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1088 02:53:08.819849  PCI: 00:14.3 read_resources bus 0 link: 0
 1089 02:53:08.822729  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1090 02:53:08.826339  PCI: 00:15.0 read_resources bus 0 link: 0
 1091 02:53:08.833905  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1092 02:53:08.837451  PCI: 00:15.1 read_resources bus 0 link: 0
 1093 02:53:08.843689  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1094 02:53:08.847296  PCI: 00:19.1 read_resources bus 0 link: 0
 1095 02:53:08.854518  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1096 02:53:08.857717  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 02:53:08.864275  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 02:53:08.867611  PCI: 00:1e.2 read_resources bus 2 link: 0
 1099 02:53:08.875079  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1100 02:53:08.877646  PCI: 00:1e.3 read_resources bus 3 link: 0
 1101 02:53:08.884628  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1102 02:53:08.887841  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 02:53:08.894033  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 02:53:08.897541  PCI: 00:1f.2 read_resources bus 0 link: 0
 1105 02:53:08.900959  GENERIC: 0.0 read_resources bus 0 link: 0
 1106 02:53:08.908529  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1107 02:53:08.911412  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1108 02:53:08.918525  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1109 02:53:08.921443  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1110 02:53:08.928232  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1111 02:53:08.931365  Root Device read_resources bus 0 link: 0 done
 1112 02:53:08.934736  Done reading resources.
 1113 02:53:08.941897  Show resources in subtree (Root Device)...After reading.
 1114 02:53:08.945195   Root Device child on link 0 DOMAIN: 0000
 1115 02:53:08.948268    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1116 02:53:08.958216    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1117 02:53:08.968017    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1118 02:53:08.971371     PCI: 00:00.0
 1119 02:53:08.981460     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1120 02:53:08.988518     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1121 02:53:08.997940     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1122 02:53:09.008042     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1123 02:53:09.017837     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1124 02:53:09.027805     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1125 02:53:09.037446     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1126 02:53:09.044527     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1127 02:53:09.054233     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1128 02:53:09.064271     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1129 02:53:09.074243     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1130 02:53:09.084513     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1131 02:53:09.091107     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1132 02:53:09.100952     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1133 02:53:09.110835     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1134 02:53:09.120307     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1135 02:53:09.130271     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1136 02:53:09.140586     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1137 02:53:09.150366     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1138 02:53:09.157143     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1139 02:53:09.160514     PCI: 00:02.0
 1140 02:53:09.170084     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1141 02:53:09.180484     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1142 02:53:09.190140     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1143 02:53:09.193678     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1144 02:53:09.203500     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1145 02:53:09.206655      GENERIC: 0.0
 1146 02:53:09.207262     PCI: 00:05.0
 1147 02:53:09.216629     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1148 02:53:09.223970     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1149 02:53:09.224565      GENERIC: 0.0
 1150 02:53:09.226547     PCI: 00:08.0
 1151 02:53:09.236614     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1152 02:53:09.237313     PCI: 00:0a.0
 1153 02:53:09.239455     PCI: 00:0d.0 child on link 0 USB0 port 0
 1154 02:53:09.253388     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1155 02:53:09.256651      USB0 port 0 child on link 0 USB3 port 0
 1156 02:53:09.257239       USB3 port 0
 1157 02:53:09.259660       USB3 port 1
 1158 02:53:09.260141       USB3 port 2
 1159 02:53:09.263318       USB3 port 3
 1160 02:53:09.266529     PCI: 00:14.0 child on link 0 USB0 port 0
 1161 02:53:09.275983     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1162 02:53:09.282751      USB0 port 0 child on link 0 USB2 port 0
 1163 02:53:09.283371       USB2 port 0
 1164 02:53:09.286395       USB2 port 1
 1165 02:53:09.286881       USB2 port 2
 1166 02:53:09.289352       USB2 port 3
 1167 02:53:09.289860       USB2 port 4
 1168 02:53:09.292902       USB2 port 5
 1169 02:53:09.293385       USB2 port 6
 1170 02:53:09.296233       USB2 port 7
 1171 02:53:09.296826       USB2 port 8
 1172 02:53:09.299706       USB2 port 9
 1173 02:53:09.300295       USB3 port 0
 1174 02:53:09.302855       USB3 port 1
 1175 02:53:09.306633       USB3 port 2
 1176 02:53:09.307217       USB3 port 3
 1177 02:53:09.309487     PCI: 00:14.2
 1178 02:53:09.319322     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1179 02:53:09.329209     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1180 02:53:09.332655     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1181 02:53:09.342630     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1182 02:53:09.343215      GENERIC: 0.0
 1183 02:53:09.349246     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1184 02:53:09.359223     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 02:53:09.359818      I2C: 00:1a
 1186 02:53:09.362606      I2C: 00:31
 1187 02:53:09.363188      I2C: 00:32
 1188 02:53:09.365923     PCI: 00:15.1 child on link 0 I2C: 00:10
 1189 02:53:09.375853     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1190 02:53:09.379229      I2C: 00:10
 1191 02:53:09.379813     PCI: 00:15.2
 1192 02:53:09.389389     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 02:53:09.392744     PCI: 00:15.3
 1194 02:53:09.402728     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 02:53:09.403317     PCI: 00:16.0
 1196 02:53:09.412572     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1197 02:53:09.415481     PCI: 00:19.0
 1198 02:53:09.419238     PCI: 00:19.1 child on link 0 I2C: 00:15
 1199 02:53:09.428786     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1200 02:53:09.432380      I2C: 00:15
 1201 02:53:09.435313     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1202 02:53:09.445979     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1203 02:53:09.455256     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1204 02:53:09.461957     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1205 02:53:09.465371      GENERIC: 0.0
 1206 02:53:09.466003      PCI: 01:00.0
 1207 02:53:09.476315      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1208 02:53:09.485881      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
 1209 02:53:09.495156      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
 1210 02:53:09.498364     PCI: 00:1e.0
 1211 02:53:09.508433     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1212 02:53:09.511401     PCI: 00:1e.2 child on link 0 SPI: 00
 1213 02:53:09.521955     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1214 02:53:09.524857      SPI: 00
 1215 02:53:09.528566     PCI: 00:1e.3 child on link 0 SPI: 00
 1216 02:53:09.538547     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1217 02:53:09.539037      SPI: 00
 1218 02:53:09.542148     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1219 02:53:09.551605     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1220 02:53:09.555153      PNP: 0c09.0
 1221 02:53:09.561330      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1222 02:53:09.568024     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1223 02:53:09.574676     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1224 02:53:09.584721     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1225 02:53:09.591732      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1226 02:53:09.592321       GENERIC: 0.0
 1227 02:53:09.594634       GENERIC: 1.0
 1228 02:53:09.595216     PCI: 00:1f.3
 1229 02:53:09.604674     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1230 02:53:09.614686     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1231 02:53:09.618082     PCI: 00:1f.5
 1232 02:53:09.627855     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1233 02:53:09.631181    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1234 02:53:09.631667     APIC: 00
 1235 02:53:09.634290     APIC: 01
 1236 02:53:09.634771     APIC: 03
 1237 02:53:09.635151     APIC: 07
 1238 02:53:09.637835     APIC: 05
 1239 02:53:09.638276     APIC: 04
 1240 02:53:09.638644     APIC: 02
 1241 02:53:09.641153     APIC: 06
 1242 02:53:09.647663  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1243 02:53:09.654411   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1244 02:53:09.661049   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1245 02:53:09.667771   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1246 02:53:09.670893    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1247 02:53:09.674521    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem
 1248 02:53:09.677324    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem
 1249 02:53:09.687371   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1250 02:53:09.693927   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1251 02:53:09.700937   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1252 02:53:09.707550  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1253 02:53:09.714184  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1254 02:53:09.720932   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1255 02:53:09.730637   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1256 02:53:09.737370   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1257 02:53:09.740316   DOMAIN: 0000: Resource ranges:
 1258 02:53:09.744203   * Base: 1000, Size: 800, Tag: 100
 1259 02:53:09.747197   * Base: 1900, Size: e700, Tag: 100
 1260 02:53:09.753647    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1261 02:53:09.760629  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1262 02:53:09.767149  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1263 02:53:09.773557   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1264 02:53:09.780463   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1265 02:53:09.790478   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1266 02:53:09.797790   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1267 02:53:09.803938   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1268 02:53:09.813756   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1269 02:53:09.820156   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1270 02:53:09.826766   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1271 02:53:09.836746   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1272 02:53:09.843406   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1273 02:53:09.850388   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1274 02:53:09.860216   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1275 02:53:09.866853   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1276 02:53:09.873313   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1277 02:53:09.883457   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1278 02:53:09.890390   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1279 02:53:09.896682   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
 1280 02:53:09.906496   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1281 02:53:09.913476   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1282 02:53:09.919727   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1283 02:53:09.929765   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1284 02:53:09.936255   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1285 02:53:09.940026   DOMAIN: 0000: Resource ranges:
 1286 02:53:09.942791   * Base: 7fc00000, Size: 40400000, Tag: 200
 1287 02:53:09.949743   * Base: d0000000, Size: 28000000, Tag: 200
 1288 02:53:09.952700   * Base: fa000000, Size: 1000000, Tag: 200
 1289 02:53:09.956546   * Base: fb001000, Size: 2fff000, Tag: 200
 1290 02:53:09.959578   * Base: fe010000, Size: 2e000, Tag: 200
 1291 02:53:09.966143   * Base: fe03f000, Size: d41000, Tag: 200
 1292 02:53:09.969398   * Base: fed88000, Size: 8000, Tag: 200
 1293 02:53:09.972657   * Base: fed93000, Size: d000, Tag: 200
 1294 02:53:09.976008   * Base: feda2000, Size: 1e000, Tag: 200
 1295 02:53:09.982654   * Base: fede0000, Size: 1220000, Tag: 200
 1296 02:53:09.986224   * Base: 280400000, Size: 7d7fc00000, Tag: 100200
 1297 02:53:09.992718    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1298 02:53:09.999133    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1299 02:53:10.006120    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1300 02:53:10.012543    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1301 02:53:10.019265    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1302 02:53:10.025790    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1303 02:53:10.032395    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1304 02:53:10.039089    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1305 02:53:10.046100    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1306 02:53:10.052932    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1307 02:53:10.059008    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1308 02:53:10.065810    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1309 02:53:10.071911    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1310 02:53:10.079089    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1311 02:53:10.085910    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1312 02:53:10.092386    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1313 02:53:10.098649    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1314 02:53:10.105827    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1315 02:53:10.112047    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1316 02:53:10.118703    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1317 02:53:10.125117    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1318 02:53:10.132063    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1319 02:53:10.138338  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1320 02:53:10.148778  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1321 02:53:10.152064   PCI: 00:1d.0: Resource ranges:
 1322 02:53:10.155602   * Base: 7fc00000, Size: 100000, Tag: 200
 1323 02:53:10.161760    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1324 02:53:10.168536    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
 1325 02:53:10.175067    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
 1326 02:53:10.185152  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1327 02:53:10.191815  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1328 02:53:10.195314  Root Device assign_resources, bus 0 link: 0
 1329 02:53:10.202051  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1330 02:53:10.208637  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1331 02:53:10.218305  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1332 02:53:10.224764  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1333 02:53:10.231061  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1334 02:53:10.238211  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1335 02:53:10.241141  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1336 02:53:10.251049  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1337 02:53:10.257842  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1338 02:53:10.267918  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1339 02:53:10.270897  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1340 02:53:10.274475  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1341 02:53:10.284660  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1342 02:53:10.288547  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1343 02:53:10.294856  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1344 02:53:10.301550  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1345 02:53:10.310992  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1346 02:53:10.317786  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1347 02:53:10.321100  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1348 02:53:10.327811  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1349 02:53:10.334369  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1350 02:53:10.341148  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1351 02:53:10.344311  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1352 02:53:10.354370  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1353 02:53:10.357410  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1354 02:53:10.360739  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1355 02:53:10.371100  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1356 02:53:10.377007  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1357 02:53:10.387318  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1358 02:53:10.394290  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1359 02:53:10.400978  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1360 02:53:10.404141  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1361 02:53:10.413616  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1362 02:53:10.423534  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1363 02:53:10.430395  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1364 02:53:10.436458  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1365 02:53:10.442960  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1366 02:53:10.452966  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
 1367 02:53:10.459539  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
 1368 02:53:10.462960  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1369 02:53:10.473137  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1370 02:53:10.476638  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1371 02:53:10.483062  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1372 02:53:10.489656  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1373 02:53:10.496634  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1374 02:53:10.500407  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1375 02:53:10.502921  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1376 02:53:10.510181  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1377 02:53:10.513263  LPC: Trying to open IO window from 800 size 1ff
 1378 02:53:10.523446  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1379 02:53:10.530496  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1380 02:53:10.539878  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1381 02:53:10.543077  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1382 02:53:10.549707  Root Device assign_resources, bus 0 link: 0
 1383 02:53:10.550395  Done setting resources.
 1384 02:53:10.556188  Show resources in subtree (Root Device)...After assigning values.
 1385 02:53:10.562898   Root Device child on link 0 DOMAIN: 0000
 1386 02:53:10.565981    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1387 02:53:10.575936    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1388 02:53:10.586211    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1389 02:53:10.586814     PCI: 00:00.0
 1390 02:53:10.596073     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1391 02:53:10.605915     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1392 02:53:10.615853     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1393 02:53:10.625961     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1394 02:53:10.632692     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1395 02:53:10.642508     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1396 02:53:10.652301     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1397 02:53:10.661874     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1398 02:53:10.671937     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1399 02:53:10.681937     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1400 02:53:10.688594     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1401 02:53:10.698899     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1402 02:53:10.708490     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1403 02:53:10.718742     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1404 02:53:10.728771     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1405 02:53:10.735704     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1406 02:53:10.745092     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1407 02:53:10.755103     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1408 02:53:10.765148     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1409 02:53:10.774775     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1410 02:53:10.777682     PCI: 00:02.0
 1411 02:53:10.788701     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1412 02:53:10.798081     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1413 02:53:10.807689     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1414 02:53:10.811008     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1415 02:53:10.821150     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1416 02:53:10.824902      GENERIC: 0.0
 1417 02:53:10.825479     PCI: 00:05.0
 1418 02:53:10.837761     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1419 02:53:10.841064     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1420 02:53:10.841680      GENERIC: 0.0
 1421 02:53:10.844077     PCI: 00:08.0
 1422 02:53:10.854186     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1423 02:53:10.857631     PCI: 00:0a.0
 1424 02:53:10.860768     PCI: 00:0d.0 child on link 0 USB0 port 0
 1425 02:53:10.870686     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1426 02:53:10.874186      USB0 port 0 child on link 0 USB3 port 0
 1427 02:53:10.877204       USB3 port 0
 1428 02:53:10.877718       USB3 port 1
 1429 02:53:10.880539       USB3 port 2
 1430 02:53:10.884086       USB3 port 3
 1431 02:53:10.887210     PCI: 00:14.0 child on link 0 USB0 port 0
 1432 02:53:10.896918     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1433 02:53:10.900298      USB0 port 0 child on link 0 USB2 port 0
 1434 02:53:10.903795       USB2 port 0
 1435 02:53:10.904381       USB2 port 1
 1436 02:53:10.907381       USB2 port 2
 1437 02:53:10.907870       USB2 port 3
 1438 02:53:10.910907       USB2 port 4
 1439 02:53:10.913678       USB2 port 5
 1440 02:53:10.914164       USB2 port 6
 1441 02:53:10.917748       USB2 port 7
 1442 02:53:10.918335       USB2 port 8
 1443 02:53:10.920423       USB2 port 9
 1444 02:53:10.921013       USB3 port 0
 1445 02:53:10.924206       USB3 port 1
 1446 02:53:10.924797       USB3 port 2
 1447 02:53:10.927108       USB3 port 3
 1448 02:53:10.927697     PCI: 00:14.2
 1449 02:53:10.937225     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1450 02:53:10.946904     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1451 02:53:10.953633     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1452 02:53:10.964234     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1453 02:53:10.964825      GENERIC: 0.0
 1454 02:53:10.970088     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1455 02:53:10.980176     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1456 02:53:10.980670      I2C: 00:1a
 1457 02:53:10.984021      I2C: 00:31
 1458 02:53:10.984509      I2C: 00:32
 1459 02:53:10.990015     PCI: 00:15.1 child on link 0 I2C: 00:10
 1460 02:53:11.000279     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1461 02:53:11.000878      I2C: 00:10
 1462 02:53:11.003751     PCI: 00:15.2
 1463 02:53:11.013536     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1464 02:53:11.014275     PCI: 00:15.3
 1465 02:53:11.023497     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1466 02:53:11.026869     PCI: 00:16.0
 1467 02:53:11.036463     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1468 02:53:11.039705     PCI: 00:19.0
 1469 02:53:11.043652     PCI: 00:19.1 child on link 0 I2C: 00:15
 1470 02:53:11.053243     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1471 02:53:11.053857      I2C: 00:15
 1472 02:53:11.059954     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1473 02:53:11.070312     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1474 02:53:11.079549     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1475 02:53:11.089563     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1476 02:53:11.092823      GENERIC: 0.0
 1477 02:53:11.093314      PCI: 01:00.0
 1478 02:53:11.106343      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1479 02:53:11.116079      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
 1480 02:53:11.126192      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
 1481 02:53:11.126789     PCI: 00:1e.0
 1482 02:53:11.139332     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1483 02:53:11.142693     PCI: 00:1e.2 child on link 0 SPI: 00
 1484 02:53:11.152571     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1485 02:53:11.152683      SPI: 00
 1486 02:53:11.158718     PCI: 00:1e.3 child on link 0 SPI: 00
 1487 02:53:11.168914     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1488 02:53:11.169015      SPI: 00
 1489 02:53:11.172235     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1490 02:53:11.182030     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1491 02:53:11.185220      PNP: 0c09.0
 1492 02:53:11.192428      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1493 02:53:11.198950     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1494 02:53:11.205526     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1495 02:53:11.215640     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1496 02:53:11.221865      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1497 02:53:11.221980       GENERIC: 0.0
 1498 02:53:11.224937       GENERIC: 1.0
 1499 02:53:11.225055     PCI: 00:1f.3
 1500 02:53:11.235148     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1501 02:53:11.245284     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1502 02:53:11.248332     PCI: 00:1f.5
 1503 02:53:11.258615     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1504 02:53:11.261989    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1505 02:53:11.265156     APIC: 00
 1506 02:53:11.265334     APIC: 01
 1507 02:53:11.265421     APIC: 03
 1508 02:53:11.268694     APIC: 07
 1509 02:53:11.268851     APIC: 05
 1510 02:53:11.271949     APIC: 04
 1511 02:53:11.272074     APIC: 02
 1512 02:53:11.272158     APIC: 06
 1513 02:53:11.275214  Done allocating resources.
 1514 02:53:11.281487  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
 1515 02:53:11.288276  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1516 02:53:11.291632  Configure GPIOs for I2S audio on UP4.
 1517 02:53:11.298140  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1518 02:53:11.301447  Enabling resources...
 1519 02:53:11.304797  PCI: 00:00.0 subsystem <- 8086/9a12
 1520 02:53:11.307973  PCI: 00:00.0 cmd <- 06
 1521 02:53:11.311520  PCI: 00:02.0 subsystem <- 8086/9a40
 1522 02:53:11.314949  PCI: 00:02.0 cmd <- 03
 1523 02:53:11.318223  PCI: 00:04.0 subsystem <- 8086/9a03
 1524 02:53:11.321381  PCI: 00:04.0 cmd <- 02
 1525 02:53:11.324732  PCI: 00:05.0 subsystem <- 8086/9a19
 1526 02:53:11.325071  PCI: 00:05.0 cmd <- 02
 1527 02:53:11.331557  PCI: 00:08.0 subsystem <- 8086/9a11
 1528 02:53:11.332065  PCI: 00:08.0 cmd <- 06
 1529 02:53:11.334572  PCI: 00:0d.0 subsystem <- 8086/9a13
 1530 02:53:11.338020  PCI: 00:0d.0 cmd <- 02
 1531 02:53:11.341654  PCI: 00:14.0 subsystem <- 8086/a0ed
 1532 02:53:11.344828  PCI: 00:14.0 cmd <- 02
 1533 02:53:11.348126  PCI: 00:14.2 subsystem <- 8086/a0ef
 1534 02:53:11.351381  PCI: 00:14.2 cmd <- 02
 1535 02:53:11.355194  PCI: 00:14.3 subsystem <- 8086/a0f0
 1536 02:53:11.357715  PCI: 00:14.3 cmd <- 02
 1537 02:53:11.361328  PCI: 00:15.0 subsystem <- 8086/a0e8
 1538 02:53:11.364733  PCI: 00:15.0 cmd <- 02
 1539 02:53:11.367765  PCI: 00:15.1 subsystem <- 8086/a0e9
 1540 02:53:11.371228  PCI: 00:15.1 cmd <- 02
 1541 02:53:11.375386  PCI: 00:15.2 subsystem <- 8086/a0ea
 1542 02:53:11.375876  PCI: 00:15.2 cmd <- 02
 1543 02:53:11.381040  PCI: 00:15.3 subsystem <- 8086/a0eb
 1544 02:53:11.381533  PCI: 00:15.3 cmd <- 02
 1545 02:53:11.384471  PCI: 00:16.0 subsystem <- 8086/a0e0
 1546 02:53:11.387685  PCI: 00:16.0 cmd <- 02
 1547 02:53:11.391407  PCI: 00:19.1 subsystem <- 8086/a0c6
 1548 02:53:11.394582  PCI: 00:19.1 cmd <- 02
 1549 02:53:11.397931  PCI: 00:1d.0 bridge ctrl <- 0013
 1550 02:53:11.401477  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1551 02:53:11.404297  PCI: 00:1d.0 cmd <- 06
 1552 02:53:11.407355  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1553 02:53:11.410837  PCI: 00:1e.0 cmd <- 06
 1554 02:53:11.414142  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1555 02:53:11.418176  PCI: 00:1e.2 cmd <- 06
 1556 02:53:11.421333  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1557 02:53:11.424646  PCI: 00:1e.3 cmd <- 02
 1558 02:53:11.427710  PCI: 00:1f.0 subsystem <- 8086/a087
 1559 02:53:11.428295  PCI: 00:1f.0 cmd <- 407
 1560 02:53:11.434152  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1561 02:53:11.434731  PCI: 00:1f.3 cmd <- 02
 1562 02:53:11.437683  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1563 02:53:11.440870  PCI: 00:1f.5 cmd <- 406
 1564 02:53:11.446037  PCI: 01:00.0 cmd <- 02
 1565 02:53:11.450500  done.
 1566 02:53:11.454126  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1567 02:53:11.457444  Initializing devices...
 1568 02:53:11.460235  Root Device init
 1569 02:53:11.463600  Chrome EC: Set SMI mask to 0x0000000000000000
 1570 02:53:11.470317  Chrome EC: clear events_b mask to 0x0000000000000000
 1571 02:53:11.476865  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1572 02:53:11.483282  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1573 02:53:11.486524  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1574 02:53:11.493531  Chrome EC: Set WAKE mask to 0x0000000000000000
 1575 02:53:11.500383  fw_config match found: DB_USB=USB3_ACTIVE
 1576 02:53:11.504006  Configure Right Type-C port orientation for retimer
 1577 02:53:11.506968  Root Device init finished in 44 msecs
 1578 02:53:11.510882  PCI: 00:00.0 init
 1579 02:53:11.514135  CPU TDP = 9 Watts
 1580 02:53:11.514737  CPU PL1 = 9 Watts
 1581 02:53:11.517168  CPU PL2 = 40 Watts
 1582 02:53:11.520281  CPU PL4 = 83 Watts
 1583 02:53:11.523947  PCI: 00:00.0 init finished in 8 msecs
 1584 02:53:11.524426  PCI: 00:02.0 init
 1585 02:53:11.527279  GMA: Found VBT in CBFS
 1586 02:53:11.530363  GMA: Found valid VBT in CBFS
 1587 02:53:11.537318  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1588 02:53:11.543899                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1589 02:53:11.546999  PCI: 00:02.0 init finished in 18 msecs
 1590 02:53:11.550479  PCI: 00:05.0 init
 1591 02:53:11.553692  PCI: 00:05.0 init finished in 0 msecs
 1592 02:53:11.556902  PCI: 00:08.0 init
 1593 02:53:11.560352  PCI: 00:08.0 init finished in 0 msecs
 1594 02:53:11.563926  PCI: 00:14.0 init
 1595 02:53:11.566882  PCI: 00:14.0 init finished in 0 msecs
 1596 02:53:11.570316  PCI: 00:14.2 init
 1597 02:53:11.573228  PCI: 00:14.2 init finished in 0 msecs
 1598 02:53:11.577017  PCI: 00:15.0 init
 1599 02:53:11.580277  I2C bus 0 version 0x3230302a
 1600 02:53:11.583159  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1601 02:53:11.586319  PCI: 00:15.0 init finished in 6 msecs
 1602 02:53:11.586799  PCI: 00:15.1 init
 1603 02:53:11.589980  I2C bus 1 version 0x3230302a
 1604 02:53:11.593337  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1605 02:53:11.599955  PCI: 00:15.1 init finished in 6 msecs
 1606 02:53:11.600536  PCI: 00:15.2 init
 1607 02:53:11.603358  I2C bus 2 version 0x3230302a
 1608 02:53:11.606340  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1609 02:53:11.609558  PCI: 00:15.2 init finished in 6 msecs
 1610 02:53:11.613566  PCI: 00:15.3 init
 1611 02:53:11.616896  I2C bus 3 version 0x3230302a
 1612 02:53:11.619888  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1613 02:53:11.623603  PCI: 00:15.3 init finished in 6 msecs
 1614 02:53:11.626772  PCI: 00:16.0 init
 1615 02:53:11.630133  PCI: 00:16.0 init finished in 0 msecs
 1616 02:53:11.633467  PCI: 00:19.1 init
 1617 02:53:11.636824  I2C bus 5 version 0x3230302a
 1618 02:53:11.639699  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1619 02:53:11.642780  PCI: 00:19.1 init finished in 6 msecs
 1620 02:53:11.646679  PCI: 00:1d.0 init
 1621 02:53:11.650216  Initializing PCH PCIe bridge.
 1622 02:53:11.653520  PCI: 00:1d.0 init finished in 3 msecs
 1623 02:53:11.656330  PCI: 00:1f.0 init
 1624 02:53:11.659743  IOAPIC: Initializing IOAPIC at 0xfec00000
 1625 02:53:11.662986  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1626 02:53:11.666109  IOAPIC: ID = 0x02
 1627 02:53:11.669924  IOAPIC: Dumping registers
 1628 02:53:11.670498    reg 0x0000: 0x02000000
 1629 02:53:11.673079    reg 0x0001: 0x00770020
 1630 02:53:11.676134    reg 0x0002: 0x00000000
 1631 02:53:11.679440  PCI: 00:1f.0 init finished in 21 msecs
 1632 02:53:11.682807  PCI: 00:1f.2 init
 1633 02:53:11.686633  Disabling ACPI via APMC.
 1634 02:53:11.689888  APMC done.
 1635 02:53:11.693081  PCI: 00:1f.2 init finished in 5 msecs
 1636 02:53:11.703813  PCI: 01:00.0 init
 1637 02:53:11.706983  PCI: 01:00.0 init finished in 0 msecs
 1638 02:53:11.710286  PNP: 0c09.0 init
 1639 02:53:11.713854  Google Chrome EC uptime: 8.410 seconds
 1640 02:53:11.720546  Google Chrome AP resets since EC boot: 1
 1641 02:53:11.723890  Google Chrome most recent AP reset causes:
 1642 02:53:11.727624  	0.348: 32775 shutdown: entering G3
 1643 02:53:11.733521  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1644 02:53:11.736731  PNP: 0c09.0 init finished in 22 msecs
 1645 02:53:11.742932  Devices initialized
 1646 02:53:11.746250  Show all devs... After init.
 1647 02:53:11.749438  Root Device: enabled 1
 1648 02:53:11.749940  DOMAIN: 0000: enabled 1
 1649 02:53:11.752970  CPU_CLUSTER: 0: enabled 1
 1650 02:53:11.756017  PCI: 00:00.0: enabled 1
 1651 02:53:11.759115  PCI: 00:02.0: enabled 1
 1652 02:53:11.759594  PCI: 00:04.0: enabled 1
 1653 02:53:11.762809  PCI: 00:05.0: enabled 1
 1654 02:53:11.766307  PCI: 00:06.0: enabled 0
 1655 02:53:11.769652  PCI: 00:07.0: enabled 0
 1656 02:53:11.770250  PCI: 00:07.1: enabled 0
 1657 02:53:11.772889  PCI: 00:07.2: enabled 0
 1658 02:53:11.776131  PCI: 00:07.3: enabled 0
 1659 02:53:11.778871  PCI: 00:08.0: enabled 1
 1660 02:53:11.779428  PCI: 00:09.0: enabled 0
 1661 02:53:11.782460  PCI: 00:0a.0: enabled 0
 1662 02:53:11.785762  PCI: 00:0d.0: enabled 1
 1663 02:53:11.789271  PCI: 00:0d.1: enabled 0
 1664 02:53:11.789899  PCI: 00:0d.2: enabled 0
 1665 02:53:11.793030  PCI: 00:0d.3: enabled 0
 1666 02:53:11.795157  PCI: 00:0e.0: enabled 0
 1667 02:53:11.798448  PCI: 00:10.2: enabled 1
 1668 02:53:11.798939  PCI: 00:10.6: enabled 0
 1669 02:53:11.801937  PCI: 00:10.7: enabled 0
 1670 02:53:11.805321  PCI: 00:12.0: enabled 0
 1671 02:53:11.808929  PCI: 00:12.6: enabled 0
 1672 02:53:11.809421  PCI: 00:13.0: enabled 0
 1673 02:53:11.811811  PCI: 00:14.0: enabled 1
 1674 02:53:11.815113  PCI: 00:14.1: enabled 0
 1675 02:53:11.815610  PCI: 00:14.2: enabled 1
 1676 02:53:11.818576  PCI: 00:14.3: enabled 1
 1677 02:53:11.821651  PCI: 00:15.0: enabled 1
 1678 02:53:11.825172  PCI: 00:15.1: enabled 1
 1679 02:53:11.825700  PCI: 00:15.2: enabled 1
 1680 02:53:11.828614  PCI: 00:15.3: enabled 1
 1681 02:53:11.831953  PCI: 00:16.0: enabled 1
 1682 02:53:11.835349  PCI: 00:16.1: enabled 0
 1683 02:53:11.835896  PCI: 00:16.2: enabled 0
 1684 02:53:11.838551  PCI: 00:16.3: enabled 0
 1685 02:53:11.841754  PCI: 00:16.4: enabled 0
 1686 02:53:11.845307  PCI: 00:16.5: enabled 0
 1687 02:53:11.845933  PCI: 00:17.0: enabled 0
 1688 02:53:11.848371  PCI: 00:19.0: enabled 0
 1689 02:53:11.852261  PCI: 00:19.1: enabled 1
 1690 02:53:11.855223  PCI: 00:19.2: enabled 0
 1691 02:53:11.855808  PCI: 00:1c.0: enabled 1
 1692 02:53:11.858758  PCI: 00:1c.1: enabled 0
 1693 02:53:11.861943  PCI: 00:1c.2: enabled 0
 1694 02:53:11.862563  PCI: 00:1c.3: enabled 0
 1695 02:53:11.865023  PCI: 00:1c.4: enabled 0
 1696 02:53:11.868272  PCI: 00:1c.5: enabled 0
 1697 02:53:11.871920  PCI: 00:1c.6: enabled 1
 1698 02:53:11.872542  PCI: 00:1c.7: enabled 0
 1699 02:53:11.875028  PCI: 00:1d.0: enabled 1
 1700 02:53:11.878410  PCI: 00:1d.1: enabled 0
 1701 02:53:11.881630  PCI: 00:1d.2: enabled 1
 1702 02:53:11.882135  PCI: 00:1d.3: enabled 0
 1703 02:53:11.885110  PCI: 00:1e.0: enabled 1
 1704 02:53:11.888290  PCI: 00:1e.1: enabled 0
 1705 02:53:11.891782  PCI: 00:1e.2: enabled 1
 1706 02:53:11.892385  PCI: 00:1e.3: enabled 1
 1707 02:53:11.894878  PCI: 00:1f.0: enabled 1
 1708 02:53:11.898006  PCI: 00:1f.1: enabled 0
 1709 02:53:11.898507  PCI: 00:1f.2: enabled 1
 1710 02:53:11.901769  PCI: 00:1f.3: enabled 1
 1711 02:53:11.905076  PCI: 00:1f.4: enabled 0
 1712 02:53:11.908157  PCI: 00:1f.5: enabled 1
 1713 02:53:11.908748  PCI: 00:1f.6: enabled 0
 1714 02:53:11.911396  PCI: 00:1f.7: enabled 0
 1715 02:53:11.914881  APIC: 00: enabled 1
 1716 02:53:11.918382  GENERIC: 0.0: enabled 1
 1717 02:53:11.918882  GENERIC: 0.0: enabled 1
 1718 02:53:11.921556  GENERIC: 1.0: enabled 1
 1719 02:53:11.924662  GENERIC: 0.0: enabled 1
 1720 02:53:11.925157  GENERIC: 1.0: enabled 1
 1721 02:53:11.928294  USB0 port 0: enabled 1
 1722 02:53:11.931983  GENERIC: 0.0: enabled 1
 1723 02:53:11.934977  USB0 port 0: enabled 1
 1724 02:53:11.935477  GENERIC: 0.0: enabled 1
 1725 02:53:11.938348  I2C: 00:1a: enabled 1
 1726 02:53:11.941667  I2C: 00:31: enabled 1
 1727 02:53:11.942165  I2C: 00:32: enabled 1
 1728 02:53:11.944615  I2C: 00:10: enabled 1
 1729 02:53:11.948058  I2C: 00:15: enabled 1
 1730 02:53:11.948654  GENERIC: 0.0: enabled 0
 1731 02:53:11.951619  GENERIC: 1.0: enabled 0
 1732 02:53:11.955785  GENERIC: 0.0: enabled 1
 1733 02:53:11.958392  SPI: 00: enabled 1
 1734 02:53:11.958998  SPI: 00: enabled 1
 1735 02:53:11.961271  PNP: 0c09.0: enabled 1
 1736 02:53:11.964427  GENERIC: 0.0: enabled 1
 1737 02:53:11.964926  USB3 port 0: enabled 1
 1738 02:53:11.968109  USB3 port 1: enabled 1
 1739 02:53:11.971359  USB3 port 2: enabled 0
 1740 02:53:11.971951  USB3 port 3: enabled 0
 1741 02:53:11.974505  USB2 port 0: enabled 0
 1742 02:53:11.977705  USB2 port 1: enabled 1
 1743 02:53:11.978205  USB2 port 2: enabled 1
 1744 02:53:11.981157  USB2 port 3: enabled 0
 1745 02:53:11.984514  USB2 port 4: enabled 1
 1746 02:53:11.987917  USB2 port 5: enabled 0
 1747 02:53:11.988413  USB2 port 6: enabled 0
 1748 02:53:11.991279  USB2 port 7: enabled 0
 1749 02:53:11.994396  USB2 port 8: enabled 0
 1750 02:53:11.994900  USB2 port 9: enabled 0
 1751 02:53:11.997906  USB3 port 0: enabled 0
 1752 02:53:12.001469  USB3 port 1: enabled 1
 1753 02:53:12.004368  USB3 port 2: enabled 0
 1754 02:53:12.004872  USB3 port 3: enabled 0
 1755 02:53:12.008031  GENERIC: 0.0: enabled 1
 1756 02:53:12.011056  GENERIC: 1.0: enabled 1
 1757 02:53:12.011555  APIC: 01: enabled 1
 1758 02:53:12.014720  APIC: 03: enabled 1
 1759 02:53:12.018071  APIC: 07: enabled 1
 1760 02:53:12.018571  APIC: 05: enabled 1
 1761 02:53:12.021212  APIC: 04: enabled 1
 1762 02:53:12.021742  APIC: 02: enabled 1
 1763 02:53:12.025265  APIC: 06: enabled 1
 1764 02:53:12.027862  PCI: 01:00.0: enabled 1
 1765 02:53:12.031081  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
 1766 02:53:12.038046  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1767 02:53:12.041102  ELOG: NV offset 0xf30000 size 0x1000
 1768 02:53:12.048182  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1769 02:53:12.055631  ELOG: Event(17) added with size 13 at 2022-06-28 01:46:52 UTC
 1770 02:53:12.061239  ELOG: Event(92) added with size 9 at 2022-06-28 01:46:52 UTC
 1771 02:53:12.067974  ELOG: Event(93) added with size 9 at 2022-06-28 01:46:52 UTC
 1772 02:53:12.074485  ELOG: Event(9E) added with size 10 at 2022-06-28 01:46:52 UTC
 1773 02:53:12.081379  ELOG: Event(9F) added with size 14 at 2022-06-28 01:46:52 UTC
 1774 02:53:12.087722  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1775 02:53:12.094178  ELOG: Event(A1) added with size 10 at 2022-06-28 01:46:52 UTC
 1776 02:53:12.097101  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
 1777 02:53:12.104163  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
 1778 02:53:12.107072  Finalize devices...
 1779 02:53:12.107564  Devices finalized
 1780 02:53:12.113803  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1781 02:53:12.120510  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1782 02:53:12.124111  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1783 02:53:12.130535  ME: HFSTS1                      : 0x80030055
 1784 02:53:12.133675  ME: HFSTS2                      : 0x30280116
 1785 02:53:12.136889  ME: HFSTS3                      : 0x00000050
 1786 02:53:12.143597  ME: HFSTS4                      : 0x00004000
 1787 02:53:12.146735  ME: HFSTS5                      : 0x00000000
 1788 02:53:12.153654  ME: HFSTS6                      : 0x00400006
 1789 02:53:12.156963  ME: Manufacturing Mode          : YES
 1790 02:53:12.160119  ME: SPI Protection Mode Enabled : NO
 1791 02:53:12.164048  ME: FW Partition Table          : OK
 1792 02:53:12.167054  ME: Bringup Loader Failure      : NO
 1793 02:53:12.170374  ME: Firmware Init Complete      : NO
 1794 02:53:12.173492  ME: Boot Options Present        : NO
 1795 02:53:12.176967  ME: Update In Progress          : NO
 1796 02:53:12.183436  ME: D0i3 Support                : YES
 1797 02:53:12.186803  ME: Low Power State Enabled     : NO
 1798 02:53:12.190067  ME: CPU Replaced                : YES
 1799 02:53:12.193354  ME: CPU Replacement Valid       : YES
 1800 02:53:12.196659  ME: Current Working State       : 5
 1801 02:53:12.199968  ME: Current Operation State     : 1
 1802 02:53:12.203195  ME: Current Operation Mode      : 3
 1803 02:53:12.206572  ME: Error Code                  : 0
 1804 02:53:12.209975  ME: Enhanced Debug Mode         : NO
 1805 02:53:12.216837  ME: CPU Debug Disabled          : YES
 1806 02:53:12.219959  ME: TXT Support                 : NO
 1807 02:53:12.226644  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1808 02:53:12.232929  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1809 02:53:12.236288  CBFS: 'fallback/slic' not found.
 1810 02:53:12.240074  ACPI: Writing ACPI tables at 76b01000.
 1811 02:53:12.243611  ACPI:    * FACS
 1812 02:53:12.244126  ACPI:    * DSDT
 1813 02:53:12.247345  Ramoops buffer: 0x100000@0x76a00000.
 1814 02:53:12.253465  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1815 02:53:12.256114  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1816 02:53:12.259848  Google Chrome EC: version:
 1817 02:53:12.263262  	ro: voema_v2.0.7540-147f8d37d1
 1818 02:53:12.266412  	rw: voema_v2.0.7540-147f8d37d1
 1819 02:53:12.269722    running image: 2
 1820 02:53:12.276176  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
 1821 02:53:12.279771  ACPI:    * FADT
 1822 02:53:12.280263  SCI is IRQ9
 1823 02:53:12.282879  ACPI: added table 1/32, length now 40
 1824 02:53:12.286105  ACPI:     * SSDT
 1825 02:53:12.289122  Found 1 CPU(s) with 8 core(s) each.
 1826 02:53:12.292530  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1827 02:53:12.299411  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1828 02:53:12.302540  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1829 02:53:12.305829  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1830 02:53:12.312690  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1831 02:53:12.319295  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1832 02:53:12.322769  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1833 02:53:12.329109  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1834 02:53:12.335651  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1835 02:53:12.338963  \_SB.PCI0.RP09: Added StorageD3Enable property
 1836 02:53:12.342219  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1837 02:53:12.349365  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1838 02:53:12.356589  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1839 02:53:12.359431  PS2K: Passing 80 keymaps to kernel
 1840 02:53:12.366534  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1841 02:53:12.372827  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1842 02:53:12.379505  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1843 02:53:12.385744  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1844 02:53:12.392817  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1845 02:53:12.398946  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1846 02:53:12.405864  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1847 02:53:12.412640  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1848 02:53:12.415884  ACPI: added table 2/32, length now 44
 1849 02:53:12.419047  ACPI:    * MCFG
 1850 02:53:12.422550  ACPI: added table 3/32, length now 48
 1851 02:53:12.423038  ACPI:    * TPM2
 1852 02:53:12.425322  TPM2 log created at 0x769f0000
 1853 02:53:12.429109  ACPI: added table 4/32, length now 52
 1854 02:53:12.432287  ACPI:    * MADT
 1855 02:53:12.432880  SCI is IRQ9
 1856 02:53:12.435464  ACPI: added table 5/32, length now 56
 1857 02:53:12.438865  current = 76b09850
 1858 02:53:12.439352  ACPI:    * DMAR
 1859 02:53:12.445838  ACPI: added table 6/32, length now 60
 1860 02:53:12.448923  ACPI: added table 7/32, length now 64
 1861 02:53:12.449517  ACPI:    * HPET
 1862 02:53:12.452220  ACPI: added table 8/32, length now 68
 1863 02:53:12.456042  ACPI: done.
 1864 02:53:12.458787  ACPI tables: 35216 bytes.
 1865 02:53:12.459376  smbios_write_tables: 769ef000
 1866 02:53:12.462151  EC returned error result code 3
 1867 02:53:12.465652  Couldn't obtain OEM name from CBI
 1868 02:53:12.470747  Create SMBIOS type 16
 1869 02:53:12.473920  Create SMBIOS type 17
 1870 02:53:12.476987  GENERIC: 0.0 (WIFI Device)
 1871 02:53:12.480472  SMBIOS tables: 1750 bytes.
 1872 02:53:12.483834  Writing table forward entry at 0x00000500
 1873 02:53:12.490572  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1874 02:53:12.493651  Writing coreboot table at 0x76b25000
 1875 02:53:12.500470   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1876 02:53:12.503673   1. 0000000000001000-000000000009ffff: RAM
 1877 02:53:12.506713   2. 00000000000a0000-00000000000fffff: RESERVED
 1878 02:53:12.513299   3. 0000000000100000-00000000769eefff: RAM
 1879 02:53:12.517171   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1880 02:53:12.523476   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1881 02:53:12.529925   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1882 02:53:12.533544   7. 0000000077000000-000000007fbfffff: RESERVED
 1883 02:53:12.540077   8. 00000000c0000000-00000000cfffffff: RESERVED
 1884 02:53:12.543427   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1885 02:53:12.547102  10. 00000000fb000000-00000000fb000fff: RESERVED
 1886 02:53:12.553616  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1887 02:53:12.556553  12. 00000000fed80000-00000000fed87fff: RESERVED
 1888 02:53:12.563388  13. 00000000fed90000-00000000fed92fff: RESERVED
 1889 02:53:12.566659  14. 00000000feda0000-00000000feda1fff: RESERVED
 1890 02:53:12.573349  15. 00000000fedc0000-00000000feddffff: RESERVED
 1891 02:53:12.576674  16. 0000000100000000-00000002803fffff: RAM
 1892 02:53:12.580020  Passing 4 GPIOs to payload:
 1893 02:53:12.583234              NAME |       PORT | POLARITY |     VALUE
 1894 02:53:12.589958               lid |  undefined |     high |      high
 1895 02:53:12.596824             power |  undefined |     high |       low
 1896 02:53:12.599997             oprom |  undefined |     high |       low
 1897 02:53:12.606655          EC in RW | 0x000000e5 |     high |      high
 1898 02:53:12.613128  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum df58
 1899 02:53:12.613656  coreboot table: 1576 bytes.
 1900 02:53:12.619389  IMD ROOT    0. 0x76fff000 0x00001000
 1901 02:53:12.623127  IMD SMALL   1. 0x76ffe000 0x00001000
 1902 02:53:12.626226  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1903 02:53:12.629693  VPD         3. 0x76c4d000 0x00000367
 1904 02:53:12.632870  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1905 02:53:12.636744  CONSOLE     5. 0x76c2c000 0x00020000
 1906 02:53:12.639514  FMAP        6. 0x76c2b000 0x00000578
 1907 02:53:12.643121  TIME STAMP  7. 0x76c2a000 0x00000910
 1908 02:53:12.649947  VBOOT WORK  8. 0x76c16000 0x00014000
 1909 02:53:12.653169  ROMSTG STCK 9. 0x76c15000 0x00001000
 1910 02:53:12.656604  AFTER CAR  10. 0x76c0a000 0x0000b000
 1911 02:53:12.659997  RAMSTAGE   11. 0x76b97000 0x00073000
 1912 02:53:12.663109  REFCODE    12. 0x76b42000 0x00055000
 1913 02:53:12.666572  SMM BACKUP 13. 0x76b32000 0x00010000
 1914 02:53:12.669939  4f444749   14. 0x76b30000 0x00002000
 1915 02:53:12.673149  EXT VBT15. 0x76b2d000 0x0000219f
 1916 02:53:12.676959  COREBOOT   16. 0x76b25000 0x00008000
 1917 02:53:12.679596  ACPI       17. 0x76b01000 0x00024000
 1918 02:53:12.686315  ACPI GNVS  18. 0x76b00000 0x00001000
 1919 02:53:12.689561  RAMOOPS    19. 0x76a00000 0x00100000
 1920 02:53:12.692987  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1921 02:53:12.696251  SMBIOS     21. 0x769ef000 0x00000800
 1922 02:53:12.699444  IMD small region:
 1923 02:53:12.702630    IMD ROOT    0. 0x76ffec00 0x00000400
 1924 02:53:12.706361    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1925 02:53:12.709336    POWER STATE 2. 0x76ffeb80 0x00000044
 1926 02:53:12.712890    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1927 02:53:12.716541    MEM INFO    4. 0x76ffe980 0x000001e0
 1928 02:53:12.723226  BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
 1929 02:53:12.726205  MTRR: Physical address space:
 1930 02:53:12.732878  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1931 02:53:12.739341  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1932 02:53:12.746043  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1933 02:53:12.752529  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1934 02:53:12.759738  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1935 02:53:12.762655  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1936 02:53:12.769739  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
 1937 02:53:12.776352  MTRR: Fixed MSR 0x250 0x0606060606060606
 1938 02:53:12.779509  MTRR: Fixed MSR 0x258 0x0606060606060606
 1939 02:53:12.782356  MTRR: Fixed MSR 0x259 0x0000000000000000
 1940 02:53:12.785984  MTRR: Fixed MSR 0x268 0x0606060606060606
 1941 02:53:12.792510  MTRR: Fixed MSR 0x269 0x0606060606060606
 1942 02:53:12.796342  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1943 02:53:12.799194  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1944 02:53:12.802302  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1945 02:53:12.805731  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1946 02:53:12.812360  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1947 02:53:12.815455  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1948 02:53:12.819155  call enable_fixed_mtrr()
 1949 02:53:12.822504  CPU physical address size: 39 bits
 1950 02:53:12.825687  MTRR: default type WB/UC MTRR counts: 6/6.
 1951 02:53:12.832769  MTRR: UC selected as default type.
 1952 02:53:12.835558  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1953 02:53:12.842199  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1954 02:53:12.849300  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1955 02:53:12.855785  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1956 02:53:12.862418  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1957 02:53:12.868966  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
 1958 02:53:12.872082  MTRR: Fixed MSR 0x250 0x0606060606060606
 1959 02:53:12.878610  MTRR: Fixed MSR 0x258 0x0606060606060606
 1960 02:53:12.882175  MTRR: Fixed MSR 0x259 0x0000000000000000
 1961 02:53:12.885268  MTRR: Fixed MSR 0x268 0x0606060606060606
 1962 02:53:12.888678  MTRR: Fixed MSR 0x269 0x0606060606060606
 1963 02:53:12.895382  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1964 02:53:12.898677  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1965 02:53:12.901904  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1966 02:53:12.905305  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1967 02:53:12.912543  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1968 02:53:12.915457  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1969 02:53:12.916060  
 1970 02:53:12.918199  MTRR check
 1971 02:53:12.918692  call enable_fixed_mtrr()
 1972 02:53:12.921935  Fixed MTRRs   : Enabled
 1973 02:53:12.925492  Variable MTRRs: Enabled
 1974 02:53:12.926132  
 1975 02:53:12.928497  CPU physical address size: 39 bits
 1976 02:53:12.935329  BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
 1977 02:53:12.938440  MTRR: Fixed MSR 0x250 0x0606060606060606
 1978 02:53:12.944911  MTRR: Fixed MSR 0x250 0x0606060606060606
 1979 02:53:12.948149  MTRR: Fixed MSR 0x258 0x0606060606060606
 1980 02:53:12.951321  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 02:53:12.955037  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 02:53:12.958103  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 02:53:12.965051  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 02:53:12.968209  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 02:53:12.971695  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 02:53:12.974586  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 02:53:12.981739  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 02:53:12.984643  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 02:53:12.988448  MTRR: Fixed MSR 0x258 0x0606060606060606
 1990 02:53:12.991507  call enable_fixed_mtrr()
 1991 02:53:12.994871  MTRR: Fixed MSR 0x259 0x0000000000000000
 1992 02:53:13.000939  MTRR: Fixed MSR 0x268 0x0606060606060606
 1993 02:53:13.004475  MTRR: Fixed MSR 0x269 0x0606060606060606
 1994 02:53:13.007919  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1995 02:53:13.011063  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1996 02:53:13.017702  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1997 02:53:13.020885  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1998 02:53:13.024709  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1999 02:53:13.027665  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2000 02:53:13.031881  CPU physical address size: 39 bits
 2001 02:53:13.038321  call enable_fixed_mtrr()
 2002 02:53:13.042610  Checking cr50 for pending updates
 2003 02:53:13.045860  MTRR: Fixed MSR 0x250 0x0606060606060606
 2004 02:53:13.048800  MTRR: Fixed MSR 0x250 0x0606060606060606
 2005 02:53:13.052521  MTRR: Fixed MSR 0x258 0x0606060606060606
 2006 02:53:13.055884  MTRR: Fixed MSR 0x259 0x0000000000000000
 2007 02:53:13.062397  MTRR: Fixed MSR 0x268 0x0606060606060606
 2008 02:53:13.065712  MTRR: Fixed MSR 0x269 0x0606060606060606
 2009 02:53:13.069265  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2010 02:53:13.072692  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2011 02:53:13.078973  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2012 02:53:13.082376  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2013 02:53:13.085797  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2014 02:53:13.089231  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2015 02:53:13.096750  MTRR: Fixed MSR 0x258 0x0606060606060606
 2016 02:53:13.097363  call enable_fixed_mtrr()
 2017 02:53:13.102367  MTRR: Fixed MSR 0x259 0x0000000000000000
 2018 02:53:13.105924  MTRR: Fixed MSR 0x268 0x0606060606060606
 2019 02:53:13.109138  MTRR: Fixed MSR 0x269 0x0606060606060606
 2020 02:53:13.112519  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2021 02:53:13.118906  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2022 02:53:13.122487  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2023 02:53:13.126163  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2024 02:53:13.129239  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2025 02:53:13.135602  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2026 02:53:13.138772  CPU physical address size: 39 bits
 2027 02:53:13.142615  call enable_fixed_mtrr()
 2028 02:53:13.145656  CPU physical address size: 39 bits
 2029 02:53:13.149337  CPU physical address size: 39 bits
 2030 02:53:13.152476  MTRR: Fixed MSR 0x250 0x0606060606060606
 2031 02:53:13.158624  MTRR: Fixed MSR 0x250 0x0606060606060606
 2032 02:53:13.162260  MTRR: Fixed MSR 0x258 0x0606060606060606
 2033 02:53:13.166026  MTRR: Fixed MSR 0x259 0x0000000000000000
 2034 02:53:13.169174  MTRR: Fixed MSR 0x268 0x0606060606060606
 2035 02:53:13.175794  MTRR: Fixed MSR 0x269 0x0606060606060606
 2036 02:53:13.179279  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2037 02:53:13.182514  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2038 02:53:13.185793  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2039 02:53:13.188712  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2040 02:53:13.195471  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2041 02:53:13.199006  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2042 02:53:13.205281  MTRR: Fixed MSR 0x258 0x0606060606060606
 2043 02:53:13.205860  call enable_fixed_mtrr()
 2044 02:53:13.212008  MTRR: Fixed MSR 0x259 0x0000000000000000
 2045 02:53:13.214901  MTRR: Fixed MSR 0x268 0x0606060606060606
 2046 02:53:13.218397  MTRR: Fixed MSR 0x269 0x0606060606060606
 2047 02:53:13.222067  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2048 02:53:13.225088  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2049 02:53:13.231949  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2050 02:53:13.235290  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2051 02:53:13.238715  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2052 02:53:13.242036  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2053 02:53:13.245987  CPU physical address size: 39 bits
 2054 02:53:13.253164  call enable_fixed_mtrr()
 2055 02:53:13.253674  Reading cr50 TPM mode
 2056 02:53:13.256452  CPU physical address size: 39 bits
 2057 02:53:13.264197  BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
 2058 02:53:13.273744  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2059 02:53:13.277274  Checking segment from ROM address 0xffc02b38
 2060 02:53:13.280306  Checking segment from ROM address 0xffc02b54
 2061 02:53:13.286959  Loading segment from ROM address 0xffc02b38
 2062 02:53:13.287579    code (compression=0)
 2063 02:53:13.296839    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2064 02:53:13.306248  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2065 02:53:13.306808  it's not compressed!
 2066 02:53:13.446392  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2067 02:53:13.452955  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2068 02:53:13.459787  Loading segment from ROM address 0xffc02b54
 2069 02:53:13.463159    Entry Point 0x30000000
 2070 02:53:13.463658  Loaded segments
 2071 02:53:13.469524  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
 2072 02:53:13.513356  Finalizing chipset.
 2073 02:53:13.516161  Finalizing SMM.
 2074 02:53:13.516765  APMC done.
 2075 02:53:13.522300  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
 2076 02:53:13.525441  mp_park_aps done after 0 msecs.
 2077 02:53:13.529208  Jumping to boot code at 0x30000000(0x76b25000)
 2078 02:53:13.539763  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2079 02:53:13.540378  
 2080 02:53:13.542524  Starting depthcharge on Voema...
 2081 02:53:13.543778  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2082 02:53:13.544357  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2083 02:53:13.544815  Setting prompt string to ['volteer:']
 2084 02:53:13.545297  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2085 02:53:13.552204  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2086 02:53:13.558892  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2087 02:53:13.562111  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2088 02:53:13.569149  Failed to find eMMC card reader
 2089 02:53:13.569770  Wipe memory regions:
 2090 02:53:13.575424  	[0x00000000001000, 0x000000000a0000)
 2091 02:53:13.579031  	[0x00000000100000, 0x00000030000000)
 2092 02:53:13.608380  	[0x00000032662db0, 0x000000769ef000)
 2093 02:53:13.647938  	[0x00000100000000, 0x00000280400000)
 2094 02:53:13.853086  ec_init: CrosEC protocol v3 supported (256, 256)
 2095 02:53:13.859230  update_port_state: port C0 state: usb enable 1 mux conn 0
 2096 02:53:13.869112  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
 2097 02:53:13.872361  pmc_check_ipc_sts: STS_BUSY done after 1512 us
 2098 02:53:13.879112  send_conn_disc_msg: pmc_send_cmd succeeded
 2099 02:53:14.310620  R8152: Initializing
 2100 02:53:14.313533  Version 6 (ocp_data = 5c30)
 2101 02:53:14.316910  R8152: Done initializing
 2102 02:53:14.320211  Adding net device
 2103 02:53:14.625370  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2104 02:53:14.625985  
 2105 02:53:14.629242  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2107 02:53:14.731235  volteer: tftpboot 192.168.201.1 6693671/tftp-deploy-yabv7xgk/kernel/bzImage 6693671/tftp-deploy-yabv7xgk/kernel/cmdline 6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
 2108 02:53:14.731949  Setting prompt string to ['Starting kernel']
 2109 02:53:14.732371  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2110 02:53:14.732786  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
 2111 02:53:14.737141  tftpboot 192.168.201.1 6693671/tftp-deploy-yabv7xgk/kernel/bzImoy-yabv7xgk/kernel/cmdline 6693671/tftp-deploy-yabv7xgk/ramdisk/ramdisk.cpio.gz
 2112 02:53:14.737788  Waiting for link
 2113 02:53:14.941596  done.
 2114 02:53:14.942154  MAC: 00:24:32:30:7c:e4
 2115 02:53:14.945307  Sending DHCP discover... done.
 2116 02:53:14.947980  Waiting for reply... done.
 2117 02:53:14.952044  Sending DHCP request... done.
 2118 02:53:14.959102  Waiting for reply... done.
 2119 02:53:14.959725  My ip is 192.168.201.12
 2120 02:53:14.961818  The DHCP server ip is 192.168.201.1
 2121 02:53:14.968926  TFTP server IP predefined by user: 192.168.201.1
 2122 02:53:14.975453  Bootfile predefined by user: 6693671/tftp-deploy-yabv7xgk/kernel/bzImage
 2123 02:53:14.978466  Sending tftp read request... done.
 2124 02:53:14.985550  Waiting for the transfer... 
 2125 02:53:15.619177  00000000 ################################################################
 2126 02:53:16.272022  00080000 ################################################################
 2127 02:53:16.941183  00100000 ################################################################
 2128 02:53:17.529276  00180000 ################################################################
 2129 02:53:18.139866  00200000 ################################################################
 2130 02:53:18.781192  00280000 ################################################################
 2131 02:53:19.413477  00300000 ################################################################
 2132 02:53:20.032174  00380000 ################################################################
 2133 02:53:20.624638  00400000 ################################################################
 2134 02:53:21.270260  00480000 ################################################################
 2135 02:53:21.952438  00500000 ################################################################
 2136 02:53:22.648662  00580000 ################################################################
 2137 02:53:23.320354  00600000 ################################################################
 2138 02:53:23.998125  00680000 ################################################################
 2139 02:53:24.671290  00700000 ################################################################
 2140 02:53:25.348806  00780000 ################################################################
 2141 02:53:26.016167  00800000 ################################################################
 2142 02:53:26.067343  00880000 ###### done.
 2143 02:53:26.070576  The bootfile was 8953856 bytes long.
 2144 02:53:26.073641  Sending tftp read request... done.
 2145 02:53:26.077200  Waiting for the transfer... 
 2146 02:53:26.765373  00000000 ################################################################
 2147 02:53:27.461107  00080000 ################################################################
 2148 02:53:28.111579  00100000 ################################################################
 2149 02:53:28.773547  00180000 ################################################################
 2150 02:53:29.469918  00200000 ################################################################
 2151 02:53:30.172719  00280000 ################################################################
 2152 02:53:30.868540  00300000 ################################################################
 2153 02:53:31.550150  00380000 ################################################################
 2154 02:53:32.201419  00400000 ################################################################
 2155 02:53:32.854729  00480000 ################################################################
 2156 02:53:33.542655  00500000 ################################################################
 2157 02:53:34.125354  00580000 ################################################################
 2158 02:53:34.804142  00600000 ################################################################
 2159 02:53:35.503972  00680000 ################################################################
 2160 02:53:36.198023  00700000 ################################################################
 2161 02:53:36.906597  00780000 ################################################################
 2162 02:53:37.156581  00800000 ####################### done.
 2163 02:53:37.159971  Sending tftp read request... done.
 2164 02:53:37.163533  Waiting for the transfer... 
 2165 02:53:37.163984  00000000 # done.
 2166 02:53:37.172928  Command line loaded dynamically from TFTP file: 6693671/tftp-deploy-yabv7xgk/kernel/cmdline
 2167 02:53:37.186458  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2168 02:53:37.194323  Shutting down all USB controllers.
 2169 02:53:37.194753  Removing current net device
 2170 02:53:37.197610  Finalizing coreboot
 2171 02:53:37.203719  Exiting depthcharge with code 4 at timestamp: 32307304
 2172 02:53:37.204140  
 2173 02:53:37.204527  Starting kernel ...
 2174 02:53:37.204855  
 2175 02:53:37.205213  
 2176 02:53:37.206044  end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
 2177 02:53:37.206589  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2178 02:53:37.206995  Setting prompt string to ['Linux version [0-9]']
 2179 02:53:37.207370  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
 2180 02:53:37.207780  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
 2182 02:57:57.207529  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2184 02:57:57.208665  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2186 02:57:57.209566  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2189 02:57:57.211164  end: 2 depthcharge-action (duration 00:05:00) [common]
 2191 02:57:57.212269  Cleaning after the job
 2192 02:57:57.212525  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/ramdisk
 2193 02:57:57.213174  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/kernel
 2194 02:57:57.213873  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6693671/tftp-deploy-yabv7xgk/modules
 2195 02:57:57.214074  start: 5.1 power-off (timeout 00:00:30) [common]
 2196 02:57:57.214225  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
 2197 02:57:57.233147  >> Command sent successfully.

 2198 02:57:57.235051  Returned 0 in 0 seconds
 2199 02:57:57.336362  end: 5.1 power-off (duration 00:00:00) [common]
 2201 02:57:57.338181  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2202 02:57:57.339380  Listened to connection for namespace 'common' for up to 1s
 2203 02:57:58.344049  Finalising connection for namespace 'common'
 2204 02:57:58.344778  Disconnecting from shell: Finalise
 2205 02:57:58.445995  end: 5.2 read-feedback (duration 00:00:01) [common]
 2206 02:57:58.446643  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6693671
 2207 02:57:58.454460  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6693671
 2208 02:57:58.454575  JobError: Your job cannot terminate cleanly.