Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:45:57.521454 lava-dispatcher, installed at version: 2022.06
2 05:45:57.521634 start: 0 validate
3 05:45:57.521763 Start time: 2022-08-23 05:45:57.521756+00:00 (UTC)
4 05:45:57.521893 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:45:57.522022 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
6 05:45:57.812285 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:45:57.813127 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:45:58.109508 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:45:58.110289 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 05:45:58.410080 validate duration: 0.89
12 05:45:58.411367 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:45:58.411937 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:45:58.412462 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:45:58.412982 Not decompressing ramdisk as can be used compressed.
16 05:45:58.413446 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
17 05:45:58.413788 saving as /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/ramdisk/rootfs.cpio.gz
18 05:45:58.414106 total size: 8415960 (8MB)
19 05:45:58.419066 progress 0% (0MB)
20 05:45:58.429981 progress 5% (0MB)
21 05:45:58.439067 progress 10% (0MB)
22 05:45:58.445406 progress 15% (1MB)
23 05:45:58.450039 progress 20% (1MB)
24 05:45:58.453865 progress 25% (2MB)
25 05:45:58.457364 progress 30% (2MB)
26 05:45:58.460560 progress 35% (2MB)
27 05:45:58.463489 progress 40% (3MB)
28 05:45:58.466263 progress 45% (3MB)
29 05:45:58.468820 progress 50% (4MB)
30 05:45:58.471242 progress 55% (4MB)
31 05:45:58.473635 progress 60% (4MB)
32 05:45:58.475779 progress 65% (5MB)
33 05:45:58.477902 progress 70% (5MB)
34 05:45:58.479999 progress 75% (6MB)
35 05:45:58.482037 progress 80% (6MB)
36 05:45:58.484068 progress 85% (6MB)
37 05:45:58.486185 progress 90% (7MB)
38 05:45:58.488214 progress 95% (7MB)
39 05:45:58.490360 progress 100% (8MB)
40 05:45:58.490635 8MB downloaded in 0.08s (104.87MB/s)
41 05:45:58.490805 end: 1.1.1 http-download (duration 00:00:00) [common]
43 05:45:58.491058 end: 1.1 download-retry (duration 00:00:00) [common]
44 05:45:58.491148 start: 1.2 download-retry (timeout 00:10:00) [common]
45 05:45:58.491237 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 05:45:58.491347 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 05:45:58.491416 saving as /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/kernel/bzImage
48 05:45:58.491479 total size: 8953856 (8MB)
49 05:45:58.491540 No compression specified
50 05:45:58.492612 progress 0% (0MB)
51 05:45:58.494872 progress 5% (0MB)
52 05:45:58.497204 progress 10% (0MB)
53 05:45:58.499285 progress 15% (1MB)
54 05:45:58.501564 progress 20% (1MB)
55 05:45:58.503826 progress 25% (2MB)
56 05:45:58.505957 progress 30% (2MB)
57 05:45:58.508186 progress 35% (3MB)
58 05:45:58.510472 progress 40% (3MB)
59 05:45:58.512551 progress 45% (3MB)
60 05:45:58.514816 progress 50% (4MB)
61 05:45:58.517058 progress 55% (4MB)
62 05:45:58.519109 progress 60% (5MB)
63 05:45:58.521351 progress 65% (5MB)
64 05:45:58.523538 progress 70% (6MB)
65 05:45:58.525627 progress 75% (6MB)
66 05:45:58.527825 progress 80% (6MB)
67 05:45:58.530092 progress 85% (7MB)
68 05:45:58.532132 progress 90% (7MB)
69 05:45:58.534372 progress 95% (8MB)
70 05:45:58.536571 progress 100% (8MB)
71 05:45:58.536758 8MB downloaded in 0.05s (188.61MB/s)
72 05:45:58.536948 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:45:58.537193 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:45:58.537283 start: 1.3 download-retry (timeout 00:10:00) [common]
76 05:45:58.537376 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 05:45:58.537484 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 05:45:58.537552 saving as /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/modules/modules.tar
79 05:45:58.537613 total size: 64712 (0MB)
80 05:45:58.537681 Using unxz to decompress xz
81 05:45:58.541121 progress 50% (0MB)
82 05:45:58.541504 progress 100% (0MB)
83 05:45:58.545885 0MB downloaded in 0.01s (7.47MB/s)
84 05:45:58.546134 end: 1.3.1 http-download (duration 00:00:00) [common]
86 05:45:58.546401 end: 1.3 download-retry (duration 00:00:00) [common]
87 05:45:58.546500 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 05:45:58.546597 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 05:45:58.546684 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 05:45:58.546774 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 05:45:58.546943 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr
92 05:45:58.547053 makedir: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin
93 05:45:58.547138 makedir: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/tests
94 05:45:58.547222 makedir: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/results
95 05:45:58.547332 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-add-keys
96 05:45:58.547465 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-add-sources
97 05:45:58.547583 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-background-process-start
98 05:45:58.547696 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-background-process-stop
99 05:45:58.547810 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-common-functions
100 05:45:58.547961 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-echo-ipv4
101 05:45:58.548078 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-install-packages
102 05:45:58.548191 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-installed-packages
103 05:45:58.548301 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-os-build
104 05:45:58.548410 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-probe-channel
105 05:45:58.548522 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-probe-ip
106 05:45:58.548630 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-target-ip
107 05:45:58.548741 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-target-mac
108 05:45:58.548894 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-target-storage
109 05:45:58.549012 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-case
110 05:45:58.549121 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-event
111 05:45:58.549230 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-feedback
112 05:45:58.549338 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-raise
113 05:45:58.549456 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-reference
114 05:45:58.549564 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-runner
115 05:45:58.549672 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-set
116 05:45:58.549784 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-test-shell
117 05:45:58.549897 Updating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-install-packages (oe)
118 05:45:58.550011 Updating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/bin/lava-installed-packages (oe)
119 05:45:58.550112 Creating /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/environment
120 05:45:58.550199 LAVA metadata
121 05:45:58.550271 - LAVA_JOB_ID=7096690
122 05:45:58.550339 - LAVA_DISPATCHER_IP=192.168.201.1
123 05:45:58.550443 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 05:45:58.550514 skipped lava-vland-overlay
125 05:45:58.550592 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 05:45:58.550682 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 05:45:58.550748 skipped lava-multinode-overlay
128 05:45:58.550824 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 05:45:58.550915 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 05:45:58.550992 Loading test definitions
131 05:45:58.551092 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 05:45:58.551178 Using /lava-7096690 at stage 0
133 05:45:58.551455 uuid=7096690_1.4.2.3.1 testdef=None
134 05:45:58.551547 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 05:45:58.551638 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 05:45:58.552171 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 05:45:58.552419 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 05:45:58.553041 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 05:45:58.553286 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 05:45:58.553835 runner path: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/0/tests/0_dmesg test_uuid 7096690_1.4.2.3.1
143 05:45:58.553990 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 05:45:58.554225 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 05:45:58.554300 Using /lava-7096690 at stage 1
147 05:45:58.554551 uuid=7096690_1.4.2.3.5 testdef=None
148 05:45:58.554643 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 05:45:58.554732 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 05:45:58.555175 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 05:45:58.555403 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 05:45:58.555982 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 05:45:58.556223 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 05:45:58.556774 runner path: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/1/tests/1_bootrr test_uuid 7096690_1.4.2.3.5
157 05:45:58.556960 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 05:45:58.557179 Creating lava-test-runner.conf files
160 05:45:58.557245 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/0 for stage 0
161 05:45:58.557328 - 0_dmesg
162 05:45:58.557405 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096690/lava-overlay-_h1yywqr/lava-7096690/1 for stage 1
163 05:45:58.557494 - 1_bootrr
164 05:45:58.557586 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 05:45:58.557673 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 05:45:58.563907 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 05:45:58.564019 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 05:45:58.564110 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 05:45:58.564203 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 05:45:58.564292 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 05:45:58.750905 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 05:45:58.751245 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 05:45:58.751358 extracting modules file /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096690/extract-overlay-ramdisk-ly2pcc2o/ramdisk
174 05:45:58.755590 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 05:45:58.755707 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 05:45:58.755793 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096690/compress-overlay-f2zeuzbp/overlay-1.4.2.4.tar.gz to ramdisk
177 05:45:58.755866 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096690/compress-overlay-f2zeuzbp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096690/extract-overlay-ramdisk-ly2pcc2o/ramdisk
178 05:45:58.759748 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 05:45:58.759860 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 05:45:58.759953 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 05:45:58.760046 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 05:45:58.760124 Building ramdisk /var/lib/lava/dispatcher/tmp/7096690/extract-overlay-ramdisk-ly2pcc2o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096690/extract-overlay-ramdisk-ly2pcc2o/ramdisk
183 05:45:58.827164 >> 48236 blocks
184 05:45:59.634273 rename /var/lib/lava/dispatcher/tmp/7096690/extract-overlay-ramdisk-ly2pcc2o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
185 05:45:59.634682 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 05:45:59.634811 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 05:45:59.634915 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 05:45:59.635014 No mkimage arch provided, not using FIT.
189 05:45:59.635112 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 05:45:59.635199 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 05:45:59.635303 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 05:45:59.635406 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 05:45:59.635492 No LXC device requested
194 05:45:59.635582 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 05:45:59.635677 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 05:45:59.635762 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 05:45:59.635839 Checking files for TFTP limit of 4294967296 bytes.
198 05:45:59.636280 end: 1 tftp-deploy (duration 00:00:01) [common]
199 05:45:59.636391 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 05:45:59.636492 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 05:45:59.636624 substitutions:
202 05:45:59.636698 - {DTB}: None
203 05:45:59.636767 - {INITRD}: 7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
204 05:45:59.636841 - {KERNEL}: 7096690/tftp-deploy-gbchows6/kernel/bzImage
205 05:45:59.636905 - {LAVA_MAC}: None
206 05:45:59.636965 - {PRESEED_CONFIG}: None
207 05:45:59.637025 - {PRESEED_LOCAL}: None
208 05:45:59.637083 - {RAMDISK}: 7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
209 05:45:59.637142 - {ROOT_PART}: None
210 05:45:59.637200 - {ROOT}: None
211 05:45:59.637258 - {SERVER_IP}: 192.168.201.1
212 05:45:59.637315 - {TEE}: None
213 05:45:59.637372 Parsed boot commands:
214 05:45:59.637429 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 05:45:59.637587 Parsed boot commands: tftpboot 192.168.201.1 7096690/tftp-deploy-gbchows6/kernel/bzImage 7096690/tftp-deploy-gbchows6/kernel/cmdline 7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
216 05:45:59.637681 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 05:45:59.637773 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 05:45:59.637875 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 05:45:59.637966 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 05:45:59.638041 Not connected, no need to disconnect.
221 05:45:59.638119 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 05:45:59.638204 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 05:45:59.638274 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 05:45:59.641063 Setting prompt string to ['lava-test: # ']
225 05:45:59.641366 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 05:45:59.641473 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 05:45:59.641577 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 05:45:59.641672 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 05:45:59.641857 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 05:45:59.661435 >> Command sent successfully.
231 05:45:59.663496 Returned 0 in 0 seconds
232 05:45:59.764274 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 05:45:59.764866 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 05:45:59.765005 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 05:45:59.765099 Setting prompt string to 'Starting depthcharge on Helios...'
237 05:45:59.765169 Changing prompt to 'Starting depthcharge on Helios...'
238 05:45:59.765258 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 05:45:59.765556 [Enter `^Ec?' for help]
240 05:46:06.613154
241 05:46:06.613730
242 05:46:06.622545 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 05:46:06.625891 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 05:46:06.632388 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 05:46:06.635999 CPU: AES supported, TXT NOT supported, VT supported
246 05:46:06.642498 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 05:46:06.648955 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 05:46:06.652191 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 05:46:06.655740 VBOOT: Loading verstage.
250 05:46:06.662169 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 05:46:06.665419 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 05:46:06.671841 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 05:46:06.675790 CBFS @ c08000 size 3f8000
254 05:46:06.678363 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 05:46:06.682422 CBFS: Locating 'fallback/verstage'
256 05:46:06.688390 CBFS: Found @ offset 10fb80 size 1072c
257 05:46:06.688902
258 05:46:06.689349
259 05:46:06.698586 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 05:46:06.714071 Probing TPM: . done!
261 05:46:06.717213 TPM ready after 0 ms
262 05:46:06.720768 Connected to device vid:did:rid of 1ae0:0028:00
263 05:46:06.730858 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 05:46:06.734738 Initialized TPM device CR50 revision 0
265 05:46:06.777798 tlcl_send_startup: Startup return code is 0
266 05:46:06.778364 TPM: setup succeeded
267 05:46:06.790620 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 05:46:06.794558 Chrome EC: UHEPI supported
269 05:46:06.797979 Phase 1
270 05:46:06.801166 FMAP: area GBB found @ c05000 (12288 bytes)
271 05:46:06.807797 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 05:46:06.811169 Phase 2
273 05:46:06.811629 Phase 3
274 05:46:06.814377 FMAP: area GBB found @ c05000 (12288 bytes)
275 05:46:06.820828 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 05:46:06.827459 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 05:46:06.830701 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 05:46:06.837097 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 05:46:06.853023 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 05:46:06.857073 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 05:46:06.863510 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 05:46:06.867350 Phase 4
283 05:46:06.870547 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 05:46:06.880751 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 05:46:07.056858 VB2:vb2_rsa_verify_digest() Digest check failed!
286 05:46:07.063302 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 05:46:07.063757 Saving nvdata
288 05:46:07.066515 Reboot requested (10020007)
289 05:46:07.069750 board_reset() called!
290 05:46:07.070191 full_reset() called!
291 05:46:11.579768
292 05:46:11.580292
293 05:46:11.589699 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 05:46:11.593453 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 05:46:11.599609 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 05:46:11.602949 CPU: AES supported, TXT NOT supported, VT supported
297 05:46:11.609447 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 05:46:11.615944 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 05:46:11.619332 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 05:46:11.622845 VBOOT: Loading verstage.
301 05:46:11.629312 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 05:46:11.632597 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 05:46:11.639293 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 05:46:11.642577 CBFS @ c08000 size 3f8000
305 05:46:11.645748 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 05:46:11.649027 CBFS: Locating 'fallback/verstage'
307 05:46:11.655632 CBFS: Found @ offset 10fb80 size 1072c
308 05:46:11.656058
309 05:46:11.656418
310 05:46:11.665048 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 05:46:11.681213 Probing TPM: . done!
312 05:46:11.684611 TPM ready after 0 ms
313 05:46:11.688008 Connected to device vid:did:rid of 1ae0:0028:00
314 05:46:11.698312 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 05:46:11.701516 Initialized TPM device CR50 revision 0
316 05:46:11.745937 tlcl_send_startup: Startup return code is 0
317 05:46:11.746439 TPM: setup succeeded
318 05:46:11.759081 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 05:46:11.762053 Chrome EC: UHEPI supported
320 05:46:11.765504 Phase 1
321 05:46:11.769382 FMAP: area GBB found @ c05000 (12288 bytes)
322 05:46:11.775515 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 05:46:11.782414 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 05:46:11.785856 Recovery requested (1009000e)
325 05:46:11.791546 Saving nvdata
326 05:46:11.797504 tlcl_extend: response is 0
327 05:46:11.806732 tlcl_extend: response is 0
328 05:46:11.813699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 05:46:11.816830 CBFS @ c08000 size 3f8000
330 05:46:11.823094 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 05:46:11.826375 CBFS: Locating 'fallback/romstage'
332 05:46:11.829467 CBFS: Found @ offset 80 size 145fc
333 05:46:11.832650 Accumulated console time in verstage 98 ms
334 05:46:11.832735
335 05:46:11.835914
336 05:46:11.845813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 05:46:11.852183 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 05:46:11.856446 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 05:46:11.858997 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 05:46:11.866064 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 05:46:11.869372 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 05:46:11.872629 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 05:46:11.875429 TCO_STS: 0000 0000
344 05:46:11.879735 GEN_PMCON: e0015238 00000200
345 05:46:11.882236 GBLRST_CAUSE: 00000000 00000000
346 05:46:11.885257 prev_sleep_state 5
347 05:46:11.888524 Boot Count incremented to 29303
348 05:46:11.891550 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 05:46:11.895533 CBFS @ c08000 size 3f8000
350 05:46:11.902009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 05:46:11.905345 CBFS: Locating 'fspm.bin'
352 05:46:11.908525 CBFS: Found @ offset 5ffc0 size 71000
353 05:46:11.911761 Chrome EC: UHEPI supported
354 05:46:11.918337 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 05:46:11.922843 Probing TPM: done!
356 05:46:11.929212 Connected to device vid:did:rid of 1ae0:0028:00
357 05:46:11.939583 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 05:46:11.946032 Initialized TPM device CR50 revision 0
359 05:46:11.955716 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 05:46:11.965607 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 05:46:11.966073 MRC cache found, size 1948
362 05:46:11.968849 bootmode is set to: 2
363 05:46:11.972067 PRMRR disabled by config.
364 05:46:11.975413 SPD INDEX = 1
365 05:46:11.978520 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 05:46:11.981841 CBFS @ c08000 size 3f8000
367 05:46:11.988232 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 05:46:11.988678 CBFS: Locating 'spd.bin'
369 05:46:11.991437 CBFS: Found @ offset 5fb80 size 400
370 05:46:11.994866 SPD: module type is LPDDR3
371 05:46:11.998096 SPD: module part is
372 05:46:12.004889 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 05:46:12.008102 SPD: device width 4 bits, bus width 8 bits
374 05:46:12.011465 SPD: module size is 4096 MB (per channel)
375 05:46:12.014442 memory slot: 0 configuration done.
376 05:46:12.018015 memory slot: 2 configuration done.
377 05:46:12.070499 CBMEM:
378 05:46:12.073096 IMD: root @ 99fff000 254 entries.
379 05:46:12.076898 IMD: root @ 99ffec00 62 entries.
380 05:46:12.080234 External stage cache:
381 05:46:12.083568 IMD: root @ 9abff000 254 entries.
382 05:46:12.086700 IMD: root @ 9abfec00 62 entries.
383 05:46:12.093086 Chrome EC: clear events_b mask to 0x0000000020004000
384 05:46:12.105522 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 05:46:12.117477 tlcl_write: response is 0
386 05:46:12.130465 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 05:46:12.136957 MRC: TPM MRC hash updated successfully.
388 05:46:12.137063 2 DIMMs found
389 05:46:12.140415 SMM Memory Map
390 05:46:12.143390 SMRAM : 0x9a000000 0x1000000
391 05:46:12.146778 Subregion 0: 0x9a000000 0xa00000
392 05:46:12.149980 Subregion 1: 0x9aa00000 0x200000
393 05:46:12.153425 Subregion 2: 0x9ac00000 0x400000
394 05:46:12.156465 top_of_ram = 0x9a000000
395 05:46:12.159845 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 05:46:12.166876 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 05:46:12.169915 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 05:46:12.176431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 05:46:12.179838 CBFS @ c08000 size 3f8000
400 05:46:12.182944 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 05:46:12.189616 CBFS: Locating 'fallback/postcar'
402 05:46:12.192757 CBFS: Found @ offset 107000 size 4b44
403 05:46:12.199427 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 05:46:12.209134 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 05:46:12.212495 Processing 180 relocs. Offset value of 0x97c0c000
406 05:46:12.220407 Accumulated console time in romstage 286 ms
407 05:46:12.220494
408 05:46:12.220563
409 05:46:12.230732 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 05:46:12.237378 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 05:46:12.240597 CBFS @ c08000 size 3f8000
412 05:46:12.247079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 05:46:12.250249 CBFS: Locating 'fallback/ramstage'
414 05:46:12.253655 CBFS: Found @ offset 43380 size 1b9e8
415 05:46:12.260071 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 05:46:12.292038 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 05:46:12.295417 Processing 3976 relocs. Offset value of 0x98db0000
418 05:46:12.302218 Accumulated console time in postcar 52 ms
419 05:46:12.302376
420 05:46:12.302502
421 05:46:12.311928 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 05:46:12.319118 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 05:46:12.322130 WARNING: RO_VPD is uninitialized or empty.
424 05:46:12.325434 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 05:46:12.331818 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 05:46:12.331910 Normal boot.
427 05:46:12.338579 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 05:46:12.341799 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 05:46:12.344964 CBFS @ c08000 size 3f8000
430 05:46:12.351553 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 05:46:12.354770 CBFS: Locating 'cpu_microcode_blob.bin'
432 05:46:12.357931 CBFS: Found @ offset 14700 size 2ec00
433 05:46:12.361808 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 05:46:12.364995 Skip microcode update
435 05:46:12.371334 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 05:46:12.371554 CBFS @ c08000 size 3f8000
437 05:46:12.378442 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 05:46:12.381030 CBFS: Locating 'fsps.bin'
439 05:46:12.384973 CBFS: Found @ offset d1fc0 size 35000
440 05:46:12.410828 Detected 4 core, 8 thread CPU.
441 05:46:12.413984 Setting up SMI for CPU
442 05:46:12.416946 IED base = 0x9ac00000
443 05:46:12.417031 IED size = 0x00400000
444 05:46:12.420320 Will perform SMM setup.
445 05:46:12.426838 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 05:46:12.433137 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 05:46:12.439929 Processing 16 relocs. Offset value of 0x00030000
448 05:46:12.440045 Attempting to start 7 APs
449 05:46:12.446253 Waiting for 10ms after sending INIT.
450 05:46:12.460170 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
451 05:46:12.460352 done.
452 05:46:12.463305 AP: slot 6 apic_id 4.
453 05:46:12.466646 AP: slot 7 apic_id 5.
454 05:46:12.466737 AP: slot 5 apic_id 7.
455 05:46:12.469628 AP: slot 2 apic_id 6.
456 05:46:12.472991 Waiting for 2nd SIPI to complete...done.
457 05:46:12.476169 AP: slot 1 apic_id 2.
458 05:46:12.479423 AP: slot 4 apic_id 3.
459 05:46:12.486088 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 05:46:12.492667 Processing 13 relocs. Offset value of 0x00038000
461 05:46:12.499719 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 05:46:12.502914 Installing SMM handler to 0x9a000000
463 05:46:12.509540 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 05:46:12.515987 Processing 658 relocs. Offset value of 0x9a010000
465 05:46:12.522422 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 05:46:12.525741 Processing 13 relocs. Offset value of 0x9a008000
467 05:46:12.532127 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 05:46:12.538944 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 05:46:12.546039 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 05:46:12.549160 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 05:46:12.555719 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 05:46:12.562167 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 05:46:12.568666 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 05:46:12.575417 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 05:46:12.578502 Clearing SMI status registers
476 05:46:12.578612 SMI_STS: PM1
477 05:46:12.581916 PM1_STS: PWRBTN
478 05:46:12.582001 TCO_STS: SECOND_TO
479 05:46:12.585027 New SMBASE 0x9a000000
480 05:46:12.588332 In relocation handler: CPU 0
481 05:46:12.591635 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 05:46:12.598302 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 05:46:12.598388 Relocation complete.
484 05:46:12.601381 New SMBASE 0x99fff400
485 05:46:12.604595 In relocation handler: CPU 3
486 05:46:12.608527 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
487 05:46:12.614969 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 05:46:12.615055 Relocation complete.
489 05:46:12.618245 New SMBASE 0x99fff000
490 05:46:12.621406 In relocation handler: CPU 4
491 05:46:12.625003 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
492 05:46:12.631273 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 05:46:12.631365 Relocation complete.
494 05:46:12.634495 New SMBASE 0x99fffc00
495 05:46:12.637851 In relocation handler: CPU 1
496 05:46:12.641810 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
497 05:46:12.644406 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 05:46:12.648257 Relocation complete.
499 05:46:12.651109 New SMBASE 0x99ffec00
500 05:46:12.655020 In relocation handler: CPU 5
501 05:46:12.657816 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
502 05:46:12.660829 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 05:46:12.664225 Relocation complete.
504 05:46:12.667986 New SMBASE 0x99fff800
505 05:46:12.671180 In relocation handler: CPU 2
506 05:46:12.674584 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
507 05:46:12.677792 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 05:46:12.681069 Relocation complete.
509 05:46:12.684276 New SMBASE 0x99ffe400
510 05:46:12.687465 In relocation handler: CPU 7
511 05:46:12.690678 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
512 05:46:12.693890 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 05:46:12.697028 Relocation complete.
514 05:46:12.700214 New SMBASE 0x99ffe800
515 05:46:12.703566 In relocation handler: CPU 6
516 05:46:12.706884 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
517 05:46:12.710106 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 05:46:12.713364 Relocation complete.
519 05:46:12.716688 Initializing CPU #0
520 05:46:12.719945 CPU: vendor Intel device 806ec
521 05:46:12.723868 CPU: family 06, model 8e, stepping 0c
522 05:46:12.726665 Clearing out pending MCEs
523 05:46:12.727101 Setting up local APIC...
524 05:46:12.730428 apic_id: 0x00 done.
525 05:46:12.733668 Turbo is available but hidden
526 05:46:12.736894 Turbo is available and visible
527 05:46:12.740126 VMX status: enabled
528 05:46:12.743406 IA32_FEATURE_CONTROL status: locked
529 05:46:12.743925 Skip microcode update
530 05:46:12.746534 CPU #0 initialized
531 05:46:12.749875 Initializing CPU #3
532 05:46:12.750312 Initializing CPU #1
533 05:46:12.753293 Initializing CPU #4
534 05:46:12.756387 CPU: vendor Intel device 806ec
535 05:46:12.759682 CPU: family 06, model 8e, stepping 0c
536 05:46:12.762810 CPU: vendor Intel device 806ec
537 05:46:12.766117 CPU: family 06, model 8e, stepping 0c
538 05:46:12.769467 Clearing out pending MCEs
539 05:46:12.772515 Clearing out pending MCEs
540 05:46:12.776285 Setting up local APIC...
541 05:46:12.776729 Initializing CPU #7
542 05:46:12.779612 Initializing CPU #6
543 05:46:12.780074 apic_id: 0x02 done.
544 05:46:12.782791 Setting up local APIC...
545 05:46:12.785948 CPU: vendor Intel device 806ec
546 05:46:12.789231 CPU: family 06, model 8e, stepping 0c
547 05:46:12.792391 Clearing out pending MCEs
548 05:46:12.795658 Initializing CPU #2
549 05:46:12.796092 Initializing CPU #5
550 05:46:12.799559 CPU: vendor Intel device 806ec
551 05:46:12.802727 CPU: family 06, model 8e, stepping 0c
552 05:46:12.805905 CPU: vendor Intel device 806ec
553 05:46:12.808987 CPU: family 06, model 8e, stepping 0c
554 05:46:12.812342 Clearing out pending MCEs
555 05:46:12.815639 Clearing out pending MCEs
556 05:46:12.818887 Setting up local APIC...
557 05:46:12.821917 Setting up local APIC...
558 05:46:12.822357 VMX status: enabled
559 05:46:12.825748 apic_id: 0x03 done.
560 05:46:12.828511 IA32_FEATURE_CONTROL status: locked
561 05:46:12.832435 VMX status: enabled
562 05:46:12.832908 Skip microcode update
563 05:46:12.835103 IA32_FEATURE_CONTROL status: locked
564 05:46:12.838693 CPU #1 initialized
565 05:46:12.841934 Skip microcode update
566 05:46:12.842381 apic_id: 0x01 done.
567 05:46:12.845159 CPU #4 initialized
568 05:46:12.848464 Setting up local APIC...
569 05:46:12.848950 VMX status: enabled
570 05:46:12.851922 CPU: vendor Intel device 806ec
571 05:46:12.855083 CPU: family 06, model 8e, stepping 0c
572 05:46:12.858401 CPU: vendor Intel device 806ec
573 05:46:12.861797 CPU: family 06, model 8e, stepping 0c
574 05:46:12.865386 Clearing out pending MCEs
575 05:46:12.868166 Clearing out pending MCEs
576 05:46:12.871763 Setting up local APIC...
577 05:46:12.872211 apic_id: 0x07 done.
578 05:46:12.875185 apic_id: 0x06 done.
579 05:46:12.878166 VMX status: enabled
580 05:46:12.878603 VMX status: enabled
581 05:46:12.881529 IA32_FEATURE_CONTROL status: locked
582 05:46:12.888013 IA32_FEATURE_CONTROL status: locked
583 05:46:12.888468 Skip microcode update
584 05:46:12.891175 Skip microcode update
585 05:46:12.894688 CPU #5 initialized
586 05:46:12.895122 CPU #2 initialized
587 05:46:12.897942 Setting up local APIC...
588 05:46:12.901155 IA32_FEATURE_CONTROL status: locked
589 05:46:12.904433 apic_id: 0x05 done.
590 05:46:12.904905 apic_id: 0x04 done.
591 05:46:12.907513 VMX status: enabled
592 05:46:12.911423 VMX status: enabled
593 05:46:12.914619 IA32_FEATURE_CONTROL status: locked
594 05:46:12.917905 IA32_FEATURE_CONTROL status: locked
595 05:46:12.918342 Skip microcode update
596 05:46:12.921171 Skip microcode update
597 05:46:12.924493 CPU #7 initialized
598 05:46:12.924964 CPU #6 initialized
599 05:46:12.927929 Skip microcode update
600 05:46:12.931075 CPU #3 initialized
601 05:46:12.934219 bsp_do_flight_plan done after 457 msecs.
602 05:46:12.937534 CPU: frequency set to 4200 MHz
603 05:46:12.938065 Enabling SMIs.
604 05:46:12.940940 Locking SMM.
605 05:46:12.954532 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 05:46:12.957768 CBFS @ c08000 size 3f8000
607 05:46:12.964227 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 05:46:12.964851 CBFS: Locating 'vbt.bin'
609 05:46:12.970794 CBFS: Found @ offset 5f5c0 size 499
610 05:46:12.973940 Found a VBT of 4608 bytes after decompression
611 05:46:13.158630 Display FSP Version Info HOB
612 05:46:13.161759 Reference Code - CPU = 9.0.1e.30
613 05:46:13.165002 uCode Version = 0.0.0.ca
614 05:46:13.168093 TXT ACM version = ff.ff.ff.ffff
615 05:46:13.171497 Display FSP Version Info HOB
616 05:46:13.174824 Reference Code - ME = 9.0.1e.30
617 05:46:13.177769 MEBx version = 0.0.0.0
618 05:46:13.181152 ME Firmware Version = Consumer SKU
619 05:46:13.184523 Display FSP Version Info HOB
620 05:46:13.187837 Reference Code - CML PCH = 9.0.1e.30
621 05:46:13.191609 PCH-CRID Status = Disabled
622 05:46:13.194775 PCH-CRID Original Value = ff.ff.ff.ffff
623 05:46:13.197810 PCH-CRID New Value = ff.ff.ff.ffff
624 05:46:13.200599 OPROM - RST - RAID = ff.ff.ff.ffff
625 05:46:13.203858 ChipsetInit Base Version = ff.ff.ff.ffff
626 05:46:13.210883 ChipsetInit Oem Version = ff.ff.ff.ffff
627 05:46:13.211465 Display FSP Version Info HOB
628 05:46:13.217782 Reference Code - SA - System Agent = 9.0.1e.30
629 05:46:13.220773 Reference Code - MRC = 0.7.1.6c
630 05:46:13.223499 SA - PCIe Version = 9.0.1e.30
631 05:46:13.227391 SA-CRID Status = Disabled
632 05:46:13.230445 SA-CRID Original Value = 0.0.0.c
633 05:46:13.233799 SA-CRID New Value = 0.0.0.c
634 05:46:13.234247 OPROM - VBIOS = ff.ff.ff.ffff
635 05:46:13.236995 RTC Init
636 05:46:13.240561 Set power on after power failure.
637 05:46:13.241063 Disabling Deep S3
638 05:46:13.243777 Disabling Deep S3
639 05:46:13.246988 Disabling Deep S4
640 05:46:13.247477 Disabling Deep S4
641 05:46:13.250319 Disabling Deep S5
642 05:46:13.250751 Disabling Deep S5
643 05:46:13.256903 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
644 05:46:13.260174 Enumerating buses...
645 05:46:13.263140 Show all devs... Before device enumeration.
646 05:46:13.266502 Root Device: enabled 1
647 05:46:13.269797 CPU_CLUSTER: 0: enabled 1
648 05:46:13.270248 DOMAIN: 0000: enabled 1
649 05:46:13.273000 APIC: 00: enabled 1
650 05:46:13.276901 PCI: 00:00.0: enabled 1
651 05:46:13.279969 PCI: 00:02.0: enabled 1
652 05:46:13.280417 PCI: 00:04.0: enabled 0
653 05:46:13.282670 PCI: 00:05.0: enabled 0
654 05:46:13.286331 PCI: 00:12.0: enabled 1
655 05:46:13.289671 PCI: 00:12.5: enabled 0
656 05:46:13.290104 PCI: 00:12.6: enabled 0
657 05:46:13.292862 PCI: 00:14.0: enabled 1
658 05:46:13.295952 PCI: 00:14.1: enabled 0
659 05:46:13.296383 PCI: 00:14.3: enabled 1
660 05:46:13.299144 PCI: 00:14.5: enabled 0
661 05:46:13.302524 PCI: 00:15.0: enabled 1
662 05:46:13.305825 PCI: 00:15.1: enabled 1
663 05:46:13.306261 PCI: 00:15.2: enabled 0
664 05:46:13.308945 PCI: 00:15.3: enabled 0
665 05:46:13.312138 PCI: 00:16.0: enabled 1
666 05:46:13.315409 PCI: 00:16.1: enabled 0
667 05:46:13.315851 PCI: 00:16.2: enabled 0
668 05:46:13.318585 PCI: 00:16.3: enabled 0
669 05:46:13.321913 PCI: 00:16.4: enabled 0
670 05:46:13.325125 PCI: 00:16.5: enabled 0
671 05:46:13.325560 PCI: 00:17.0: enabled 1
672 05:46:13.328445 PCI: 00:19.0: enabled 1
673 05:46:13.331733 PCI: 00:19.1: enabled 0
674 05:46:13.334936 PCI: 00:19.2: enabled 0
675 05:46:13.335494 PCI: 00:1a.0: enabled 0
676 05:46:13.338293 PCI: 00:1c.0: enabled 0
677 05:46:13.341490 PCI: 00:1c.1: enabled 0
678 05:46:13.344706 PCI: 00:1c.2: enabled 0
679 05:46:13.345197 PCI: 00:1c.3: enabled 0
680 05:46:13.348072 PCI: 00:1c.4: enabled 0
681 05:46:13.352072 PCI: 00:1c.5: enabled 0
682 05:46:13.354509 PCI: 00:1c.6: enabled 0
683 05:46:13.354968 PCI: 00:1c.7: enabled 0
684 05:46:13.358109 PCI: 00:1d.0: enabled 1
685 05:46:13.361114 PCI: 00:1d.1: enabled 0
686 05:46:13.364484 PCI: 00:1d.2: enabled 0
687 05:46:13.365002 PCI: 00:1d.3: enabled 0
688 05:46:13.367665 PCI: 00:1d.4: enabled 0
689 05:46:13.371547 PCI: 00:1d.5: enabled 1
690 05:46:13.374144 PCI: 00:1e.0: enabled 1
691 05:46:13.374553 PCI: 00:1e.1: enabled 0
692 05:46:13.378001 PCI: 00:1e.2: enabled 1
693 05:46:13.381117 PCI: 00:1e.3: enabled 1
694 05:46:13.381581 PCI: 00:1f.0: enabled 1
695 05:46:13.384357 PCI: 00:1f.1: enabled 1
696 05:46:13.387732 PCI: 00:1f.2: enabled 1
697 05:46:13.391082 PCI: 00:1f.3: enabled 1
698 05:46:13.391525 PCI: 00:1f.4: enabled 1
699 05:46:13.394255 PCI: 00:1f.5: enabled 1
700 05:46:13.397343 PCI: 00:1f.6: enabled 0
701 05:46:13.400761 USB0 port 0: enabled 1
702 05:46:13.401232 I2C: 00:15: enabled 1
703 05:46:13.403965 I2C: 00:5d: enabled 1
704 05:46:13.407317 GENERIC: 0.0: enabled 1
705 05:46:13.407758 I2C: 00:1a: enabled 1
706 05:46:13.410621 I2C: 00:38: enabled 1
707 05:46:13.413852 I2C: 00:39: enabled 1
708 05:46:13.417072 I2C: 00:3a: enabled 1
709 05:46:13.417519 I2C: 00:3b: enabled 1
710 05:46:13.420063 PCI: 00:00.0: enabled 1
711 05:46:13.423311 SPI: 00: enabled 1
712 05:46:13.423773 SPI: 01: enabled 1
713 05:46:13.426574 PNP: 0c09.0: enabled 1
714 05:46:13.430402 USB2 port 0: enabled 1
715 05:46:13.430855 USB2 port 1: enabled 1
716 05:46:13.433629 USB2 port 2: enabled 0
717 05:46:13.436879 USB2 port 3: enabled 0
718 05:46:13.437318 USB2 port 5: enabled 0
719 05:46:13.440263 USB2 port 6: enabled 1
720 05:46:13.443541 USB2 port 9: enabled 1
721 05:46:13.446722 USB3 port 0: enabled 1
722 05:46:13.447191 USB3 port 1: enabled 1
723 05:46:13.449877 USB3 port 2: enabled 1
724 05:46:13.453115 USB3 port 3: enabled 1
725 05:46:13.453554 USB3 port 4: enabled 0
726 05:46:13.456454 APIC: 02: enabled 1
727 05:46:13.459714 APIC: 06: enabled 1
728 05:46:13.460151 APIC: 01: enabled 1
729 05:46:13.463072 APIC: 03: enabled 1
730 05:46:13.466181 APIC: 07: enabled 1
731 05:46:13.466634 APIC: 04: enabled 1
732 05:46:13.469497 APIC: 05: enabled 1
733 05:46:13.469932 Compare with tree...
734 05:46:13.472939 Root Device: enabled 1
735 05:46:13.476027 CPU_CLUSTER: 0: enabled 1
736 05:46:13.479337 APIC: 00: enabled 1
737 05:46:13.479775 APIC: 02: enabled 1
738 05:46:13.482362 APIC: 06: enabled 1
739 05:46:13.485707 APIC: 01: enabled 1
740 05:46:13.486143 APIC: 03: enabled 1
741 05:46:13.488923 APIC: 07: enabled 1
742 05:46:13.492197 APIC: 04: enabled 1
743 05:46:13.492634 APIC: 05: enabled 1
744 05:46:13.495393 DOMAIN: 0000: enabled 1
745 05:46:13.498839 PCI: 00:00.0: enabled 1
746 05:46:13.501918 PCI: 00:02.0: enabled 1
747 05:46:13.505251 PCI: 00:04.0: enabled 0
748 05:46:13.505688 PCI: 00:05.0: enabled 0
749 05:46:13.508424 PCI: 00:12.0: enabled 1
750 05:46:13.511718 PCI: 00:12.5: enabled 0
751 05:46:13.514615 PCI: 00:12.6: enabled 0
752 05:46:13.518086 PCI: 00:14.0: enabled 1
753 05:46:13.521286 USB0 port 0: enabled 1
754 05:46:13.521724 USB2 port 0: enabled 1
755 05:46:13.524886 USB2 port 1: enabled 1
756 05:46:13.527773 USB2 port 2: enabled 0
757 05:46:13.531051 USB2 port 3: enabled 0
758 05:46:13.534486 USB2 port 5: enabled 0
759 05:46:13.537743 USB2 port 6: enabled 1
760 05:46:13.538185 USB2 port 9: enabled 1
761 05:46:13.541120 USB3 port 0: enabled 1
762 05:46:13.544180 USB3 port 1: enabled 1
763 05:46:13.547301 USB3 port 2: enabled 1
764 05:46:13.550446 USB3 port 3: enabled 1
765 05:46:13.553821 USB3 port 4: enabled 0
766 05:46:13.554264 PCI: 00:14.1: enabled 0
767 05:46:13.557115 PCI: 00:14.3: enabled 1
768 05:46:13.560261 PCI: 00:14.5: enabled 0
769 05:46:13.563690 PCI: 00:15.0: enabled 1
770 05:46:13.566915 I2C: 00:15: enabled 1
771 05:46:13.567359 PCI: 00:15.1: enabled 1
772 05:46:13.570471 I2C: 00:5d: enabled 1
773 05:46:13.573498 GENERIC: 0.0: enabled 1
774 05:46:13.576733 PCI: 00:15.2: enabled 0
775 05:46:13.579888 PCI: 00:15.3: enabled 0
776 05:46:13.580341 PCI: 00:16.0: enabled 1
777 05:46:13.583281 PCI: 00:16.1: enabled 0
778 05:46:13.586762 PCI: 00:16.2: enabled 0
779 05:46:13.589832 PCI: 00:16.3: enabled 0
780 05:46:13.593166 PCI: 00:16.4: enabled 0
781 05:46:13.593627 PCI: 00:16.5: enabled 0
782 05:46:13.596429 PCI: 00:17.0: enabled 1
783 05:46:13.599619 PCI: 00:19.0: enabled 1
784 05:46:13.602751 I2C: 00:1a: enabled 1
785 05:46:13.605947 I2C: 00:38: enabled 1
786 05:46:13.606379 I2C: 00:39: enabled 1
787 05:46:13.609109 I2C: 00:3a: enabled 1
788 05:46:13.612541 I2C: 00:3b: enabled 1
789 05:46:13.615741 PCI: 00:19.1: enabled 0
790 05:46:13.619222 PCI: 00:19.2: enabled 0
791 05:46:13.619654 PCI: 00:1a.0: enabled 0
792 05:46:13.622508 PCI: 00:1c.0: enabled 0
793 05:46:13.625660 PCI: 00:1c.1: enabled 0
794 05:46:13.628951 PCI: 00:1c.2: enabled 0
795 05:46:13.632122 PCI: 00:1c.3: enabled 0
796 05:46:13.632567 PCI: 00:1c.4: enabled 0
797 05:46:13.635395 PCI: 00:1c.5: enabled 0
798 05:46:13.638678 PCI: 00:1c.6: enabled 0
799 05:46:13.641881 PCI: 00:1c.7: enabled 0
800 05:46:13.645220 PCI: 00:1d.0: enabled 1
801 05:46:13.645672 PCI: 00:1d.1: enabled 0
802 05:46:13.648366 PCI: 00:1d.2: enabled 0
803 05:46:13.651674 PCI: 00:1d.3: enabled 0
804 05:46:13.655609 PCI: 00:1d.4: enabled 0
805 05:46:13.658326 PCI: 00:1d.5: enabled 1
806 05:46:13.658878 PCI: 00:00.0: enabled 1
807 05:46:13.661503 PCI: 00:1e.0: enabled 1
808 05:46:13.664762 PCI: 00:1e.1: enabled 0
809 05:46:13.667969 PCI: 00:1e.2: enabled 1
810 05:46:13.671315 SPI: 00: enabled 1
811 05:46:13.671762 PCI: 00:1e.3: enabled 1
812 05:46:13.675272 SPI: 01: enabled 1
813 05:46:13.677771 PCI: 00:1f.0: enabled 1
814 05:46:13.681801 PNP: 0c09.0: enabled 1
815 05:46:13.682238 PCI: 00:1f.1: enabled 1
816 05:46:13.684279 PCI: 00:1f.2: enabled 1
817 05:46:13.688154 PCI: 00:1f.3: enabled 1
818 05:46:13.691373 PCI: 00:1f.4: enabled 1
819 05:46:13.694609 PCI: 00:1f.5: enabled 1
820 05:46:13.695056 PCI: 00:1f.6: enabled 0
821 05:46:13.697879 Root Device scanning...
822 05:46:13.701034 scan_static_bus for Root Device
823 05:46:13.704399 CPU_CLUSTER: 0 enabled
824 05:46:13.707609 DOMAIN: 0000 enabled
825 05:46:13.708055 DOMAIN: 0000 scanning...
826 05:46:13.710995 PCI: pci_scan_bus for bus 00
827 05:46:13.714283 PCI: 00:00.0 [8086/0000] ops
828 05:46:13.717347 PCI: 00:00.0 [8086/9b61] enabled
829 05:46:13.720824 PCI: 00:02.0 [8086/0000] bus ops
830 05:46:13.724141 PCI: 00:02.0 [8086/9b41] enabled
831 05:46:13.727380 PCI: 00:04.0 [8086/1903] disabled
832 05:46:13.730515 PCI: 00:08.0 [8086/1911] enabled
833 05:46:13.737016 PCI: 00:12.0 [8086/02f9] enabled
834 05:46:13.740140 PCI: 00:14.0 [8086/0000] bus ops
835 05:46:13.743515 PCI: 00:14.0 [8086/02ed] enabled
836 05:46:13.746724 PCI: 00:14.2 [8086/02ef] enabled
837 05:46:13.750058 PCI: 00:14.3 [8086/02f0] enabled
838 05:46:13.753231 PCI: 00:15.0 [8086/0000] bus ops
839 05:46:13.756398 PCI: 00:15.0 [8086/02e8] enabled
840 05:46:13.759730 PCI: 00:15.1 [8086/0000] bus ops
841 05:46:13.762923 PCI: 00:15.1 [8086/02e9] enabled
842 05:46:13.766104 PCI: 00:16.0 [8086/0000] ops
843 05:46:13.769402 PCI: 00:16.0 [8086/02e0] enabled
844 05:46:13.769847 PCI: 00:17.0 [8086/0000] ops
845 05:46:13.772641 PCI: 00:17.0 [8086/02d3] enabled
846 05:46:13.779172 PCI: 00:19.0 [8086/0000] bus ops
847 05:46:13.782593 PCI: 00:19.0 [8086/02c5] enabled
848 05:46:13.785673 PCI: 00:1d.0 [8086/0000] bus ops
849 05:46:13.789052 PCI: 00:1d.0 [8086/02b0] enabled
850 05:46:13.792220 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 05:46:13.795469 PCI: 00:1e.0 [8086/0000] ops
852 05:46:13.798860 PCI: 00:1e.0 [8086/02a8] enabled
853 05:46:13.802086 PCI: 00:1e.2 [8086/0000] bus ops
854 05:46:13.805163 PCI: 00:1e.2 [8086/02aa] enabled
855 05:46:13.808610 PCI: 00:1e.3 [8086/0000] bus ops
856 05:46:13.811889 PCI: 00:1e.3 [8086/02ab] enabled
857 05:46:13.815171 PCI: 00:1f.0 [8086/0000] bus ops
858 05:46:13.818478 PCI: 00:1f.0 [8086/0284] enabled
859 05:46:13.825097 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 05:46:13.831347 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 05:46:13.834909 PCI: 00:1f.3 [8086/0000] bus ops
862 05:46:13.838136 PCI: 00:1f.3 [8086/02c8] enabled
863 05:46:13.841189 PCI: 00:1f.4 [8086/0000] bus ops
864 05:46:13.844497 PCI: 00:1f.4 [8086/02a3] enabled
865 05:46:13.847948 PCI: 00:1f.5 [8086/0000] bus ops
866 05:46:13.851166 PCI: 00:1f.5 [8086/02a4] enabled
867 05:46:13.854660 PCI: Leftover static devices:
868 05:46:13.855151 PCI: 00:05.0
869 05:46:13.857288 PCI: 00:12.5
870 05:46:13.857792 PCI: 00:12.6
871 05:46:13.860460 PCI: 00:14.1
872 05:46:13.860984 PCI: 00:14.5
873 05:46:13.861378 PCI: 00:15.2
874 05:46:13.863844 PCI: 00:15.3
875 05:46:13.863928 PCI: 00:16.1
876 05:46:13.867153 PCI: 00:16.2
877 05:46:13.867247 PCI: 00:16.3
878 05:46:13.867314 PCI: 00:16.4
879 05:46:13.870387 PCI: 00:16.5
880 05:46:13.870471 PCI: 00:19.1
881 05:46:13.873696 PCI: 00:19.2
882 05:46:13.873781 PCI: 00:1a.0
883 05:46:13.876817 PCI: 00:1c.0
884 05:46:13.876918 PCI: 00:1c.1
885 05:46:13.876986 PCI: 00:1c.2
886 05:46:13.879760 PCI: 00:1c.3
887 05:46:13.879851 PCI: 00:1c.4
888 05:46:13.882783 PCI: 00:1c.5
889 05:46:13.882890 PCI: 00:1c.6
890 05:46:13.882966 PCI: 00:1c.7
891 05:46:13.886226 PCI: 00:1d.1
892 05:46:13.886329 PCI: 00:1d.2
893 05:46:13.889485 PCI: 00:1d.3
894 05:46:13.889580 PCI: 00:1d.4
895 05:46:13.892689 PCI: 00:1d.5
896 05:46:13.892780 PCI: 00:1e.1
897 05:46:13.892893 PCI: 00:1f.1
898 05:46:13.896494 PCI: 00:1f.2
899 05:46:13.896608 PCI: 00:1f.6
900 05:46:13.899690 PCI: Check your devicetree.cb.
901 05:46:13.902438 PCI: 00:02.0 scanning...
902 05:46:13.906353 scan_generic_bus for PCI: 00:02.0
903 05:46:13.908971 scan_generic_bus for PCI: 00:02.0 done
904 05:46:13.915975 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
905 05:46:13.919341 PCI: 00:14.0 scanning...
906 05:46:13.922527 scan_static_bus for PCI: 00:14.0
907 05:46:13.922759 USB0 port 0 enabled
908 05:46:13.926017 USB0 port 0 scanning...
909 05:46:13.929364 scan_static_bus for USB0 port 0
910 05:46:13.932437 USB2 port 0 enabled
911 05:46:13.935720 USB2 port 1 enabled
912 05:46:13.936079 USB2 port 2 disabled
913 05:46:13.939116 USB2 port 3 disabled
914 05:46:13.942386 USB2 port 5 disabled
915 05:46:13.942885 USB2 port 6 enabled
916 05:46:13.945353 USB2 port 9 enabled
917 05:46:13.945832 USB3 port 0 enabled
918 05:46:13.948681 USB3 port 1 enabled
919 05:46:13.952034 USB3 port 2 enabled
920 05:46:13.952488 USB3 port 3 enabled
921 05:46:13.955305 USB3 port 4 disabled
922 05:46:13.958414 USB2 port 0 scanning...
923 05:46:13.961547 scan_static_bus for USB2 port 0
924 05:46:13.964836 scan_static_bus for USB2 port 0 done
925 05:46:13.972198 scan_bus: scanning of bus USB2 port 0 took 9690 usecs
926 05:46:13.972861 USB2 port 1 scanning...
927 05:46:13.975238 scan_static_bus for USB2 port 1
928 05:46:13.977842 scan_static_bus for USB2 port 1 done
929 05:46:13.984645 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
930 05:46:13.988457 USB2 port 6 scanning...
931 05:46:13.991542 scan_static_bus for USB2 port 6
932 05:46:13.994960 scan_static_bus for USB2 port 6 done
933 05:46:14.001284 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
934 05:46:14.001785 USB2 port 9 scanning...
935 05:46:14.004790 scan_static_bus for USB2 port 9
936 05:46:14.011149 scan_static_bus for USB2 port 9 done
937 05:46:14.014352 scan_bus: scanning of bus USB2 port 9 took 9698 usecs
938 05:46:14.017413 USB3 port 0 scanning...
939 05:46:14.020704 scan_static_bus for USB3 port 0
940 05:46:14.024200 scan_static_bus for USB3 port 0 done
941 05:46:14.030689 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
942 05:46:14.033797 USB3 port 1 scanning...
943 05:46:14.037057 scan_static_bus for USB3 port 1
944 05:46:14.040279 scan_static_bus for USB3 port 1 done
945 05:46:14.043678 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
946 05:46:14.046417 USB3 port 2 scanning...
947 05:46:14.049638 scan_static_bus for USB3 port 2
948 05:46:14.053208 scan_static_bus for USB3 port 2 done
949 05:46:14.060048 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
950 05:46:14.063296 USB3 port 3 scanning...
951 05:46:14.066422 scan_static_bus for USB3 port 3
952 05:46:14.069834 scan_static_bus for USB3 port 3 done
953 05:46:14.076292 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
954 05:46:14.079575 scan_static_bus for USB0 port 0 done
955 05:46:14.082228 scan_bus: scanning of bus USB0 port 0 took 155349 usecs
956 05:46:14.089441 scan_static_bus for PCI: 00:14.0 done
957 05:46:14.092548 scan_bus: scanning of bus PCI: 00:14.0 took 172967 usecs
958 05:46:14.095713 PCI: 00:15.0 scanning...
959 05:46:14.099102 scan_generic_bus for PCI: 00:15.0
960 05:46:14.102262 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 05:46:14.108698 scan_generic_bus for PCI: 00:15.0 done
962 05:46:14.111876 scan_bus: scanning of bus PCI: 00:15.0 took 14288 usecs
963 05:46:14.115203 PCI: 00:15.1 scanning...
964 05:46:14.118387 scan_generic_bus for PCI: 00:15.1
965 05:46:14.121625 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 05:46:14.128257 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 05:46:14.131884 scan_generic_bus for PCI: 00:15.1 done
968 05:46:14.138248 scan_bus: scanning of bus PCI: 00:15.1 took 18594 usecs
969 05:46:14.138459 PCI: 00:19.0 scanning...
970 05:46:14.144921 scan_generic_bus for PCI: 00:19.0
971 05:46:14.148283 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 05:46:14.151320 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 05:46:14.154741 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 05:46:14.161261 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 05:46:14.164399 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 05:46:14.167480 scan_generic_bus for PCI: 00:19.0 done
977 05:46:14.174124 scan_bus: scanning of bus PCI: 00:19.0 took 30718 usecs
978 05:46:14.174209 PCI: 00:1d.0 scanning...
979 05:46:14.181252 do_pci_scan_bridge for PCI: 00:1d.0
980 05:46:14.181339 PCI: pci_scan_bus for bus 01
981 05:46:14.184656 PCI: 01:00.0 [1c5c/1327] enabled
982 05:46:14.191144 Enabling Common Clock Configuration
983 05:46:14.194293 L1 Sub-State supported from root port 29
984 05:46:14.197525 L1 Sub-State Support = 0xf
985 05:46:14.200963 CommonModeRestoreTime = 0x28
986 05:46:14.204146 Power On Value = 0x16, Power On Scale = 0x0
987 05:46:14.204231 ASPM: Enabled L1
988 05:46:14.210525 scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs
989 05:46:14.213926 PCI: 00:1e.2 scanning...
990 05:46:14.217116 scan_generic_bus for PCI: 00:1e.2
991 05:46:14.221180 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 05:46:14.224136 scan_generic_bus for PCI: 00:1e.2 done
993 05:46:14.230364 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
994 05:46:14.233505 PCI: 00:1e.3 scanning...
995 05:46:14.236813 scan_generic_bus for PCI: 00:1e.3
996 05:46:14.240347 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 05:46:14.243667 scan_generic_bus for PCI: 00:1e.3 done
998 05:46:14.250274 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
999 05:46:14.253440 PCI: 00:1f.0 scanning...
1000 05:46:14.256740 scan_static_bus for PCI: 00:1f.0
1001 05:46:14.260330 PNP: 0c09.0 enabled
1002 05:46:14.263823 scan_static_bus for PCI: 00:1f.0 done
1003 05:46:14.266523 scan_bus: scanning of bus PCI: 00:1f.0 took 12037 usecs
1004 05:46:14.269540 PCI: 00:1f.3 scanning...
1005 05:46:14.276329 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1006 05:46:14.279657 PCI: 00:1f.4 scanning...
1007 05:46:14.283038 scan_generic_bus for PCI: 00:1f.4
1008 05:46:14.286051 scan_generic_bus for PCI: 00:1f.4 done
1009 05:46:14.292624 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1010 05:46:14.295862 PCI: 00:1f.5 scanning...
1011 05:46:14.299768 scan_generic_bus for PCI: 00:1f.5
1012 05:46:14.302864 scan_generic_bus for PCI: 00:1f.5 done
1013 05:46:14.309416 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1014 05:46:14.312721 scan_bus: scanning of bus DOMAIN: 0000 took 604908 usecs
1015 05:46:14.316079 scan_static_bus for Root Device done
1016 05:46:14.321918 scan_bus: scanning of bus Root Device took 624776 usecs
1017 05:46:14.322359 done
1018 05:46:14.325824 Chrome EC: UHEPI supported
1019 05:46:14.332032 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 05:46:14.338986 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 05:46:14.345221 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 05:46:14.351804 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 05:46:14.354919 SPI flash protection: WPSW=0 SRP0=0
1024 05:46:14.361490 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 05:46:14.364830 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 05:46:14.367974 found VGA at PCI: 00:02.0
1027 05:46:14.371221 Setting up VGA for PCI: 00:02.0
1028 05:46:14.377717 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 05:46:14.381100 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 05:46:14.384479 Allocating resources...
1031 05:46:14.384897 Reading resources...
1032 05:46:14.391058 Root Device read_resources bus 0 link: 0
1033 05:46:14.394106 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 05:46:14.400915 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 05:46:14.404178 DOMAIN: 0000 read_resources bus 0 link: 0
1036 05:46:14.411376 PCI: 00:14.0 read_resources bus 0 link: 0
1037 05:46:14.414510 USB0 port 0 read_resources bus 0 link: 0
1038 05:46:14.422539 USB0 port 0 read_resources bus 0 link: 0 done
1039 05:46:14.426383 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 05:46:14.433609 PCI: 00:15.0 read_resources bus 1 link: 0
1041 05:46:14.436854 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 05:46:14.442990 PCI: 00:15.1 read_resources bus 2 link: 0
1043 05:46:14.446135 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 05:46:14.454186 PCI: 00:19.0 read_resources bus 3 link: 0
1045 05:46:14.460820 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 05:46:14.463911 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 05:46:14.470498 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 05:46:14.473619 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 05:46:14.479949 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 05:46:14.483167 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 05:46:14.490296 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 05:46:14.494074 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 05:46:14.499949 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 05:46:14.506717 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 05:46:14.509693 Root Device read_resources bus 0 link: 0 done
1056 05:46:14.512902 Done reading resources.
1057 05:46:14.519386 Show resources in subtree (Root Device)...After reading.
1058 05:46:14.522638 Root Device child on link 0 CPU_CLUSTER: 0
1059 05:46:14.526038 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 05:46:14.529207 APIC: 00
1061 05:46:14.529650 APIC: 02
1062 05:46:14.532278 APIC: 06
1063 05:46:14.532364 APIC: 01
1064 05:46:14.532431 APIC: 03
1065 05:46:14.580218 APIC: 07
1066 05:46:14.580396 APIC: 04
1067 05:46:14.580525 APIC: 05
1068 05:46:14.580667 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 05:46:14.581028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 05:46:14.581161 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 05:46:14.581279 PCI: 00:00.0
1072 05:46:14.581389 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 05:46:14.587491 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 05:46:14.594082 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 05:46:14.600547 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 05:46:14.610519 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 05:46:14.620017 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 05:46:14.626495 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 05:46:14.636257 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 05:46:14.646458 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 05:46:14.656204 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 05:46:14.665890 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 05:46:14.675878 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 05:46:14.685648 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 05:46:14.695434 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 05:46:14.701935 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 05:46:14.711503 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 05:46:14.714680 PCI: 00:02.0
1089 05:46:14.724441 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 05:46:14.734425 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 05:46:14.744213 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 05:46:14.744726 PCI: 00:04.0
1093 05:46:14.747458 PCI: 00:08.0
1094 05:46:14.757420 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 05:46:14.757866 PCI: 00:12.0
1096 05:46:14.767100 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 05:46:14.773759 PCI: 00:14.0 child on link 0 USB0 port 0
1098 05:46:14.783569 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 05:46:14.786832 USB0 port 0 child on link 0 USB2 port 0
1100 05:46:14.787294 USB2 port 0
1101 05:46:14.789935 USB2 port 1
1102 05:46:14.793250 USB2 port 2
1103 05:46:14.793735 USB2 port 3
1104 05:46:14.796622 USB2 port 5
1105 05:46:14.797168 USB2 port 6
1106 05:46:14.799959 USB2 port 9
1107 05:46:14.800408 USB3 port 0
1108 05:46:14.803148 USB3 port 1
1109 05:46:14.803637 USB3 port 2
1110 05:46:14.806583 USB3 port 3
1111 05:46:14.807025 USB3 port 4
1112 05:46:14.809911 PCI: 00:14.2
1113 05:46:14.819611 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 05:46:14.828858 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 05:46:14.829306 PCI: 00:14.3
1116 05:46:14.839192 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 05:46:14.845625 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 05:46:14.855534 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 05:46:14.856045 I2C: 01:15
1120 05:46:14.861757 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 05:46:14.871470 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 05:46:14.871564 I2C: 02:5d
1123 05:46:14.874710 GENERIC: 0.0
1124 05:46:14.874802 PCI: 00:16.0
1125 05:46:14.884543 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 05:46:14.887726 PCI: 00:17.0
1127 05:46:14.897504 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 05:46:14.903962 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 05:46:14.913971 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 05:46:14.920598 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 05:46:14.930555 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 05:46:14.940013 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 05:46:14.943432 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 05:46:14.953021 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 05:46:14.953567 I2C: 03:1a
1136 05:46:14.956373 I2C: 03:38
1137 05:46:14.956942 I2C: 03:39
1138 05:46:14.959562 I2C: 03:3a
1139 05:46:14.960004 I2C: 03:3b
1140 05:46:14.966701 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 05:46:14.972907 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 05:46:14.982616 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 05:46:14.992142 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 05:46:14.995494 PCI: 01:00.0
1145 05:46:15.004717 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 05:46:15.004831 PCI: 00:1e.0
1147 05:46:15.017963 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 05:46:15.027738 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 05:46:15.031248 PCI: 00:1e.2 child on link 0 SPI: 00
1150 05:46:15.041148 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 05:46:15.041600 SPI: 00
1152 05:46:15.047669 PCI: 00:1e.3 child on link 0 SPI: 01
1153 05:46:15.057346 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 05:46:15.057797 SPI: 01
1155 05:46:15.060559 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 05:46:15.070592 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 05:46:15.080408 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 05:46:15.080891 PNP: 0c09.0
1159 05:46:15.090607 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 05:46:15.091059 PCI: 00:1f.3
1161 05:46:15.099926 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 05:46:15.112899 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 05:46:15.113349 PCI: 00:1f.4
1164 05:46:15.122843 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 05:46:15.132847 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 05:46:15.133300 PCI: 00:1f.5
1167 05:46:15.142485 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 05:46:15.148941 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 05:46:15.155479 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 05:46:15.161772 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 05:46:15.165264 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 05:46:15.168581 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 05:46:15.171950 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 05:46:15.178151 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 05:46:15.184862 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 05:46:15.191340 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 05:46:15.197856 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 05:46:15.207501 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 05:46:15.214915 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 05:46:15.218072 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 05:46:15.224446 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 05:46:15.230435 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 05:46:15.233779 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 05:46:15.240902 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 05:46:15.243498 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 05:46:15.250691 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 05:46:15.253773 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 05:46:15.260021 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 05:46:15.263418 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 05:46:15.270107 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 05:46:15.273312 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 05:46:15.279900 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 05:46:15.283235 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 05:46:15.289934 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 05:46:15.293086 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 05:46:15.299522 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 05:46:15.302747 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 05:46:15.309309 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 05:46:15.312382 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 05:46:15.315660 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 05:46:15.322308 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 05:46:15.325720 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 05:46:15.331943 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 05:46:15.334831 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 05:46:15.344920 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 05:46:15.348266 avoid_fixed_resources: DOMAIN: 0000
1207 05:46:15.354256 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 05:46:15.361405 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 05:46:15.367726 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 05:46:15.374377 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 05:46:15.384259 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 05:46:15.390805 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 05:46:15.400700 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 05:46:15.406942 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 05:46:15.413586 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 05:46:15.420243 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 05:46:15.430437 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 05:46:15.436892 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 05:46:15.440324 Setting resources...
1220 05:46:15.446591 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 05:46:15.449838 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 05:46:15.453153 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 05:46:15.456371 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 05:46:15.459629 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 05:46:15.466068 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 05:46:15.472719 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 05:46:15.479106 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 05:46:15.488882 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 05:46:15.492165 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 05:46:15.498805 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 05:46:15.502389 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 05:46:15.508646 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 05:46:15.511931 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 05:46:15.518288 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 05:46:15.521531 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 05:46:15.528077 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 05:46:15.531344 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 05:46:15.537826 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 05:46:15.541119 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 05:46:15.547065 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 05:46:15.550418 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 05:46:15.557098 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 05:46:15.560306 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 05:46:15.567048 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 05:46:15.570272 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 05:46:15.573398 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 05:46:15.579979 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 05:46:15.583140 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 05:46:15.589629 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 05:46:15.593036 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 05:46:15.599367 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 05:46:15.605896 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 05:46:15.612823 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 05:46:15.622108 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 05:46:15.628481 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 05:46:15.631708 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 05:46:15.641620 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 05:46:15.645072 Root Device assign_resources, bus 0 link: 0
1259 05:46:15.651184 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 05:46:15.658243 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 05:46:15.667998 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 05:46:15.674313 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 05:46:15.684072 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 05:46:15.690571 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 05:46:15.700449 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 05:46:15.703607 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 05:46:15.710215 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 05:46:15.716646 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 05:46:15.726867 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 05:46:15.733717 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 05:46:15.742868 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 05:46:15.746661 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 05:46:15.752561 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 05:46:15.759136 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 05:46:15.762435 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 05:46:15.769565 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 05:46:15.775569 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 05:46:15.785761 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 05:46:15.792863 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 05:46:15.801964 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 05:46:15.808909 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 05:46:15.814958 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 05:46:15.825001 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 05:46:15.831376 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 05:46:15.838315 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 05:46:15.841199 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 05:46:15.851066 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 05:46:15.857493 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 05:46:15.867527 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 05:46:15.870687 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 05:46:15.880667 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 05:46:15.883540 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 05:46:15.893128 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 05:46:15.900307 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 05:46:15.906739 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 05:46:15.910101 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 05:46:15.919555 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 05:46:15.923071 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 05:46:15.928952 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 05:46:15.931991 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 05:46:15.938486 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 05:46:15.941778 LPC: Trying to open IO window from 800 size 1ff
1303 05:46:15.951976 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 05:46:15.958231 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 05:46:15.968080 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 05:46:15.974684 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 05:46:15.980713 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 05:46:15.984084 Root Device assign_resources, bus 0 link: 0
1309 05:46:15.987335 Done setting resources.
1310 05:46:15.993939 Show resources in subtree (Root Device)...After assigning values.
1311 05:46:15.997121 Root Device child on link 0 CPU_CLUSTER: 0
1312 05:46:16.000416 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 05:46:16.003692 APIC: 00
1314 05:46:16.003798 APIC: 02
1315 05:46:16.006896 APIC: 06
1316 05:46:16.007008 APIC: 01
1317 05:46:16.007105 APIC: 03
1318 05:46:16.010155 APIC: 07
1319 05:46:16.010278 APIC: 04
1320 05:46:16.013389 APIC: 05
1321 05:46:16.016675 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 05:46:16.026601 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 05:46:16.036555 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 05:46:16.039386 PCI: 00:00.0
1325 05:46:16.049132 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 05:46:16.059165 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 05:46:16.069065 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 05:46:16.075749 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 05:46:16.085380 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 05:46:16.095281 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 05:46:16.105239 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 05:46:16.115114 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 05:46:16.124803 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 05:46:16.131393 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 05:46:16.141282 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 05:46:16.151041 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 05:46:16.160829 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 05:46:16.170235 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 05:46:16.180054 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 05:46:16.189902 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 05:46:16.189995 PCI: 00:02.0
1342 05:46:16.199657 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 05:46:16.213023 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 05:46:16.222920 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 05:46:16.223035 PCI: 00:04.0
1346 05:46:16.226022 PCI: 00:08.0
1347 05:46:16.235301 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 05:46:16.235414 PCI: 00:12.0
1349 05:46:16.245181 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 05:46:16.251858 PCI: 00:14.0 child on link 0 USB0 port 0
1351 05:46:16.261828 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 05:46:16.264975 USB0 port 0 child on link 0 USB2 port 0
1353 05:46:16.268318 USB2 port 0
1354 05:46:16.268405 USB2 port 1
1355 05:46:16.271592 USB2 port 2
1356 05:46:16.271689 USB2 port 3
1357 05:46:16.274899 USB2 port 5
1358 05:46:16.274987 USB2 port 6
1359 05:46:16.278060 USB2 port 9
1360 05:46:16.281341 USB3 port 0
1361 05:46:16.281440 USB3 port 1
1362 05:46:16.284746 USB3 port 2
1363 05:46:16.284835 USB3 port 3
1364 05:46:16.287723 USB3 port 4
1365 05:46:16.287803 PCI: 00:14.2
1366 05:46:16.297770 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 05:46:16.310866 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 05:46:16.310998 PCI: 00:14.3
1369 05:46:16.320503 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 05:46:16.327076 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 05:46:16.336961 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 05:46:16.337238 I2C: 01:15
1373 05:46:16.340301 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 05:46:16.353566 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 05:46:16.354039 I2C: 02:5d
1376 05:46:16.356877 GENERIC: 0.0
1377 05:46:16.357318 PCI: 00:16.0
1378 05:46:16.366418 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 05:46:16.369850 PCI: 00:17.0
1380 05:46:16.379530 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 05:46:16.389259 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 05:46:16.399635 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 05:46:16.408988 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 05:46:16.415378 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 05:46:16.428333 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 05:46:16.431494 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 05:46:16.441215 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 05:46:16.441322 I2C: 03:1a
1389 05:46:16.444526 I2C: 03:38
1390 05:46:16.444633 I2C: 03:39
1391 05:46:16.447609 I2C: 03:3a
1392 05:46:16.447685 I2C: 03:3b
1393 05:46:16.454078 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 05:46:16.463957 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 05:46:16.474285 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 05:46:16.483848 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 05:46:16.484333 PCI: 01:00.0
1398 05:46:16.497385 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 05:46:16.497829 PCI: 00:1e.0
1400 05:46:16.507002 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 05:46:16.520034 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 05:46:16.522614 PCI: 00:1e.2 child on link 0 SPI: 00
1403 05:46:16.532454 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 05:46:16.532542 SPI: 00
1405 05:46:16.539311 PCI: 00:1e.3 child on link 0 SPI: 01
1406 05:46:16.549077 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 05:46:16.549165 SPI: 01
1408 05:46:16.555441 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 05:46:16.561866 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 05:46:16.572212 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 05:46:16.572299 PNP: 0c09.0
1412 05:46:16.581849 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 05:46:16.585015 PCI: 00:1f.3
1414 05:46:16.594799 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 05:46:16.604682 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 05:46:16.604771 PCI: 00:1f.4
1417 05:46:16.614001 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 05:46:16.624248 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 05:46:16.627528 PCI: 00:1f.5
1420 05:46:16.636921 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 05:46:16.640308 Done allocating resources.
1422 05:46:16.647476 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 05:46:16.647595 Enabling resources...
1424 05:46:16.654066 PCI: 00:00.0 subsystem <- 8086/9b61
1425 05:46:16.654152 PCI: 00:00.0 cmd <- 06
1426 05:46:16.660624 PCI: 00:02.0 subsystem <- 8086/9b41
1427 05:46:16.660710 PCI: 00:02.0 cmd <- 03
1428 05:46:16.663896 PCI: 00:08.0 cmd <- 06
1429 05:46:16.667218 PCI: 00:12.0 subsystem <- 8086/02f9
1430 05:46:16.670313 PCI: 00:12.0 cmd <- 02
1431 05:46:16.673607 PCI: 00:14.0 subsystem <- 8086/02ed
1432 05:46:16.676999 PCI: 00:14.0 cmd <- 02
1433 05:46:16.680161 PCI: 00:14.2 cmd <- 02
1434 05:46:16.683597 PCI: 00:14.3 subsystem <- 8086/02f0
1435 05:46:16.686749 PCI: 00:14.3 cmd <- 02
1436 05:46:16.690098 PCI: 00:15.0 subsystem <- 8086/02e8
1437 05:46:16.693120 PCI: 00:15.0 cmd <- 02
1438 05:46:16.696301 PCI: 00:15.1 subsystem <- 8086/02e9
1439 05:46:16.696388 PCI: 00:15.1 cmd <- 02
1440 05:46:16.702974 PCI: 00:16.0 subsystem <- 8086/02e0
1441 05:46:16.703062 PCI: 00:16.0 cmd <- 02
1442 05:46:16.709522 PCI: 00:17.0 subsystem <- 8086/02d3
1443 05:46:16.709647 PCI: 00:17.0 cmd <- 03
1444 05:46:16.712727 PCI: 00:19.0 subsystem <- 8086/02c5
1445 05:46:16.716091 PCI: 00:19.0 cmd <- 02
1446 05:46:16.719455 PCI: 00:1d.0 bridge ctrl <- 0013
1447 05:46:16.722726 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 05:46:16.726107 PCI: 00:1d.0 cmd <- 06
1449 05:46:16.729449 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 05:46:16.732554 PCI: 00:1e.0 cmd <- 06
1451 05:46:16.735649 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 05:46:16.739089 PCI: 00:1e.2 cmd <- 06
1453 05:46:16.742427 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 05:46:16.745763 PCI: 00:1e.3 cmd <- 02
1455 05:46:16.748802 PCI: 00:1f.0 subsystem <- 8086/0284
1456 05:46:16.752305 PCI: 00:1f.0 cmd <- 407
1457 05:46:16.755577 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 05:46:16.758715 PCI: 00:1f.3 cmd <- 02
1459 05:46:16.762281 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 05:46:16.765509 PCI: 00:1f.4 cmd <- 03
1461 05:46:16.768745 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 05:46:16.772031 PCI: 00:1f.5 cmd <- 406
1463 05:46:16.779630 PCI: 01:00.0 cmd <- 02
1464 05:46:16.784162 done.
1465 05:46:16.796808 ME: Version: 14.0.39.1367
1466 05:46:16.803470 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1467 05:46:16.806680 Initializing devices...
1468 05:46:16.806769 Root Device init ...
1469 05:46:16.813317 Chrome EC: Set SMI mask to 0x0000000000000000
1470 05:46:16.820150 Chrome EC: clear events_b mask to 0x0000000000000000
1471 05:46:16.822724 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 05:46:16.829367 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 05:46:16.835780 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 05:46:16.839272 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 05:46:16.845801 Root Device init finished in 35168 usecs
1476 05:46:16.849049 CPU_CLUSTER: 0 init ...
1477 05:46:16.852453 CPU_CLUSTER: 0 init finished in 2450 usecs
1478 05:46:16.857682 PCI: 00:00.0 init ...
1479 05:46:16.861036 CPU TDP: 15 Watts
1480 05:46:16.864360 CPU PL2 = 64 Watts
1481 05:46:16.867387 PCI: 00:00.0 init finished in 7088 usecs
1482 05:46:16.871459 PCI: 00:02.0 init ...
1483 05:46:16.873891 PCI: 00:02.0 init finished in 2256 usecs
1484 05:46:16.877116 PCI: 00:08.0 init ...
1485 05:46:16.880326 PCI: 00:08.0 init finished in 2254 usecs
1486 05:46:16.883885 PCI: 00:12.0 init ...
1487 05:46:16.887177 PCI: 00:12.0 init finished in 2254 usecs
1488 05:46:16.890411 PCI: 00:14.0 init ...
1489 05:46:16.893564 PCI: 00:14.0 init finished in 2253 usecs
1490 05:46:16.896768 PCI: 00:14.2 init ...
1491 05:46:16.900244 PCI: 00:14.2 init finished in 2255 usecs
1492 05:46:16.903625 PCI: 00:14.3 init ...
1493 05:46:16.907065 PCI: 00:14.3 init finished in 2270 usecs
1494 05:46:16.910099 PCI: 00:15.0 init ...
1495 05:46:16.913308 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 05:46:16.920004 PCI: 00:15.0 init finished in 5972 usecs
1497 05:46:16.920090 PCI: 00:15.1 init ...
1498 05:46:16.926722 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 05:46:16.929840 PCI: 00:15.1 init finished in 5981 usecs
1500 05:46:16.932966 PCI: 00:16.0 init ...
1501 05:46:16.936337 PCI: 00:16.0 init finished in 2254 usecs
1502 05:46:16.939617 PCI: 00:19.0 init ...
1503 05:46:16.942954 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 05:46:16.946172 PCI: 00:19.0 init finished in 5980 usecs
1505 05:46:16.949559 PCI: 00:1d.0 init ...
1506 05:46:16.952964 Initializing PCH PCIe bridge.
1507 05:46:16.956248 PCI: 00:1d.0 init finished in 5289 usecs
1508 05:46:16.959501 PCI: 00:1f.0 init ...
1509 05:46:16.962802 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 05:46:16.969433 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 05:46:16.969519 IOAPIC: ID = 0x02
1512 05:46:16.972921 IOAPIC: Dumping registers
1513 05:46:16.976215 reg 0x0000: 0x02000000
1514 05:46:16.979401 reg 0x0001: 0x00770020
1515 05:46:16.982140 reg 0x0002: 0x00000000
1516 05:46:16.986094 PCI: 00:1f.0 init finished in 23548 usecs
1517 05:46:16.988635 PCI: 00:1f.4 init ...
1518 05:46:16.991933 PCI: 00:1f.4 init finished in 2264 usecs
1519 05:46:17.003928 PCI: 01:00.0 init ...
1520 05:46:17.007233 PCI: 01:00.0 init finished in 2253 usecs
1521 05:46:17.011748 PNP: 0c09.0 init ...
1522 05:46:17.015054 Google Chrome EC uptime: 11.163 seconds
1523 05:46:17.021560 Google Chrome AP resets since EC boot: 0
1524 05:46:17.024421 Google Chrome most recent AP reset causes:
1525 05:46:17.031417 Google Chrome EC reset flags at last EC boot: reset-pin
1526 05:46:17.034076 PNP: 0c09.0 init finished in 20578 usecs
1527 05:46:17.037983 Devices initialized
1528 05:46:17.040778 Show all devs... After init.
1529 05:46:17.040862 Root Device: enabled 1
1530 05:46:17.044014 CPU_CLUSTER: 0: enabled 1
1531 05:46:17.047343 DOMAIN: 0000: enabled 1
1532 05:46:17.047434 APIC: 00: enabled 1
1533 05:46:17.050696 PCI: 00:00.0: enabled 1
1534 05:46:17.053964 PCI: 00:02.0: enabled 1
1535 05:46:17.056903 PCI: 00:04.0: enabled 0
1536 05:46:17.057010 PCI: 00:05.0: enabled 0
1537 05:46:17.060595 PCI: 00:12.0: enabled 1
1538 05:46:17.064004 PCI: 00:12.5: enabled 0
1539 05:46:17.066636 PCI: 00:12.6: enabled 0
1540 05:46:17.066743 PCI: 00:14.0: enabled 1
1541 05:46:17.070078 PCI: 00:14.1: enabled 0
1542 05:46:17.073349 PCI: 00:14.3: enabled 1
1543 05:46:17.076640 PCI: 00:14.5: enabled 0
1544 05:46:17.076745 PCI: 00:15.0: enabled 1
1545 05:46:17.080041 PCI: 00:15.1: enabled 1
1546 05:46:17.083408 PCI: 00:15.2: enabled 0
1547 05:46:17.086645 PCI: 00:15.3: enabled 0
1548 05:46:17.086757 PCI: 00:16.0: enabled 1
1549 05:46:17.090064 PCI: 00:16.1: enabled 0
1550 05:46:17.093420 PCI: 00:16.2: enabled 0
1551 05:46:17.096082 PCI: 00:16.3: enabled 0
1552 05:46:17.096188 PCI: 00:16.4: enabled 0
1553 05:46:17.099392 PCI: 00:16.5: enabled 0
1554 05:46:17.102719 PCI: 00:17.0: enabled 1
1555 05:46:17.106506 PCI: 00:19.0: enabled 1
1556 05:46:17.106594 PCI: 00:19.1: enabled 0
1557 05:46:17.109135 PCI: 00:19.2: enabled 0
1558 05:46:17.112399 PCI: 00:1a.0: enabled 0
1559 05:46:17.115842 PCI: 00:1c.0: enabled 0
1560 05:46:17.115949 PCI: 00:1c.1: enabled 0
1561 05:46:17.118981 PCI: 00:1c.2: enabled 0
1562 05:46:17.122816 PCI: 00:1c.3: enabled 0
1563 05:46:17.126280 PCI: 00:1c.4: enabled 0
1564 05:46:17.126389 PCI: 00:1c.5: enabled 0
1565 05:46:17.128687 PCI: 00:1c.6: enabled 0
1566 05:46:17.132145 PCI: 00:1c.7: enabled 0
1567 05:46:17.135266 PCI: 00:1d.0: enabled 1
1568 05:46:17.135370 PCI: 00:1d.1: enabled 0
1569 05:46:17.138582 PCI: 00:1d.2: enabled 0
1570 05:46:17.141752 PCI: 00:1d.3: enabled 0
1571 05:46:17.145142 PCI: 00:1d.4: enabled 0
1572 05:46:17.145230 PCI: 00:1d.5: enabled 0
1573 05:46:17.148472 PCI: 00:1e.0: enabled 1
1574 05:46:17.152005 PCI: 00:1e.1: enabled 0
1575 05:46:17.155134 PCI: 00:1e.2: enabled 1
1576 05:46:17.155286 PCI: 00:1e.3: enabled 1
1577 05:46:17.158535 PCI: 00:1f.0: enabled 1
1578 05:46:17.161779 PCI: 00:1f.1: enabled 0
1579 05:46:17.164573 PCI: 00:1f.2: enabled 0
1580 05:46:17.164677 PCI: 00:1f.3: enabled 1
1581 05:46:17.168323 PCI: 00:1f.4: enabled 1
1582 05:46:17.171514 PCI: 00:1f.5: enabled 1
1583 05:46:17.174843 PCI: 00:1f.6: enabled 0
1584 05:46:17.174948 USB0 port 0: enabled 1
1585 05:46:17.178092 I2C: 01:15: enabled 1
1586 05:46:17.181435 I2C: 02:5d: enabled 1
1587 05:46:17.181512 GENERIC: 0.0: enabled 1
1588 05:46:17.184693 I2C: 03:1a: enabled 1
1589 05:46:17.187785 I2C: 03:38: enabled 1
1590 05:46:17.187869 I2C: 03:39: enabled 1
1591 05:46:17.190871 I2C: 03:3a: enabled 1
1592 05:46:17.194428 I2C: 03:3b: enabled 1
1593 05:46:17.197456 PCI: 00:00.0: enabled 1
1594 05:46:17.197538 SPI: 00: enabled 1
1595 05:46:17.200687 SPI: 01: enabled 1
1596 05:46:17.200762 PNP: 0c09.0: enabled 1
1597 05:46:17.204047 USB2 port 0: enabled 1
1598 05:46:17.207119 USB2 port 1: enabled 1
1599 05:46:17.210641 USB2 port 2: enabled 0
1600 05:46:17.210719 USB2 port 3: enabled 0
1601 05:46:17.213899 USB2 port 5: enabled 0
1602 05:46:17.217303 USB2 port 6: enabled 1
1603 05:46:17.220482 USB2 port 9: enabled 1
1604 05:46:17.220557 USB3 port 0: enabled 1
1605 05:46:17.223920 USB3 port 1: enabled 1
1606 05:46:17.227103 USB3 port 2: enabled 1
1607 05:46:17.227175 USB3 port 3: enabled 1
1608 05:46:17.230463 USB3 port 4: enabled 0
1609 05:46:17.233666 APIC: 02: enabled 1
1610 05:46:17.233785 APIC: 06: enabled 1
1611 05:46:17.236965 APIC: 01: enabled 1
1612 05:46:17.240235 APIC: 03: enabled 1
1613 05:46:17.240314 APIC: 07: enabled 1
1614 05:46:17.243493 APIC: 04: enabled 1
1615 05:46:17.243568 APIC: 05: enabled 1
1616 05:46:17.246228 PCI: 00:08.0: enabled 1
1617 05:46:17.249387 PCI: 00:14.2: enabled 1
1618 05:46:17.252674 PCI: 01:00.0: enabled 1
1619 05:46:17.256555 Disabling ACPI via APMC:
1620 05:46:17.259886 done.
1621 05:46:17.263003 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 05:46:17.265810 ELOG: NV offset 0xaf0000 size 0x4000
1623 05:46:17.273100 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 05:46:17.279652 ELOG: Event(17) added with size 13 at 2022-08-23 05:45:46 UTC
1625 05:46:17.286050 POST: Unexpected post code in previous boot: 0x73
1626 05:46:17.292719 ELOG: Event(A3) added with size 11 at 2022-08-23 05:45:46 UTC
1627 05:46:17.299362 ELOG: Event(92) added with size 9 at 2022-08-23 05:45:46 UTC
1628 05:46:17.306062 ELOG: Event(93) added with size 9 at 2022-08-23 05:45:46 UTC
1629 05:46:17.312084 ELOG: Event(9A) added with size 9 at 2022-08-23 05:45:46 UTC
1630 05:46:17.318642 ELOG: Event(9E) added with size 10 at 2022-08-23 05:45:46 UTC
1631 05:46:17.325098 ELOG: Event(9F) added with size 14 at 2022-08-23 05:45:46 UTC
1632 05:46:17.328635 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1633 05:46:17.335228 ELOG: Event(A1) added with size 10 at 2022-08-23 05:45:46 UTC
1634 05:46:17.345007 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 05:46:17.351423 ELOG: Event(A0) added with size 9 at 2022-08-23 05:45:46 UTC
1636 05:46:17.354991 elog_add_boot_reason: Logged dev mode boot
1637 05:46:17.358210 Finalize devices...
1638 05:46:17.358326 PCI: 00:17.0 final
1639 05:46:17.361495 Devices finalized
1640 05:46:17.364630 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 05:46:17.371246 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 05:46:17.374595 ME: HFSTS1 : 0x90000245
1643 05:46:17.377904 ME: HFSTS2 : 0x3B850126
1644 05:46:17.384512 ME: HFSTS3 : 0x00000020
1645 05:46:17.387082 ME: HFSTS4 : 0x00004800
1646 05:46:17.390296 ME: HFSTS5 : 0x00000000
1647 05:46:17.393601 ME: HFSTS6 : 0x40400006
1648 05:46:17.397141 ME: Manufacturing Mode : NO
1649 05:46:17.400290 ME: FW Partition Table : OK
1650 05:46:17.403545 ME: Bringup Loader Failure : NO
1651 05:46:17.410008 ME: Firmware Init Complete : YES
1652 05:46:17.413860 ME: Boot Options Present : NO
1653 05:46:17.417197 ME: Update In Progress : NO
1654 05:46:17.419756 ME: D0i3 Support : YES
1655 05:46:17.423048 ME: Low Power State Enabled : NO
1656 05:46:17.426344 ME: CPU Replaced : NO
1657 05:46:17.429691 ME: CPU Replacement Valid : YES
1658 05:46:17.433133 ME: Current Working State : 5
1659 05:46:17.436458 ME: Current Operation State : 1
1660 05:46:17.439670 ME: Current Operation Mode : 0
1661 05:46:17.442904 ME: Error Code : 0
1662 05:46:17.446235 ME: CPU Debug Disabled : YES
1663 05:46:17.449477 ME: TXT Support : NO
1664 05:46:17.452340 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 05:46:17.458916 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 05:46:17.462760 CBFS @ c08000 size 3f8000
1667 05:46:17.469199 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 05:46:17.472234 CBFS: Locating 'fallback/dsdt.aml'
1669 05:46:17.475416 CBFS: Found @ offset 10bb80 size 3fa5
1670 05:46:17.478795 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 05:46:17.482037 CBFS @ c08000 size 3f8000
1672 05:46:17.488327 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 05:46:17.491547 CBFS: Locating 'fallback/slic'
1674 05:46:17.498612 CBFS: 'fallback/slic' not found.
1675 05:46:17.501924 ACPI: Writing ACPI tables at 99b3e000.
1676 05:46:17.502024 ACPI: * FACS
1677 05:46:17.505353 ACPI: * DSDT
1678 05:46:17.508533 Ramoops buffer: 0x100000@0x99a3d000.
1679 05:46:17.511764 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 05:46:17.518350 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 05:46:17.521622 Google Chrome EC: version:
1682 05:46:17.524709 ro: helios_v2.0.2659-56403530b
1683 05:46:17.528047 rw: helios_v2.0.2849-c41de27e7d
1684 05:46:17.528147 running image: 1
1685 05:46:17.532826 ACPI: * FADT
1686 05:46:17.532931 SCI is IRQ9
1687 05:46:17.539302 ACPI: added table 1/32, length now 40
1688 05:46:17.539387 ACPI: * SSDT
1689 05:46:17.542474 Found 1 CPU(s) with 8 core(s) each.
1690 05:46:17.549192 Error: Could not locate 'wifi_sar' in VPD.
1691 05:46:17.552403 Checking CBFS for default SAR values
1692 05:46:17.555744 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 05:46:17.559090 CBFS @ c08000 size 3f8000
1694 05:46:17.565602 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 05:46:17.568706 CBFS: Locating 'wifi_sar_defaults.hex'
1696 05:46:17.572113 CBFS: Found @ offset 5fac0 size 77
1697 05:46:17.575274 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 05:46:17.581804 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 05:46:17.585056 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 05:46:17.591573 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 05:46:17.594858 failed to find key in VPD: dsm_calib_r0_0
1702 05:46:17.604524 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 05:46:17.610871 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 05:46:17.614250 failed to find key in VPD: dsm_calib_r0_1
1705 05:46:17.624462 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 05:46:17.627214 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 05:46:17.630866 failed to find key in VPD: dsm_calib_r0_2
1708 05:46:17.640764 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 05:46:17.647417 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 05:46:17.650636 failed to find key in VPD: dsm_calib_r0_3
1711 05:46:17.659758 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 05:46:17.663751 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 05:46:17.670236 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 05:46:17.673438 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 05:46:17.676734 EC returned error result code 1
1716 05:46:17.680102 EC returned error result code 1
1717 05:46:17.683367 EC returned error result code 1
1718 05:46:17.689895 PS2K: Bad resp from EC. Vivaldi disabled!
1719 05:46:17.696168 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 05:46:17.699390 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 05:46:17.706082 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 05:46:17.709232 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 05:46:17.715575 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 05:46:17.722114 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 05:46:17.728605 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 05:46:17.735140 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 05:46:17.738296 ACPI: added table 2/32, length now 44
1728 05:46:17.738386 ACPI: * MCFG
1729 05:46:17.741509 ACPI: added table 3/32, length now 48
1730 05:46:17.744739 ACPI: * TPM2
1731 05:46:17.748315 TPM2 log created at 99a2d000
1732 05:46:17.751265 ACPI: added table 4/32, length now 52
1733 05:46:17.754616 ACPI: * MADT
1734 05:46:17.754716 SCI is IRQ9
1735 05:46:17.758422 ACPI: added table 5/32, length now 56
1736 05:46:17.761090 current = 99b43ac0
1737 05:46:17.761210 ACPI: * DMAR
1738 05:46:17.764430 ACPI: added table 6/32, length now 60
1739 05:46:17.767613 ACPI: * IGD OpRegion
1740 05:46:17.770942 GMA: Found VBT in CBFS
1741 05:46:17.774145 GMA: Found valid VBT in CBFS
1742 05:46:17.777594 ACPI: added table 7/32, length now 64
1743 05:46:17.777754 ACPI: * HPET
1744 05:46:17.784040 ACPI: added table 8/32, length now 68
1745 05:46:17.784126 ACPI: done.
1746 05:46:17.787326 ACPI tables: 31744 bytes.
1747 05:46:17.791139 smbios_write_tables: 99a2c000
1748 05:46:17.794398 EC returned error result code 3
1749 05:46:17.797674 Couldn't obtain OEM name from CBI
1750 05:46:17.800764 Create SMBIOS type 17
1751 05:46:17.804064 PCI: 00:00.0 (Intel Cannonlake)
1752 05:46:17.804156 PCI: 00:14.3 (Intel WiFi)
1753 05:46:17.807482 SMBIOS tables: 939 bytes.
1754 05:46:17.814133 Writing table forward entry at 0x00000500
1755 05:46:17.817304 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 05:46:17.823761 Writing coreboot table at 0x99b62000
1757 05:46:17.827354 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 05:46:17.833139 1. 0000000000001000-000000000009ffff: RAM
1759 05:46:17.836376 2. 00000000000a0000-00000000000fffff: RESERVED
1760 05:46:17.839824 3. 0000000000100000-0000000099a2bfff: RAM
1761 05:46:17.846263 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 05:46:17.853695 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 05:46:17.859309 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 05:46:17.862923 7. 000000009a000000-000000009f7fffff: RESERVED
1765 05:46:17.866301 8. 00000000e0000000-00000000efffffff: RESERVED
1766 05:46:17.872599 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 05:46:17.875859 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 05:46:17.882405 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 05:46:17.885665 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 05:46:17.892386 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 05:46:17.895714 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 05:46:17.902251 15. 0000000100000000-000000045e7fffff: RAM
1773 05:46:17.905371 Graphics framebuffer located at 0xc0000000
1774 05:46:17.908689 Passing 5 GPIOs to payload:
1775 05:46:17.912056 NAME | PORT | POLARITY | VALUE
1776 05:46:17.918527 write protect | undefined | high | low
1777 05:46:17.924916 lid | undefined | high | high
1778 05:46:17.927797 power | undefined | high | low
1779 05:46:17.934608 oprom | undefined | high | low
1780 05:46:17.937886 EC in RW | 0x000000cb | high | low
1781 05:46:17.941148 Board ID: 4
1782 05:46:17.944392 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 05:46:17.947731 CBFS @ c08000 size 3f8000
1784 05:46:17.954189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 05:46:17.960575 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d36
1786 05:46:17.963915 coreboot table: 1492 bytes.
1787 05:46:17.967534 IMD ROOT 0. 99fff000 00001000
1788 05:46:17.970973 IMD SMALL 1. 99ffe000 00001000
1789 05:46:17.974131 FSP MEMORY 2. 99c4e000 003b0000
1790 05:46:17.976944 CONSOLE 3. 99c2e000 00020000
1791 05:46:17.980770 FMAP 4. 99c2d000 0000054e
1792 05:46:17.983895 TIME STAMP 5. 99c2c000 00000910
1793 05:46:17.987094 VBOOT WORK 6. 99c18000 00014000
1794 05:46:17.990442 MRC DATA 7. 99c16000 00001958
1795 05:46:17.993778 ROMSTG STCK 8. 99c15000 00001000
1796 05:46:17.996941 AFTER CAR 9. 99c0b000 0000a000
1797 05:46:18.000188 RAMSTAGE 10. 99baf000 0005c000
1798 05:46:18.003536 REFCODE 11. 99b7a000 00035000
1799 05:46:18.006618 SMM BACKUP 12. 99b6a000 00010000
1800 05:46:18.010137 COREBOOT 13. 99b62000 00008000
1801 05:46:18.013278 ACPI 14. 99b3e000 00024000
1802 05:46:18.016478 ACPI GNVS 15. 99b3d000 00001000
1803 05:46:18.019919 RAMOOPS 16. 99a3d000 00100000
1804 05:46:18.023114 TPM2 TCGLOG17. 99a2d000 00010000
1805 05:46:18.026417 SMBIOS 18. 99a2c000 00000800
1806 05:46:18.029759 IMD small region:
1807 05:46:18.032960 IMD ROOT 0. 99ffec00 00000400
1808 05:46:18.036242 FSP RUNTIME 1. 99ffebe0 00000004
1809 05:46:18.039165 EC HOSTEVENT 2. 99ffebc0 00000008
1810 05:46:18.042364 POWER STATE 3. 99ffeb80 00000040
1811 05:46:18.045841 ROMSTAGE 4. 99ffeb60 00000004
1812 05:46:18.049091 MEM INFO 5. 99ffe9a0 000001b9
1813 05:46:18.052502 VPD 6. 99ffe940 0000004c
1814 05:46:18.055693 MTRR: Physical address space:
1815 05:46:18.062087 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1816 05:46:18.068705 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1817 05:46:18.075378 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1818 05:46:18.081873 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1819 05:46:18.088231 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1820 05:46:18.094241 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1821 05:46:18.100790 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1822 05:46:18.104729 MTRR: Fixed MSR 0x250 0x0606060606060606
1823 05:46:18.107786 MTRR: Fixed MSR 0x258 0x0606060606060606
1824 05:46:18.110550 MTRR: Fixed MSR 0x259 0x0000000000000000
1825 05:46:18.116887 MTRR: Fixed MSR 0x268 0x0606060606060606
1826 05:46:18.120236 MTRR: Fixed MSR 0x269 0x0606060606060606
1827 05:46:18.123581 MTRR: Fixed MSR 0x26a 0x0606060606060606
1828 05:46:18.126773 MTRR: Fixed MSR 0x26b 0x0606060606060606
1829 05:46:18.133620 MTRR: Fixed MSR 0x26c 0x0606060606060606
1830 05:46:18.136779 MTRR: Fixed MSR 0x26d 0x0606060606060606
1831 05:46:18.140132 MTRR: Fixed MSR 0x26e 0x0606060606060606
1832 05:46:18.143371 MTRR: Fixed MSR 0x26f 0x0606060606060606
1833 05:46:18.147350 call enable_fixed_mtrr()
1834 05:46:18.150602 CPU physical address size: 39 bits
1835 05:46:18.157231 MTRR: default type WB/UC MTRR counts: 6/8.
1836 05:46:18.160448 MTRR: WB selected as default type.
1837 05:46:18.166920 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1838 05:46:18.173152 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1839 05:46:18.176489 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1840 05:46:18.183150 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 05:46:18.189422 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1842 05:46:18.196077 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1843 05:46:18.196179
1844 05:46:18.199673 MTRR check
1845 05:46:18.202677 Fixed MTRRs : Enabled
1846 05:46:18.202785 Variable MTRRs: Enabled
1847 05:46:18.202891
1848 05:46:18.209176 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 05:46:18.212270 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 05:46:18.215700 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 05:46:18.218824 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 05:46:18.225434 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 05:46:18.228616 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 05:46:18.231919 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 05:46:18.235358 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 05:46:18.241755 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 05:46:18.245041 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 05:46:18.248295 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 05:46:18.255125 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 05:46:18.258482 call enable_fixed_mtrr()
1861 05:46:18.261628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 05:46:18.264660 CPU physical address size: 39 bits
1863 05:46:18.268524 CBFS @ c08000 size 3f8000
1864 05:46:18.275155 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1865 05:46:18.278499 CBFS: Locating 'fallback/payload'
1866 05:46:18.281763 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 05:46:18.284997 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 05:46:18.291495 MTRR: Fixed MSR 0x258 0x0606060606060606
1869 05:46:18.294673 MTRR: Fixed MSR 0x259 0x0000000000000000
1870 05:46:18.297749 MTRR: Fixed MSR 0x268 0x0606060606060606
1871 05:46:18.300921 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 05:46:18.307322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 05:46:18.310560 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 05:46:18.313829 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 05:46:18.316980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 05:46:18.323306 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 05:46:18.327380 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 05:46:18.330560 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 05:46:18.333705 call enable_fixed_mtrr()
1880 05:46:18.337062 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 05:46:18.342980 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 05:46:18.346727 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 05:46:18.349861 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 05:46:18.353348 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 05:46:18.359690 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 05:46:18.362876 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 05:46:18.366232 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 05:46:18.369377 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 05:46:18.376047 CPU physical address size: 39 bits
1890 05:46:18.376488 call enable_fixed_mtrr()
1891 05:46:18.382508 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 05:46:18.385191 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 05:46:18.388547 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 05:46:18.392553 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 05:46:18.399053 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 05:46:18.402310 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 05:46:18.405486 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 05:46:18.408667 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 05:46:18.415085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 05:46:18.418260 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 05:46:18.421666 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 05:46:18.424996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 05:46:18.431486 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 05:46:18.434718 call enable_fixed_mtrr()
1905 05:46:18.438102 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 05:46:18.441235 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 05:46:18.444440 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 05:46:18.450820 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 05:46:18.454114 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 05:46:18.457554 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 05:46:18.460978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 05:46:18.467493 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 05:46:18.470665 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 05:46:18.473858 CPU physical address size: 39 bits
1915 05:46:18.477238 call enable_fixed_mtrr()
1916 05:46:18.480390 CBFS: Found @ offset 1c96c0 size 3f798
1917 05:46:18.483680 CPU physical address size: 39 bits
1918 05:46:18.487069 CPU physical address size: 39 bits
1919 05:46:18.493446 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 05:46:18.496611 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 05:46:18.499864 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 05:46:18.503260 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 05:46:18.509481 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 05:46:18.512744 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 05:46:18.516583 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 05:46:18.519766 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 05:46:18.526368 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 05:46:18.529726 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 05:46:18.532873 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 05:46:18.536136 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 05:46:18.542806 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 05:46:18.546096 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 05:46:18.549417 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 05:46:18.552519 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 05:46:18.558767 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 05:46:18.562479 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 05:46:18.565591 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 05:46:18.569034 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 05:46:18.575204 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 05:46:18.578455 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 05:46:18.581402 call enable_fixed_mtrr()
1942 05:46:18.581635 call enable_fixed_mtrr()
1943 05:46:18.587766 CPU physical address size: 39 bits
1944 05:46:18.591287 CPU physical address size: 39 bits
1945 05:46:18.594281 Checking segment from ROM address 0xffdd16f8
1946 05:46:18.597858 Checking segment from ROM address 0xffdd1714
1947 05:46:18.604314 Loading segment from ROM address 0xffdd16f8
1948 05:46:18.607601 code (compression=0)
1949 05:46:18.614083 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1950 05:46:18.623687 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1951 05:46:18.623787 it's not compressed!
1952 05:46:18.717382 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1953 05:46:18.723941 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1954 05:46:18.730431 Loading segment from ROM address 0xffdd1714
1955 05:46:18.730570 Entry Point 0x30000000
1956 05:46:18.733528 Loaded segments
1957 05:46:18.739516 Finalizing chipset.
1958 05:46:18.742792 Finalizing SMM.
1959 05:46:18.745944 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1960 05:46:18.749286 mp_park_aps done after 0 msecs.
1961 05:46:18.756326 Jumping to boot code at 30000000(99b62000)
1962 05:46:18.762301 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1963 05:46:18.762468
1964 05:46:18.766028 Starting depthcharge on Helios...
1965 05:46:18.766408 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1966 05:46:18.766521 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1967 05:46:18.766609 Setting prompt string to ['hatch:']
1968 05:46:18.766692 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1969 05:46:18.776015 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1970 05:46:18.782521 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1971 05:46:18.788372 board_setup: Info: eMMC controller not present; skipping
1972 05:46:18.791721 New NVMe Controller 0x30053ac0 @ 00:1d:00
1973 05:46:18.798389 board_setup: Info: SDHCI controller not present; skipping
1974 05:46:18.804698 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1975 05:46:18.804823 Wipe memory regions:
1976 05:46:18.811330 [0x00000000001000, 0x000000000a0000)
1977 05:46:18.814657 [0x00000000100000, 0x00000030000000)
1978 05:46:18.878488 [0x00000030657430, 0x00000099a2c000)
1979 05:46:19.011390 [0x00000100000000, 0x0000045e800000)
1980 05:46:20.329881 R8152: Initializing
1981 05:46:20.332960 Version 9 (ocp_data = 6010)
1982 05:46:20.337561 R8152: Done initializing
1983 05:46:20.340897 Adding net device
1984 05:46:20.831856 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1985 05:46:20.831995
1986 05:46:20.832289 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1988 05:46:20.932851 hatch: tftpboot 192.168.201.1 7096690/tftp-deploy-gbchows6/kernel/bzImage 7096690/tftp-deploy-gbchows6/kernel/cmdline 7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
1989 05:46:20.933017 Setting prompt string to 'Starting kernel'
1990 05:46:20.933111 Setting prompt string to ['Starting kernel']
1991 05:46:20.933179 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1992 05:46:20.933254 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
1993 05:46:20.937700 tftpboot 192.168.201.1 7096690/tftp-deploy-gbchows6/kernel/bzImoy-gbchows6/kernel/cmdline 7096690/tftp-deploy-gbchows6/ramdisk/ramdisk.cpio.gz
1994 05:46:20.937795 Waiting for link
1995 05:46:21.138611 done.
1996 05:46:21.138755 MAC: f4:f5:e8:50:e7:f3
1997 05:46:21.143793 Sending DHCP discover... done.
1998 05:46:21.145300 Waiting for reply... done.
1999 05:46:21.148522 Sending DHCP request... done.
2000 05:46:21.151888 Waiting for reply... done.
2001 05:46:21.155067 My ip is 192.168.201.16
2002 05:46:21.157925 The DHCP server ip is 192.168.201.1
2003 05:46:21.161113 TFTP server IP predefined by user: 192.168.201.1
2004 05:46:21.168258 Bootfile predefined by user: 7096690/tftp-deploy-gbchows6/kernel/bzImage
2005 05:46:21.174794 Sending tftp read request... done.
2006 05:46:21.178223 Waiting for the transfer...
2007 05:46:21.426716 00000000 ################################################################
2008 05:46:21.672569 00080000 ################################################################
2009 05:46:21.916774 00100000 ################################################################
2010 05:46:22.172496 00180000 ################################################################
2011 05:46:22.409107 00200000 ################################################################
2012 05:46:22.648706 00280000 ################################################################
2013 05:46:22.900759 00300000 ################################################################
2014 05:46:23.153678 00380000 ################################################################
2015 05:46:23.409450 00400000 ################################################################
2016 05:46:23.657904 00480000 ################################################################
2017 05:46:23.905949 00500000 ################################################################
2018 05:46:24.160263 00580000 ################################################################
2019 05:46:24.422263 00600000 ################################################################
2020 05:46:24.670257 00680000 ################################################################
2021 05:46:24.923386 00700000 ################################################################
2022 05:46:25.174575 00780000 ################################################################
2023 05:46:25.429453 00800000 ################################################################
2024 05:46:25.448922 00880000 ###### done.
2025 05:46:25.452324 The bootfile was 8953856 bytes long.
2026 05:46:25.455592 Sending tftp read request... done.
2027 05:46:25.458805 Waiting for the transfer...
2028 05:46:25.714028 00000000 ################################################################
2029 05:46:25.974224 00080000 ################################################################
2030 05:46:26.231718 00100000 ################################################################
2031 05:46:26.485847 00180000 ################################################################
2032 05:46:26.754124 00200000 ################################################################
2033 05:46:27.000363 00280000 ################################################################
2034 05:46:27.249266 00300000 ################################################################
2035 05:46:27.528922 00380000 ################################################################
2036 05:46:27.779413 00400000 ################################################################
2037 05:46:28.022204 00480000 ################################################################
2038 05:46:28.258786 00500000 ################################################################
2039 05:46:28.498358 00580000 ################################################################
2040 05:46:28.729142 00600000 ################################################################
2041 05:46:28.962503 00680000 ################################################################
2042 05:46:29.200424 00700000 ################################################################
2043 05:46:29.439977 00780000 ################################################################
2044 05:46:29.521026 00800000 ####################### done.
2045 05:46:29.524395 Sending tftp read request... done.
2046 05:46:29.527530 Waiting for the transfer...
2047 05:46:29.530712 00000000 # done.
2048 05:46:29.540313 Command line loaded dynamically from TFTP file: 7096690/tftp-deploy-gbchows6/kernel/cmdline
2049 05:46:29.556918 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2050 05:46:29.563135 ec_init(0): CrosEC protocol v3 supported (256, 256)
2051 05:46:29.570370 Shutting down all USB controllers.
2052 05:46:29.570468 Removing current net device
2053 05:46:29.574432 Finalizing coreboot
2054 05:46:29.580750 Exiting depthcharge with code 4 at timestamp: 18117489
2055 05:46:29.580850
2056 05:46:29.580922 Starting kernel ...
2057 05:46:29.580987
2058 05:46:29.581294 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2059 05:46:29.581394 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2060 05:46:29.581473 Setting prompt string to ['Linux version [0-9]']
2061 05:46:29.581561 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2062 05:46:29.581634 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2063 05:46:29.583923
2065 05:50:59.581641 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2067 05:50:59.581904 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2069 05:50:59.582113 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2072 05:50:59.582379 end: 2 depthcharge-action (duration 00:05:00) [common]
2074 05:50:59.582570 Cleaning after the job
2075 05:50:59.582653 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/ramdisk
2076 05:50:59.583358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/kernel
2077 05:50:59.584109 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096690/tftp-deploy-gbchows6/modules
2078 05:50:59.584321 start: 5.1 power-off (timeout 00:00:30) [common]
2079 05:50:59.584483 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2080 05:50:59.605347 >> Command sent successfully.
2081 05:50:59.607535 Returned 0 in 0 seconds
2082 05:50:59.708359 end: 5.1 power-off (duration 00:00:00) [common]
2084 05:50:59.708706 start: 5.2 read-feedback (timeout 00:10:00) [common]
2085 05:50:59.708996 Listened to connection for namespace 'common' for up to 1s
2086 05:51:00.575676 Listened to connection for namespace 'common' for up to 1s
2087 05:51:00.579397 Listened to connection for namespace 'common' for up to 1s
2088 05:51:00.582425 Listened to connection for namespace 'common' for up to 1s
2089 05:51:00.586028 Listened to connection for namespace 'common' for up to 1s
2090 05:51:00.589188 Listened to connection for namespace 'common' for up to 1s
2091 05:51:00.592255 Listened to connection for namespace 'common' for up to 1s
2092 05:51:00.595157 Listened to connection for namespace 'common' for up to 1s
2093 05:51:00.599005 Listened to connection for namespace 'common' for up to 1s
2094 05:51:00.602245 Listened to connection for namespace 'common' for up to 1s
2095 05:51:00.605018 Listened to connection for namespace 'common' for up to 1s
2096 05:51:00.608673 Listened to connection for namespace 'common' for up to 1s
2097 05:51:00.611807 Listened to connection for namespace 'common' for up to 1s
2098 05:51:00.614907 Listened to connection for namespace 'common' for up to 1s
2099 05:51:00.618707 Listened to connection for namespace 'common' for up to 1s
2100 05:51:00.621843 Listened to connection for namespace 'common' for up to 1s
2101 05:51:00.624933 Listened to connection for namespace 'common' for up to 1s
2102 05:51:00.628206 Listened to connection for namespace 'common' for up to 1s
2103 05:51:00.631403 Listened to connection for namespace 'common' for up to 1s
2104 05:51:00.635021 Listened to connection for namespace 'common' for up to 1s
2105 05:51:00.638072 Listened to connection for namespace 'common' for up to 1s
2106 05:51:00.641938 Listened to connection for namespace 'common' for up to 1s
2107 05:51:00.644899 Listened to connection for namespace 'common' for up to 1s
2108 05:51:00.648188 Listened to connection for namespace 'common' for up to 1s
2109 05:51:00.651442 Listened to connection for namespace 'common' for up to 1s
2110 05:51:00.654389 Listened to connection for namespace 'common' for up to 1s
2111 05:51:00.657589 Listened to connection for namespace 'common' for up to 1s
2112 05:51:00.661222 Listened to connection for namespace 'common' for up to 1s
2113 05:51:00.664307 Listened to connection for namespace 'common' for up to 1s
2114 05:51:00.667544 Listened to connection for namespace 'common' for up to 1s
2115 05:51:00.671203 Listened to connection for namespace 'common' for up to 1s
2116 05:51:00.674142 Listened to connection for namespace 'common' for up to 1s
2117 05:51:00.677441 Listened to connection for namespace 'common' for up to 1s
2118 05:51:00.680910 Listened to connection for namespace 'common' for up to 1s
2119 05:51:00.684124 Listened to connection for namespace 'common' for up to 1s
2120 05:51:00.687238 Listened to connection for namespace 'common' for up to 1s
2121 05:51:00.690989 Listened to connection for namespace 'common' for up to 1s
2122 05:51:00.694071 Listened to connection for namespace 'common' for up to 1s
2123 05:51:00.697292 Listened to connection for namespace 'common' for up to 1s
2124 05:51:00.700413 Listened to connection for namespace 'common' for up to 1s
2125 05:51:00.704160 Listened to connection for namespace 'common' for up to 1s
2126 05:51:00.707176 Listened to connection for namespace 'common' for up to 1s
2127 05:51:00.708946 Finalising connection for namespace 'common'
2128 05:51:00.709067 Disconnecting from shell: Finalise
2129 05:51:00.709152
2130 05:51:00.809909 end: 5.2 read-feedback (duration 00:00:01) [common]
2131 05:51:00.810086 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096690
2132 05:51:00.815424 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096690
2133 05:51:00.815572 JobError: Your job cannot terminate cleanly.