Boot log: asus-cx9400-volteer

    1 04:52:23.404473  lava-dispatcher, installed at version: 2022.06
    2 04:52:23.404665  start: 0 validate
    3 04:52:23.404799  Start time: 2022-08-23 04:52:23.404792+00:00 (UTC)
    4 04:52:23.404930  Using caching service: 'http://localhost/cache/?uri=%s'
    5 04:52:23.405057  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
    6 04:52:23.712418  Using caching service: 'http://localhost/cache/?uri=%s'
    7 04:52:23.712633  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 04:52:24.004852  Using caching service: 'http://localhost/cache/?uri=%s'
    9 04:52:24.005553  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 04:52:24.306969  validate duration: 0.90
   12 04:52:24.308355  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 04:52:24.308966  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 04:52:24.309512  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 04:52:24.310120  Not decompressing ramdisk as can be used compressed.
   16 04:52:24.310597  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
   17 04:52:24.310986  saving as /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/ramdisk/rootfs.cpio.gz
   18 04:52:24.311339  total size: 8415960 (8MB)
   19 04:52:24.316726  progress   0% (0MB)
   20 04:52:24.328822  progress   5% (0MB)
   21 04:52:24.338541  progress  10% (0MB)
   22 04:52:24.344907  progress  15% (1MB)
   23 04:52:24.349692  progress  20% (1MB)
   24 04:52:24.353761  progress  25% (2MB)
   25 04:52:24.357357  progress  30% (2MB)
   26 04:52:24.360457  progress  35% (2MB)
   27 04:52:24.363464  progress  40% (3MB)
   28 04:52:24.366313  progress  45% (3MB)
   29 04:52:24.368968  progress  50% (4MB)
   30 04:52:24.371442  progress  55% (4MB)
   31 04:52:24.373834  progress  60% (4MB)
   32 04:52:24.375943  progress  65% (5MB)
   33 04:52:24.378109  progress  70% (5MB)
   34 04:52:24.380302  progress  75% (6MB)
   35 04:52:24.382377  progress  80% (6MB)
   36 04:52:24.384460  progress  85% (6MB)
   37 04:52:24.386527  progress  90% (7MB)
   38 04:52:24.388549  progress  95% (7MB)
   39 04:52:24.390656  progress 100% (8MB)
   40 04:52:24.390931  8MB downloaded in 0.08s (100.83MB/s)
   41 04:52:24.391084  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 04:52:24.391327  end: 1.1 download-retry (duration 00:00:00) [common]
   44 04:52:24.391415  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 04:52:24.391502  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 04:52:24.391631  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 04:52:24.391701  saving as /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/kernel/bzImage
   48 04:52:24.391762  total size: 8953856 (8MB)
   49 04:52:24.391824  No compression specified
   50 04:52:29.395184  progress   0% (0MB)
   51 04:52:29.398761  progress   5% (0MB)
   52 04:52:29.401286  progress  10% (0MB)
   53 04:52:29.403507  progress  15% (1MB)
   54 04:52:29.405943  progress  20% (1MB)
   55 04:52:29.408394  progress  25% (2MB)
   56 04:52:29.410664  progress  30% (2MB)
   57 04:52:29.413100  progress  35% (3MB)
   58 04:52:29.415501  progress  40% (3MB)
   59 04:52:29.417742  progress  45% (3MB)
   60 04:52:29.420145  progress  50% (4MB)
   61 04:52:29.422557  progress  55% (4MB)
   62 04:52:29.424839  progress  60% (5MB)
   63 04:52:29.427243  progress  65% (5MB)
   64 04:52:29.429559  progress  70% (6MB)
   65 04:52:29.431652  progress  75% (6MB)
   66 04:52:29.433975  progress  80% (6MB)
   67 04:52:29.436351  progress  85% (7MB)
   68 04:52:29.438457  progress  90% (7MB)
   69 04:52:29.440803  progress  95% (8MB)
   70 04:52:29.443108  progress 100% (8MB)
   71 04:52:29.443290  8MB downloaded in 5.05s (1.69MB/s)
   72 04:52:29.443435  end: 1.2.1 http-download (duration 00:00:05) [common]
   74 04:52:29.443666  end: 1.2 download-retry (duration 00:00:05) [common]
   75 04:52:29.443752  start: 1.3 download-retry (timeout 00:09:55) [common]
   76 04:52:29.443864  start: 1.3.1 http-download (timeout 00:09:55) [common]
   77 04:52:29.444019  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 04:52:29.444087  saving as /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/modules/modules.tar
   79 04:52:29.444147  total size: 64712 (0MB)
   80 04:52:29.444205  Using unxz to decompress xz
   81 04:52:29.447527  progress  50% (0MB)
   82 04:52:29.447945  progress 100% (0MB)
   83 04:52:29.452149  0MB downloaded in 0.01s (7.72MB/s)
   84 04:52:29.452374  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 04:52:29.452624  end: 1.3 download-retry (duration 00:00:00) [common]
   87 04:52:29.452721  start: 1.4 prepare-tftp-overlay (timeout 00:09:55) [common]
   88 04:52:29.452816  start: 1.4.1 extract-nfsrootfs (timeout 00:09:55) [common]
   89 04:52:29.452900  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 04:52:29.452986  start: 1.4.2 lava-overlay (timeout 00:09:55) [common]
   91 04:52:29.453170  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x
   92 04:52:29.453295  makedir: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin
   93 04:52:29.453400  makedir: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/tests
   94 04:52:29.453494  makedir: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/results
   95 04:52:29.453601  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-add-keys
   96 04:52:29.453739  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-add-sources
   97 04:52:29.453864  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-background-process-start
   98 04:52:29.453985  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-background-process-stop
   99 04:52:29.454104  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-common-functions
  100 04:52:29.454222  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-echo-ipv4
  101 04:52:29.454343  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-install-packages
  102 04:52:29.454462  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-installed-packages
  103 04:52:29.454579  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-os-build
  104 04:52:29.454697  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-probe-channel
  105 04:52:29.454815  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-probe-ip
  106 04:52:29.454933  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-target-ip
  107 04:52:29.455051  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-target-mac
  108 04:52:29.455168  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-target-storage
  109 04:52:29.455289  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-case
  110 04:52:29.455409  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-event
  111 04:52:29.455533  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-feedback
  112 04:52:29.455651  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-raise
  113 04:52:29.455773  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-reference
  114 04:52:29.455948  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-runner
  115 04:52:29.456065  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-set
  116 04:52:29.456181  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-test-shell
  117 04:52:29.456301  Updating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-install-packages (oe)
  118 04:52:29.456457  Updating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/bin/lava-installed-packages (oe)
  119 04:52:29.456578  Creating /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/environment
  120 04:52:29.456677  LAVA metadata
  121 04:52:29.456747  - LAVA_JOB_ID=7096660
  122 04:52:29.456810  - LAVA_DISPATCHER_IP=192.168.201.1
  123 04:52:29.456915  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:55) [common]
  124 04:52:29.456980  skipped lava-vland-overlay
  125 04:52:29.457056  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 04:52:29.457140  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
  127 04:52:29.457202  skipped lava-multinode-overlay
  128 04:52:29.457276  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 04:52:29.457357  start: 1.4.2.3 test-definition (timeout 00:09:55) [common]
  130 04:52:29.457430  Loading test definitions
  131 04:52:29.457526  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:55) [common]
  132 04:52:29.457603  Using /lava-7096660 at stage 0
  133 04:52:29.457902  uuid=7096660_1.4.2.3.1 testdef=None
  134 04:52:29.457994  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 04:52:29.458086  start: 1.4.2.3.2 test-overlay (timeout 00:09:55) [common]
  136 04:52:29.458599  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 04:52:29.458826  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:55) [common]
  139 04:52:29.459469  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 04:52:29.459707  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
  142 04:52:29.460370  runner path: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/0/tests/0_dmesg test_uuid 7096660_1.4.2.3.1
  143 04:52:29.460528  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 04:52:29.460757  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:55) [common]
  146 04:52:29.460830  Using /lava-7096660 at stage 1
  147 04:52:29.461106  uuid=7096660_1.4.2.3.5 testdef=None
  148 04:52:29.461197  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 04:52:29.461282  start: 1.4.2.3.6 test-overlay (timeout 00:09:55) [common]
  150 04:52:29.461745  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 04:52:29.461966  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:55) [common]
  153 04:52:29.462603  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 04:52:29.462838  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:55) [common]
  156 04:52:29.463462  runner path: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/1/tests/1_bootrr test_uuid 7096660_1.4.2.3.5
  157 04:52:29.463614  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 04:52:29.463828  Creating lava-test-runner.conf files
  160 04:52:29.463928  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/0 for stage 0
  161 04:52:29.464014  - 0_dmesg
  162 04:52:29.464091  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096660/lava-overlay-tbkcj60x/lava-7096660/1 for stage 1
  163 04:52:29.464179  - 1_bootrr
  164 04:52:29.464274  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 04:52:29.464360  start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
  166 04:52:29.470846  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 04:52:29.470953  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
  168 04:52:29.471042  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 04:52:29.471126  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 04:52:29.471212  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
  171 04:52:29.681355  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 04:52:29.681691  start: 1.4.4 extract-modules (timeout 00:09:55) [common]
  173 04:52:29.681797  extracting modules file /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096660/extract-overlay-ramdisk-amkbyc7f/ramdisk
  174 04:52:29.686693  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 04:52:29.686822  start: 1.4.5 apply-overlay-tftp (timeout 00:09:55) [common]
  176 04:52:29.686911  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096660/compress-overlay-xzqqrlha/overlay-1.4.2.4.tar.gz to ramdisk
  177 04:52:29.686989  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096660/compress-overlay-xzqqrlha/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096660/extract-overlay-ramdisk-amkbyc7f/ramdisk
  178 04:52:29.691723  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 04:52:29.691892  start: 1.4.6 configure-preseed-file (timeout 00:09:55) [common]
  180 04:52:29.691999  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 04:52:29.692089  start: 1.4.7 compress-ramdisk (timeout 00:09:55) [common]
  182 04:52:29.692168  Building ramdisk /var/lib/lava/dispatcher/tmp/7096660/extract-overlay-ramdisk-amkbyc7f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096660/extract-overlay-ramdisk-amkbyc7f/ramdisk
  183 04:52:29.785364  >> 48236 blocks

  184 04:52:30.600374  rename /var/lib/lava/dispatcher/tmp/7096660/extract-overlay-ramdisk-amkbyc7f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
  185 04:52:30.600784  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 04:52:30.600951  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  187 04:52:30.601073  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  188 04:52:30.601212  No mkimage arch provided, not using FIT.
  189 04:52:30.601303  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 04:52:30.601388  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 04:52:30.601485  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 04:52:30.601602  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  193 04:52:30.601681  No LXC device requested
  194 04:52:30.601810  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 04:52:30.601923  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  196 04:52:30.602011  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 04:52:30.602116  Checking files for TFTP limit of 4294967296 bytes.
  198 04:52:30.602515  end: 1 tftp-deploy (duration 00:00:06) [common]
  199 04:52:30.602622  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 04:52:30.602722  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 04:52:30.602860  substitutions:
  202 04:52:30.602937  - {DTB}: None
  203 04:52:30.603020  - {INITRD}: 7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
  204 04:52:30.603130  - {KERNEL}: 7096660/tftp-deploy-48arh6ss/kernel/bzImage
  205 04:52:30.603208  - {LAVA_MAC}: None
  206 04:52:30.603285  - {PRESEED_CONFIG}: None
  207 04:52:30.603344  - {PRESEED_LOCAL}: None
  208 04:52:30.603403  - {RAMDISK}: 7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
  209 04:52:30.603461  - {ROOT_PART}: None
  210 04:52:30.603519  - {ROOT}: None
  211 04:52:30.603576  - {SERVER_IP}: 192.168.201.1
  212 04:52:30.603633  - {TEE}: None
  213 04:52:30.603692  Parsed boot commands:
  214 04:52:30.603749  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 04:52:30.603950  Parsed boot commands: tftpboot 192.168.201.1 7096660/tftp-deploy-48arh6ss/kernel/bzImage 7096660/tftp-deploy-48arh6ss/kernel/cmdline 7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
  216 04:52:30.604065  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 04:52:30.604158  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 04:52:30.604279  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 04:52:30.604367  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 04:52:30.604438  Not connected, no need to disconnect.
  221 04:52:30.604516  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 04:52:30.604634  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 04:52:30.604702  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
  224 04:52:30.607546  Setting prompt string to ['lava-test: # ']
  225 04:52:30.607876  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 04:52:30.608017  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 04:52:30.608154  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 04:52:30.608279  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 04:52:30.608509  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
  230 04:52:30.628701  >> Command sent successfully.

  231 04:52:30.630785  Returned 0 in 0 seconds
  232 04:52:30.731585  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 04:52:30.732244  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 04:52:30.732348  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 04:52:30.732438  Setting prompt string to 'Starting depthcharge on Voema...'
  237 04:52:30.732503  Changing prompt to 'Starting depthcharge on Voema...'
  238 04:52:30.732610  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 04:52:30.732904  [Enter `^Ec?' for help]
  240 04:52:38.036273  
  241 04:52:38.036435  
  242 04:52:38.046214  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  243 04:52:38.052773  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
  244 04:52:38.056250  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  245 04:52:38.059444  CPU: AES supported, TXT NOT supported, VT supported
  246 04:52:38.066576  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  247 04:52:38.070441  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  248 04:52:38.076837  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  249 04:52:38.080190  VBOOT: Loading verstage.
  250 04:52:38.083559  FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
  251 04:52:38.090060  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  252 04:52:38.093500  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  253 04:52:38.103195  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  254 04:52:38.109970  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  255 04:52:38.110095  
  256 04:52:38.110166  
  257 04:52:38.120034  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  258 04:52:38.137133  Probing TPM: . done!
  259 04:52:38.140091  TPM ready after 0 ms
  260 04:52:38.143395  Connected to device vid:did:rid of 1ae0:0028:00
  261 04:52:38.154681  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  262 04:52:38.161433  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  263 04:52:38.164709  Initialized TPM device CR50 revision 0
  264 04:52:38.221156  tlcl_send_startup: Startup return code is 0
  265 04:52:38.221304  TPM: setup succeeded
  266 04:52:38.236697  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  267 04:52:38.250639  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  268 04:52:38.263770  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  269 04:52:38.273391  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  270 04:52:38.277380  Chrome EC: UHEPI supported
  271 04:52:38.280225  Phase 1
  272 04:52:38.283727  FMAP: area GBB found @ 1805000 (458752 bytes)
  273 04:52:38.293489  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  274 04:52:38.299869  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  275 04:52:38.306670  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  276 04:52:38.313639  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  277 04:52:38.316858  Recovery requested (1009000e)
  278 04:52:38.320106  TPM: Extending digest for VBOOT: boot mode into PCR 0
  279 04:52:38.331725  tlcl_extend: response is 0
  280 04:52:38.338293  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  281 04:52:38.348206  tlcl_extend: response is 0
  282 04:52:38.354866  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  283 04:52:38.361369  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  284 04:52:38.368271  BS: verstage times (exec / console): total (unknown) / 142 ms
  285 04:52:38.368416  
  286 04:52:38.368515  
  287 04:52:38.381345  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  288 04:52:38.387767  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  289 04:52:38.391055  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  290 04:52:38.394607  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  291 04:52:38.400909  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  292 04:52:38.404438  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  293 04:52:38.407725  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  294 04:52:38.410847  TCO_STS:   0000 0000
  295 04:52:38.413790  GEN_PMCON: d0015038 00002200
  296 04:52:38.417128  GBLRST_CAUSE: 00000000 00000000
  297 04:52:38.420532  HPR_CAUSE0: 00000000
  298 04:52:38.420649  prev_sleep_state 5
  299 04:52:38.423683  Boot Count incremented to 7258
  300 04:52:38.430453  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  301 04:52:38.437236  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  302 04:52:38.447117  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  303 04:52:38.453379  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  304 04:52:38.457216  Chrome EC: UHEPI supported
  305 04:52:38.463565  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  306 04:52:38.474926  Probing TPM:  done!
  307 04:52:38.481494  Connected to device vid:did:rid of 1ae0:0028:00
  308 04:52:38.491612  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  309 04:52:38.495020  Initialized TPM device CR50 revision 0
  310 04:52:38.509603  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  311 04:52:38.516443  MRC: Hash idx 0x100b comparison successful.
  312 04:52:38.519394  MRC cache found, size faa8
  313 04:52:38.519508  bootmode is set to: 2
  314 04:52:38.522982  SPD index = 2
  315 04:52:38.529636  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  316 04:52:38.533188  SPD: module type is LPDDR4X
  317 04:52:38.536153  SPD: module part number is MT53D1G64D4NW-046
  318 04:52:38.542662  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
  319 04:52:38.546083  SPD: device width 16 bits, bus width 16 bits
  320 04:52:38.552895  SPD: module size is 2048 MB (per channel)
  321 04:52:38.981794  CBMEM:
  322 04:52:38.985153  IMD: root @ 0x76fff000 254 entries.
  323 04:52:38.988132  IMD: root @ 0x76ffec00 62 entries.
  324 04:52:38.991575  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  325 04:52:38.998265  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  326 04:52:39.001259  External stage cache:
  327 04:52:39.004886  IMD: root @ 0x7b3ff000 254 entries.
  328 04:52:39.008244  IMD: root @ 0x7b3fec00 62 entries.
  329 04:52:39.022833  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  330 04:52:39.029501  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  331 04:52:39.035725  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  332 04:52:39.050113  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  333 04:52:39.056489  cse_lite: Skip switching to RW in the recovery path
  334 04:52:39.056618  8 DIMMs found
  335 04:52:39.056693  SMM Memory Map
  336 04:52:39.063166  SMRAM       : 0x7b000000 0x800000
  337 04:52:39.066531   Subregion 0: 0x7b000000 0x200000
  338 04:52:39.069710   Subregion 1: 0x7b200000 0x200000
  339 04:52:39.072924   Subregion 2: 0x7b400000 0x400000
  340 04:52:39.073047  top_of_ram = 0x77000000
  341 04:52:39.079674  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  342 04:52:39.086160  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  343 04:52:39.089627  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  344 04:52:39.096086  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  345 04:52:39.102774  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  346 04:52:39.109444  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  347 04:52:39.119492  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  348 04:52:39.126123  Processing 211 relocs. Offset value of 0x74c0b000
  349 04:52:39.132536  BS: romstage times (exec / console): total (unknown) / 276 ms
  350 04:52:39.138512  
  351 04:52:39.138612  
  352 04:52:39.149059  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  353 04:52:39.152768  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  354 04:52:39.159209  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  355 04:52:39.169334  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  356 04:52:39.176124  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  357 04:52:39.182661  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  358 04:52:39.225461  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  359 04:52:39.232003  Processing 5008 relocs. Offset value of 0x75d98000
  360 04:52:39.235400  BS: postcar times (exec / console): total (unknown) / 59 ms
  361 04:52:39.238357  
  362 04:52:39.238469  
  363 04:52:39.248424  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  364 04:52:39.248532  Normal boot
  365 04:52:39.251692  FW_CONFIG value is 0x804c02
  366 04:52:39.255106  PCI: 00:07.0 disabled by fw_config
  367 04:52:39.258588  PCI: 00:07.1 disabled by fw_config
  368 04:52:39.261487  PCI: 00:0d.2 disabled by fw_config
  369 04:52:39.268257  PCI: 00:1c.7 disabled by fw_config
  370 04:52:39.271701  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  371 04:52:39.278076  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  372 04:52:39.281424  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  373 04:52:39.288225  GENERIC: 0.0 disabled by fw_config
  374 04:52:39.291483  GENERIC: 1.0 disabled by fw_config
  375 04:52:39.294996  fw_config match found: DB_USB=USB3_ACTIVE
  376 04:52:39.298054  fw_config match found: DB_USB=USB3_ACTIVE
  377 04:52:39.301462  fw_config match found: DB_USB=USB3_ACTIVE
  378 04:52:39.308262  fw_config match found: DB_USB=USB3_ACTIVE
  379 04:52:39.311307  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  380 04:52:39.318158  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  381 04:52:39.328146  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  382 04:52:39.334801  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  383 04:52:39.338219  microcode: sig=0x806c1 pf=0x80 revision=0x86
  384 04:52:39.344518  microcode: Update skipped, already up-to-date
  385 04:52:39.351099  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  386 04:52:39.378683  Detected 4 core, 8 thread CPU.
  387 04:52:39.382147  Setting up SMI for CPU
  388 04:52:39.385556  IED base = 0x7b400000
  389 04:52:39.385644  IED size = 0x00400000
  390 04:52:39.388760  Will perform SMM setup.
  391 04:52:39.395431  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
  392 04:52:39.402235  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  393 04:52:39.408455  Processing 16 relocs. Offset value of 0x00030000
  394 04:52:39.411799  Attempting to start 7 APs
  395 04:52:39.415476  Waiting for 10ms after sending INIT.
  396 04:52:39.430721  Waiting for 1st SIPI to complete...done.
  397 04:52:39.430840  AP: slot 1 apic_id 3.
  398 04:52:39.434242  AP: slot 5 apic_id 2.
  399 04:52:39.437278  AP: slot 7 apic_id 4.
  400 04:52:39.437366  AP: slot 2 apic_id 5.
  401 04:52:39.440683  AP: slot 3 apic_id 6.
  402 04:52:39.444060  AP: slot 4 apic_id 7.
  403 04:52:39.447433  Waiting for 2nd SIPI to complete...done.
  404 04:52:39.450672  AP: slot 6 apic_id 1.
  405 04:52:39.457383  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  406 04:52:39.463736  Processing 13 relocs. Offset value of 0x00038000
  407 04:52:39.467263  Unable to locate Global NVS
  408 04:52:39.474161  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  409 04:52:39.477240  Installing permanent SMM handler to 0x7b000000
  410 04:52:39.487150  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  411 04:52:39.490522  Processing 794 relocs. Offset value of 0x7b010000
  412 04:52:39.500483  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  413 04:52:39.503752  Processing 13 relocs. Offset value of 0x7b008000
  414 04:52:39.510500  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  415 04:52:39.517004  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  416 04:52:39.520537  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  417 04:52:39.526895  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  418 04:52:39.533524  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  419 04:52:39.540409  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  420 04:52:39.546759  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  421 04:52:39.546849  Unable to locate Global NVS
  422 04:52:39.556716  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  423 04:52:39.560011  Clearing SMI status registers
  424 04:52:39.560146  SMI_STS: PM1 
  425 04:52:39.563432  PM1_STS: PWRBTN 
  426 04:52:39.570053  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  427 04:52:39.573395  In relocation handler: CPU 0
  428 04:52:39.576886  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  429 04:52:39.583456  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  430 04:52:39.583547  Relocation complete.
  431 04:52:39.593387  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  432 04:52:39.593479  In relocation handler: CPU 6
  433 04:52:39.599722  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  434 04:52:39.599812  Relocation complete.
  435 04:52:39.609841  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  436 04:52:39.609931  In relocation handler: CPU 1
  437 04:52:39.616420  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  438 04:52:39.616509  Relocation complete.
  439 04:52:39.626209  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  440 04:52:39.626312  In relocation handler: CPU 5
  441 04:52:39.632545  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  442 04:52:39.636151  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  443 04:52:39.639476  Relocation complete.
  444 04:52:39.645991  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  445 04:52:39.649485  In relocation handler: CPU 2
  446 04:52:39.652734  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  447 04:52:39.655815  Relocation complete.
  448 04:52:39.662357  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  449 04:52:39.665829  In relocation handler: CPU 7
  450 04:52:39.669123  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  451 04:52:39.675675  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  452 04:52:39.675768  Relocation complete.
  453 04:52:39.682228  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  454 04:52:39.685482  In relocation handler: CPU 3
  455 04:52:39.692343  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  456 04:52:39.695381  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  457 04:52:39.698652  Relocation complete.
  458 04:52:39.705478  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  459 04:52:39.708599  In relocation handler: CPU 4
  460 04:52:39.712135  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  461 04:52:39.715236  Relocation complete.
  462 04:52:39.715320  Initializing CPU #0
  463 04:52:39.718928  CPU: vendor Intel device 806c1
  464 04:52:39.725470  CPU: family 06, model 8c, stepping 01
  465 04:52:39.725563  Clearing out pending MCEs
  466 04:52:39.728549  Setting up local APIC...
  467 04:52:39.732058   apic_id: 0x00 done.
  468 04:52:39.735469  Turbo is available but hidden
  469 04:52:39.738540  Turbo is available and visible
  470 04:52:39.742044  microcode: Update skipped, already up-to-date
  471 04:52:39.745009  CPU #0 initialized
  472 04:52:39.745087  Initializing CPU #1
  473 04:52:39.748421  Initializing CPU #5
  474 04:52:39.752021  CPU: vendor Intel device 806c1
  475 04:52:39.754954  CPU: family 06, model 8c, stepping 01
  476 04:52:39.758237  Initializing CPU #4
  477 04:52:39.758358  Initializing CPU #3
  478 04:52:39.761645  CPU: vendor Intel device 806c1
  479 04:52:39.765169  CPU: family 06, model 8c, stepping 01
  480 04:52:39.768603  CPU: vendor Intel device 806c1
  481 04:52:39.772041  CPU: family 06, model 8c, stepping 01
  482 04:52:39.775233  Clearing out pending MCEs
  483 04:52:39.778246  Clearing out pending MCEs
  484 04:52:39.781571  Setting up local APIC...
  485 04:52:39.781659  Initializing CPU #6
  486 04:52:39.784944  Clearing out pending MCEs
  487 04:52:39.788342  CPU: vendor Intel device 806c1
  488 04:52:39.791704  CPU: family 06, model 8c, stepping 01
  489 04:52:39.795186  Setting up local APIC...
  490 04:52:39.798241  Initializing CPU #7
  491 04:52:39.798330  Initializing CPU #2
  492 04:52:39.801776  CPU: vendor Intel device 806c1
  493 04:52:39.805155  CPU: family 06, model 8c, stepping 01
  494 04:52:39.808322  CPU: vendor Intel device 806c1
  495 04:52:39.811760  CPU: family 06, model 8c, stepping 01
  496 04:52:39.815358  Clearing out pending MCEs
  497 04:52:39.818848  Clearing out pending MCEs
  498 04:52:39.822821  Setting up local APIC...
  499 04:52:39.822908   apic_id: 0x07 done.
  500 04:52:39.825751  Setting up local APIC...
  501 04:52:39.829296  Clearing out pending MCEs
  502 04:52:39.829383   apic_id: 0x03 done.
  503 04:52:39.832415  Setting up local APIC...
  504 04:52:39.839382  microcode: Update skipped, already up-to-date
  505 04:52:39.839469   apic_id: 0x02 done.
  506 04:52:39.842373  CPU #1 initialized
  507 04:52:39.842458   apic_id: 0x04 done.
  508 04:52:39.845847  Setting up local APIC...
  509 04:52:39.849237  CPU: vendor Intel device 806c1
  510 04:52:39.852546  CPU: family 06, model 8c, stepping 01
  511 04:52:39.859068  microcode: Update skipped, already up-to-date
  512 04:52:39.859159   apic_id: 0x05 done.
  513 04:52:39.862388  CPU #7 initialized
  514 04:52:39.865773  microcode: Update skipped, already up-to-date
  515 04:52:39.869105   apic_id: 0x06 done.
  516 04:52:39.872365  microcode: Update skipped, already up-to-date
  517 04:52:39.878834  microcode: Update skipped, already up-to-date
  518 04:52:39.878923  CPU #4 initialized
  519 04:52:39.882229  CPU #3 initialized
  520 04:52:39.885439  microcode: Update skipped, already up-to-date
  521 04:52:39.888764  CPU #2 initialized
  522 04:52:39.888852  CPU #5 initialized
  523 04:52:39.892143  Clearing out pending MCEs
  524 04:52:39.895600  Setting up local APIC...
  525 04:52:39.899077   apic_id: 0x01 done.
  526 04:52:39.902238  microcode: Update skipped, already up-to-date
  527 04:52:39.905305  CPU #6 initialized
  528 04:52:39.908704  bsp_do_flight_plan done after 457 msecs.
  529 04:52:39.912219  CPU: frequency set to 4400 MHz
  530 04:52:39.912307  Enabling SMIs.
  531 04:52:39.918756  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  532 04:52:39.935640  SATAXPCIE1 indicates PCIe NVMe is present
  533 04:52:39.939194  Probing TPM:  done!
  534 04:52:39.942610  Connected to device vid:did:rid of 1ae0:0028:00
  535 04:52:39.953308  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  536 04:52:39.956190  Initialized TPM device CR50 revision 0
  537 04:52:39.959771  Enabling S0i3.4
  538 04:52:39.966173  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  539 04:52:39.969324  Found a VBT of 8704 bytes after decompression
  540 04:52:39.976203  cse_lite: CSE RO boot. HybridStorageMode disabled
  541 04:52:39.982713  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  542 04:52:40.058299  FSPS returned 0
  543 04:52:40.061610  Executing Phase 1 of FspMultiPhaseSiInit
  544 04:52:40.071522  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  545 04:52:40.074816  port C0 DISC req: usage 1 usb3 1 usb2 5
  546 04:52:40.078155  Raw Buffer output 0 00000511
  547 04:52:40.081066  Raw Buffer output 1 00000000
  548 04:52:40.084923  pmc_send_ipc_cmd succeeded
  549 04:52:40.091730  port C1 DISC req: usage 1 usb3 2 usb2 3
  550 04:52:40.091885  Raw Buffer output 0 00000321
  551 04:52:40.094716  Raw Buffer output 1 00000000
  552 04:52:40.099321  pmc_send_ipc_cmd succeeded
  553 04:52:40.104346  Detected 4 core, 8 thread CPU.
  554 04:52:40.107681  Detected 4 core, 8 thread CPU.
  555 04:52:40.307464  Display FSP Version Info HOB
  556 04:52:40.310693  Reference Code - CPU = a.0.4c.31
  557 04:52:40.314256  uCode Version = 0.0.0.86
  558 04:52:40.317323  TXT ACM version = ff.ff.ff.ffff
  559 04:52:40.320916  Reference Code - ME = a.0.4c.31
  560 04:52:40.324043  MEBx version = 0.0.0.0
  561 04:52:40.327514  ME Firmware Version = Consumer SKU
  562 04:52:40.330548  Reference Code - PCH = a.0.4c.31
  563 04:52:40.334283  PCH-CRID Status = Disabled
  564 04:52:40.337551  PCH-CRID Original Value = ff.ff.ff.ffff
  565 04:52:40.340517  PCH-CRID New Value = ff.ff.ff.ffff
  566 04:52:40.344052  OPROM - RST - RAID = ff.ff.ff.ffff
  567 04:52:40.347460  PCH Hsio Version = 4.0.0.0
  568 04:52:40.350497  Reference Code - SA - System Agent = a.0.4c.31
  569 04:52:40.354059  Reference Code - MRC = 2.0.0.1
  570 04:52:40.357086  SA - PCIe Version = a.0.4c.31
  571 04:52:40.360427  SA-CRID Status = Disabled
  572 04:52:40.363986  SA-CRID Original Value = 0.0.0.1
  573 04:52:40.367588  SA-CRID New Value = 0.0.0.1
  574 04:52:40.370814  OPROM - VBIOS = ff.ff.ff.ffff
  575 04:52:40.373807  IO Manageability Engine FW Version = 11.1.4.0
  576 04:52:40.377186  PHY Build Version = 0.0.0.e0
  577 04:52:40.380600  Thunderbolt(TM) FW Version = 0.0.0.0
  578 04:52:40.387088  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  579 04:52:40.390374  ITSS IRQ Polarities Before:
  580 04:52:40.390466  IPC0: 0xffffffff
  581 04:52:40.393810  IPC1: 0xffffffff
  582 04:52:40.393903  IPC2: 0xffffffff
  583 04:52:40.397410  IPC3: 0xffffffff
  584 04:52:40.401099  ITSS IRQ Polarities After:
  585 04:52:40.401187  IPC0: 0xffffffff
  586 04:52:40.401255  IPC1: 0xffffffff
  587 04:52:40.404994  IPC2: 0xffffffff
  588 04:52:40.405085  IPC3: 0xffffffff
  589 04:52:40.411713  Found PCIe Root Port #9 at PCI: 00:1d.0.
  590 04:52:40.421257  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  591 04:52:40.434533  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  592 04:52:40.448163  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  593 04:52:40.454263  BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
  594 04:52:40.454388  Enumerating buses...
  595 04:52:40.461093  Show all devs... Before device enumeration.
  596 04:52:40.461192  Root Device: enabled 1
  597 04:52:40.464416  DOMAIN: 0000: enabled 1
  598 04:52:40.467737  CPU_CLUSTER: 0: enabled 1
  599 04:52:40.470976  PCI: 00:00.0: enabled 1
  600 04:52:40.471057  PCI: 00:02.0: enabled 1
  601 04:52:40.474312  PCI: 00:04.0: enabled 1
  602 04:52:40.477444  PCI: 00:05.0: enabled 1
  603 04:52:40.477539  PCI: 00:06.0: enabled 0
  604 04:52:40.481011  PCI: 00:07.0: enabled 0
  605 04:52:40.484318  PCI: 00:07.1: enabled 0
  606 04:52:40.487641  PCI: 00:07.2: enabled 0
  607 04:52:40.487731  PCI: 00:07.3: enabled 0
  608 04:52:40.490677  PCI: 00:08.0: enabled 1
  609 04:52:40.494048  PCI: 00:09.0: enabled 0
  610 04:52:40.497343  PCI: 00:0a.0: enabled 0
  611 04:52:40.497439  PCI: 00:0d.0: enabled 1
  612 04:52:40.500778  PCI: 00:0d.1: enabled 0
  613 04:52:40.504142  PCI: 00:0d.2: enabled 0
  614 04:52:40.507438  PCI: 00:0d.3: enabled 0
  615 04:52:40.507549  PCI: 00:0e.0: enabled 0
  616 04:52:40.510701  PCI: 00:10.2: enabled 1
  617 04:52:40.514183  PCI: 00:10.6: enabled 0
  618 04:52:40.517443  PCI: 00:10.7: enabled 0
  619 04:52:40.517545  PCI: 00:12.0: enabled 0
  620 04:52:40.520647  PCI: 00:12.6: enabled 0
  621 04:52:40.523735  PCI: 00:13.0: enabled 0
  622 04:52:40.527309  PCI: 00:14.0: enabled 1
  623 04:52:40.527418  PCI: 00:14.1: enabled 0
  624 04:52:40.530502  PCI: 00:14.2: enabled 1
  625 04:52:40.534116  PCI: 00:14.3: enabled 1
  626 04:52:40.534219  PCI: 00:15.0: enabled 1
  627 04:52:40.537011  PCI: 00:15.1: enabled 1
  628 04:52:40.540392  PCI: 00:15.2: enabled 1
  629 04:52:40.543908  PCI: 00:15.3: enabled 1
  630 04:52:40.544072  PCI: 00:16.0: enabled 1
  631 04:52:40.547104  PCI: 00:16.1: enabled 0
  632 04:52:40.550504  PCI: 00:16.2: enabled 0
  633 04:52:40.553592  PCI: 00:16.3: enabled 0
  634 04:52:40.553687  PCI: 00:16.4: enabled 0
  635 04:52:40.556633  PCI: 00:16.5: enabled 0
  636 04:52:40.560138  PCI: 00:17.0: enabled 1
  637 04:52:40.563477  PCI: 00:19.0: enabled 0
  638 04:52:40.563583  PCI: 00:19.1: enabled 1
  639 04:52:40.566769  PCI: 00:19.2: enabled 0
  640 04:52:40.570201  PCI: 00:1c.0: enabled 1
  641 04:52:40.573281  PCI: 00:1c.1: enabled 0
  642 04:52:40.573386  PCI: 00:1c.2: enabled 0
  643 04:52:40.576552  PCI: 00:1c.3: enabled 0
  644 04:52:40.579804  PCI: 00:1c.4: enabled 0
  645 04:52:40.579941  PCI: 00:1c.5: enabled 0
  646 04:52:40.583286  PCI: 00:1c.6: enabled 1
  647 04:52:40.586544  PCI: 00:1c.7: enabled 0
  648 04:52:40.589831  PCI: 00:1d.0: enabled 1
  649 04:52:40.589934  PCI: 00:1d.1: enabled 0
  650 04:52:40.593350  PCI: 00:1d.2: enabled 1
  651 04:52:40.596862  PCI: 00:1d.3: enabled 0
  652 04:52:40.599612  PCI: 00:1e.0: enabled 1
  653 04:52:40.599699  PCI: 00:1e.1: enabled 0
  654 04:52:40.603230  PCI: 00:1e.2: enabled 1
  655 04:52:40.606521  PCI: 00:1e.3: enabled 1
  656 04:52:40.609791  PCI: 00:1f.0: enabled 1
  657 04:52:40.609878  PCI: 00:1f.1: enabled 0
  658 04:52:40.613239  PCI: 00:1f.2: enabled 1
  659 04:52:40.616731  PCI: 00:1f.3: enabled 1
  660 04:52:40.619580  PCI: 00:1f.4: enabled 0
  661 04:52:40.619666  PCI: 00:1f.5: enabled 1
  662 04:52:40.623177  PCI: 00:1f.6: enabled 0
  663 04:52:40.626201  PCI: 00:1f.7: enabled 0
  664 04:52:40.626287  APIC: 00: enabled 1
  665 04:52:40.629701  GENERIC: 0.0: enabled 1
  666 04:52:40.632862  GENERIC: 0.0: enabled 1
  667 04:52:40.636202  GENERIC: 1.0: enabled 1
  668 04:52:40.636295  GENERIC: 0.0: enabled 1
  669 04:52:40.639400  GENERIC: 1.0: enabled 1
  670 04:52:40.642955  USB0 port 0: enabled 1
  671 04:52:40.645982  GENERIC: 0.0: enabled 1
  672 04:52:40.646070  USB0 port 0: enabled 1
  673 04:52:40.649464  GENERIC: 0.0: enabled 1
  674 04:52:40.652919  I2C: 00:1a: enabled 1
  675 04:52:40.653006  I2C: 00:31: enabled 1
  676 04:52:40.656043  I2C: 00:32: enabled 1
  677 04:52:40.659524  I2C: 00:10: enabled 1
  678 04:52:40.659612  I2C: 00:15: enabled 1
  679 04:52:40.662671  GENERIC: 0.0: enabled 0
  680 04:52:40.666083  GENERIC: 1.0: enabled 0
  681 04:52:40.669501  GENERIC: 0.0: enabled 1
  682 04:52:40.669612  SPI: 00: enabled 1
  683 04:52:40.672998  SPI: 00: enabled 1
  684 04:52:40.673084  PNP: 0c09.0: enabled 1
  685 04:52:40.675878  GENERIC: 0.0: enabled 1
  686 04:52:40.679427  USB3 port 0: enabled 1
  687 04:52:40.682778  USB3 port 1: enabled 1
  688 04:52:40.682865  USB3 port 2: enabled 0
  689 04:52:40.685841  USB3 port 3: enabled 0
  690 04:52:40.689102  USB2 port 0: enabled 0
  691 04:52:40.689188  USB2 port 1: enabled 1
  692 04:52:40.692378  USB2 port 2: enabled 1
  693 04:52:40.695772  USB2 port 3: enabled 0
  694 04:52:40.699307  USB2 port 4: enabled 1
  695 04:52:40.699395  USB2 port 5: enabled 0
  696 04:52:40.702689  USB2 port 6: enabled 0
  697 04:52:40.705660  USB2 port 7: enabled 0
  698 04:52:40.705747  USB2 port 8: enabled 0
  699 04:52:40.709260  USB2 port 9: enabled 0
  700 04:52:40.712543  USB3 port 0: enabled 0
  701 04:52:40.715862  USB3 port 1: enabled 1
  702 04:52:40.715997  USB3 port 2: enabled 0
  703 04:52:40.718895  USB3 port 3: enabled 0
  704 04:52:40.722197  GENERIC: 0.0: enabled 1
  705 04:52:40.722301  GENERIC: 1.0: enabled 1
  706 04:52:40.725554  APIC: 03: enabled 1
  707 04:52:40.729111  APIC: 05: enabled 1
  708 04:52:40.729209  APIC: 06: enabled 1
  709 04:52:40.732291  APIC: 07: enabled 1
  710 04:52:40.735719  APIC: 02: enabled 1
  711 04:52:40.735820  APIC: 01: enabled 1
  712 04:52:40.738887  APIC: 04: enabled 1
  713 04:52:40.738979  Compare with tree...
  714 04:52:40.742284  Root Device: enabled 1
  715 04:52:40.745795   DOMAIN: 0000: enabled 1
  716 04:52:40.748833    PCI: 00:00.0: enabled 1
  717 04:52:40.748953    PCI: 00:02.0: enabled 1
  718 04:52:40.752502    PCI: 00:04.0: enabled 1
  719 04:52:40.755354     GENERIC: 0.0: enabled 1
  720 04:52:40.758816    PCI: 00:05.0: enabled 1
  721 04:52:40.761989    PCI: 00:06.0: enabled 0
  722 04:52:40.762080    PCI: 00:07.0: enabled 0
  723 04:52:40.765371     GENERIC: 0.0: enabled 1
  724 04:52:40.768786    PCI: 00:07.1: enabled 0
  725 04:52:40.772354     GENERIC: 1.0: enabled 1
  726 04:52:40.775334    PCI: 00:07.2: enabled 0
  727 04:52:40.778580     GENERIC: 0.0: enabled 1
  728 04:52:40.778659    PCI: 00:07.3: enabled 0
  729 04:52:40.782167     GENERIC: 1.0: enabled 1
  730 04:52:40.785377    PCI: 00:08.0: enabled 1
  731 04:52:40.788707    PCI: 00:09.0: enabled 0
  732 04:52:40.792113    PCI: 00:0a.0: enabled 0
  733 04:52:40.792187    PCI: 00:0d.0: enabled 1
  734 04:52:40.795492     USB0 port 0: enabled 1
  735 04:52:40.798548      USB3 port 0: enabled 1
  736 04:52:40.801978      USB3 port 1: enabled 1
  737 04:52:40.805338      USB3 port 2: enabled 0
  738 04:52:40.805422      USB3 port 3: enabled 0
  739 04:52:40.808616    PCI: 00:0d.1: enabled 0
  740 04:52:40.812164    PCI: 00:0d.2: enabled 0
  741 04:52:40.815512     GENERIC: 0.0: enabled 1
  742 04:52:40.818458    PCI: 00:0d.3: enabled 0
  743 04:52:40.818542    PCI: 00:0e.0: enabled 0
  744 04:52:40.821716    PCI: 00:10.2: enabled 1
  745 04:52:40.825414    PCI: 00:10.6: enabled 0
  746 04:52:40.828400    PCI: 00:10.7: enabled 0
  747 04:52:40.831993    PCI: 00:12.0: enabled 0
  748 04:52:40.832090    PCI: 00:12.6: enabled 0
  749 04:52:40.835116    PCI: 00:13.0: enabled 0
  750 04:52:40.838480    PCI: 00:14.0: enabled 1
  751 04:52:40.841808     USB0 port 0: enabled 1
  752 04:52:40.845167      USB2 port 0: enabled 0
  753 04:52:40.845250      USB2 port 1: enabled 1
  754 04:52:40.848686      USB2 port 2: enabled 1
  755 04:52:40.851703      USB2 port 3: enabled 0
  756 04:52:40.855215      USB2 port 4: enabled 1
  757 04:52:40.858456      USB2 port 5: enabled 0
  758 04:52:40.861907      USB2 port 6: enabled 0
  759 04:52:40.862018      USB2 port 7: enabled 0
  760 04:52:40.865029      USB2 port 8: enabled 0
  761 04:52:40.868553      USB2 port 9: enabled 0
  762 04:52:40.871770      USB3 port 0: enabled 0
  763 04:52:40.874873      USB3 port 1: enabled 1
  764 04:52:40.874956      USB3 port 2: enabled 0
  765 04:52:40.878518      USB3 port 3: enabled 0
  766 04:52:40.881848    PCI: 00:14.1: enabled 0
  767 04:52:40.885163    PCI: 00:14.2: enabled 1
  768 04:52:40.888689    PCI: 00:14.3: enabled 1
  769 04:52:40.888801     GENERIC: 0.0: enabled 1
  770 04:52:40.891554    PCI: 00:15.0: enabled 1
  771 04:52:40.894829     I2C: 00:1a: enabled 1
  772 04:52:40.898358     I2C: 00:31: enabled 1
  773 04:52:40.901602     I2C: 00:32: enabled 1
  774 04:52:40.901685    PCI: 00:15.1: enabled 1
  775 04:52:40.905033     I2C: 00:10: enabled 1
  776 04:52:40.908345    PCI: 00:15.2: enabled 1
  777 04:52:40.911482    PCI: 00:15.3: enabled 1
  778 04:52:40.914960    PCI: 00:16.0: enabled 1
  779 04:52:40.915066    PCI: 00:16.1: enabled 0
  780 04:52:40.918476    PCI: 00:16.2: enabled 0
  781 04:52:40.921804    PCI: 00:16.3: enabled 0
  782 04:52:40.924934    PCI: 00:16.4: enabled 0
  783 04:52:40.925017    PCI: 00:16.5: enabled 0
  784 04:52:40.928200    PCI: 00:17.0: enabled 1
  785 04:52:40.931547    PCI: 00:19.0: enabled 0
  786 04:52:40.934790    PCI: 00:19.1: enabled 1
  787 04:52:40.938261     I2C: 00:15: enabled 1
  788 04:52:40.938364    PCI: 00:19.2: enabled 0
  789 04:52:40.941312    PCI: 00:1d.0: enabled 1
  790 04:52:40.944864     GENERIC: 0.0: enabled 1
  791 04:52:40.948088    PCI: 00:1e.0: enabled 1
  792 04:52:40.951549    PCI: 00:1e.1: enabled 0
  793 04:52:40.951901    PCI: 00:1e.2: enabled 1
  794 04:52:40.954856     SPI: 00: enabled 1
  795 04:52:40.958412    PCI: 00:1e.3: enabled 1
  796 04:52:40.961487     SPI: 00: enabled 1
  797 04:52:40.961815    PCI: 00:1f.0: enabled 1
  798 04:52:40.964935     PNP: 0c09.0: enabled 1
  799 04:52:40.968368    PCI: 00:1f.1: enabled 0
  800 04:52:40.971321    PCI: 00:1f.2: enabled 1
  801 04:52:40.974977     GENERIC: 0.0: enabled 1
  802 04:52:40.975417      GENERIC: 0.0: enabled 1
  803 04:52:40.977891      GENERIC: 1.0: enabled 1
  804 04:52:40.981266    PCI: 00:1f.3: enabled 1
  805 04:52:40.984473    PCI: 00:1f.4: enabled 0
  806 04:52:40.988012    PCI: 00:1f.5: enabled 1
  807 04:52:40.988341    PCI: 00:1f.6: enabled 0
  808 04:52:40.991501    PCI: 00:1f.7: enabled 0
  809 04:52:41.042956   CPU_CLUSTER: 0: enabled 1
  810 04:52:41.043071    APIC: 00: enabled 1
  811 04:52:41.043142    APIC: 03: enabled 1
  812 04:52:41.043206    APIC: 05: enabled 1
  813 04:52:41.043266    APIC: 06: enabled 1
  814 04:52:41.043520    APIC: 07: enabled 1
  815 04:52:41.043590    APIC: 02: enabled 1
  816 04:52:41.043653    APIC: 01: enabled 1
  817 04:52:41.043714    APIC: 04: enabled 1
  818 04:52:41.043775  Root Device scanning...
  819 04:52:41.044047  scan_static_bus for Root Device
  820 04:52:41.044113  DOMAIN: 0000 enabled
  821 04:52:41.044171  CPU_CLUSTER: 0 enabled
  822 04:52:41.044229  DOMAIN: 0000 scanning...
  823 04:52:41.044285  PCI: pci_scan_bus for bus 00
  824 04:52:41.044340  PCI: 00:00.0 [8086/0000] ops
  825 04:52:41.044395  PCI: 00:00.0 [8086/9a12] enabled
  826 04:52:41.044450  PCI: 00:02.0 [8086/0000] bus ops
  827 04:52:41.044504  PCI: 00:02.0 [8086/9a40] enabled
  828 04:52:41.055083  PCI: 00:04.0 [8086/0000] bus ops
  829 04:52:41.055169  PCI: 00:04.0 [8086/9a03] enabled
  830 04:52:41.058720  PCI: 00:05.0 [8086/9a19] enabled
  831 04:52:41.058804  PCI: 00:07.0 [0000/0000] hidden
  832 04:52:41.061695  PCI: 00:08.0 [8086/9a11] enabled
  833 04:52:41.061780  PCI: 00:0a.0 [8086/9a0d] disabled
  834 04:52:41.065125  PCI: 00:0d.0 [8086/0000] bus ops
  835 04:52:41.068913  PCI: 00:0d.0 [8086/9a13] enabled
  836 04:52:41.072818  PCI: 00:14.0 [8086/0000] bus ops
  837 04:52:41.076218  PCI: 00:14.0 [8086/a0ed] enabled
  838 04:52:41.079571  PCI: 00:14.2 [8086/a0ef] enabled
  839 04:52:41.082705  PCI: 00:14.3 [8086/0000] bus ops
  840 04:52:41.086105  PCI: 00:14.3 [8086/a0f0] enabled
  841 04:52:41.089198  PCI: 00:15.0 [8086/0000] bus ops
  842 04:52:41.092535  PCI: 00:15.0 [8086/a0e8] enabled
  843 04:52:41.095934  PCI: 00:15.1 [8086/0000] bus ops
  844 04:52:41.099319  PCI: 00:15.1 [8086/a0e9] enabled
  845 04:52:41.102318  PCI: 00:15.2 [8086/0000] bus ops
  846 04:52:41.105871  PCI: 00:15.2 [8086/a0ea] enabled
  847 04:52:41.109008  PCI: 00:15.3 [8086/0000] bus ops
  848 04:52:41.112800  PCI: 00:15.3 [8086/a0eb] enabled
  849 04:52:41.116076  PCI: 00:16.0 [8086/0000] ops
  850 04:52:41.118941  PCI: 00:16.0 [8086/a0e0] enabled
  851 04:52:41.125815  PCI: Static device PCI: 00:17.0 not found, disabling it.
  852 04:52:41.129171  PCI: 00:19.0 [8086/0000] bus ops
  853 04:52:41.132038  PCI: 00:19.0 [8086/a0c5] disabled
  854 04:52:41.135470  PCI: 00:19.1 [8086/0000] bus ops
  855 04:52:41.138631  PCI: 00:19.1 [8086/a0c6] enabled
  856 04:52:41.142409  PCI: 00:1d.0 [8086/0000] bus ops
  857 04:52:41.145526  PCI: 00:1d.0 [8086/a0b0] enabled
  858 04:52:41.148904  PCI: 00:1e.0 [8086/0000] ops
  859 04:52:41.152387  PCI: 00:1e.0 [8086/a0a8] enabled
  860 04:52:41.155568  PCI: 00:1e.2 [8086/0000] bus ops
  861 04:52:41.158810  PCI: 00:1e.2 [8086/a0aa] enabled
  862 04:52:41.162283  PCI: 00:1e.3 [8086/0000] bus ops
  863 04:52:41.165312  PCI: 00:1e.3 [8086/a0ab] enabled
  864 04:52:41.169089  PCI: 00:1f.0 [8086/0000] bus ops
  865 04:52:41.172253  PCI: 00:1f.0 [8086/a087] enabled
  866 04:52:41.172614  RTC Init
  867 04:52:41.175166  Set power on after power failure.
  868 04:52:41.178686  Disabling Deep S3
  869 04:52:41.179024  Disabling Deep S3
  870 04:52:41.182041  Disabling Deep S4
  871 04:52:41.185268  Disabling Deep S4
  872 04:52:41.185625  Disabling Deep S5
  873 04:52:41.188628  Disabling Deep S5
  874 04:52:41.191529  PCI: 00:1f.2 [0000/0000] hidden
  875 04:52:41.194913  PCI: 00:1f.3 [8086/0000] bus ops
  876 04:52:41.198126  PCI: 00:1f.3 [8086/a0c8] enabled
  877 04:52:41.201437  PCI: 00:1f.5 [8086/0000] bus ops
  878 04:52:41.204729  PCI: 00:1f.5 [8086/a0a4] enabled
  879 04:52:41.208154  PCI: Leftover static devices:
  880 04:52:41.208404  PCI: 00:10.2
  881 04:52:41.211726  PCI: 00:10.6
  882 04:52:41.211997  PCI: 00:10.7
  883 04:52:41.212196  PCI: 00:06.0
  884 04:52:41.214834  PCI: 00:07.1
  885 04:52:41.215107  PCI: 00:07.2
  886 04:52:41.218362  PCI: 00:07.3
  887 04:52:41.218771  PCI: 00:09.0
  888 04:52:41.219064  PCI: 00:0d.1
  889 04:52:41.221722  PCI: 00:0d.2
  890 04:52:41.222089  PCI: 00:0d.3
  891 04:52:41.225028  PCI: 00:0e.0
  892 04:52:41.225402  PCI: 00:12.0
  893 04:52:41.227930  PCI: 00:12.6
  894 04:52:41.228305  PCI: 00:13.0
  895 04:52:41.228595  PCI: 00:14.1
  896 04:52:41.231544  PCI: 00:16.1
  897 04:52:41.231941  PCI: 00:16.2
  898 04:52:41.234841  PCI: 00:16.3
  899 04:52:41.235205  PCI: 00:16.4
  900 04:52:41.235493  PCI: 00:16.5
  901 04:52:41.238299  PCI: 00:17.0
  902 04:52:41.238664  PCI: 00:19.2
  903 04:52:41.241432  PCI: 00:1e.1
  904 04:52:41.241800  PCI: 00:1f.1
  905 04:52:41.242088  PCI: 00:1f.4
  906 04:52:41.244929  PCI: 00:1f.6
  907 04:52:41.245296  PCI: 00:1f.7
  908 04:52:41.248073  PCI: Check your devicetree.cb.
  909 04:52:41.251467  PCI: 00:02.0 scanning...
  910 04:52:41.254625  scan_generic_bus for PCI: 00:02.0
  911 04:52:41.257678  scan_generic_bus for PCI: 00:02.0 done
  912 04:52:41.264583  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  913 04:52:41.267517  PCI: 00:04.0 scanning...
  914 04:52:41.271081  scan_generic_bus for PCI: 00:04.0
  915 04:52:41.271367  GENERIC: 0.0 enabled
  916 04:52:41.277508  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  917 04:52:41.284138  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  918 04:52:41.284362  PCI: 00:0d.0 scanning...
  919 04:52:41.287365  scan_static_bus for PCI: 00:0d.0
  920 04:52:41.290905  USB0 port 0 enabled
  921 04:52:41.294193  USB0 port 0 scanning...
  922 04:52:41.297155  scan_static_bus for USB0 port 0
  923 04:52:41.297375  USB3 port 0 enabled
  924 04:52:41.300419  USB3 port 1 enabled
  925 04:52:41.303773  USB3 port 2 disabled
  926 04:52:41.303966  USB3 port 3 disabled
  927 04:52:41.307341  USB3 port 0 scanning...
  928 04:52:41.310189  scan_static_bus for USB3 port 0
  929 04:52:41.313686  scan_static_bus for USB3 port 0 done
  930 04:52:41.320081  scan_bus: bus USB3 port 0 finished in 6 msecs
  931 04:52:41.320173  USB3 port 1 scanning...
  932 04:52:41.323459  scan_static_bus for USB3 port 1
  933 04:52:41.329922  scan_static_bus for USB3 port 1 done
  934 04:52:41.333218  scan_bus: bus USB3 port 1 finished in 6 msecs
  935 04:52:41.336688  scan_static_bus for USB0 port 0 done
  936 04:52:41.340218  scan_bus: bus USB0 port 0 finished in 43 msecs
  937 04:52:41.346811  scan_static_bus for PCI: 00:0d.0 done
  938 04:52:41.350167  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  939 04:52:41.353124  PCI: 00:14.0 scanning...
  940 04:52:41.356759  scan_static_bus for PCI: 00:14.0
  941 04:52:41.360262  USB0 port 0 enabled
  942 04:52:41.360368  USB0 port 0 scanning...
  943 04:52:41.363055  scan_static_bus for USB0 port 0
  944 04:52:41.366635  USB2 port 0 disabled
  945 04:52:41.369989  USB2 port 1 enabled
  946 04:52:41.370114  USB2 port 2 enabled
  947 04:52:41.372968  USB2 port 3 disabled
  948 04:52:41.373098  USB2 port 4 enabled
  949 04:52:41.376317  USB2 port 5 disabled
  950 04:52:41.379734  USB2 port 6 disabled
  951 04:52:41.379882  USB2 port 7 disabled
  952 04:52:41.383178  USB2 port 8 disabled
  953 04:52:41.386145  USB2 port 9 disabled
  954 04:52:41.386288  USB3 port 0 disabled
  955 04:52:41.389808  USB3 port 1 enabled
  956 04:52:41.392993  USB3 port 2 disabled
  957 04:52:41.393113  USB3 port 3 disabled
  958 04:52:41.396116  USB2 port 1 scanning...
  959 04:52:41.399474  scan_static_bus for USB2 port 1
  960 04:52:41.402862  scan_static_bus for USB2 port 1 done
  961 04:52:41.409387  scan_bus: bus USB2 port 1 finished in 6 msecs
  962 04:52:41.409500  USB2 port 2 scanning...
  963 04:52:41.412575  scan_static_bus for USB2 port 2
  964 04:52:41.419321  scan_static_bus for USB2 port 2 done
  965 04:52:41.422789  scan_bus: bus USB2 port 2 finished in 6 msecs
  966 04:52:41.426100  USB2 port 4 scanning...
  967 04:52:41.429333  scan_static_bus for USB2 port 4
  968 04:52:41.432315  scan_static_bus for USB2 port 4 done
  969 04:52:41.435536  scan_bus: bus USB2 port 4 finished in 6 msecs
  970 04:52:41.439213  USB3 port 1 scanning...
  971 04:52:41.442534  scan_static_bus for USB3 port 1
  972 04:52:41.445708  scan_static_bus for USB3 port 1 done
  973 04:52:41.452563  scan_bus: bus USB3 port 1 finished in 6 msecs
  974 04:52:41.455629  scan_static_bus for USB0 port 0 done
  975 04:52:41.459150  scan_bus: bus USB0 port 0 finished in 93 msecs
  976 04:52:41.462388  scan_static_bus for PCI: 00:14.0 done
  977 04:52:41.468737  scan_bus: bus PCI: 00:14.0 finished in 109 msecs
  978 04:52:41.469071  PCI: 00:14.3 scanning...
  979 04:52:41.472641  scan_static_bus for PCI: 00:14.3
  980 04:52:41.475742  GENERIC: 0.0 enabled
  981 04:52:41.479155  scan_static_bus for PCI: 00:14.3 done
  982 04:52:41.485524  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  983 04:52:41.485610  PCI: 00:15.0 scanning...
  984 04:52:41.489104  scan_static_bus for PCI: 00:15.0
  985 04:52:41.492524  I2C: 00:1a enabled
  986 04:52:41.495779  I2C: 00:31 enabled
  987 04:52:41.495886  I2C: 00:32 enabled
  988 04:52:41.499280  scan_static_bus for PCI: 00:15.0 done
  989 04:52:41.505519  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
  990 04:52:41.508831  PCI: 00:15.1 scanning...
  991 04:52:41.512271  scan_static_bus for PCI: 00:15.1
  992 04:52:41.512348  I2C: 00:10 enabled
  993 04:52:41.515655  scan_static_bus for PCI: 00:15.1 done
  994 04:52:41.522029  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
  995 04:52:41.525299  PCI: 00:15.2 scanning...
  996 04:52:41.528803  scan_static_bus for PCI: 00:15.2
  997 04:52:41.532130  scan_static_bus for PCI: 00:15.2 done
  998 04:52:41.534971  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
  999 04:52:41.538321  PCI: 00:15.3 scanning...
 1000 04:52:41.541950  scan_static_bus for PCI: 00:15.3
 1001 04:52:41.544958  scan_static_bus for PCI: 00:15.3 done
 1002 04:52:41.551532  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1003 04:52:41.555094  PCI: 00:19.1 scanning...
 1004 04:52:41.558231  scan_static_bus for PCI: 00:19.1
 1005 04:52:41.558304  I2C: 00:15 enabled
 1006 04:52:41.561679  scan_static_bus for PCI: 00:19.1 done
 1007 04:52:41.568237  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1008 04:52:41.568319  PCI: 00:1d.0 scanning...
 1009 04:52:41.575280  do_pci_scan_bridge for PCI: 00:1d.0
 1010 04:52:41.575354  PCI: pci_scan_bus for bus 01
 1011 04:52:41.578277  PCI: 01:00.0 [15b7/5009] enabled
 1012 04:52:41.581756  GENERIC: 0.0 enabled
 1013 04:52:41.585145  Enabling Common Clock Configuration
 1014 04:52:41.591912  L1 Sub-State supported from root port 29
 1015 04:52:41.591990  L1 Sub-State Support = 0x5
 1016 04:52:41.595033  CommonModeRestoreTime = 0x28
 1017 04:52:41.601798  Power On Value = 0x16, Power On Scale = 0x0
 1018 04:52:41.601891  ASPM: Enabled L1
 1019 04:52:41.605104  PCIe: Max_Payload_Size adjusted to 128
 1020 04:52:41.611792  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1021 04:52:41.614830  PCI: 00:1e.2 scanning...
 1022 04:52:41.618209  scan_generic_bus for PCI: 00:1e.2
 1023 04:52:41.618296  SPI: 00 enabled
 1024 04:52:41.624779  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1025 04:52:41.628208  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1026 04:52:41.631505  PCI: 00:1e.3 scanning...
 1027 04:52:41.634661  scan_generic_bus for PCI: 00:1e.3
 1028 04:52:41.638194  SPI: 00 enabled
 1029 04:52:41.644622  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1030 04:52:41.648081  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1031 04:52:41.651650  PCI: 00:1f.0 scanning...
 1032 04:52:41.655178  scan_static_bus for PCI: 00:1f.0
 1033 04:52:41.655267  PNP: 0c09.0 enabled
 1034 04:52:41.658174  PNP: 0c09.0 scanning...
 1035 04:52:41.661724  scan_static_bus for PNP: 0c09.0
 1036 04:52:41.665163  scan_static_bus for PNP: 0c09.0 done
 1037 04:52:41.671520  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1038 04:52:41.675033  scan_static_bus for PCI: 00:1f.0 done
 1039 04:52:41.678055  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1040 04:52:41.681561  PCI: 00:1f.2 scanning...
 1041 04:52:41.684672  scan_static_bus for PCI: 00:1f.2
 1042 04:52:41.688185  GENERIC: 0.0 enabled
 1043 04:52:41.688267  GENERIC: 0.0 scanning...
 1044 04:52:41.692053  scan_static_bus for GENERIC: 0.0
 1045 04:52:41.694925  GENERIC: 0.0 enabled
 1046 04:52:41.698458  GENERIC: 1.0 enabled
 1047 04:52:41.701791  scan_static_bus for GENERIC: 0.0 done
 1048 04:52:41.705383  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1049 04:52:41.711605  scan_static_bus for PCI: 00:1f.2 done
 1050 04:52:41.714941  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1051 04:52:41.718024  PCI: 00:1f.3 scanning...
 1052 04:52:41.721554  scan_static_bus for PCI: 00:1f.3
 1053 04:52:41.724932  scan_static_bus for PCI: 00:1f.3 done
 1054 04:52:41.728131  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1055 04:52:41.731469  PCI: 00:1f.5 scanning...
 1056 04:52:41.734803  scan_generic_bus for PCI: 00:1f.5
 1057 04:52:41.738011  scan_generic_bus for PCI: 00:1f.5 done
 1058 04:52:41.744704  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1059 04:52:41.747773  scan_bus: bus DOMAIN: 0000 finished in 716 msecs
 1060 04:52:41.751424  scan_static_bus for Root Device done
 1061 04:52:41.757874  scan_bus: bus Root Device finished in 735 msecs
 1062 04:52:41.757991  done
 1063 04:52:41.764657  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
 1064 04:52:41.767957  Chrome EC: UHEPI supported
 1065 04:52:41.774483  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1066 04:52:41.781057  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1067 04:52:41.784497  SPI flash protection: WPSW=0 SRP0=1
 1068 04:52:41.790920  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1069 04:52:41.794287  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
 1070 04:52:41.797751  found VGA at PCI: 00:02.0
 1071 04:52:41.801089  Setting up VGA for PCI: 00:02.0
 1072 04:52:41.807481  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1073 04:52:41.810939  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1074 04:52:41.814484  Allocating resources...
 1075 04:52:41.817495  Reading resources...
 1076 04:52:41.820743  Root Device read_resources bus 0 link: 0
 1077 04:52:41.824092  DOMAIN: 0000 read_resources bus 0 link: 0
 1078 04:52:41.830837  PCI: 00:04.0 read_resources bus 1 link: 0
 1079 04:52:41.834352  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1080 04:52:41.840650  PCI: 00:0d.0 read_resources bus 0 link: 0
 1081 04:52:41.843976  USB0 port 0 read_resources bus 0 link: 0
 1082 04:52:41.850880  USB0 port 0 read_resources bus 0 link: 0 done
 1083 04:52:41.853946  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1084 04:52:41.857364  PCI: 00:14.0 read_resources bus 0 link: 0
 1085 04:52:41.864202  USB0 port 0 read_resources bus 0 link: 0
 1086 04:52:41.867755  USB0 port 0 read_resources bus 0 link: 0 done
 1087 04:52:41.874201  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1088 04:52:41.877683  PCI: 00:14.3 read_resources bus 0 link: 0
 1089 04:52:41.884432  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1090 04:52:41.887510  PCI: 00:15.0 read_resources bus 0 link: 0
 1091 04:52:41.894206  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1092 04:52:41.897616  PCI: 00:15.1 read_resources bus 0 link: 0
 1093 04:52:41.904378  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1094 04:52:41.907454  PCI: 00:19.1 read_resources bus 0 link: 0
 1095 04:52:41.914412  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1096 04:52:41.917941  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 04:52:41.924628  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 04:52:41.927761  PCI: 00:1e.2 read_resources bus 2 link: 0
 1099 04:52:41.934304  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1100 04:52:41.937563  PCI: 00:1e.3 read_resources bus 3 link: 0
 1101 04:52:41.944506  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1102 04:52:41.947659  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 04:52:41.954128  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 04:52:41.957702  PCI: 00:1f.2 read_resources bus 0 link: 0
 1105 04:52:41.960808  GENERIC: 0.0 read_resources bus 0 link: 0
 1106 04:52:41.968106  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1107 04:52:41.971072  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1108 04:52:41.978335  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1109 04:52:41.981967  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1110 04:52:41.988301  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1111 04:52:41.991983  Root Device read_resources bus 0 link: 0 done
 1112 04:52:41.994732  Done reading resources.
 1113 04:52:42.001683  Show resources in subtree (Root Device)...After reading.
 1114 04:52:42.004611   Root Device child on link 0 DOMAIN: 0000
 1115 04:52:42.008197    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1116 04:52:42.018236    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1117 04:52:42.028089    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1118 04:52:42.031472     PCI: 00:00.0
 1119 04:52:42.041336     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1120 04:52:42.047735     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1121 04:52:42.058092     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1122 04:52:42.067758     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1123 04:52:42.077644     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1124 04:52:42.087908     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1125 04:52:42.097797     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1126 04:52:42.104111     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1127 04:52:42.114324     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1128 04:52:42.124104     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1129 04:52:42.134124     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1130 04:52:42.144138     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1131 04:52:42.150889     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1132 04:52:42.160466     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1133 04:52:42.170742     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1134 04:52:42.180832     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1135 04:52:42.190344     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1136 04:52:42.200383     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1137 04:52:42.210262     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1138 04:52:42.217178     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1139 04:52:42.220293     PCI: 00:02.0
 1140 04:52:42.230290     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1141 04:52:42.240312     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1142 04:52:42.250389     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1143 04:52:42.253696     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1144 04:52:42.263821     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1145 04:52:42.266982      GENERIC: 0.0
 1146 04:52:42.267379     PCI: 00:05.0
 1147 04:52:42.276828     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1148 04:52:42.283918     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1149 04:52:42.284354      GENERIC: 0.0
 1150 04:52:42.286828     PCI: 00:08.0
 1151 04:52:42.296939     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1152 04:52:42.297512     PCI: 00:0a.0
 1153 04:52:42.300299     PCI: 00:0d.0 child on link 0 USB0 port 0
 1154 04:52:42.313231     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1155 04:52:42.316502      USB0 port 0 child on link 0 USB3 port 0
 1156 04:52:42.317032       USB3 port 0
 1157 04:52:42.319876       USB3 port 1
 1158 04:52:42.320273       USB3 port 2
 1159 04:52:42.323501       USB3 port 3
 1160 04:52:42.326718     PCI: 00:14.0 child on link 0 USB0 port 0
 1161 04:52:42.336468     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1162 04:52:42.343205      USB0 port 0 child on link 0 USB2 port 0
 1163 04:52:42.343720       USB2 port 0
 1164 04:52:42.346560       USB2 port 1
 1165 04:52:42.347019       USB2 port 2
 1166 04:52:42.349617       USB2 port 3
 1167 04:52:42.350224       USB2 port 4
 1168 04:52:42.353145       USB2 port 5
 1169 04:52:42.353625       USB2 port 6
 1170 04:52:42.356467       USB2 port 7
 1171 04:52:42.356921       USB2 port 8
 1172 04:52:42.359669       USB2 port 9
 1173 04:52:42.363141       USB3 port 0
 1174 04:52:42.363575       USB3 port 1
 1175 04:52:42.366621       USB3 port 2
 1176 04:52:42.367054       USB3 port 3
 1177 04:52:42.369849     PCI: 00:14.2
 1178 04:52:42.379609     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1179 04:52:42.389687     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1180 04:52:42.393128     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1181 04:52:42.402978     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1182 04:52:42.403416      GENERIC: 0.0
 1183 04:52:42.409851     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1184 04:52:42.419350     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 04:52:42.419796      I2C: 00:1a
 1186 04:52:42.422711      I2C: 00:31
 1187 04:52:42.423149      I2C: 00:32
 1188 04:52:42.426149     PCI: 00:15.1 child on link 0 I2C: 00:10
 1189 04:52:42.436262     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1190 04:52:42.439425      I2C: 00:10
 1191 04:52:42.440051     PCI: 00:15.2
 1192 04:52:42.449157     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 04:52:42.452872     PCI: 00:15.3
 1194 04:52:42.462862     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 04:52:42.463473     PCI: 00:16.0
 1196 04:52:42.472539     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1197 04:52:42.475893     PCI: 00:19.0
 1198 04:52:42.479406     PCI: 00:19.1 child on link 0 I2C: 00:15
 1199 04:52:42.489139     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1200 04:52:42.492643      I2C: 00:15
 1201 04:52:42.495813     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1202 04:52:42.505651     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1203 04:52:42.515672     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1204 04:52:42.522405     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1205 04:52:42.525337      GENERIC: 0.0
 1206 04:52:42.528642      PCI: 01:00.0
 1207 04:52:42.538984      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1208 04:52:42.548436      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
 1209 04:52:42.548853     PCI: 00:1e.0
 1210 04:52:42.558717     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1211 04:52:42.565333     PCI: 00:1e.2 child on link 0 SPI: 00
 1212 04:52:42.575489     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1213 04:52:42.576073      SPI: 00
 1214 04:52:42.578363     PCI: 00:1e.3 child on link 0 SPI: 00
 1215 04:52:42.588538     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1216 04:52:42.591822      SPI: 00
 1217 04:52:42.594853     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1218 04:52:42.605136     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1219 04:52:42.605603      PNP: 0c09.0
 1220 04:52:42.614830      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1221 04:52:42.618378     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1222 04:52:42.628164     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1223 04:52:42.638144     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1224 04:52:42.641203      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1225 04:52:42.644925       GENERIC: 0.0
 1226 04:52:42.645351       GENERIC: 1.0
 1227 04:52:42.648345     PCI: 00:1f.3
 1228 04:52:42.657838     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1229 04:52:42.667898     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1230 04:52:42.668350     PCI: 00:1f.5
 1231 04:52:42.678320     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1232 04:52:42.681391    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1233 04:52:42.684633     APIC: 00
 1234 04:52:42.685107     APIC: 03
 1235 04:52:42.685515     APIC: 05
 1236 04:52:42.687745     APIC: 06
 1237 04:52:42.688251     APIC: 07
 1238 04:52:42.691269     APIC: 02
 1239 04:52:42.691716     APIC: 01
 1240 04:52:42.692112     APIC: 04
 1241 04:52:42.701183  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1242 04:52:42.704084   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1243 04:52:42.711114   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1244 04:52:42.717385   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1245 04:52:42.720783    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1246 04:52:42.727515    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem
 1247 04:52:42.734033   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1248 04:52:42.740407   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1249 04:52:42.747342   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1250 04:52:42.757252  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1251 04:52:42.760693  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1252 04:52:42.770276   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1253 04:52:42.777058   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1254 04:52:42.783910   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1255 04:52:42.786812   DOMAIN: 0000: Resource ranges:
 1256 04:52:42.790469   * Base: 1000, Size: 800, Tag: 100
 1257 04:52:42.793594   * Base: 1900, Size: e700, Tag: 100
 1258 04:52:42.800607    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1259 04:52:42.806774  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1260 04:52:42.813498  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1261 04:52:42.820082   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1262 04:52:42.830046   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1263 04:52:42.836439   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1264 04:52:42.843188   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1265 04:52:42.853556   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1266 04:52:42.859886   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1267 04:52:42.866417   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1268 04:52:42.876941   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1269 04:52:42.883406   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1270 04:52:42.889862   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1271 04:52:42.899390   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1272 04:52:42.906457   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1273 04:52:42.912987   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1274 04:52:42.922831   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1275 04:52:42.929628   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1276 04:52:42.936025   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1277 04:52:42.946166   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
 1278 04:52:42.953029   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1279 04:52:42.959540   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1280 04:52:42.969415   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1281 04:52:42.976019   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1282 04:52:42.982303   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1283 04:52:42.985649   DOMAIN: 0000: Resource ranges:
 1284 04:52:42.992510   * Base: 7fc00000, Size: 40400000, Tag: 200
 1285 04:52:42.995887   * Base: d0000000, Size: 28000000, Tag: 200
 1286 04:52:42.998918   * Base: fa000000, Size: 1000000, Tag: 200
 1287 04:52:43.002351   * Base: fb001000, Size: 2fff000, Tag: 200
 1288 04:52:43.008845   * Base: fe010000, Size: 2e000, Tag: 200
 1289 04:52:43.012260   * Base: fe03f000, Size: d41000, Tag: 200
 1290 04:52:43.015568   * Base: fed88000, Size: 8000, Tag: 200
 1291 04:52:43.018942   * Base: fed93000, Size: d000, Tag: 200
 1292 04:52:43.025554   * Base: feda2000, Size: 1e000, Tag: 200
 1293 04:52:43.028924   * Base: fede0000, Size: 1220000, Tag: 200
 1294 04:52:43.031951   * Base: 480400000, Size: 7b7fc00000, Tag: 100200
 1295 04:52:43.041850    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1296 04:52:43.048755    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1297 04:52:43.055442    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1298 04:52:43.061613    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1299 04:52:43.068506    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1300 04:52:43.075445    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1301 04:52:43.081974    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1302 04:52:43.088422    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1303 04:52:43.094792    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1304 04:52:43.101535    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1305 04:52:43.108004    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1306 04:52:43.114981    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1307 04:52:43.121481    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1308 04:52:43.128141    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1309 04:52:43.134635    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1310 04:52:43.141299    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1311 04:52:43.148206    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1312 04:52:43.154649    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1313 04:52:43.161442    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1314 04:52:43.167693    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1315 04:52:43.174517    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1316 04:52:43.181090    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1317 04:52:43.187536  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1318 04:52:43.194214  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1319 04:52:43.197774   PCI: 00:1d.0: Resource ranges:
 1320 04:52:43.200888   * Base: 7fc00000, Size: 100000, Tag: 200
 1321 04:52:43.207754    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1322 04:52:43.214296    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
 1323 04:52:43.224285  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1324 04:52:43.230891  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1325 04:52:43.237157  Root Device assign_resources, bus 0 link: 0
 1326 04:52:43.240456  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1327 04:52:43.250506  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1328 04:52:43.257189  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1329 04:52:43.263933  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1330 04:52:43.273490  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1331 04:52:43.276949  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1332 04:52:43.283746  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1333 04:52:43.290121  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1334 04:52:43.300213  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1335 04:52:43.306769  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1336 04:52:43.313331  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1337 04:52:43.316613  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1338 04:52:43.323121  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1339 04:52:43.329879  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1340 04:52:43.332865  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1341 04:52:43.343124  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1342 04:52:43.349767  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1343 04:52:43.359583  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1344 04:52:43.363091  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1345 04:52:43.366357  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1346 04:52:43.375940  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1347 04:52:43.379544  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1348 04:52:43.385873  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1349 04:52:43.392703  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1350 04:52:43.399367  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1351 04:52:43.402248  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1352 04:52:43.409322  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1353 04:52:43.418815  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1354 04:52:43.425887  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1355 04:52:43.435114  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1356 04:52:43.438678  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1357 04:52:43.445307  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1358 04:52:43.451853  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1359 04:52:43.462023  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1360 04:52:43.471618  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1361 04:52:43.475039  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1362 04:52:43.484722  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1363 04:52:43.491305  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
 1364 04:52:43.498342  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1365 04:52:43.504892  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1366 04:52:43.507879  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1367 04:52:43.514903  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1368 04:52:43.521459  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1369 04:52:43.528295  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1370 04:52:43.531393  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1371 04:52:43.538166  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1372 04:52:43.541759  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1373 04:52:43.545020  LPC: Trying to open IO window from 800 size 1ff
 1374 04:52:43.555438  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1375 04:52:43.561919  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1376 04:52:43.571594  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1377 04:52:43.574870  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1378 04:52:43.581222  Root Device assign_resources, bus 0 link: 0
 1379 04:52:43.581550  Done setting resources.
 1380 04:52:43.588296  Show resources in subtree (Root Device)...After assigning values.
 1381 04:52:43.594886   Root Device child on link 0 DOMAIN: 0000
 1382 04:52:43.598265    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1383 04:52:43.608064    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1384 04:52:43.617752    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1385 04:52:43.617964     PCI: 00:00.0
 1386 04:52:43.627691     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1387 04:52:43.637686     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1388 04:52:43.647541     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1389 04:52:43.657765     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1390 04:52:43.664220     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1391 04:52:43.674107     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1392 04:52:43.684127     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1393 04:52:43.694065     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1394 04:52:43.703974     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1395 04:52:43.714190     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1396 04:52:43.720329     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1397 04:52:43.730475     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1398 04:52:43.740465     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1399 04:52:43.750230     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1400 04:52:43.760317     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1401 04:52:43.767016     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1402 04:52:43.776784     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1403 04:52:43.786586     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1404 04:52:43.796639     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1405 04:52:43.806737     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1406 04:52:43.806845     PCI: 00:02.0
 1407 04:52:43.820117     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1408 04:52:43.829810     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1409 04:52:43.839729     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1410 04:52:43.843168     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1411 04:52:43.853001     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1412 04:52:43.856506      GENERIC: 0.0
 1413 04:52:43.856598     PCI: 00:05.0
 1414 04:52:43.866328     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1415 04:52:43.872946     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1416 04:52:43.873045      GENERIC: 0.0
 1417 04:52:43.876374     PCI: 00:08.0
 1418 04:52:43.886077     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1419 04:52:43.886191     PCI: 00:0a.0
 1420 04:52:43.892836     PCI: 00:0d.0 child on link 0 USB0 port 0
 1421 04:52:43.902860     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1422 04:52:43.905980      USB0 port 0 child on link 0 USB3 port 0
 1423 04:52:43.909478       USB3 port 0
 1424 04:52:43.909565       USB3 port 1
 1425 04:52:43.912933       USB3 port 2
 1426 04:52:43.913032       USB3 port 3
 1427 04:52:43.919521     PCI: 00:14.0 child on link 0 USB0 port 0
 1428 04:52:43.929557     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1429 04:52:43.932623      USB0 port 0 child on link 0 USB2 port 0
 1430 04:52:43.936011       USB2 port 0
 1431 04:52:43.936106       USB2 port 1
 1432 04:52:43.939412       USB2 port 2
 1433 04:52:43.939504       USB2 port 3
 1434 04:52:43.942471       USB2 port 4
 1435 04:52:43.942566       USB2 port 5
 1436 04:52:43.945870       USB2 port 6
 1437 04:52:43.945974       USB2 port 7
 1438 04:52:43.949326       USB2 port 8
 1439 04:52:43.952641       USB2 port 9
 1440 04:52:43.952732       USB3 port 0
 1441 04:52:43.956109       USB3 port 1
 1442 04:52:43.956199       USB3 port 2
 1443 04:52:43.959098       USB3 port 3
 1444 04:52:43.959192     PCI: 00:14.2
 1445 04:52:43.969122     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1446 04:52:43.978935     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1447 04:52:43.985479     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1448 04:52:43.995469     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1449 04:52:43.995558      GENERIC: 0.0
 1450 04:52:44.002156     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1451 04:52:44.012108     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1452 04:52:44.012202      I2C: 00:1a
 1453 04:52:44.015532      I2C: 00:31
 1454 04:52:44.015622      I2C: 00:32
 1455 04:52:44.022240     PCI: 00:15.1 child on link 0 I2C: 00:10
 1456 04:52:44.032334     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1457 04:52:44.032432      I2C: 00:10
 1458 04:52:44.035345     PCI: 00:15.2
 1459 04:52:44.045254     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1460 04:52:44.045342     PCI: 00:15.3
 1461 04:52:44.055223     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1462 04:52:44.058679     PCI: 00:16.0
 1463 04:52:44.068269     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1464 04:52:44.068368     PCI: 00:19.0
 1465 04:52:44.075118     PCI: 00:19.1 child on link 0 I2C: 00:15
 1466 04:52:44.085200     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1467 04:52:44.085289      I2C: 00:15
 1468 04:52:44.091740     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1469 04:52:44.101551     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1470 04:52:44.111493     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1471 04:52:44.121782     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1472 04:52:44.124790      GENERIC: 0.0
 1473 04:52:44.124876      PCI: 01:00.0
 1474 04:52:44.134856      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1475 04:52:44.144540      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
 1476 04:52:44.148170     PCI: 00:1e.0
 1477 04:52:44.158050     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1478 04:52:44.164585     PCI: 00:1e.2 child on link 0 SPI: 00
 1479 04:52:44.174745     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1480 04:52:44.174838      SPI: 00
 1481 04:52:44.178002     PCI: 00:1e.3 child on link 0 SPI: 00
 1482 04:52:44.187689     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1483 04:52:44.191089      SPI: 00
 1484 04:52:44.194340     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1485 04:52:44.204409     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1486 04:52:44.204500      PNP: 0c09.0
 1487 04:52:44.214460      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1488 04:52:44.217595     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1489 04:52:44.227611     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1490 04:52:44.237465     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1491 04:52:44.240874      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1492 04:52:44.244244       GENERIC: 0.0
 1493 04:52:44.244329       GENERIC: 1.0
 1494 04:52:44.247339     PCI: 00:1f.3
 1495 04:52:44.257201     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1496 04:52:44.267302     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1497 04:52:44.270401     PCI: 00:1f.5
 1498 04:52:44.280190     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1499 04:52:44.283568    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1500 04:52:44.287011     APIC: 00
 1501 04:52:44.287105     APIC: 03
 1502 04:52:44.287204     APIC: 05
 1503 04:52:44.290387     APIC: 06
 1504 04:52:44.290472     APIC: 07
 1505 04:52:44.290538     APIC: 02
 1506 04:52:44.293459     APIC: 01
 1507 04:52:44.293543     APIC: 04
 1508 04:52:44.296880  Done allocating resources.
 1509 04:52:44.303331  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
 1510 04:52:44.310270  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1511 04:52:44.313445  Configure GPIOs for I2S audio on UP4.
 1512 04:52:44.320214  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1513 04:52:44.323237  Enabling resources...
 1514 04:52:44.326751  PCI: 00:00.0 subsystem <- 8086/9a12
 1515 04:52:44.329719  PCI: 00:00.0 cmd <- 06
 1516 04:52:44.333191  PCI: 00:02.0 subsystem <- 8086/9a40
 1517 04:52:44.333276  PCI: 00:02.0 cmd <- 03
 1518 04:52:44.339775  PCI: 00:04.0 subsystem <- 8086/9a03
 1519 04:52:44.339898  PCI: 00:04.0 cmd <- 02
 1520 04:52:44.343317  PCI: 00:05.0 subsystem <- 8086/9a19
 1521 04:52:44.346668  PCI: 00:05.0 cmd <- 02
 1522 04:52:44.349665  PCI: 00:08.0 subsystem <- 8086/9a11
 1523 04:52:44.353130  PCI: 00:08.0 cmd <- 06
 1524 04:52:44.356709  PCI: 00:0d.0 subsystem <- 8086/9a13
 1525 04:52:44.359619  PCI: 00:0d.0 cmd <- 02
 1526 04:52:44.363068  PCI: 00:14.0 subsystem <- 8086/a0ed
 1527 04:52:44.366194  PCI: 00:14.0 cmd <- 02
 1528 04:52:44.369418  PCI: 00:14.2 subsystem <- 8086/a0ef
 1529 04:52:44.372662  PCI: 00:14.2 cmd <- 02
 1530 04:52:44.376085  PCI: 00:14.3 subsystem <- 8086/a0f0
 1531 04:52:44.379644  PCI: 00:14.3 cmd <- 02
 1532 04:52:44.382996  PCI: 00:15.0 subsystem <- 8086/a0e8
 1533 04:52:44.383081  PCI: 00:15.0 cmd <- 02
 1534 04:52:44.389366  PCI: 00:15.1 subsystem <- 8086/a0e9
 1535 04:52:44.389451  PCI: 00:15.1 cmd <- 02
 1536 04:52:44.392850  PCI: 00:15.2 subsystem <- 8086/a0ea
 1537 04:52:44.396258  PCI: 00:15.2 cmd <- 02
 1538 04:52:44.399212  PCI: 00:15.3 subsystem <- 8086/a0eb
 1539 04:52:44.402713  PCI: 00:15.3 cmd <- 02
 1540 04:52:44.406150  PCI: 00:16.0 subsystem <- 8086/a0e0
 1541 04:52:44.409193  PCI: 00:16.0 cmd <- 02
 1542 04:52:44.412699  PCI: 00:19.1 subsystem <- 8086/a0c6
 1543 04:52:44.415717  PCI: 00:19.1 cmd <- 02
 1544 04:52:44.419114  PCI: 00:1d.0 bridge ctrl <- 0013
 1545 04:52:44.422506  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1546 04:52:44.425696  PCI: 00:1d.0 cmd <- 06
 1547 04:52:44.428876  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1548 04:52:44.432156  PCI: 00:1e.0 cmd <- 06
 1549 04:52:44.435635  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1550 04:52:44.435720  PCI: 00:1e.2 cmd <- 06
 1551 04:52:44.442590  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1552 04:52:44.442675  PCI: 00:1e.3 cmd <- 02
 1553 04:52:44.445607  PCI: 00:1f.0 subsystem <- 8086/a087
 1554 04:52:44.449075  PCI: 00:1f.0 cmd <- 407
 1555 04:52:44.452127  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1556 04:52:44.455556  PCI: 00:1f.3 cmd <- 02
 1557 04:52:44.459009  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1558 04:52:44.461869  PCI: 00:1f.5 cmd <- 406
 1559 04:52:44.466315  PCI: 01:00.0 cmd <- 02
 1560 04:52:44.470991  done.
 1561 04:52:44.474480  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1562 04:52:44.477477  Initializing devices...
 1563 04:52:44.480483  Root Device init
 1564 04:52:44.484312  Chrome EC: Set SMI mask to 0x0000000000000000
 1565 04:52:44.490674  Chrome EC: clear events_b mask to 0x0000000000000000
 1566 04:52:44.497080  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1567 04:52:44.500505  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1568 04:52:44.506972  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1569 04:52:44.513609  Chrome EC: Set WAKE mask to 0x0000000000000000
 1570 04:52:44.516932  fw_config match found: DB_USB=USB3_ACTIVE
 1571 04:52:44.523687  Configure Right Type-C port orientation for retimer
 1572 04:52:44.527158  Root Device init finished in 43 msecs
 1573 04:52:44.530289  PCI: 00:00.0 init
 1574 04:52:44.533773  CPU TDP = 9 Watts
 1575 04:52:44.533859  CPU PL1 = 9 Watts
 1576 04:52:44.537039  CPU PL2 = 40 Watts
 1577 04:52:44.537125  CPU PL4 = 83 Watts
 1578 04:52:44.543533  PCI: 00:00.0 init finished in 8 msecs
 1579 04:52:44.543624  PCI: 00:02.0 init
 1580 04:52:44.546926  GMA: Found VBT in CBFS
 1581 04:52:44.550437  GMA: Found valid VBT in CBFS
 1582 04:52:44.556827  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1583 04:52:44.563325                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1584 04:52:44.566731  PCI: 00:02.0 init finished in 18 msecs
 1585 04:52:44.570191  PCI: 00:05.0 init
 1586 04:52:44.573440  PCI: 00:05.0 init finished in 0 msecs
 1587 04:52:44.576702  PCI: 00:08.0 init
 1588 04:52:44.579754  PCI: 00:08.0 init finished in 0 msecs
 1589 04:52:44.583230  PCI: 00:14.0 init
 1590 04:52:44.586606  PCI: 00:14.0 init finished in 0 msecs
 1591 04:52:44.590021  PCI: 00:14.2 init
 1592 04:52:44.593429  PCI: 00:14.2 init finished in 0 msecs
 1593 04:52:44.593547  PCI: 00:15.0 init
 1594 04:52:44.596718  I2C bus 0 version 0x3230302a
 1595 04:52:44.600163  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1596 04:52:44.606511  PCI: 00:15.0 init finished in 6 msecs
 1597 04:52:44.606598  PCI: 00:15.1 init
 1598 04:52:44.610022  I2C bus 1 version 0x3230302a
 1599 04:52:44.613152  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1600 04:52:44.616328  PCI: 00:15.1 init finished in 6 msecs
 1601 04:52:44.619727  PCI: 00:15.2 init
 1602 04:52:44.623367  I2C bus 2 version 0x3230302a
 1603 04:52:44.626374  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1604 04:52:44.629859  PCI: 00:15.2 init finished in 6 msecs
 1605 04:52:44.633168  PCI: 00:15.3 init
 1606 04:52:44.636694  I2C bus 3 version 0x3230302a
 1607 04:52:44.639506  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1608 04:52:44.642982  PCI: 00:15.3 init finished in 6 msecs
 1609 04:52:44.646595  PCI: 00:16.0 init
 1610 04:52:44.649574  PCI: 00:16.0 init finished in 0 msecs
 1611 04:52:44.653138  PCI: 00:19.1 init
 1612 04:52:44.653224  I2C bus 5 version 0x3230302a
 1613 04:52:44.659795  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1614 04:52:44.663220  PCI: 00:19.1 init finished in 6 msecs
 1615 04:52:44.663330  PCI: 00:1d.0 init
 1616 04:52:44.666513  Initializing PCH PCIe bridge.
 1617 04:52:44.669565  PCI: 00:1d.0 init finished in 3 msecs
 1618 04:52:44.673871  PCI: 00:1f.0 init
 1619 04:52:44.677223  IOAPIC: Initializing IOAPIC at 0xfec00000
 1620 04:52:44.683592  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1621 04:52:44.683681  IOAPIC: ID = 0x02
 1622 04:52:44.686982  IOAPIC: Dumping registers
 1623 04:52:44.690350    reg 0x0000: 0x02000000
 1624 04:52:44.693629    reg 0x0001: 0x00770020
 1625 04:52:44.693716    reg 0x0002: 0x00000000
 1626 04:52:44.700311  PCI: 00:1f.0 init finished in 21 msecs
 1627 04:52:44.700398  PCI: 00:1f.2 init
 1628 04:52:44.703272  Disabling ACPI via APMC.
 1629 04:52:44.707248  APMC done.
 1630 04:52:44.710559  PCI: 00:1f.2 init finished in 5 msecs
 1631 04:52:44.722273  PCI: 01:00.0 init
 1632 04:52:44.725328  PCI: 01:00.0 init finished in 0 msecs
 1633 04:52:44.728949  PNP: 0c09.0 init
 1634 04:52:44.732106  Google Chrome EC uptime: 8.222 seconds
 1635 04:52:44.738645  Google Chrome AP resets since EC boot: 1
 1636 04:52:44.742137  Google Chrome most recent AP reset causes:
 1637 04:52:44.745558  	0.451: 32775 shutdown: entering G3
 1638 04:52:44.752102  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1639 04:52:44.755203  PNP: 0c09.0 init finished in 22 msecs
 1640 04:52:44.760743  Devices initialized
 1641 04:52:44.764185  Show all devs... After init.
 1642 04:52:44.767609  Root Device: enabled 1
 1643 04:52:44.767710  DOMAIN: 0000: enabled 1
 1644 04:52:44.770977  CPU_CLUSTER: 0: enabled 1
 1645 04:52:44.774009  PCI: 00:00.0: enabled 1
 1646 04:52:44.777395  PCI: 00:02.0: enabled 1
 1647 04:52:44.777469  PCI: 00:04.0: enabled 1
 1648 04:52:44.780752  PCI: 00:05.0: enabled 1
 1649 04:52:44.784165  PCI: 00:06.0: enabled 0
 1650 04:52:44.787469  PCI: 00:07.0: enabled 0
 1651 04:52:44.787552  PCI: 00:07.1: enabled 0
 1652 04:52:44.790786  PCI: 00:07.2: enabled 0
 1653 04:52:44.794269  PCI: 00:07.3: enabled 0
 1654 04:52:44.797263  PCI: 00:08.0: enabled 1
 1655 04:52:44.797349  PCI: 00:09.0: enabled 0
 1656 04:52:44.800574  PCI: 00:0a.0: enabled 0
 1657 04:52:44.804094  PCI: 00:0d.0: enabled 1
 1658 04:52:44.807284  PCI: 00:0d.1: enabled 0
 1659 04:52:44.807370  PCI: 00:0d.2: enabled 0
 1660 04:52:44.810592  PCI: 00:0d.3: enabled 0
 1661 04:52:44.813917  PCI: 00:0e.0: enabled 0
 1662 04:52:44.814003  PCI: 00:10.2: enabled 1
 1663 04:52:44.817516  PCI: 00:10.6: enabled 0
 1664 04:52:44.820608  PCI: 00:10.7: enabled 0
 1665 04:52:44.824047  PCI: 00:12.0: enabled 0
 1666 04:52:44.824133  PCI: 00:12.6: enabled 0
 1667 04:52:44.827124  PCI: 00:13.0: enabled 0
 1668 04:52:44.830603  PCI: 00:14.0: enabled 1
 1669 04:52:44.834082  PCI: 00:14.1: enabled 0
 1670 04:52:44.834165  PCI: 00:14.2: enabled 1
 1671 04:52:44.837195  PCI: 00:14.3: enabled 1
 1672 04:52:44.840646  PCI: 00:15.0: enabled 1
 1673 04:52:44.843776  PCI: 00:15.1: enabled 1
 1674 04:52:44.843898  PCI: 00:15.2: enabled 1
 1675 04:52:44.847337  PCI: 00:15.3: enabled 1
 1676 04:52:44.850646  PCI: 00:16.0: enabled 1
 1677 04:52:44.850730  PCI: 00:16.1: enabled 0
 1678 04:52:44.853657  PCI: 00:16.2: enabled 0
 1679 04:52:44.857193  PCI: 00:16.3: enabled 0
 1680 04:52:44.860610  PCI: 00:16.4: enabled 0
 1681 04:52:44.860694  PCI: 00:16.5: enabled 0
 1682 04:52:44.863670  PCI: 00:17.0: enabled 0
 1683 04:52:44.867126  PCI: 00:19.0: enabled 0
 1684 04:52:44.870186  PCI: 00:19.1: enabled 1
 1685 04:52:44.870271  PCI: 00:19.2: enabled 0
 1686 04:52:44.873682  PCI: 00:1c.0: enabled 1
 1687 04:52:44.877163  PCI: 00:1c.1: enabled 0
 1688 04:52:44.880344  PCI: 00:1c.2: enabled 0
 1689 04:52:44.880460  PCI: 00:1c.3: enabled 0
 1690 04:52:44.883587  PCI: 00:1c.4: enabled 0
 1691 04:52:44.886979  PCI: 00:1c.5: enabled 0
 1692 04:52:44.890078  PCI: 00:1c.6: enabled 1
 1693 04:52:44.890162  PCI: 00:1c.7: enabled 0
 1694 04:52:44.893962  PCI: 00:1d.0: enabled 1
 1695 04:52:44.896862  PCI: 00:1d.1: enabled 0
 1696 04:52:44.896947  PCI: 00:1d.2: enabled 1
 1697 04:52:44.900369  PCI: 00:1d.3: enabled 0
 1698 04:52:44.903431  PCI: 00:1e.0: enabled 1
 1699 04:52:44.906956  PCI: 00:1e.1: enabled 0
 1700 04:52:44.907041  PCI: 00:1e.2: enabled 1
 1701 04:52:44.910432  PCI: 00:1e.3: enabled 1
 1702 04:52:44.913606  PCI: 00:1f.0: enabled 1
 1703 04:52:44.916694  PCI: 00:1f.1: enabled 0
 1704 04:52:44.916781  PCI: 00:1f.2: enabled 1
 1705 04:52:44.920094  PCI: 00:1f.3: enabled 1
 1706 04:52:44.923694  PCI: 00:1f.4: enabled 0
 1707 04:52:44.926731  PCI: 00:1f.5: enabled 1
 1708 04:52:44.926815  PCI: 00:1f.6: enabled 0
 1709 04:52:44.929967  PCI: 00:1f.7: enabled 0
 1710 04:52:44.933503  APIC: 00: enabled 1
 1711 04:52:44.933606  GENERIC: 0.0: enabled 1
 1712 04:52:44.936814  GENERIC: 0.0: enabled 1
 1713 04:52:44.940209  GENERIC: 1.0: enabled 1
 1714 04:52:44.943378  GENERIC: 0.0: enabled 1
 1715 04:52:44.943463  GENERIC: 1.0: enabled 1
 1716 04:52:44.946739  USB0 port 0: enabled 1
 1717 04:52:44.949735  GENERIC: 0.0: enabled 1
 1718 04:52:44.949826  USB0 port 0: enabled 1
 1719 04:52:44.953374  GENERIC: 0.0: enabled 1
 1720 04:52:44.956701  I2C: 00:1a: enabled 1
 1721 04:52:44.960179  I2C: 00:31: enabled 1
 1722 04:52:44.960262  I2C: 00:32: enabled 1
 1723 04:52:44.963207  I2C: 00:10: enabled 1
 1724 04:52:44.966634  I2C: 00:15: enabled 1
 1725 04:52:44.966717  GENERIC: 0.0: enabled 0
 1726 04:52:44.970039  GENERIC: 1.0: enabled 0
 1727 04:52:44.973129  GENERIC: 0.0: enabled 1
 1728 04:52:44.973214  SPI: 00: enabled 1
 1729 04:52:44.976555  SPI: 00: enabled 1
 1730 04:52:44.979951  PNP: 0c09.0: enabled 1
 1731 04:52:44.980041  GENERIC: 0.0: enabled 1
 1732 04:52:44.983059  USB3 port 0: enabled 1
 1733 04:52:44.986582  USB3 port 1: enabled 1
 1734 04:52:44.989613  USB3 port 2: enabled 0
 1735 04:52:44.989698  USB3 port 3: enabled 0
 1736 04:52:44.993041  USB2 port 0: enabled 0
 1737 04:52:44.996359  USB2 port 1: enabled 1
 1738 04:52:44.996442  USB2 port 2: enabled 1
 1739 04:52:44.999657  USB2 port 3: enabled 0
 1740 04:52:45.003340  USB2 port 4: enabled 1
 1741 04:52:45.003423  USB2 port 5: enabled 0
 1742 04:52:45.006255  USB2 port 6: enabled 0
 1743 04:52:45.009680  USB2 port 7: enabled 0
 1744 04:52:45.013123  USB2 port 8: enabled 0
 1745 04:52:45.013207  USB2 port 9: enabled 0
 1746 04:52:45.016208  USB3 port 0: enabled 0
 1747 04:52:45.019474  USB3 port 1: enabled 1
 1748 04:52:45.019558  USB3 port 2: enabled 0
 1749 04:52:45.023014  USB3 port 3: enabled 0
 1750 04:52:45.026158  GENERIC: 0.0: enabled 1
 1751 04:52:45.029433  GENERIC: 1.0: enabled 1
 1752 04:52:45.029517  APIC: 03: enabled 1
 1753 04:52:45.033012  APIC: 05: enabled 1
 1754 04:52:45.033095  APIC: 06: enabled 1
 1755 04:52:45.036456  APIC: 07: enabled 1
 1756 04:52:45.039545  APIC: 02: enabled 1
 1757 04:52:45.039629  APIC: 01: enabled 1
 1758 04:52:45.042940  APIC: 04: enabled 1
 1759 04:52:45.046016  PCI: 01:00.0: enabled 1
 1760 04:52:45.049552  BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
 1761 04:52:45.056200  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1762 04:52:45.059146  ELOG: NV offset 0xf30000 size 0x1000
 1763 04:52:45.066002  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1764 04:52:45.072859  ELOG: Event(17) added with size 13 at 2022-08-23 03:33:18 UTC
 1765 04:52:45.079214  ELOG: Event(92) added with size 9 at 2022-08-23 03:33:18 UTC
 1766 04:52:45.085970  ELOG: Event(93) added with size 9 at 2022-08-23 03:33:18 UTC
 1767 04:52:45.092378  ELOG: Event(9E) added with size 10 at 2022-08-23 03:33:18 UTC
 1768 04:52:45.098966  ELOG: Event(9F) added with size 14 at 2022-08-23 03:33:18 UTC
 1769 04:52:45.105680  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1770 04:52:45.112424  ELOG: Event(A1) added with size 10 at 2022-08-23 03:33:18 UTC
 1771 04:52:45.118677  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1772 04:52:45.125431  ELOG: Event(A0) added with size 9 at 2022-08-23 03:33:18 UTC
 1773 04:52:45.131857  ELOG: Event(16) added with size 11 at 2022-08-23 03:33:18 UTC
 1774 04:52:45.135435  Erasing flash addr f30000 + 4 KiB
 1775 04:52:45.191131  elog_add_boot_reason: Logged dev mode boot
 1776 04:52:45.197531  BS: BS_POST_DEVICE entry times (exec / console): 37 / 34 ms
 1777 04:52:45.197626  Finalize devices...
 1778 04:52:45.200963  Devices finalized
 1779 04:52:45.203964  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1780 04:52:45.211053  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1781 04:52:45.217345  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1782 04:52:45.220960  ME: HFSTS1                      : 0x80030055
 1783 04:52:45.223999  ME: HFSTS2                      : 0x30280116
 1784 04:52:45.231035  ME: HFSTS3                      : 0x00000050
 1785 04:52:45.234047  ME: HFSTS4                      : 0x00004000
 1786 04:52:45.240909  ME: HFSTS5                      : 0x00000000
 1787 04:52:45.244242  ME: HFSTS6                      : 0x40400006
 1788 04:52:45.247637  ME: Manufacturing Mode          : YES
 1789 04:52:45.250521  ME: SPI Protection Mode Enabled : NO
 1790 04:52:45.254047  ME: FW Partition Table          : OK
 1791 04:52:45.257117  ME: Bringup Loader Failure      : NO
 1792 04:52:45.260651  ME: Firmware Init Complete      : NO
 1793 04:52:45.267152  ME: Boot Options Present        : NO
 1794 04:52:45.270560  ME: Update In Progress          : NO
 1795 04:52:45.274022  ME: D0i3 Support                : YES
 1796 04:52:45.277057  ME: Low Power State Enabled     : NO
 1797 04:52:45.280514  ME: CPU Replaced                : YES
 1798 04:52:45.284001  ME: CPU Replacement Valid       : YES
 1799 04:52:45.287035  ME: Current Working State       : 5
 1800 04:52:45.290276  ME: Current Operation State     : 1
 1801 04:52:45.296886  ME: Current Operation Mode      : 3
 1802 04:52:45.300354  ME: Error Code                  : 0
 1803 04:52:45.303563  ME: Enhanced Debug Mode         : NO
 1804 04:52:45.307077  ME: CPU Debug Disabled          : YES
 1805 04:52:45.310538  ME: TXT Support                 : NO
 1806 04:52:45.317034  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1807 04:52:45.323717  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1808 04:52:45.326685  CBFS: 'fallback/slic' not found.
 1809 04:52:45.330210  ACPI: Writing ACPI tables at 76b01000.
 1810 04:52:45.333283  ACPI:    * FACS
 1811 04:52:45.333371  ACPI:    * DSDT
 1812 04:52:45.339924  Ramoops buffer: 0x100000@0x76a00000.
 1813 04:52:45.343412  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1814 04:52:45.346585  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1815 04:52:45.350174  Google Chrome EC: version:
 1816 04:52:45.353653  	ro: voema_v2.0.10114-a447f03e46
 1817 04:52:45.356664  	rw: voema_v2.0.10114-a447f03e46
 1818 04:52:45.360223    running image: 2
 1819 04:52:45.366665  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
 1820 04:52:45.370485  ACPI:    * FADT
 1821 04:52:45.370578  SCI is IRQ9
 1822 04:52:45.377049  ACPI: added table 1/32, length now 40
 1823 04:52:45.377137  ACPI:     * SSDT
 1824 04:52:45.380090  Found 1 CPU(s) with 8 core(s) each.
 1825 04:52:45.386462  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1826 04:52:45.389826  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1827 04:52:45.393310  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1828 04:52:45.396798  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1829 04:52:45.403309  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1830 04:52:45.410082  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1831 04:52:45.413094  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1832 04:52:45.419611  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1833 04:52:45.426398  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1834 04:52:45.429492  \_SB.PCI0.RP09: Added StorageD3Enable property
 1835 04:52:45.436533  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1836 04:52:45.439482  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1837 04:52:45.446007  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1838 04:52:45.449077  PS2K: Passing 80 keymaps to kernel
 1839 04:52:45.455754  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1840 04:52:45.462389  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1841 04:52:45.469158  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1842 04:52:45.475663  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1843 04:52:45.482199  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1844 04:52:45.488902  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1845 04:52:45.495480  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1846 04:52:45.502027  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1847 04:52:45.505333  ACPI: added table 2/32, length now 44
 1848 04:52:45.505423  ACPI:    * MCFG
 1849 04:52:45.511954  ACPI: added table 3/32, length now 48
 1850 04:52:45.512048  ACPI:    * TPM2
 1851 04:52:45.515196  TPM2 log created at 0x769f0000
 1852 04:52:45.518538  ACPI: added table 4/32, length now 52
 1853 04:52:45.521663  ACPI:    * MADT
 1854 04:52:45.521784  SCI is IRQ9
 1855 04:52:45.525206  ACPI: added table 5/32, length now 56
 1856 04:52:45.528587  current = 76b09850
 1857 04:52:45.528704  ACPI:    * DMAR
 1858 04:52:45.531770  ACPI: added table 6/32, length now 60
 1859 04:52:45.538406  ACPI: added table 7/32, length now 64
 1860 04:52:45.538545  ACPI:    * HPET
 1861 04:52:45.541912  ACPI: added table 8/32, length now 68
 1862 04:52:45.545419  ACPI: done.
 1863 04:52:45.545629  ACPI tables: 35216 bytes.
 1864 04:52:45.548480  smbios_write_tables: 769ef000
 1865 04:52:45.551476  EC returned error result code 3
 1866 04:52:45.555015  Couldn't obtain OEM name from CBI
 1867 04:52:45.558795  Create SMBIOS type 16
 1868 04:52:45.562207  Create SMBIOS type 17
 1869 04:52:45.565330  GENERIC: 0.0 (WIFI Device)
 1870 04:52:45.565443  SMBIOS tables: 1734 bytes.
 1871 04:52:45.571772  Writing table forward entry at 0x00000500
 1872 04:52:45.578679  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1873 04:52:45.582109  Writing coreboot table at 0x76b25000
 1874 04:52:45.588545   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1875 04:52:45.592089   1. 0000000000001000-000000000009ffff: RAM
 1876 04:52:45.595045   2. 00000000000a0000-00000000000fffff: RESERVED
 1877 04:52:45.601786   3. 0000000000100000-00000000769eefff: RAM
 1878 04:52:45.605232   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1879 04:52:45.612027   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1880 04:52:45.618363   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1881 04:52:45.621923   7. 0000000077000000-000000007fbfffff: RESERVED
 1882 04:52:45.628465   8. 00000000c0000000-00000000cfffffff: RESERVED
 1883 04:52:45.631779   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1884 04:52:45.634888  10. 00000000fb000000-00000000fb000fff: RESERVED
 1885 04:52:45.641903  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1886 04:52:45.645001  12. 00000000fed80000-00000000fed87fff: RESERVED
 1887 04:52:45.651525  13. 00000000fed90000-00000000fed92fff: RESERVED
 1888 04:52:45.655113  14. 00000000feda0000-00000000feda1fff: RESERVED
 1889 04:52:45.661649  15. 00000000fedc0000-00000000feddffff: RESERVED
 1890 04:52:45.664822  16. 0000000100000000-00000004803fffff: RAM
 1891 04:52:45.668286  Passing 4 GPIOs to payload:
 1892 04:52:45.671315              NAME |       PORT | POLARITY |     VALUE
 1893 04:52:45.678106               lid |  undefined |     high |      high
 1894 04:52:45.684583             power |  undefined |     high |       low
 1895 04:52:45.687956             oprom |  undefined |     high |       low
 1896 04:52:45.694630          EC in RW | 0x000000e5 |     high |      high
 1897 04:52:45.701329  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
 1898 04:52:45.704746  coreboot table: 1576 bytes.
 1899 04:52:45.707726  IMD ROOT    0. 0x76fff000 0x00001000
 1900 04:52:45.711313  IMD SMALL   1. 0x76ffe000 0x00001000
 1901 04:52:45.714381  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1902 04:52:45.717813  VPD         3. 0x76c4d000 0x00000367
 1903 04:52:45.721249  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1904 04:52:45.724558  CONSOLE     5. 0x76c2c000 0x00020000
 1905 04:52:45.727621  FMAP        6. 0x76c2b000 0x00000578
 1906 04:52:45.734443  TIME STAMP  7. 0x76c2a000 0x00000910
 1907 04:52:45.737948  VBOOT WORK  8. 0x76c16000 0x00014000
 1908 04:52:45.740971  ROMSTG STCK 9. 0x76c15000 0x00001000
 1909 04:52:45.744509  AFTER CAR  10. 0x76c0a000 0x0000b000
 1910 04:52:45.747633  RAMSTAGE   11. 0x76b97000 0x00073000
 1911 04:52:45.750679  REFCODE    12. 0x76b42000 0x00055000
 1912 04:52:45.754265  SMM BACKUP 13. 0x76b32000 0x00010000
 1913 04:52:45.757287  4f444749   14. 0x76b30000 0x00002000
 1914 04:52:45.760843  EXT VBT15. 0x76b2d000 0x0000219f
 1915 04:52:45.767455  COREBOOT   16. 0x76b25000 0x00008000
 1916 04:52:45.770573  ACPI       17. 0x76b01000 0x00024000
 1917 04:52:45.773971  ACPI GNVS  18. 0x76b00000 0x00001000
 1918 04:52:45.777557  RAMOOPS    19. 0x76a00000 0x00100000
 1919 04:52:45.780490  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1920 04:52:45.784005  SMBIOS     21. 0x769ef000 0x00000800
 1921 04:52:45.787369  IMD small region:
 1922 04:52:45.790443    IMD ROOT    0. 0x76ffec00 0x00000400
 1923 04:52:45.794096    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1924 04:52:45.797138    POWER STATE 2. 0x76ffeb80 0x00000044
 1925 04:52:45.800447    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1926 04:52:45.806918    MEM INFO    4. 0x76ffe980 0x000001e0
 1927 04:52:45.810344  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
 1928 04:52:45.813736  MTRR: Physical address space:
 1929 04:52:45.820299  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1930 04:52:45.827007  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1931 04:52:45.833606  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1932 04:52:45.840286  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1933 04:52:45.846818  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1934 04:52:45.853470  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1935 04:52:45.860027  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
 1936 04:52:45.863447  MTRR: Fixed MSR 0x250 0x0606060606060606
 1937 04:52:45.866531  MTRR: Fixed MSR 0x258 0x0606060606060606
 1938 04:52:45.870180  MTRR: Fixed MSR 0x259 0x0000000000000000
 1939 04:52:45.876400  MTRR: Fixed MSR 0x268 0x0606060606060606
 1940 04:52:45.879946  MTRR: Fixed MSR 0x269 0x0606060606060606
 1941 04:52:45.883297  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1942 04:52:45.886382  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1943 04:52:45.889892  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1944 04:52:45.896315  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1945 04:52:45.899658  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1946 04:52:45.903024  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1947 04:52:45.907675  call enable_fixed_mtrr()
 1948 04:52:45.910694  CPU physical address size: 39 bits
 1949 04:52:45.917494  MTRR: default type WB/UC MTRR counts: 6/7.
 1950 04:52:45.920890  MTRR: WB selected as default type.
 1951 04:52:45.927503  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1952 04:52:45.930893  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1953 04:52:45.937231  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1954 04:52:45.943905  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
 1955 04:52:45.950506  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1956 04:52:45.957207  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
 1957 04:52:45.960842  
 1958 04:52:45.960928  MTRR check
 1959 04:52:45.964183  Fixed MTRRs   : Enabled
 1960 04:52:45.964268  Variable MTRRs: Enabled
 1961 04:52:45.964335  
 1962 04:52:45.970729  MTRR: Fixed MSR 0x250 0x0606060606060606
 1963 04:52:45.974234  MTRR: Fixed MSR 0x258 0x0606060606060606
 1964 04:52:45.977548  MTRR: Fixed MSR 0x259 0x0000000000000000
 1965 04:52:45.980593  MTRR: Fixed MSR 0x268 0x0606060606060606
 1966 04:52:45.987272  MTRR: Fixed MSR 0x269 0x0606060606060606
 1967 04:52:45.990713  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1968 04:52:45.994101  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1969 04:52:45.997116  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1970 04:52:46.003739  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1971 04:52:46.007198  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1972 04:52:46.010581  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1973 04:52:46.017793  BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
 1974 04:52:46.020900  call enable_fixed_mtrr()
 1975 04:52:46.024803  Checking cr50 for pending updates
 1976 04:52:46.027995  CPU physical address size: 39 bits
 1977 04:52:46.032015  MTRR: Fixed MSR 0x250 0x0606060606060606
 1978 04:52:46.035018  MTRR: Fixed MSR 0x250 0x0606060606060606
 1979 04:52:46.041894  MTRR: Fixed MSR 0x258 0x0606060606060606
 1980 04:52:46.044980  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 04:52:46.048500  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 04:52:46.051639  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 04:52:46.055116  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 04:52:46.061775  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 04:52:46.065135  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 04:52:46.068101  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 04:52:46.071628  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 04:52:46.078315  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 04:52:46.081256  MTRR: Fixed MSR 0x258 0x0606060606060606
 1990 04:52:46.088094  MTRR: Fixed MSR 0x259 0x0000000000000000
 1991 04:52:46.091531  MTRR: Fixed MSR 0x268 0x0606060606060606
 1992 04:52:46.094651  MTRR: Fixed MSR 0x269 0x0606060606060606
 1993 04:52:46.098000  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1994 04:52:46.104734  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1995 04:52:46.108094  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1996 04:52:46.111272  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1997 04:52:46.114695  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1998 04:52:46.120988  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1999 04:52:46.124378  call enable_fixed_mtrr()
 2000 04:52:46.128534  call enable_fixed_mtrr()
 2001 04:52:46.128619  Reading cr50 TPM mode
 2002 04:52:46.131986  CPU physical address size: 39 bits
 2003 04:52:46.135817  CPU physical address size: 39 bits
 2004 04:52:46.142493  MTRR: Fixed MSR 0x250 0x0606060606060606
 2005 04:52:46.145993  MTRR: Fixed MSR 0x250 0x0606060606060606
 2006 04:52:46.149111  MTRR: Fixed MSR 0x258 0x0606060606060606
 2007 04:52:46.152722  MTRR: Fixed MSR 0x259 0x0000000000000000
 2008 04:52:46.159223  MTRR: Fixed MSR 0x268 0x0606060606060606
 2009 04:52:46.162706  MTRR: Fixed MSR 0x269 0x0606060606060606
 2010 04:52:46.165673  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2011 04:52:46.169154  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2012 04:52:46.175799  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2013 04:52:46.179288  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2014 04:52:46.182733  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2015 04:52:46.185686  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2016 04:52:46.193619  MTRR: Fixed MSR 0x258 0x0606060606060606
 2017 04:52:46.193705  call enable_fixed_mtrr()
 2018 04:52:46.200348  MTRR: Fixed MSR 0x259 0x0000000000000000
 2019 04:52:46.203778  MTRR: Fixed MSR 0x268 0x0606060606060606
 2020 04:52:46.206836  MTRR: Fixed MSR 0x269 0x0606060606060606
 2021 04:52:46.210199  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2022 04:52:46.217123  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2023 04:52:46.220149  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2024 04:52:46.223371  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2025 04:52:46.227108  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2026 04:52:46.233573  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2027 04:52:46.236560  CPU physical address size: 39 bits
 2028 04:52:46.241029  call enable_fixed_mtrr()
 2029 04:52:46.244052  MTRR: Fixed MSR 0x250 0x0606060606060606
 2030 04:52:46.250915  MTRR: Fixed MSR 0x250 0x0606060606060606
 2031 04:52:46.253978  MTRR: Fixed MSR 0x258 0x0606060606060606
 2032 04:52:46.257450  MTRR: Fixed MSR 0x259 0x0000000000000000
 2033 04:52:46.260547  MTRR: Fixed MSR 0x268 0x0606060606060606
 2034 04:52:46.267336  MTRR: Fixed MSR 0x269 0x0606060606060606
 2035 04:52:46.270849  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2036 04:52:46.273993  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2037 04:52:46.277439  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2038 04:52:46.283934  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2039 04:52:46.287162  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2040 04:52:46.290602  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2041 04:52:46.297427  MTRR: Fixed MSR 0x258 0x0606060606060606
 2042 04:52:46.300827  MTRR: Fixed MSR 0x259 0x0000000000000000
 2043 04:52:46.304287  MTRR: Fixed MSR 0x268 0x0606060606060606
 2044 04:52:46.307283  MTRR: Fixed MSR 0x269 0x0606060606060606
 2045 04:52:46.313970  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2046 04:52:46.317371  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2047 04:52:46.320740  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2048 04:52:46.323660  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2049 04:52:46.330553  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2050 04:52:46.333941  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2051 04:52:46.336953  call enable_fixed_mtrr()
 2052 04:52:46.340284  call enable_fixed_mtrr()
 2053 04:52:46.347147  BS: BS_PAYLOAD_LOAD entry times (exec / console): 109 / 6 ms
 2054 04:52:46.350161  CPU physical address size: 39 bits
 2055 04:52:46.353687  CPU physical address size: 39 bits
 2056 04:52:46.360339  CPU physical address size: 39 bits
 2057 04:52:46.366856  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2058 04:52:46.370197  Checking segment from ROM address 0xffc02b38
 2059 04:52:46.376466  Checking segment from ROM address 0xffc02b54
 2060 04:52:46.380081  Loading segment from ROM address 0xffc02b38
 2061 04:52:46.383161    code (compression=0)
 2062 04:52:46.390135    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2063 04:52:46.399659  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2064 04:52:46.399747  it's not compressed!
 2065 04:52:46.541086  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2066 04:52:46.547377  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2067 04:52:46.554349  Loading segment from ROM address 0xffc02b54
 2068 04:52:46.558024    Entry Point 0x30000000
 2069 04:52:46.558118  Loaded segments
 2070 04:52:46.563967  BS: BS_PAYLOAD_LOAD run times (exec / console): 149 / 63 ms
 2071 04:52:46.609368  Finalizing chipset.
 2072 04:52:46.612433  Finalizing SMM.
 2073 04:52:46.612525  APMC done.
 2074 04:52:46.619207  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
 2075 04:52:46.622599  mp_park_aps done after 0 msecs.
 2076 04:52:46.625657  Jumping to boot code at 0x30000000(0x76b25000)
 2077 04:52:46.635794  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2078 04:52:46.635919  
 2079 04:52:46.639291  Starting depthcharge on Voema...
 2080 04:52:46.639684  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2081 04:52:46.639794  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2082 04:52:46.639924  Setting prompt string to ['volteer:']
 2083 04:52:46.640007  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2084 04:52:46.649194  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2085 04:52:46.655745  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2086 04:52:46.662345  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2087 04:52:46.665433  Failed to find eMMC card reader
 2088 04:52:46.665517  Wipe memory regions:
 2089 04:52:46.671938  	[0x00000000001000, 0x000000000a0000)
 2090 04:52:46.675501  	[0x00000000100000, 0x00000030000000)
 2091 04:52:46.712814  	[0x00000032662db0, 0x000000769ef000)
 2092 04:52:46.763491  	[0x00000100000000, 0x00000480400000)
 2093 04:52:47.387014  ec_init: CrosEC protocol v3 supported (256, 256)
 2094 04:52:47.819172  R8152: Initializing
 2095 04:52:47.822627  Version 6 (ocp_data = 5c30)
 2096 04:52:47.825777  R8152: Done initializing
 2097 04:52:47.829079  Adding net device
 2098 04:52:48.135177  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2099 04:52:48.135309  
 2100 04:52:48.138571  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2102 04:52:48.239356  volteer: tftpboot 192.168.201.1 7096660/tftp-deploy-48arh6ss/kernel/bzImage 7096660/tftp-deploy-48arh6ss/kernel/cmdline 7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
 2103 04:52:48.239491  Setting prompt string to 'Starting kernel'
 2104 04:52:48.239568  Setting prompt string to ['Starting kernel']
 2105 04:52:48.239635  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2106 04:52:48.239706  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
 2107 04:52:48.243917  tftpboot 192.168.201.1 7096660/tftp-deploy-48arh6ss/kernel/bzImoy-48arh6ss/kernel/cmdline 7096660/tftp-deploy-48arh6ss/ramdisk/ramdisk.cpio.gz
 2108 04:52:48.244013  Waiting for link
 2109 04:52:48.446812  done.
 2110 04:52:48.446947  MAC: 00:24:32:30:78:e4
 2111 04:52:48.450065  Sending DHCP discover... done.
 2112 04:52:48.453642  Waiting for reply... done.
 2113 04:52:48.456929  Sending DHCP request... done.
 2114 04:52:48.460129  Waiting for reply... done.
 2115 04:52:48.463182  My ip is 192.168.201.19
 2116 04:52:48.467009  The DHCP server ip is 192.168.201.1
 2117 04:52:48.469873  TFTP server IP predefined by user: 192.168.201.1
 2118 04:52:48.476384  Bootfile predefined by user: 7096660/tftp-deploy-48arh6ss/kernel/bzImage
 2119 04:52:48.479738  Sending tftp read request... done.
 2120 04:52:48.486695  Waiting for the transfer... 
 2121 04:52:49.047634  00000000 ################################################################
 2122 04:52:49.621084  00080000 ################################################################
 2123 04:52:50.187048  00100000 ################################################################
 2124 04:52:50.749894  00180000 ################################################################
 2125 04:52:51.308217  00200000 ################################################################
 2126 04:52:51.878290  00280000 ################################################################
 2127 04:52:52.459680  00300000 ################################################################
 2128 04:52:53.034317  00380000 ################################################################
 2129 04:52:53.575795  00400000 ################################################################
 2130 04:52:54.122742  00480000 ################################################################
 2131 04:52:54.661548  00500000 ################################################################
 2132 04:52:55.226506  00580000 ################################################################
 2133 04:52:55.784194  00600000 ################################################################
 2134 04:52:56.346641  00680000 ################################################################
 2135 04:52:56.921691  00700000 ################################################################
 2136 04:52:57.486035  00780000 ################################################################
 2137 04:52:58.046820  00800000 ################################################################
 2138 04:52:58.091991  00880000 ###### done.
 2139 04:52:58.095454  The bootfile was 8953856 bytes long.
 2140 04:52:58.098545  Sending tftp read request... done.
 2141 04:52:58.101794  Waiting for the transfer... 
 2142 04:52:58.689418  00000000 ################################################################
 2143 04:52:59.269565  00080000 ################################################################
 2144 04:52:59.861828  00100000 ################################################################
 2145 04:53:00.443565  00180000 ################################################################
 2146 04:53:01.107706  00200000 ################################################################
 2147 04:53:01.790319  00280000 ################################################################
 2148 04:53:02.459146  00300000 ################################################################
 2149 04:53:03.087455  00380000 ################################################################
 2150 04:53:03.725026  00400000 ################################################################
 2151 04:53:04.326457  00480000 ################################################################
 2152 04:53:04.867746  00500000 ################################################################
 2153 04:53:05.470182  00580000 ################################################################
 2154 04:53:06.204541  00600000 ################################################################
 2155 04:53:06.777825  00680000 ################################################################
 2156 04:53:07.318849  00700000 ################################################################
 2157 04:53:07.884133  00780000 ################################################################
 2158 04:53:08.080582  00800000 ####################### done.
 2159 04:53:08.084033  Sending tftp read request... done.
 2160 04:53:08.087108  Waiting for the transfer... 
 2161 04:53:08.090621  00000000 # done.
 2162 04:53:08.100852  Command line loaded dynamically from TFTP file: 7096660/tftp-deploy-48arh6ss/kernel/cmdline
 2163 04:53:08.110676  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2164 04:53:08.121463  Shutting down all USB controllers.
 2165 04:53:08.121544  Removing current net device
 2166 04:53:08.124556  Finalizing coreboot
 2167 04:53:08.131439  Exiting depthcharge with code 4 at timestamp: 30121654
 2168 04:53:08.131518  
 2169 04:53:08.131585  Starting kernel ...
 2170 04:53:08.131645  
 2171 04:53:08.131706  
 2172 04:53:08.132002  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2173 04:53:08.132103  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2174 04:53:08.132182  Setting prompt string to ['Linux version [0-9]']
 2175 04:53:08.132255  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2176 04:53:08.132324  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2178 04:57:30.132357  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2180 04:57:30.132572  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2182 04:57:30.132731  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2185 04:57:30.132993  end: 2 depthcharge-action (duration 00:05:00) [common]
 2187 04:57:30.133187  Cleaning after the job
 2188 04:57:30.133272  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/ramdisk
 2189 04:57:30.134231  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/kernel
 2190 04:57:30.135200  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096660/tftp-deploy-48arh6ss/modules
 2191 04:57:30.135444  start: 5.1 power-off (timeout 00:00:30) [common]
 2192 04:57:30.135605  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
 2193 04:57:30.154914  >> Command sent successfully.

 2194 04:57:30.156817  Returned 0 in 0 seconds
 2195 04:57:30.257465  end: 5.1 power-off (duration 00:00:00) [common]
 2197 04:57:30.257801  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2198 04:57:30.258043  Listened to connection for namespace 'common' for up to 1s
 2199 04:57:31.259954  Finalising connection for namespace 'common'
 2200 04:57:31.260131  Disconnecting from shell: Finalise
 2201 04:57:31.360669  end: 5.2 read-feedback (duration 00:00:01) [common]
 2202 04:57:31.360827  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096660
 2203 04:57:31.371576  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096660
 2204 04:57:31.371730  JobError: Your job cannot terminate cleanly.