Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:46:59.239331 lava-dispatcher, installed at version: 2022.06
2 05:46:59.239514 start: 0 validate
3 05:46:59.239641 Start time: 2022-08-23 05:46:59.239633+00:00 (UTC)
4 05:46:59.239761 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:46:59.239884 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:46:59.533963 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:46:59.534716 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:46:59.822352 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:46:59.823073 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:47:00.116655 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:47:00.117400 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:47:00.413184 validate duration: 1.17
14 05:47:00.413467 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:47:00.413567 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:47:00.413655 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:47:00.413749 Not decompressing ramdisk as can be used compressed.
18 05:47:00.413831 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220812.0/amd64/initrd.cpio.gz
19 05:47:00.413895 saving as /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/ramdisk/initrd.cpio.gz
20 05:47:00.413955 total size: 5411054 (5MB)
21 05:47:00.415022 progress 0% (0MB)
22 05:47:00.416417 progress 5% (0MB)
23 05:47:00.417773 progress 10% (0MB)
24 05:47:00.419109 progress 15% (0MB)
25 05:47:00.420539 progress 20% (1MB)
26 05:47:00.421855 progress 25% (1MB)
27 05:47:00.423127 progress 30% (1MB)
28 05:47:00.424389 progress 35% (1MB)
29 05:47:00.425849 progress 40% (2MB)
30 05:47:00.427186 progress 45% (2MB)
31 05:47:00.428449 progress 50% (2MB)
32 05:47:00.429754 progress 55% (2MB)
33 05:47:00.431208 progress 60% (3MB)
34 05:47:00.432475 progress 65% (3MB)
35 05:47:00.433780 progress 70% (3MB)
36 05:47:00.435041 progress 75% (3MB)
37 05:47:00.436485 progress 80% (4MB)
38 05:47:00.437762 progress 85% (4MB)
39 05:47:00.439056 progress 90% (4MB)
40 05:47:00.440316 progress 95% (4MB)
41 05:47:00.441783 progress 100% (5MB)
42 05:47:00.441951 5MB downloaded in 0.03s (184.35MB/s)
43 05:47:00.442163 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:47:00.442423 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:47:00.442544 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:47:00.442660 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:47:00.442763 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:47:00.442843 saving as /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/kernel/bzImage
50 05:47:00.442909 total size: 8953856 (8MB)
51 05:47:00.442972 No compression specified
52 05:47:00.444026 progress 0% (0MB)
53 05:47:00.446256 progress 5% (0MB)
54 05:47:00.448499 progress 10% (0MB)
55 05:47:00.450577 progress 15% (1MB)
56 05:47:00.452752 progress 20% (1MB)
57 05:47:00.455016 progress 25% (2MB)
58 05:47:00.457112 progress 30% (2MB)
59 05:47:00.459300 progress 35% (3MB)
60 05:47:00.461522 progress 40% (3MB)
61 05:47:00.463554 progress 45% (3MB)
62 05:47:00.465726 progress 50% (4MB)
63 05:47:00.467872 progress 55% (4MB)
64 05:47:00.470081 progress 60% (5MB)
65 05:47:00.472217 progress 65% (5MB)
66 05:47:00.474391 progress 70% (6MB)
67 05:47:00.476378 progress 75% (6MB)
68 05:47:00.478606 progress 80% (6MB)
69 05:47:00.480747 progress 85% (7MB)
70 05:47:00.482745 progress 90% (7MB)
71 05:47:00.484880 progress 95% (8MB)
72 05:47:00.487044 progress 100% (8MB)
73 05:47:00.487224 8MB downloaded in 0.04s (192.71MB/s)
74 05:47:00.487367 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:47:00.487600 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:47:00.487689 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:47:00.487774 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:47:00.487879 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220812.0/amd64/full.rootfs.tar.xz
80 05:47:00.487946 saving as /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/nfsrootfs/full.rootfs.tar
81 05:47:00.488007 total size: 133221228 (127MB)
82 05:47:00.488067 Using unxz to decompress xz
83 05:47:00.491397 progress 0% (0MB)
84 05:47:00.823183 progress 5% (6MB)
85 05:47:01.178594 progress 10% (12MB)
86 05:47:01.464250 progress 15% (19MB)
87 05:47:01.677731 progress 20% (25MB)
88 05:47:01.925739 progress 25% (31MB)
89 05:47:02.261789 progress 30% (38MB)
90 05:47:02.606274 progress 35% (44MB)
91 05:47:02.992532 progress 40% (50MB)
92 05:47:03.366954 progress 45% (57MB)
93 05:47:03.719773 progress 50% (63MB)
94 05:47:04.085972 progress 55% (69MB)
95 05:47:04.462480 progress 60% (76MB)
96 05:47:04.834255 progress 65% (82MB)
97 05:47:05.220340 progress 70% (88MB)
98 05:47:05.579408 progress 75% (95MB)
99 05:47:06.013152 progress 80% (101MB)
100 05:47:06.442396 progress 85% (108MB)
101 05:47:06.703521 progress 90% (114MB)
102 05:47:07.039618 progress 95% (120MB)
103 05:47:07.424230 progress 100% (127MB)
104 05:47:07.429939 127MB downloaded in 6.94s (18.30MB/s)
105 05:47:07.430188 end: 1.3.1 http-download (duration 00:00:07) [common]
107 05:47:07.430446 end: 1.3 download-retry (duration 00:00:07) [common]
108 05:47:07.430537 start: 1.4 download-retry (timeout 00:09:53) [common]
109 05:47:07.430624 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 05:47:07.430741 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:47:07.430810 saving as /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/modules/modules.tar
112 05:47:07.430872 total size: 64712 (0MB)
113 05:47:07.430933 Using unxz to decompress xz
114 05:47:07.434160 progress 50% (0MB)
115 05:47:07.434530 progress 100% (0MB)
116 05:47:07.438710 0MB downloaded in 0.01s (7.88MB/s)
117 05:47:07.438914 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:47:07.439166 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:47:07.439287 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 05:47:07.439380 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 05:47:08.689579 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096699/extract-nfsrootfs-lbh5pica
123 05:47:08.689788 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 05:47:08.689900 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 05:47:08.690039 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi
126 05:47:08.690144 makedir: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin
127 05:47:08.690231 makedir: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/tests
128 05:47:08.690314 makedir: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/results
129 05:47:08.690412 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-add-keys
130 05:47:08.690541 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-add-sources
131 05:47:08.690657 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-background-process-start
132 05:47:08.690771 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-background-process-stop
133 05:47:08.690882 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-common-functions
134 05:47:08.690992 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-echo-ipv4
135 05:47:08.691103 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-install-packages
136 05:47:08.691212 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-installed-packages
137 05:47:08.691320 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-os-build
138 05:47:08.691430 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-probe-channel
139 05:47:08.691539 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-probe-ip
140 05:47:08.691647 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-target-ip
141 05:47:08.691756 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-target-mac
142 05:47:08.691864 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-target-storage
143 05:47:08.691975 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-case
144 05:47:08.692089 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-event
145 05:47:08.692197 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-feedback
146 05:47:08.692305 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-raise
147 05:47:08.692459 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-reference
148 05:47:08.692581 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-runner
149 05:47:08.692689 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-set
150 05:47:08.692803 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-test-shell
151 05:47:08.692919 Updating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-install-packages (oe)
152 05:47:08.693251 Updating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/bin/lava-installed-packages (oe)
153 05:47:08.693353 Creating /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/environment
154 05:47:08.693442 LAVA metadata
155 05:47:08.693510 - LAVA_JOB_ID=7096699
156 05:47:08.693574 - LAVA_DISPATCHER_IP=192.168.201.1
157 05:47:08.693674 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 05:47:08.693739 skipped lava-vland-overlay
159 05:47:08.693816 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 05:47:08.693898 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 05:47:08.693961 skipped lava-multinode-overlay
162 05:47:08.694035 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 05:47:08.694117 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 05:47:08.694188 Loading test definitions
165 05:47:08.694279 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 05:47:08.694354 Using /lava-7096699 at stage 0
167 05:47:08.694633 uuid=7096699_1.5.2.3.1 testdef=None
168 05:47:08.694724 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 05:47:08.694812 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 05:47:08.695279 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 05:47:08.695511 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 05:47:08.696070 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 05:47:08.696306 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 05:47:08.696903 runner path: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/0/tests/0_dmesg test_uuid 7096699_1.5.2.3.1
177 05:47:08.697087 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 05:47:08.697317 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 05:47:08.697392 Using /lava-7096699 at stage 1
181 05:47:08.697631 uuid=7096699_1.5.2.3.5 testdef=None
182 05:47:08.697721 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 05:47:08.697808 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 05:47:08.698243 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 05:47:08.698556 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 05:47:08.699135 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 05:47:08.699370 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 05:47:08.699913 runner path: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/1/tests/1_bootrr test_uuid 7096699_1.5.2.3.5
191 05:47:08.700053 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 05:47:08.700264 Creating lava-test-runner.conf files
194 05:47:08.700329 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/0 for stage 0
195 05:47:08.700410 - 0_dmesg
196 05:47:08.700485 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096699/lava-overlay-9efwdwdi/lava-7096699/1 for stage 1
197 05:47:08.700567 - 1_bootrr
198 05:47:08.700658 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 05:47:08.700743 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 05:47:08.706279 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 05:47:08.706383 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 05:47:08.706471 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 05:47:08.706558 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 05:47:08.706644 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 05:47:08.807461 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 05:47:08.807799 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
207 05:47:08.807917 extracting modules file /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096699/extract-nfsrootfs-lbh5pica
208 05:47:08.812086 extracting modules file /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096699/extract-overlay-ramdisk-3lv9axjv/ramdisk
209 05:47:08.815921 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 05:47:08.816038 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
211 05:47:08.816126 [common] Applying overlay to NFS
212 05:47:08.816227 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096699/compress-overlay-f7uqgtle/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096699/extract-nfsrootfs-lbh5pica
213 05:47:08.820158 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 05:47:08.820265 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
215 05:47:08.820356 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 05:47:08.820449 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
217 05:47:08.820526 Building ramdisk /var/lib/lava/dispatcher/tmp/7096699/extract-overlay-ramdisk-3lv9axjv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096699/extract-overlay-ramdisk-3lv9axjv/ramdisk
218 05:47:08.853495 >> 24662 blocks
219 05:47:09.334062 rename /var/lib/lava/dispatcher/tmp/7096699/extract-overlay-ramdisk-3lv9axjv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
220 05:47:09.334460 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 05:47:09.334581 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 05:47:09.334692 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 05:47:09.334792 No mkimage arch provided, not using FIT.
224 05:47:09.334881 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 05:47:09.334964 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 05:47:09.335062 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 05:47:09.335154 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 05:47:09.335232 No LXC device requested
229 05:47:09.335314 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 05:47:09.335402 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 05:47:09.335481 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 05:47:09.335550 Checking files for TFTP limit of 4294967296 bytes.
233 05:47:09.335935 end: 1 tftp-deploy (duration 00:00:09) [common]
234 05:47:09.336038 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 05:47:09.336133 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 05:47:09.336261 substitutions:
237 05:47:09.336334 - {DTB}: None
238 05:47:09.336405 - {INITRD}: 7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
239 05:47:09.336469 - {KERNEL}: 7096699/tftp-deploy-kojfrv4q/kernel/bzImage
240 05:47:09.336530 - {LAVA_MAC}: None
241 05:47:09.336589 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096699/extract-nfsrootfs-lbh5pica
242 05:47:09.336649 - {NFS_SERVER_IP}: 192.168.201.1
243 05:47:09.336706 - {PRESEED_CONFIG}: None
244 05:47:09.336762 - {PRESEED_LOCAL}: None
245 05:47:09.336817 - {RAMDISK}: 7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
246 05:47:09.336873 - {ROOT_PART}: None
247 05:47:09.336928 - {ROOT}: None
248 05:47:09.337024 - {SERVER_IP}: 192.168.201.1
249 05:47:09.337079 - {TEE}: None
250 05:47:09.337134 Parsed boot commands:
251 05:47:09.337188 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 05:47:09.337341 Parsed boot commands: tftpboot 192.168.201.1 7096699/tftp-deploy-kojfrv4q/kernel/bzImage 7096699/tftp-deploy-kojfrv4q/kernel/cmdline 7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
253 05:47:09.337433 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 05:47:09.337523 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 05:47:09.337616 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 05:47:09.337706 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 05:47:09.337783 Not connected, no need to disconnect.
258 05:47:09.337864 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 05:47:09.337952 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 05:47:09.338026 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
261 05:47:09.340723 Setting prompt string to ['lava-test: # ']
262 05:47:09.341024 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 05:47:09.341185 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 05:47:09.341284 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 05:47:09.341378 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 05:47:09.341558 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
267 05:47:09.360590 >> Command sent successfully.
268 05:47:09.362433 Returned 0 in 0 seconds
269 05:47:09.463725 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 05:47:09.465229 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 05:47:09.465733 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 05:47:09.466169 Setting prompt string to 'Starting depthcharge on Helios...'
274 05:47:09.466511 Changing prompt to 'Starting depthcharge on Helios...'
275 05:47:09.466892 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 05:47:09.468122 [Enter `^Ec?' for help]
277 05:47:16.001151
278 05:47:16.001794
279 05:47:16.010697 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 05:47:16.014284 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 05:47:16.020816 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 05:47:16.023945 CPU: AES supported, TXT NOT supported, VT supported
283 05:47:16.030896 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 05:47:16.034284 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 05:47:16.040828 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 05:47:16.043969 VBOOT: Loading verstage.
287 05:47:16.046879 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 05:47:16.053683 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 05:47:16.060295 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 05:47:16.060881 CBFS @ c08000 size 3f8000
291 05:47:16.067228 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 05:47:16.070107 CBFS: Locating 'fallback/verstage'
293 05:47:16.073902 CBFS: Found @ offset 10fb80 size 1072c
294 05:47:16.078028
295 05:47:16.078513
296 05:47:16.088216 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 05:47:16.102094 Probing TPM: . done!
298 05:47:16.105222 TPM ready after 0 ms
299 05:47:16.108853 Connected to device vid:did:rid of 1ae0:0028:00
300 05:47:16.119085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
301 05:47:16.122559 Initialized TPM device CR50 revision 0
302 05:47:16.157913 tlcl_send_startup: Startup return code is 0
303 05:47:16.158491 TPM: setup succeeded
304 05:47:16.170510 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 05:47:16.174355 Chrome EC: UHEPI supported
306 05:47:16.177834 Phase 1
307 05:47:16.181340 FMAP: area GBB found @ c05000 (12288 bytes)
308 05:47:16.187541 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 05:47:16.191018 Phase 2
310 05:47:16.191613 Phase 3
311 05:47:16.194055 FMAP: area GBB found @ c05000 (12288 bytes)
312 05:47:16.200801 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 05:47:16.207630 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 05:47:16.211280 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 05:47:16.217448 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 05:47:16.233630 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 05:47:16.236317 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 05:47:16.243032 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 05:47:16.247225 Phase 4
320 05:47:16.250598 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 05:47:16.257503 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 05:47:16.436686 VB2:vb2_rsa_verify_digest() Digest check failed!
323 05:47:16.443355 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 05:47:16.443926 Saving nvdata
325 05:47:16.446813 Reboot requested (10020007)
326 05:47:16.449946 board_reset() called!
327 05:47:16.450425 full_reset() called!
328 05:47:20.983815
329 05:47:20.984421
330 05:47:20.984805 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 05:47:20.985641 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 05:47:20.987132 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 05:47:20.991080 CPU: AES supported, TXT NOT supported, VT supported
334 05:47:20.998396 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 05:47:21.002081 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 05:47:21.006041 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 05:47:21.010657 VBOOT: Loading verstage.
338 05:47:21.013948 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 05:47:21.020714 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 05:47:21.024859 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 05:47:21.028360 CBFS @ c08000 size 3f8000
342 05:47:21.036268 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 05:47:21.040098 CBFS: Locating 'fallback/verstage'
344 05:47:21.043549 CBFS: Found @ offset 10fb80 size 1072c
345 05:47:21.044030
346 05:47:21.044406
347 05:47:21.055221 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 05:47:21.070023 Probing TPM: . done!
349 05:47:21.070619 TPM ready after 0 ms
350 05:47:21.077972 Connected to device vid:did:rid of 1ae0:0028:00
351 05:47:21.085381 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
352 05:47:21.089064 Initialized TPM device CR50 revision 0
353 05:47:21.131889 tlcl_send_startup: Startup return code is 0
354 05:47:21.132441 TPM: setup succeeded
355 05:47:21.145003 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 05:47:21.148911 Chrome EC: UHEPI supported
357 05:47:21.152223 Phase 1
358 05:47:21.155632 FMAP: area GBB found @ c05000 (12288 bytes)
359 05:47:21.162351 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 05:47:21.168755 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 05:47:21.172515 Recovery requested (1009000e)
362 05:47:21.177648 Saving nvdata
363 05:47:21.183784 tlcl_extend: response is 0
364 05:47:21.192630 tlcl_extend: response is 0
365 05:47:21.199814 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 05:47:21.202784 CBFS @ c08000 size 3f8000
367 05:47:21.209684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 05:47:21.213411 CBFS: Locating 'fallback/romstage'
369 05:47:21.216592 CBFS: Found @ offset 80 size 145fc
370 05:47:21.219698 Accumulated console time in verstage 98 ms
371 05:47:21.220300
372 05:47:21.220688
373 05:47:21.232743 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 05:47:21.239500 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 05:47:21.242708 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 05:47:21.246385 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 05:47:21.252788 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 05:47:21.257040 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 05:47:21.259791 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
380 05:47:21.263019 TCO_STS: 0000 0000
381 05:47:21.266627 GEN_PMCON: e0015238 00000200
382 05:47:21.269815 GBLRST_CAUSE: 00000000 00000000
383 05:47:21.270385 prev_sleep_state 5
384 05:47:21.272364 Boot Count incremented to 36562
385 05:47:21.279605 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 05:47:21.282662 CBFS @ c08000 size 3f8000
387 05:47:21.289181 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 05:47:21.289807 CBFS: Locating 'fspm.bin'
389 05:47:21.292593 CBFS: Found @ offset 5ffc0 size 71000
390 05:47:21.296791 Chrome EC: UHEPI supported
391 05:47:21.304173 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 05:47:21.309253 Probing TPM: done!
393 05:47:21.316411 Connected to device vid:did:rid of 1ae0:0028:00
394 05:47:21.326360 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
395 05:47:21.332882 Initialized TPM device CR50 revision 0
396 05:47:21.340988 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 05:47:21.348176 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 05:47:21.351591 MRC cache found, size 1948
399 05:47:21.354548 bootmode is set to: 2
400 05:47:21.357427 PRMRR disabled by config.
401 05:47:21.357902 SPD INDEX = 1
402 05:47:21.364164 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 05:47:21.367585 CBFS @ c08000 size 3f8000
404 05:47:21.374269 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 05:47:21.375031 CBFS: Locating 'spd.bin'
406 05:47:21.377570 CBFS: Found @ offset 5fb80 size 400
407 05:47:21.380508 SPD: module type is LPDDR3
408 05:47:21.383983 SPD: module part is
409 05:47:21.390557 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 05:47:21.394424 SPD: device width 4 bits, bus width 8 bits
411 05:47:21.397527 SPD: module size is 4096 MB (per channel)
412 05:47:21.400771 memory slot: 0 configuration done.
413 05:47:21.403842 memory slot: 2 configuration done.
414 05:47:21.455591 CBMEM:
415 05:47:21.458713 IMD: root @ 99fff000 254 entries.
416 05:47:21.461854 IMD: root @ 99ffec00 62 entries.
417 05:47:21.465054 External stage cache:
418 05:47:21.468558 IMD: root @ 9abff000 254 entries.
419 05:47:21.472228 IMD: root @ 9abfec00 62 entries.
420 05:47:21.478513 Chrome EC: clear events_b mask to 0x0000000020004000
421 05:47:21.491104 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 05:47:21.504497 tlcl_write: response is 0
423 05:47:21.514087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 05:47:21.520008 MRC: TPM MRC hash updated successfully.
425 05:47:21.520584 2 DIMMs found
426 05:47:21.523597 SMM Memory Map
427 05:47:21.526537 SMRAM : 0x9a000000 0x1000000
428 05:47:21.530264 Subregion 0: 0x9a000000 0xa00000
429 05:47:21.533435 Subregion 1: 0x9aa00000 0x200000
430 05:47:21.536772 Subregion 2: 0x9ac00000 0x400000
431 05:47:21.539984 top_of_ram = 0x9a000000
432 05:47:21.543371 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 05:47:21.550568 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 05:47:21.553680 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 05:47:21.560377 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 05:47:21.563645 CBFS @ c08000 size 3f8000
437 05:47:21.566634 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 05:47:21.570159 CBFS: Locating 'fallback/postcar'
439 05:47:21.573170 CBFS: Found @ offset 107000 size 4b44
440 05:47:21.579700 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 05:47:21.592385 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 05:47:21.595976 Processing 180 relocs. Offset value of 0x97c0c000
443 05:47:21.605285 Accumulated console time in romstage 286 ms
444 05:47:21.605879
445 05:47:21.606270
446 05:47:21.614165 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 05:47:21.621038 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 05:47:21.624348 CBFS @ c08000 size 3f8000
449 05:47:21.627561 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 05:47:21.633902 CBFS: Locating 'fallback/ramstage'
451 05:47:21.637619 CBFS: Found @ offset 43380 size 1b9e8
452 05:47:21.644002 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 05:47:21.676226 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 05:47:21.679250 Processing 3976 relocs. Offset value of 0x98db0000
455 05:47:21.685730 Accumulated console time in postcar 52 ms
456 05:47:21.686301
457 05:47:21.686691
458 05:47:21.695725 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 05:47:21.702303 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 05:47:21.706134 WARNING: RO_VPD is uninitialized or empty.
461 05:47:21.709298 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 05:47:21.716072 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 05:47:21.716679 Normal boot.
464 05:47:21.722101 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 05:47:21.725391 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 05:47:21.729022 CBFS @ c08000 size 3f8000
467 05:47:21.735170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 05:47:21.738638 CBFS: Locating 'cpu_microcode_blob.bin'
469 05:47:21.742522 CBFS: Found @ offset 14700 size 2ec00
470 05:47:21.745386 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 05:47:21.749178 Skip microcode update
472 05:47:21.755363 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 05:47:21.755953 CBFS @ c08000 size 3f8000
474 05:47:21.762205 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 05:47:21.765508 CBFS: Locating 'fsps.bin'
476 05:47:21.768789 CBFS: Found @ offset d1fc0 size 35000
477 05:47:21.794177 Detected 4 core, 8 thread CPU.
478 05:47:21.797324 Setting up SMI for CPU
479 05:47:21.800870 IED base = 0x9ac00000
480 05:47:21.801487 IED size = 0x00400000
481 05:47:21.804009 Will perform SMM setup.
482 05:47:21.810343 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 05:47:21.818214 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 05:47:21.820831 Processing 16 relocs. Offset value of 0x00030000
485 05:47:21.823952 Attempting to start 7 APs
486 05:47:21.827362 Waiting for 10ms after sending INIT.
487 05:47:21.843823 Waiting for 1st SIPI to complete...done.
488 05:47:21.844396 AP: slot 3 apic_id 1.
489 05:47:21.850946 Waiting for 2nd SIPI to complete...done.
490 05:47:21.851535 AP: slot 7 apic_id 7.
491 05:47:21.853668 AP: slot 6 apic_id 6.
492 05:47:21.857214 AP: slot 4 apic_id 4.
493 05:47:21.857800 AP: slot 5 apic_id 5.
494 05:47:21.860629 AP: slot 2 apic_id 2.
495 05:47:21.863871 AP: slot 1 apic_id 3.
496 05:47:21.870492 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 05:47:21.873953 Processing 13 relocs. Offset value of 0x00038000
498 05:47:21.880046 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 05:47:21.886994 Installing SMM handler to 0x9a000000
500 05:47:21.893681 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 05:47:21.897407 Processing 658 relocs. Offset value of 0x9a010000
502 05:47:21.907329 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 05:47:21.909900 Processing 13 relocs. Offset value of 0x9a008000
504 05:47:21.917224 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 05:47:21.923619 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 05:47:21.929637 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 05:47:21.933444 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 05:47:21.940330 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 05:47:21.946833 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 05:47:21.949867 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 05:47:21.956503 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 05:47:21.960236 Clearing SMI status registers
513 05:47:21.963514 SMI_STS: PM1
514 05:47:21.964106 PM1_STS: PWRBTN
515 05:47:21.967189 TCO_STS: SECOND_TO
516 05:47:21.969953 New SMBASE 0x9a000000
517 05:47:21.974612 In relocation handler: CPU 0
518 05:47:21.976815 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 05:47:21.979683 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 05:47:21.983724 Relocation complete.
521 05:47:21.986731 New SMBASE 0x99fff400
522 05:47:21.987215 In relocation handler: CPU 3
523 05:47:21.993031 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
524 05:47:21.996582 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 05:47:22.000039 Relocation complete.
526 05:47:22.002688 New SMBASE 0x99ffe800
527 05:47:22.003171 In relocation handler: CPU 6
528 05:47:22.009556 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
529 05:47:22.012824 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 05:47:22.016805 Relocation complete.
531 05:47:22.017421 New SMBASE 0x99ffe400
532 05:47:22.019764 In relocation handler: CPU 7
533 05:47:22.026796 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
534 05:47:22.029458 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 05:47:22.033153 Relocation complete.
536 05:47:22.033732 New SMBASE 0x99ffec00
537 05:47:22.036116 In relocation handler: CPU 5
538 05:47:22.040278 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
539 05:47:22.046453 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 05:47:22.049731 Relocation complete.
541 05:47:22.050311 New SMBASE 0x99fff000
542 05:47:22.053065 In relocation handler: CPU 4
543 05:47:22.056555 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
544 05:47:22.063558 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 05:47:22.066127 Relocation complete.
546 05:47:22.066604 New SMBASE 0x99fff800
547 05:47:22.069905 In relocation handler: CPU 2
548 05:47:22.072910 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 05:47:22.079535 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 05:47:22.080198 Relocation complete.
551 05:47:22.082407 New SMBASE 0x99fffc00
552 05:47:22.086080 In relocation handler: CPU 1
553 05:47:22.089510 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 05:47:22.096200 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 05:47:22.096777 Relocation complete.
556 05:47:22.099444 Initializing CPU #0
557 05:47:22.102606 CPU: vendor Intel device 806ec
558 05:47:22.106310 CPU: family 06, model 8e, stepping 0c
559 05:47:22.109731 Clearing out pending MCEs
560 05:47:22.112710 Setting up local APIC...
561 05:47:22.113216 apic_id: 0x00 done.
562 05:47:22.116293 Turbo is available but hidden
563 05:47:22.119457 Turbo is available and visible
564 05:47:22.122899 VMX status: enabled
565 05:47:22.125673 IA32_FEATURE_CONTROL status: locked
566 05:47:22.129236 Skip microcode update
567 05:47:22.129714 CPU #0 initialized
568 05:47:22.132311 Initializing CPU #3
569 05:47:22.132793 Initializing CPU #4
570 05:47:22.136057 Initializing CPU #5
571 05:47:22.139707 CPU: vendor Intel device 806ec
572 05:47:22.142104 CPU: family 06, model 8e, stepping 0c
573 05:47:22.146485 CPU: vendor Intel device 806ec
574 05:47:22.149401 CPU: family 06, model 8e, stepping 0c
575 05:47:22.152078 Clearing out pending MCEs
576 05:47:22.155311 CPU: vendor Intel device 806ec
577 05:47:22.159278 CPU: family 06, model 8e, stepping 0c
578 05:47:22.162375 Clearing out pending MCEs
579 05:47:22.166059 Initializing CPU #6
580 05:47:22.166630 Setting up local APIC...
581 05:47:22.169668 CPU: vendor Intel device 806ec
582 05:47:22.172441 CPU: family 06, model 8e, stepping 0c
583 05:47:22.175869 Setting up local APIC...
584 05:47:22.178791 Initializing CPU #1
585 05:47:22.179277 Initializing CPU #2
586 05:47:22.181919 CPU: vendor Intel device 806ec
587 05:47:22.188693 CPU: family 06, model 8e, stepping 0c
588 05:47:22.189295 CPU: vendor Intel device 806ec
589 05:47:22.195444 CPU: family 06, model 8e, stepping 0c
590 05:47:22.196042 Clearing out pending MCEs
591 05:47:22.198406 Clearing out pending MCEs
592 05:47:22.201869 Setting up local APIC...
593 05:47:22.205509 Initializing CPU #7
594 05:47:22.205988 Clearing out pending MCEs
595 05:47:22.208605 CPU: vendor Intel device 806ec
596 05:47:22.212240 CPU: family 06, model 8e, stepping 0c
597 05:47:22.215465 Setting up local APIC...
598 05:47:22.218335 Clearing out pending MCEs
599 05:47:22.221875 apic_id: 0x04 done.
600 05:47:22.222444 Setting up local APIC...
601 05:47:22.225238 apic_id: 0x01 done.
602 05:47:22.228362 Clearing out pending MCEs
603 05:47:22.231706 apic_id: 0x06 done.
604 05:47:22.232197 Setting up local APIC...
605 05:47:22.234693 apic_id: 0x05 done.
606 05:47:22.238835 VMX status: enabled
607 05:47:22.239315 VMX status: enabled
608 05:47:22.241640 IA32_FEATURE_CONTROL status: locked
609 05:47:22.245720 IA32_FEATURE_CONTROL status: locked
610 05:47:22.248368 Skip microcode update
611 05:47:22.251511 Skip microcode update
612 05:47:22.252089 VMX status: enabled
613 05:47:22.255271 CPU #4 initialized
614 05:47:22.257986 CPU #5 initialized
615 05:47:22.258468 apic_id: 0x03 done.
616 05:47:22.261394 Setting up local APIC...
617 05:47:22.264931 apic_id: 0x07 done.
618 05:47:22.265537 VMX status: enabled
619 05:47:22.268110 VMX status: enabled
620 05:47:22.271802 IA32_FEATURE_CONTROL status: locked
621 05:47:22.275072 IA32_FEATURE_CONTROL status: locked
622 05:47:22.278220 Skip microcode update
623 05:47:22.278699 Skip microcode update
624 05:47:22.281327 apic_id: 0x02 done.
625 05:47:22.284366 VMX status: enabled
626 05:47:22.284800 VMX status: enabled
627 05:47:22.287570 IA32_FEATURE_CONTROL status: locked
628 05:47:22.291516 IA32_FEATURE_CONTROL status: locked
629 05:47:22.294662 Skip microcode update
630 05:47:22.297729 Skip microcode update
631 05:47:22.298206 CPU #1 initialized
632 05:47:22.301426 CPU #2 initialized
633 05:47:22.304473 CPU #6 initialized
634 05:47:22.305083 CPU #7 initialized
635 05:47:22.307864 IA32_FEATURE_CONTROL status: locked
636 05:47:22.311377 Skip microcode update
637 05:47:22.314415 CPU #3 initialized
638 05:47:22.317787 bsp_do_flight_plan done after 466 msecs.
639 05:47:22.321184 CPU: frequency set to 4200 MHz
640 05:47:22.321761 Enabling SMIs.
641 05:47:22.324263 Locking SMM.
642 05:47:22.338179 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 05:47:22.341175 CBFS @ c08000 size 3f8000
644 05:47:22.347705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 05:47:22.348286 CBFS: Locating 'vbt.bin'
646 05:47:22.350946 CBFS: Found @ offset 5f5c0 size 499
647 05:47:22.358086 Found a VBT of 4608 bytes after decompression
648 05:47:22.536028 Display FSP Version Info HOB
649 05:47:22.539177 Reference Code - CPU = 9.0.1e.30
650 05:47:22.542267 uCode Version = 0.0.0.ca
651 05:47:22.546190 TXT ACM version = ff.ff.ff.ffff
652 05:47:22.549319 Display FSP Version Info HOB
653 05:47:22.552543 Reference Code - ME = 9.0.1e.30
654 05:47:22.555587 MEBx version = 0.0.0.0
655 05:47:22.559523 ME Firmware Version = Consumer SKU
656 05:47:22.562365 Display FSP Version Info HOB
657 05:47:22.566113 Reference Code - CML PCH = 9.0.1e.30
658 05:47:22.568888 PCH-CRID Status = Disabled
659 05:47:22.573295 PCH-CRID Original Value = ff.ff.ff.ffff
660 05:47:22.575899 PCH-CRID New Value = ff.ff.ff.ffff
661 05:47:22.579285 OPROM - RST - RAID = ff.ff.ff.ffff
662 05:47:22.581993 ChipsetInit Base Version = ff.ff.ff.ffff
663 05:47:22.585565 ChipsetInit Oem Version = ff.ff.ff.ffff
664 05:47:22.589459 Display FSP Version Info HOB
665 05:47:22.595622 Reference Code - SA - System Agent = 9.0.1e.30
666 05:47:22.598818 Reference Code - MRC = 0.7.1.6c
667 05:47:22.599320 SA - PCIe Version = 9.0.1e.30
668 05:47:22.602486 SA-CRID Status = Disabled
669 05:47:22.605782 SA-CRID Original Value = 0.0.0.c
670 05:47:22.608729 SA-CRID New Value = 0.0.0.c
671 05:47:22.612310 OPROM - VBIOS = ff.ff.ff.ffff
672 05:47:22.615942 RTC Init
673 05:47:22.618817 Set power on after power failure.
674 05:47:22.619389 Disabling Deep S3
675 05:47:22.622170 Disabling Deep S3
676 05:47:22.622737 Disabling Deep S4
677 05:47:22.625657 Disabling Deep S4
678 05:47:22.626134 Disabling Deep S5
679 05:47:22.629074 Disabling Deep S5
680 05:47:22.635305 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 189 exit 1
681 05:47:22.635870 Enumerating buses...
682 05:47:22.642353 Show all devs... Before device enumeration.
683 05:47:22.642919 Root Device: enabled 1
684 05:47:22.645031 CPU_CLUSTER: 0: enabled 1
685 05:47:22.648674 DOMAIN: 0000: enabled 1
686 05:47:22.651667 APIC: 00: enabled 1
687 05:47:22.652145 PCI: 00:00.0: enabled 1
688 05:47:22.656008 PCI: 00:02.0: enabled 1
689 05:47:22.659148 PCI: 00:04.0: enabled 0
690 05:47:22.662240 PCI: 00:05.0: enabled 0
691 05:47:22.662817 PCI: 00:12.0: enabled 1
692 05:47:22.665468 PCI: 00:12.5: enabled 0
693 05:47:22.668557 PCI: 00:12.6: enabled 0
694 05:47:22.669157 PCI: 00:14.0: enabled 1
695 05:47:22.672109 PCI: 00:14.1: enabled 0
696 05:47:22.675325 PCI: 00:14.3: enabled 1
697 05:47:22.678435 PCI: 00:14.5: enabled 0
698 05:47:22.678910 PCI: 00:15.0: enabled 1
699 05:47:22.682152 PCI: 00:15.1: enabled 1
700 05:47:22.685172 PCI: 00:15.2: enabled 0
701 05:47:22.688442 PCI: 00:15.3: enabled 0
702 05:47:22.689044 PCI: 00:16.0: enabled 1
703 05:47:22.691963 PCI: 00:16.1: enabled 0
704 05:47:22.695329 PCI: 00:16.2: enabled 0
705 05:47:22.698300 PCI: 00:16.3: enabled 0
706 05:47:22.698820 PCI: 00:16.4: enabled 0
707 05:47:22.701894 PCI: 00:16.5: enabled 0
708 05:47:22.705429 PCI: 00:17.0: enabled 1
709 05:47:22.706015 PCI: 00:19.0: enabled 1
710 05:47:22.708586 PCI: 00:19.1: enabled 0
711 05:47:22.711719 PCI: 00:19.2: enabled 0
712 05:47:22.715012 PCI: 00:1a.0: enabled 0
713 05:47:22.715488 PCI: 00:1c.0: enabled 0
714 05:47:22.718248 PCI: 00:1c.1: enabled 0
715 05:47:22.721775 PCI: 00:1c.2: enabled 0
716 05:47:22.725476 PCI: 00:1c.3: enabled 0
717 05:47:22.726067 PCI: 00:1c.4: enabled 0
718 05:47:22.728995 PCI: 00:1c.5: enabled 0
719 05:47:22.731709 PCI: 00:1c.6: enabled 0
720 05:47:22.734667 PCI: 00:1c.7: enabled 0
721 05:47:22.735149 PCI: 00:1d.0: enabled 1
722 05:47:22.738172 PCI: 00:1d.1: enabled 0
723 05:47:22.741826 PCI: 00:1d.2: enabled 0
724 05:47:22.742412 PCI: 00:1d.3: enabled 0
725 05:47:22.744666 PCI: 00:1d.4: enabled 0
726 05:47:22.748222 PCI: 00:1d.5: enabled 1
727 05:47:22.751609 PCI: 00:1e.0: enabled 1
728 05:47:22.752084 PCI: 00:1e.1: enabled 0
729 05:47:22.754701 PCI: 00:1e.2: enabled 1
730 05:47:22.757883 PCI: 00:1e.3: enabled 1
731 05:47:22.761113 PCI: 00:1f.0: enabled 1
732 05:47:22.761680 PCI: 00:1f.1: enabled 1
733 05:47:22.765205 PCI: 00:1f.2: enabled 1
734 05:47:22.768145 PCI: 00:1f.3: enabled 1
735 05:47:22.771376 PCI: 00:1f.4: enabled 1
736 05:47:22.771944 PCI: 00:1f.5: enabled 1
737 05:47:22.775130 PCI: 00:1f.6: enabled 0
738 05:47:22.777913 USB0 port 0: enabled 1
739 05:47:22.778394 I2C: 00:15: enabled 1
740 05:47:22.782040 I2C: 00:5d: enabled 1
741 05:47:22.784755 GENERIC: 0.0: enabled 1
742 05:47:22.785275 I2C: 00:1a: enabled 1
743 05:47:22.788115 I2C: 00:38: enabled 1
744 05:47:22.791060 I2C: 00:39: enabled 1
745 05:47:22.791556 I2C: 00:3a: enabled 1
746 05:47:22.794767 I2C: 00:3b: enabled 1
747 05:47:22.797574 PCI: 00:00.0: enabled 1
748 05:47:22.798148 SPI: 00: enabled 1
749 05:47:22.800798 SPI: 01: enabled 1
750 05:47:22.804523 PNP: 0c09.0: enabled 1
751 05:47:22.805132 USB2 port 0: enabled 1
752 05:47:22.807606 USB2 port 1: enabled 1
753 05:47:22.811013 USB2 port 2: enabled 0
754 05:47:22.814199 USB2 port 3: enabled 0
755 05:47:22.814676 USB2 port 5: enabled 0
756 05:47:22.818661 USB2 port 6: enabled 1
757 05:47:22.821712 USB2 port 9: enabled 1
758 05:47:22.822286 USB3 port 0: enabled 1
759 05:47:22.824860 USB3 port 1: enabled 1
760 05:47:22.827610 USB3 port 2: enabled 1
761 05:47:22.828321 USB3 port 3: enabled 1
762 05:47:22.830758 USB3 port 4: enabled 0
763 05:47:22.834214 APIC: 03: enabled 1
764 05:47:22.834708 APIC: 02: enabled 1
765 05:47:22.837917 APIC: 01: enabled 1
766 05:47:22.840844 APIC: 04: enabled 1
767 05:47:22.841354 APIC: 05: enabled 1
768 05:47:22.844525 APIC: 06: enabled 1
769 05:47:22.847919 APIC: 07: enabled 1
770 05:47:22.848425 Compare with tree...
771 05:47:22.850982 Root Device: enabled 1
772 05:47:22.854088 CPU_CLUSTER: 0: enabled 1
773 05:47:22.854670 APIC: 00: enabled 1
774 05:47:22.857738 APIC: 03: enabled 1
775 05:47:22.860551 APIC: 02: enabled 1
776 05:47:22.861059 APIC: 01: enabled 1
777 05:47:22.865321 APIC: 04: enabled 1
778 05:47:22.867509 APIC: 05: enabled 1
779 05:47:22.868087 APIC: 06: enabled 1
780 05:47:22.870988 APIC: 07: enabled 1
781 05:47:22.874224 DOMAIN: 0000: enabled 1
782 05:47:22.877501 PCI: 00:00.0: enabled 1
783 05:47:22.877978 PCI: 00:02.0: enabled 1
784 05:47:22.881302 PCI: 00:04.0: enabled 0
785 05:47:22.883975 PCI: 00:05.0: enabled 0
786 05:47:22.886915 PCI: 00:12.0: enabled 1
787 05:47:22.890611 PCI: 00:12.5: enabled 0
788 05:47:22.891086 PCI: 00:12.6: enabled 0
789 05:47:22.894317 PCI: 00:14.0: enabled 1
790 05:47:22.896904 USB0 port 0: enabled 1
791 05:47:22.900781 USB2 port 0: enabled 1
792 05:47:22.903877 USB2 port 1: enabled 1
793 05:47:22.904352 USB2 port 2: enabled 0
794 05:47:22.907096 USB2 port 3: enabled 0
795 05:47:22.910690 USB2 port 5: enabled 0
796 05:47:22.913703 USB2 port 6: enabled 1
797 05:47:22.917514 USB2 port 9: enabled 1
798 05:47:22.920614 USB3 port 0: enabled 1
799 05:47:22.921228 USB3 port 1: enabled 1
800 05:47:22.924102 USB3 port 2: enabled 1
801 05:47:22.926947 USB3 port 3: enabled 1
802 05:47:22.930358 USB3 port 4: enabled 0
803 05:47:22.933623 PCI: 00:14.1: enabled 0
804 05:47:22.934193 PCI: 00:14.3: enabled 1
805 05:47:22.937322 PCI: 00:14.5: enabled 0
806 05:47:22.940030 PCI: 00:15.0: enabled 1
807 05:47:22.943774 I2C: 00:15: enabled 1
808 05:47:22.946962 PCI: 00:15.1: enabled 1
809 05:47:22.947477 I2C: 00:5d: enabled 1
810 05:47:22.950753 GENERIC: 0.0: enabled 1
811 05:47:22.953537 PCI: 00:15.2: enabled 0
812 05:47:22.957136 PCI: 00:15.3: enabled 0
813 05:47:22.960375 PCI: 00:16.0: enabled 1
814 05:47:22.960982 PCI: 00:16.1: enabled 0
815 05:47:22.964064 PCI: 00:16.2: enabled 0
816 05:47:22.966930 PCI: 00:16.3: enabled 0
817 05:47:22.970167 PCI: 00:16.4: enabled 0
818 05:47:22.970745 PCI: 00:16.5: enabled 0
819 05:47:22.973508 PCI: 00:17.0: enabled 1
820 05:47:22.976815 PCI: 00:19.0: enabled 1
821 05:47:22.980831 I2C: 00:1a: enabled 1
822 05:47:22.983579 I2C: 00:38: enabled 1
823 05:47:22.984060 I2C: 00:39: enabled 1
824 05:47:22.986904 I2C: 00:3a: enabled 1
825 05:47:22.990538 I2C: 00:3b: enabled 1
826 05:47:22.993154 PCI: 00:19.1: enabled 0
827 05:47:22.993641 PCI: 00:19.2: enabled 0
828 05:47:22.996567 PCI: 00:1a.0: enabled 0
829 05:47:22.999897 PCI: 00:1c.0: enabled 0
830 05:47:23.003550 PCI: 00:1c.1: enabled 0
831 05:47:23.006904 PCI: 00:1c.2: enabled 0
832 05:47:23.007392 PCI: 00:1c.3: enabled 0
833 05:47:23.009786 PCI: 00:1c.4: enabled 0
834 05:47:23.013073 PCI: 00:1c.5: enabled 0
835 05:47:23.017154 PCI: 00:1c.6: enabled 0
836 05:47:23.020354 PCI: 00:1c.7: enabled 0
837 05:47:23.020941 PCI: 00:1d.0: enabled 1
838 05:47:23.023394 PCI: 00:1d.1: enabled 0
839 05:47:23.027405 PCI: 00:1d.2: enabled 0
840 05:47:23.029995 PCI: 00:1d.3: enabled 0
841 05:47:23.033198 PCI: 00:1d.4: enabled 0
842 05:47:23.033682 PCI: 00:1d.5: enabled 1
843 05:47:23.036928 PCI: 00:00.0: enabled 1
844 05:47:23.040265 PCI: 00:1e.0: enabled 1
845 05:47:23.043426 PCI: 00:1e.1: enabled 0
846 05:47:23.046254 PCI: 00:1e.2: enabled 1
847 05:47:23.046738 SPI: 00: enabled 1
848 05:47:23.049622 PCI: 00:1e.3: enabled 1
849 05:47:23.053351 SPI: 01: enabled 1
850 05:47:23.056445 PCI: 00:1f.0: enabled 1
851 05:47:23.057059 PNP: 0c09.0: enabled 1
852 05:47:23.059912 PCI: 00:1f.1: enabled 1
853 05:47:23.062736 PCI: 00:1f.2: enabled 1
854 05:47:23.066070 PCI: 00:1f.3: enabled 1
855 05:47:23.066555 PCI: 00:1f.4: enabled 1
856 05:47:23.069672 PCI: 00:1f.5: enabled 1
857 05:47:23.073234 PCI: 00:1f.6: enabled 0
858 05:47:23.075859 Root Device scanning...
859 05:47:23.079446 scan_static_bus for Root Device
860 05:47:23.082831 CPU_CLUSTER: 0 enabled
861 05:47:23.083315 DOMAIN: 0000 enabled
862 05:47:23.086083 DOMAIN: 0000 scanning...
863 05:47:23.089711 PCI: pci_scan_bus for bus 00
864 05:47:23.092581 PCI: 00:00.0 [8086/0000] ops
865 05:47:23.096209 PCI: 00:00.0 [8086/9b61] enabled
866 05:47:23.100177 PCI: 00:02.0 [8086/0000] bus ops
867 05:47:23.103435 PCI: 00:02.0 [8086/9b41] enabled
868 05:47:23.106073 PCI: 00:04.0 [8086/1903] disabled
869 05:47:23.109809 PCI: 00:08.0 [8086/1911] enabled
870 05:47:23.113018 PCI: 00:12.0 [8086/02f9] enabled
871 05:47:23.116130 PCI: 00:14.0 [8086/0000] bus ops
872 05:47:23.119635 PCI: 00:14.0 [8086/02ed] enabled
873 05:47:23.122865 PCI: 00:14.2 [8086/02ef] enabled
874 05:47:23.126986 PCI: 00:14.3 [8086/02f0] enabled
875 05:47:23.129538 PCI: 00:15.0 [8086/0000] bus ops
876 05:47:23.132729 PCI: 00:15.0 [8086/02e8] enabled
877 05:47:23.135663 PCI: 00:15.1 [8086/0000] bus ops
878 05:47:23.139356 PCI: 00:15.1 [8086/02e9] enabled
879 05:47:23.142580 PCI: 00:16.0 [8086/0000] ops
880 05:47:23.145547 PCI: 00:16.0 [8086/02e0] enabled
881 05:47:23.149038 PCI: 00:17.0 [8086/0000] ops
882 05:47:23.152513 PCI: 00:17.0 [8086/02d3] enabled
883 05:47:23.155757 PCI: 00:19.0 [8086/0000] bus ops
884 05:47:23.159477 PCI: 00:19.0 [8086/02c5] enabled
885 05:47:23.162493 PCI: 00:1d.0 [8086/0000] bus ops
886 05:47:23.165835 PCI: 00:1d.0 [8086/02b0] enabled
887 05:47:23.169231 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 05:47:23.172882 PCI: 00:1e.0 [8086/0000] ops
889 05:47:23.176009 PCI: 00:1e.0 [8086/02a8] enabled
890 05:47:23.180109 PCI: 00:1e.2 [8086/0000] bus ops
891 05:47:23.182440 PCI: 00:1e.2 [8086/02aa] enabled
892 05:47:23.185481 PCI: 00:1e.3 [8086/0000] bus ops
893 05:47:23.189156 PCI: 00:1e.3 [8086/02ab] enabled
894 05:47:23.192128 PCI: 00:1f.0 [8086/0000] bus ops
895 05:47:23.196278 PCI: 00:1f.0 [8086/0284] enabled
896 05:47:23.202384 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 05:47:23.208776 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 05:47:23.212347 PCI: 00:1f.3 [8086/0000] bus ops
899 05:47:23.216383 PCI: 00:1f.3 [8086/02c8] enabled
900 05:47:23.218929 PCI: 00:1f.4 [8086/0000] bus ops
901 05:47:23.222536 PCI: 00:1f.4 [8086/02a3] enabled
902 05:47:23.225815 PCI: 00:1f.5 [8086/0000] bus ops
903 05:47:23.228685 PCI: 00:1f.5 [8086/02a4] enabled
904 05:47:23.232585 PCI: Leftover static devices:
905 05:47:23.233238 PCI: 00:05.0
906 05:47:23.233637 PCI: 00:12.5
907 05:47:23.235853 PCI: 00:12.6
908 05:47:23.236426 PCI: 00:14.1
909 05:47:23.239677 PCI: 00:14.5
910 05:47:23.240249 PCI: 00:15.2
911 05:47:23.240629 PCI: 00:15.3
912 05:47:23.241939 PCI: 00:16.1
913 05:47:23.242417 PCI: 00:16.2
914 05:47:23.245822 PCI: 00:16.3
915 05:47:23.246299 PCI: 00:16.4
916 05:47:23.248729 PCI: 00:16.5
917 05:47:23.249243 PCI: 00:19.1
918 05:47:23.249664 PCI: 00:19.2
919 05:47:23.252157 PCI: 00:1a.0
920 05:47:23.252748 PCI: 00:1c.0
921 05:47:23.255434 PCI: 00:1c.1
922 05:47:23.255910 PCI: 00:1c.2
923 05:47:23.256289 PCI: 00:1c.3
924 05:47:23.259218 PCI: 00:1c.4
925 05:47:23.259791 PCI: 00:1c.5
926 05:47:23.262043 PCI: 00:1c.6
927 05:47:23.262518 PCI: 00:1c.7
928 05:47:23.262891 PCI: 00:1d.1
929 05:47:23.265461 PCI: 00:1d.2
930 05:47:23.266037 PCI: 00:1d.3
931 05:47:23.268998 PCI: 00:1d.4
932 05:47:23.269481 PCI: 00:1d.5
933 05:47:23.271841 PCI: 00:1e.1
934 05:47:23.272318 PCI: 00:1f.1
935 05:47:23.272692 PCI: 00:1f.2
936 05:47:23.275315 PCI: 00:1f.6
937 05:47:23.278281 PCI: Check your devicetree.cb.
938 05:47:23.278757 PCI: 00:02.0 scanning...
939 05:47:23.285317 scan_generic_bus for PCI: 00:02.0
940 05:47:23.289033 scan_generic_bus for PCI: 00:02.0 done
941 05:47:23.291997 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
942 05:47:23.295525 PCI: 00:14.0 scanning...
943 05:47:23.298850 scan_static_bus for PCI: 00:14.0
944 05:47:23.302219 USB0 port 0 enabled
945 05:47:23.305331 USB0 port 0 scanning...
946 05:47:23.309156 scan_static_bus for USB0 port 0
947 05:47:23.309742 USB2 port 0 enabled
948 05:47:23.311974 USB2 port 1 enabled
949 05:47:23.314939 USB2 port 2 disabled
950 05:47:23.315422 USB2 port 3 disabled
951 05:47:23.318586 USB2 port 5 disabled
952 05:47:23.319068 USB2 port 6 enabled
953 05:47:23.321885 USB2 port 9 enabled
954 05:47:23.324805 USB3 port 0 enabled
955 05:47:23.325320 USB3 port 1 enabled
956 05:47:23.329084 USB3 port 2 enabled
957 05:47:23.331720 USB3 port 3 enabled
958 05:47:23.332300 USB3 port 4 disabled
959 05:47:23.335323 USB2 port 0 scanning...
960 05:47:23.338152 scan_static_bus for USB2 port 0
961 05:47:23.341633 scan_static_bus for USB2 port 0 done
962 05:47:23.348218 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
963 05:47:23.348879 USB2 port 1 scanning...
964 05:47:23.351882 scan_static_bus for USB2 port 1
965 05:47:23.359139 scan_static_bus for USB2 port 1 done
966 05:47:23.361942 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
967 05:47:23.365442 USB2 port 6 scanning...
968 05:47:23.368329 scan_static_bus for USB2 port 6
969 05:47:23.371906 scan_static_bus for USB2 port 6 done
970 05:47:23.378350 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
971 05:47:23.378935 USB2 port 9 scanning...
972 05:47:23.382820 scan_static_bus for USB2 port 9
973 05:47:23.388751 scan_static_bus for USB2 port 9 done
974 05:47:23.392168 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
975 05:47:23.395355 USB3 port 0 scanning...
976 05:47:23.399459 scan_static_bus for USB3 port 0
977 05:47:23.401687 scan_static_bus for USB3 port 0 done
978 05:47:23.408591 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
979 05:47:23.409208 USB3 port 1 scanning...
980 05:47:23.411546 scan_static_bus for USB3 port 1
981 05:47:23.418799 scan_static_bus for USB3 port 1 done
982 05:47:23.422035 scan_bus: scanning of bus USB3 port 1 took 9712 usecs
983 05:47:23.425291 USB3 port 2 scanning...
984 05:47:23.428570 scan_static_bus for USB3 port 2
985 05:47:23.432234 scan_static_bus for USB3 port 2 done
986 05:47:23.438488 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
987 05:47:23.439082 USB3 port 3 scanning...
988 05:47:23.442796 scan_static_bus for USB3 port 3
989 05:47:23.448271 scan_static_bus for USB3 port 3 done
990 05:47:23.451918 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
991 05:47:23.455326 scan_static_bus for USB0 port 0 done
992 05:47:23.462111 scan_bus: scanning of bus USB0 port 0 took 155395 usecs
993 05:47:23.465503 scan_static_bus for PCI: 00:14.0 done
994 05:47:23.471902 scan_bus: scanning of bus PCI: 00:14.0 took 173019 usecs
995 05:47:23.475120 PCI: 00:15.0 scanning...
996 05:47:23.478658 scan_generic_bus for PCI: 00:15.0
997 05:47:23.481385 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 05:47:23.484797 scan_generic_bus for PCI: 00:15.0 done
999 05:47:23.491641 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1000 05:47:23.495206 PCI: 00:15.1 scanning...
1001 05:47:23.499291 scan_generic_bus for PCI: 00:15.1
1002 05:47:23.501783 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 05:47:23.505027 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 05:47:23.507782 scan_generic_bus for PCI: 00:15.1 done
1005 05:47:23.514978 scan_bus: scanning of bus PCI: 00:15.1 took 18671 usecs
1006 05:47:23.518532 PCI: 00:19.0 scanning...
1007 05:47:23.521473 scan_generic_bus for PCI: 00:19.0
1008 05:47:23.524934 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 05:47:23.528216 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 05:47:23.534946 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 05:47:23.537899 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 05:47:23.541493 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 05:47:23.544938 scan_generic_bus for PCI: 00:19.0 done
1014 05:47:23.551250 scan_bus: scanning of bus PCI: 00:19.0 took 30744 usecs
1015 05:47:23.554635 PCI: 00:1d.0 scanning...
1016 05:47:23.557843 do_pci_scan_bridge for PCI: 00:1d.0
1017 05:47:23.561022 PCI: pci_scan_bus for bus 01
1018 05:47:23.564848 PCI: 01:00.0 [1c5c/1327] enabled
1019 05:47:23.567801 Enabling Common Clock Configuration
1020 05:47:23.570985 L1 Sub-State supported from root port 29
1021 05:47:23.574075 L1 Sub-State Support = 0xf
1022 05:47:23.577914 CommonModeRestoreTime = 0x28
1023 05:47:23.581120 Power On Value = 0x16, Power On Scale = 0x0
1024 05:47:23.584675 ASPM: Enabled L1
1025 05:47:23.587980 scan_bus: scanning of bus PCI: 00:1d.0 took 32795 usecs
1026 05:47:23.590775 PCI: 00:1e.2 scanning...
1027 05:47:23.594493 scan_generic_bus for PCI: 00:1e.2
1028 05:47:23.601382 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 05:47:23.604614 scan_generic_bus for PCI: 00:1e.2 done
1030 05:47:23.607600 scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs
1031 05:47:23.611110 PCI: 00:1e.3 scanning...
1032 05:47:23.615047 scan_generic_bus for PCI: 00:1e.3
1033 05:47:23.618073 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 05:47:23.624591 scan_generic_bus for PCI: 00:1e.3 done
1035 05:47:23.627490 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1036 05:47:23.630655 PCI: 00:1f.0 scanning...
1037 05:47:23.634126 scan_static_bus for PCI: 00:1f.0
1038 05:47:23.637617 PNP: 0c09.0 enabled
1039 05:47:23.641495 scan_static_bus for PCI: 00:1f.0 done
1040 05:47:23.647276 scan_bus: scanning of bus PCI: 00:1f.0 took 12038 usecs
1041 05:47:23.647855 PCI: 00:1f.3 scanning...
1042 05:47:23.654198 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1043 05:47:23.657114 PCI: 00:1f.4 scanning...
1044 05:47:23.660631 scan_generic_bus for PCI: 00:1f.4
1045 05:47:23.664250 scan_generic_bus for PCI: 00:1f.4 done
1046 05:47:23.670411 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1047 05:47:23.673829 PCI: 00:1f.5 scanning...
1048 05:47:23.677013 scan_generic_bus for PCI: 00:1f.5
1049 05:47:23.680762 scan_generic_bus for PCI: 00:1f.5 done
1050 05:47:23.686859 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1051 05:47:23.690473 scan_bus: scanning of bus DOMAIN: 0000 took 605185 usecs
1052 05:47:23.694560 scan_static_bus for Root Device done
1053 05:47:23.700627 scan_bus: scanning of bus Root Device took 625067 usecs
1054 05:47:23.701239 done
1055 05:47:23.703433 Chrome EC: UHEPI supported
1056 05:47:23.710960 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 05:47:23.717273 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 05:47:23.723559 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 05:47:23.730346 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 05:47:23.733577 SPI flash protection: WPSW=0 SRP0=0
1061 05:47:23.736777 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 05:47:23.744127 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1063 05:47:23.746911 found VGA at PCI: 00:02.0
1064 05:47:23.750272 Setting up VGA for PCI: 00:02.0
1065 05:47:23.753253 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 05:47:23.760040 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 05:47:23.763265 Allocating resources...
1068 05:47:23.763738 Reading resources...
1069 05:47:23.766500 Root Device read_resources bus 0 link: 0
1070 05:47:23.773644 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 05:47:23.776546 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 05:47:23.783819 DOMAIN: 0000 read_resources bus 0 link: 0
1073 05:47:23.786770 PCI: 00:14.0 read_resources bus 0 link: 0
1074 05:47:23.793481 USB0 port 0 read_resources bus 0 link: 0
1075 05:47:23.800624 USB0 port 0 read_resources bus 0 link: 0 done
1076 05:47:23.803569 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 05:47:23.811866 PCI: 00:15.0 read_resources bus 1 link: 0
1078 05:47:23.814536 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 05:47:23.821325 PCI: 00:15.1 read_resources bus 2 link: 0
1080 05:47:23.825215 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 05:47:23.832081 PCI: 00:19.0 read_resources bus 3 link: 0
1082 05:47:23.838838 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 05:47:23.841752 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 05:47:23.848285 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 05:47:23.851921 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 05:47:23.858903 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 05:47:23.861863 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 05:47:23.868096 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 05:47:23.871326 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 05:47:23.878076 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 05:47:23.884701 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 05:47:23.888393 Root Device read_resources bus 0 link: 0 done
1093 05:47:23.891370 Done reading resources.
1094 05:47:23.897882 Show resources in subtree (Root Device)...After reading.
1095 05:47:23.901492 Root Device child on link 0 CPU_CLUSTER: 0
1096 05:47:23.904449 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 05:47:23.908324 APIC: 00
1098 05:47:23.908974 APIC: 03
1099 05:47:23.909364 APIC: 02
1100 05:47:23.911333 APIC: 01
1101 05:47:23.911954 APIC: 04
1102 05:47:23.912337 APIC: 05
1103 05:47:23.914720 APIC: 06
1104 05:47:23.915293 APIC: 07
1105 05:47:23.921816 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 05:47:23.928137 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 05:47:23.937887 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 05:47:23.941401 PCI: 00:00.0
1109 05:47:23.951695 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 05:47:23.958137 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 05:47:24.007423 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 05:47:24.008370 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 05:47:24.009211 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 05:47:24.009619 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 05:47:24.010334 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 05:47:24.057495 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 05:47:24.058494 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 05:47:24.058990 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 05:47:24.059869 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 05:47:24.060271 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 05:47:24.106851 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 05:47:24.107847 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 05:47:24.108649 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 05:47:24.109137 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 05:47:24.109521 PCI: 00:02.0
1126 05:47:24.109863 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 05:47:24.156990 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 05:47:24.157587 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 05:47:24.158373 PCI: 00:04.0
1130 05:47:24.158775 PCI: 00:08.0
1131 05:47:24.159126 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 05:47:24.159525 PCI: 00:12.0
1133 05:47:24.160231 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 05:47:24.160598 PCI: 00:14.0 child on link 0 USB0 port 0
1135 05:47:24.173006 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 05:47:24.173577 USB0 port 0 child on link 0 USB2 port 0
1137 05:47:24.173961 USB2 port 0
1138 05:47:24.174315 USB2 port 1
1139 05:47:24.174651 USB2 port 2
1140 05:47:24.176316 USB2 port 3
1141 05:47:24.176788 USB2 port 5
1142 05:47:24.177206 USB2 port 6
1143 05:47:24.177582 USB2 port 9
1144 05:47:24.180213 USB3 port 0
1145 05:47:24.180783 USB3 port 1
1146 05:47:24.182774 USB3 port 2
1147 05:47:24.183247 USB3 port 3
1148 05:47:24.186140 USB3 port 4
1149 05:47:24.186615 PCI: 00:14.2
1150 05:47:24.196090 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 05:47:24.207121 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 05:47:24.209369 PCI: 00:14.3
1153 05:47:24.219661 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 05:47:24.223390 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 05:47:24.233173 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 05:47:24.233756 I2C: 01:15
1157 05:47:24.239404 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 05:47:24.249561 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 05:47:24.250166 I2C: 02:5d
1160 05:47:24.252809 GENERIC: 0.0
1161 05:47:24.253435 PCI: 00:16.0
1162 05:47:24.262976 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 05:47:24.265691 PCI: 00:17.0
1164 05:47:24.275685 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 05:47:24.282571 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 05:47:24.292170 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 05:47:24.298870 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 05:47:24.309362 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 05:47:24.315507 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 05:47:24.321893 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 05:47:24.332187 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 05:47:24.332778 I2C: 03:1a
1173 05:47:24.335743 I2C: 03:38
1174 05:47:24.336338 I2C: 03:39
1175 05:47:24.338863 I2C: 03:3a
1176 05:47:24.339446 I2C: 03:3b
1177 05:47:24.342421 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 05:47:24.352511 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 05:47:24.362174 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 05:47:24.371862 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 05:47:24.372451 PCI: 01:00.0
1182 05:47:24.381755 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 05:47:24.385383 PCI: 00:1e.0
1184 05:47:24.394848 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 05:47:24.404877 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 05:47:24.408468 PCI: 00:1e.2 child on link 0 SPI: 00
1187 05:47:24.418425 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 05:47:24.421580 SPI: 00
1189 05:47:24.425301 PCI: 00:1e.3 child on link 0 SPI: 01
1190 05:47:24.435545 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 05:47:24.436138 SPI: 01
1192 05:47:24.441681 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 05:47:24.447781 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 05:47:24.458469 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 05:47:24.459061 PNP: 0c09.0
1196 05:47:24.467864 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 05:47:24.471561 PCI: 00:1f.3
1198 05:47:24.481527 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 05:47:24.491089 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 05:47:24.491590 PCI: 00:1f.4
1201 05:47:24.500608 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 05:47:24.510905 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 05:47:24.511394 PCI: 00:1f.5
1204 05:47:24.521354 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 05:47:24.528170 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 05:47:24.534302 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 05:47:24.540669 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 05:47:24.544260 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 05:47:24.547104 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 05:47:24.550529 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 05:47:24.554318 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 05:47:24.560864 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 05:47:24.567464 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 05:47:24.577339 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 05:47:24.584344 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 05:47:24.590336 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 05:47:24.596758 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 05:47:24.604395 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 05:47:24.606903 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 05:47:24.613816 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 05:47:24.616913 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 05:47:24.623833 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 05:47:24.626936 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 05:47:24.633549 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 05:47:24.636381 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 05:47:24.643688 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 05:47:24.646763 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 05:47:24.653335 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 05:47:24.656634 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 05:47:24.663665 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 05:47:24.666784 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 05:47:24.672990 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 05:47:24.676398 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 05:47:24.680629 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 05:47:24.686379 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 05:47:24.689890 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 05:47:24.695901 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 05:47:24.699099 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 05:47:24.706269 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 05:47:24.709484 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 05:47:24.716254 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 05:47:24.722899 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 05:47:24.726961 avoid_fixed_resources: DOMAIN: 0000
1244 05:47:24.732778 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 05:47:24.739513 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 05:47:24.745843 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 05:47:24.756455 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 05:47:24.762509 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 05:47:24.769906 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 05:47:24.779365 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 05:47:24.785552 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 05:47:24.791991 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 05:47:24.799620 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 05:47:24.808715 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 05:47:24.815503 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 05:47:24.816080 Setting resources...
1257 05:47:24.822412 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 05:47:24.829207 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 05:47:24.832869 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 05:47:24.835544 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 05:47:24.839440 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 05:47:24.845947 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 05:47:24.852125 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 05:47:24.859447 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 05:47:24.865548 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 05:47:24.872505 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 05:47:24.875921 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 05:47:24.882093 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 05:47:24.885384 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 05:47:24.891621 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 05:47:24.895594 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 05:47:24.898942 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 05:47:24.905335 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 05:47:24.908635 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 05:47:24.915229 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 05:47:24.918672 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 05:47:24.925499 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 05:47:24.928466 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 05:47:24.935138 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 05:47:24.938569 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 05:47:24.945847 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 05:47:24.948317 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 05:47:24.955065 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 05:47:24.958048 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 05:47:24.964896 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 05:47:24.968183 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 05:47:24.974943 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 05:47:24.978258 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 05:47:24.985077 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 05:47:24.991497 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 05:47:25.000981 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 05:47:25.008016 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 05:47:25.010981 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 05:47:25.021385 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 05:47:25.025050 Root Device assign_resources, bus 0 link: 0
1296 05:47:25.028317 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 05:47:25.038350 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 05:47:25.044789 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 05:47:25.054576 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 05:47:25.062670 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 05:47:25.072103 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 05:47:25.077888 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 05:47:25.084325 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 05:47:25.087596 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 05:47:25.098065 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 05:47:25.104469 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 05:47:25.110693 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 05:47:25.121154 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 05:47:25.124557 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 05:47:25.131271 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 05:47:25.137848 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 05:47:25.144583 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 05:47:25.147580 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 05:47:25.157454 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 05:47:25.164269 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 05:47:25.170832 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 05:47:25.180743 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 05:47:25.187278 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 05:47:25.194601 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 05:47:25.203619 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 05:47:25.209816 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 05:47:25.216934 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 05:47:25.220332 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 05:47:25.229983 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 05:47:25.236913 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 05:47:25.247173 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 05:47:25.250435 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 05:47:25.259827 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 05:47:25.263029 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 05:47:25.273518 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 05:47:25.279686 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 05:47:25.286912 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 05:47:25.289735 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 05:47:25.295927 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 05:47:25.302844 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 05:47:25.305835 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 05:47:25.312961 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 05:47:25.315859 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 05:47:25.322387 LPC: Trying to open IO window from 800 size 1ff
1340 05:47:25.329336 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 05:47:25.339071 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 05:47:25.345714 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 05:47:25.355540 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 05:47:25.358363 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 05:47:25.365268 Root Device assign_resources, bus 0 link: 0
1346 05:47:25.365837 Done setting resources.
1347 05:47:25.372875 Show resources in subtree (Root Device)...After assigning values.
1348 05:47:25.379232 Root Device child on link 0 CPU_CLUSTER: 0
1349 05:47:25.382182 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 05:47:25.382748 APIC: 00
1351 05:47:25.385644 APIC: 03
1352 05:47:25.386110 APIC: 02
1353 05:47:25.386480 APIC: 01
1354 05:47:25.388909 APIC: 04
1355 05:47:25.389499 APIC: 05
1356 05:47:25.391941 APIC: 06
1357 05:47:25.392509 APIC: 07
1358 05:47:25.395754 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 05:47:25.406308 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 05:47:25.414990 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 05:47:25.418908 PCI: 00:00.0
1362 05:47:25.428414 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 05:47:25.438713 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 05:47:25.449231 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 05:47:25.455456 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 05:47:25.464562 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 05:47:25.474728 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 05:47:25.484875 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 05:47:25.494647 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 05:47:25.504335 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 05:47:25.510923 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 05:47:25.520768 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 05:47:25.530506 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 05:47:25.540932 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 05:47:25.551406 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 05:47:25.560766 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 05:47:25.567451 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 05:47:25.570734 PCI: 00:02.0
1379 05:47:25.580135 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 05:47:25.590514 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 05:47:25.599886 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 05:47:25.603238 PCI: 00:04.0
1383 05:47:25.603731 PCI: 00:08.0
1384 05:47:25.613602 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 05:47:25.616277 PCI: 00:12.0
1386 05:47:25.626546 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 05:47:25.629603 PCI: 00:14.0 child on link 0 USB0 port 0
1388 05:47:25.639844 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 05:47:25.646289 USB0 port 0 child on link 0 USB2 port 0
1390 05:47:25.646862 USB2 port 0
1391 05:47:25.649384 USB2 port 1
1392 05:47:25.649861 USB2 port 2
1393 05:47:25.653247 USB2 port 3
1394 05:47:25.653844 USB2 port 5
1395 05:47:25.656404 USB2 port 6
1396 05:47:25.657000 USB2 port 9
1397 05:47:25.659623 USB3 port 0
1398 05:47:25.660235 USB3 port 1
1399 05:47:25.663065 USB3 port 2
1400 05:47:25.666465 USB3 port 3
1401 05:47:25.667044 USB3 port 4
1402 05:47:25.669659 PCI: 00:14.2
1403 05:47:25.680195 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 05:47:25.689520 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 05:47:25.690105 PCI: 00:14.3
1406 05:47:25.699581 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 05:47:25.705697 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 05:47:25.716062 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 05:47:25.716653 I2C: 01:15
1410 05:47:25.722312 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 05:47:25.732894 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 05:47:25.733511 I2C: 02:5d
1413 05:47:25.735746 GENERIC: 0.0
1414 05:47:25.736222 PCI: 00:16.0
1415 05:47:25.745849 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 05:47:25.748989 PCI: 00:17.0
1417 05:47:25.758877 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 05:47:25.769040 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 05:47:25.778745 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 05:47:25.785506 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 05:47:25.795448 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 05:47:25.805071 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 05:47:25.812071 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 05:47:25.821460 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 05:47:25.822026 I2C: 03:1a
1426 05:47:25.824723 I2C: 03:38
1427 05:47:25.825228 I2C: 03:39
1428 05:47:25.828560 I2C: 03:3a
1429 05:47:25.829217 I2C: 03:3b
1430 05:47:25.831434 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 05:47:25.841684 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 05:47:25.851449 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 05:47:25.861149 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 05:47:25.864872 PCI: 01:00.0
1435 05:47:25.875048 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 05:47:25.878173 PCI: 00:1e.0
1437 05:47:25.887720 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 05:47:25.898272 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 05:47:25.901425 PCI: 00:1e.2 child on link 0 SPI: 00
1440 05:47:25.910814 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 05:47:25.914540 SPI: 00
1442 05:47:25.917632 PCI: 00:1e.3 child on link 0 SPI: 01
1443 05:47:25.927887 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 05:47:25.930645 SPI: 01
1445 05:47:25.935010 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 05:47:25.940589 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 05:47:25.951282 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 05:47:25.954015 PNP: 0c09.0
1449 05:47:25.960856 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 05:47:25.964072 PCI: 00:1f.3
1451 05:47:25.973909 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 05:47:25.984350 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 05:47:25.987439 PCI: 00:1f.4
1454 05:47:25.994560 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 05:47:26.003663 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 05:47:26.006969 PCI: 00:1f.5
1457 05:47:26.016673 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 05:47:26.020233 Done allocating resources.
1459 05:47:26.026662 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 05:47:26.027226 Enabling resources...
1461 05:47:26.033543 PCI: 00:00.0 subsystem <- 8086/9b61
1462 05:47:26.034020 PCI: 00:00.0 cmd <- 06
1463 05:47:26.037642 PCI: 00:02.0 subsystem <- 8086/9b41
1464 05:47:26.040467 PCI: 00:02.0 cmd <- 03
1465 05:47:26.043684 PCI: 00:08.0 cmd <- 06
1466 05:47:26.047040 PCI: 00:12.0 subsystem <- 8086/02f9
1467 05:47:26.051114 PCI: 00:12.0 cmd <- 02
1468 05:47:26.053745 PCI: 00:14.0 subsystem <- 8086/02ed
1469 05:47:26.057185 PCI: 00:14.0 cmd <- 02
1470 05:47:26.060301 PCI: 00:14.2 cmd <- 02
1471 05:47:26.064069 PCI: 00:14.3 subsystem <- 8086/02f0
1472 05:47:26.064645 PCI: 00:14.3 cmd <- 02
1473 05:47:26.070654 PCI: 00:15.0 subsystem <- 8086/02e8
1474 05:47:26.071230 PCI: 00:15.0 cmd <- 02
1475 05:47:26.073892 PCI: 00:15.1 subsystem <- 8086/02e9
1476 05:47:26.077220 PCI: 00:15.1 cmd <- 02
1477 05:47:26.080366 PCI: 00:16.0 subsystem <- 8086/02e0
1478 05:47:26.083984 PCI: 00:16.0 cmd <- 02
1479 05:47:26.087404 PCI: 00:17.0 subsystem <- 8086/02d3
1480 05:47:26.090407 PCI: 00:17.0 cmd <- 03
1481 05:47:26.093585 PCI: 00:19.0 subsystem <- 8086/02c5
1482 05:47:26.096853 PCI: 00:19.0 cmd <- 02
1483 05:47:26.099931 PCI: 00:1d.0 bridge ctrl <- 0013
1484 05:47:26.103947 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 05:47:26.106518 PCI: 00:1d.0 cmd <- 06
1486 05:47:26.110027 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 05:47:26.113232 PCI: 00:1e.0 cmd <- 06
1488 05:47:26.116328 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 05:47:26.120414 PCI: 00:1e.2 cmd <- 06
1490 05:47:26.123577 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 05:47:26.124161 PCI: 00:1e.3 cmd <- 02
1492 05:47:26.130382 PCI: 00:1f.0 subsystem <- 8086/0284
1493 05:47:26.130914 PCI: 00:1f.0 cmd <- 407
1494 05:47:26.133377 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 05:47:26.136939 PCI: 00:1f.3 cmd <- 02
1496 05:47:26.141030 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 05:47:26.143179 PCI: 00:1f.4 cmd <- 03
1498 05:47:26.146763 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 05:47:26.150180 PCI: 00:1f.5 cmd <- 406
1500 05:47:26.159486 PCI: 01:00.0 cmd <- 02
1501 05:47:26.164487 done.
1502 05:47:26.177491 ME: Version: 14.0.39.1367
1503 05:47:26.184167 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1504 05:47:26.187697 Initializing devices...
1505 05:47:26.188282 Root Device init ...
1506 05:47:26.193684 Chrome EC: Set SMI mask to 0x0000000000000000
1507 05:47:26.197391 Chrome EC: clear events_b mask to 0x0000000000000000
1508 05:47:26.204202 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 05:47:26.210749 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 05:47:26.217390 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 05:47:26.220682 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 05:47:26.224804 Root Device init finished in 35175 usecs
1513 05:47:26.227550 CPU_CLUSTER: 0 init ...
1514 05:47:26.234262 CPU_CLUSTER: 0 init finished in 2448 usecs
1515 05:47:26.238743 PCI: 00:00.0 init ...
1516 05:47:26.241504 CPU TDP: 15 Watts
1517 05:47:26.245309 CPU PL2 = 64 Watts
1518 05:47:26.247871 PCI: 00:00.0 init finished in 7076 usecs
1519 05:47:26.251901 PCI: 00:02.0 init ...
1520 05:47:26.254548 PCI: 00:02.0 init finished in 2255 usecs
1521 05:47:26.257630 PCI: 00:08.0 init ...
1522 05:47:26.260904 PCI: 00:08.0 init finished in 2252 usecs
1523 05:47:26.264726 PCI: 00:12.0 init ...
1524 05:47:26.267921 PCI: 00:12.0 init finished in 2244 usecs
1525 05:47:26.271336 PCI: 00:14.0 init ...
1526 05:47:26.274366 PCI: 00:14.0 init finished in 2252 usecs
1527 05:47:26.277642 PCI: 00:14.2 init ...
1528 05:47:26.281202 PCI: 00:14.2 init finished in 2252 usecs
1529 05:47:26.284204 PCI: 00:14.3 init ...
1530 05:47:26.287954 PCI: 00:14.3 init finished in 2263 usecs
1531 05:47:26.290909 PCI: 00:15.0 init ...
1532 05:47:26.294701 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 05:47:26.297305 PCI: 00:15.0 init finished in 5980 usecs
1534 05:47:26.301118 PCI: 00:15.1 init ...
1535 05:47:26.304038 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 05:47:26.310960 PCI: 00:15.1 init finished in 5972 usecs
1537 05:47:26.311558 PCI: 00:16.0 init ...
1538 05:47:26.317245 PCI: 00:16.0 init finished in 2252 usecs
1539 05:47:26.320558 PCI: 00:19.0 init ...
1540 05:47:26.324186 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 05:47:26.327478 PCI: 00:19.0 init finished in 5980 usecs
1542 05:47:26.330165 PCI: 00:1d.0 init ...
1543 05:47:26.333864 Initializing PCH PCIe bridge.
1544 05:47:26.336846 PCI: 00:1d.0 init finished in 5271 usecs
1545 05:47:26.340160 PCI: 00:1f.0 init ...
1546 05:47:26.343830 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 05:47:26.350636 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 05:47:26.351208 IOAPIC: ID = 0x02
1549 05:47:26.353394 IOAPIC: Dumping registers
1550 05:47:26.357022 reg 0x0000: 0x02000000
1551 05:47:26.360647 reg 0x0001: 0x00770020
1552 05:47:26.361264 reg 0x0002: 0x00000000
1553 05:47:26.367160 PCI: 00:1f.0 init finished in 23547 usecs
1554 05:47:26.370240 PCI: 00:1f.4 init ...
1555 05:47:26.373500 PCI: 00:1f.4 init finished in 2264 usecs
1556 05:47:26.384696 PCI: 01:00.0 init ...
1557 05:47:26.387701 PCI: 01:00.0 init finished in 2252 usecs
1558 05:47:26.392669 PNP: 0c09.0 init ...
1559 05:47:26.395366 Google Chrome EC uptime: 11.104 seconds
1560 05:47:26.401592 Google Chrome AP resets since EC boot: 0
1561 05:47:26.404931 Google Chrome most recent AP reset causes:
1562 05:47:26.411898 Google Chrome EC reset flags at last EC boot: reset-pin
1563 05:47:26.414532 PNP: 0c09.0 init finished in 20577 usecs
1564 05:47:26.417996 Devices initialized
1565 05:47:26.421279 Show all devs... After init.
1566 05:47:26.421757 Root Device: enabled 1
1567 05:47:26.424865 CPU_CLUSTER: 0: enabled 1
1568 05:47:26.428292 DOMAIN: 0000: enabled 1
1569 05:47:26.428881 APIC: 00: enabled 1
1570 05:47:26.431618 PCI: 00:00.0: enabled 1
1571 05:47:26.434505 PCI: 00:02.0: enabled 1
1572 05:47:26.437822 PCI: 00:04.0: enabled 0
1573 05:47:26.438301 PCI: 00:05.0: enabled 0
1574 05:47:26.440939 PCI: 00:12.0: enabled 1
1575 05:47:26.444497 PCI: 00:12.5: enabled 0
1576 05:47:26.448221 PCI: 00:12.6: enabled 0
1577 05:47:26.448801 PCI: 00:14.0: enabled 1
1578 05:47:26.451221 PCI: 00:14.1: enabled 0
1579 05:47:26.454197 PCI: 00:14.3: enabled 1
1580 05:47:26.454674 PCI: 00:14.5: enabled 0
1581 05:47:26.457879 PCI: 00:15.0: enabled 1
1582 05:47:26.461424 PCI: 00:15.1: enabled 1
1583 05:47:26.464586 PCI: 00:15.2: enabled 0
1584 05:47:26.465122 PCI: 00:15.3: enabled 0
1585 05:47:26.468097 PCI: 00:16.0: enabled 1
1586 05:47:26.471440 PCI: 00:16.1: enabled 0
1587 05:47:26.474859 PCI: 00:16.2: enabled 0
1588 05:47:26.475434 PCI: 00:16.3: enabled 0
1589 05:47:26.477561 PCI: 00:16.4: enabled 0
1590 05:47:26.481039 PCI: 00:16.5: enabled 0
1591 05:47:26.484908 PCI: 00:17.0: enabled 1
1592 05:47:26.485514 PCI: 00:19.0: enabled 1
1593 05:47:26.487488 PCI: 00:19.1: enabled 0
1594 05:47:26.490870 PCI: 00:19.2: enabled 0
1595 05:47:26.494151 PCI: 00:1a.0: enabled 0
1596 05:47:26.494723 PCI: 00:1c.0: enabled 0
1597 05:47:26.497852 PCI: 00:1c.1: enabled 0
1598 05:47:26.500534 PCI: 00:1c.2: enabled 0
1599 05:47:26.501060 PCI: 00:1c.3: enabled 0
1600 05:47:26.503957 PCI: 00:1c.4: enabled 0
1601 05:47:26.507251 PCI: 00:1c.5: enabled 0
1602 05:47:26.510823 PCI: 00:1c.6: enabled 0
1603 05:47:26.511381 PCI: 00:1c.7: enabled 0
1604 05:47:26.513792 PCI: 00:1d.0: enabled 1
1605 05:47:26.517069 PCI: 00:1d.1: enabled 0
1606 05:47:26.520902 PCI: 00:1d.2: enabled 0
1607 05:47:26.521508 PCI: 00:1d.3: enabled 0
1608 05:47:26.523598 PCI: 00:1d.4: enabled 0
1609 05:47:26.528428 PCI: 00:1d.5: enabled 0
1610 05:47:26.530860 PCI: 00:1e.0: enabled 1
1611 05:47:26.531335 PCI: 00:1e.1: enabled 0
1612 05:47:26.533840 PCI: 00:1e.2: enabled 1
1613 05:47:26.536861 PCI: 00:1e.3: enabled 1
1614 05:47:26.540329 PCI: 00:1f.0: enabled 1
1615 05:47:26.540807 PCI: 00:1f.1: enabled 0
1616 05:47:26.543978 PCI: 00:1f.2: enabled 0
1617 05:47:26.547009 PCI: 00:1f.3: enabled 1
1618 05:47:26.547588 PCI: 00:1f.4: enabled 1
1619 05:47:26.550108 PCI: 00:1f.5: enabled 1
1620 05:47:26.553659 PCI: 00:1f.6: enabled 0
1621 05:47:26.556699 USB0 port 0: enabled 1
1622 05:47:26.557227 I2C: 01:15: enabled 1
1623 05:47:26.560149 I2C: 02:5d: enabled 1
1624 05:47:26.563842 GENERIC: 0.0: enabled 1
1625 05:47:26.564427 I2C: 03:1a: enabled 1
1626 05:47:26.566934 I2C: 03:38: enabled 1
1627 05:47:26.570251 I2C: 03:39: enabled 1
1628 05:47:26.570835 I2C: 03:3a: enabled 1
1629 05:47:26.574343 I2C: 03:3b: enabled 1
1630 05:47:26.576814 PCI: 00:00.0: enabled 1
1631 05:47:26.577433 SPI: 00: enabled 1
1632 05:47:26.580568 SPI: 01: enabled 1
1633 05:47:26.583624 PNP: 0c09.0: enabled 1
1634 05:47:26.584206 USB2 port 0: enabled 1
1635 05:47:26.586656 USB2 port 1: enabled 1
1636 05:47:26.590233 USB2 port 2: enabled 0
1637 05:47:26.593493 USB2 port 3: enabled 0
1638 05:47:26.594081 USB2 port 5: enabled 0
1639 05:47:26.597643 USB2 port 6: enabled 1
1640 05:47:26.599816 USB2 port 9: enabled 1
1641 05:47:26.600298 USB3 port 0: enabled 1
1642 05:47:26.603262 USB3 port 1: enabled 1
1643 05:47:26.607136 USB3 port 2: enabled 1
1644 05:47:26.609808 USB3 port 3: enabled 1
1645 05:47:26.610295 USB3 port 4: enabled 0
1646 05:47:26.612841 APIC: 03: enabled 1
1647 05:47:26.613352 APIC: 02: enabled 1
1648 05:47:26.616474 APIC: 01: enabled 1
1649 05:47:26.620210 APIC: 04: enabled 1
1650 05:47:26.620790 APIC: 05: enabled 1
1651 05:47:26.623503 APIC: 06: enabled 1
1652 05:47:26.626519 APIC: 07: enabled 1
1653 05:47:26.627105 PCI: 00:08.0: enabled 1
1654 05:47:26.629722 PCI: 00:14.2: enabled 1
1655 05:47:26.633053 PCI: 01:00.0: enabled 1
1656 05:47:26.636581 Disabling ACPI via APMC:
1657 05:47:26.640360 done.
1658 05:47:26.643326 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 05:47:26.646259 ELOG: NV offset 0xaf0000 size 0x4000
1660 05:47:26.653659 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 05:47:26.660262 ELOG: Event(17) added with size 13 at 2022-08-23 05:47:04 UTC
1662 05:47:26.666446 ELOG: Event(92) added with size 9 at 2022-08-23 05:47:04 UTC
1663 05:47:26.673782 ELOG: Event(93) added with size 9 at 2022-08-23 05:47:04 UTC
1664 05:47:26.680445 ELOG: Event(9A) added with size 9 at 2022-08-23 05:47:04 UTC
1665 05:47:26.686649 ELOG: Event(9E) added with size 10 at 2022-08-23 05:47:04 UTC
1666 05:47:26.693844 ELOG: Event(9F) added with size 14 at 2022-08-23 05:47:04 UTC
1667 05:47:26.697344 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1668 05:47:26.703670 ELOG: Event(A1) added with size 10 at 2022-08-23 05:47:04 UTC
1669 05:47:26.713589 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1670 05:47:26.720628 ELOG: Event(A0) added with size 9 at 2022-08-23 05:47:04 UTC
1671 05:47:26.723555 elog_add_boot_reason: Logged dev mode boot
1672 05:47:26.727154 Finalize devices...
1673 05:47:26.727737 PCI: 00:17.0 final
1674 05:47:26.730545 Devices finalized
1675 05:47:26.733287 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1676 05:47:26.739863 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1677 05:47:26.745019 ME: HFSTS1 : 0x90000245
1678 05:47:26.746607 ME: HFSTS2 : 0x3B850126
1679 05:47:26.753456 ME: HFSTS3 : 0x00000020
1680 05:47:26.756366 ME: HFSTS4 : 0x00004800
1681 05:47:26.759893 ME: HFSTS5 : 0x00000000
1682 05:47:26.763587 ME: HFSTS6 : 0x40400006
1683 05:47:26.766813 ME: Manufacturing Mode : NO
1684 05:47:26.769963 ME: FW Partition Table : OK
1685 05:47:26.773174 ME: Bringup Loader Failure : NO
1686 05:47:26.776806 ME: Firmware Init Complete : YES
1687 05:47:26.780353 ME: Boot Options Present : NO
1688 05:47:26.783515 ME: Update In Progress : NO
1689 05:47:26.786511 ME: D0i3 Support : YES
1690 05:47:26.790177 ME: Low Power State Enabled : NO
1691 05:47:26.793704 ME: CPU Replaced : NO
1692 05:47:26.796485 ME: CPU Replacement Valid : YES
1693 05:47:26.799467 ME: Current Working State : 5
1694 05:47:26.802347 ME: Current Operation State : 1
1695 05:47:26.805827 ME: Current Operation Mode : 0
1696 05:47:26.809284 ME: Error Code : 0
1697 05:47:26.813127 ME: CPU Debug Disabled : YES
1698 05:47:26.815955 ME: TXT Support : NO
1699 05:47:26.822673 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1700 05:47:26.829319 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 05:47:26.829944 CBFS @ c08000 size 3f8000
1702 05:47:26.835761 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 05:47:26.839103 CBFS: Locating 'fallback/dsdt.aml'
1704 05:47:26.842179 CBFS: Found @ offset 10bb80 size 3fa5
1705 05:47:26.849087 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 05:47:26.852260 CBFS @ c08000 size 3f8000
1707 05:47:26.858968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 05:47:26.859454 CBFS: Locating 'fallback/slic'
1709 05:47:26.864646 CBFS: 'fallback/slic' not found.
1710 05:47:26.870966 ACPI: Writing ACPI tables at 99b3e000.
1711 05:47:26.871556 ACPI: * FACS
1712 05:47:26.874439 ACPI: * DSDT
1713 05:47:26.878229 Ramoops buffer: 0x100000@0x99a3d000.
1714 05:47:26.880773 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1715 05:47:26.887774 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1716 05:47:26.891128 Google Chrome EC: version:
1717 05:47:26.894162 ro: helios_v2.0.2659-56403530b
1718 05:47:26.897768 rw: helios_v2.0.2849-c41de27e7d
1719 05:47:26.898355 running image: 1
1720 05:47:26.901950 ACPI: * FADT
1721 05:47:26.902542 SCI is IRQ9
1722 05:47:26.908092 ACPI: added table 1/32, length now 40
1723 05:47:26.908575 ACPI: * SSDT
1724 05:47:26.912007 Found 1 CPU(s) with 8 core(s) each.
1725 05:47:26.915145 Error: Could not locate 'wifi_sar' in VPD.
1726 05:47:26.921460 Checking CBFS for default SAR values
1727 05:47:26.924813 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 05:47:26.929076 CBFS @ c08000 size 3f8000
1729 05:47:26.934680 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 05:47:26.937939 CBFS: Locating 'wifi_sar_defaults.hex'
1731 05:47:26.941633 CBFS: Found @ offset 5fac0 size 77
1732 05:47:26.944530 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1733 05:47:26.951211 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1734 05:47:26.955001 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1735 05:47:26.961266 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1736 05:47:26.965024 failed to find key in VPD: dsm_calib_r0_0
1737 05:47:26.975055 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1738 05:47:26.977819 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1739 05:47:26.981519 failed to find key in VPD: dsm_calib_r0_1
1740 05:47:26.991313 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1741 05:47:26.997818 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1742 05:47:27.000834 failed to find key in VPD: dsm_calib_r0_2
1743 05:47:27.010933 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1744 05:47:27.014002 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1745 05:47:27.021048 failed to find key in VPD: dsm_calib_r0_3
1746 05:47:27.027991 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1747 05:47:27.034248 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1748 05:47:27.037124 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1749 05:47:27.040646 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1750 05:47:27.045135 EC returned error result code 1
1751 05:47:27.048466 EC returned error result code 1
1752 05:47:27.052046 EC returned error result code 1
1753 05:47:27.059006 PS2K: Bad resp from EC. Vivaldi disabled!
1754 05:47:27.062482 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1755 05:47:27.068405 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1756 05:47:27.075464 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1757 05:47:27.078511 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1758 05:47:27.085044 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1759 05:47:27.091721 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1760 05:47:27.098536 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1761 05:47:27.102112 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1762 05:47:27.108172 ACPI: added table 2/32, length now 44
1763 05:47:27.108671 ACPI: * MCFG
1764 05:47:27.111249 ACPI: added table 3/32, length now 48
1765 05:47:27.115070 ACPI: * TPM2
1766 05:47:27.117926 TPM2 log created at 99a2d000
1767 05:47:27.121447 ACPI: added table 4/32, length now 52
1768 05:47:27.121933 ACPI: * MADT
1769 05:47:27.124891 SCI is IRQ9
1770 05:47:27.128581 ACPI: added table 5/32, length now 56
1771 05:47:27.129102 current = 99b43ac0
1772 05:47:27.130858 ACPI: * DMAR
1773 05:47:27.135127 ACPI: added table 6/32, length now 60
1774 05:47:27.138077 ACPI: * IGD OpRegion
1775 05:47:27.141822 GMA: Found VBT in CBFS
1776 05:47:27.142399 GMA: Found valid VBT in CBFS
1777 05:47:27.147892 ACPI: added table 7/32, length now 64
1778 05:47:27.148591 ACPI: * HPET
1779 05:47:27.150929 ACPI: added table 8/32, length now 68
1780 05:47:27.154035 ACPI: done.
1781 05:47:27.154510 ACPI tables: 31744 bytes.
1782 05:47:27.157181 smbios_write_tables: 99a2c000
1783 05:47:27.160806 EC returned error result code 3
1784 05:47:27.167165 Couldn't obtain OEM name from CBI
1785 05:47:27.167798 Create SMBIOS type 17
1786 05:47:27.170483 PCI: 00:00.0 (Intel Cannonlake)
1787 05:47:27.173854 PCI: 00:14.3 (Intel WiFi)
1788 05:47:27.177065 SMBIOS tables: 939 bytes.
1789 05:47:27.181099 Writing table forward entry at 0x00000500
1790 05:47:27.187203 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1791 05:47:27.190582 Writing coreboot table at 0x99b62000
1792 05:47:27.197897 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1793 05:47:27.200419 1. 0000000000001000-000000000009ffff: RAM
1794 05:47:27.207353 2. 00000000000a0000-00000000000fffff: RESERVED
1795 05:47:27.209962 3. 0000000000100000-0000000099a2bfff: RAM
1796 05:47:27.217250 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1797 05:47:27.220587 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1798 05:47:27.226830 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1799 05:47:27.229855 7. 000000009a000000-000000009f7fffff: RESERVED
1800 05:47:27.236574 8. 00000000e0000000-00000000efffffff: RESERVED
1801 05:47:27.240567 9. 00000000fc000000-00000000fc000fff: RESERVED
1802 05:47:27.246765 10. 00000000fe000000-00000000fe00ffff: RESERVED
1803 05:47:27.249967 11. 00000000fed10000-00000000fed17fff: RESERVED
1804 05:47:27.256423 12. 00000000fed80000-00000000fed83fff: RESERVED
1805 05:47:27.260019 13. 00000000fed90000-00000000fed91fff: RESERVED
1806 05:47:27.266213 14. 00000000feda0000-00000000feda1fff: RESERVED
1807 05:47:27.269201 15. 0000000100000000-000000045e7fffff: RAM
1808 05:47:27.273007 Graphics framebuffer located at 0xc0000000
1809 05:47:27.276552 Passing 5 GPIOs to payload:
1810 05:47:27.283081 NAME | PORT | POLARITY | VALUE
1811 05:47:27.286195 write protect | undefined | high | low
1812 05:47:27.292523 lid | undefined | high | high
1813 05:47:27.296035 power | undefined | high | low
1814 05:47:27.302543 oprom | undefined | high | low
1815 05:47:27.309041 EC in RW | 0x000000cb | high | low
1816 05:47:27.309520 Board ID: 4
1817 05:47:27.315470 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1818 05:47:27.315948 CBFS @ c08000 size 3f8000
1819 05:47:27.322538 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1820 05:47:27.329125 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
1821 05:47:27.332370 coreboot table: 1492 bytes.
1822 05:47:27.336337 IMD ROOT 0. 99fff000 00001000
1823 05:47:27.339288 IMD SMALL 1. 99ffe000 00001000
1824 05:47:27.342541 FSP MEMORY 2. 99c4e000 003b0000
1825 05:47:27.345933 CONSOLE 3. 99c2e000 00020000
1826 05:47:27.349027 FMAP 4. 99c2d000 0000054e
1827 05:47:27.352050 TIME STAMP 5. 99c2c000 00000910
1828 05:47:27.355722 VBOOT WORK 6. 99c18000 00014000
1829 05:47:27.358767 MRC DATA 7. 99c16000 00001958
1830 05:47:27.362534 ROMSTG STCK 8. 99c15000 00001000
1831 05:47:27.365582 AFTER CAR 9. 99c0b000 0000a000
1832 05:47:27.369456 RAMSTAGE 10. 99baf000 0005c000
1833 05:47:27.372576 REFCODE 11. 99b7a000 00035000
1834 05:47:27.375351 SMM BACKUP 12. 99b6a000 00010000
1835 05:47:27.378526 COREBOOT 13. 99b62000 00008000
1836 05:47:27.382395 ACPI 14. 99b3e000 00024000
1837 05:47:27.385775 ACPI GNVS 15. 99b3d000 00001000
1838 05:47:27.388591 RAMOOPS 16. 99a3d000 00100000
1839 05:47:27.392247 TPM2 TCGLOG17. 99a2d000 00010000
1840 05:47:27.395464 SMBIOS 18. 99a2c000 00000800
1841 05:47:27.396040 IMD small region:
1842 05:47:27.402172 IMD ROOT 0. 99ffec00 00000400
1843 05:47:27.404877 FSP RUNTIME 1. 99ffebe0 00000004
1844 05:47:27.408692 EC HOSTEVENT 2. 99ffebc0 00000008
1845 05:47:27.411706 POWER STATE 3. 99ffeb80 00000040
1846 05:47:27.415299 ROMSTAGE 4. 99ffeb60 00000004
1847 05:47:27.418409 MEM INFO 5. 99ffe9a0 000001b9
1848 05:47:27.421482 VPD 6. 99ffe940 0000004c
1849 05:47:27.425035 MTRR: Physical address space:
1850 05:47:27.431472 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1851 05:47:27.438190 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1852 05:47:27.444665 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1853 05:47:27.447856 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1854 05:47:27.454986 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1855 05:47:27.461611 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1856 05:47:27.468402 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1857 05:47:27.471273 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 05:47:27.478512 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 05:47:27.481112 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 05:47:27.484601 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 05:47:27.487859 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 05:47:27.491097 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 05:47:27.497753 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 05:47:27.501581 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 05:47:27.504988 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 05:47:27.507475 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 05:47:27.513953 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 05:47:27.517229 call enable_fixed_mtrr()
1869 05:47:27.521228 CPU physical address size: 39 bits
1870 05:47:27.524432 MTRR: default type WB/UC MTRR counts: 6/8.
1871 05:47:27.527561 MTRR: WB selected as default type.
1872 05:47:27.534541 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1873 05:47:27.541035 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1874 05:47:27.547345 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1875 05:47:27.553935 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1876 05:47:27.560699 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1877 05:47:27.563720 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1878 05:47:27.571552 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 05:47:27.574565 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 05:47:27.578058 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 05:47:27.581059 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 05:47:27.587595 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 05:47:27.591867 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 05:47:27.594436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 05:47:27.598219 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 05:47:27.604691 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 05:47:27.607286 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 05:47:27.610944 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 05:47:27.611420
1890 05:47:27.614184 MTRR check
1891 05:47:27.614656 Fixed MTRRs : Enabled
1892 05:47:27.617051 Variable MTRRs: Enabled
1893 05:47:27.617528
1894 05:47:27.620980 call enable_fixed_mtrr()
1895 05:47:27.628292 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1896 05:47:27.630293 CPU physical address size: 39 bits
1897 05:47:27.633645 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1898 05:47:27.640506 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 05:47:27.644063 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 05:47:27.647450 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 05:47:27.650320 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 05:47:27.657607 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 05:47:27.660504 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 05:47:27.663458 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 05:47:27.666910 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 05:47:27.669685 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 05:47:27.677103 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 05:47:27.680278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 05:47:27.683255 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 05:47:27.689693 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 05:47:27.693298 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 05:47:27.696238 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 05:47:27.699901 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 05:47:27.706195 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 05:47:27.709494 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 05:47:27.713132 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 05:47:27.716548 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 05:47:27.722400 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 05:47:27.726170 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 05:47:27.729630 call enable_fixed_mtrr()
1921 05:47:27.730210 call enable_fixed_mtrr()
1922 05:47:27.736360 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 05:47:27.739741 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 05:47:27.742249 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 05:47:27.746019 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 05:47:27.752783 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 05:47:27.756253 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 05:47:27.758564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 05:47:27.762273 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 05:47:27.768786 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 05:47:27.772363 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 05:47:27.775395 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 05:47:27.778948 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 05:47:27.785638 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 05:47:27.789205 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 05:47:27.792023 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 05:47:27.795503 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 05:47:27.799061 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 05:47:27.805386 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 05:47:27.808317 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 05:47:27.812267 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 05:47:27.814757 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 05:47:27.821998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 05:47:27.825052 call enable_fixed_mtrr()
1945 05:47:27.825629 call enable_fixed_mtrr()
1946 05:47:27.828798 CPU physical address size: 39 bits
1947 05:47:27.835188 CPU physical address size: 39 bits
1948 05:47:27.838526 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 05:47:27.841872 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 05:47:27.845661 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 05:47:27.849115 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 05:47:27.854904 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 05:47:27.858663 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 05:47:27.861742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 05:47:27.865350 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 05:47:27.871209 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 05:47:27.875398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 05:47:27.877737 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 05:47:27.881433 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 05:47:27.888122 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 05:47:27.888708 call enable_fixed_mtrr()
1962 05:47:27.894236 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 05:47:27.898034 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 05:47:27.900987 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 05:47:27.904619 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 05:47:27.911401 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 05:47:27.914135 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 05:47:27.917199 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 05:47:27.920983 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 05:47:27.927785 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 05:47:27.931027 CPU physical address size: 39 bits
1972 05:47:27.934076 call enable_fixed_mtrr()
1973 05:47:27.934646 CBFS @ c08000 size 3f8000
1974 05:47:27.940631 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1975 05:47:27.944261 CBFS: Locating 'fallback/payload'
1976 05:47:27.947544 CPU physical address size: 39 bits
1977 05:47:27.951231 CPU physical address size: 39 bits
1978 05:47:27.954127 CPU physical address size: 39 bits
1979 05:47:27.960832 CBFS: Found @ offset 1c96c0 size 3f798
1980 05:47:27.964657 Checking segment from ROM address 0xffdd16f8
1981 05:47:27.967813 Checking segment from ROM address 0xffdd1714
1982 05:47:27.974928 Loading segment from ROM address 0xffdd16f8
1983 05:47:27.975497 code (compression=0)
1984 05:47:27.984340 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1985 05:47:27.990575 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1986 05:47:27.993855 it's not compressed!
1987 05:47:28.087066 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1988 05:47:28.093673 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1989 05:47:28.096776 Loading segment from ROM address 0xffdd1714
1990 05:47:28.099889 Entry Point 0x30000000
1991 05:47:28.102938 Loaded segments
1992 05:47:28.109032 Finalizing chipset.
1993 05:47:28.112710 Finalizing SMM.
1994 05:47:28.115346 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1995 05:47:28.118840 mp_park_aps done after 0 msecs.
1996 05:47:28.125502 Jumping to boot code at 30000000(99b62000)
1997 05:47:28.131725 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1998 05:47:28.132305
1999 05:47:28.135515 Starting depthcharge on Helios...
2000 05:47:28.136775 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2001 05:47:28.137392 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2002 05:47:28.137873 Setting prompt string to ['hatch:']
2003 05:47:28.138322 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2004 05:47:28.144939 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2005 05:47:28.151967 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2006 05:47:28.158120 board_setup: Info: eMMC controller not present; skipping
2007 05:47:28.161671 New NVMe Controller 0x30053ac0 @ 00:1d:00
2008 05:47:28.168582 board_setup: Info: SDHCI controller not present; skipping
2009 05:47:28.175083 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2010 05:47:28.175655 Wipe memory regions:
2011 05:47:28.178551 [0x00000000001000, 0x000000000a0000)
2012 05:47:28.184518 [0x00000000100000, 0x00000030000000)
2013 05:47:28.250747 [0x00000030657430, 0x00000099a2c000)
2014 05:47:28.391057 [0x00000100000000, 0x0000045e800000)
2015 05:47:29.773950 R8152: Initializing
2016 05:47:29.777598 Version 9 (ocp_data = 6010)
2017 05:47:29.781692 R8152: Done initializing
2018 05:47:29.784736 Adding net device
2019 05:47:30.282689 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2020 05:47:30.283256
2021 05:47:30.284046 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2023 05:47:30.385769 hatch: tftpboot 192.168.201.1 7096699/tftp-deploy-kojfrv4q/kernel/bzImage 7096699/tftp-deploy-kojfrv4q/kernel/cmdline 7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
2024 05:47:30.386440 Setting prompt string to 'Starting kernel'
2025 05:47:30.386859 Setting prompt string to ['Starting kernel']
2026 05:47:30.387243 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2027 05:47:30.387637 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2028 05:47:30.391913 tftpboot 192.168.201.1 7096699/tftp-deploy-kojfrv4q/kernel/bzImaoy-kojfrv4q/kernel/cmdline 7096699/tftp-deploy-kojfrv4q/ramdisk/ramdisk.cpio.gz
2029 05:47:30.392486 Waiting for link
2030 05:47:30.593003 done.
2031 05:47:30.593575 MAC: f4:f5:e8:50:dc:f7
2032 05:47:30.595742 Sending DHCP discover... done.
2033 05:47:30.599541 Waiting for reply... done.
2034 05:47:30.602623 Sending DHCP request... done.
2035 05:47:30.609089 Waiting for reply... done.
2036 05:47:30.609655 My ip is 192.168.201.10
2037 05:47:30.612219 The DHCP server ip is 192.168.201.1
2038 05:47:30.619230 TFTP server IP predefined by user: 192.168.201.1
2039 05:47:30.625959 Bootfile predefined by user: 7096699/tftp-deploy-kojfrv4q/kernel/bzImage
2040 05:47:30.628761 Sending tftp read request... done.
2041 05:47:30.635543 Waiting for the transfer...
2042 05:47:31.026131 00000000 ################################################################
2043 05:47:31.377900 00080000 ################################################################
2044 05:47:31.701199 00100000 ################################################################
2045 05:47:32.036082 00180000 ################################################################
2046 05:47:32.407900 00200000 ################################################################
2047 05:47:32.791583 00280000 ################################################################
2048 05:47:33.177863 00300000 ################################################################
2049 05:47:33.560095 00380000 ################################################################
2050 05:47:33.947154 00400000 ################################################################
2051 05:47:34.270592 00480000 ################################################################
2052 05:47:34.594283 00500000 ################################################################
2053 05:47:34.945035 00580000 ################################################################
2054 05:47:35.327426 00600000 ################################################################
2055 05:47:35.651159 00680000 ################################################################
2056 05:47:36.007929 00700000 ################################################################
2057 05:47:36.308242 00780000 ################################################################
2058 05:47:36.548415 00800000 ################################################################
2059 05:47:36.566915 00880000 ###### done.
2060 05:47:36.570032 The bootfile was 8953856 bytes long.
2061 05:47:36.573825 Sending tftp read request... done.
2062 05:47:36.576938 Waiting for the transfer...
2063 05:47:36.957417 00000000 ################################################################
2064 05:47:37.336249 00080000 ################################################################
2065 05:47:37.702778 00100000 ################################################################
2066 05:47:38.038098 00180000 ################################################################
2067 05:47:38.288834 00200000 ################################################################
2068 05:47:38.543469 00280000 ################################################################
2069 05:47:38.789907 00300000 ################################################################
2070 05:47:39.049941 00380000 ################################################################
2071 05:47:39.342892 00400000 ################################################################
2072 05:47:39.633124 00480000 ################################################################
2073 05:47:39.777132 00500000 ################################ done.
2074 05:47:39.780766 Sending tftp read request... done.
2075 05:47:39.784508 Waiting for the transfer...
2076 05:47:39.784991 00000000 # done.
2077 05:47:39.794495 Command line loaded dynamically from TFTP file: 7096699/tftp-deploy-kojfrv4q/kernel/cmdline
2078 05:47:39.820802 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096699/extract-nfsrootfs-lbh5pica,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2079 05:47:39.827779 ec_init(0): CrosEC protocol v3 supported (256, 256)
2080 05:47:39.833766 Shutting down all USB controllers.
2081 05:47:39.834242 Removing current net device
2082 05:47:39.837712 Finalizing coreboot
2083 05:47:39.844319 Exiting depthcharge with code 4 at timestamp: 18997764
2084 05:47:39.844831
2085 05:47:39.845246 Starting kernel ...
2086 05:47:39.846301 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2087 05:47:39.846893 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2088 05:47:39.847348 Setting prompt string to ['Linux version [0-9]']
2089 05:47:39.847756 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2090 05:47:39.848149 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2091 05:47:39.849146
2092 05:47:39.849593
2094 05:52:08.847123 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2096 05:52:08.847352 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2098 05:52:08.847522 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2101 05:52:08.847816 end: 2 depthcharge-action (duration 00:05:00) [common]
2103 05:52:08.848078 Cleaning after the job
2104 05:52:08.848163 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/ramdisk
2105 05:52:08.848685 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/kernel
2106 05:52:08.849351 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/nfsrootfs
2107 05:52:08.883212 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096699/tftp-deploy-kojfrv4q/modules
2108 05:52:08.883511 start: 5.1 power-off (timeout 00:00:30) [common]
2109 05:52:08.883680 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2110 05:52:08.903206 >> Command sent successfully.
2111 05:52:08.905056 Returned 0 in 0 seconds
2112 05:52:09.005837 end: 5.1 power-off (duration 00:00:00) [common]
2114 05:52:09.006207 start: 5.2 read-feedback (timeout 00:10:00) [common]
2115 05:52:09.006447 Listened to connection for namespace 'common' for up to 1s
2116 05:52:09.831125 Listened to connection for namespace 'common' for up to 1s
2117 05:52:09.834410 Listened to connection for namespace 'common' for up to 1s
2118 05:52:09.837930 Listened to connection for namespace 'common' for up to 1s
2119 05:52:09.840918 Listened to connection for namespace 'common' for up to 1s
2120 05:52:09.844598 Listened to connection for namespace 'common' for up to 1s
2121 05:52:09.848124 Listened to connection for namespace 'common' for up to 1s
2122 05:52:09.851490 Listened to connection for namespace 'common' for up to 1s
2123 05:52:09.854141 Listened to connection for namespace 'common' for up to 1s
2124 05:52:09.858409 Listened to connection for namespace 'common' for up to 1s
2125 05:52:09.861336 Listened to connection for namespace 'common' for up to 1s
2126 05:52:09.864698 Listened to connection for namespace 'common' for up to 1s
2127 05:52:09.867616 Listened to connection for namespace 'common' for up to 1s
2128 05:52:09.871116 Listened to connection for namespace 'common' for up to 1s
2129 05:52:09.874500 Listened to connection for namespace 'common' for up to 1s
2130 05:52:09.877677 Listened to connection for namespace 'common' for up to 1s
2131 05:52:09.884723 Listened to connection for namespace 'common' for up to 1s
2132 05:52:09.888397 Listened to connection for namespace 'common' for up to 1s
2133 05:52:10.007004 Finalising connection for namespace 'common'
2134 05:52:10.007187 Disconnecting from shell: Finalise
2135 05:52:10.007276
2136 05:52:10.107995 end: 5.2 read-feedback (duration 00:00:01) [common]
2137 05:52:10.108156 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096699
2138 05:52:10.203182 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096699
2139 05:52:10.203377 JobError: Your job cannot terminate cleanly.