Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 04:52:38.391337 lava-dispatcher, installed at version: 2022.06
2 04:52:38.391539 start: 0 validate
3 04:52:38.391673 Start time: 2022-08-23 04:52:38.391666+00:00 (UTC)
4 04:52:38.391810 Using caching service: 'http://localhost/cache/?uri=%s'
5 04:52:38.391939 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20220812.0%2Famd64%2Frootfs.cpio.gz exists
6 04:52:38.681948 Using caching service: 'http://localhost/cache/?uri=%s'
7 04:52:38.682117 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 04:52:42.183621 Using caching service: 'http://localhost/cache/?uri=%s'
9 04:52:42.183793 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 04:52:42.186204 validate duration: 3.79
12 04:52:42.186447 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 04:52:42.186556 start: 1.1 download-retry (timeout 00:10:00) [common]
14 04:52:42.186647 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 04:52:42.186742 Not decompressing ramdisk as can be used compressed.
16 04:52:42.186825 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20220812.0/amd64/rootfs.cpio.gz
17 04:52:42.186890 saving as /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/ramdisk/rootfs.cpio.gz
18 04:52:42.186950 total size: 35714125 (34MB)
19 04:52:42.187933 progress 0% (0MB)
20 04:52:42.196781 progress 5% (1MB)
21 04:52:42.205278 progress 10% (3MB)
22 04:52:42.213878 progress 15% (5MB)
23 04:52:42.222253 progress 20% (6MB)
24 04:52:42.230778 progress 25% (8MB)
25 04:52:42.239209 progress 30% (10MB)
26 04:52:42.247765 progress 35% (11MB)
27 04:52:42.256226 progress 40% (13MB)
28 04:52:42.264766 progress 45% (15MB)
29 04:52:42.273142 progress 50% (17MB)
30 04:52:42.281785 progress 55% (18MB)
31 04:52:42.290156 progress 60% (20MB)
32 04:52:42.298776 progress 65% (22MB)
33 04:52:42.307131 progress 70% (23MB)
34 04:52:42.315716 progress 75% (25MB)
35 04:52:42.324090 progress 80% (27MB)
36 04:52:42.332567 progress 85% (28MB)
37 04:52:42.340840 progress 90% (30MB)
38 04:52:42.349255 progress 95% (32MB)
39 04:52:42.357517 progress 100% (34MB)
40 04:52:42.357841 34MB downloaded in 0.17s (199.31MB/s)
41 04:52:42.358024 end: 1.1.1 http-download (duration 00:00:00) [common]
43 04:52:42.358276 end: 1.1 download-retry (duration 00:00:00) [common]
44 04:52:42.358366 start: 1.2 download-retry (timeout 00:10:00) [common]
45 04:52:42.358454 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 04:52:42.358559 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 04:52:42.358627 saving as /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/kernel/bzImage
48 04:52:42.358687 total size: 8953856 (8MB)
49 04:52:42.358746 No compression specified
50 04:52:42.359799 progress 0% (0MB)
51 04:52:42.362037 progress 5% (0MB)
52 04:52:42.364305 progress 10% (0MB)
53 04:52:42.366457 progress 15% (1MB)
54 04:52:42.368712 progress 20% (1MB)
55 04:52:42.370971 progress 25% (2MB)
56 04:52:42.373030 progress 30% (2MB)
57 04:52:42.375332 progress 35% (3MB)
58 04:52:42.377555 progress 40% (3MB)
59 04:52:42.379660 progress 45% (3MB)
60 04:52:42.381931 progress 50% (4MB)
61 04:52:42.384202 progress 55% (4MB)
62 04:52:42.386287 progress 60% (5MB)
63 04:52:42.388495 progress 65% (5MB)
64 04:52:42.390744 progress 70% (6MB)
65 04:52:42.392775 progress 75% (6MB)
66 04:52:42.395023 progress 80% (6MB)
67 04:52:42.397200 progress 85% (7MB)
68 04:52:42.399261 progress 90% (7MB)
69 04:52:42.401478 progress 95% (8MB)
70 04:52:42.403716 progress 100% (8MB)
71 04:52:42.403896 8MB downloaded in 0.05s (188.90MB/s)
72 04:52:42.404046 end: 1.2.1 http-download (duration 00:00:00) [common]
74 04:52:42.404282 end: 1.2 download-retry (duration 00:00:00) [common]
75 04:52:42.404370 start: 1.3 download-retry (timeout 00:10:00) [common]
76 04:52:42.404480 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 04:52:42.404599 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 04:52:42.404666 saving as /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/modules/modules.tar
79 04:52:42.404727 total size: 64712 (0MB)
80 04:52:42.404786 Using unxz to decompress xz
81 04:52:42.408190 progress 50% (0MB)
82 04:52:42.408550 progress 100% (0MB)
83 04:52:42.412747 0MB downloaded in 0.01s (7.70MB/s)
84 04:52:42.412965 end: 1.3.1 http-download (duration 00:00:00) [common]
86 04:52:42.413226 end: 1.3 download-retry (duration 00:00:00) [common]
87 04:52:42.413325 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 04:52:42.413420 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 04:52:42.413505 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 04:52:42.413629 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 04:52:42.413795 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y
92 04:52:42.413903 makedir: /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin
93 04:52:42.413989 makedir: /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/tests
94 04:52:42.414073 makedir: /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/results
95 04:52:42.414177 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-add-keys
96 04:52:42.414334 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-add-sources
97 04:52:42.414447 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-background-process-start
98 04:52:42.414558 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-background-process-stop
99 04:52:42.414666 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-common-functions
100 04:52:42.414774 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-echo-ipv4
101 04:52:42.414884 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-install-packages
102 04:52:42.415039 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-installed-packages
103 04:52:42.415159 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-os-build
104 04:52:42.415266 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-probe-channel
105 04:52:42.415373 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-probe-ip
106 04:52:42.415477 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-target-ip
107 04:52:42.415583 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-target-mac
108 04:52:42.415688 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-target-storage
109 04:52:42.415798 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-case
110 04:52:42.415904 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-event
111 04:52:42.416010 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-feedback
112 04:52:42.416117 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-raise
113 04:52:42.416232 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-reference
114 04:52:42.416338 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-runner
115 04:52:42.416442 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-set
116 04:52:42.416547 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-test-shell
117 04:52:42.416657 Updating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-install-packages (oe)
118 04:52:42.416768 Updating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/bin/lava-installed-packages (oe)
119 04:52:42.416866 Creating /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/environment
120 04:52:42.416951 LAVA metadata
121 04:52:42.417019 - LAVA_JOB_ID=7096698
122 04:52:42.417082 - LAVA_DISPATCHER_IP=192.168.201.1
123 04:52:42.417191 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 04:52:42.417257 skipped lava-vland-overlay
125 04:52:42.417333 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 04:52:42.417417 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 04:52:42.417480 skipped lava-multinode-overlay
128 04:52:42.417556 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 04:52:42.417674 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 04:52:42.417750 Loading test definitions
131 04:52:42.417847 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 04:52:42.417922 Using /lava-7096698 at stage 0
133 04:52:42.418171 uuid=7096698_1.4.2.3.1 testdef=None
134 04:52:42.418259 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 04:52:42.418347 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 04:52:42.418807 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 04:52:42.419041 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 04:52:42.419572 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 04:52:42.419812 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 04:52:42.420314 runner path: /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/0/tests/0_cros-ec test_uuid 7096698_1.4.2.3.1
143 04:52:42.420459 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 04:52:42.420670 Creating lava-test-runner.conf files
146 04:52:42.420734 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096698/lava-overlay-nduwkk5y/lava-7096698/0 for stage 0
147 04:52:42.420816 - 0_cros-ec
148 04:52:42.420908 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 04:52:42.420995 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 04:52:42.426067 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 04:52:42.426258 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 04:52:42.426348 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 04:52:42.426435 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 04:52:42.426521 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 04:52:43.199230 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 04:52:43.199579 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 04:52:43.199685 extracting modules file /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096698/extract-overlay-ramdisk-pci6oo0e/ramdisk
158 04:52:43.203925 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 04:52:43.204042 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 04:52:43.204134 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096698/compress-overlay-lswqx2p8/overlay-1.4.2.4.tar.gz to ramdisk
161 04:52:43.204210 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096698/compress-overlay-lswqx2p8/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096698/extract-overlay-ramdisk-pci6oo0e/ramdisk
162 04:52:43.207524 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 04:52:43.207644 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 04:52:43.207736 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 04:52:43.207829 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 04:52:43.207906 Building ramdisk /var/lib/lava/dispatcher/tmp/7096698/extract-overlay-ramdisk-pci6oo0e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096698/extract-overlay-ramdisk-pci6oo0e/ramdisk
167 04:52:43.458959 >> 182458 blocks
168 04:52:46.729839 rename /var/lib/lava/dispatcher/tmp/7096698/extract-overlay-ramdisk-pci6oo0e/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
169 04:52:46.730258 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
170 04:52:46.730383 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
171 04:52:46.730535 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
172 04:52:46.730660 No mkimage arch provided, not using FIT.
173 04:52:46.730756 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 04:52:46.730842 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 04:52:46.730950 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 04:52:46.731051 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
177 04:52:46.731132 No LXC device requested
178 04:52:46.731218 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 04:52:46.731311 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
180 04:52:46.731393 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 04:52:46.731461 Checking files for TFTP limit of 4294967296 bytes.
182 04:52:46.731848 end: 1 tftp-deploy (duration 00:00:05) [common]
183 04:52:46.731961 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 04:52:46.732059 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 04:52:46.732221 substitutions:
186 04:52:46.732324 - {DTB}: None
187 04:52:46.732401 - {INITRD}: 7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
188 04:52:46.732462 - {KERNEL}: 7096698/tftp-deploy-np9z2wre/kernel/bzImage
189 04:52:46.732527 - {LAVA_MAC}: None
190 04:52:46.732590 - {PRESEED_CONFIG}: None
191 04:52:46.732650 - {PRESEED_LOCAL}: None
192 04:52:46.732710 - {RAMDISK}: 7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
193 04:52:46.732768 - {ROOT_PART}: None
194 04:52:46.732825 - {ROOT}: None
195 04:52:46.732882 - {SERVER_IP}: 192.168.201.1
196 04:52:46.732939 - {TEE}: None
197 04:52:46.732995 Parsed boot commands:
198 04:52:46.733055 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 04:52:46.733208 Parsed boot commands: tftpboot 192.168.201.1 7096698/tftp-deploy-np9z2wre/kernel/bzImage 7096698/tftp-deploy-np9z2wre/kernel/cmdline 7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
200 04:52:46.733303 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 04:52:46.733393 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 04:52:46.733487 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 04:52:46.733613 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 04:52:46.733690 Not connected, no need to disconnect.
205 04:52:46.733774 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 04:52:46.733860 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 04:52:46.733929 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
208 04:52:46.736813 Setting prompt string to ['lava-test: # ']
209 04:52:46.737105 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 04:52:46.737218 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 04:52:46.737318 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 04:52:46.737414 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 04:52:46.737625 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
214 04:52:46.757632 >> Command sent successfully.
215 04:52:46.759706 Returned 0 in 0 seconds
216 04:52:46.860499 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 04:52:46.860858 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 04:52:46.860987 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 04:52:46.861078 Setting prompt string to 'Starting depthcharge on Voema...'
221 04:52:46.861144 Changing prompt to 'Starting depthcharge on Voema...'
222 04:52:46.861243 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 04:52:46.861543 [Enter `^Ec?' for help]
224 04:52:54.648930
225 04:52:54.649101
226 04:52:54.658718 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 04:52:54.661773 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 04:52:54.668661 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 04:52:54.671776 CPU: AES supported, TXT NOT supported, VT supported
230 04:52:54.678954 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 04:52:54.685327 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 04:52:54.688772 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 04:52:54.691936 VBOOT: Loading verstage.
234 04:52:54.695079 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
235 04:52:54.701751 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 04:52:54.705297 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 04:52:54.715963 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 04:52:54.722513 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 04:52:54.722604
240 04:52:54.722672
241 04:52:54.735440 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 04:52:54.749535 Probing TPM: . done!
243 04:52:54.752826 TPM ready after 0 ms
244 04:52:54.755966 Connected to device vid:did:rid of 1ae0:0028:00
245 04:52:54.767289 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 04:52:54.774249 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 04:52:54.777282 Initialized TPM device CR50 revision 0
248 04:52:54.826431 tlcl_send_startup: Startup return code is 0
249 04:52:54.826604 TPM: setup succeeded
250 04:52:54.841960 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 04:52:54.856040 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 04:52:54.869121 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 04:52:54.878879 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 04:52:54.882256 Chrome EC: UHEPI supported
255 04:52:54.885586 Phase 1
256 04:52:54.888779 FMAP: area GBB found @ 1805000 (458752 bytes)
257 04:52:54.895698 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 04:52:54.905764 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 04:52:54.912163 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 04:52:54.919153 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 04:52:54.922277 Recovery requested (1009000e)
262 04:52:54.925838 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 04:52:54.937257 tlcl_extend: response is 0
264 04:52:54.943970 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 04:52:54.953534 tlcl_extend: response is 0
266 04:52:54.959981 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 04:52:54.966579 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 04:52:54.973221 BS: verstage times (exec / console): total (unknown) / 142 ms
269 04:52:54.973309
270 04:52:54.973377
271 04:52:54.986392 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 04:52:54.993253 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 04:52:54.996406 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 04:52:54.999496 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 04:52:55.006572 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 04:52:55.009801 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 04:52:55.013021 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 04:52:55.016194 TCO_STS: 0000 0000
279 04:52:55.019495 GEN_PMCON: d0015038 00002200
280 04:52:55.023195 GBLRST_CAUSE: 00000000 00000000
281 04:52:55.026504 HPR_CAUSE0: 00000000
282 04:52:55.026591 prev_sleep_state 5
283 04:52:55.029866 Boot Count incremented to 9407
284 04:52:55.036058 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 04:52:55.042938 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 04:52:55.052536 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 04:52:55.059090 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 04:52:55.062750 Chrome EC: UHEPI supported
289 04:52:55.069135 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 04:52:55.080960 Probing TPM: done!
291 04:52:55.089272 Connected to device vid:did:rid of 1ae0:0028:00
292 04:52:55.096044 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 04:52:55.106705 Initialized TPM device CR50 revision 0
294 04:52:55.116050 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 04:52:55.122843 MRC: Hash idx 0x100b comparison successful.
296 04:52:55.126000 MRC cache found, size faa8
297 04:52:55.126086 bootmode is set to: 2
298 04:52:55.129473 SPD index = 0
299 04:52:55.135928 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 04:52:55.138959 SPD: module type is LPDDR4X
301 04:52:55.142705 SPD: module part number is MT53E512M64D4NW-046
302 04:52:55.149050 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 04:52:55.152366 SPD: device width 16 bits, bus width 16 bits
304 04:52:55.158758 SPD: module size is 1024 MB (per channel)
305 04:52:55.590650 CBMEM:
306 04:52:55.594157 IMD: root @ 0x76fff000 254 entries.
307 04:52:55.597769 IMD: root @ 0x76ffec00 62 entries.
308 04:52:55.600778 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 04:52:55.607518 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 04:52:55.610840 External stage cache:
311 04:52:55.614266 IMD: root @ 0x7b3ff000 254 entries.
312 04:52:55.617233 IMD: root @ 0x7b3fec00 62 entries.
313 04:52:55.632394 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 04:52:55.639242 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 04:52:55.645802 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 04:52:55.659931 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 04:52:55.666849 cse_lite: Skip switching to RW in the recovery path
318 04:52:55.666966 8 DIMMs found
319 04:52:55.667035 SMM Memory Map
320 04:52:55.670850 SMRAM : 0x7b000000 0x800000
321 04:52:55.674051 Subregion 0: 0x7b000000 0x200000
322 04:52:55.677499 Subregion 1: 0x7b200000 0x200000
323 04:52:55.680850 Subregion 2: 0x7b400000 0x400000
324 04:52:55.683881 top_of_ram = 0x77000000
325 04:52:55.690870 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 04:52:55.693795 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 04:52:55.700711 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 04:52:55.704146 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 04:52:55.713933 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 04:52:55.720380 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 04:52:55.730559 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 04:52:55.733694 Processing 211 relocs. Offset value of 0x74c0b000
333 04:52:55.742374 BS: romstage times (exec / console): total (unknown) / 277 ms
334 04:52:55.748522
335 04:52:55.748637
336 04:52:55.758604 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 04:52:55.762153 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 04:52:55.771964 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 04:52:55.779005 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 04:52:55.785205 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 04:52:55.791673 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 04:52:55.838526 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 04:52:55.845327 Processing 5008 relocs. Offset value of 0x75d98000
344 04:52:55.848789 BS: postcar times (exec / console): total (unknown) / 59 ms
345 04:52:55.851906
346 04:52:55.851993
347 04:52:55.862443 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 04:52:55.862532 Normal boot
349 04:52:55.865251 FW_CONFIG value is 0x804c02
350 04:52:55.868664 PCI: 00:07.0 disabled by fw_config
351 04:52:55.872056 PCI: 00:07.1 disabled by fw_config
352 04:52:55.875674 PCI: 00:0d.2 disabled by fw_config
353 04:52:55.879108 PCI: 00:1c.7 disabled by fw_config
354 04:52:55.885535 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 04:52:55.892614 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 04:52:55.895071 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 04:52:55.898560 GENERIC: 0.0 disabled by fw_config
358 04:52:55.902058 GENERIC: 1.0 disabled by fw_config
359 04:52:55.908489 fw_config match found: DB_USB=USB3_ACTIVE
360 04:52:55.912089 fw_config match found: DB_USB=USB3_ACTIVE
361 04:52:55.914880 fw_config match found: DB_USB=USB3_ACTIVE
362 04:52:55.921681 fw_config match found: DB_USB=USB3_ACTIVE
363 04:52:55.924905 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 04:52:55.931556 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 04:52:55.941382 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 04:52:55.948001 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 04:52:55.951243 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 04:52:55.958122 microcode: Update skipped, already up-to-date
369 04:52:55.964628 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 04:52:55.992200 Detected 4 core, 8 thread CPU.
371 04:52:55.995709 Setting up SMI for CPU
372 04:52:55.999946 IED base = 0x7b400000
373 04:52:56.000031 IED size = 0x00400000
374 04:52:56.002426 Will perform SMM setup.
375 04:52:56.008812 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 04:52:56.015861 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 04:52:56.022145 Processing 16 relocs. Offset value of 0x00030000
378 04:52:56.025490 Attempting to start 7 APs
379 04:52:56.028964 Waiting for 10ms after sending INIT.
380 04:52:56.043951 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 04:52:56.044038 done.
382 04:52:56.047576 AP: slot 5 apic_id 6.
383 04:52:56.051219 AP: slot 4 apic_id 7.
384 04:52:56.051304 AP: slot 7 apic_id 4.
385 04:52:56.054243 AP: slot 3 apic_id 5.
386 04:52:56.057527 AP: slot 6 apic_id 2.
387 04:52:56.057628 AP: slot 2 apic_id 3.
388 04:52:56.064380 Waiting for 2nd SIPI to complete...done.
389 04:52:56.071057 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 04:52:56.077385 Processing 13 relocs. Offset value of 0x00038000
391 04:52:56.080769 Unable to locate Global NVS
392 04:52:56.087591 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 04:52:56.090520 Installing permanent SMM handler to 0x7b000000
394 04:52:56.100509 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 04:52:56.103930 Processing 794 relocs. Offset value of 0x7b010000
396 04:52:56.113860 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 04:52:56.116993 Processing 13 relocs. Offset value of 0x7b008000
398 04:52:56.124173 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 04:52:56.130899 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 04:52:56.133924 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 04:52:56.140838 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 04:52:56.147011 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 04:52:56.153458 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 04:52:56.160421 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 04:52:56.160508 Unable to locate Global NVS
406 04:52:56.170325 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 04:52:56.173262 Clearing SMI status registers
408 04:52:56.173348 SMI_STS: PM1
409 04:52:56.176997 PM1_STS: PWRBTN
410 04:52:56.183504 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 04:52:56.187468 In relocation handler: CPU 0
412 04:52:56.190219 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 04:52:56.196806 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 04:52:56.196910 Relocation complete.
415 04:52:56.206571 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 04:52:56.210083 In relocation handler: CPU 1
417 04:52:56.213460 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 04:52:56.213545 Relocation complete.
419 04:52:56.222983 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
420 04:52:56.226482 In relocation handler: CPU 4
421 04:52:56.230281 New SMBASE=0x7afff000 IEDBASE=0x7b400000
422 04:52:56.230367 Relocation complete.
423 04:52:56.239747 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
424 04:52:56.242868 In relocation handler: CPU 5
425 04:52:56.246029 New SMBASE=0x7affec00 IEDBASE=0x7b400000
426 04:52:56.249388 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 04:52:56.252975 Relocation complete.
428 04:52:56.259747 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
429 04:52:56.262575 In relocation handler: CPU 6
430 04:52:56.266056 New SMBASE=0x7affe800 IEDBASE=0x7b400000
431 04:52:56.272748 Writing SMRR. base = 0x7b000006, mask=0xff800c00
432 04:52:56.272832 Relocation complete.
433 04:52:56.282741 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
434 04:52:56.282828 In relocation handler: CPU 2
435 04:52:56.289441 New SMBASE=0x7afff800 IEDBASE=0x7b400000
436 04:52:56.289527 Relocation complete.
437 04:52:56.298891 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
438 04:52:56.298976 In relocation handler: CPU 3
439 04:52:56.305489 New SMBASE=0x7afff400 IEDBASE=0x7b400000
440 04:52:56.305599 Relocation complete.
441 04:52:56.315708 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 04:52:56.315793 In relocation handler: CPU 7
443 04:52:56.322250 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 04:52:56.325379 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 04:52:56.328804 Relocation complete.
446 04:52:56.328891 Initializing CPU #0
447 04:52:56.332468 CPU: vendor Intel device 806c1
448 04:52:56.336237 CPU: family 06, model 8c, stepping 01
449 04:52:56.339940 Clearing out pending MCEs
450 04:52:56.343321 Setting up local APIC...
451 04:52:56.346332 apic_id: 0x00 done.
452 04:52:56.349428 Turbo is available but hidden
453 04:52:56.349512 Turbo is available and visible
454 04:52:56.356202 microcode: Update skipped, already up-to-date
455 04:52:56.359692 CPU #0 initialized
456 04:52:56.359776 Initializing CPU #2
457 04:52:56.362743 Initializing CPU #6
458 04:52:56.366517 CPU: vendor Intel device 806c1
459 04:52:56.369421 CPU: family 06, model 8c, stepping 01
460 04:52:56.372994 CPU: vendor Intel device 806c1
461 04:52:56.376166 CPU: family 06, model 8c, stepping 01
462 04:52:56.379263 Clearing out pending MCEs
463 04:52:56.382491 Clearing out pending MCEs
464 04:52:56.382575 Setting up local APIC...
465 04:52:56.386407 Initializing CPU #4
466 04:52:56.389409 Initializing CPU #5
467 04:52:56.389492 CPU: vendor Intel device 806c1
468 04:52:56.396191 CPU: family 06, model 8c, stepping 01
469 04:52:56.399428 CPU: vendor Intel device 806c1
470 04:52:56.402670 CPU: family 06, model 8c, stepping 01
471 04:52:56.402757 Clearing out pending MCEs
472 04:52:56.406116 Clearing out pending MCEs
473 04:52:56.409073 Setting up local APIC...
474 04:52:56.412493 Setting up local APIC...
475 04:52:56.412577 Initializing CPU #3
476 04:52:56.415653 Initializing CPU #7
477 04:52:56.419581 CPU: vendor Intel device 806c1
478 04:52:56.422405 CPU: family 06, model 8c, stepping 01
479 04:52:56.425557 CPU: vendor Intel device 806c1
480 04:52:56.429144 CPU: family 06, model 8c, stepping 01
481 04:52:56.432313 Clearing out pending MCEs
482 04:52:56.436028 Clearing out pending MCEs
483 04:52:56.439094 Setting up local APIC...
484 04:52:56.439178 Setting up local APIC...
485 04:52:56.442636 Setting up local APIC...
486 04:52:56.445834 apic_id: 0x06 done.
487 04:52:56.445944 apic_id: 0x07 done.
488 04:52:56.452273 microcode: Update skipped, already up-to-date
489 04:52:56.455614 microcode: Update skipped, already up-to-date
490 04:52:56.459343 CPU #5 initialized
491 04:52:56.459426 CPU #4 initialized
492 04:52:56.462243 apic_id: 0x03 done.
493 04:52:56.465812 apic_id: 0x02 done.
494 04:52:56.468977 microcode: Update skipped, already up-to-date
495 04:52:56.472034 microcode: Update skipped, already up-to-date
496 04:52:56.475498 CPU #2 initialized
497 04:52:56.478949 CPU #6 initialized
498 04:52:56.479033 apic_id: 0x04 done.
499 04:52:56.482570 apic_id: 0x05 done.
500 04:52:56.485453 microcode: Update skipped, already up-to-date
501 04:52:56.492133 microcode: Update skipped, already up-to-date
502 04:52:56.492217 CPU #7 initialized
503 04:52:56.495232 CPU #3 initialized
504 04:52:56.495316 Initializing CPU #1
505 04:52:56.498990 CPU: vendor Intel device 806c1
506 04:52:56.505410 CPU: family 06, model 8c, stepping 01
507 04:52:56.505495 Clearing out pending MCEs
508 04:52:56.508847 Setting up local APIC...
509 04:52:56.512101 apic_id: 0x01 done.
510 04:52:56.515374 microcode: Update skipped, already up-to-date
511 04:52:56.518499 CPU #1 initialized
512 04:52:56.521931 bsp_do_flight_plan done after 455 msecs.
513 04:52:56.525403 CPU: frequency set to 4000 MHz
514 04:52:56.528398 Enabling SMIs.
515 04:52:56.535273 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
516 04:52:56.549740 SATAXPCIE1 indicates PCIe NVMe is present
517 04:52:56.553130 Probing TPM: done!
518 04:52:56.556480 Connected to device vid:did:rid of 1ae0:0028:00
519 04:52:56.566713 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 04:52:56.570136 Initialized TPM device CR50 revision 0
521 04:52:56.573336 Enabling S0i3.4
522 04:52:56.580021 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 04:52:56.583431 Found a VBT of 8704 bytes after decompression
524 04:52:56.590026 cse_lite: CSE RO boot. HybridStorageMode disabled
525 04:52:56.596919 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 04:52:56.672788 FSPS returned 0
527 04:52:56.676039 Executing Phase 1 of FspMultiPhaseSiInit
528 04:52:56.686564 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 04:52:56.689301 port C0 DISC req: usage 1 usb3 1 usb2 5
530 04:52:56.692992 Raw Buffer output 0 00000511
531 04:52:56.695610 Raw Buffer output 1 00000000
532 04:52:56.699950 pmc_send_ipc_cmd succeeded
533 04:52:56.706332 port C1 DISC req: usage 1 usb3 2 usb2 3
534 04:52:56.706419 Raw Buffer output 0 00000321
535 04:52:56.709304 Raw Buffer output 1 00000000
536 04:52:56.714046 pmc_send_ipc_cmd succeeded
537 04:52:56.719276 Detected 4 core, 8 thread CPU.
538 04:52:56.722639 Detected 4 core, 8 thread CPU.
539 04:52:56.956553 Display FSP Version Info HOB
540 04:52:56.959456 Reference Code - CPU = a.0.4c.31
541 04:52:56.963351 uCode Version = 0.0.0.86
542 04:52:56.966050 TXT ACM version = ff.ff.ff.ffff
543 04:52:56.969601 Reference Code - ME = a.0.4c.31
544 04:52:56.972659 MEBx version = 0.0.0.0
545 04:52:56.976550 ME Firmware Version = Consumer SKU
546 04:52:56.979676 Reference Code - PCH = a.0.4c.31
547 04:52:56.983280 PCH-CRID Status = Disabled
548 04:52:56.986280 PCH-CRID Original Value = ff.ff.ff.ffff
549 04:52:56.989735 PCH-CRID New Value = ff.ff.ff.ffff
550 04:52:56.992875 OPROM - RST - RAID = ff.ff.ff.ffff
551 04:52:56.996219 PCH Hsio Version = 4.0.0.0
552 04:52:56.999162 Reference Code - SA - System Agent = a.0.4c.31
553 04:52:57.002797 Reference Code - MRC = 2.0.0.1
554 04:52:57.005759 SA - PCIe Version = a.0.4c.31
555 04:52:57.009261 SA-CRID Status = Disabled
556 04:52:57.012812 SA-CRID Original Value = 0.0.0.1
557 04:52:57.015928 SA-CRID New Value = 0.0.0.1
558 04:52:57.019369 OPROM - VBIOS = ff.ff.ff.ffff
559 04:52:57.022917 IO Manageability Engine FW Version = 11.1.4.0
560 04:52:57.026036 PHY Build Version = 0.0.0.e0
561 04:52:57.029589 Thunderbolt(TM) FW Version = 0.0.0.0
562 04:52:57.036289 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 04:52:57.039277 ITSS IRQ Polarities Before:
564 04:52:57.039360 IPC0: 0xffffffff
565 04:52:57.042367 IPC1: 0xffffffff
566 04:52:57.042454 IPC2: 0xffffffff
567 04:52:57.045939 IPC3: 0xffffffff
568 04:52:57.049323 ITSS IRQ Polarities After:
569 04:52:57.049406 IPC0: 0xffffffff
570 04:52:57.052421 IPC1: 0xffffffff
571 04:52:57.052505 IPC2: 0xffffffff
572 04:52:57.055657 IPC3: 0xffffffff
573 04:52:57.059482 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 04:52:57.072410 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 04:52:57.082162 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 04:52:57.095468 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 04:52:57.102024 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
578 04:52:57.105454 Enumerating buses...
579 04:52:57.108760 Show all devs... Before device enumeration.
580 04:52:57.112306 Root Device: enabled 1
581 04:52:57.112392 DOMAIN: 0000: enabled 1
582 04:52:57.115784 CPU_CLUSTER: 0: enabled 1
583 04:52:57.118640 PCI: 00:00.0: enabled 1
584 04:52:57.122156 PCI: 00:02.0: enabled 1
585 04:52:57.122242 PCI: 00:04.0: enabled 1
586 04:52:57.125836 PCI: 00:05.0: enabled 1
587 04:52:57.129015 PCI: 00:06.0: enabled 0
588 04:52:57.132150 PCI: 00:07.0: enabled 0
589 04:52:57.132235 PCI: 00:07.1: enabled 0
590 04:52:57.135562 PCI: 00:07.2: enabled 0
591 04:52:57.138516 PCI: 00:07.3: enabled 0
592 04:52:57.138601 PCI: 00:08.0: enabled 1
593 04:52:57.142115 PCI: 00:09.0: enabled 0
594 04:52:57.145325 PCI: 00:0a.0: enabled 0
595 04:52:57.148808 PCI: 00:0d.0: enabled 1
596 04:52:57.148893 PCI: 00:0d.1: enabled 0
597 04:52:57.152335 PCI: 00:0d.2: enabled 0
598 04:52:57.155811 PCI: 00:0d.3: enabled 0
599 04:52:57.158585 PCI: 00:0e.0: enabled 0
600 04:52:57.158670 PCI: 00:10.2: enabled 1
601 04:52:57.162048 PCI: 00:10.6: enabled 0
602 04:52:57.165405 PCI: 00:10.7: enabled 0
603 04:52:57.168861 PCI: 00:12.0: enabled 0
604 04:52:57.168945 PCI: 00:12.6: enabled 0
605 04:52:57.171603 PCI: 00:13.0: enabled 0
606 04:52:57.175446 PCI: 00:14.0: enabled 1
607 04:52:57.178548 PCI: 00:14.1: enabled 0
608 04:52:57.178633 PCI: 00:14.2: enabled 1
609 04:52:57.181732 PCI: 00:14.3: enabled 1
610 04:52:57.185058 PCI: 00:15.0: enabled 1
611 04:52:57.185144 PCI: 00:15.1: enabled 1
612 04:52:57.188368 PCI: 00:15.2: enabled 1
613 04:52:57.191963 PCI: 00:15.3: enabled 1
614 04:52:57.195392 PCI: 00:16.0: enabled 1
615 04:52:57.195477 PCI: 00:16.1: enabled 0
616 04:52:57.198621 PCI: 00:16.2: enabled 0
617 04:52:57.201563 PCI: 00:16.3: enabled 0
618 04:52:57.204930 PCI: 00:16.4: enabled 0
619 04:52:57.205016 PCI: 00:16.5: enabled 0
620 04:52:57.208369 PCI: 00:17.0: enabled 1
621 04:52:57.211828 PCI: 00:19.0: enabled 0
622 04:52:57.214991 PCI: 00:19.1: enabled 1
623 04:52:57.215077 PCI: 00:19.2: enabled 0
624 04:52:57.218293 PCI: 00:1c.0: enabled 1
625 04:52:57.221553 PCI: 00:1c.1: enabled 0
626 04:52:57.221678 PCI: 00:1c.2: enabled 0
627 04:52:57.224833 PCI: 00:1c.3: enabled 0
628 04:52:57.228639 PCI: 00:1c.4: enabled 0
629 04:52:57.231704 PCI: 00:1c.5: enabled 0
630 04:52:57.231789 PCI: 00:1c.6: enabled 1
631 04:52:57.235226 PCI: 00:1c.7: enabled 0
632 04:52:57.238414 PCI: 00:1d.0: enabled 1
633 04:52:57.241865 PCI: 00:1d.1: enabled 0
634 04:52:57.241951 PCI: 00:1d.2: enabled 1
635 04:52:57.244767 PCI: 00:1d.3: enabled 0
636 04:52:57.248154 PCI: 00:1e.0: enabled 1
637 04:52:57.251485 PCI: 00:1e.1: enabled 0
638 04:52:57.251570 PCI: 00:1e.2: enabled 1
639 04:52:57.254902 PCI: 00:1e.3: enabled 1
640 04:52:57.258127 PCI: 00:1f.0: enabled 1
641 04:52:57.261517 PCI: 00:1f.1: enabled 0
642 04:52:57.261640 PCI: 00:1f.2: enabled 1
643 04:52:57.264794 PCI: 00:1f.3: enabled 1
644 04:52:57.268306 PCI: 00:1f.4: enabled 0
645 04:52:57.268390 PCI: 00:1f.5: enabled 1
646 04:52:57.271389 PCI: 00:1f.6: enabled 0
647 04:52:57.274757 PCI: 00:1f.7: enabled 0
648 04:52:57.278551 APIC: 00: enabled 1
649 04:52:57.278636 GENERIC: 0.0: enabled 1
650 04:52:57.281414 GENERIC: 0.0: enabled 1
651 04:52:57.284864 GENERIC: 1.0: enabled 1
652 04:52:57.284950 GENERIC: 0.0: enabled 1
653 04:52:57.288074 GENERIC: 1.0: enabled 1
654 04:52:57.291289 USB0 port 0: enabled 1
655 04:52:57.295321 GENERIC: 0.0: enabled 1
656 04:52:57.295406 USB0 port 0: enabled 1
657 04:52:57.298399 GENERIC: 0.0: enabled 1
658 04:52:57.301550 I2C: 00:1a: enabled 1
659 04:52:57.301657 I2C: 00:31: enabled 1
660 04:52:57.304884 I2C: 00:32: enabled 1
661 04:52:57.308060 I2C: 00:10: enabled 1
662 04:52:57.308145 I2C: 00:15: enabled 1
663 04:52:57.311706 GENERIC: 0.0: enabled 0
664 04:52:57.314777 GENERIC: 1.0: enabled 0
665 04:52:57.317788 GENERIC: 0.0: enabled 1
666 04:52:57.317874 SPI: 00: enabled 1
667 04:52:57.321285 SPI: 00: enabled 1
668 04:52:57.325106 PNP: 0c09.0: enabled 1
669 04:52:57.325191 GENERIC: 0.0: enabled 1
670 04:52:57.328359 USB3 port 0: enabled 1
671 04:52:57.331382 USB3 port 1: enabled 1
672 04:52:57.331467 USB3 port 2: enabled 0
673 04:52:57.334565 USB3 port 3: enabled 0
674 04:52:57.337941 USB2 port 0: enabled 0
675 04:52:57.341373 USB2 port 1: enabled 1
676 04:52:57.341458 USB2 port 2: enabled 1
677 04:52:57.344783 USB2 port 3: enabled 0
678 04:52:57.348086 USB2 port 4: enabled 1
679 04:52:57.348170 USB2 port 5: enabled 0
680 04:52:57.351309 USB2 port 6: enabled 0
681 04:52:57.355275 USB2 port 7: enabled 0
682 04:52:57.355360 USB2 port 8: enabled 0
683 04:52:57.357783 USB2 port 9: enabled 0
684 04:52:57.361226 USB3 port 0: enabled 0
685 04:52:57.364640 USB3 port 1: enabled 1
686 04:52:57.364725 USB3 port 2: enabled 0
687 04:52:57.367607 USB3 port 3: enabled 0
688 04:52:57.371309 GENERIC: 0.0: enabled 1
689 04:52:57.371393 GENERIC: 1.0: enabled 1
690 04:52:57.374478 APIC: 01: enabled 1
691 04:52:57.378094 APIC: 03: enabled 1
692 04:52:57.378180 APIC: 05: enabled 1
693 04:52:57.381243 APIC: 07: enabled 1
694 04:52:57.384351 APIC: 06: enabled 1
695 04:52:57.384436 APIC: 02: enabled 1
696 04:52:57.387850 APIC: 04: enabled 1
697 04:52:57.387935 Compare with tree...
698 04:52:57.391055 Root Device: enabled 1
699 04:52:57.394250 DOMAIN: 0000: enabled 1
700 04:52:57.397510 PCI: 00:00.0: enabled 1
701 04:52:57.401260 PCI: 00:02.0: enabled 1
702 04:52:57.401345 PCI: 00:04.0: enabled 1
703 04:52:57.404633 GENERIC: 0.0: enabled 1
704 04:52:57.407620 PCI: 00:05.0: enabled 1
705 04:52:57.410913 PCI: 00:06.0: enabled 0
706 04:52:57.414432 PCI: 00:07.0: enabled 0
707 04:52:57.414533 GENERIC: 0.0: enabled 1
708 04:52:57.417541 PCI: 00:07.1: enabled 0
709 04:52:57.421430 GENERIC: 1.0: enabled 1
710 04:52:57.424384 PCI: 00:07.2: enabled 0
711 04:52:57.427763 GENERIC: 0.0: enabled 1
712 04:52:57.427848 PCI: 00:07.3: enabled 0
713 04:52:57.431214 GENERIC: 1.0: enabled 1
714 04:52:57.434185 PCI: 00:08.0: enabled 1
715 04:52:57.437538 PCI: 00:09.0: enabled 0
716 04:52:57.440604 PCI: 00:0a.0: enabled 0
717 04:52:57.440689 PCI: 00:0d.0: enabled 1
718 04:52:57.444517 USB0 port 0: enabled 1
719 04:52:57.447769 USB3 port 0: enabled 1
720 04:52:57.450739 USB3 port 1: enabled 1
721 04:52:57.454530 USB3 port 2: enabled 0
722 04:52:57.454615 USB3 port 3: enabled 0
723 04:52:57.457421 PCI: 00:0d.1: enabled 0
724 04:52:57.460702 PCI: 00:0d.2: enabled 0
725 04:52:57.464131 GENERIC: 0.0: enabled 1
726 04:52:57.467483 PCI: 00:0d.3: enabled 0
727 04:52:57.470726 PCI: 00:0e.0: enabled 0
728 04:52:57.470811 PCI: 00:10.2: enabled 1
729 04:52:57.473983 PCI: 00:10.6: enabled 0
730 04:52:57.477390 PCI: 00:10.7: enabled 0
731 04:52:57.480612 PCI: 00:12.0: enabled 0
732 04:52:57.480698 PCI: 00:12.6: enabled 0
733 04:52:57.484054 PCI: 00:13.0: enabled 0
734 04:52:57.487140 PCI: 00:14.0: enabled 1
735 04:52:57.490690 USB0 port 0: enabled 1
736 04:52:57.493940 USB2 port 0: enabled 0
737 04:52:57.497337 USB2 port 1: enabled 1
738 04:52:57.497423 USB2 port 2: enabled 1
739 04:52:57.500640 USB2 port 3: enabled 0
740 04:52:57.503589 USB2 port 4: enabled 1
741 04:52:57.506980 USB2 port 5: enabled 0
742 04:52:57.510530 USB2 port 6: enabled 0
743 04:52:57.510615 USB2 port 7: enabled 0
744 04:52:57.514079 USB2 port 8: enabled 0
745 04:52:57.517333 USB2 port 9: enabled 0
746 04:52:57.520625 USB3 port 0: enabled 0
747 04:52:57.524054 USB3 port 1: enabled 1
748 04:52:57.526977 USB3 port 2: enabled 0
749 04:52:57.527063 USB3 port 3: enabled 0
750 04:52:57.530428 PCI: 00:14.1: enabled 0
751 04:52:57.533767 PCI: 00:14.2: enabled 1
752 04:52:57.537149 PCI: 00:14.3: enabled 1
753 04:52:57.540609 GENERIC: 0.0: enabled 1
754 04:52:57.540693 PCI: 00:15.0: enabled 1
755 04:52:57.543680 I2C: 00:1a: enabled 1
756 04:52:57.547099 I2C: 00:31: enabled 1
757 04:52:57.550391 I2C: 00:32: enabled 1
758 04:52:57.550476 PCI: 00:15.1: enabled 1
759 04:52:57.553577 I2C: 00:10: enabled 1
760 04:52:57.556889 PCI: 00:15.2: enabled 1
761 04:52:57.560129 PCI: 00:15.3: enabled 1
762 04:52:57.563404 PCI: 00:16.0: enabled 1
763 04:52:57.563489 PCI: 00:16.1: enabled 0
764 04:52:57.567132 PCI: 00:16.2: enabled 0
765 04:52:57.570518 PCI: 00:16.3: enabled 0
766 04:52:57.573826 PCI: 00:16.4: enabled 0
767 04:52:57.577540 PCI: 00:16.5: enabled 0
768 04:52:57.577647 PCI: 00:17.0: enabled 1
769 04:52:57.580799 PCI: 00:19.0: enabled 0
770 04:52:57.584452 PCI: 00:19.1: enabled 1
771 04:52:57.584538 I2C: 00:15: enabled 1
772 04:52:57.587674 PCI: 00:19.2: enabled 0
773 04:52:57.591095 PCI: 00:1d.0: enabled 1
774 04:52:57.594271 GENERIC: 0.0: enabled 1
775 04:52:57.597503 PCI: 00:1e.0: enabled 1
776 04:52:57.597624 PCI: 00:1e.1: enabled 0
777 04:52:57.601052 PCI: 00:1e.2: enabled 1
778 04:52:57.604136 SPI: 00: enabled 1
779 04:52:57.607518 PCI: 00:1e.3: enabled 1
780 04:52:57.607604 SPI: 00: enabled 1
781 04:52:57.610951 PCI: 00:1f.0: enabled 1
782 04:52:57.662499 PNP: 0c09.0: enabled 1
783 04:52:57.662594 PCI: 00:1f.1: enabled 0
784 04:52:57.662667 PCI: 00:1f.2: enabled 1
785 04:52:57.662743 GENERIC: 0.0: enabled 1
786 04:52:57.662999 GENERIC: 0.0: enabled 1
787 04:52:57.663072 GENERIC: 1.0: enabled 1
788 04:52:57.663134 PCI: 00:1f.3: enabled 1
789 04:52:57.663207 PCI: 00:1f.4: enabled 0
790 04:52:57.663299 PCI: 00:1f.5: enabled 1
791 04:52:57.663546 PCI: 00:1f.6: enabled 0
792 04:52:57.663611 PCI: 00:1f.7: enabled 0
793 04:52:57.663669 CPU_CLUSTER: 0: enabled 1
794 04:52:57.663726 APIC: 00: enabled 1
795 04:52:57.663783 APIC: 01: enabled 1
796 04:52:57.664264 APIC: 03: enabled 1
797 04:52:57.664350 APIC: 05: enabled 1
798 04:52:57.664417 APIC: 07: enabled 1
799 04:52:57.665117 APIC: 06: enabled 1
800 04:52:57.665205 APIC: 02: enabled 1
801 04:52:57.665273 APIC: 04: enabled 1
802 04:52:57.712834 Root Device scanning...
803 04:52:57.712944 scan_static_bus for Root Device
804 04:52:57.713206 DOMAIN: 0000 enabled
805 04:52:57.713280 CPU_CLUSTER: 0 enabled
806 04:52:57.713356 DOMAIN: 0000 scanning...
807 04:52:57.713925 PCI: pci_scan_bus for bus 00
808 04:52:57.714012 PCI: 00:00.0 [8086/0000] ops
809 04:52:57.714288 PCI: 00:00.0 [8086/9a12] enabled
810 04:52:57.714365 PCI: 00:02.0 [8086/0000] bus ops
811 04:52:57.714476 PCI: 00:02.0 [8086/9a40] enabled
812 04:52:57.714557 PCI: 00:04.0 [8086/0000] bus ops
813 04:52:57.714826 PCI: 00:04.0 [8086/9a03] enabled
814 04:52:57.714921 PCI: 00:05.0 [8086/9a19] enabled
815 04:52:57.715008 PCI: 00:07.0 [0000/0000] hidden
816 04:52:57.715367 PCI: 00:08.0 [8086/9a11] enabled
817 04:52:57.715450 PCI: 00:0a.0 [8086/9a0d] disabled
818 04:52:57.718026 PCI: 00:0d.0 [8086/0000] bus ops
819 04:52:57.718110 PCI: 00:0d.0 [8086/9a13] enabled
820 04:52:57.721497 PCI: 00:14.0 [8086/0000] bus ops
821 04:52:57.724756 PCI: 00:14.0 [8086/a0ed] enabled
822 04:52:57.727953 PCI: 00:14.2 [8086/a0ef] enabled
823 04:52:57.731735 PCI: 00:14.3 [8086/0000] bus ops
824 04:52:57.734583 PCI: 00:14.3 [8086/a0f0] enabled
825 04:52:57.738117 PCI: 00:15.0 [8086/0000] bus ops
826 04:52:57.741755 PCI: 00:15.0 [8086/a0e8] enabled
827 04:52:57.744834 PCI: 00:15.1 [8086/0000] bus ops
828 04:52:57.748252 PCI: 00:15.1 [8086/a0e9] enabled
829 04:52:57.751515 PCI: 00:15.2 [8086/0000] bus ops
830 04:52:57.754973 PCI: 00:15.2 [8086/a0ea] enabled
831 04:52:57.758034 PCI: 00:15.3 [8086/0000] bus ops
832 04:52:57.761215 PCI: 00:15.3 [8086/a0eb] enabled
833 04:52:57.764513 PCI: 00:16.0 [8086/0000] ops
834 04:52:57.768178 PCI: 00:16.0 [8086/a0e0] enabled
835 04:52:57.774788 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 04:52:57.778090 PCI: 00:19.0 [8086/0000] bus ops
837 04:52:57.781227 PCI: 00:19.0 [8086/a0c5] disabled
838 04:52:57.784580 PCI: 00:19.1 [8086/0000] bus ops
839 04:52:57.787903 PCI: 00:19.1 [8086/a0c6] enabled
840 04:52:57.791110 PCI: 00:1d.0 [8086/0000] bus ops
841 04:52:57.794300 PCI: 00:1d.0 [8086/a0b0] enabled
842 04:52:57.797685 PCI: 00:1e.0 [8086/0000] ops
843 04:52:57.800920 PCI: 00:1e.0 [8086/a0a8] enabled
844 04:52:57.804834 PCI: 00:1e.2 [8086/0000] bus ops
845 04:52:57.807648 PCI: 00:1e.2 [8086/a0aa] enabled
846 04:52:57.810898 PCI: 00:1e.3 [8086/0000] bus ops
847 04:52:57.814712 PCI: 00:1e.3 [8086/a0ab] enabled
848 04:52:57.817965 PCI: 00:1f.0 [8086/0000] bus ops
849 04:52:57.820985 PCI: 00:1f.0 [8086/a087] enabled
850 04:52:57.821079 RTC Init
851 04:52:57.824387 Set power on after power failure.
852 04:52:57.827742 Disabling Deep S3
853 04:52:57.831103 Disabling Deep S3
854 04:52:57.831191 Disabling Deep S4
855 04:52:57.834108 Disabling Deep S4
856 04:52:57.834194 Disabling Deep S5
857 04:52:57.837975 Disabling Deep S5
858 04:52:57.841317 PCI: 00:1f.2 [0000/0000] hidden
859 04:52:57.844603 PCI: 00:1f.3 [8086/0000] bus ops
860 04:52:57.847512 PCI: 00:1f.3 [8086/a0c8] enabled
861 04:52:57.850944 PCI: 00:1f.5 [8086/0000] bus ops
862 04:52:57.854171 PCI: 00:1f.5 [8086/a0a4] enabled
863 04:52:57.857472 PCI: Leftover static devices:
864 04:52:57.857558 PCI: 00:10.2
865 04:52:57.860765 PCI: 00:10.6
866 04:52:57.860850 PCI: 00:10.7
867 04:52:57.860916 PCI: 00:06.0
868 04:52:57.864078 PCI: 00:07.1
869 04:52:57.864164 PCI: 00:07.2
870 04:52:57.867814 PCI: 00:07.3
871 04:52:57.867913 PCI: 00:09.0
872 04:52:57.867980 PCI: 00:0d.1
873 04:52:57.870915 PCI: 00:0d.2
874 04:52:57.871005 PCI: 00:0d.3
875 04:52:57.874236 PCI: 00:0e.0
876 04:52:57.874324 PCI: 00:12.0
877 04:52:57.874391 PCI: 00:12.6
878 04:52:57.877723 PCI: 00:13.0
879 04:52:57.877817 PCI: 00:14.1
880 04:52:57.880858 PCI: 00:16.1
881 04:52:57.880950 PCI: 00:16.2
882 04:52:57.884132 PCI: 00:16.3
883 04:52:57.884221 PCI: 00:16.4
884 04:52:57.884287 PCI: 00:16.5
885 04:52:57.887374 PCI: 00:17.0
886 04:52:57.887466 PCI: 00:19.2
887 04:52:57.890821 PCI: 00:1e.1
888 04:52:57.890908 PCI: 00:1f.1
889 04:52:57.890975 PCI: 00:1f.4
890 04:52:57.894091 PCI: 00:1f.6
891 04:52:57.894180 PCI: 00:1f.7
892 04:52:57.897484 PCI: Check your devicetree.cb.
893 04:52:57.900823 PCI: 00:02.0 scanning...
894 04:52:57.903932 scan_generic_bus for PCI: 00:02.0
895 04:52:57.907390 scan_generic_bus for PCI: 00:02.0 done
896 04:52:57.913843 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 04:52:57.913931 PCI: 00:04.0 scanning...
898 04:52:57.920568 scan_generic_bus for PCI: 00:04.0
899 04:52:57.920658 GENERIC: 0.0 enabled
900 04:52:57.927050 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 04:52:57.930790 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 04:52:57.933949 PCI: 00:0d.0 scanning...
903 04:52:57.937415 scan_static_bus for PCI: 00:0d.0
904 04:52:57.940428 USB0 port 0 enabled
905 04:52:57.943855 USB0 port 0 scanning...
906 04:52:57.947166 scan_static_bus for USB0 port 0
907 04:52:57.947251 USB3 port 0 enabled
908 04:52:57.950207 USB3 port 1 enabled
909 04:52:57.954012 USB3 port 2 disabled
910 04:52:57.954154 USB3 port 3 disabled
911 04:52:57.957475 USB3 port 0 scanning...
912 04:52:57.960408 scan_static_bus for USB3 port 0
913 04:52:57.963821 scan_static_bus for USB3 port 0 done
914 04:52:57.970070 scan_bus: bus USB3 port 0 finished in 6 msecs
915 04:52:57.970155 USB3 port 1 scanning...
916 04:52:57.973412 scan_static_bus for USB3 port 1
917 04:52:57.976977 scan_static_bus for USB3 port 1 done
918 04:52:57.983272 scan_bus: bus USB3 port 1 finished in 6 msecs
919 04:52:57.986838 scan_static_bus for USB0 port 0 done
920 04:52:57.990329 scan_bus: bus USB0 port 0 finished in 43 msecs
921 04:52:57.996820 scan_static_bus for PCI: 00:0d.0 done
922 04:52:57.999710 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 04:52:58.003542 PCI: 00:14.0 scanning...
924 04:52:58.006709 scan_static_bus for PCI: 00:14.0
925 04:52:58.006804 USB0 port 0 enabled
926 04:52:58.010102 USB0 port 0 scanning...
927 04:52:58.012973 scan_static_bus for USB0 port 0
928 04:52:58.016281 USB2 port 0 disabled
929 04:52:58.016365 USB2 port 1 enabled
930 04:52:58.019872 USB2 port 2 enabled
931 04:52:58.023380 USB2 port 3 disabled
932 04:52:58.023464 USB2 port 4 enabled
933 04:52:58.026758 USB2 port 5 disabled
934 04:52:58.029503 USB2 port 6 disabled
935 04:52:58.029626 USB2 port 7 disabled
936 04:52:58.032955 USB2 port 8 disabled
937 04:52:58.036890 USB2 port 9 disabled
938 04:52:58.036974 USB3 port 0 disabled
939 04:52:58.039818 USB3 port 1 enabled
940 04:52:58.043317 USB3 port 2 disabled
941 04:52:58.043402 USB3 port 3 disabled
942 04:52:58.046431 USB2 port 1 scanning...
943 04:52:58.049856 scan_static_bus for USB2 port 1
944 04:52:58.053087 scan_static_bus for USB2 port 1 done
945 04:52:58.056607 scan_bus: bus USB2 port 1 finished in 6 msecs
946 04:52:58.059522 USB2 port 2 scanning...
947 04:52:58.062800 scan_static_bus for USB2 port 2
948 04:52:58.066520 scan_static_bus for USB2 port 2 done
949 04:52:58.073128 scan_bus: bus USB2 port 2 finished in 6 msecs
950 04:52:58.073213 USB2 port 4 scanning...
951 04:52:58.076542 scan_static_bus for USB2 port 4
952 04:52:58.083113 scan_static_bus for USB2 port 4 done
953 04:52:58.086485 scan_bus: bus USB2 port 4 finished in 6 msecs
954 04:52:58.089854 USB3 port 1 scanning...
955 04:52:58.092731 scan_static_bus for USB3 port 1
956 04:52:58.096452 scan_static_bus for USB3 port 1 done
957 04:52:58.099404 scan_bus: bus USB3 port 1 finished in 6 msecs
958 04:52:58.102725 scan_static_bus for USB0 port 0 done
959 04:52:58.109452 scan_bus: bus USB0 port 0 finished in 93 msecs
960 04:52:58.113070 scan_static_bus for PCI: 00:14.0 done
961 04:52:58.116455 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 04:52:58.119497 PCI: 00:14.3 scanning...
963 04:52:58.122665 scan_static_bus for PCI: 00:14.3
964 04:52:58.125989 GENERIC: 0.0 enabled
965 04:52:58.129681 scan_static_bus for PCI: 00:14.3 done
966 04:52:58.132908 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 04:52:58.136173 PCI: 00:15.0 scanning...
968 04:52:58.139182 scan_static_bus for PCI: 00:15.0
969 04:52:58.142643 I2C: 00:1a enabled
970 04:52:58.145606 I2C: 00:31 enabled
971 04:52:58.145690 I2C: 00:32 enabled
972 04:52:58.149122 scan_static_bus for PCI: 00:15.0 done
973 04:52:58.156551 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
974 04:52:58.156636 PCI: 00:15.1 scanning...
975 04:52:58.159745 scan_static_bus for PCI: 00:15.1
976 04:52:58.163254 I2C: 00:10 enabled
977 04:52:58.166346 scan_static_bus for PCI: 00:15.1 done
978 04:52:58.169718 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 04:52:58.173088 PCI: 00:15.2 scanning...
980 04:52:58.176465 scan_static_bus for PCI: 00:15.2
981 04:52:58.179942 scan_static_bus for PCI: 00:15.2 done
982 04:52:58.186651 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 04:52:58.189471 PCI: 00:15.3 scanning...
984 04:52:58.192892 scan_static_bus for PCI: 00:15.3
985 04:52:58.196242 scan_static_bus for PCI: 00:15.3 done
986 04:52:58.199689 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 04:52:58.202797 PCI: 00:19.1 scanning...
988 04:52:58.205908 scan_static_bus for PCI: 00:19.1
989 04:52:58.209519 I2C: 00:15 enabled
990 04:52:58.212564 scan_static_bus for PCI: 00:19.1 done
991 04:52:58.215960 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 04:52:58.219393 PCI: 00:1d.0 scanning...
993 04:52:58.222826 do_pci_scan_bridge for PCI: 00:1d.0
994 04:52:58.226646 PCI: pci_scan_bus for bus 01
995 04:52:58.229506 PCI: 01:00.0 [1c5c/174a] enabled
996 04:52:58.232374 GENERIC: 0.0 enabled
997 04:52:58.236145 Enabling Common Clock Configuration
998 04:52:58.239382 L1 Sub-State supported from root port 29
999 04:52:58.242531 L1 Sub-State Support = 0xf
1000 04:52:58.246004 CommonModeRestoreTime = 0x28
1001 04:52:58.249411 Power On Value = 0x16, Power On Scale = 0x0
1002 04:52:58.252619 ASPM: Enabled L1
1003 04:52:58.255921 PCIe: Max_Payload_Size adjusted to 128
1004 04:52:58.259331 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 04:52:58.262706 PCI: 00:1e.2 scanning...
1006 04:52:58.265732 scan_generic_bus for PCI: 00:1e.2
1007 04:52:58.269349 SPI: 00 enabled
1008 04:52:58.275802 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 04:52:58.279344 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 04:52:58.282606 PCI: 00:1e.3 scanning...
1011 04:52:58.285545 scan_generic_bus for PCI: 00:1e.3
1012 04:52:58.285664 SPI: 00 enabled
1013 04:52:58.292417 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 04:52:58.299261 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 04:52:58.299347 PCI: 00:1f.0 scanning...
1016 04:52:58.302993 scan_static_bus for PCI: 00:1f.0
1017 04:52:58.305917 PNP: 0c09.0 enabled
1018 04:52:58.309544 PNP: 0c09.0 scanning...
1019 04:52:58.312587 scan_static_bus for PNP: 0c09.0
1020 04:52:58.316120 scan_static_bus for PNP: 0c09.0 done
1021 04:52:58.319271 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 04:52:58.325603 scan_static_bus for PCI: 00:1f.0 done
1023 04:52:58.329108 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 04:52:58.332454 PCI: 00:1f.2 scanning...
1025 04:52:58.335907 scan_static_bus for PCI: 00:1f.2
1026 04:52:58.335992 GENERIC: 0.0 enabled
1027 04:52:58.339056 GENERIC: 0.0 scanning...
1028 04:52:58.342376 scan_static_bus for GENERIC: 0.0
1029 04:52:58.345489 GENERIC: 0.0 enabled
1030 04:52:58.349014 GENERIC: 1.0 enabled
1031 04:52:58.352645 scan_static_bus for GENERIC: 0.0 done
1032 04:52:58.355471 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 04:52:58.358884 scan_static_bus for PCI: 00:1f.2 done
1034 04:52:58.365457 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 04:52:58.368695 PCI: 00:1f.3 scanning...
1036 04:52:58.371943 scan_static_bus for PCI: 00:1f.3
1037 04:52:58.375458 scan_static_bus for PCI: 00:1f.3 done
1038 04:52:58.378930 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 04:52:58.382040 PCI: 00:1f.5 scanning...
1040 04:52:58.385217 scan_generic_bus for PCI: 00:1f.5
1041 04:52:58.388543 scan_generic_bus for PCI: 00:1f.5 done
1042 04:52:58.395320 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 04:52:58.398523 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 04:52:58.402080 scan_static_bus for Root Device done
1045 04:52:58.408714 scan_bus: bus Root Device finished in 736 msecs
1046 04:52:58.408798 done
1047 04:52:58.415046 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 04:52:58.418441 Chrome EC: UHEPI supported
1049 04:52:58.425055 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 04:52:58.428389 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 04:52:58.434914 SPI flash protection: WPSW=0 SRP0=0
1052 04:52:58.438162 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 04:52:58.444902 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 04:52:58.448254 found VGA at PCI: 00:02.0
1055 04:52:58.451790 Setting up VGA for PCI: 00:02.0
1056 04:52:58.454761 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 04:52:58.461588 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 04:52:58.461673 Allocating resources...
1059 04:52:58.464710 Reading resources...
1060 04:52:58.468344 Root Device read_resources bus 0 link: 0
1061 04:52:58.474968 DOMAIN: 0000 read_resources bus 0 link: 0
1062 04:52:58.477920 PCI: 00:04.0 read_resources bus 1 link: 0
1063 04:52:58.485400 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 04:52:58.487970 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 04:52:58.494347 USB0 port 0 read_resources bus 0 link: 0
1066 04:52:58.497804 USB0 port 0 read_resources bus 0 link: 0 done
1067 04:52:58.504585 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 04:52:58.507682 PCI: 00:14.0 read_resources bus 0 link: 0
1069 04:52:58.510960 USB0 port 0 read_resources bus 0 link: 0
1070 04:52:58.518162 USB0 port 0 read_resources bus 0 link: 0 done
1071 04:52:58.521503 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 04:52:58.528579 PCI: 00:14.3 read_resources bus 0 link: 0
1073 04:52:58.531847 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 04:52:58.538566 PCI: 00:15.0 read_resources bus 0 link: 0
1075 04:52:58.541541 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 04:52:58.548698 PCI: 00:15.1 read_resources bus 0 link: 0
1077 04:52:58.551715 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 04:52:58.558725 PCI: 00:19.1 read_resources bus 0 link: 0
1079 04:52:58.562371 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 04:52:58.568730 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 04:52:58.571956 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 04:52:58.578700 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 04:52:58.582670 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 04:52:58.588595 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 04:52:58.592253 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 04:52:58.598833 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 04:52:58.602093 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 04:52:58.605379 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 04:52:58.612125 GENERIC: 0.0 read_resources bus 0 link: 0
1090 04:52:58.615618 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 04:52:58.621786 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 04:52:58.629015 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 04:52:58.632099 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 04:52:58.638514 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 04:52:58.641733 Root Device read_resources bus 0 link: 0 done
1096 04:52:58.644954 Done reading resources.
1097 04:52:58.648396 Show resources in subtree (Root Device)...After reading.
1098 04:52:58.655074 Root Device child on link 0 DOMAIN: 0000
1099 04:52:58.658413 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 04:52:58.668363 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 04:52:58.678372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 04:52:58.678458 PCI: 00:00.0
1103 04:52:58.688236 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 04:52:58.698029 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 04:52:58.708066 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 04:52:58.718598 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 04:52:58.727802 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 04:52:58.734599 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 04:52:58.744513 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 04:52:58.754423 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 04:52:58.764463 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 04:52:58.774640 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 04:52:58.784240 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 04:52:58.791049 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 04:52:58.800728 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 04:52:58.810982 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 04:52:58.820866 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 04:52:58.830829 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 04:52:58.840533 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 04:52:58.847936 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 04:52:58.857718 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 04:52:58.867303 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 04:52:58.870337 PCI: 00:02.0
1124 04:52:58.880778 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 04:52:58.890491 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 04:52:58.896979 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 04:52:58.903644 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 04:52:58.913843 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 04:52:58.913931 GENERIC: 0.0
1130 04:52:58.917168 PCI: 00:05.0
1131 04:52:58.927059 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 04:52:58.930042 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 04:52:58.933529 GENERIC: 0.0
1134 04:52:58.933650 PCI: 00:08.0
1135 04:52:58.943603 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 04:52:58.947672 PCI: 00:0a.0
1137 04:52:58.950313 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 04:52:58.960201 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 04:52:58.966731 USB0 port 0 child on link 0 USB3 port 0
1140 04:52:58.966816 USB3 port 0
1141 04:52:58.970298 USB3 port 1
1142 04:52:58.970388 USB3 port 2
1143 04:52:58.973640 USB3 port 3
1144 04:52:58.976679 PCI: 00:14.0 child on link 0 USB0 port 0
1145 04:52:58.986485 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 04:52:58.990094 USB0 port 0 child on link 0 USB2 port 0
1147 04:52:58.993796 USB2 port 0
1148 04:52:58.993882 USB2 port 1
1149 04:52:58.996936 USB2 port 2
1150 04:52:58.997033 USB2 port 3
1151 04:52:59.000097 USB2 port 4
1152 04:52:59.000187 USB2 port 5
1153 04:52:59.003310 USB2 port 6
1154 04:52:59.006729 USB2 port 7
1155 04:52:59.006815 USB2 port 8
1156 04:52:59.010069 USB2 port 9
1157 04:52:59.010155 USB3 port 0
1158 04:52:59.013168 USB3 port 1
1159 04:52:59.013254 USB3 port 2
1160 04:52:59.016820 USB3 port 3
1161 04:52:59.016906 PCI: 00:14.2
1162 04:52:59.026347 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 04:52:59.036252 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 04:52:59.043017 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 04:52:59.052891 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 04:52:59.052978 GENERIC: 0.0
1167 04:52:59.056951 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 04:52:59.066441 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 04:52:59.069793 I2C: 00:1a
1170 04:52:59.069879 I2C: 00:31
1171 04:52:59.073385 I2C: 00:32
1172 04:52:59.076339 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 04:52:59.086032 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 04:52:59.089763 I2C: 00:10
1175 04:52:59.089848 PCI: 00:15.2
1176 04:52:59.099774 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 04:52:59.102854 PCI: 00:15.3
1178 04:52:59.112607 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 04:52:59.112698 PCI: 00:16.0
1180 04:52:59.122659 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 04:52:59.125810 PCI: 00:19.0
1182 04:52:59.129014 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 04:52:59.139606 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 04:52:59.139693 I2C: 00:15
1185 04:52:59.145879 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 04:52:59.152407 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 04:52:59.162557 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 04:52:59.172556 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 04:52:59.175609 GENERIC: 0.0
1190 04:52:59.175699 PCI: 01:00.0
1191 04:52:59.185940 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 04:52:59.195608 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 04:52:59.205685 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 04:52:59.205774 PCI: 00:1e.0
1195 04:52:59.219101 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 04:52:59.222401 PCI: 00:1e.2 child on link 0 SPI: 00
1197 04:52:59.232561 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 04:52:59.232647 SPI: 00
1199 04:52:59.235326 PCI: 00:1e.3 child on link 0 SPI: 00
1200 04:52:59.245445 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 04:52:59.248800 SPI: 00
1202 04:52:59.252345 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 04:52:59.261758 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 04:52:59.261844 PNP: 0c09.0
1205 04:52:59.271790 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 04:52:59.274930 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 04:52:59.285288 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 04:52:59.295141 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 04:52:59.298372 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 04:52:59.301963 GENERIC: 0.0
1211 04:52:59.302047 GENERIC: 1.0
1212 04:52:59.305160 PCI: 00:1f.3
1213 04:52:59.315243 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 04:52:59.324719 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 04:52:59.324806 PCI: 00:1f.5
1216 04:52:59.334720 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 04:52:59.341469 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 04:52:59.341554 APIC: 00
1219 04:52:59.341659 APIC: 01
1220 04:52:59.344510 APIC: 03
1221 04:52:59.344594 APIC: 05
1222 04:52:59.344661 APIC: 07
1223 04:52:59.348105 APIC: 06
1224 04:52:59.348190 APIC: 02
1225 04:52:59.351367 APIC: 04
1226 04:52:59.357985 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 04:52:59.364508 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 04:52:59.371325 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 04:52:59.374664 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 04:52:59.381057 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 04:52:59.384523 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 04:52:59.388034 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 04:52:59.394585 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 04:52:59.404534 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 04:52:59.410876 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 04:52:59.417501 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 04:52:59.424200 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 04:52:59.431032 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 04:52:59.437815 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 04:52:59.447602 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 04:52:59.450685 DOMAIN: 0000: Resource ranges:
1242 04:52:59.454232 * Base: 1000, Size: 800, Tag: 100
1243 04:52:59.457421 * Base: 1900, Size: e700, Tag: 100
1244 04:52:59.464224 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 04:52:59.470978 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 04:52:59.477398 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 04:52:59.484117 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 04:52:59.490455 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 04:52:59.500733 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 04:52:59.507176 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 04:52:59.513514 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 04:52:59.524110 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 04:52:59.530251 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 04:52:59.537341 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 04:52:59.543818 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 04:52:59.553347 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 04:52:59.560357 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 04:52:59.566993 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 04:52:59.576746 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 04:52:59.583785 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 04:52:59.589926 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 04:52:59.599980 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 04:52:59.607001 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 04:52:59.613099 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 04:52:59.623080 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 04:52:59.629836 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 04:52:59.636573 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 04:52:59.646613 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 04:52:59.649593 DOMAIN: 0000: Resource ranges:
1270 04:52:59.653065 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 04:52:59.656625 * Base: d0000000, Size: 28000000, Tag: 200
1272 04:52:59.662768 * Base: fa000000, Size: 1000000, Tag: 200
1273 04:52:59.666535 * Base: fb001000, Size: 2fff000, Tag: 200
1274 04:52:59.669905 * Base: fe010000, Size: 2e000, Tag: 200
1275 04:52:59.672928 * Base: fe03f000, Size: d41000, Tag: 200
1276 04:52:59.679957 * Base: fed88000, Size: 8000, Tag: 200
1277 04:52:59.683032 * Base: fed93000, Size: d000, Tag: 200
1278 04:52:59.686184 * Base: feda2000, Size: 1e000, Tag: 200
1279 04:52:59.689620 * Base: fede0000, Size: 1220000, Tag: 200
1280 04:52:59.696099 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 04:52:59.702599 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 04:52:59.709287 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 04:52:59.715858 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 04:52:59.722797 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 04:52:59.729165 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 04:52:59.735793 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 04:52:59.742678 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 04:52:59.749077 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 04:52:59.756129 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 04:52:59.762288 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 04:52:59.769075 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 04:52:59.775777 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 04:52:59.782553 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 04:52:59.788913 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 04:52:59.795667 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 04:52:59.802153 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 04:52:59.809064 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 04:52:59.815408 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 04:52:59.822408 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 04:52:59.828949 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 04:52:59.835693 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 04:52:59.842563 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 04:52:59.848892 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 04:52:59.858851 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 04:52:59.862096 PCI: 00:1d.0: Resource ranges:
1306 04:52:59.865267 * Base: 7fc00000, Size: 100000, Tag: 200
1307 04:52:59.871803 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 04:52:59.878306 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 04:52:59.885246 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 04:52:59.891750 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 04:52:59.902006 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 04:52:59.904954 Root Device assign_resources, bus 0 link: 0
1313 04:52:59.908389 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 04:52:59.918125 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 04:52:59.925116 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 04:52:59.934695 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 04:52:59.941397 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 04:52:59.948021 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 04:52:59.951669 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 04:52:59.961508 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 04:52:59.967707 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 04:52:59.977530 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 04:52:59.981122 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 04:52:59.984292 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 04:52:59.994148 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 04:52:59.997912 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 04:53:00.003976 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 04:53:00.011217 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 04:53:00.020787 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 04:53:00.027176 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 04:53:00.030511 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 04:53:00.037054 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 04:53:00.043685 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 04:53:00.050615 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 04:53:00.053982 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 04:53:00.063532 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 04:53:00.067364 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 04:53:00.070500 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 04:53:00.080380 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 04:53:00.086768 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 04:53:00.096962 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 04:53:00.103570 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 04:53:00.109745 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 04:53:00.113383 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 04:53:00.123493 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 04:53:00.133311 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 04:53:00.139832 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 04:53:00.146665 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 04:53:00.153045 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 04:53:00.163176 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 04:53:00.169621 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 04:53:00.173174 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 04:53:00.183192 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 04:53:00.186201 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 04:53:00.193019 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 04:53:00.199505 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 04:53:00.206067 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 04:53:00.209026 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 04:53:00.212691 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 04:53:00.219642 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 04:53:00.222796 LPC: Trying to open IO window from 800 size 1ff
1362 04:53:00.232453 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 04:53:00.239490 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 04:53:00.249098 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 04:53:00.252212 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 04:53:00.259188 Root Device assign_resources, bus 0 link: 0
1367 04:53:00.259273 Done setting resources.
1368 04:53:00.265905 Show resources in subtree (Root Device)...After assigning values.
1369 04:53:00.272196 Root Device child on link 0 DOMAIN: 0000
1370 04:53:00.275598 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 04:53:00.285765 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 04:53:00.295624 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 04:53:00.295710 PCI: 00:00.0
1374 04:53:00.305473 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 04:53:00.315438 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 04:53:00.325744 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 04:53:00.335364 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 04:53:00.342109 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 04:53:00.352214 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 04:53:00.361992 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 04:53:00.371730 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 04:53:00.381684 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 04:53:00.391407 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 04:53:00.398214 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 04:53:00.408699 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 04:53:00.418125 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 04:53:00.428294 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 04:53:00.434495 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 04:53:00.444617 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 04:53:00.454722 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 04:53:00.464655 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 04:53:00.474789 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 04:53:00.484489 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 04:53:00.484591 PCI: 00:02.0
1395 04:53:00.497808 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 04:53:00.507472 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 04:53:00.517445 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 04:53:00.520943 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 04:53:00.530845 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 04:53:00.534435 GENERIC: 0.0
1401 04:53:00.534530 PCI: 00:05.0
1402 04:53:00.544482 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 04:53:00.550944 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 04:53:00.551040 GENERIC: 0.0
1405 04:53:00.554243 PCI: 00:08.0
1406 04:53:00.563917 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 04:53:00.564016 PCI: 00:0a.0
1408 04:53:00.570847 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 04:53:00.580700 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 04:53:00.584047 USB0 port 0 child on link 0 USB3 port 0
1411 04:53:00.587425 USB3 port 0
1412 04:53:00.587523 USB3 port 1
1413 04:53:00.590845 USB3 port 2
1414 04:53:00.590943 USB3 port 3
1415 04:53:00.597090 PCI: 00:14.0 child on link 0 USB0 port 0
1416 04:53:00.607203 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 04:53:00.610362 USB0 port 0 child on link 0 USB2 port 0
1418 04:53:00.614033 USB2 port 0
1419 04:53:00.614131 USB2 port 1
1420 04:53:00.617005 USB2 port 2
1421 04:53:00.617110 USB2 port 3
1422 04:53:00.620279 USB2 port 4
1423 04:53:00.620382 USB2 port 5
1424 04:53:00.623784 USB2 port 6
1425 04:53:00.623881 USB2 port 7
1426 04:53:00.627089 USB2 port 8
1427 04:53:00.627186 USB2 port 9
1428 04:53:00.630556 USB3 port 0
1429 04:53:00.633520 USB3 port 1
1430 04:53:00.633645 USB3 port 2
1431 04:53:00.636817 USB3 port 3
1432 04:53:00.636913 PCI: 00:14.2
1433 04:53:00.646838 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 04:53:00.657044 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 04:53:00.663841 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 04:53:00.673503 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 04:53:00.673638 GENERIC: 0.0
1438 04:53:00.680519 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 04:53:00.690501 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 04:53:00.690601 I2C: 00:1a
1441 04:53:00.693527 I2C: 00:31
1442 04:53:00.693645 I2C: 00:32
1443 04:53:00.696568 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 04:53:00.709880 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 04:53:00.709981 I2C: 00:10
1446 04:53:00.713254 PCI: 00:15.2
1447 04:53:00.723363 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 04:53:00.723463 PCI: 00:15.3
1449 04:53:00.732948 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 04:53:00.736710 PCI: 00:16.0
1451 04:53:00.746826 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 04:53:00.746925 PCI: 00:19.0
1453 04:53:00.752942 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 04:53:00.762995 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 04:53:00.763094 I2C: 00:15
1456 04:53:00.769796 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 04:53:00.776551 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 04:53:00.789835 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 04:53:00.799637 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 04:53:00.802751 GENERIC: 0.0
1461 04:53:00.802836 PCI: 01:00.0
1462 04:53:00.812848 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 04:53:00.822790 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 04:53:00.835998 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 04:53:00.836129 PCI: 00:1e.0
1466 04:53:00.846161 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 04:53:00.852493 PCI: 00:1e.2 child on link 0 SPI: 00
1468 04:53:00.862219 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 04:53:00.862345 SPI: 00
1470 04:53:00.865988 PCI: 00:1e.3 child on link 0 SPI: 00
1471 04:53:00.878709 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 04:53:00.878837 SPI: 00
1473 04:53:00.882636 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 04:53:00.892386 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 04:53:00.892514 PNP: 0c09.0
1476 04:53:00.901973 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 04:53:00.905711 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 04:53:00.915553 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 04:53:00.925385 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 04:53:00.928521 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 04:53:00.931763 GENERIC: 0.0
1482 04:53:00.935119 GENERIC: 1.0
1483 04:53:00.935245 PCI: 00:1f.3
1484 04:53:00.945010 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 04:53:00.955052 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 04:53:00.958552 PCI: 00:1f.5
1487 04:53:00.968509 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 04:53:00.971986 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 04:53:00.975090 APIC: 00
1490 04:53:00.975211 APIC: 01
1491 04:53:00.975320 APIC: 03
1492 04:53:00.978674 APIC: 05
1493 04:53:00.978794 APIC: 07
1494 04:53:00.981516 APIC: 06
1495 04:53:00.981668 APIC: 02
1496 04:53:00.981775 APIC: 04
1497 04:53:00.985089 Done allocating resources.
1498 04:53:00.992060 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 04:53:00.998108 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 04:53:01.001674 Configure GPIOs for I2S audio on UP4.
1501 04:53:01.008264 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 04:53:01.011810 Enabling resources...
1503 04:53:01.014597 PCI: 00:00.0 subsystem <- 8086/9a12
1504 04:53:01.018844 PCI: 00:00.0 cmd <- 06
1505 04:53:01.021602 PCI: 00:02.0 subsystem <- 8086/9a40
1506 04:53:01.024641 PCI: 00:02.0 cmd <- 03
1507 04:53:01.028323 PCI: 00:04.0 subsystem <- 8086/9a03
1508 04:53:01.028442 PCI: 00:04.0 cmd <- 02
1509 04:53:01.035093 PCI: 00:05.0 subsystem <- 8086/9a19
1510 04:53:01.035218 PCI: 00:05.0 cmd <- 02
1511 04:53:01.038081 PCI: 00:08.0 subsystem <- 8086/9a11
1512 04:53:01.041220 PCI: 00:08.0 cmd <- 06
1513 04:53:01.044470 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 04:53:01.047725 PCI: 00:0d.0 cmd <- 02
1515 04:53:01.051821 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 04:53:01.054265 PCI: 00:14.0 cmd <- 02
1517 04:53:01.058041 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 04:53:01.061228 PCI: 00:14.2 cmd <- 02
1519 04:53:01.064761 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 04:53:01.067535 PCI: 00:14.3 cmd <- 02
1521 04:53:01.070854 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 04:53:01.074389 PCI: 00:15.0 cmd <- 02
1523 04:53:01.077556 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 04:53:01.077710 PCI: 00:15.1 cmd <- 02
1525 04:53:01.084631 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 04:53:01.084753 PCI: 00:15.2 cmd <- 02
1527 04:53:01.087481 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 04:53:01.091237 PCI: 00:15.3 cmd <- 02
1529 04:53:01.094346 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 04:53:01.097373 PCI: 00:16.0 cmd <- 02
1531 04:53:01.100644 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 04:53:01.103938 PCI: 00:19.1 cmd <- 02
1533 04:53:01.107255 PCI: 00:1d.0 bridge ctrl <- 0013
1534 04:53:01.111008 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 04:53:01.113951 PCI: 00:1d.0 cmd <- 06
1536 04:53:01.117133 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 04:53:01.120642 PCI: 00:1e.0 cmd <- 06
1538 04:53:01.123844 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 04:53:01.127429 PCI: 00:1e.2 cmd <- 06
1540 04:53:01.130885 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 04:53:01.130969 PCI: 00:1e.3 cmd <- 02
1542 04:53:01.137277 PCI: 00:1f.0 subsystem <- 8086/a087
1543 04:53:01.137361 PCI: 00:1f.0 cmd <- 407
1544 04:53:01.141004 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 04:53:01.144061 PCI: 00:1f.3 cmd <- 02
1546 04:53:01.147114 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 04:53:01.150478 PCI: 00:1f.5 cmd <- 406
1548 04:53:01.155440 PCI: 01:00.0 cmd <- 02
1549 04:53:01.160036 done.
1550 04:53:01.163141 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 04:53:01.166142 Initializing devices...
1552 04:53:01.169456 Root Device init
1553 04:53:01.173118 Chrome EC: Set SMI mask to 0x0000000000000000
1554 04:53:01.179544 Chrome EC: clear events_b mask to 0x0000000000000000
1555 04:53:01.186339 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 04:53:01.192560 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 04:53:01.199389 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 04:53:01.202510 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 04:53:01.210384 fw_config match found: DB_USB=USB3_ACTIVE
1560 04:53:01.213503 Configure Right Type-C port orientation for retimer
1561 04:53:01.217001 Root Device init finished in 45 msecs
1562 04:53:01.221197 PCI: 00:00.0 init
1563 04:53:01.224322 CPU TDP = 9 Watts
1564 04:53:01.224406 CPU PL1 = 9 Watts
1565 04:53:01.227780 CPU PL2 = 40 Watts
1566 04:53:01.231197 CPU PL4 = 83 Watts
1567 04:53:01.234477 PCI: 00:00.0 init finished in 8 msecs
1568 04:53:01.234561 PCI: 00:02.0 init
1569 04:53:01.237762 GMA: Found VBT in CBFS
1570 04:53:01.241086 GMA: Found valid VBT in CBFS
1571 04:53:01.247865 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 04:53:01.254106 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 04:53:01.257880 PCI: 00:02.0 init finished in 18 msecs
1574 04:53:01.260683 PCI: 00:05.0 init
1575 04:53:01.264002 PCI: 00:05.0 init finished in 0 msecs
1576 04:53:01.267266 PCI: 00:08.0 init
1577 04:53:01.270662 PCI: 00:08.0 init finished in 0 msecs
1578 04:53:01.273964 PCI: 00:14.0 init
1579 04:53:01.277401 PCI: 00:14.0 init finished in 0 msecs
1580 04:53:01.280835 PCI: 00:14.2 init
1581 04:53:01.284426 PCI: 00:14.2 init finished in 0 msecs
1582 04:53:01.287357 PCI: 00:15.0 init
1583 04:53:01.290528 I2C bus 0 version 0x3230302a
1584 04:53:01.293794 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 04:53:01.297044 PCI: 00:15.0 init finished in 6 msecs
1586 04:53:01.297130 PCI: 00:15.1 init
1587 04:53:01.300456 I2C bus 1 version 0x3230302a
1588 04:53:01.303940 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 04:53:01.310556 PCI: 00:15.1 init finished in 6 msecs
1590 04:53:01.310642 PCI: 00:15.2 init
1591 04:53:01.314066 I2C bus 2 version 0x3230302a
1592 04:53:01.316889 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 04:53:01.320161 PCI: 00:15.2 init finished in 6 msecs
1594 04:53:01.323739 PCI: 00:15.3 init
1595 04:53:01.327189 I2C bus 3 version 0x3230302a
1596 04:53:01.330310 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 04:53:01.333917 PCI: 00:15.3 init finished in 6 msecs
1598 04:53:01.337105 PCI: 00:16.0 init
1599 04:53:01.340839 PCI: 00:16.0 init finished in 0 msecs
1600 04:53:01.343566 PCI: 00:19.1 init
1601 04:53:01.347092 I2C bus 5 version 0x3230302a
1602 04:53:01.350518 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 04:53:01.354101 PCI: 00:19.1 init finished in 6 msecs
1604 04:53:01.357063 PCI: 00:1d.0 init
1605 04:53:01.357148 Initializing PCH PCIe bridge.
1606 04:53:01.363474 PCI: 00:1d.0 init finished in 3 msecs
1607 04:53:01.366994 PCI: 00:1f.0 init
1608 04:53:01.369982 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 04:53:01.373692 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 04:53:01.376999 IOAPIC: ID = 0x02
1611 04:53:01.379992 IOAPIC: Dumping registers
1612 04:53:01.380077 reg 0x0000: 0x02000000
1613 04:53:01.383247 reg 0x0001: 0x00770020
1614 04:53:01.387158 reg 0x0002: 0x00000000
1615 04:53:01.390049 PCI: 00:1f.0 init finished in 21 msecs
1616 04:53:01.393387 PCI: 00:1f.2 init
1617 04:53:01.397137 Disabling ACPI via APMC.
1618 04:53:01.397222 APMC done.
1619 04:53:01.400107 PCI: 00:1f.2 init finished in 5 msecs
1620 04:53:01.413658 PCI: 01:00.0 init
1621 04:53:01.416735 PCI: 01:00.0 init finished in 0 msecs
1622 04:53:01.420524 PNP: 0c09.0 init
1623 04:53:01.423686 Google Chrome EC uptime: 8.410 seconds
1624 04:53:01.430366 Google Chrome AP resets since EC boot: 1
1625 04:53:01.433924 Google Chrome most recent AP reset causes:
1626 04:53:01.436701 0.347: 32775 shutdown: entering G3
1627 04:53:01.443669 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 04:53:01.446652 PNP: 0c09.0 init finished in 22 msecs
1629 04:53:01.452408 Devices initialized
1630 04:53:01.455687 Show all devs... After init.
1631 04:53:01.458999 Root Device: enabled 1
1632 04:53:01.459085 DOMAIN: 0000: enabled 1
1633 04:53:01.462517 CPU_CLUSTER: 0: enabled 1
1634 04:53:01.465751 PCI: 00:00.0: enabled 1
1635 04:53:01.469087 PCI: 00:02.0: enabled 1
1636 04:53:01.469172 PCI: 00:04.0: enabled 1
1637 04:53:01.472440 PCI: 00:05.0: enabled 1
1638 04:53:01.476041 PCI: 00:06.0: enabled 0
1639 04:53:01.479338 PCI: 00:07.0: enabled 0
1640 04:53:01.479423 PCI: 00:07.1: enabled 0
1641 04:53:01.482250 PCI: 00:07.2: enabled 0
1642 04:53:01.486020 PCI: 00:07.3: enabled 0
1643 04:53:01.489269 PCI: 00:08.0: enabled 1
1644 04:53:01.489354 PCI: 00:09.0: enabled 0
1645 04:53:01.492059 PCI: 00:0a.0: enabled 0
1646 04:53:01.495294 PCI: 00:0d.0: enabled 1
1647 04:53:01.498865 PCI: 00:0d.1: enabled 0
1648 04:53:01.498950 PCI: 00:0d.2: enabled 0
1649 04:53:01.502247 PCI: 00:0d.3: enabled 0
1650 04:53:01.505654 PCI: 00:0e.0: enabled 0
1651 04:53:01.508571 PCI: 00:10.2: enabled 1
1652 04:53:01.508657 PCI: 00:10.6: enabled 0
1653 04:53:01.511794 PCI: 00:10.7: enabled 0
1654 04:53:01.515856 PCI: 00:12.0: enabled 0
1655 04:53:01.515942 PCI: 00:12.6: enabled 0
1656 04:53:01.518721 PCI: 00:13.0: enabled 0
1657 04:53:01.522181 PCI: 00:14.0: enabled 1
1658 04:53:01.525501 PCI: 00:14.1: enabled 0
1659 04:53:01.525625 PCI: 00:14.2: enabled 1
1660 04:53:01.528851 PCI: 00:14.3: enabled 1
1661 04:53:01.531792 PCI: 00:15.0: enabled 1
1662 04:53:01.535539 PCI: 00:15.1: enabled 1
1663 04:53:01.535625 PCI: 00:15.2: enabled 1
1664 04:53:01.538298 PCI: 00:15.3: enabled 1
1665 04:53:01.542083 PCI: 00:16.0: enabled 1
1666 04:53:01.545296 PCI: 00:16.1: enabled 0
1667 04:53:01.545382 PCI: 00:16.2: enabled 0
1668 04:53:01.548542 PCI: 00:16.3: enabled 0
1669 04:53:01.552185 PCI: 00:16.4: enabled 0
1670 04:53:01.555069 PCI: 00:16.5: enabled 0
1671 04:53:01.555155 PCI: 00:17.0: enabled 0
1672 04:53:01.558262 PCI: 00:19.0: enabled 0
1673 04:53:01.561494 PCI: 00:19.1: enabled 1
1674 04:53:01.561615 PCI: 00:19.2: enabled 0
1675 04:53:01.565364 PCI: 00:1c.0: enabled 1
1676 04:53:01.568214 PCI: 00:1c.1: enabled 0
1677 04:53:01.571529 PCI: 00:1c.2: enabled 0
1678 04:53:01.571618 PCI: 00:1c.3: enabled 0
1679 04:53:01.574963 PCI: 00:1c.4: enabled 0
1680 04:53:01.578160 PCI: 00:1c.5: enabled 0
1681 04:53:01.581459 PCI: 00:1c.6: enabled 1
1682 04:53:01.581545 PCI: 00:1c.7: enabled 0
1683 04:53:01.585258 PCI: 00:1d.0: enabled 1
1684 04:53:01.588742 PCI: 00:1d.1: enabled 0
1685 04:53:01.591204 PCI: 00:1d.2: enabled 1
1686 04:53:01.591290 PCI: 00:1d.3: enabled 0
1687 04:53:01.594584 PCI: 00:1e.0: enabled 1
1688 04:53:01.598022 PCI: 00:1e.1: enabled 0
1689 04:53:01.601552 PCI: 00:1e.2: enabled 1
1690 04:53:01.601675 PCI: 00:1e.3: enabled 1
1691 04:53:01.604570 PCI: 00:1f.0: enabled 1
1692 04:53:01.608196 PCI: 00:1f.1: enabled 0
1693 04:53:01.608283 PCI: 00:1f.2: enabled 1
1694 04:53:01.611228 PCI: 00:1f.3: enabled 1
1695 04:53:01.614601 PCI: 00:1f.4: enabled 0
1696 04:53:01.618013 PCI: 00:1f.5: enabled 1
1697 04:53:01.618099 PCI: 00:1f.6: enabled 0
1698 04:53:01.621151 PCI: 00:1f.7: enabled 0
1699 04:53:01.624562 APIC: 00: enabled 1
1700 04:53:01.627683 GENERIC: 0.0: enabled 1
1701 04:53:01.627768 GENERIC: 0.0: enabled 1
1702 04:53:01.630979 GENERIC: 1.0: enabled 1
1703 04:53:01.634416 GENERIC: 0.0: enabled 1
1704 04:53:01.634501 GENERIC: 1.0: enabled 1
1705 04:53:01.637804 USB0 port 0: enabled 1
1706 04:53:01.640964 GENERIC: 0.0: enabled 1
1707 04:53:01.644233 USB0 port 0: enabled 1
1708 04:53:01.644318 GENERIC: 0.0: enabled 1
1709 04:53:01.647834 I2C: 00:1a: enabled 1
1710 04:53:01.651619 I2C: 00:31: enabled 1
1711 04:53:01.651704 I2C: 00:32: enabled 1
1712 04:53:01.654593 I2C: 00:10: enabled 1
1713 04:53:01.657527 I2C: 00:15: enabled 1
1714 04:53:01.660971 GENERIC: 0.0: enabled 0
1715 04:53:01.661057 GENERIC: 1.0: enabled 0
1716 04:53:01.664233 GENERIC: 0.0: enabled 1
1717 04:53:01.667570 SPI: 00: enabled 1
1718 04:53:01.667657 SPI: 00: enabled 1
1719 04:53:01.670877 PNP: 0c09.0: enabled 1
1720 04:53:01.674199 GENERIC: 0.0: enabled 1
1721 04:53:01.674283 USB3 port 0: enabled 1
1722 04:53:01.677533 USB3 port 1: enabled 1
1723 04:53:01.681365 USB3 port 2: enabled 0
1724 04:53:01.681451 USB3 port 3: enabled 0
1725 04:53:01.684041 USB2 port 0: enabled 0
1726 04:53:01.687218 USB2 port 1: enabled 1
1727 04:53:01.690532 USB2 port 2: enabled 1
1728 04:53:01.690617 USB2 port 3: enabled 0
1729 04:53:01.694040 USB2 port 4: enabled 1
1730 04:53:01.697587 USB2 port 5: enabled 0
1731 04:53:01.697686 USB2 port 6: enabled 0
1732 04:53:01.700452 USB2 port 7: enabled 0
1733 04:53:01.703754 USB2 port 8: enabled 0
1734 04:53:01.707493 USB2 port 9: enabled 0
1735 04:53:01.707579 USB3 port 0: enabled 0
1736 04:53:01.710821 USB3 port 1: enabled 1
1737 04:53:01.714036 USB3 port 2: enabled 0
1738 04:53:01.714122 USB3 port 3: enabled 0
1739 04:53:01.717363 GENERIC: 0.0: enabled 1
1740 04:53:01.721069 GENERIC: 1.0: enabled 1
1741 04:53:01.721155 APIC: 01: enabled 1
1742 04:53:01.723973 APIC: 03: enabled 1
1743 04:53:01.727185 APIC: 05: enabled 1
1744 04:53:01.727270 APIC: 07: enabled 1
1745 04:53:01.730573 APIC: 06: enabled 1
1746 04:53:01.734164 APIC: 02: enabled 1
1747 04:53:01.734249 APIC: 04: enabled 1
1748 04:53:01.737214 PCI: 01:00.0: enabled 1
1749 04:53:01.743893 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1750 04:53:01.747153 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 04:53:01.750904 ELOG: NV offset 0xf30000 size 0x1000
1752 04:53:01.758160 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 04:53:01.764140 ELOG: Event(17) added with size 13 at 2022-08-23 03:43:49 UTC
1754 04:53:01.771006 ELOG: Event(92) added with size 9 at 2022-08-23 03:43:49 UTC
1755 04:53:01.777323 ELOG: Event(93) added with size 9 at 2022-08-23 03:43:49 UTC
1756 04:53:01.783990 ELOG: Event(9E) added with size 10 at 2022-08-23 03:43:49 UTC
1757 04:53:01.790744 ELOG: Event(9F) added with size 14 at 2022-08-23 03:43:49 UTC
1758 04:53:01.797872 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 04:53:01.803794 ELOG: Event(A1) added with size 10 at 2022-08-23 03:43:49 UTC
1760 04:53:01.807039 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1761 04:53:01.813780 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1762 04:53:01.817559 Finalize devices...
1763 04:53:01.817679 Devices finalized
1764 04:53:01.823743 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1765 04:53:01.830624 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1766 04:53:01.833562 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1767 04:53:01.840549 ME: HFSTS1 : 0x80030055
1768 04:53:01.843754 ME: HFSTS2 : 0x30280116
1769 04:53:01.847308 ME: HFSTS3 : 0x00000050
1770 04:53:01.853723 ME: HFSTS4 : 0x00004000
1771 04:53:01.856751 ME: HFSTS5 : 0x00000000
1772 04:53:01.860214 ME: HFSTS6 : 0x00400006
1773 04:53:01.866961 ME: Manufacturing Mode : YES
1774 04:53:01.870428 ME: SPI Protection Mode Enabled : NO
1775 04:53:01.873475 ME: FW Partition Table : OK
1776 04:53:01.877305 ME: Bringup Loader Failure : NO
1777 04:53:01.880206 ME: Firmware Init Complete : NO
1778 04:53:01.883785 ME: Boot Options Present : NO
1779 04:53:01.886658 ME: Update In Progress : NO
1780 04:53:01.890085 ME: D0i3 Support : YES
1781 04:53:01.896683 ME: Low Power State Enabled : NO
1782 04:53:01.899939 ME: CPU Replaced : YES
1783 04:53:01.903495 ME: CPU Replacement Valid : YES
1784 04:53:01.907186 ME: Current Working State : 5
1785 04:53:01.910205 ME: Current Operation State : 1
1786 04:53:01.913148 ME: Current Operation Mode : 3
1787 04:53:01.916975 ME: Error Code : 0
1788 04:53:01.919960 ME: Enhanced Debug Mode : NO
1789 04:53:01.923550 ME: CPU Debug Disabled : YES
1790 04:53:01.929887 ME: TXT Support : NO
1791 04:53:01.933024 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1792 04:53:01.943062 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1793 04:53:01.946343 CBFS: 'fallback/slic' not found.
1794 04:53:01.950116 ACPI: Writing ACPI tables at 76b01000.
1795 04:53:01.950202 ACPI: * FACS
1796 04:53:01.953534 ACPI: * DSDT
1797 04:53:01.956342 Ramoops buffer: 0x100000@0x76a00000.
1798 04:53:01.962972 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1799 04:53:01.966353 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1800 04:53:01.969747 Google Chrome EC: version:
1801 04:53:01.973051 ro: voema_v2.0.7540-147f8d37d1
1802 04:53:01.976316 rw: voema_v2.0.7540-147f8d37d1
1803 04:53:01.979655 running image: 2
1804 04:53:01.983065 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1805 04:53:01.988707 ACPI: * FADT
1806 04:53:01.988793 SCI is IRQ9
1807 04:53:01.995073 ACPI: added table 1/32, length now 40
1808 04:53:01.995159 ACPI: * SSDT
1809 04:53:01.998435 Found 1 CPU(s) with 8 core(s) each.
1810 04:53:02.004990 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1811 04:53:02.008411 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1812 04:53:02.011355 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1813 04:53:02.015446 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1814 04:53:02.021715 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1815 04:53:02.028265 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1816 04:53:02.031206 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1817 04:53:02.037960 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1818 04:53:02.044449 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1819 04:53:02.048059 \_SB.PCI0.RP09: Added StorageD3Enable property
1820 04:53:02.054343 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1821 04:53:02.057557 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1822 04:53:02.064519 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1823 04:53:02.067784 PS2K: Passing 80 keymaps to kernel
1824 04:53:02.074720 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1825 04:53:02.080901 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1826 04:53:02.087573 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1827 04:53:02.094079 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1828 04:53:02.100898 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1829 04:53:02.107596 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1830 04:53:02.114065 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1831 04:53:02.120587 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1832 04:53:02.123929 ACPI: added table 2/32, length now 44
1833 04:53:02.124015 ACPI: * MCFG
1834 04:53:02.127296 ACPI: added table 3/32, length now 48
1835 04:53:02.130334 ACPI: * TPM2
1836 04:53:02.133736 TPM2 log created at 0x769f0000
1837 04:53:02.137166 ACPI: added table 4/32, length now 52
1838 04:53:02.140749 ACPI: * MADT
1839 04:53:02.140835 SCI is IRQ9
1840 04:53:02.143821 ACPI: added table 5/32, length now 56
1841 04:53:02.147348 current = 76b09850
1842 04:53:02.147434 ACPI: * DMAR
1843 04:53:02.150452 ACPI: added table 6/32, length now 60
1844 04:53:02.153525 ACPI: added table 7/32, length now 64
1845 04:53:02.157262 ACPI: * HPET
1846 04:53:02.160372 ACPI: added table 8/32, length now 68
1847 04:53:02.163681 ACPI: done.
1848 04:53:02.163766 ACPI tables: 35216 bytes.
1849 04:53:02.166912 smbios_write_tables: 769ef000
1850 04:53:02.170620 EC returned error result code 3
1851 04:53:02.173506 Couldn't obtain OEM name from CBI
1852 04:53:02.176962 Create SMBIOS type 16
1853 04:53:02.180334 Create SMBIOS type 17
1854 04:53:02.183589 GENERIC: 0.0 (WIFI Device)
1855 04:53:02.183675 SMBIOS tables: 1750 bytes.
1856 04:53:02.190560 Writing table forward entry at 0x00000500
1857 04:53:02.196556 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1858 04:53:02.199990 Writing coreboot table at 0x76b25000
1859 04:53:02.206599 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1860 04:53:02.210037 1. 0000000000001000-000000000009ffff: RAM
1861 04:53:02.213889 2. 00000000000a0000-00000000000fffff: RESERVED
1862 04:53:02.220188 3. 0000000000100000-00000000769eefff: RAM
1863 04:53:02.224366 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1864 04:53:02.229980 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1865 04:53:02.236673 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1866 04:53:02.239871 7. 0000000077000000-000000007fbfffff: RESERVED
1867 04:53:02.243395 8. 00000000c0000000-00000000cfffffff: RESERVED
1868 04:53:02.249826 9. 00000000f8000000-00000000f9ffffff: RESERVED
1869 04:53:02.253565 10. 00000000fb000000-00000000fb000fff: RESERVED
1870 04:53:02.259611 11. 00000000fe000000-00000000fe00ffff: RESERVED
1871 04:53:02.263180 12. 00000000fed80000-00000000fed87fff: RESERVED
1872 04:53:02.269992 13. 00000000fed90000-00000000fed92fff: RESERVED
1873 04:53:02.273274 14. 00000000feda0000-00000000feda1fff: RESERVED
1874 04:53:02.279578 15. 00000000fedc0000-00000000feddffff: RESERVED
1875 04:53:02.283015 16. 0000000100000000-00000002803fffff: RAM
1876 04:53:02.286403 Passing 4 GPIOs to payload:
1877 04:53:02.289766 NAME | PORT | POLARITY | VALUE
1878 04:53:02.296246 lid | undefined | high | high
1879 04:53:02.299727 power | undefined | high | low
1880 04:53:02.306339 oprom | undefined | high | low
1881 04:53:02.313094 EC in RW | 0x000000e5 | high | high
1882 04:53:02.319423 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a57
1883 04:53:02.319523 coreboot table: 1576 bytes.
1884 04:53:02.326352 IMD ROOT 0. 0x76fff000 0x00001000
1885 04:53:02.329314 IMD SMALL 1. 0x76ffe000 0x00001000
1886 04:53:02.332710 FSP MEMORY 2. 0x76c4e000 0x003b0000
1887 04:53:02.336072 VPD 3. 0x76c4d000 0x00000367
1888 04:53:02.339830 RO MCACHE 4. 0x76c4c000 0x00000fdc
1889 04:53:02.343038 CONSOLE 5. 0x76c2c000 0x00020000
1890 04:53:02.345877 FMAP 6. 0x76c2b000 0x00000578
1891 04:53:02.349806 TIME STAMP 7. 0x76c2a000 0x00000910
1892 04:53:02.356497 VBOOT WORK 8. 0x76c16000 0x00014000
1893 04:53:02.359500 ROMSTG STCK 9. 0x76c15000 0x00001000
1894 04:53:02.362933 AFTER CAR 10. 0x76c0a000 0x0000b000
1895 04:53:02.365931 RAMSTAGE 11. 0x76b97000 0x00073000
1896 04:53:02.369148 REFCODE 12. 0x76b42000 0x00055000
1897 04:53:02.372724 SMM BACKUP 13. 0x76b32000 0x00010000
1898 04:53:02.376365 4f444749 14. 0x76b30000 0x00002000
1899 04:53:02.379251 EXT VBT15. 0x76b2d000 0x0000219f
1900 04:53:02.382993 COREBOOT 16. 0x76b25000 0x00008000
1901 04:53:02.389427 ACPI 17. 0x76b01000 0x00024000
1902 04:53:02.392629 ACPI GNVS 18. 0x76b00000 0x00001000
1903 04:53:02.396086 RAMOOPS 19. 0x76a00000 0x00100000
1904 04:53:02.399447 TPM2 TCGLOG20. 0x769f0000 0x00010000
1905 04:53:02.402532 SMBIOS 21. 0x769ef000 0x00000800
1906 04:53:02.405929 IMD small region:
1907 04:53:02.409004 IMD ROOT 0. 0x76ffec00 0x00000400
1908 04:53:02.412477 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1909 04:53:02.415716 POWER STATE 2. 0x76ffeb80 0x00000044
1910 04:53:02.419138 ROMSTAGE 3. 0x76ffeb60 0x00000004
1911 04:53:02.422303 MEM INFO 4. 0x76ffe980 0x000001e0
1912 04:53:02.429081 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1913 04:53:02.432635 MTRR: Physical address space:
1914 04:53:02.438836 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1915 04:53:02.445713 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1916 04:53:02.452344 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1917 04:53:02.458956 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1918 04:53:02.465422 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1919 04:53:02.469297 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1920 04:53:02.475379 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1921 04:53:02.482102 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 04:53:02.485386 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 04:53:02.488682 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 04:53:02.492343 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 04:53:02.498827 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 04:53:02.502379 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 04:53:02.505480 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 04:53:02.509167 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 04:53:02.512077 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 04:53:02.518831 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 04:53:02.521805 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 04:53:02.525229 call enable_fixed_mtrr()
1933 04:53:02.528915 CPU physical address size: 39 bits
1934 04:53:02.531909 MTRR: default type WB/UC MTRR counts: 6/6.
1935 04:53:02.538605 MTRR: UC selected as default type.
1936 04:53:02.541862 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1937 04:53:02.548535 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1938 04:53:02.555136 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1939 04:53:02.562144 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1940 04:53:02.568358 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1941 04:53:02.574786 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1942 04:53:02.574879
1943 04:53:02.578420 MTRR check
1944 04:53:02.578505 Fixed MTRRs : Enabled
1945 04:53:02.581721 Variable MTRRs: Enabled
1946 04:53:02.581805
1947 04:53:02.584920 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 04:53:02.591719 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 04:53:02.594964 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 04:53:02.598144 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 04:53:02.601383 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 04:53:02.608498 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 04:53:02.611610 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 04:53:02.614649 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 04:53:02.618053 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 04:53:02.624700 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 04:53:02.628305 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 04:53:02.634612 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1959 04:53:02.638012 call enable_fixed_mtrr()
1960 04:53:02.641739 Checking cr50 for pending updates
1961 04:53:02.645312 CPU physical address size: 39 bits
1962 04:53:02.648840 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 04:53:02.651767 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 04:53:02.655123 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 04:53:02.658797 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 04:53:02.665296 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 04:53:02.668653 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 04:53:02.671657 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 04:53:02.675095 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 04:53:02.682133 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 04:53:02.685113 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 04:53:02.688466 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 04:53:02.691636 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 04:53:02.699478 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 04:53:02.699565 call enable_fixed_mtrr()
1976 04:53:02.705595 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 04:53:02.708854 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 04:53:02.712439 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 04:53:02.715561 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 04:53:02.722967 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 04:53:02.725783 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 04:53:02.728806 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 04:53:02.732401 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 04:53:02.738913 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 04:53:02.742082 CPU physical address size: 39 bits
1986 04:53:02.745531 call enable_fixed_mtrr()
1987 04:53:02.748844 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 04:53:02.751959 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 04:53:02.758626 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 04:53:02.762095 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 04:53:02.765733 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 04:53:02.768580 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 04:53:02.775199 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 04:53:02.778706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 04:53:02.781834 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 04:53:02.785518 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 04:53:02.791816 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 04:53:02.795184 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 04:53:02.798346 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 04:53:02.801661 call enable_fixed_mtrr()
2001 04:53:02.805063 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 04:53:02.811813 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 04:53:02.815390 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 04:53:02.818277 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 04:53:02.821810 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 04:53:02.828190 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 04:53:02.831552 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 04:53:02.834945 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 04:53:02.838314 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 04:53:02.842085 CPU physical address size: 39 bits
2011 04:53:02.848674 call enable_fixed_mtrr()
2012 04:53:02.852088 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 04:53:02.855569 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 04:53:02.859056 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 04:53:02.865745 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 04:53:02.868690 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 04:53:02.871830 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 04:53:02.875211 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 04:53:02.878685 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 04:53:02.885522 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 04:53:02.888591 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 04:53:02.891889 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 04:53:02.895425 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 04:53:02.902838 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 04:53:02.906490 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 04:53:02.909418 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 04:53:02.912938 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 04:53:02.919549 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 04:53:02.922618 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 04:53:02.926523 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 04:53:02.930017 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 04:53:02.936170 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 04:53:02.939738 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 04:53:02.942522 call enable_fixed_mtrr()
2035 04:53:02.946042 call enable_fixed_mtrr()
2036 04:53:02.949313 CPU physical address size: 39 bits
2037 04:53:02.952513 CPU physical address size: 39 bits
2038 04:53:02.955926 CPU physical address size: 39 bits
2039 04:53:02.959337 CPU physical address size: 39 bits
2040 04:53:02.962749 Reading cr50 TPM mode
2041 04:53:02.972393 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2042 04:53:02.982046 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2043 04:53:02.985429 Checking segment from ROM address 0xffc02b38
2044 04:53:02.988647 Checking segment from ROM address 0xffc02b54
2045 04:53:02.995139 Loading segment from ROM address 0xffc02b38
2046 04:53:02.995224 code (compression=0)
2047 04:53:03.005292 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2048 04:53:03.015505 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2049 04:53:03.015591 it's not compressed!
2050 04:53:03.154774 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2051 04:53:03.161837 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2052 04:53:03.168187 Loading segment from ROM address 0xffc02b54
2053 04:53:03.168271 Entry Point 0x30000000
2054 04:53:03.171217 Loaded segments
2055 04:53:03.177840 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2056 04:53:03.220700 Finalizing chipset.
2057 04:53:03.224207 Finalizing SMM.
2058 04:53:03.224292 APMC done.
2059 04:53:03.230661 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2060 04:53:03.233709 mp_park_aps done after 0 msecs.
2061 04:53:03.237082 Jumping to boot code at 0x30000000(0x76b25000)
2062 04:53:03.247268 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2063 04:53:03.247374
2064 04:53:03.250622 Starting depthcharge on Voema...
2065 04:53:03.251048 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2066 04:53:03.251170 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2067 04:53:03.251264 Setting prompt string to ['volteer:']
2068 04:53:03.251359 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2069 04:53:03.260474 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2070 04:53:03.266843 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2071 04:53:03.273359 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2072 04:53:03.276867 Failed to find eMMC card reader
2073 04:53:03.276955 Wipe memory regions:
2074 04:53:03.283957 [0x00000000001000, 0x000000000a0000)
2075 04:53:03.286867 [0x00000000100000, 0x00000030000000)
2076 04:53:03.315556 [0x00000032662db0, 0x000000769ef000)
2077 04:53:03.353790 [0x00000100000000, 0x00000280400000)
2078 04:53:03.560079 ec_init: CrosEC protocol v3 supported (256, 256)
2079 04:53:03.566009 update_port_state: port C0 state: usb enable 1 mux conn 0
2080 04:53:03.572711 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2081 04:53:03.580602 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2082 04:53:03.584165 send_conn_disc_msg: pmc_send_cmd succeeded
2083 04:53:04.016797 R8152: Initializing
2084 04:53:04.020264 Version 6 (ocp_data = 5c30)
2085 04:53:04.023518 R8152: Done initializing
2086 04:53:04.026815 Adding net device
2087 04:53:04.331790 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2088 04:53:04.331921
2089 04:53:04.335503 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2091 04:53:04.436299 volteer: tftpboot 192.168.201.1 7096698/tftp-deploy-np9z2wre/kernel/bzImage 7096698/tftp-deploy-np9z2wre/kernel/cmdline 7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
2092 04:53:04.436426 Setting prompt string to 'Starting kernel'
2093 04:53:04.436580 Setting prompt string to ['Starting kernel']
2094 04:53:04.436661 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2095 04:53:04.436749 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2096 04:53:04.440637 tftpboot 192.168.201.1 7096698/tftp-deploy-np9z2wre/kernel/bzImoy-np9z2wre/kernel/cmdline 7096698/tftp-deploy-np9z2wre/ramdisk/ramdisk.cpio.gz
2097 04:53:04.440722 Waiting for link
2098 04:53:04.645078 done.
2099 04:53:04.645201 MAC: 00:24:32:30:7c:e4
2100 04:53:04.648607 Sending DHCP discover... done.
2101 04:53:04.651697 Waiting for reply... done.
2102 04:53:04.655247 Sending DHCP request... done.
2103 04:53:04.658333 Waiting for reply... done.
2104 04:53:04.661479 My ip is 192.168.201.15
2105 04:53:04.664926 The DHCP server ip is 192.168.201.1
2106 04:53:04.668360 TFTP server IP predefined by user: 192.168.201.1
2107 04:53:04.675015 Bootfile predefined by user: 7096698/tftp-deploy-np9z2wre/kernel/bzImage
2108 04:53:04.678204 Sending tftp read request... done.
2109 04:53:04.684591 Waiting for the transfer...
2110 04:53:05.277544 00000000 ################################################################
2111 04:53:05.877953 00080000 ################################################################
2112 04:53:06.479191 00100000 ################################################################
2113 04:53:07.085979 00180000 ################################################################
2114 04:53:07.686450 00200000 ################################################################
2115 04:53:08.277001 00280000 ################################################################
2116 04:53:08.873119 00300000 ################################################################
2117 04:53:09.480376 00380000 ################################################################
2118 04:53:10.084646 00400000 ################################################################
2119 04:53:10.676180 00480000 ################################################################
2120 04:53:11.234915 00500000 ################################################################
2121 04:53:11.767429 00580000 ################################################################
2122 04:53:12.287708 00600000 ################################################################
2123 04:53:12.809932 00680000 ################################################################
2124 04:53:13.329740 00700000 ################################################################
2125 04:53:13.852035 00780000 ################################################################
2126 04:53:14.376441 00800000 ################################################################
2127 04:53:14.417670 00880000 ###### done.
2128 04:53:14.420884 The bootfile was 8953856 bytes long.
2129 04:53:14.424062 Sending tftp read request... done.
2130 04:53:14.427489 Waiting for the transfer...
2131 04:53:14.954325 00000000 ################################################################
2132 04:53:15.477432 00080000 ################################################################
2133 04:53:15.996762 00100000 ################################################################
2134 04:53:16.516135 00180000 ################################################################
2135 04:53:17.038645 00200000 ################################################################
2136 04:53:17.555800 00280000 ################################################################
2137 04:53:18.074537 00300000 ################################################################
2138 04:53:18.597450 00380000 ################################################################
2139 04:53:19.121455 00400000 ################################################################
2140 04:53:19.644772 00480000 ################################################################
2141 04:53:20.168281 00500000 ################################################################
2142 04:53:20.689466 00580000 ################################################################
2143 04:53:21.212579 00600000 ################################################################
2144 04:53:21.734125 00680000 ################################################################
2145 04:53:22.264213 00700000 ################################################################
2146 04:53:22.793973 00780000 ################################################################
2147 04:53:23.322362 00800000 ################################################################
2148 04:53:23.851331 00880000 ################################################################
2149 04:53:24.380802 00900000 ################################################################
2150 04:53:24.914973 00980000 ################################################################
2151 04:53:25.445812 00a00000 ################################################################
2152 04:53:25.976785 00a80000 ################################################################
2153 04:53:26.508770 00b00000 ################################################################
2154 04:53:27.050286 00b80000 ################################################################
2155 04:53:27.588763 00c00000 ################################################################
2156 04:53:28.119774 00c80000 ################################################################
2157 04:53:28.651125 00d00000 ################################################################
2158 04:53:29.183272 00d80000 ################################################################
2159 04:53:29.722758 00e00000 ################################################################
2160 04:53:30.257715 00e80000 ################################################################
2161 04:53:30.795360 00f00000 ################################################################
2162 04:53:31.318344 00f80000 ################################################################
2163 04:53:31.841318 01000000 ################################################################
2164 04:53:32.363981 01080000 ################################################################
2165 04:53:32.893193 01100000 ################################################################
2166 04:53:33.424958 01180000 ################################################################
2167 04:53:33.960485 01200000 ################################################################
2168 04:53:34.490602 01280000 ################################################################
2169 04:53:35.018990 01300000 ################################################################
2170 04:53:35.550003 01380000 ################################################################
2171 04:53:36.077922 01400000 ################################################################
2172 04:53:36.623512 01480000 ################################################################
2173 04:53:37.148663 01500000 ################################################################
2174 04:53:37.686814 01580000 ################################################################
2175 04:53:38.216185 01600000 ################################################################
2176 04:53:38.749140 01680000 ################################################################
2177 04:53:39.289522 01700000 ################################################################
2178 04:53:39.818895 01780000 ################################################################
2179 04:53:40.363571 01800000 ################################################################
2180 04:53:40.891544 01880000 ################################################################
2181 04:53:41.424810 01900000 ################################################################
2182 04:53:41.954327 01980000 ################################################################
2183 04:53:42.484658 01a00000 ################################################################
2184 04:53:43.016474 01a80000 ################################################################
2185 04:53:43.547384 01b00000 ################################################################
2186 04:53:44.078113 01b80000 ################################################################
2187 04:53:44.621938 01c00000 ################################################################
2188 04:53:45.174034 01c80000 ################################################################
2189 04:53:45.715414 01d00000 ################################################################
2190 04:53:46.251736 01d80000 ################################################################
2191 04:53:46.788822 01e00000 ################################################################
2192 04:53:47.299781 01e80000 ################################################################
2193 04:53:47.833958 01f00000 ################################################################
2194 04:53:48.346669 01f80000 ################################################################
2195 04:53:48.874876 02000000 ################################################################
2196 04:53:49.416579 02080000 ################################################################
2197 04:53:49.928043 02100000 ################################################################
2198 04:53:50.471246 02180000 ################################################################
2199 04:53:50.615682 02200000 ################## done.
2200 04:53:50.618990 Sending tftp read request... done.
2201 04:53:50.622818 Waiting for the transfer...
2202 04:53:50.622905 00000000 # done.
2203 04:53:50.632486 Command line loaded dynamically from TFTP file: 7096698/tftp-deploy-np9z2wre/kernel/cmdline
2204 04:53:50.645402 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2205 04:53:50.656117 Shutting down all USB controllers.
2206 04:53:50.656203 Removing current net device
2207 04:53:50.659326 Finalizing coreboot
2208 04:53:50.665423 Exiting depthcharge with code 4 at timestamp: 56067671
2209 04:53:50.665509
2210 04:53:50.665584 Starting kernel ...
2211 04:53:50.665648
2212 04:53:50.665709
2213 04:53:50.666034 end: 2.2.4 bootloader-commands (duration 00:00:47) [common]
2214 04:53:50.666137 start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
2215 04:53:50.666213 Setting prompt string to ['Linux version [0-9]']
2216 04:53:50.666284 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2217 04:53:50.666353 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2219 04:57:46.666484 end: 2.2.5 auto-login-action (duration 00:03:56) [common]
2221 04:57:46.667103 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
2223 04:57:46.667373 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2226 04:57:46.667863 end: 2 depthcharge-action (duration 00:05:00) [common]
2228 04:57:46.668210 Cleaning after the job
2229 04:57:46.668346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/ramdisk
2230 04:57:46.672338 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/kernel
2231 04:57:46.673454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096698/tftp-deploy-np9z2wre/modules
2232 04:57:46.673805 start: 4.1 power-off (timeout 00:00:30) [common]
2233 04:57:46.674076 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2234 04:57:46.693968 >> Command sent successfully.
2235 04:57:46.695824 Returned 0 in 0 seconds
2236 04:57:46.796654 end: 4.1 power-off (duration 00:00:00) [common]
2238 04:57:46.797139 start: 4.2 read-feedback (timeout 00:10:00) [common]
2239 04:57:46.797484 Listened to connection for namespace 'common' for up to 1s
2240 04:57:47.802414 Finalising connection for namespace 'common'
2241 04:57:47.802687 Disconnecting from shell: Finalise
2242 04:57:47.903473 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 04:57:47.903648 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096698
2244 04:57:47.950495 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096698
2245 04:57:47.950790 JobError: Your job cannot terminate cleanly.