Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:51:26.732538 lava-dispatcher, installed at version: 2022.06
2 05:51:26.732739 start: 0 validate
3 05:51:26.732874 Start time: 2022-08-23 05:51:26.732868+00:00 (UTC)
4 05:51:26.733011 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:51:26.733145 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:51:27.020360 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:51:27.020571 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:51:27.310491 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:51:27.310651 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:51:27.594800 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:51:27.594958 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:51:27.894728 validate duration: 1.16
14 05:51:27.895874 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:51:27.896377 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:51:27.896845 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:51:27.897298 Not decompressing ramdisk as can be used compressed.
18 05:51:27.897703 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220812.0/amd64/initrd.cpio.gz
19 05:51:27.898018 saving as /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/ramdisk/initrd.cpio.gz
20 05:51:27.898316 total size: 5411022 (5MB)
21 05:51:27.902865 progress 0% (0MB)
22 05:51:27.909587 progress 5% (0MB)
23 05:51:27.915709 progress 10% (0MB)
24 05:51:27.921676 progress 15% (0MB)
25 05:51:27.926209 progress 20% (1MB)
26 05:51:27.929621 progress 25% (1MB)
27 05:51:27.932554 progress 30% (1MB)
28 05:51:27.935190 progress 35% (1MB)
29 05:51:27.937899 progress 40% (2MB)
30 05:51:27.940084 progress 45% (2MB)
31 05:51:27.942202 progress 50% (2MB)
32 05:51:27.944097 progress 55% (2MB)
33 05:51:27.946230 progress 60% (3MB)
34 05:51:27.947962 progress 65% (3MB)
35 05:51:27.949649 progress 70% (3MB)
36 05:51:27.951327 progress 75% (3MB)
37 05:51:27.953047 progress 80% (4MB)
38 05:51:27.954560 progress 85% (4MB)
39 05:51:27.956088 progress 90% (4MB)
40 05:51:27.957528 progress 95% (4MB)
41 05:51:27.959078 progress 100% (5MB)
42 05:51:27.959262 5MB downloaded in 0.06s (84.67MB/s)
43 05:51:27.959424 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:51:27.959684 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:51:27.959780 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:51:27.959874 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:51:27.959986 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:51:27.960060 saving as /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/kernel/bzImage
50 05:51:27.960128 total size: 8953856 (8MB)
51 05:51:27.960193 No compression specified
52 05:51:27.961317 progress 0% (0MB)
53 05:51:27.963494 progress 5% (0MB)
54 05:51:27.965732 progress 10% (0MB)
55 05:51:27.967766 progress 15% (1MB)
56 05:51:27.969984 progress 20% (1MB)
57 05:51:27.972160 progress 25% (2MB)
58 05:51:27.974248 progress 30% (2MB)
59 05:51:27.976469 progress 35% (3MB)
60 05:51:27.978681 progress 40% (3MB)
61 05:51:27.980703 progress 45% (3MB)
62 05:51:27.982918 progress 50% (4MB)
63 05:51:27.985057 progress 55% (4MB)
64 05:51:27.987087 progress 60% (5MB)
65 05:51:27.989224 progress 65% (5MB)
66 05:51:27.991404 progress 70% (6MB)
67 05:51:27.993482 progress 75% (6MB)
68 05:51:27.995658 progress 80% (6MB)
69 05:51:27.997878 progress 85% (7MB)
70 05:51:27.999909 progress 90% (7MB)
71 05:51:28.002131 progress 95% (8MB)
72 05:51:28.004326 progress 100% (8MB)
73 05:51:28.004511 8MB downloaded in 0.04s (192.41MB/s)
74 05:51:28.004660 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:51:28.004903 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:51:28.004993 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:51:28.005082 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:51:28.005190 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220812.0/amd64/full.rootfs.tar.xz
80 05:51:28.005260 saving as /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/nfsrootfs/full.rootfs.tar
81 05:51:28.005364 total size: 207018404 (197MB)
82 05:51:28.005428 Using unxz to decompress xz
83 05:51:28.008598 progress 0% (0MB)
84 05:51:28.564236 progress 5% (9MB)
85 05:51:29.099333 progress 10% (19MB)
86 05:51:29.692480 progress 15% (29MB)
87 05:51:30.054362 progress 20% (39MB)
88 05:51:30.414613 progress 25% (49MB)
89 05:51:31.007311 progress 30% (59MB)
90 05:51:31.556903 progress 35% (69MB)
91 05:51:32.153335 progress 40% (79MB)
92 05:51:32.710034 progress 45% (88MB)
93 05:51:33.289064 progress 50% (98MB)
94 05:51:33.916647 progress 55% (108MB)
95 05:51:34.597839 progress 60% (118MB)
96 05:51:34.740550 progress 65% (128MB)
97 05:51:34.901030 progress 70% (138MB)
98 05:51:34.994134 progress 75% (148MB)
99 05:51:35.069528 progress 80% (157MB)
100 05:51:35.137900 progress 85% (167MB)
101 05:51:35.242511 progress 90% (177MB)
102 05:51:35.520494 progress 95% (187MB)
103 05:51:36.115471 progress 100% (197MB)
104 05:51:36.121565 197MB downloaded in 8.12s (24.33MB/s)
105 05:51:36.121878 end: 1.3.1 http-download (duration 00:00:08) [common]
107 05:51:36.122153 end: 1.3 download-retry (duration 00:00:08) [common]
108 05:51:36.122250 start: 1.4 download-retry (timeout 00:09:52) [common]
109 05:51:36.122345 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 05:51:36.122461 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:51:36.122532 saving as /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/modules/modules.tar
112 05:51:36.122595 total size: 64712 (0MB)
113 05:51:36.122659 Using unxz to decompress xz
114 05:51:36.125805 progress 50% (0MB)
115 05:51:36.126180 progress 100% (0MB)
116 05:51:36.130300 0MB downloaded in 0.01s (8.02MB/s)
117 05:51:36.130517 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:51:36.130816 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:51:36.130916 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 05:51:36.131015 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 05:51:38.125004 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096705/extract-nfsrootfs-fsrlyom9
123 05:51:38.125219 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 05:51:38.125374 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 05:51:38.125517 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz
126 05:51:38.125620 makedir: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin
127 05:51:38.125707 makedir: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/tests
128 05:51:38.125788 makedir: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/results
129 05:51:38.125884 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-add-keys
130 05:51:38.126014 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-add-sources
131 05:51:38.126130 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-background-process-start
132 05:51:38.126245 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-background-process-stop
133 05:51:38.126377 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-common-functions
134 05:51:38.126502 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-echo-ipv4
135 05:51:38.126612 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-install-packages
136 05:51:38.126720 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-installed-packages
137 05:51:38.126827 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-os-build
138 05:51:38.126935 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-probe-channel
139 05:51:38.127045 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-probe-ip
140 05:51:38.127154 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-target-ip
141 05:51:38.127261 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-target-mac
142 05:51:38.127369 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-target-storage
143 05:51:38.127480 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-case
144 05:51:38.127590 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-event
145 05:51:38.127697 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-feedback
146 05:51:38.127807 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-raise
147 05:51:38.127916 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-reference
148 05:51:38.128023 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-runner
149 05:51:38.128131 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-set
150 05:51:38.128238 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-test-shell
151 05:51:38.128347 Updating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-add-keys (debian)
152 05:51:38.128459 Updating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-add-sources (debian)
153 05:51:38.128570 Updating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-install-packages (debian)
154 05:51:38.128681 Updating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-installed-packages (debian)
155 05:51:38.128790 Updating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/bin/lava-os-build (debian)
156 05:51:38.128885 Creating /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/environment
157 05:51:38.128969 LAVA metadata
158 05:51:38.129035 - LAVA_JOB_ID=7096705
159 05:51:38.129098 - LAVA_DISPATCHER_IP=192.168.201.1
160 05:51:38.129194 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 05:51:38.129260 skipped lava-vland-overlay
162 05:51:38.129607 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 05:51:38.129690 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 05:51:38.129754 skipped lava-multinode-overlay
165 05:51:38.129827 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 05:51:38.129906 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 05:51:38.129980 Loading test definitions
168 05:51:38.130072 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 05:51:38.130142 Using /lava-7096705 at stage 0
170 05:51:38.130371 uuid=7096705_1.5.2.3.1 testdef=None
171 05:51:38.130500 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 05:51:38.130586 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 05:51:38.131073 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 05:51:38.131337 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 05:51:38.131858 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 05:51:38.132100 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 05:51:38.132557 runner path: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/0/tests/0_timesync-off test_uuid 7096705_1.5.2.3.1
180 05:51:38.132709 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 05:51:38.132942 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 05:51:38.133015 Using /lava-7096705 at stage 0
184 05:51:38.133110 Fetching tests from https://github.com/kernelci/test-definitions.git
185 05:51:38.133191 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/0/tests/1_kselftest-filesystems'
186 05:51:43.467826 Running '/usr/bin/git checkout kernelci.org
187 05:51:43.601951 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
188 05:51:43.602666 uuid=7096705_1.5.2.3.5 testdef=None
189 05:51:43.602836 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
191 05:51:43.603092 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
192 05:51:43.603783 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 05:51:43.604023 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
195 05:51:43.604890 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 05:51:43.605138 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
198 05:51:43.606063 runner path: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/0/tests/1_kselftest-filesystems test_uuid 7096705_1.5.2.3.5
199 05:51:43.606155 BOARD='asus-C436FA-Flip-hatch'
200 05:51:43.606222 BRANCH='cip'
201 05:51:43.606284 SKIPFILE='skipfile-lkft.yaml'
202 05:51:43.606344 TESTPROG_URL='None'
203 05:51:43.606404 TST_CASENAME=''
204 05:51:43.606462 TST_CMDFILES='filesystems'
205 05:51:43.606593 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 05:51:43.606809 Creating lava-test-runner.conf files
208 05:51:43.606876 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096705/lava-overlay-7yfct1sz/lava-7096705/0 for stage 0
209 05:51:43.606961 - 0_timesync-off
210 05:51:43.607030 - 1_kselftest-filesystems
211 05:51:43.607123 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
212 05:51:43.607211 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
213 05:51:50.868783 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 05:51:50.868957 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
215 05:51:50.869057 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 05:51:50.869164 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
217 05:51:50.869260 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
218 05:51:50.977089 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 05:51:50.977494 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
220 05:51:50.977623 extracting modules file /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096705/extract-nfsrootfs-fsrlyom9
221 05:51:50.982226 extracting modules file /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096705/extract-overlay-ramdisk-qvysss2h/ramdisk
222 05:51:50.986702 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 05:51:50.986841 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
224 05:51:50.986949 [common] Applying overlay to NFS
225 05:51:50.987025 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096705/compress-overlay-p_fkt_y5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096705/extract-nfsrootfs-fsrlyom9
226 05:51:51.463118 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 05:51:51.463302 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
228 05:51:51.463406 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 05:51:51.463504 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
230 05:51:51.463591 Building ramdisk /var/lib/lava/dispatcher/tmp/7096705/extract-overlay-ramdisk-qvysss2h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096705/extract-overlay-ramdisk-qvysss2h/ramdisk
231 05:51:51.499783 >> 24662 blocks
232 05:51:51.990379 rename /var/lib/lava/dispatcher/tmp/7096705/extract-overlay-ramdisk-qvysss2h/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
233 05:51:51.990788 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 05:51:51.990919 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
235 05:51:51.991027 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
236 05:51:51.991124 No mkimage arch provided, not using FIT.
237 05:51:51.991221 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 05:51:51.991310 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 05:51:51.991413 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
240 05:51:51.991508 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
241 05:51:51.991588 No LXC device requested
242 05:51:51.991677 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 05:51:51.991775 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
244 05:51:51.991860 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 05:51:51.991935 Checking files for TFTP limit of 4294967296 bytes.
246 05:51:51.992335 end: 1 tftp-deploy (duration 00:00:24) [common]
247 05:51:51.992450 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 05:51:51.992550 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 05:51:51.992681 substitutions:
250 05:51:51.992756 - {DTB}: None
251 05:51:51.992825 - {INITRD}: 7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
252 05:51:51.992889 - {KERNEL}: 7096705/tftp-deploy-tppnr9kg/kernel/bzImage
253 05:51:51.992954 - {LAVA_MAC}: None
254 05:51:51.993015 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096705/extract-nfsrootfs-fsrlyom9
255 05:51:51.993078 - {NFS_SERVER_IP}: 192.168.201.1
256 05:51:51.993137 - {PRESEED_CONFIG}: None
257 05:51:51.993197 - {PRESEED_LOCAL}: None
258 05:51:51.993260 - {RAMDISK}: 7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
259 05:51:51.993335 - {ROOT_PART}: None
260 05:51:51.993393 - {ROOT}: None
261 05:51:51.993451 - {SERVER_IP}: 192.168.201.1
262 05:51:51.993514 - {TEE}: None
263 05:51:51.993576 Parsed boot commands:
264 05:51:51.993634 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 05:51:51.993802 Parsed boot commands: tftpboot 192.168.201.1 7096705/tftp-deploy-tppnr9kg/kernel/bzImage 7096705/tftp-deploy-tppnr9kg/kernel/cmdline 7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
266 05:51:51.993898 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 05:51:51.993994 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 05:51:51.994092 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 05:51:51.994183 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 05:51:51.994262 Not connected, no need to disconnect.
271 05:51:51.994345 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 05:51:51.994433 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 05:51:51.994509 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
274 05:51:51.997339 Setting prompt string to ['lava-test: # ']
275 05:51:51.997668 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 05:51:51.997786 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 05:51:51.997891 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 05:51:51.997987 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 05:51:51.998178 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 05:51:52.018197 >> Command sent successfully.
281 05:51:52.020212 Returned 0 in 0 seconds
282 05:51:52.120991 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 05:51:52.121343 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 05:51:52.121449 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 05:51:52.121544 Setting prompt string to 'Starting depthcharge on Helios...'
287 05:51:52.121623 Changing prompt to 'Starting depthcharge on Helios...'
288 05:51:52.121734 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 05:51:52.122060 [Enter `^Ec?' for help]
290 05:51:59.180369
291 05:51:59.180526
292 05:51:59.190014 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 05:51:59.193127 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 05:51:59.200229 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 05:51:59.203182 CPU: AES supported, TXT NOT supported, VT supported
296 05:51:59.209452 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 05:51:59.216481 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 05:51:59.219567 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 05:51:59.222887 VBOOT: Loading verstage.
300 05:51:59.229178 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
301 05:51:59.232459 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 05:51:59.239517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 05:51:59.239620 CBFS @ c08000 size 3f8000
304 05:51:59.245691 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 05:51:59.249257 CBFS: Locating 'fallback/verstage'
306 05:51:59.255486 CBFS: Found @ offset 10fb80 size 1072c
307 05:51:59.255585
308 05:51:59.255656
309 05:51:59.265677 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 05:51:59.281582 Probing TPM: . done!
311 05:51:59.284580 TPM ready after 0 ms
312 05:51:59.287823 Connected to device vid:did:rid of 1ae0:0028:00
313 05:51:59.298363 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 05:51:59.301509 Initialized TPM device CR50 revision 0
315 05:51:59.334454 tlcl_send_startup: Startup return code is 0
316 05:51:59.334595 TPM: setup succeeded
317 05:51:59.347359 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 05:51:59.351120 Chrome EC: UHEPI supported
319 05:51:59.354232 Phase 1
320 05:51:59.357732 FMAP: area GBB found @ c05000 (12288 bytes)
321 05:51:59.364556 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 05:51:59.367851 Phase 2
323 05:51:59.367950 Phase 3
324 05:51:59.370940 FMAP: area GBB found @ c05000 (12288 bytes)
325 05:51:59.377068 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 05:51:59.383923 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 05:51:59.387013 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 05:51:59.393790 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 05:51:59.410090 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 05:51:59.413143 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 05:51:59.419526 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 05:51:59.423892 Phase 4
333 05:51:59.427576 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 05:51:59.433925 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 05:51:59.613691 VB2:vb2_rsa_verify_digest() Digest check failed!
336 05:51:59.619811 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 05:51:59.619923 Saving nvdata
338 05:51:59.623157 Reboot requested (10020007)
339 05:51:59.626815 board_reset() called!
340 05:51:59.626910 full_reset() called!
341 05:52:04.148376
342 05:52:04.148523
343 05:52:04.155621 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 05:52:04.162689 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 05:52:04.166658 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 05:52:04.169892 CPU: AES supported, TXT NOT supported, VT supported
347 05:52:04.177736 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 05:52:04.181379 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 05:52:04.188428 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 05:52:04.192049 VBOOT: Loading verstage.
351 05:52:04.195880 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
352 05:52:04.199144 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 05:52:04.206982 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 05:52:04.207105 CBFS @ c08000 size 3f8000
355 05:52:04.213825 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 05:52:04.217579 CBFS: Locating 'fallback/verstage'
357 05:52:04.220841 CBFS: Found @ offset 10fb80 size 1072c
358 05:52:04.220989
359 05:52:04.221058
360 05:52:04.231788 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 05:52:04.248422 Probing TPM: . done!
362 05:52:04.252219 TPM ready after 0 ms
363 05:52:04.256352 Connected to device vid:did:rid of 1ae0:0028:00
364 05:52:04.267323 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
365 05:52:04.300608 Initialized TPM device CR50 revision 0
366 05:52:04.309567 tlcl_send_startup: Startup return code is 0
367 05:52:04.309704 TPM: setup succeeded
368 05:52:04.322136 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 05:52:04.325945 Chrome EC: UHEPI supported
370 05:52:04.329519 Phase 1
371 05:52:04.332801 FMAP: area GBB found @ c05000 (12288 bytes)
372 05:52:04.339187 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 05:52:04.346038 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 05:52:04.349149 Recovery requested (1009000e)
375 05:52:04.354892 Saving nvdata
376 05:52:04.361125 tlcl_extend: response is 0
377 05:52:04.369977 tlcl_extend: response is 0
378 05:52:04.377095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 05:52:04.380322 CBFS @ c08000 size 3f8000
380 05:52:04.386530 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 05:52:04.389637 CBFS: Locating 'fallback/romstage'
382 05:52:04.392921 CBFS: Found @ offset 80 size 145fc
383 05:52:04.396708 Accumulated console time in verstage 98 ms
384 05:52:04.396805
385 05:52:04.399904
386 05:52:04.409734 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 05:52:04.415858 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 05:52:04.419103 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 05:52:04.426152 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 05:52:04.429196 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 05:52:04.432398 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 05:52:04.435771 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 05:52:04.438946 TCO_STS: 0000 0000
394 05:52:04.442117 GEN_PMCON: e0015238 00000200
395 05:52:04.445764 GBLRST_CAUSE: 00000000 00000000
396 05:52:04.448855 prev_sleep_state 5
397 05:52:04.452275 Boot Count incremented to 29368
398 05:52:04.455218 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 05:52:04.459025 CBFS @ c08000 size 3f8000
400 05:52:04.465441 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 05:52:04.468775 CBFS: Locating 'fspm.bin'
402 05:52:04.472022 CBFS: Found @ offset 5ffc0 size 71000
403 05:52:04.475135 Chrome EC: UHEPI supported
404 05:52:04.481998 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 05:52:04.486302 Probing TPM: done!
406 05:52:04.493161 Connected to device vid:did:rid of 1ae0:0028:00
407 05:52:04.502724 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
408 05:52:04.508589 Initialized TPM device CR50 revision 0
409 05:52:04.518022 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 05:52:04.527460 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 05:52:04.527596 MRC cache found, size 1948
412 05:52:04.530721 bootmode is set to: 2
413 05:52:04.534351 PRMRR disabled by config.
414 05:52:04.537658 SPD INDEX = 1
415 05:52:04.540831 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 05:52:04.543997 CBFS @ c08000 size 3f8000
417 05:52:04.550939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 05:52:04.551044 CBFS: Locating 'spd.bin'
419 05:52:04.554092 CBFS: Found @ offset 5fb80 size 400
420 05:52:04.557240 SPD: module type is LPDDR3
421 05:52:04.560502 SPD: module part is
422 05:52:04.567412 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 05:52:04.570483 SPD: device width 4 bits, bus width 8 bits
424 05:52:04.574283 SPD: module size is 4096 MB (per channel)
425 05:52:04.577207 memory slot: 0 configuration done.
426 05:52:04.580431 memory slot: 2 configuration done.
427 05:52:04.632694 CBMEM:
428 05:52:04.635696 IMD: root @ 99fff000 254 entries.
429 05:52:04.638906 IMD: root @ 99ffec00 62 entries.
430 05:52:04.642680 External stage cache:
431 05:52:04.645953 IMD: root @ 9abff000 254 entries.
432 05:52:04.649018 IMD: root @ 9abfec00 62 entries.
433 05:52:04.655541 Chrome EC: clear events_b mask to 0x0000000020004000
434 05:52:04.668169 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 05:52:04.681671 tlcl_write: response is 0
436 05:52:04.690327 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 05:52:04.697317 MRC: TPM MRC hash updated successfully.
438 05:52:04.697453 2 DIMMs found
439 05:52:04.700698 SMM Memory Map
440 05:52:04.703850 SMRAM : 0x9a000000 0x1000000
441 05:52:04.707031 Subregion 0: 0x9a000000 0xa00000
442 05:52:04.710143 Subregion 1: 0x9aa00000 0x200000
443 05:52:04.713568 Subregion 2: 0x9ac00000 0x400000
444 05:52:04.716702 top_of_ram = 0x9a000000
445 05:52:04.720394 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 05:52:04.726914 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 05:52:04.730038 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 05:52:04.736933 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 05:52:04.740270 CBFS @ c08000 size 3f8000
450 05:52:04.743400 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 05:52:04.746531 CBFS: Locating 'fallback/postcar'
452 05:52:04.753020 CBFS: Found @ offset 107000 size 4b44
453 05:52:04.759401 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 05:52:04.769585 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 05:52:04.772788 Processing 180 relocs. Offset value of 0x97c0c000
456 05:52:04.781231 Accumulated console time in romstage 286 ms
457 05:52:04.781395
458 05:52:04.781493
459 05:52:04.791243 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 05:52:04.797576 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 05:52:04.801389 CBFS @ c08000 size 3f8000
462 05:52:04.804507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 05:52:04.810904 CBFS: Locating 'fallback/ramstage'
464 05:52:04.814637 CBFS: Found @ offset 43380 size 1b9e8
465 05:52:04.820964 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 05:52:04.852697 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 05:52:04.856404 Processing 3976 relocs. Offset value of 0x98db0000
468 05:52:04.862798 Accumulated console time in postcar 52 ms
469 05:52:04.862917
470 05:52:04.862989
471 05:52:04.872813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 05:52:04.879472 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 05:52:04.882520 WARNING: RO_VPD is uninitialized or empty.
474 05:52:04.885913 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 05:52:04.892355 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 05:52:04.892466 Normal boot.
477 05:52:04.899236 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 05:52:04.902416 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 05:52:04.905584 CBFS @ c08000 size 3f8000
480 05:52:04.911952 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 05:52:04.915754 CBFS: Locating 'cpu_microcode_blob.bin'
482 05:52:04.918805 CBFS: Found @ offset 14700 size 2ec00
483 05:52:04.922266 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 05:52:04.925156 Skip microcode update
485 05:52:04.932240 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 05:52:04.932352 CBFS @ c08000 size 3f8000
487 05:52:04.938568 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 05:52:04.941575 CBFS: Locating 'fsps.bin'
489 05:52:04.944834 CBFS: Found @ offset d1fc0 size 35000
490 05:52:04.971036 Detected 4 core, 8 thread CPU.
491 05:52:04.974055 Setting up SMI for CPU
492 05:52:04.977969 IED base = 0x9ac00000
493 05:52:04.978063 IED size = 0x00400000
494 05:52:04.981117 Will perform SMM setup.
495 05:52:04.987592 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 05:52:04.994400 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 05:52:04.997596 Processing 16 relocs. Offset value of 0x00030000
498 05:52:05.001232 Attempting to start 7 APs
499 05:52:05.004537 Waiting for 10ms after sending INIT.
500 05:52:05.021125 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
501 05:52:05.021269 done.
502 05:52:05.024171 AP: slot 5 apic_id 6.
503 05:52:05.027253 AP: slot 7 apic_id 7.
504 05:52:05.027345 AP: slot 3 apic_id 2.
505 05:52:05.031127 AP: slot 6 apic_id 3.
506 05:52:05.034240 Waiting for 2nd SIPI to complete...done.
507 05:52:05.037502 AP: slot 4 apic_id 4.
508 05:52:05.040743 AP: slot 1 apic_id 5.
509 05:52:05.047034 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 05:52:05.054095 Processing 13 relocs. Offset value of 0x00038000
511 05:52:05.060468 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 05:52:05.063671 Installing SMM handler to 0x9a000000
513 05:52:05.070048 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 05:52:05.076607 Processing 658 relocs. Offset value of 0x9a010000
515 05:52:05.083600 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 05:52:05.086785 Processing 13 relocs. Offset value of 0x9a008000
517 05:52:05.093026 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 05:52:05.100102 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 05:52:05.106461 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 05:52:05.109773 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 05:52:05.115944 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 05:52:05.122878 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 05:52:05.129162 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 05:52:05.136017 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 05:52:05.139237 Clearing SMI status registers
526 05:52:05.139337 SMI_STS: PM1
527 05:52:05.142316 PM1_STS: PWRBTN
528 05:52:05.142405 TCO_STS: SECOND_TO
529 05:52:05.146217 New SMBASE 0x9a000000
530 05:52:05.149221 In relocation handler: CPU 0
531 05:52:05.152369 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 05:52:05.159346 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 05:52:05.159460 Relocation complete.
534 05:52:05.162654 New SMBASE 0x99fff800
535 05:52:05.165741 In relocation handler: CPU 2
536 05:52:05.168920 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
537 05:52:05.175941 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 05:52:05.176050 Relocation complete.
539 05:52:05.178497 New SMBASE 0x99fffc00
540 05:52:05.182384 In relocation handler: CPU 1
541 05:52:05.185530 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 05:52:05.191896 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 05:52:05.192000 Relocation complete.
544 05:52:05.195114 New SMBASE 0x99fff000
545 05:52:05.198319 In relocation handler: CPU 4
546 05:52:05.201622 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 05:52:05.208225 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 05:52:05.208329 Relocation complete.
549 05:52:05.211366 New SMBASE 0x99ffe800
550 05:52:05.215093 In relocation handler: CPU 6
551 05:52:05.218205 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 05:52:05.221405 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 05:52:05.225074 Relocation complete.
554 05:52:05.228270 New SMBASE 0x99fff400
555 05:52:05.231352 In relocation handler: CPU 3
556 05:52:05.234447 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
557 05:52:05.238172 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 05:52:05.241385 Relocation complete.
559 05:52:05.244453 New SMBASE 0x99ffe400
560 05:52:05.247482 In relocation handler: CPU 7
561 05:52:05.250720 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
562 05:52:05.254700 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 05:52:05.257927 Relocation complete.
564 05:52:05.261088 New SMBASE 0x99ffec00
565 05:52:05.264183 In relocation handler: CPU 5
566 05:52:05.267279 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
567 05:52:05.270688 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 05:52:05.273910 Relocation complete.
569 05:52:05.277673 Initializing CPU #0
570 05:52:05.280880 CPU: vendor Intel device 806ec
571 05:52:05.284238 CPU: family 06, model 8e, stepping 0c
572 05:52:05.287478 Clearing out pending MCEs
573 05:52:05.287571 Setting up local APIC...
574 05:52:05.290471 apic_id: 0x00 done.
575 05:52:05.293765 Turbo is available but hidden
576 05:52:05.296906 Turbo is available and visible
577 05:52:05.300216 VMX status: enabled
578 05:52:05.303392 IA32_FEATURE_CONTROL status: locked
579 05:52:05.303486 Skip microcode update
580 05:52:05.307264 CPU #0 initialized
581 05:52:05.310372 Initializing CPU #2
582 05:52:05.310464 Initializing CPU #6
583 05:52:05.313541 Initializing CPU #3
584 05:52:05.316755 CPU: vendor Intel device 806ec
585 05:52:05.320001 CPU: family 06, model 8e, stepping 0c
586 05:52:05.323579 CPU: vendor Intel device 806ec
587 05:52:05.326923 CPU: family 06, model 8e, stepping 0c
588 05:52:05.330079 Clearing out pending MCEs
589 05:52:05.333170 Clearing out pending MCEs
590 05:52:05.333268 Setting up local APIC...
591 05:52:05.336297 CPU: vendor Intel device 806ec
592 05:52:05.343215 CPU: family 06, model 8e, stepping 0c
593 05:52:05.343322 Clearing out pending MCEs
594 05:52:05.346437 Initializing CPU #7
595 05:52:05.349539 Initializing CPU #5
596 05:52:05.352696 CPU: vendor Intel device 806ec
597 05:52:05.356419 CPU: family 06, model 8e, stepping 0c
598 05:52:05.359691 CPU: vendor Intel device 806ec
599 05:52:05.362875 CPU: family 06, model 8e, stepping 0c
600 05:52:05.365999 Clearing out pending MCEs
601 05:52:05.366100 Clearing out pending MCEs
602 05:52:05.369101 Setting up local APIC...
603 05:52:05.372308 Setting up local APIC...
604 05:52:05.376140 Setting up local APIC...
605 05:52:05.376234 apic_id: 0x03 done.
606 05:52:05.379250 Setting up local APIC...
607 05:52:05.382501 apic_id: 0x07 done.
608 05:52:05.382594 apic_id: 0x06 done.
609 05:52:05.385459 VMX status: enabled
610 05:52:05.389485 VMX status: enabled
611 05:52:05.392465 IA32_FEATURE_CONTROL status: locked
612 05:52:05.395704 IA32_FEATURE_CONTROL status: locked
613 05:52:05.398733 Skip microcode update
614 05:52:05.398824 Skip microcode update
615 05:52:05.402499 CPU #7 initialized
616 05:52:05.402596 CPU #5 initialized
617 05:52:05.405637 VMX status: enabled
618 05:52:05.409242 apic_id: 0x02 done.
619 05:52:05.412400 IA32_FEATURE_CONTROL status: locked
620 05:52:05.412497 VMX status: enabled
621 05:52:05.415597 Skip microcode update
622 05:52:05.418805 IA32_FEATURE_CONTROL status: locked
623 05:52:05.421985 CPU #6 initialized
624 05:52:05.422076 Skip microcode update
625 05:52:05.425756 apic_id: 0x01 done.
626 05:52:05.428785 Initializing CPU #1
627 05:52:05.428905 Initializing CPU #4
628 05:52:05.431921 CPU: vendor Intel device 806ec
629 05:52:05.435689 CPU: family 06, model 8e, stepping 0c
630 05:52:05.438836 CPU: vendor Intel device 806ec
631 05:52:05.441925 CPU: family 06, model 8e, stepping 0c
632 05:52:05.445031 Clearing out pending MCEs
633 05:52:05.448787 Clearing out pending MCEs
634 05:52:05.451943 Setting up local APIC...
635 05:52:05.452040 CPU #3 initialized
636 05:52:05.455132 apic_id: 0x05 done.
637 05:52:05.458308 Setting up local APIC...
638 05:52:05.458398 VMX status: enabled
639 05:52:05.461659 VMX status: enabled
640 05:52:05.465296 apic_id: 0x04 done.
641 05:52:05.468468 IA32_FEATURE_CONTROL status: locked
642 05:52:05.468564 VMX status: enabled
643 05:52:05.471722 Skip microcode update
644 05:52:05.475000 IA32_FEATURE_CONTROL status: locked
645 05:52:05.478570 CPU #1 initialized
646 05:52:05.478664 Skip microcode update
647 05:52:05.485033 IA32_FEATURE_CONTROL status: locked
648 05:52:05.485134 CPU #4 initialized
649 05:52:05.488190 Skip microcode update
650 05:52:05.488279 CPU #2 initialized
651 05:52:05.494801 bsp_do_flight_plan done after 456 msecs.
652 05:52:05.498056 CPU: frequency set to 4200 MHz
653 05:52:05.498154 Enabling SMIs.
654 05:52:05.501112 Locking SMM.
655 05:52:05.514508 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 05:52:05.518194 CBFS @ c08000 size 3f8000
657 05:52:05.524530 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 05:52:05.524648 CBFS: Locating 'vbt.bin'
659 05:52:05.527800 CBFS: Found @ offset 5f5c0 size 499
660 05:52:05.534676 Found a VBT of 4608 bytes after decompression
661 05:52:05.715388 Display FSP Version Info HOB
662 05:52:05.718559 Reference Code - CPU = 9.0.1e.30
663 05:52:05.722208 uCode Version = 0.0.0.ca
664 05:52:05.725381 TXT ACM version = ff.ff.ff.ffff
665 05:52:05.728532 Display FSP Version Info HOB
666 05:52:05.731620 Reference Code - ME = 9.0.1e.30
667 05:52:05.734672 MEBx version = 0.0.0.0
668 05:52:05.737907 ME Firmware Version = Consumer SKU
669 05:52:05.741082 Display FSP Version Info HOB
670 05:52:05.744586 Reference Code - CML PCH = 9.0.1e.30
671 05:52:05.747782 PCH-CRID Status = Disabled
672 05:52:05.750961 PCH-CRID Original Value = ff.ff.ff.ffff
673 05:52:05.754745 PCH-CRID New Value = ff.ff.ff.ffff
674 05:52:05.757881 OPROM - RST - RAID = ff.ff.ff.ffff
675 05:52:05.761074 ChipsetInit Base Version = ff.ff.ff.ffff
676 05:52:05.767511 ChipsetInit Oem Version = ff.ff.ff.ffff
677 05:52:05.767624 Display FSP Version Info HOB
678 05:52:05.774129 Reference Code - SA - System Agent = 9.0.1e.30
679 05:52:05.777256 Reference Code - MRC = 0.7.1.6c
680 05:52:05.780413 SA - PCIe Version = 9.0.1e.30
681 05:52:05.783633 SA-CRID Status = Disabled
682 05:52:05.787484 SA-CRID Original Value = 0.0.0.c
683 05:52:05.787574 SA-CRID New Value = 0.0.0.c
684 05:52:05.790495 OPROM - VBIOS = ff.ff.ff.ffff
685 05:52:05.794415 RTC Init
686 05:52:05.797499 Set power on after power failure.
687 05:52:05.797593 Disabling Deep S3
688 05:52:05.800701 Disabling Deep S3
689 05:52:05.803839 Disabling Deep S4
690 05:52:05.803926 Disabling Deep S4
691 05:52:05.807045 Disabling Deep S5
692 05:52:05.807122 Disabling Deep S5
693 05:52:05.813997 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
694 05:52:05.817059 Enumerating buses...
695 05:52:05.820353 Show all devs... Before device enumeration.
696 05:52:05.823452 Root Device: enabled 1
697 05:52:05.826670 CPU_CLUSTER: 0: enabled 1
698 05:52:05.826764 DOMAIN: 0000: enabled 1
699 05:52:05.829929 APIC: 00: enabled 1
700 05:52:05.833186 PCI: 00:00.0: enabled 1
701 05:52:05.833308 PCI: 00:02.0: enabled 1
702 05:52:05.836912 PCI: 00:04.0: enabled 0
703 05:52:05.840042 PCI: 00:05.0: enabled 0
704 05:52:05.843055 PCI: 00:12.0: enabled 1
705 05:52:05.843140 PCI: 00:12.5: enabled 0
706 05:52:05.846231 PCI: 00:12.6: enabled 0
707 05:52:05.849435 PCI: 00:14.0: enabled 1
708 05:52:05.852506 PCI: 00:14.1: enabled 0
709 05:52:05.852602 PCI: 00:14.3: enabled 1
710 05:52:05.855858 PCI: 00:14.5: enabled 0
711 05:52:05.859733 PCI: 00:15.0: enabled 1
712 05:52:05.862974 PCI: 00:15.1: enabled 1
713 05:52:05.863063 PCI: 00:15.2: enabled 0
714 05:52:05.866222 PCI: 00:15.3: enabled 0
715 05:52:05.869369 PCI: 00:16.0: enabled 1
716 05:52:05.872746 PCI: 00:16.1: enabled 0
717 05:52:05.872832 PCI: 00:16.2: enabled 0
718 05:52:05.875733 PCI: 00:16.3: enabled 0
719 05:52:05.878978 PCI: 00:16.4: enabled 0
720 05:52:05.882168 PCI: 00:16.5: enabled 0
721 05:52:05.882260 PCI: 00:17.0: enabled 1
722 05:52:05.885350 PCI: 00:19.0: enabled 1
723 05:52:05.889149 PCI: 00:19.1: enabled 0
724 05:52:05.892172 PCI: 00:19.2: enabled 0
725 05:52:05.892263 PCI: 00:1a.0: enabled 0
726 05:52:05.895610 PCI: 00:1c.0: enabled 0
727 05:52:05.898701 PCI: 00:1c.1: enabled 0
728 05:52:05.901947 PCI: 00:1c.2: enabled 0
729 05:52:05.902033 PCI: 00:1c.3: enabled 0
730 05:52:05.904977 PCI: 00:1c.4: enabled 0
731 05:52:05.908293 PCI: 00:1c.5: enabled 0
732 05:52:05.912110 PCI: 00:1c.6: enabled 0
733 05:52:05.912209 PCI: 00:1c.7: enabled 0
734 05:52:05.915096 PCI: 00:1d.0: enabled 1
735 05:52:05.918502 PCI: 00:1d.1: enabled 0
736 05:52:05.921698 PCI: 00:1d.2: enabled 0
737 05:52:05.921791 PCI: 00:1d.3: enabled 0
738 05:52:05.924740 PCI: 00:1d.4: enabled 0
739 05:52:05.928056 PCI: 00:1d.5: enabled 1
740 05:52:05.928192 PCI: 00:1e.0: enabled 1
741 05:52:05.931231 PCI: 00:1e.1: enabled 0
742 05:52:05.934536 PCI: 00:1e.2: enabled 1
743 05:52:05.938288 PCI: 00:1e.3: enabled 1
744 05:52:05.938375 PCI: 00:1f.0: enabled 1
745 05:52:05.941560 PCI: 00:1f.1: enabled 1
746 05:52:05.944543 PCI: 00:1f.2: enabled 1
747 05:52:05.947712 PCI: 00:1f.3: enabled 1
748 05:52:05.947827 PCI: 00:1f.4: enabled 1
749 05:52:05.951345 PCI: 00:1f.5: enabled 1
750 05:52:05.954410 PCI: 00:1f.6: enabled 0
751 05:52:05.957582 USB0 port 0: enabled 1
752 05:52:05.957667 I2C: 00:15: enabled 1
753 05:52:05.960660 I2C: 00:5d: enabled 1
754 05:52:05.963876 GENERIC: 0.0: enabled 1
755 05:52:05.963961 I2C: 00:1a: enabled 1
756 05:52:05.967145 I2C: 00:38: enabled 1
757 05:52:05.970329 I2C: 00:39: enabled 1
758 05:52:05.973660 I2C: 00:3a: enabled 1
759 05:52:05.973761 I2C: 00:3b: enabled 1
760 05:52:05.977378 PCI: 00:00.0: enabled 1
761 05:52:05.980534 SPI: 00: enabled 1
762 05:52:05.980619 SPI: 01: enabled 1
763 05:52:05.983788 PNP: 0c09.0: enabled 1
764 05:52:05.987011 USB2 port 0: enabled 1
765 05:52:05.987097 USB2 port 1: enabled 1
766 05:52:05.990065 USB2 port 2: enabled 0
767 05:52:05.993658 USB2 port 3: enabled 0
768 05:52:05.993761 USB2 port 5: enabled 0
769 05:52:05.996973 USB2 port 6: enabled 1
770 05:52:06.000051 USB2 port 9: enabled 1
771 05:52:06.003176 USB3 port 0: enabled 1
772 05:52:06.003275 USB3 port 1: enabled 1
773 05:52:06.006318 USB3 port 2: enabled 1
774 05:52:06.010296 USB3 port 3: enabled 1
775 05:52:06.010383 USB3 port 4: enabled 0
776 05:52:06.013262 APIC: 05: enabled 1
777 05:52:06.016485 APIC: 01: enabled 1
778 05:52:06.016571 APIC: 02: enabled 1
779 05:52:06.019585 APIC: 04: enabled 1
780 05:52:06.019671 APIC: 06: enabled 1
781 05:52:06.022802 APIC: 03: enabled 1
782 05:52:06.026686 APIC: 07: enabled 1
783 05:52:06.026772 Compare with tree...
784 05:52:06.029877 Root Device: enabled 1
785 05:52:06.033031 CPU_CLUSTER: 0: enabled 1
786 05:52:06.036158 APIC: 00: enabled 1
787 05:52:06.036280 APIC: 05: enabled 1
788 05:52:06.039288 APIC: 01: enabled 1
789 05:52:06.042906 APIC: 02: enabled 1
790 05:52:06.042993 APIC: 04: enabled 1
791 05:52:06.046065 APIC: 06: enabled 1
792 05:52:06.049159 APIC: 03: enabled 1
793 05:52:06.049248 APIC: 07: enabled 1
794 05:52:06.052978 DOMAIN: 0000: enabled 1
795 05:52:06.056027 PCI: 00:00.0: enabled 1
796 05:52:06.059238 PCI: 00:02.0: enabled 1
797 05:52:06.062452 PCI: 00:04.0: enabled 0
798 05:52:06.062542 PCI: 00:05.0: enabled 0
799 05:52:06.065683 PCI: 00:12.0: enabled 1
800 05:52:06.068973 PCI: 00:12.5: enabled 0
801 05:52:06.072019 PCI: 00:12.6: enabled 0
802 05:52:06.075070 PCI: 00:14.0: enabled 1
803 05:52:06.075151 USB0 port 0: enabled 1
804 05:52:06.078511 USB2 port 0: enabled 1
805 05:52:06.082209 USB2 port 1: enabled 1
806 05:52:06.085252 USB2 port 2: enabled 0
807 05:52:06.088484 USB2 port 3: enabled 0
808 05:52:06.091672 USB2 port 5: enabled 0
809 05:52:06.091756 USB2 port 6: enabled 1
810 05:52:06.094977 USB2 port 9: enabled 1
811 05:52:06.098589 USB3 port 0: enabled 1
812 05:52:06.101781 USB3 port 1: enabled 1
813 05:52:06.105175 USB3 port 2: enabled 1
814 05:52:06.108270 USB3 port 3: enabled 1
815 05:52:06.108359 USB3 port 4: enabled 0
816 05:52:06.111477 PCI: 00:14.1: enabled 0
817 05:52:06.114663 PCI: 00:14.3: enabled 1
818 05:52:06.118379 PCI: 00:14.5: enabled 0
819 05:52:06.121471 PCI: 00:15.0: enabled 1
820 05:52:06.121559 I2C: 00:15: enabled 1
821 05:52:06.124793 PCI: 00:15.1: enabled 1
822 05:52:06.127860 I2C: 00:5d: enabled 1
823 05:52:06.131047 GENERIC: 0.0: enabled 1
824 05:52:06.134782 PCI: 00:15.2: enabled 0
825 05:52:06.134866 PCI: 00:15.3: enabled 0
826 05:52:06.137875 PCI: 00:16.0: enabled 1
827 05:52:06.141065 PCI: 00:16.1: enabled 0
828 05:52:06.144257 PCI: 00:16.2: enabled 0
829 05:52:06.147499 PCI: 00:16.3: enabled 0
830 05:52:06.147577 PCI: 00:16.4: enabled 0
831 05:52:06.150586 PCI: 00:16.5: enabled 0
832 05:52:06.154380 PCI: 00:17.0: enabled 1
833 05:52:06.157521 PCI: 00:19.0: enabled 1
834 05:52:06.160712 I2C: 00:1a: enabled 1
835 05:52:06.160792 I2C: 00:38: enabled 1
836 05:52:06.163969 I2C: 00:39: enabled 1
837 05:52:06.167253 I2C: 00:3a: enabled 1
838 05:52:06.170419 I2C: 00:3b: enabled 1
839 05:52:06.170505 PCI: 00:19.1: enabled 0
840 05:52:06.173642 PCI: 00:19.2: enabled 0
841 05:52:06.176746 PCI: 00:1a.0: enabled 0
842 05:52:06.180433 PCI: 00:1c.0: enabled 0
843 05:52:06.183717 PCI: 00:1c.1: enabled 0
844 05:52:06.183803 PCI: 00:1c.2: enabled 0
845 05:52:06.186906 PCI: 00:1c.3: enabled 0
846 05:52:06.190013 PCI: 00:1c.4: enabled 0
847 05:52:06.193204 PCI: 00:1c.5: enabled 0
848 05:52:06.196382 PCI: 00:1c.6: enabled 0
849 05:52:06.196468 PCI: 00:1c.7: enabled 0
850 05:52:06.200161 PCI: 00:1d.0: enabled 1
851 05:52:06.203471 PCI: 00:1d.1: enabled 0
852 05:52:06.206660 PCI: 00:1d.2: enabled 0
853 05:52:06.209953 PCI: 00:1d.3: enabled 0
854 05:52:06.210047 PCI: 00:1d.4: enabled 0
855 05:52:06.213053 PCI: 00:1d.5: enabled 1
856 05:52:06.216214 PCI: 00:00.0: enabled 1
857 05:52:06.219917 PCI: 00:1e.0: enabled 1
858 05:52:06.223176 PCI: 00:1e.1: enabled 0
859 05:52:06.226160 PCI: 00:1e.2: enabled 1
860 05:52:06.226246 SPI: 00: enabled 1
861 05:52:06.229424 PCI: 00:1e.3: enabled 1
862 05:52:06.232718 SPI: 01: enabled 1
863 05:52:06.235795 PCI: 00:1f.0: enabled 1
864 05:52:06.235890 PNP: 0c09.0: enabled 1
865 05:52:06.239046 PCI: 00:1f.1: enabled 1
866 05:52:06.242101 PCI: 00:1f.2: enabled 1
867 05:52:06.245803 PCI: 00:1f.3: enabled 1
868 05:52:06.249073 PCI: 00:1f.4: enabled 1
869 05:52:06.249159 PCI: 00:1f.5: enabled 1
870 05:52:06.252250 PCI: 00:1f.6: enabled 0
871 05:52:06.255397 Root Device scanning...
872 05:52:06.258563 scan_static_bus for Root Device
873 05:52:06.262356 CPU_CLUSTER: 0 enabled
874 05:52:06.262442 DOMAIN: 0000 enabled
875 05:52:06.265526 DOMAIN: 0000 scanning...
876 05:52:06.268772 PCI: pci_scan_bus for bus 00
877 05:52:06.272088 PCI: 00:00.0 [8086/0000] ops
878 05:52:06.275178 PCI: 00:00.0 [8086/9b61] enabled
879 05:52:06.278221 PCI: 00:02.0 [8086/0000] bus ops
880 05:52:06.281426 PCI: 00:02.0 [8086/9b41] enabled
881 05:52:06.284718 PCI: 00:04.0 [8086/1903] disabled
882 05:52:06.288512 PCI: 00:08.0 [8086/1911] enabled
883 05:52:06.291829 PCI: 00:12.0 [8086/02f9] enabled
884 05:52:06.294896 PCI: 00:14.0 [8086/0000] bus ops
885 05:52:06.298075 PCI: 00:14.0 [8086/02ed] enabled
886 05:52:06.301081 PCI: 00:14.2 [8086/02ef] enabled
887 05:52:06.304297 PCI: 00:14.3 [8086/02f0] enabled
888 05:52:06.308159 PCI: 00:15.0 [8086/0000] bus ops
889 05:52:06.311347 PCI: 00:15.0 [8086/02e8] enabled
890 05:52:06.314525 PCI: 00:15.1 [8086/0000] bus ops
891 05:52:06.317770 PCI: 00:15.1 [8086/02e9] enabled
892 05:52:06.320840 PCI: 00:16.0 [8086/0000] ops
893 05:52:06.324055 PCI: 00:16.0 [8086/02e0] enabled
894 05:52:06.327219 PCI: 00:17.0 [8086/0000] ops
895 05:52:06.331072 PCI: 00:17.0 [8086/02d3] enabled
896 05:52:06.333711 PCI: 00:19.0 [8086/0000] bus ops
897 05:52:06.337435 PCI: 00:19.0 [8086/02c5] enabled
898 05:52:06.340683 PCI: 00:1d.0 [8086/0000] bus ops
899 05:52:06.343753 PCI: 00:1d.0 [8086/02b0] enabled
900 05:52:06.350021 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 05:52:06.353874 PCI: 00:1e.0 [8086/0000] ops
902 05:52:06.357109 PCI: 00:1e.0 [8086/02a8] enabled
903 05:52:06.360285 PCI: 00:1e.2 [8086/0000] bus ops
904 05:52:06.363606 PCI: 00:1e.2 [8086/02aa] enabled
905 05:52:06.366869 PCI: 00:1e.3 [8086/0000] bus ops
906 05:52:06.369900 PCI: 00:1e.3 [8086/02ab] enabled
907 05:52:06.373153 PCI: 00:1f.0 [8086/0000] bus ops
908 05:52:06.376299 PCI: 00:1f.0 [8086/0284] enabled
909 05:52:06.382883 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 05:52:06.386735 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 05:52:06.389783 PCI: 00:1f.3 [8086/0000] bus ops
912 05:52:06.393017 PCI: 00:1f.3 [8086/02c8] enabled
913 05:52:06.396260 PCI: 00:1f.4 [8086/0000] bus ops
914 05:52:06.399457 PCI: 00:1f.4 [8086/02a3] enabled
915 05:52:06.402554 PCI: 00:1f.5 [8086/0000] bus ops
916 05:52:06.405751 PCI: 00:1f.5 [8086/02a4] enabled
917 05:52:06.409079 PCI: Leftover static devices:
918 05:52:06.412823 PCI: 00:05.0
919 05:52:06.412909 PCI: 00:12.5
920 05:52:06.416108 PCI: 00:12.6
921 05:52:06.416221 PCI: 00:14.1
922 05:52:06.416293 PCI: 00:14.5
923 05:52:06.419146 PCI: 00:15.2
924 05:52:06.419232 PCI: 00:15.3
925 05:52:06.422259 PCI: 00:16.1
926 05:52:06.422344 PCI: 00:16.2
927 05:52:06.425247 PCI: 00:16.3
928 05:52:06.425385 PCI: 00:16.4
929 05:52:06.425479 PCI: 00:16.5
930 05:52:06.429100 PCI: 00:19.1
931 05:52:06.429185 PCI: 00:19.2
932 05:52:06.432400 PCI: 00:1a.0
933 05:52:06.432485 PCI: 00:1c.0
934 05:52:06.432551 PCI: 00:1c.1
935 05:52:06.435629 PCI: 00:1c.2
936 05:52:06.435716 PCI: 00:1c.3
937 05:52:06.438924 PCI: 00:1c.4
938 05:52:06.439010 PCI: 00:1c.5
939 05:52:06.442031 PCI: 00:1c.6
940 05:52:06.442116 PCI: 00:1c.7
941 05:52:06.442183 PCI: 00:1d.1
942 05:52:06.445170 PCI: 00:1d.2
943 05:52:06.445256 PCI: 00:1d.3
944 05:52:06.448467 PCI: 00:1d.4
945 05:52:06.448552 PCI: 00:1d.5
946 05:52:06.448619 PCI: 00:1e.1
947 05:52:06.451646 PCI: 00:1f.1
948 05:52:06.451731 PCI: 00:1f.2
949 05:52:06.454773 PCI: 00:1f.6
950 05:52:06.458054 PCI: Check your devicetree.cb.
951 05:52:06.458140 PCI: 00:02.0 scanning...
952 05:52:06.464918 scan_generic_bus for PCI: 00:02.0
953 05:52:06.468123 scan_generic_bus for PCI: 00:02.0 done
954 05:52:06.471755 scan_bus: scanning of bus PCI: 00:02.0 took 10177 usecs
955 05:52:06.474855 PCI: 00:14.0 scanning...
956 05:52:06.478003 scan_static_bus for PCI: 00:14.0
957 05:52:06.481149 USB0 port 0 enabled
958 05:52:06.484435 USB0 port 0 scanning...
959 05:52:06.487712 scan_static_bus for USB0 port 0
960 05:52:06.487800 USB2 port 0 enabled
961 05:52:06.490827 USB2 port 1 enabled
962 05:52:06.494723 USB2 port 2 disabled
963 05:52:06.494811 USB2 port 3 disabled
964 05:52:06.497914 USB2 port 5 disabled
965 05:52:06.501052 USB2 port 6 enabled
966 05:52:06.501161 USB2 port 9 enabled
967 05:52:06.504160 USB3 port 0 enabled
968 05:52:06.504268 USB3 port 1 enabled
969 05:52:06.507431 USB3 port 2 enabled
970 05:52:06.510788 USB3 port 3 enabled
971 05:52:06.510904 USB3 port 4 disabled
972 05:52:06.513783 USB2 port 0 scanning...
973 05:52:06.517128 scan_static_bus for USB2 port 0
974 05:52:06.520279 scan_static_bus for USB2 port 0 done
975 05:52:06.526764 scan_bus: scanning of bus USB2 port 0 took 9688 usecs
976 05:52:06.529882 USB2 port 1 scanning...
977 05:52:06.533308 scan_static_bus for USB2 port 1
978 05:52:06.536578 scan_static_bus for USB2 port 1 done
979 05:52:06.543714 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
980 05:52:06.543809 USB2 port 6 scanning...
981 05:52:06.546941 scan_static_bus for USB2 port 6
982 05:52:06.553223 scan_static_bus for USB2 port 6 done
983 05:52:06.556350 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
984 05:52:06.560007 USB2 port 9 scanning...
985 05:52:06.563135 scan_static_bus for USB2 port 9
986 05:52:06.566332 scan_static_bus for USB2 port 9 done
987 05:52:06.572686 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
988 05:52:06.572783 USB3 port 0 scanning...
989 05:52:06.576495 scan_static_bus for USB3 port 0
990 05:52:06.582859 scan_static_bus for USB3 port 0 done
991 05:52:06.586118 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
992 05:52:06.589783 USB3 port 1 scanning...
993 05:52:06.592919 scan_static_bus for USB3 port 1
994 05:52:06.596026 scan_static_bus for USB3 port 1 done
995 05:52:06.602342 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
996 05:52:06.605997 USB3 port 2 scanning...
997 05:52:06.609347 scan_static_bus for USB3 port 2
998 05:52:06.612416 scan_static_bus for USB3 port 2 done
999 05:52:06.615698 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
1000 05:52:06.618995 USB3 port 3 scanning...
1001 05:52:06.622156 scan_static_bus for USB3 port 3
1002 05:52:06.625948 scan_static_bus for USB3 port 3 done
1003 05:52:06.632268 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
1004 05:52:06.635389 scan_static_bus for USB0 port 0 done
1005 05:52:06.641837 scan_bus: scanning of bus USB0 port 0 took 155324 usecs
1006 05:52:06.645097 scan_static_bus for PCI: 00:14.0 done
1007 05:52:06.651384 scan_bus: scanning of bus PCI: 00:14.0 took 172943 usecs
1008 05:52:06.651479 PCI: 00:15.0 scanning...
1009 05:52:06.658347 scan_generic_bus for PCI: 00:15.0
1010 05:52:06.661446 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 05:52:06.664579 scan_generic_bus for PCI: 00:15.0 done
1012 05:52:06.671677 scan_bus: scanning of bus PCI: 00:15.0 took 14287 usecs
1013 05:52:06.671777 PCI: 00:15.1 scanning...
1014 05:52:06.678021 scan_generic_bus for PCI: 00:15.1
1015 05:52:06.681292 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 05:52:06.684536 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 05:52:06.687731 scan_generic_bus for PCI: 00:15.1 done
1018 05:52:06.694979 scan_bus: scanning of bus PCI: 00:15.1 took 18599 usecs
1019 05:52:06.698201 PCI: 00:19.0 scanning...
1020 05:52:06.701308 scan_generic_bus for PCI: 00:19.0
1021 05:52:06.704441 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 05:52:06.707842 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 05:52:06.714169 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 05:52:06.717323 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 05:52:06.720610 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 05:52:06.723808 scan_generic_bus for PCI: 00:19.0 done
1027 05:52:06.730556 scan_bus: scanning of bus PCI: 00:19.0 took 30746 usecs
1028 05:52:06.733910 PCI: 00:1d.0 scanning...
1029 05:52:06.736872 do_pci_scan_bridge for PCI: 00:1d.0
1030 05:52:06.740083 PCI: pci_scan_bus for bus 01
1031 05:52:06.743315 PCI: 01:00.0 [1c5c/1327] enabled
1032 05:52:06.747132 Enabling Common Clock Configuration
1033 05:52:06.750472 L1 Sub-State supported from root port 29
1034 05:52:06.753755 L1 Sub-State Support = 0xf
1035 05:52:06.756771 CommonModeRestoreTime = 0x28
1036 05:52:06.759883 Power On Value = 0x16, Power On Scale = 0x0
1037 05:52:06.763202 ASPM: Enabled L1
1038 05:52:06.769562 scan_bus: scanning of bus PCI: 00:1d.0 took 32767 usecs
1039 05:52:06.769659 PCI: 00:1e.2 scanning...
1040 05:52:06.776581 scan_generic_bus for PCI: 00:1e.2
1041 05:52:06.779727 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 05:52:06.782961 scan_generic_bus for PCI: 00:1e.2 done
1043 05:52:06.789403 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1044 05:52:06.789493 PCI: 00:1e.3 scanning...
1045 05:52:06.792490 scan_generic_bus for PCI: 00:1e.3
1046 05:52:06.799411 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 05:52:06.802535 scan_generic_bus for PCI: 00:1e.3 done
1048 05:52:06.809433 scan_bus: scanning of bus PCI: 00:1e.3 took 13995 usecs
1049 05:52:06.809539 PCI: 00:1f.0 scanning...
1050 05:52:06.812720 scan_static_bus for PCI: 00:1f.0
1051 05:52:06.815901 PNP: 0c09.0 enabled
1052 05:52:06.819063 scan_static_bus for PCI: 00:1f.0 done
1053 05:52:06.825326 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1054 05:52:06.828682 PCI: 00:1f.3 scanning...
1055 05:52:06.832156 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1056 05:52:06.835491 PCI: 00:1f.4 scanning...
1057 05:52:06.838443 scan_generic_bus for PCI: 00:1f.4
1058 05:52:06.845434 scan_generic_bus for PCI: 00:1f.4 done
1059 05:52:06.848566 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1060 05:52:06.851770 PCI: 00:1f.5 scanning...
1061 05:52:06.854840 scan_generic_bus for PCI: 00:1f.5
1062 05:52:06.857913 scan_generic_bus for PCI: 00:1f.5 done
1063 05:52:06.864900 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1064 05:52:06.871119 scan_bus: scanning of bus DOMAIN: 0000 took 604893 usecs
1065 05:52:06.874276 scan_static_bus for Root Device done
1066 05:52:06.881143 scan_bus: scanning of bus Root Device took 624761 usecs
1067 05:52:06.881285 done
1068 05:52:06.884338 Chrome EC: UHEPI supported
1069 05:52:06.890722 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 05:52:06.894059 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 05:52:06.900300 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 05:52:06.907841 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 05:52:06.911025 SPI flash protection: WPSW=0 SRP0=1
1074 05:52:06.918199 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 05:52:06.921396 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 05:52:06.924367 found VGA at PCI: 00:02.0
1077 05:52:06.927535 Setting up VGA for PCI: 00:02.0
1078 05:52:06.933970 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 05:52:06.937789 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 05:52:06.940751 Allocating resources...
1081 05:52:06.943890 Reading resources...
1082 05:52:06.947143 Root Device read_resources bus 0 link: 0
1083 05:52:06.950358 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 05:52:06.956828 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 05:52:06.960559 DOMAIN: 0000 read_resources bus 0 link: 0
1086 05:52:06.968144 PCI: 00:14.0 read_resources bus 0 link: 0
1087 05:52:06.971281 USB0 port 0 read_resources bus 0 link: 0
1088 05:52:06.979530 USB0 port 0 read_resources bus 0 link: 0 done
1089 05:52:06.982876 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 05:52:06.990048 PCI: 00:15.0 read_resources bus 1 link: 0
1091 05:52:06.993225 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 05:52:07.000279 PCI: 00:15.1 read_resources bus 2 link: 0
1093 05:52:07.003551 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 05:52:07.010946 PCI: 00:19.0 read_resources bus 3 link: 0
1095 05:52:07.017196 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 05:52:07.020396 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 05:52:07.027364 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 05:52:07.030737 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 05:52:07.037001 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 05:52:07.040301 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 05:52:07.047260 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 05:52:07.050425 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 05:52:07.056831 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 05:52:07.063073 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 05:52:07.066968 Root Device read_resources bus 0 link: 0 done
1106 05:52:07.070070 Done reading resources.
1107 05:52:07.076273 Show resources in subtree (Root Device)...After reading.
1108 05:52:07.079469 Root Device child on link 0 CPU_CLUSTER: 0
1109 05:52:07.083282 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 05:52:07.086032 APIC: 00
1111 05:52:07.086120 APIC: 05
1112 05:52:07.086188 APIC: 01
1113 05:52:07.089826 APIC: 02
1114 05:52:07.089912 APIC: 04
1115 05:52:07.093149 APIC: 06
1116 05:52:07.093252 APIC: 03
1117 05:52:07.093343 APIC: 07
1118 05:52:07.099691 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 05:52:07.109086 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 05:52:07.119020 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 05:52:07.119127 PCI: 00:00.0
1122 05:52:07.169643 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 05:52:07.170030 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 05:52:07.170202 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 05:52:07.170475 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 05:52:07.171020 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 05:52:07.179666 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 05:52:07.186057 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 05:52:07.195631 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 05:52:07.202547 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 05:52:07.212293 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 05:52:07.222396 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 05:52:07.231834 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 05:52:07.241665 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 05:52:07.251210 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 05:52:07.261211 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 05:52:07.267813 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 05:52:07.271009 PCI: 00:02.0
1139 05:52:07.280511 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 05:52:07.290337 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 05:52:07.300607 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 05:52:07.300736 PCI: 00:04.0
1143 05:52:07.303885 PCI: 00:08.0
1144 05:52:07.313665 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 05:52:07.313801 PCI: 00:12.0
1146 05:52:07.322954 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 05:52:07.329430 PCI: 00:14.0 child on link 0 USB0 port 0
1148 05:52:07.339739 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 05:52:07.342818 USB0 port 0 child on link 0 USB2 port 0
1150 05:52:07.346190 USB2 port 0
1151 05:52:07.346281 USB2 port 1
1152 05:52:07.349219 USB2 port 2
1153 05:52:07.349347 USB2 port 3
1154 05:52:07.352453 USB2 port 5
1155 05:52:07.352540 USB2 port 6
1156 05:52:07.355660 USB2 port 9
1157 05:52:07.355749 USB3 port 0
1158 05:52:07.358840 USB3 port 1
1159 05:52:07.362088 USB3 port 2
1160 05:52:07.362183 USB3 port 3
1161 05:52:07.365278 USB3 port 4
1162 05:52:07.365382 PCI: 00:14.2
1163 05:52:07.375330 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 05:52:07.385395 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 05:52:07.388442 PCI: 00:14.3
1166 05:52:07.398268 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 05:52:07.401503 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 05:52:07.411208 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 05:52:07.415029 I2C: 01:15
1170 05:52:07.417727 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 05:52:07.427496 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 05:52:07.427617 I2C: 02:5d
1173 05:52:07.430773 GENERIC: 0.0
1174 05:52:07.430851 PCI: 00:16.0
1175 05:52:07.440823 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 05:52:07.444015 PCI: 00:17.0
1177 05:52:07.453703 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 05:52:07.460749 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 05:52:07.470164 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 05:52:07.479880 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 05:52:07.486791 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 05:52:07.496277 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 05:52:07.499430 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 05:52:07.509638 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 05:52:07.512733 I2C: 03:1a
1186 05:52:07.512826 I2C: 03:38
1187 05:52:07.516064 I2C: 03:39
1188 05:52:07.516153 I2C: 03:3a
1189 05:52:07.519251 I2C: 03:3b
1190 05:52:07.522354 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 05:52:07.532144 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 05:52:07.541836 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 05:52:07.548668 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 05:52:07.551727 PCI: 01:00.0
1195 05:52:07.561559 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 05:52:07.564729 PCI: 00:1e.0
1197 05:52:07.574990 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 05:52:07.584402 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 05:52:07.587981 PCI: 00:1e.2 child on link 0 SPI: 00
1200 05:52:07.597501 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 05:52:07.600776 SPI: 00
1202 05:52:07.604070 PCI: 00:1e.3 child on link 0 SPI: 01
1203 05:52:07.614326 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 05:52:07.614482 SPI: 01
1205 05:52:07.620869 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 05:52:07.626980 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 05:52:07.637116 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 05:52:07.637224 PNP: 0c09.0
1209 05:52:07.646851 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 05:52:07.650183 PCI: 00:1f.3
1211 05:52:07.659440 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 05:52:07.669903 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 05:52:07.670020 PCI: 00:1f.4
1214 05:52:07.679427 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 05:52:07.689233 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 05:52:07.692329 PCI: 00:1f.5
1217 05:52:07.699261 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 05:52:07.705601 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 05:52:07.712062 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 05:52:07.718458 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 05:52:07.721734 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 05:52:07.725319 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 05:52:07.731901 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 05:52:07.734976 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 05:52:07.741434 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 05:52:07.748335 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 05:52:07.754642 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 05:52:07.764528 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 05:52:07.770988 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 05:52:07.774136 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 05:52:07.780623 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 05:52:07.787594 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 05:52:07.790688 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 05:52:07.797066 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 05:52:07.800236 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 05:52:07.807376 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 05:52:07.810509 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 05:52:07.816864 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 05:52:07.820113 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 05:52:07.826405 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 05:52:07.830141 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 05:52:07.836497 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 05:52:07.839841 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 05:52:07.846069 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 05:52:07.849397 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 05:52:07.856262 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 05:52:07.859276 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 05:52:07.865795 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 05:52:07.868922 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 05:52:07.875824 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 05:52:07.878814 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 05:52:07.885169 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 05:52:07.889058 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 05:52:07.895396 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 05:52:07.901946 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 05:52:07.904969 avoid_fixed_resources: DOMAIN: 0000
1257 05:52:07.911482 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 05:52:07.917888 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 05:52:07.924190 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 05:52:07.934285 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 05:52:07.940862 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 05:52:07.947296 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 05:52:07.957191 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 05:52:07.963378 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 05:52:07.970316 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 05:52:07.979903 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 05:52:07.987038 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 05:52:07.992984 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 05:52:07.996662 Setting resources...
1270 05:52:08.003264 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 05:52:08.006228 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 05:52:08.009424 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 05:52:08.012667 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 05:52:08.015866 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 05:52:08.023337 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 05:52:08.029161 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 05:52:08.036070 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 05:52:08.045763 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 05:52:08.048794 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 05:52:08.055198 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 05:52:08.058437 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 05:52:08.065547 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 05:52:08.068743 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 05:52:08.074963 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 05:52:08.078178 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 05:52:08.084546 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 05:52:08.087868 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 05:52:08.094808 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 05:52:08.097938 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 05:52:08.104095 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 05:52:08.107335 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 05:52:08.113861 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 05:52:08.117200 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 05:52:08.124101 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 05:52:08.127159 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 05:52:08.133866 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 05:52:08.136824 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 05:52:08.139970 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 05:52:08.147175 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 05:52:08.150161 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 05:52:08.156643 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 05:52:08.162738 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 05:52:08.172929 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 05:52:08.179356 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 05:52:08.185787 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 05:52:08.192490 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 05:52:08.198709 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 05:52:08.201922 Root Device assign_resources, bus 0 link: 0
1309 05:52:08.208793 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 05:52:08.215197 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 05:52:08.224732 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 05:52:08.231251 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 05:52:08.241464 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 05:52:08.247904 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 05:52:08.257507 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 05:52:08.260667 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 05:52:08.267442 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 05:52:08.273858 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 05:52:08.283394 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 05:52:08.290391 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 05:52:08.299942 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 05:52:08.303503 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 05:52:08.309711 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 05:52:08.316067 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 05:52:08.319311 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 05:52:08.326485 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 05:52:08.332808 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 05:52:08.342367 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 05:52:08.349563 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 05:52:08.359194 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 05:52:08.365319 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 05:52:08.371805 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 05:52:08.381963 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 05:52:08.387968 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 05:52:08.395075 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 05:52:08.398295 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 05:52:08.407795 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 05:52:08.414480 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 05:52:08.424086 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 05:52:08.427890 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 05:52:08.437411 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 05:52:08.440526 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 05:52:08.450561 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 05:52:08.457166 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 05:52:08.463454 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 05:52:08.466673 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 05:52:08.476860 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 05:52:08.480055 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 05:52:08.486531 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 05:52:08.489812 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 05:52:08.496165 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 05:52:08.499382 LPC: Trying to open IO window from 800 size 1ff
1353 05:52:08.509234 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 05:52:08.515699 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 05:52:08.525855 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 05:52:08.532273 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 05:52:08.538830 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 05:52:08.541959 Root Device assign_resources, bus 0 link: 0
1359 05:52:08.545170 Done setting resources.
1360 05:52:08.551778 Show resources in subtree (Root Device)...After assigning values.
1361 05:52:08.555066 Root Device child on link 0 CPU_CLUSTER: 0
1362 05:52:08.558341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 05:52:08.561589 APIC: 00
1364 05:52:08.561690 APIC: 05
1365 05:52:08.564666 APIC: 01
1366 05:52:08.564752 APIC: 02
1367 05:52:08.564819 APIC: 04
1368 05:52:08.568022 APIC: 06
1369 05:52:08.568111 APIC: 03
1370 05:52:08.568180 APIC: 07
1371 05:52:08.574374 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 05:52:08.584461 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 05:52:08.594388 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 05:52:08.597567 PCI: 00:00.0
1375 05:52:08.607141 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 05:52:08.613638 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 05:52:08.623976 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 05:52:08.633339 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 05:52:08.643085 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 05:52:08.653217 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 05:52:08.662914 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 05:52:08.673090 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 05:52:08.679361 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 05:52:08.689086 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 05:52:08.698821 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 05:52:08.708945 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 05:52:08.718395 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 05:52:08.728384 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 05:52:08.738163 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 05:52:08.745200 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 05:52:08.748169 PCI: 00:02.0
1392 05:52:08.757703 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 05:52:08.767483 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 05:52:08.778046 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 05:52:08.780566 PCI: 00:04.0
1396 05:52:08.780672 PCI: 00:08.0
1397 05:52:08.790345 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 05:52:08.793863 PCI: 00:12.0
1399 05:52:08.803488 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 05:52:08.806732 PCI: 00:14.0 child on link 0 USB0 port 0
1401 05:52:08.819898 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 05:52:08.823657 USB0 port 0 child on link 0 USB2 port 0
1403 05:52:08.823751 USB2 port 0
1404 05:52:08.826848 USB2 port 1
1405 05:52:08.826938 USB2 port 2
1406 05:52:08.830113 USB2 port 3
1407 05:52:08.833220 USB2 port 5
1408 05:52:08.833312 USB2 port 6
1409 05:52:08.836407 USB2 port 9
1410 05:52:08.836486 USB3 port 0
1411 05:52:08.839499 USB3 port 1
1412 05:52:08.839579 USB3 port 2
1413 05:52:08.842796 USB3 port 3
1414 05:52:08.842883 USB3 port 4
1415 05:52:08.846028 PCI: 00:14.2
1416 05:52:08.856017 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 05:52:08.866262 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 05:52:08.869409 PCI: 00:14.3
1419 05:52:08.878953 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 05:52:08.882040 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 05:52:08.892219 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 05:52:08.895385 I2C: 01:15
1423 05:52:08.898679 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 05:52:08.908794 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 05:52:08.912026 I2C: 02:5d
1426 05:52:08.912116 GENERIC: 0.0
1427 05:52:08.915238 PCI: 00:16.0
1428 05:52:08.925156 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 05:52:08.925252 PCI: 00:17.0
1430 05:52:08.935085 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 05:52:08.948085 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 05:52:08.954253 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 05:52:08.964150 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 05:52:08.974162 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 05:52:08.983806 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 05:52:08.987020 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 05:52:08.996709 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 05:52:09.000497 I2C: 03:1a
1439 05:52:09.000581 I2C: 03:38
1440 05:52:09.003683 I2C: 03:39
1441 05:52:09.003770 I2C: 03:3a
1442 05:52:09.007004 I2C: 03:3b
1443 05:52:09.009714 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 05:52:09.019984 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 05:52:09.029231 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 05:52:09.039307 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 05:52:09.043028 PCI: 01:00.0
1448 05:52:09.052770 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 05:52:09.052865 PCI: 00:1e.0
1450 05:52:09.065817 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 05:52:09.075128 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 05:52:09.078989 PCI: 00:1e.2 child on link 0 SPI: 00
1453 05:52:09.088178 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 05:52:09.091541 SPI: 00
1455 05:52:09.094734 PCI: 00:1e.3 child on link 0 SPI: 01
1456 05:52:09.104541 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 05:52:09.107785 SPI: 01
1458 05:52:09.111192 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 05:52:09.118083 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 05:52:09.127672 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 05:52:09.130971 PNP: 0c09.0
1462 05:52:09.137660 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 05:52:09.140862 PCI: 00:1f.3
1464 05:52:09.150242 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 05:52:09.160709 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 05:52:09.163769 PCI: 00:1f.4
1467 05:52:09.173549 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 05:52:09.183315 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 05:52:09.183428 PCI: 00:1f.5
1470 05:52:09.193001 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 05:52:09.196352 Done allocating resources.
1472 05:52:09.202541 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 05:52:09.206428 Enabling resources...
1474 05:52:09.209558 PCI: 00:00.0 subsystem <- 8086/9b61
1475 05:52:09.212825 PCI: 00:00.0 cmd <- 06
1476 05:52:09.216002 PCI: 00:02.0 subsystem <- 8086/9b41
1477 05:52:09.219400 PCI: 00:02.0 cmd <- 03
1478 05:52:09.222743 PCI: 00:08.0 cmd <- 06
1479 05:52:09.225773 PCI: 00:12.0 subsystem <- 8086/02f9
1480 05:52:09.225863 PCI: 00:12.0 cmd <- 02
1481 05:52:09.232794 PCI: 00:14.0 subsystem <- 8086/02ed
1482 05:52:09.232893 PCI: 00:14.0 cmd <- 02
1483 05:52:09.235525 PCI: 00:14.2 cmd <- 02
1484 05:52:09.239213 PCI: 00:14.3 subsystem <- 8086/02f0
1485 05:52:09.242397 PCI: 00:14.3 cmd <- 02
1486 05:52:09.245707 PCI: 00:15.0 subsystem <- 8086/02e8
1487 05:52:09.248845 PCI: 00:15.0 cmd <- 02
1488 05:52:09.251724 PCI: 00:15.1 subsystem <- 8086/02e9
1489 05:52:09.255057 PCI: 00:15.1 cmd <- 02
1490 05:52:09.258935 PCI: 00:16.0 subsystem <- 8086/02e0
1491 05:52:09.262113 PCI: 00:16.0 cmd <- 02
1492 05:52:09.265150 PCI: 00:17.0 subsystem <- 8086/02d3
1493 05:52:09.268558 PCI: 00:17.0 cmd <- 03
1494 05:52:09.271892 PCI: 00:19.0 subsystem <- 8086/02c5
1495 05:52:09.275063 PCI: 00:19.0 cmd <- 02
1496 05:52:09.278274 PCI: 00:1d.0 bridge ctrl <- 0013
1497 05:52:09.281246 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 05:52:09.285081 PCI: 00:1d.0 cmd <- 06
1499 05:52:09.288326 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 05:52:09.288416 PCI: 00:1e.0 cmd <- 06
1501 05:52:09.294666 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 05:52:09.294755 PCI: 00:1e.2 cmd <- 06
1503 05:52:09.301697 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 05:52:09.301785 PCI: 00:1e.3 cmd <- 02
1505 05:52:09.304301 PCI: 00:1f.0 subsystem <- 8086/0284
1506 05:52:09.308087 PCI: 00:1f.0 cmd <- 407
1507 05:52:09.311262 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 05:52:09.314489 PCI: 00:1f.3 cmd <- 02
1509 05:52:09.317565 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 05:52:09.320763 PCI: 00:1f.4 cmd <- 03
1511 05:52:09.324483 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 05:52:09.327559 PCI: 00:1f.5 cmd <- 406
1513 05:52:09.336238 PCI: 01:00.0 cmd <- 02
1514 05:52:09.341272 done.
1515 05:52:09.350049 ME: Version: 14.0.39.1367
1516 05:52:09.356482 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1517 05:52:09.359583 Initializing devices...
1518 05:52:09.359685 Root Device init ...
1519 05:52:09.365914 Chrome EC: Set SMI mask to 0x0000000000000000
1520 05:52:09.369464 Chrome EC: clear events_b mask to 0x0000000000000000
1521 05:52:09.376153 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 05:52:09.382677 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 05:52:09.389788 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 05:52:09.393030 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 05:52:09.399329 Root Device init finished in 35193 usecs
1526 05:52:09.399426 CPU_CLUSTER: 0 init ...
1527 05:52:09.405758 CPU_CLUSTER: 0 init finished in 2440 usecs
1528 05:52:09.410450 PCI: 00:00.0 init ...
1529 05:52:09.414107 CPU TDP: 15 Watts
1530 05:52:09.417498 CPU PL2 = 64 Watts
1531 05:52:09.420617 PCI: 00:00.0 init finished in 7076 usecs
1532 05:52:09.423808 PCI: 00:02.0 init ...
1533 05:52:09.427026 PCI: 00:02.0 init finished in 2253 usecs
1534 05:52:09.430288 PCI: 00:08.0 init ...
1535 05:52:09.433575 PCI: 00:08.0 init finished in 2253 usecs
1536 05:52:09.436593 PCI: 00:12.0 init ...
1537 05:52:09.439991 PCI: 00:12.0 init finished in 2253 usecs
1538 05:52:09.443059 PCI: 00:14.0 init ...
1539 05:52:09.446299 PCI: 00:14.0 init finished in 2253 usecs
1540 05:52:09.449556 PCI: 00:14.2 init ...
1541 05:52:09.452847 PCI: 00:14.2 init finished in 2254 usecs
1542 05:52:09.456665 PCI: 00:14.3 init ...
1543 05:52:09.459824 PCI: 00:14.3 init finished in 2271 usecs
1544 05:52:09.462889 PCI: 00:15.0 init ...
1545 05:52:09.466035 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 05:52:09.473128 PCI: 00:15.0 init finished in 5981 usecs
1547 05:52:09.473222 PCI: 00:15.1 init ...
1548 05:52:09.479578 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 05:52:09.482895 PCI: 00:15.1 init finished in 5979 usecs
1550 05:52:09.486066 PCI: 00:16.0 init ...
1551 05:52:09.489255 PCI: 00:16.0 init finished in 2252 usecs
1552 05:52:09.492534 PCI: 00:19.0 init ...
1553 05:52:09.495699 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 05:52:09.498965 PCI: 00:19.0 init finished in 5979 usecs
1555 05:52:09.502079 PCI: 00:1d.0 init ...
1556 05:52:09.505278 Initializing PCH PCIe bridge.
1557 05:52:09.509147 PCI: 00:1d.0 init finished in 5284 usecs
1558 05:52:09.512310 PCI: 00:1f.0 init ...
1559 05:52:09.516010 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 05:52:09.522368 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 05:52:09.522456 IOAPIC: ID = 0x02
1562 05:52:09.525684 IOAPIC: Dumping registers
1563 05:52:09.528818 reg 0x0000: 0x02000000
1564 05:52:09.531740 reg 0x0001: 0x00770020
1565 05:52:09.535547 reg 0x0002: 0x00000000
1566 05:52:09.538743 PCI: 00:1f.0 init finished in 23551 usecs
1567 05:52:09.541937 PCI: 00:1f.4 init ...
1568 05:52:09.544989 PCI: 00:1f.4 init finished in 2264 usecs
1569 05:52:09.556620 PCI: 01:00.0 init ...
1570 05:52:09.559759 PCI: 01:00.0 init finished in 2245 usecs
1571 05:52:09.564342 PNP: 0c09.0 init ...
1572 05:52:09.570659 Google Chrome EC uptime: 11.081 seconds
1573 05:52:09.573815 Google Chrome AP resets since EC boot: 0
1574 05:52:09.577084 Google Chrome most recent AP reset causes:
1575 05:52:09.583805 Google Chrome EC reset flags at last EC boot: reset-pin
1576 05:52:09.587491 PNP: 0c09.0 init finished in 20578 usecs
1577 05:52:09.590832 Devices initialized
1578 05:52:09.593892 Show all devs... After init.
1579 05:52:09.593980 Root Device: enabled 1
1580 05:52:09.597114 CPU_CLUSTER: 0: enabled 1
1581 05:52:09.600457 DOMAIN: 0000: enabled 1
1582 05:52:09.603783 APIC: 00: enabled 1
1583 05:52:09.603941 PCI: 00:00.0: enabled 1
1584 05:52:09.607105 PCI: 00:02.0: enabled 1
1585 05:52:09.610279 PCI: 00:04.0: enabled 0
1586 05:52:09.610366 PCI: 00:05.0: enabled 0
1587 05:52:09.613531 PCI: 00:12.0: enabled 1
1588 05:52:09.616793 PCI: 00:12.5: enabled 0
1589 05:52:09.619853 PCI: 00:12.6: enabled 0
1590 05:52:09.619944 PCI: 00:14.0: enabled 1
1591 05:52:09.623079 PCI: 00:14.1: enabled 0
1592 05:52:09.626426 PCI: 00:14.3: enabled 1
1593 05:52:09.629547 PCI: 00:14.5: enabled 0
1594 05:52:09.629636 PCI: 00:15.0: enabled 1
1595 05:52:09.632723 PCI: 00:15.1: enabled 1
1596 05:52:09.636509 PCI: 00:15.2: enabled 0
1597 05:52:09.639658 PCI: 00:15.3: enabled 0
1598 05:52:09.639742 PCI: 00:16.0: enabled 1
1599 05:52:09.642984 PCI: 00:16.1: enabled 0
1600 05:52:09.646340 PCI: 00:16.2: enabled 0
1601 05:52:09.649415 PCI: 00:16.3: enabled 0
1602 05:52:09.649493 PCI: 00:16.4: enabled 0
1603 05:52:09.652764 PCI: 00:16.5: enabled 0
1604 05:52:09.656058 PCI: 00:17.0: enabled 1
1605 05:52:09.659356 PCI: 00:19.0: enabled 1
1606 05:52:09.659442 PCI: 00:19.1: enabled 0
1607 05:52:09.662172 PCI: 00:19.2: enabled 0
1608 05:52:09.665508 PCI: 00:1a.0: enabled 0
1609 05:52:09.669135 PCI: 00:1c.0: enabled 0
1610 05:52:09.669234 PCI: 00:1c.1: enabled 0
1611 05:52:09.672532 PCI: 00:1c.2: enabled 0
1612 05:52:09.675219 PCI: 00:1c.3: enabled 0
1613 05:52:09.678407 PCI: 00:1c.4: enabled 0
1614 05:52:09.678494 PCI: 00:1c.5: enabled 0
1615 05:52:09.681556 PCI: 00:1c.6: enabled 0
1616 05:52:09.685503 PCI: 00:1c.7: enabled 0
1617 05:52:09.688182 PCI: 00:1d.0: enabled 1
1618 05:52:09.688268 PCI: 00:1d.1: enabled 0
1619 05:52:09.691291 PCI: 00:1d.2: enabled 0
1620 05:52:09.694490 PCI: 00:1d.3: enabled 0
1621 05:52:09.698492 PCI: 00:1d.4: enabled 0
1622 05:52:09.698582 PCI: 00:1d.5: enabled 0
1623 05:52:09.701110 PCI: 00:1e.0: enabled 1
1624 05:52:09.704403 PCI: 00:1e.1: enabled 0
1625 05:52:09.707745 PCI: 00:1e.2: enabled 1
1626 05:52:09.707836 PCI: 00:1e.3: enabled 1
1627 05:52:09.710985 PCI: 00:1f.0: enabled 1
1628 05:52:09.714442 PCI: 00:1f.1: enabled 0
1629 05:52:09.717713 PCI: 00:1f.2: enabled 0
1630 05:52:09.717804 PCI: 00:1f.3: enabled 1
1631 05:52:09.720998 PCI: 00:1f.4: enabled 1
1632 05:52:09.724469 PCI: 00:1f.5: enabled 1
1633 05:52:09.727704 PCI: 00:1f.6: enabled 0
1634 05:52:09.727793 USB0 port 0: enabled 1
1635 05:52:09.730737 I2C: 01:15: enabled 1
1636 05:52:09.733914 I2C: 02:5d: enabled 1
1637 05:52:09.733995 GENERIC: 0.0: enabled 1
1638 05:52:09.737022 I2C: 03:1a: enabled 1
1639 05:52:09.740346 I2C: 03:38: enabled 1
1640 05:52:09.740430 I2C: 03:39: enabled 1
1641 05:52:09.743693 I2C: 03:3a: enabled 1
1642 05:52:09.747119 I2C: 03:3b: enabled 1
1643 05:52:09.750461 PCI: 00:00.0: enabled 1
1644 05:52:09.750541 SPI: 00: enabled 1
1645 05:52:09.753922 SPI: 01: enabled 1
1646 05:52:09.754011 PNP: 0c09.0: enabled 1
1647 05:52:09.756938 USB2 port 0: enabled 1
1648 05:52:09.760323 USB2 port 1: enabled 1
1649 05:52:09.763658 USB2 port 2: enabled 0
1650 05:52:09.763746 USB2 port 3: enabled 0
1651 05:52:09.766758 USB2 port 5: enabled 0
1652 05:52:09.769850 USB2 port 6: enabled 1
1653 05:52:09.769939 USB2 port 9: enabled 1
1654 05:52:09.773676 USB3 port 0: enabled 1
1655 05:52:09.777017 USB3 port 1: enabled 1
1656 05:52:09.780210 USB3 port 2: enabled 1
1657 05:52:09.780298 USB3 port 3: enabled 1
1658 05:52:09.783383 USB3 port 4: enabled 0
1659 05:52:09.786658 APIC: 05: enabled 1
1660 05:52:09.786749 APIC: 01: enabled 1
1661 05:52:09.789545 APIC: 02: enabled 1
1662 05:52:09.789634 APIC: 04: enabled 1
1663 05:52:09.792880 APIC: 06: enabled 1
1664 05:52:09.795972 APIC: 03: enabled 1
1665 05:52:09.796062 APIC: 07: enabled 1
1666 05:52:09.799760 PCI: 00:08.0: enabled 1
1667 05:52:09.803227 PCI: 00:14.2: enabled 1
1668 05:52:09.805813 PCI: 01:00.0: enabled 1
1669 05:52:09.809768 Disabling ACPI via APMC:
1670 05:52:09.809853 done.
1671 05:52:09.816311 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 05:52:09.818898 ELOG: NV offset 0xaf0000 size 0x4000
1673 05:52:09.825589 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 05:52:09.832694 ELOG: Event(17) added with size 13 at 2022-08-23 05:51:56 UTC
1675 05:52:09.839305 POST: Unexpected post code in previous boot: 0x73
1676 05:52:09.845561 ELOG: Event(A3) added with size 11 at 2022-08-23 05:51:56 UTC
1677 05:52:09.851962 ELOG: Event(A6) added with size 13 at 2022-08-23 05:51:56 UTC
1678 05:52:09.858683 ELOG: Event(92) added with size 9 at 2022-08-23 05:51:56 UTC
1679 05:52:09.865545 ELOG: Event(93) added with size 9 at 2022-08-23 05:51:56 UTC
1680 05:52:09.871856 ELOG: Event(9A) added with size 9 at 2022-08-23 05:51:56 UTC
1681 05:52:09.878331 ELOG: Event(9E) added with size 10 at 2022-08-23 05:51:56 UTC
1682 05:52:09.881652 ELOG: Event(9F) added with size 14 at 2022-08-23 05:51:56 UTC
1683 05:52:09.887591 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1684 05:52:09.894142 ELOG: Event(A1) added with size 10 at 2022-08-23 05:51:56 UTC
1685 05:52:09.904077 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1686 05:52:09.907371 ELOG: Event(A0) added with size 9 at 2022-08-23 05:51:56 UTC
1687 05:52:09.913831 elog_add_boot_reason: Logged dev mode boot
1688 05:52:09.913921 Finalize devices...
1689 05:52:09.917086 PCI: 00:17.0 final
1690 05:52:09.920463 Devices finalized
1691 05:52:09.923714 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1692 05:52:09.930220 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1693 05:52:09.933571 ME: HFSTS1 : 0x90000245
1694 05:52:09.936884 ME: HFSTS2 : 0x3B850126
1695 05:52:09.943250 ME: HFSTS3 : 0x00000020
1696 05:52:09.946354 ME: HFSTS4 : 0x00004800
1697 05:52:09.949584 ME: HFSTS5 : 0x00000000
1698 05:52:09.953059 ME: HFSTS6 : 0x40400006
1699 05:52:09.956319 ME: Manufacturing Mode : NO
1700 05:52:09.959686 ME: FW Partition Table : OK
1701 05:52:09.962951 ME: Bringup Loader Failure : NO
1702 05:52:09.966090 ME: Firmware Init Complete : YES
1703 05:52:09.969451 ME: Boot Options Present : NO
1704 05:52:09.972728 ME: Update In Progress : NO
1705 05:52:09.979280 ME: D0i3 Support : YES
1706 05:52:09.982545 ME: Low Power State Enabled : NO
1707 05:52:09.986035 ME: CPU Replaced : NO
1708 05:52:09.989204 ME: CPU Replacement Valid : YES
1709 05:52:09.992417 ME: Current Working State : 5
1710 05:52:09.995539 ME: Current Operation State : 1
1711 05:52:09.998740 ME: Current Operation Mode : 0
1712 05:52:10.002422 ME: Error Code : 0
1713 05:52:10.005589 ME: CPU Debug Disabled : YES
1714 05:52:10.008783 ME: TXT Support : NO
1715 05:52:10.012444 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1716 05:52:10.018926 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1717 05:52:10.022214 CBFS @ c08000 size 3f8000
1718 05:52:10.025372 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1719 05:52:10.028492 CBFS: Locating 'fallback/dsdt.aml'
1720 05:52:10.035532 CBFS: Found @ offset 10bb80 size 3fa5
1721 05:52:10.038700 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 05:52:10.042285 CBFS @ c08000 size 3f8000
1723 05:52:10.048460 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 05:52:10.051678 CBFS: Locating 'fallback/slic'
1725 05:52:10.054889 CBFS: 'fallback/slic' not found.
1726 05:52:10.061460 ACPI: Writing ACPI tables at 99b3e000.
1727 05:52:10.061547 ACPI: * FACS
1728 05:52:10.064723 ACPI: * DSDT
1729 05:52:10.068308 Ramoops buffer: 0x100000@0x99a3d000.
1730 05:52:10.071452 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1731 05:52:10.077856 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1732 05:52:10.080903 Google Chrome EC: version:
1733 05:52:10.084264 ro: helios_v2.0.2659-56403530b
1734 05:52:10.088128 rw: helios_v2.0.2849-c41de27e7d
1735 05:52:10.088216 running image: 1
1736 05:52:10.092003 ACPI: * FADT
1737 05:52:10.092092 SCI is IRQ9
1738 05:52:10.098318 ACPI: added table 1/32, length now 40
1739 05:52:10.098404 ACPI: * SSDT
1740 05:52:10.101535 Found 1 CPU(s) with 8 core(s) each.
1741 05:52:10.108466 Error: Could not locate 'wifi_sar' in VPD.
1742 05:52:10.111694 Checking CBFS for default SAR values
1743 05:52:10.114902 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1744 05:52:10.118158 CBFS @ c08000 size 3f8000
1745 05:52:10.124480 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1746 05:52:10.127763 CBFS: Locating 'wifi_sar_defaults.hex'
1747 05:52:10.130941 CBFS: Found @ offset 5fac0 size 77
1748 05:52:10.134179 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1749 05:52:10.141082 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1750 05:52:10.144136 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1751 05:52:10.151032 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1752 05:52:10.153710 failed to find key in VPD: dsm_calib_r0_0
1753 05:52:10.163942 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1754 05:52:10.170235 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1755 05:52:10.173536 failed to find key in VPD: dsm_calib_r0_1
1756 05:52:10.183678 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1757 05:52:10.186922 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1758 05:52:10.190109 failed to find key in VPD: dsm_calib_r0_2
1759 05:52:10.199553 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1760 05:52:10.206335 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1761 05:52:10.209713 failed to find key in VPD: dsm_calib_r0_3
1762 05:52:10.219686 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1763 05:52:10.222814 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1764 05:52:10.229167 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1765 05:52:10.232460 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1766 05:52:10.235769 EC returned error result code 1
1767 05:52:10.238861 EC returned error result code 1
1768 05:52:10.242199 EC returned error result code 1
1769 05:52:10.249086 PS2K: Bad resp from EC. Vivaldi disabled!
1770 05:52:10.255754 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1771 05:52:10.258711 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1772 05:52:10.265277 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1773 05:52:10.268502 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1774 05:52:10.274738 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1775 05:52:10.281192 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1776 05:52:10.288464 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1777 05:52:10.294632 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1778 05:52:10.297919 ACPI: added table 2/32, length now 44
1779 05:52:10.298102 ACPI: * MCFG
1780 05:52:10.301243 ACPI: added table 3/32, length now 48
1781 05:52:10.304256 ACPI: * TPM2
1782 05:52:10.307535 TPM2 log created at 99a2d000
1783 05:52:10.311404 ACPI: added table 4/32, length now 52
1784 05:52:10.314363 ACPI: * MADT
1785 05:52:10.314605 SCI is IRQ9
1786 05:52:10.317665 ACPI: added table 5/32, length now 56
1787 05:52:10.320982 current = 99b43ac0
1788 05:52:10.321195 ACPI: * DMAR
1789 05:52:10.324216 ACPI: added table 6/32, length now 60
1790 05:52:10.327694 ACPI: * IGD OpRegion
1791 05:52:10.331101 GMA: Found VBT in CBFS
1792 05:52:10.333759 GMA: Found valid VBT in CBFS
1793 05:52:10.337165 ACPI: added table 7/32, length now 64
1794 05:52:10.337604 ACPI: * HPET
1795 05:52:10.344043 ACPI: added table 8/32, length now 68
1796 05:52:10.344497 ACPI: done.
1797 05:52:10.347233 ACPI tables: 31744 bytes.
1798 05:52:10.350470 smbios_write_tables: 99a2c000
1799 05:52:10.353524 EC returned error result code 3
1800 05:52:10.356720 Couldn't obtain OEM name from CBI
1801 05:52:10.360791 Create SMBIOS type 17
1802 05:52:10.363863 PCI: 00:00.0 (Intel Cannonlake)
1803 05:52:10.364281 PCI: 00:14.3 (Intel WiFi)
1804 05:52:10.367282 SMBIOS tables: 939 bytes.
1805 05:52:10.369836 Writing table forward entry at 0x00000500
1806 05:52:10.376987 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1807 05:52:10.379986 Writing coreboot table at 0x99b62000
1808 05:52:10.386471 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1809 05:52:10.392907 1. 0000000000001000-000000000009ffff: RAM
1810 05:52:10.396178 2. 00000000000a0000-00000000000fffff: RESERVED
1811 05:52:10.399321 3. 0000000000100000-0000000099a2bfff: RAM
1812 05:52:10.406016 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1813 05:52:10.412467 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1814 05:52:10.415765 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1815 05:52:10.422310 7. 000000009a000000-000000009f7fffff: RESERVED
1816 05:52:10.425794 8. 00000000e0000000-00000000efffffff: RESERVED
1817 05:52:10.432179 9. 00000000fc000000-00000000fc000fff: RESERVED
1818 05:52:10.435418 10. 00000000fe000000-00000000fe00ffff: RESERVED
1819 05:52:10.441685 11. 00000000fed10000-00000000fed17fff: RESERVED
1820 05:52:10.444848 12. 00000000fed80000-00000000fed83fff: RESERVED
1821 05:52:10.451414 13. 00000000fed90000-00000000fed91fff: RESERVED
1822 05:52:10.454713 14. 00000000feda0000-00000000feda1fff: RESERVED
1823 05:52:10.458745 15. 0000000100000000-000000045e7fffff: RAM
1824 05:52:10.464993 Graphics framebuffer located at 0xc0000000
1825 05:52:10.468483 Passing 5 GPIOs to payload:
1826 05:52:10.471556 NAME | PORT | POLARITY | VALUE
1827 05:52:10.477869 write protect | undefined | high | low
1828 05:52:10.481541 lid | undefined | high | high
1829 05:52:10.488158 power | undefined | high | low
1830 05:52:10.494329 oprom | undefined | high | low
1831 05:52:10.497546 EC in RW | 0x000000cb | high | low
1832 05:52:10.500915 Board ID: 4
1833 05:52:10.504279 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1834 05:52:10.507532 CBFS @ c08000 size 3f8000
1835 05:52:10.514031 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1836 05:52:10.520581 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d67
1837 05:52:10.523749 coreboot table: 1492 bytes.
1838 05:52:10.527215 IMD ROOT 0. 99fff000 00001000
1839 05:52:10.530489 IMD SMALL 1. 99ffe000 00001000
1840 05:52:10.533684 FSP MEMORY 2. 99c4e000 003b0000
1841 05:52:10.536935 CONSOLE 3. 99c2e000 00020000
1842 05:52:10.540275 FMAP 4. 99c2d000 0000054e
1843 05:52:10.543047 TIME STAMP 5. 99c2c000 00000910
1844 05:52:10.546365 VBOOT WORK 6. 99c18000 00014000
1845 05:52:10.549655 MRC DATA 7. 99c16000 00001958
1846 05:52:10.552897 ROMSTG STCK 8. 99c15000 00001000
1847 05:52:10.556191 AFTER CAR 9. 99c0b000 0000a000
1848 05:52:10.559599 RAMSTAGE 10. 99baf000 0005c000
1849 05:52:10.562969 REFCODE 11. 99b7a000 00035000
1850 05:52:10.566161 SMM BACKUP 12. 99b6a000 00010000
1851 05:52:10.569404 COREBOOT 13. 99b62000 00008000
1852 05:52:10.572818 ACPI 14. 99b3e000 00024000
1853 05:52:10.575918 ACPI GNVS 15. 99b3d000 00001000
1854 05:52:10.579213 RAMOOPS 16. 99a3d000 00100000
1855 05:52:10.582654 TPM2 TCGLOG17. 99a2d000 00010000
1856 05:52:10.585931 SMBIOS 18. 99a2c000 00000800
1857 05:52:10.586392 IMD small region:
1858 05:52:10.592376 IMD ROOT 0. 99ffec00 00000400
1859 05:52:10.595071 FSP RUNTIME 1. 99ffebe0 00000004
1860 05:52:10.598496 EC HOSTEVENT 2. 99ffebc0 00000008
1861 05:52:10.601830 POWER STATE 3. 99ffeb80 00000040
1862 05:52:10.605037 ROMSTAGE 4. 99ffeb60 00000004
1863 05:52:10.608292 MEM INFO 5. 99ffe9a0 000001b9
1864 05:52:10.611718 VPD 6. 99ffe940 0000004c
1865 05:52:10.614956 MTRR: Physical address space:
1866 05:52:10.621634 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1867 05:52:10.628476 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1868 05:52:10.635079 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1869 05:52:10.640958 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1870 05:52:10.647672 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1871 05:52:10.650624 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1872 05:52:10.657121 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1873 05:52:10.663694 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 05:52:10.666943 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 05:52:10.670300 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 05:52:10.673633 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 05:52:10.680868 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 05:52:10.683473 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 05:52:10.687202 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 05:52:10.690321 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 05:52:10.697031 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 05:52:10.699757 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 05:52:10.702848 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 05:52:10.706832 call enable_fixed_mtrr()
1885 05:52:10.709476 CPU physical address size: 39 bits
1886 05:52:10.715769 MTRR: default type WB/UC MTRR counts: 6/8.
1887 05:52:10.719154 MTRR: WB selected as default type.
1888 05:52:10.725770 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1889 05:52:10.732686 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1890 05:52:10.735995 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1891 05:52:10.742509 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1892 05:52:10.748643 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1893 05:52:10.755731 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1894 05:52:10.762102 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 05:52:10.765304 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 05:52:10.768260 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 05:52:10.771844 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 05:52:10.778026 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 05:52:10.781178 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 05:52:10.784436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 05:52:10.787973 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 05:52:10.794891 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 05:52:10.797507 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 05:52:10.800902 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 05:52:10.801372
1906 05:52:10.804266 MTRR check
1907 05:52:10.804718 call enable_fixed_mtrr()
1908 05:52:10.807666 Fixed MTRRs : Enabled
1909 05:52:10.810850 Variable MTRRs: Enabled
1910 05:52:10.811280
1911 05:52:10.814236 CPU physical address size: 39 bits
1912 05:52:10.820873 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1913 05:52:10.824079 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 05:52:10.827296 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 05:52:10.833822 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 05:52:10.837236 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 05:52:10.840536 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 05:52:10.843594 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 05:52:10.850286 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 05:52:10.853907 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 05:52:10.857155 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 05:52:10.860374 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 05:52:10.866816 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 05:52:10.869982 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 05:52:10.873220 call enable_fixed_mtrr()
1926 05:52:10.876457 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 05:52:10.879682 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 05:52:10.882654 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 05:52:10.889752 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 05:52:10.893100 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 05:52:10.895985 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 05:52:10.899369 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 05:52:10.906299 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 05:52:10.909691 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 05:52:10.912439 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 05:52:10.916324 CPU physical address size: 39 bits
1937 05:52:10.919491 call enable_fixed_mtrr()
1938 05:52:10.925659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1939 05:52:10.929164 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 05:52:10.931688 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 05:52:10.938555 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 05:52:10.941995 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 05:52:10.945037 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 05:52:10.948588 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 05:52:10.955535 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 05:52:10.958622 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 05:52:10.961789 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 05:52:10.964891 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 05:52:10.971133 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 05:52:10.974949 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 05:52:10.978103 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 05:52:10.981595 call enable_fixed_mtrr()
1953 05:52:10.984679 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 05:52:10.988346 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 05:52:10.994668 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 05:52:10.997854 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 05:52:11.000896 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 05:52:11.004501 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 05:52:11.010508 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 05:52:11.014518 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 05:52:11.017946 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 05:52:11.020717 CPU physical address size: 39 bits
1963 05:52:11.023950 call enable_fixed_mtrr()
1964 05:52:11.027394 CPU physical address size: 39 bits
1965 05:52:11.030651 CBFS @ c08000 size 3f8000
1966 05:52:11.037879 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1967 05:52:11.041091 CPU physical address size: 39 bits
1968 05:52:11.044193 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 05:52:11.047299 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 05:52:11.050604 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 05:52:11.057082 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 05:52:11.060594 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 05:52:11.063483 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 05:52:11.067447 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 05:52:11.073556 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 05:52:11.076611 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 05:52:11.079797 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 05:52:11.083166 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 05:52:11.090088 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 05:52:11.093249 call enable_fixed_mtrr()
1981 05:52:11.096448 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 05:52:11.099301 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 05:52:11.103021 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 05:52:11.109888 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 05:52:11.113027 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 05:52:11.116276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 05:52:11.119494 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 05:52:11.125796 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 05:52:11.128947 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 05:52:11.132174 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 05:52:11.135445 CPU physical address size: 39 bits
1992 05:52:11.139379 call enable_fixed_mtrr()
1993 05:52:11.142285 CBFS: Locating 'fallback/payload'
1994 05:52:11.145612 CPU physical address size: 39 bits
1995 05:52:11.148641 CBFS: Found @ offset 1c96c0 size 3f798
1996 05:52:11.155474 Checking segment from ROM address 0xffdd16f8
1997 05:52:11.158407 Checking segment from ROM address 0xffdd1714
1998 05:52:11.161652 Loading segment from ROM address 0xffdd16f8
1999 05:52:11.165490 code (compression=0)
2000 05:52:11.174735 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2001 05:52:11.181102 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2002 05:52:11.184488 it's not compressed!
2003 05:52:11.276501 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2004 05:52:11.282998 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2005 05:52:11.289589 Loading segment from ROM address 0xffdd1714
2006 05:52:11.289674 Entry Point 0x30000000
2007 05:52:11.292880 Loaded segments
2008 05:52:11.298620 Finalizing chipset.
2009 05:52:11.301752 Finalizing SMM.
2010 05:52:11.305407 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2011 05:52:11.308631 mp_park_aps done after 0 msecs.
2012 05:52:11.315155 Jumping to boot code at 30000000(99b62000)
2013 05:52:11.321497 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2014 05:52:11.321583
2015 05:52:11.324826 Starting depthcharge on Helios...
2016 05:52:11.325177 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2017 05:52:11.325289 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2018 05:52:11.325379 Setting prompt string to ['hatch:']
2019 05:52:11.325460 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2020 05:52:11.335097 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 05:52:11.341644 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2022 05:52:11.347660 board_setup: Info: eMMC controller not present; skipping
2023 05:52:11.351416 New NVMe Controller 0x30053ac0 @ 00:1d:00
2024 05:52:11.357948 board_setup: Info: SDHCI controller not present; skipping
2025 05:52:11.364428 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2026 05:52:11.364516 Wipe memory regions:
2027 05:52:11.370965 [0x00000000001000, 0x000000000a0000)
2028 05:52:11.374084 [0x00000000100000, 0x00000030000000)
2029 05:52:11.441027 [0x00000030657430, 0x00000099a2c000)
2030 05:52:11.581166 [0x00000100000000, 0x0000045e800000)
2031 05:52:12.964265 R8152: Initializing
2032 05:52:12.967379 Version 9 (ocp_data = 6010)
2033 05:52:12.971841 R8152: Done initializing
2034 05:52:12.975007 Adding net device
2035 05:52:13.349988 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2036 05:52:13.350132
2037 05:52:13.350417 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2039 05:52:13.451184 hatch: tftpboot 192.168.201.1 7096705/tftp-deploy-tppnr9kg/kernel/bzImage 7096705/tftp-deploy-tppnr9kg/kernel/cmdline 7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
2040 05:52:13.451318 Setting prompt string to 'Starting kernel'
2041 05:52:13.451393 Setting prompt string to ['Starting kernel']
2042 05:52:13.451461 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2043 05:52:13.451535 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2044 05:52:13.455974 tftpboot 192.168.201.1 7096705/tftp-deploy-tppnr9kg/kernel/bzImoy-tppnr9kg/kernel/cmdline 7096705/tftp-deploy-tppnr9kg/ramdisk/ramdisk.cpio.gz
2045 05:52:13.456065 Waiting for link
2046 05:52:13.656891 done.
2047 05:52:13.657038 MAC: f4:f5:e8:50:e5:3a
2048 05:52:13.660004 Sending DHCP discover... done.
2049 05:52:13.663816 Waiting for reply... done.
2050 05:52:13.667062 Sending DHCP request... done.
2051 05:52:13.670288 Waiting for reply... done.
2052 05:52:13.673470 My ip is 192.168.201.17
2053 05:52:13.676860 The DHCP server ip is 192.168.201.1
2054 05:52:13.680028 TFTP server IP predefined by user: 192.168.201.1
2055 05:52:13.686510 Bootfile predefined by user: 7096705/tftp-deploy-tppnr9kg/kernel/bzImage
2056 05:52:13.693187 Sending tftp read request... done.
2057 05:52:13.695813 Waiting for the transfer...
2058 05:52:13.932423 00000000 ################################################################
2059 05:52:14.173496 00080000 ################################################################
2060 05:52:14.416206 00100000 ################################################################
2061 05:52:14.656705 00180000 ################################################################
2062 05:52:14.897963 00200000 ################################################################
2063 05:52:15.137106 00280000 ################################################################
2064 05:52:15.381827 00300000 ################################################################
2065 05:52:15.625845 00380000 ################################################################
2066 05:52:15.878632 00400000 ################################################################
2067 05:52:16.131304 00480000 ################################################################
2068 05:52:16.372887 00500000 ################################################################
2069 05:52:16.614819 00580000 ################################################################
2070 05:52:16.854761 00600000 ################################################################
2071 05:52:17.092335 00680000 ################################################################
2072 05:52:17.331606 00700000 ################################################################
2073 05:52:17.570022 00780000 ################################################################
2074 05:52:17.803293 00800000 ################################################################
2075 05:52:17.822711 00880000 ###### done.
2076 05:52:17.826098 The bootfile was 8953856 bytes long.
2077 05:52:17.829350 Sending tftp read request... done.
2078 05:52:17.832494 Waiting for the transfer...
2079 05:52:18.072266 00000000 ################################################################
2080 05:52:18.312181 00080000 ################################################################
2081 05:52:18.551376 00100000 ################################################################
2082 05:52:18.792152 00180000 ################################################################
2083 05:52:19.033208 00200000 ################################################################
2084 05:52:19.272154 00280000 ################################################################
2085 05:52:19.511512 00300000 ################################################################
2086 05:52:19.750451 00380000 ################################################################
2087 05:52:19.991473 00400000 ################################################################
2088 05:52:20.229410 00480000 ################################################################
2089 05:52:20.347117 00500000 ################################ done.
2090 05:52:20.350348 Sending tftp read request... done.
2091 05:52:20.353580 Waiting for the transfer...
2092 05:52:20.353666 00000000 # done.
2093 05:52:20.363484 Command line loaded dynamically from TFTP file: 7096705/tftp-deploy-tppnr9kg/kernel/cmdline
2094 05:52:20.386204 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096705/extract-nfsrootfs-fsrlyom9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2095 05:52:20.392538 ec_init(0): CrosEC protocol v3 supported (256, 256)
2096 05:52:20.399003 Shutting down all USB controllers.
2097 05:52:20.399090 Removing current net device
2098 05:52:20.403225 Finalizing coreboot
2099 05:52:20.409699 Exiting depthcharge with code 4 at timestamp: 16369272
2100 05:52:20.409787
2101 05:52:20.409856 Starting kernel ...
2102 05:52:20.409919
2103 05:52:20.409980
2104 05:52:20.410274 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2105 05:52:20.410375 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2106 05:52:20.410453 Setting prompt string to ['Linux version [0-9]']
2107 05:52:20.410526 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2108 05:52:20.410596 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2110 05:56:52.410662 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2112 05:56:52.410891 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2114 05:56:52.411057 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2117 05:56:52.411376 end: 2 depthcharge-action (duration 00:05:00) [common]
2119 05:56:52.411614 Cleaning after the job
2120 05:56:52.411699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/ramdisk
2121 05:56:52.412163 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/kernel
2122 05:56:52.412790 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/nfsrootfs
2123 05:56:52.451031 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096705/tftp-deploy-tppnr9kg/modules
2124 05:56:52.451346 start: 4.1 power-off (timeout 00:00:30) [common]
2125 05:56:52.451524 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2126 05:56:52.473050 >> Command sent successfully.
2127 05:56:52.475334 Returned 0 in 0 seconds
2128 05:56:52.576167 end: 4.1 power-off (duration 00:00:00) [common]
2130 05:56:52.576522 start: 4.2 read-feedback (timeout 00:10:00) [common]
2131 05:56:52.576768 Listened to connection for namespace 'common' for up to 1s
2132 05:56:53.581340 Finalising connection for namespace 'common'
2133 05:56:53.581523 Disconnecting from shell: Finalise
2134 05:56:53.682275 end: 4.2 read-feedback (duration 00:00:01) [common]
2135 05:56:53.682449 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096705
2136 05:56:53.854346 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096705
2137 05:56:53.854550 JobError: Your job cannot terminate cleanly.