Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:45:26.528611 lava-dispatcher, installed at version: 2022.06
2 05:45:26.528794 start: 0 validate
3 05:45:26.528928 Start time: 2022-08-23 05:45:26.528922+00:00 (UTC)
4 05:45:26.529056 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:45:26.529185 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:45:26.819197 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:45:26.819359 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:45:27.106942 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:45:27.107100 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:45:27.396349 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:45:27.396503 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:45:27.682379 validate duration: 1.15
14 05:45:27.682648 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:45:27.682756 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:45:27.682853 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:45:27.682947 Not decompressing ramdisk as can be used compressed.
18 05:45:27.683033 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220812.0/amd64/initrd.cpio.gz
19 05:45:27.683099 saving as /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/ramdisk/initrd.cpio.gz
20 05:45:27.683171 total size: 5411022 (5MB)
21 05:45:27.684285 progress 0% (0MB)
22 05:45:27.685763 progress 5% (0MB)
23 05:45:27.687082 progress 10% (0MB)
24 05:45:27.688437 progress 15% (0MB)
25 05:45:27.689938 progress 20% (1MB)
26 05:45:27.691224 progress 25% (1MB)
27 05:45:27.692513 progress 30% (1MB)
28 05:45:27.693851 progress 35% (1MB)
29 05:45:27.695285 progress 40% (2MB)
30 05:45:27.696566 progress 45% (2MB)
31 05:45:27.697978 progress 50% (2MB)
32 05:45:27.699312 progress 55% (2MB)
33 05:45:27.700751 progress 60% (3MB)
34 05:45:27.702051 progress 65% (3MB)
35 05:45:27.703338 progress 70% (3MB)
36 05:45:27.704621 progress 75% (3MB)
37 05:45:27.706107 progress 80% (4MB)
38 05:45:27.707394 progress 85% (4MB)
39 05:45:27.708679 progress 90% (4MB)
40 05:45:27.709985 progress 95% (4MB)
41 05:45:27.711434 progress 100% (5MB)
42 05:45:27.711604 5MB downloaded in 0.03s (181.51MB/s)
43 05:45:27.711756 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:45:27.711998 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:45:27.712089 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:45:27.712178 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:45:27.712283 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:45:27.712352 saving as /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/kernel/bzImage
50 05:45:27.712413 total size: 8953856 (8MB)
51 05:45:27.712475 No compression specified
52 05:45:27.713490 progress 0% (0MB)
53 05:45:27.715659 progress 5% (0MB)
54 05:45:27.717943 progress 10% (0MB)
55 05:45:27.720060 progress 15% (1MB)
56 05:45:27.722358 progress 20% (1MB)
57 05:45:27.724585 progress 25% (2MB)
58 05:45:27.726718 progress 30% (2MB)
59 05:45:27.728947 progress 35% (3MB)
60 05:45:27.731179 progress 40% (3MB)
61 05:45:27.733244 progress 45% (3MB)
62 05:45:27.735516 progress 50% (4MB)
63 05:45:27.737752 progress 55% (4MB)
64 05:45:27.739790 progress 60% (5MB)
65 05:45:27.742100 progress 65% (5MB)
66 05:45:27.744290 progress 70% (6MB)
67 05:45:27.746332 progress 75% (6MB)
68 05:45:27.748521 progress 80% (6MB)
69 05:45:27.750752 progress 85% (7MB)
70 05:45:27.752797 progress 90% (7MB)
71 05:45:27.755026 progress 95% (8MB)
72 05:45:27.757228 progress 100% (8MB)
73 05:45:27.757457 8MB downloaded in 0.05s (189.59MB/s)
74 05:45:27.757608 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:45:27.757850 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:45:27.757941 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:45:27.758030 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:45:27.758139 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220812.0/amd64/full.rootfs.tar.xz
80 05:45:27.758209 saving as /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/nfsrootfs/full.rootfs.tar
81 05:45:27.758274 total size: 207018404 (197MB)
82 05:45:27.758337 Using unxz to decompress xz
83 05:45:27.761567 progress 0% (0MB)
84 05:45:28.320214 progress 5% (9MB)
85 05:45:28.855509 progress 10% (19MB)
86 05:45:29.446599 progress 15% (29MB)
87 05:45:29.807418 progress 20% (39MB)
88 05:45:30.165330 progress 25% (49MB)
89 05:45:30.759904 progress 30% (59MB)
90 05:45:31.309927 progress 35% (69MB)
91 05:45:31.901209 progress 40% (79MB)
92 05:45:32.452452 progress 45% (88MB)
93 05:45:33.044952 progress 50% (98MB)
94 05:45:33.683819 progress 55% (108MB)
95 05:45:34.382379 progress 60% (118MB)
96 05:45:34.527497 progress 65% (128MB)
97 05:45:34.686477 progress 70% (138MB)
98 05:45:34.779825 progress 75% (148MB)
99 05:45:34.854747 progress 80% (157MB)
100 05:45:34.923547 progress 85% (167MB)
101 05:45:35.027235 progress 90% (177MB)
102 05:45:35.306529 progress 95% (187MB)
103 05:45:35.910565 progress 100% (197MB)
104 05:45:35.916712 197MB downloaded in 8.16s (24.20MB/s)
105 05:45:35.917008 end: 1.3.1 http-download (duration 00:00:08) [common]
107 05:45:35.917304 end: 1.3 download-retry (duration 00:00:08) [common]
108 05:45:35.917438 start: 1.4 download-retry (timeout 00:09:52) [common]
109 05:45:35.917547 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 05:45:35.917682 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:45:35.917756 saving as /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/modules/modules.tar
112 05:45:35.917819 total size: 64712 (0MB)
113 05:45:35.917924 Using unxz to decompress xz
114 05:45:35.921094 progress 50% (0MB)
115 05:45:35.921546 progress 100% (0MB)
116 05:45:35.925786 0MB downloaded in 0.01s (7.75MB/s)
117 05:45:35.926040 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:45:35.926312 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:45:35.926409 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 05:45:35.926506 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 05:45:37.930004 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096680/extract-nfsrootfs-ik4nitba
123 05:45:37.930220 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 05:45:37.930332 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 05:45:37.930480 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m
126 05:45:37.930584 makedir: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin
127 05:45:37.930671 makedir: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/tests
128 05:45:37.930752 makedir: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/results
129 05:45:37.930850 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-add-keys
130 05:45:37.930986 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-add-sources
131 05:45:37.931102 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-background-process-start
132 05:45:37.931214 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-background-process-stop
133 05:45:37.931324 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-common-functions
134 05:45:37.931435 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-echo-ipv4
135 05:45:37.931541 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-install-packages
136 05:45:37.931648 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-installed-packages
137 05:45:37.931755 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-os-build
138 05:45:37.931862 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-probe-channel
139 05:45:37.931969 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-probe-ip
140 05:45:37.932076 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-target-ip
141 05:45:37.932180 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-target-mac
142 05:45:37.932286 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-target-storage
143 05:45:37.932394 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-case
144 05:45:37.932502 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-event
145 05:45:37.932608 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-feedback
146 05:45:37.932717 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-raise
147 05:45:37.932821 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-reference
148 05:45:37.932927 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-runner
149 05:45:37.933034 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-set
150 05:45:37.933148 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-test-shell
151 05:45:37.933260 Updating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-add-keys (debian)
152 05:45:37.933379 Updating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-add-sources (debian)
153 05:45:37.933489 Updating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-install-packages (debian)
154 05:45:37.933597 Updating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-installed-packages (debian)
155 05:45:37.933704 Updating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/bin/lava-os-build (debian)
156 05:45:37.933796 Creating /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/environment
157 05:45:37.933879 LAVA metadata
158 05:45:37.933944 - LAVA_JOB_ID=7096680
159 05:45:37.934007 - LAVA_DISPATCHER_IP=192.168.201.1
160 05:45:37.934110 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 05:45:37.934176 skipped lava-vland-overlay
162 05:45:37.934253 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 05:45:37.934335 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 05:45:37.934396 skipped lava-multinode-overlay
165 05:45:37.934469 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 05:45:37.934551 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 05:45:37.934624 Loading test definitions
168 05:45:37.934714 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 05:45:37.934782 Using /lava-7096680 at stage 0
170 05:45:37.935009 uuid=7096680_1.5.2.3.1 testdef=None
171 05:45:37.935096 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 05:45:37.935200 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 05:45:37.935667 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 05:45:37.935897 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 05:45:37.936374 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 05:45:37.936627 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 05:45:37.937086 runner path: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/0/tests/0_timesync-off test_uuid 7096680_1.5.2.3.1
180 05:45:37.937235 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 05:45:37.937575 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 05:45:37.937650 Using /lava-7096680 at stage 0
184 05:45:37.937745 Fetching tests from https://github.com/kernelci/test-definitions.git
185 05:45:37.937825 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/0/tests/1_kselftest-futex'
186 05:45:40.757717 Running '/usr/bin/git checkout kernelci.org
187 05:45:40.894093 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 05:45:40.894765 uuid=7096680_1.5.2.3.5 testdef=None
189 05:45:40.894928 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
191 05:45:40.895239 start: 1.5.2.3.6 test-overlay (timeout 00:09:47) [common]
192 05:45:40.895927 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 05:45:40.896169 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:47) [common]
195 05:45:40.897033 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 05:45:40.897315 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
198 05:45:40.898225 runner path: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/0/tests/1_kselftest-futex test_uuid 7096680_1.5.2.3.5
199 05:45:40.898326 BOARD='asus-C436FA-Flip-hatch'
200 05:45:40.898407 BRANCH='cip'
201 05:45:40.898470 SKIPFILE='skipfile-lkft.yaml'
202 05:45:40.898532 TESTPROG_URL='None'
203 05:45:40.898591 TST_CASENAME=''
204 05:45:40.898648 TST_CMDFILES='futex'
205 05:45:40.898781 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 05:45:40.898995 Creating lava-test-runner.conf files
208 05:45:40.899073 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096680/lava-overlay-bl56ya1m/lava-7096680/0 for stage 0
209 05:45:40.899158 - 0_timesync-off
210 05:45:40.899229 - 1_kselftest-futex
211 05:45:40.899320 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
212 05:45:40.899411 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
213 05:45:48.030460 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 05:45:48.030630 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
215 05:45:48.030728 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 05:45:48.030830 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
217 05:45:48.030921 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
218 05:45:48.130376 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 05:45:48.130712 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
220 05:45:48.130821 extracting modules file /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096680/extract-nfsrootfs-ik4nitba
221 05:45:48.134676 extracting modules file /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096680/extract-overlay-ramdisk-kbl_1jb3/ramdisk
222 05:45:48.138235 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 05:45:48.138340 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
224 05:45:48.138423 [common] Applying overlay to NFS
225 05:45:48.138492 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096680/compress-overlay-alj5lx1h/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096680/extract-nfsrootfs-ik4nitba
226 05:45:48.575010 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 05:45:48.575181 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
228 05:45:48.575279 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 05:45:48.575372 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
230 05:45:48.575458 Building ramdisk /var/lib/lava/dispatcher/tmp/7096680/extract-overlay-ramdisk-kbl_1jb3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096680/extract-overlay-ramdisk-kbl_1jb3/ramdisk
231 05:45:48.608335 >> 24662 blocks
232 05:45:49.075407 rename /var/lib/lava/dispatcher/tmp/7096680/extract-overlay-ramdisk-kbl_1jb3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
233 05:45:49.075799 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 05:45:49.075939 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
235 05:45:49.076045 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
236 05:45:49.076137 No mkimage arch provided, not using FIT.
237 05:45:49.076226 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 05:45:49.076312 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 05:45:49.076411 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
240 05:45:49.076501 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
241 05:45:49.076588 No LXC device requested
242 05:45:49.076672 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 05:45:49.076759 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
244 05:45:49.076844 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 05:45:49.076916 Checking files for TFTP limit of 4294967296 bytes.
246 05:45:49.077365 end: 1 tftp-deploy (duration 00:00:21) [common]
247 05:45:49.077470 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 05:45:49.077564 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 05:45:49.077690 substitutions:
250 05:45:49.077758 - {DTB}: None
251 05:45:49.077832 - {INITRD}: 7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
252 05:45:49.077893 - {KERNEL}: 7096680/tftp-deploy-alt88z8y/kernel/bzImage
253 05:45:49.077952 - {LAVA_MAC}: None
254 05:45:49.078010 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096680/extract-nfsrootfs-ik4nitba
255 05:45:49.078070 - {NFS_SERVER_IP}: 192.168.201.1
256 05:45:49.078128 - {PRESEED_CONFIG}: None
257 05:45:49.078186 - {PRESEED_LOCAL}: None
258 05:45:49.078241 - {RAMDISK}: 7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
259 05:45:49.078298 - {ROOT_PART}: None
260 05:45:49.078353 - {ROOT}: None
261 05:45:49.078408 - {SERVER_IP}: 192.168.201.1
262 05:45:49.078473 - {TEE}: None
263 05:45:49.078529 Parsed boot commands:
264 05:45:49.078585 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 05:45:49.078734 Parsed boot commands: tftpboot 192.168.201.1 7096680/tftp-deploy-alt88z8y/kernel/bzImage 7096680/tftp-deploy-alt88z8y/kernel/cmdline 7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
266 05:45:49.078825 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 05:45:49.078914 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 05:45:49.079008 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 05:45:49.079105 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 05:45:49.079178 Not connected, no need to disconnect.
271 05:45:49.079256 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 05:45:49.079340 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 05:45:49.079410 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
274 05:45:49.082066 Setting prompt string to ['lava-test: # ']
275 05:45:49.082361 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 05:45:49.082476 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 05:45:49.082574 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 05:45:49.082665 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 05:45:49.082846 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 05:45:49.101928 >> Command sent successfully.
281 05:45:49.103855 Returned 0 in 0 seconds
282 05:45:49.204892 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 05:45:49.206072 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 05:45:49.206499 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 05:45:49.206860 Setting prompt string to 'Starting depthcharge on Helios...'
287 05:45:49.207160 Changing prompt to 'Starting depthcharge on Helios...'
288 05:45:49.207455 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 05:45:49.208480 [Enter `^Ec?' for help]
290 05:45:56.316260
291 05:45:56.316418
292 05:45:56.326077 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 05:45:56.329371 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 05:45:56.335775 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 05:45:56.339250 CPU: AES supported, TXT NOT supported, VT supported
296 05:45:56.345841 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 05:45:56.352465 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 05:45:56.355821 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 05:45:56.359117 VBOOT: Loading verstage.
300 05:45:56.365723 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
301 05:45:56.368996 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 05:45:56.375445 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 05:45:56.375520 CBFS @ c08000 size 3f8000
304 05:45:56.381800 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 05:45:56.385130 CBFS: Locating 'fallback/verstage'
306 05:45:56.388257 CBFS: Found @ offset 10fb80 size 1072c
307 05:45:56.392813
308 05:45:56.392888
309 05:45:56.402696 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 05:45:56.417346 Probing TPM: . done!
311 05:45:56.420745 TPM ready after 0 ms
312 05:45:56.424125 Connected to device vid:did:rid of 1ae0:0028:00
313 05:45:56.433761 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 05:45:56.437685 Initialized TPM device CR50 revision 0
315 05:45:56.470708 tlcl_send_startup: Startup return code is 0
316 05:45:56.470797 TPM: setup succeeded
317 05:45:56.483713 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 05:45:56.486888 Chrome EC: UHEPI supported
319 05:45:56.490764 Phase 1
320 05:45:56.493917 FMAP: area GBB found @ c05000 (12288 bytes)
321 05:45:56.500202 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 05:45:56.503562 Phase 2
323 05:45:56.503639 Phase 3
324 05:45:56.506718 FMAP: area GBB found @ c05000 (12288 bytes)
325 05:45:56.513394 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 05:45:56.519982 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 05:45:56.523250 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 05:45:56.529649 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 05:45:56.545968 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 05:45:56.549237 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 05:45:56.556015 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 05:45:56.559857 Phase 4
333 05:45:56.563094 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 05:45:56.572675 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 05:45:56.749509 VB2:vb2_rsa_verify_digest() Digest check failed!
336 05:45:56.756110 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 05:45:56.756198 Saving nvdata
338 05:45:56.759497 Reboot requested (10020007)
339 05:45:56.762724 board_reset() called!
340 05:45:56.762803 full_reset() called!
341 05:46:01.283455
342 05:46:01.283608
343 05:46:01.293007 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 05:46:01.296171 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 05:46:01.303117 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 05:46:01.306409 CPU: AES supported, TXT NOT supported, VT supported
347 05:46:01.313061 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 05:46:01.316390 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 05:46:01.323035 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 05:46:01.326368 VBOOT: Loading verstage.
351 05:46:01.329056 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
352 05:46:01.336239 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 05:46:01.342736 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 05:46:01.342821 CBFS @ c08000 size 3f8000
355 05:46:01.349409 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 05:46:01.352056 CBFS: Locating 'fallback/verstage'
357 05:46:01.355474 CBFS: Found @ offset 10fb80 size 1072c
358 05:46:01.359964
359 05:46:01.360048
360 05:46:01.369834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 05:46:01.384629 Probing TPM: . done!
362 05:46:01.387893 TPM ready after 0 ms
363 05:46:01.391193 Connected to device vid:did:rid of 1ae0:0028:00
364 05:46:01.400765 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
365 05:46:01.404599 Initialized TPM device CR50 revision 0
366 05:46:01.437478 tlcl_send_startup: Startup return code is 0
367 05:46:01.437568 TPM: setup succeeded
368 05:46:01.450287 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 05:46:01.454488 Chrome EC: UHEPI supported
370 05:46:01.457126 Phase 1
371 05:46:01.460380 FMAP: area GBB found @ c05000 (12288 bytes)
372 05:46:01.467032 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 05:46:01.474130 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 05:46:01.477393 Recovery requested (1009000e)
375 05:46:01.483217 Saving nvdata
376 05:46:01.489169 tlcl_extend: response is 0
377 05:46:01.498175 tlcl_extend: response is 0
378 05:46:01.505061 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 05:46:01.508165 CBFS @ c08000 size 3f8000
380 05:46:01.514716 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 05:46:01.518031 CBFS: Locating 'fallback/romstage'
382 05:46:01.521534 CBFS: Found @ offset 80 size 145fc
383 05:46:01.524575 Accumulated console time in verstage 98 ms
384 05:46:01.524668
385 05:46:01.527958
386 05:46:01.537813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 05:46:01.544108 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 05:46:01.547316 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 05:46:01.550567 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 05:46:01.557165 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 05:46:01.560542 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 05:46:01.563801 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 05:46:01.567163 TCO_STS: 0000 0000
394 05:46:01.570408 GEN_PMCON: e0015238 00000200
395 05:46:01.574127 GBLRST_CAUSE: 00000000 00000000
396 05:46:01.574213 prev_sleep_state 5
397 05:46:01.577475 Boot Count incremented to 29367
398 05:46:01.584547 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 05:46:01.587942 CBFS @ c08000 size 3f8000
400 05:46:01.594269 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 05:46:01.594356 CBFS: Locating 'fspm.bin'
402 05:46:01.600606 CBFS: Found @ offset 5ffc0 size 71000
403 05:46:01.604383 Chrome EC: UHEPI supported
404 05:46:01.610853 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 05:46:01.614703 Probing TPM: done!
406 05:46:01.621181 Connected to device vid:did:rid of 1ae0:0028:00
407 05:46:01.631024 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
408 05:46:01.636926 Initialized TPM device CR50 revision 0
409 05:46:01.646117 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 05:46:01.652660 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 05:46:01.655981 MRC cache found, size 1948
412 05:46:01.659319 bootmode is set to: 2
413 05:46:01.662688 PRMRR disabled by config.
414 05:46:01.665790 SPD INDEX = 1
415 05:46:01.669071 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 05:46:01.672396 CBFS @ c08000 size 3f8000
417 05:46:01.678756 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 05:46:01.678841 CBFS: Locating 'spd.bin'
419 05:46:01.681994 CBFS: Found @ offset 5fb80 size 400
420 05:46:01.685246 SPD: module type is LPDDR3
421 05:46:01.688640 SPD: module part is
422 05:46:01.695705 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 05:46:01.698933 SPD: device width 4 bits, bus width 8 bits
424 05:46:01.701998 SPD: module size is 4096 MB (per channel)
425 05:46:01.705252 memory slot: 0 configuration done.
426 05:46:01.708451 memory slot: 2 configuration done.
427 05:46:01.760437 CBMEM:
428 05:46:01.763812 IMD: root @ 99fff000 254 entries.
429 05:46:01.766938 IMD: root @ 99ffec00 62 entries.
430 05:46:01.770227 External stage cache:
431 05:46:01.773524 IMD: root @ 9abff000 254 entries.
432 05:46:01.777242 IMD: root @ 9abfec00 62 entries.
433 05:46:01.783346 Chrome EC: clear events_b mask to 0x0000000020004000
434 05:46:01.796968 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 05:46:01.809960 tlcl_write: response is 0
436 05:46:01.818429 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 05:46:01.825157 MRC: TPM MRC hash updated successfully.
438 05:46:01.825242 2 DIMMs found
439 05:46:01.828459 SMM Memory Map
440 05:46:01.831672 SMRAM : 0x9a000000 0x1000000
441 05:46:01.835000 Subregion 0: 0x9a000000 0xa00000
442 05:46:01.838352 Subregion 1: 0x9aa00000 0x200000
443 05:46:01.841667 Subregion 2: 0x9ac00000 0x400000
444 05:46:01.844972 top_of_ram = 0x9a000000
445 05:46:01.848204 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 05:46:01.854703 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 05:46:01.858014 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 05:46:01.864809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 05:46:01.868055 CBFS @ c08000 size 3f8000
450 05:46:01.871384 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 05:46:01.874605 CBFS: Locating 'fallback/postcar'
452 05:46:01.880801 CBFS: Found @ offset 107000 size 4b44
453 05:46:01.887339 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 05:46:01.897580 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 05:46:01.900817 Processing 180 relocs. Offset value of 0x97c0c000
456 05:46:01.909033 Accumulated console time in romstage 286 ms
457 05:46:01.909116
458 05:46:01.909184
459 05:46:01.919309 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 05:46:01.925893 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 05:46:01.929240 CBFS @ c08000 size 3f8000
462 05:46:01.935854 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 05:46:01.939082 CBFS: Locating 'fallback/ramstage'
464 05:46:01.942390 CBFS: Found @ offset 43380 size 1b9e8
465 05:46:01.948860 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 05:46:01.980996 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 05:46:01.984128 Processing 3976 relocs. Offset value of 0x98db0000
468 05:46:01.991325 Accumulated console time in postcar 52 ms
469 05:46:01.991407
470 05:46:01.991477
471 05:46:02.001151 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 05:46:02.007719 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 05:46:02.010824 WARNING: RO_VPD is uninitialized or empty.
474 05:46:02.013829 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 05:46:02.020937 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 05:46:02.021016 Normal boot.
477 05:46:02.027512 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 05:46:02.030063 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 05:46:02.033400 CBFS @ c08000 size 3f8000
480 05:46:02.040544 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 05:46:02.043845 CBFS: Locating 'cpu_microcode_blob.bin'
482 05:46:02.047124 CBFS: Found @ offset 14700 size 2ec00
483 05:46:02.050203 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 05:46:02.053698 Skip microcode update
485 05:46:02.060333 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 05:46:02.060412 CBFS @ c08000 size 3f8000
487 05:46:02.066461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 05:46:02.069763 CBFS: Locating 'fsps.bin'
489 05:46:02.072917 CBFS: Found @ offset d1fc0 size 35000
490 05:46:02.098804 Detected 4 core, 8 thread CPU.
491 05:46:02.102072 Setting up SMI for CPU
492 05:46:02.105870 IED base = 0x9ac00000
493 05:46:02.109045 IED size = 0x00400000
494 05:46:02.109138 Will perform SMM setup.
495 05:46:02.115424 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 05:46:02.122288 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 05:46:02.128561 Processing 16 relocs. Offset value of 0x00030000
498 05:46:02.128639 Attempting to start 7 APs
499 05:46:02.135273 Waiting for 10ms after sending INIT.
500 05:46:02.148696 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
501 05:46:02.148775 done.
502 05:46:02.151924 AP: slot 4 apic_id 6.
503 05:46:02.155307 AP: slot 6 apic_id 7.
504 05:46:02.155378 AP: slot 1 apic_id 2.
505 05:46:02.158336 AP: slot 2 apic_id 3.
506 05:46:02.161686 Waiting for 2nd SIPI to complete...done.
507 05:46:02.165017 AP: slot 5 apic_id 5.
508 05:46:02.168398 AP: slot 7 apic_id 4.
509 05:46:02.174929 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 05:46:02.181590 Processing 13 relocs. Offset value of 0x00038000
511 05:46:02.188577 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 05:46:02.191863 Installing SMM handler to 0x9a000000
513 05:46:02.198350 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 05:46:02.204761 Processing 658 relocs. Offset value of 0x9a010000
515 05:46:02.211687 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 05:46:02.214942 Processing 13 relocs. Offset value of 0x9a008000
517 05:46:02.221186 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 05:46:02.228230 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 05:46:02.235048 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 05:46:02.237670 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 05:46:02.244291 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 05:46:02.250938 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 05:46:02.257435 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 05:46:02.263835 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 05:46:02.267194 Clearing SMI status registers
526 05:46:02.267267 SMI_STS: PM1
527 05:46:02.270561 PM1_STS: PWRBTN
528 05:46:02.270633 TCO_STS: SECOND_TO
529 05:46:02.274404 New SMBASE 0x9a000000
530 05:46:02.277574 In relocation handler: CPU 0
531 05:46:02.280939 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 05:46:02.287368 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 05:46:02.287450 Relocation complete.
534 05:46:02.290758 New SMBASE 0x99fff400
535 05:46:02.294014 In relocation handler: CPU 3
536 05:46:02.297178 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 05:46:02.303509 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 05:46:02.303589 Relocation complete.
539 05:46:02.306860 New SMBASE 0x99fff800
540 05:46:02.310159 In relocation handler: CPU 2
541 05:46:02.313448 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
542 05:46:02.319820 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 05:46:02.319901 Relocation complete.
544 05:46:02.323094 New SMBASE 0x99fffc00
545 05:46:02.326316 In relocation handler: CPU 1
546 05:46:02.329677 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
547 05:46:02.336161 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 05:46:02.336240 Relocation complete.
549 05:46:02.339468 New SMBASE 0x99ffe800
550 05:46:02.342695 In relocation handler: CPU 6
551 05:46:02.346058 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 05:46:02.352457 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 05:46:02.352530 Relocation complete.
554 05:46:02.355828 New SMBASE 0x99fff000
555 05:46:02.359136 In relocation handler: CPU 4
556 05:46:02.362312 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
557 05:46:02.369010 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 05:46:02.369088 Relocation complete.
559 05:46:02.372283 New SMBASE 0x99ffe400
560 05:46:02.375644 In relocation handler: CPU 7
561 05:46:02.378842 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
562 05:46:02.385713 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 05:46:02.385798 Relocation complete.
564 05:46:02.388976 New SMBASE 0x99ffec00
565 05:46:02.392207 In relocation handler: CPU 5
566 05:46:02.395452 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
567 05:46:02.402091 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 05:46:02.402169 Relocation complete.
569 05:46:02.405218 Initializing CPU #0
570 05:46:02.408552 CPU: vendor Intel device 806ec
571 05:46:02.411540 CPU: family 06, model 8e, stepping 0c
572 05:46:02.415244 Clearing out pending MCEs
573 05:46:02.418154 Setting up local APIC...
574 05:46:02.418229 apic_id: 0x00 done.
575 05:46:02.421926 Turbo is available but hidden
576 05:46:02.425113 Turbo is available and visible
577 05:46:02.428250 VMX status: enabled
578 05:46:02.431548 IA32_FEATURE_CONTROL status: locked
579 05:46:02.431618 Skip microcode update
580 05:46:02.434867 CPU #0 initialized
581 05:46:02.438230 Initializing CPU #3
582 05:46:02.438300 Initializing CPU #4
583 05:46:02.441667 Initializing CPU #6
584 05:46:02.445026 CPU: vendor Intel device 806ec
585 05:46:02.448250 CPU: family 06, model 8e, stepping 0c
586 05:46:02.451608 CPU: vendor Intel device 806ec
587 05:46:02.455068 CPU: family 06, model 8e, stepping 0c
588 05:46:02.458386 Clearing out pending MCEs
589 05:46:02.461081 Clearing out pending MCEs
590 05:46:02.461157 Setting up local APIC...
591 05:46:02.464938 Initializing CPU #2
592 05:46:02.468209 Initializing CPU #1
593 05:46:02.471446 CPU: vendor Intel device 806ec
594 05:46:02.474800 CPU: family 06, model 8e, stepping 0c
595 05:46:02.478038 CPU: vendor Intel device 806ec
596 05:46:02.481401 CPU: family 06, model 8e, stepping 0c
597 05:46:02.484800 Clearing out pending MCEs
598 05:46:02.484883 Clearing out pending MCEs
599 05:46:02.487544 Setting up local APIC...
600 05:46:02.490774 Initializing CPU #5
601 05:46:02.494683 CPU: vendor Intel device 806ec
602 05:46:02.497905 CPU: family 06, model 8e, stepping 0c
603 05:46:02.501191 Clearing out pending MCEs
604 05:46:02.501283 Initializing CPU #7
605 05:46:02.504372 CPU: vendor Intel device 806ec
606 05:46:02.507528 CPU: family 06, model 8e, stepping 0c
607 05:46:02.510822 CPU: vendor Intel device 806ec
608 05:46:02.517827 CPU: family 06, model 8e, stepping 0c
609 05:46:02.517903 Clearing out pending MCEs
610 05:46:02.520550 Clearing out pending MCEs
611 05:46:02.524299 Setting up local APIC...
612 05:46:02.527521 apic_id: 0x03 done.
613 05:46:02.527596 Setting up local APIC...
614 05:46:02.530764 Setting up local APIC...
615 05:46:02.533878 VMX status: enabled
616 05:46:02.533948 apic_id: 0x02 done.
617 05:46:02.537191 IA32_FEATURE_CONTROL status: locked
618 05:46:02.540505 VMX status: enabled
619 05:46:02.543870 Skip microcode update
620 05:46:02.547194 IA32_FEATURE_CONTROL status: locked
621 05:46:02.547271 CPU #2 initialized
622 05:46:02.550439 Skip microcode update
623 05:46:02.553656 Setting up local APIC...
624 05:46:02.556977 apic_id: 0x01 done.
625 05:46:02.557054 CPU #1 initialized
626 05:46:02.560197 VMX status: enabled
627 05:46:02.563496 Setting up local APIC...
628 05:46:02.566791 IA32_FEATURE_CONTROL status: locked
629 05:46:02.566864 apic_id: 0x05 done.
630 05:46:02.570059 apic_id: 0x04 done.
631 05:46:02.573424 VMX status: enabled
632 05:46:02.573498 VMX status: enabled
633 05:46:02.576615 Skip microcode update
634 05:46:02.580066 apic_id: 0x06 done.
635 05:46:02.580170 apic_id: 0x07 done.
636 05:46:02.583138 IA32_FEATURE_CONTROL status: locked
637 05:46:02.586452 IA32_FEATURE_CONTROL status: locked
638 05:46:02.589775 Skip microcode update
639 05:46:02.592967 CPU #3 initialized
640 05:46:02.593052 VMX status: enabled
641 05:46:02.596436 VMX status: enabled
642 05:46:02.599703 IA32_FEATURE_CONTROL status: locked
643 05:46:02.603201 IA32_FEATURE_CONTROL status: locked
644 05:46:02.606422 Skip microcode update
645 05:46:02.606509 Skip microcode update
646 05:46:02.609675 CPU #6 initialized
647 05:46:02.612810 CPU #4 initialized
648 05:46:02.612896 CPU #7 initialized
649 05:46:02.616620 Skip microcode update
650 05:46:02.619660 CPU #5 initialized
651 05:46:02.622664 bsp_do_flight_plan done after 457 msecs.
652 05:46:02.626286 CPU: frequency set to 4200 MHz
653 05:46:02.626372 Enabling SMIs.
654 05:46:02.629552 Locking SMM.
655 05:46:02.643149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 05:46:02.646565 CBFS @ c08000 size 3f8000
657 05:46:02.653005 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 05:46:02.653091 CBFS: Locating 'vbt.bin'
659 05:46:02.659372 CBFS: Found @ offset 5f5c0 size 499
660 05:46:02.662631 Found a VBT of 4608 bytes after decompression
661 05:46:02.848777 Display FSP Version Info HOB
662 05:46:02.852072 Reference Code - CPU = 9.0.1e.30
663 05:46:02.855314 uCode Version = 0.0.0.ca
664 05:46:02.858740 TXT ACM version = ff.ff.ff.ffff
665 05:46:02.862102 Display FSP Version Info HOB
666 05:46:02.865260 Reference Code - ME = 9.0.1e.30
667 05:46:02.868425 MEBx version = 0.0.0.0
668 05:46:02.871677 ME Firmware Version = Consumer SKU
669 05:46:02.874879 Display FSP Version Info HOB
670 05:46:02.878258 Reference Code - CML PCH = 9.0.1e.30
671 05:46:02.881597 PCH-CRID Status = Disabled
672 05:46:02.884891 PCH-CRID Original Value = ff.ff.ff.ffff
673 05:46:02.888283 PCH-CRID New Value = ff.ff.ff.ffff
674 05:46:02.891461 OPROM - RST - RAID = ff.ff.ff.ffff
675 05:46:02.894722 ChipsetInit Base Version = ff.ff.ff.ffff
676 05:46:02.897981 ChipsetInit Oem Version = ff.ff.ff.ffff
677 05:46:02.901182 Display FSP Version Info HOB
678 05:46:02.907754 Reference Code - SA - System Agent = 9.0.1e.30
679 05:46:02.911072 Reference Code - MRC = 0.7.1.6c
680 05:46:02.914168 SA - PCIe Version = 9.0.1e.30
681 05:46:02.917550 SA-CRID Status = Disabled
682 05:46:02.920715 SA-CRID Original Value = 0.0.0.c
683 05:46:02.920790 SA-CRID New Value = 0.0.0.c
684 05:46:02.924002 OPROM - VBIOS = ff.ff.ff.ffff
685 05:46:02.927191 RTC Init
686 05:46:02.930624 Set power on after power failure.
687 05:46:02.930701 Disabling Deep S3
688 05:46:02.933779 Disabling Deep S3
689 05:46:02.936960 Disabling Deep S4
690 05:46:02.937033 Disabling Deep S4
691 05:46:02.940295 Disabling Deep S5
692 05:46:02.940369 Disabling Deep S5
693 05:46:02.946821 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
694 05:46:02.950145 Enumerating buses...
695 05:46:02.953477 Show all devs... Before device enumeration.
696 05:46:02.956685 Root Device: enabled 1
697 05:46:02.959929 CPU_CLUSTER: 0: enabled 1
698 05:46:02.960004 DOMAIN: 0000: enabled 1
699 05:46:02.963960 APIC: 00: enabled 1
700 05:46:02.966737 PCI: 00:00.0: enabled 1
701 05:46:02.966813 PCI: 00:02.0: enabled 1
702 05:46:02.969877 PCI: 00:04.0: enabled 0
703 05:46:02.973235 PCI: 00:05.0: enabled 0
704 05:46:02.976440 PCI: 00:12.0: enabled 1
705 05:46:02.976515 PCI: 00:12.5: enabled 0
706 05:46:02.979704 PCI: 00:12.6: enabled 0
707 05:46:02.982993 PCI: 00:14.0: enabled 1
708 05:46:02.986126 PCI: 00:14.1: enabled 0
709 05:46:02.986206 PCI: 00:14.3: enabled 1
710 05:46:02.989390 PCI: 00:14.5: enabled 0
711 05:46:02.993166 PCI: 00:15.0: enabled 1
712 05:46:02.996451 PCI: 00:15.1: enabled 1
713 05:46:02.996535 PCI: 00:15.2: enabled 0
714 05:46:02.999773 PCI: 00:15.3: enabled 0
715 05:46:03.003074 PCI: 00:16.0: enabled 1
716 05:46:03.006405 PCI: 00:16.1: enabled 0
717 05:46:03.006489 PCI: 00:16.2: enabled 0
718 05:46:03.009584 PCI: 00:16.3: enabled 0
719 05:46:03.012312 PCI: 00:16.4: enabled 0
720 05:46:03.015969 PCI: 00:16.5: enabled 0
721 05:46:03.016059 PCI: 00:17.0: enabled 1
722 05:46:03.019207 PCI: 00:19.0: enabled 1
723 05:46:03.022569 PCI: 00:19.1: enabled 0
724 05:46:03.025915 PCI: 00:19.2: enabled 0
725 05:46:03.025990 PCI: 00:1a.0: enabled 0
726 05:46:03.029126 PCI: 00:1c.0: enabled 0
727 05:46:03.032176 PCI: 00:1c.1: enabled 0
728 05:46:03.032260 PCI: 00:1c.2: enabled 0
729 05:46:03.035489 PCI: 00:1c.3: enabled 0
730 05:46:03.038683 PCI: 00:1c.4: enabled 0
731 05:46:03.041826 PCI: 00:1c.5: enabled 0
732 05:46:03.041905 PCI: 00:1c.6: enabled 0
733 05:46:03.045116 PCI: 00:1c.7: enabled 0
734 05:46:03.048494 PCI: 00:1d.0: enabled 1
735 05:46:03.051746 PCI: 00:1d.1: enabled 0
736 05:46:03.051826 PCI: 00:1d.2: enabled 0
737 05:46:03.055206 PCI: 00:1d.3: enabled 0
738 05:46:03.058584 PCI: 00:1d.4: enabled 0
739 05:46:03.061961 PCI: 00:1d.5: enabled 1
740 05:46:03.062043 PCI: 00:1e.0: enabled 1
741 05:46:03.065164 PCI: 00:1e.1: enabled 0
742 05:46:03.068472 PCI: 00:1e.2: enabled 1
743 05:46:03.071600 PCI: 00:1e.3: enabled 1
744 05:46:03.071679 PCI: 00:1f.0: enabled 1
745 05:46:03.074990 PCI: 00:1f.1: enabled 1
746 05:46:03.078075 PCI: 00:1f.2: enabled 1
747 05:46:03.081472 PCI: 00:1f.3: enabled 1
748 05:46:03.081558 PCI: 00:1f.4: enabled 1
749 05:46:03.084664 PCI: 00:1f.5: enabled 1
750 05:46:03.088051 PCI: 00:1f.6: enabled 0
751 05:46:03.091174 USB0 port 0: enabled 1
752 05:46:03.091260 I2C: 00:15: enabled 1
753 05:46:03.094381 I2C: 00:5d: enabled 1
754 05:46:03.097704 GENERIC: 0.0: enabled 1
755 05:46:03.097790 I2C: 00:1a: enabled 1
756 05:46:03.100943 I2C: 00:38: enabled 1
757 05:46:03.104191 I2C: 00:39: enabled 1
758 05:46:03.104277 I2C: 00:3a: enabled 1
759 05:46:03.107467 I2C: 00:3b: enabled 1
760 05:46:03.110697 PCI: 00:00.0: enabled 1
761 05:46:03.110784 SPI: 00: enabled 1
762 05:46:03.113978 SPI: 01: enabled 1
763 05:46:03.117235 PNP: 0c09.0: enabled 1
764 05:46:03.117342 USB2 port 0: enabled 1
765 05:46:03.120915 USB2 port 1: enabled 1
766 05:46:03.124107 USB2 port 2: enabled 0
767 05:46:03.127307 USB2 port 3: enabled 0
768 05:46:03.127393 USB2 port 5: enabled 0
769 05:46:03.130527 USB2 port 6: enabled 1
770 05:46:03.133684 USB2 port 9: enabled 1
771 05:46:03.133770 USB3 port 0: enabled 1
772 05:46:03.137363 USB3 port 1: enabled 1
773 05:46:03.140446 USB3 port 2: enabled 1
774 05:46:03.143654 USB3 port 3: enabled 1
775 05:46:03.143733 USB3 port 4: enabled 0
776 05:46:03.146978 APIC: 02: enabled 1
777 05:46:03.150214 APIC: 03: enabled 1
778 05:46:03.150289 APIC: 01: enabled 1
779 05:46:03.153567 APIC: 06: enabled 1
780 05:46:03.153637 APIC: 05: enabled 1
781 05:46:03.157008 APIC: 07: enabled 1
782 05:46:03.160373 APIC: 04: enabled 1
783 05:46:03.160457 Compare with tree...
784 05:46:03.163728 Root Device: enabled 1
785 05:46:03.166968 CPU_CLUSTER: 0: enabled 1
786 05:46:03.167052 APIC: 00: enabled 1
787 05:46:03.169703 APIC: 02: enabled 1
788 05:46:03.173635 APIC: 03: enabled 1
789 05:46:03.176243 APIC: 01: enabled 1
790 05:46:03.176327 APIC: 06: enabled 1
791 05:46:03.180279 APIC: 05: enabled 1
792 05:46:03.182964 APIC: 07: enabled 1
793 05:46:03.183048 APIC: 04: enabled 1
794 05:46:03.186165 DOMAIN: 0000: enabled 1
795 05:46:03.189383 PCI: 00:00.0: enabled 1
796 05:46:03.192746 PCI: 00:02.0: enabled 1
797 05:46:03.192830 PCI: 00:04.0: enabled 0
798 05:46:03.196010 PCI: 00:05.0: enabled 0
799 05:46:03.199235 PCI: 00:12.0: enabled 1
800 05:46:03.202483 PCI: 00:12.5: enabled 0
801 05:46:03.205879 PCI: 00:12.6: enabled 0
802 05:46:03.205963 PCI: 00:14.0: enabled 1
803 05:46:03.209085 USB0 port 0: enabled 1
804 05:46:03.212392 USB2 port 0: enabled 1
805 05:46:03.215773 USB2 port 1: enabled 1
806 05:46:03.218838 USB2 port 2: enabled 0
807 05:46:03.222147 USB2 port 3: enabled 0
808 05:46:03.222231 USB2 port 5: enabled 0
809 05:46:03.225974 USB2 port 6: enabled 1
810 05:46:03.229007 USB2 port 9: enabled 1
811 05:46:03.232191 USB3 port 0: enabled 1
812 05:46:03.235290 USB3 port 1: enabled 1
813 05:46:03.238591 USB3 port 2: enabled 1
814 05:46:03.238675 USB3 port 3: enabled 1
815 05:46:03.241719 USB3 port 4: enabled 0
816 05:46:03.245456 PCI: 00:14.1: enabled 0
817 05:46:03.248601 PCI: 00:14.3: enabled 1
818 05:46:03.251843 PCI: 00:14.5: enabled 0
819 05:46:03.251929 PCI: 00:15.0: enabled 1
820 05:46:03.255174 I2C: 00:15: enabled 1
821 05:46:03.258497 PCI: 00:15.1: enabled 1
822 05:46:03.261209 I2C: 00:5d: enabled 1
823 05:46:03.264411 GENERIC: 0.0: enabled 1
824 05:46:03.264496 PCI: 00:15.2: enabled 0
825 05:46:03.267777 PCI: 00:15.3: enabled 0
826 05:46:03.271007 PCI: 00:16.0: enabled 1
827 05:46:03.274322 PCI: 00:16.1: enabled 0
828 05:46:03.277529 PCI: 00:16.2: enabled 0
829 05:46:03.280888 PCI: 00:16.3: enabled 0
830 05:46:03.280974 PCI: 00:16.4: enabled 0
831 05:46:03.284145 PCI: 00:16.5: enabled 0
832 05:46:03.287470 PCI: 00:17.0: enabled 1
833 05:46:03.290713 PCI: 00:19.0: enabled 1
834 05:46:03.294031 I2C: 00:1a: enabled 1
835 05:46:03.294118 I2C: 00:38: enabled 1
836 05:46:03.297445 I2C: 00:39: enabled 1
837 05:46:03.300757 I2C: 00:3a: enabled 1
838 05:46:03.304041 I2C: 00:3b: enabled 1
839 05:46:03.304126 PCI: 00:19.1: enabled 0
840 05:46:03.307396 PCI: 00:19.2: enabled 0
841 05:46:03.310509 PCI: 00:1a.0: enabled 0
842 05:46:03.313844 PCI: 00:1c.0: enabled 0
843 05:46:03.317134 PCI: 00:1c.1: enabled 0
844 05:46:03.317220 PCI: 00:1c.2: enabled 0
845 05:46:03.320389 PCI: 00:1c.3: enabled 0
846 05:46:03.323520 PCI: 00:1c.4: enabled 0
847 05:46:03.326738 PCI: 00:1c.5: enabled 0
848 05:46:03.330606 PCI: 00:1c.6: enabled 0
849 05:46:03.330692 PCI: 00:1c.7: enabled 0
850 05:46:03.333763 PCI: 00:1d.0: enabled 1
851 05:46:03.337025 PCI: 00:1d.1: enabled 0
852 05:46:03.339633 PCI: 00:1d.2: enabled 0
853 05:46:03.343365 PCI: 00:1d.3: enabled 0
854 05:46:03.343451 PCI: 00:1d.4: enabled 0
855 05:46:03.346578 PCI: 00:1d.5: enabled 1
856 05:46:03.349809 PCI: 00:00.0: enabled 1
857 05:46:03.353161 PCI: 00:1e.0: enabled 1
858 05:46:03.356602 PCI: 00:1e.1: enabled 0
859 05:46:03.356688 PCI: 00:1e.2: enabled 1
860 05:46:03.359895 SPI: 00: enabled 1
861 05:46:03.363202 PCI: 00:1e.3: enabled 1
862 05:46:03.366561 SPI: 01: enabled 1
863 05:46:03.366646 PCI: 00:1f.0: enabled 1
864 05:46:03.369785 PNP: 0c09.0: enabled 1
865 05:46:03.372378 PCI: 00:1f.1: enabled 1
866 05:46:03.375650 PCI: 00:1f.2: enabled 1
867 05:46:03.379609 PCI: 00:1f.3: enabled 1
868 05:46:03.379690 PCI: 00:1f.4: enabled 1
869 05:46:03.382246 PCI: 00:1f.5: enabled 1
870 05:46:03.386112 PCI: 00:1f.6: enabled 0
871 05:46:03.388788 Root Device scanning...
872 05:46:03.392068 scan_static_bus for Root Device
873 05:46:03.395299 CPU_CLUSTER: 0 enabled
874 05:46:03.395377 DOMAIN: 0000 enabled
875 05:46:03.398664 DOMAIN: 0000 scanning...
876 05:46:03.402435 PCI: pci_scan_bus for bus 00
877 05:46:03.405120 PCI: 00:00.0 [8086/0000] ops
878 05:46:03.408541 PCI: 00:00.0 [8086/9b61] enabled
879 05:46:03.411824 PCI: 00:02.0 [8086/0000] bus ops
880 05:46:03.415166 PCI: 00:02.0 [8086/9b41] enabled
881 05:46:03.418314 PCI: 00:04.0 [8086/1903] disabled
882 05:46:03.421618 PCI: 00:08.0 [8086/1911] enabled
883 05:46:03.424866 PCI: 00:12.0 [8086/02f9] enabled
884 05:46:03.427986 PCI: 00:14.0 [8086/0000] bus ops
885 05:46:03.431322 PCI: 00:14.0 [8086/02ed] enabled
886 05:46:03.434435 PCI: 00:14.2 [8086/02ef] enabled
887 05:46:03.438312 PCI: 00:14.3 [8086/02f0] enabled
888 05:46:03.441475 PCI: 00:15.0 [8086/0000] bus ops
889 05:46:03.444508 PCI: 00:15.0 [8086/02e8] enabled
890 05:46:03.447695 PCI: 00:15.1 [8086/0000] bus ops
891 05:46:03.450890 PCI: 00:15.1 [8086/02e9] enabled
892 05:46:03.454148 PCI: 00:16.0 [8086/0000] ops
893 05:46:03.457500 PCI: 00:16.0 [8086/02e0] enabled
894 05:46:03.460829 PCI: 00:17.0 [8086/0000] ops
895 05:46:03.464105 PCI: 00:17.0 [8086/02d3] enabled
896 05:46:03.467454 PCI: 00:19.0 [8086/0000] bus ops
897 05:46:03.470656 PCI: 00:19.0 [8086/02c5] enabled
898 05:46:03.474036 PCI: 00:1d.0 [8086/0000] bus ops
899 05:46:03.477333 PCI: 00:1d.0 [8086/02b0] enabled
900 05:46:03.484126 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 05:46:03.487235 PCI: 00:1e.0 [8086/0000] ops
902 05:46:03.490433 PCI: 00:1e.0 [8086/02a8] enabled
903 05:46:03.493839 PCI: 00:1e.2 [8086/0000] bus ops
904 05:46:03.496965 PCI: 00:1e.2 [8086/02aa] enabled
905 05:46:03.500414 PCI: 00:1e.3 [8086/0000] bus ops
906 05:46:03.503604 PCI: 00:1e.3 [8086/02ab] enabled
907 05:46:03.507184 PCI: 00:1f.0 [8086/0000] bus ops
908 05:46:03.509914 PCI: 00:1f.0 [8086/0284] enabled
909 05:46:03.516409 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 05:46:03.519858 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 05:46:03.523034 PCI: 00:1f.3 [8086/0000] bus ops
912 05:46:03.526359 PCI: 00:1f.3 [8086/02c8] enabled
913 05:46:03.529518 PCI: 00:1f.4 [8086/0000] bus ops
914 05:46:03.533205 PCI: 00:1f.4 [8086/02a3] enabled
915 05:46:03.536661 PCI: 00:1f.5 [8086/0000] bus ops
916 05:46:03.539707 PCI: 00:1f.5 [8086/02a4] enabled
917 05:46:03.542865 PCI: Leftover static devices:
918 05:46:03.546036 PCI: 00:05.0
919 05:46:03.546121 PCI: 00:12.5
920 05:46:03.549236 PCI: 00:12.6
921 05:46:03.549359 PCI: 00:14.1
922 05:46:03.549428 PCI: 00:14.5
923 05:46:03.552381 PCI: 00:15.2
924 05:46:03.552470 PCI: 00:15.3
925 05:46:03.555648 PCI: 00:16.1
926 05:46:03.555731 PCI: 00:16.2
927 05:46:03.555815 PCI: 00:16.3
928 05:46:03.558935 PCI: 00:16.4
929 05:46:03.559013 PCI: 00:16.5
930 05:46:03.562286 PCI: 00:19.1
931 05:46:03.562362 PCI: 00:19.2
932 05:46:03.565698 PCI: 00:1a.0
933 05:46:03.565775 PCI: 00:1c.0
934 05:46:03.565855 PCI: 00:1c.1
935 05:46:03.568899 PCI: 00:1c.2
936 05:46:03.568977 PCI: 00:1c.3
937 05:46:03.572380 PCI: 00:1c.4
938 05:46:03.572459 PCI: 00:1c.5
939 05:46:03.575678 PCI: 00:1c.6
940 05:46:03.575760 PCI: 00:1c.7
941 05:46:03.575842 PCI: 00:1d.1
942 05:46:03.578967 PCI: 00:1d.2
943 05:46:03.579048 PCI: 00:1d.3
944 05:46:03.582238 PCI: 00:1d.4
945 05:46:03.582316 PCI: 00:1d.5
946 05:46:03.582397 PCI: 00:1e.1
947 05:46:03.585631 PCI: 00:1f.1
948 05:46:03.585715 PCI: 00:1f.2
949 05:46:03.588845 PCI: 00:1f.6
950 05:46:03.591612 PCI: Check your devicetree.cb.
951 05:46:03.591696 PCI: 00:02.0 scanning...
952 05:46:03.598193 scan_generic_bus for PCI: 00:02.0
953 05:46:03.601389 scan_generic_bus for PCI: 00:02.0 done
954 05:46:03.604733 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
955 05:46:03.608046 PCI: 00:14.0 scanning...
956 05:46:03.611350 scan_static_bus for PCI: 00:14.0
957 05:46:03.614686 USB0 port 0 enabled
958 05:46:03.617992 USB0 port 0 scanning...
959 05:46:03.621211 scan_static_bus for USB0 port 0
960 05:46:03.621298 USB2 port 0 enabled
961 05:46:03.624678 USB2 port 1 enabled
962 05:46:03.627876 USB2 port 2 disabled
963 05:46:03.627952 USB2 port 3 disabled
964 05:46:03.631034 USB2 port 5 disabled
965 05:46:03.634359 USB2 port 6 enabled
966 05:46:03.634441 USB2 port 9 enabled
967 05:46:03.637583 USB3 port 0 enabled
968 05:46:03.637664 USB3 port 1 enabled
969 05:46:03.640807 USB3 port 2 enabled
970 05:46:03.644070 USB3 port 3 enabled
971 05:46:03.644148 USB3 port 4 disabled
972 05:46:03.647358 USB2 port 0 scanning...
973 05:46:03.650507 scan_static_bus for USB2 port 0
974 05:46:03.654432 scan_static_bus for USB2 port 0 done
975 05:46:03.660354 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
976 05:46:03.663739 USB2 port 1 scanning...
977 05:46:03.667023 scan_static_bus for USB2 port 1
978 05:46:03.670398 scan_static_bus for USB2 port 1 done
979 05:46:03.673569 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
980 05:46:03.676918 USB2 port 6 scanning...
981 05:46:03.680011 scan_static_bus for USB2 port 6
982 05:46:03.683421 scan_static_bus for USB2 port 6 done
983 05:46:03.690485 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
984 05:46:03.693730 USB2 port 9 scanning...
985 05:46:03.696472 scan_static_bus for USB2 port 9
986 05:46:03.699919 scan_static_bus for USB2 port 9 done
987 05:46:03.706519 scan_bus: scanning of bus USB2 port 9 took 9698 usecs
988 05:46:03.706605 USB3 port 0 scanning...
989 05:46:03.709692 scan_static_bus for USB3 port 0
990 05:46:03.716447 scan_static_bus for USB3 port 0 done
991 05:46:03.719629 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
992 05:46:03.722896 USB3 port 1 scanning...
993 05:46:03.726220 scan_static_bus for USB3 port 1
994 05:46:03.729471 scan_static_bus for USB3 port 1 done
995 05:46:03.736090 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
996 05:46:03.739365 USB3 port 2 scanning...
997 05:46:03.741855 scan_static_bus for USB3 port 2
998 05:46:03.745148 scan_static_bus for USB3 port 2 done
999 05:46:03.748870 scan_bus: scanning of bus USB3 port 2 took 9688 usecs
1000 05:46:03.752022 USB3 port 3 scanning...
1001 05:46:03.755018 scan_static_bus for USB3 port 3
1002 05:46:03.758219 scan_static_bus for USB3 port 3 done
1003 05:46:03.764755 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
1004 05:46:03.768581 scan_static_bus for USB0 port 0 done
1005 05:46:03.774619 scan_bus: scanning of bus USB0 port 0 took 155329 usecs
1006 05:46:03.778498 scan_static_bus for PCI: 00:14.0 done
1007 05:46:03.784404 scan_bus: scanning of bus PCI: 00:14.0 took 172957 usecs
1008 05:46:03.787646 PCI: 00:15.0 scanning...
1009 05:46:03.791055 scan_generic_bus for PCI: 00:15.0
1010 05:46:03.794298 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 05:46:03.797504 scan_generic_bus for PCI: 00:15.0 done
1012 05:46:03.804120 scan_bus: scanning of bus PCI: 00:15.0 took 14281 usecs
1013 05:46:03.807458 PCI: 00:15.1 scanning...
1014 05:46:03.810589 scan_generic_bus for PCI: 00:15.1
1015 05:46:03.813837 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 05:46:03.817192 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 05:46:03.823552 scan_generic_bus for PCI: 00:15.1 done
1018 05:46:03.826874 scan_bus: scanning of bus PCI: 00:15.1 took 18717 usecs
1019 05:46:03.830163 PCI: 00:19.0 scanning...
1020 05:46:03.833380 scan_generic_bus for PCI: 00:19.0
1021 05:46:03.836582 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 05:46:03.843169 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 05:46:03.846914 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 05:46:03.849585 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 05:46:03.853314 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 05:46:03.859860 scan_generic_bus for PCI: 00:19.0 done
1027 05:46:03.863108 scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs
1028 05:46:03.866263 PCI: 00:1d.0 scanning...
1029 05:46:03.869615 do_pci_scan_bridge for PCI: 00:1d.0
1030 05:46:03.872996 PCI: pci_scan_bus for bus 01
1031 05:46:03.876193 PCI: 01:00.0 [1c5c/1327] enabled
1032 05:46:03.879528 Enabling Common Clock Configuration
1033 05:46:03.885949 L1 Sub-State supported from root port 29
1034 05:46:03.886035 L1 Sub-State Support = 0xf
1035 05:46:03.889209 CommonModeRestoreTime = 0x28
1036 05:46:03.895545 Power On Value = 0x16, Power On Scale = 0x0
1037 05:46:03.895631 ASPM: Enabled L1
1038 05:46:03.902301 scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs
1039 05:46:03.905698 PCI: 00:1e.2 scanning...
1040 05:46:03.908977 scan_generic_bus for PCI: 00:1e.2
1041 05:46:03.912243 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 05:46:03.915556 scan_generic_bus for PCI: 00:1e.2 done
1043 05:46:03.921582 scan_bus: scanning of bus PCI: 00:1e.2 took 14001 usecs
1044 05:46:03.924859 PCI: 00:1e.3 scanning...
1045 05:46:03.928087 scan_generic_bus for PCI: 00:1e.3
1046 05:46:03.931431 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 05:46:03.935252 scan_generic_bus for PCI: 00:1e.3 done
1048 05:46:03.941691 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1049 05:46:03.945047 PCI: 00:1f.0 scanning...
1050 05:46:03.948161 scan_static_bus for PCI: 00:1f.0
1051 05:46:03.948247 PNP: 0c09.0 enabled
1052 05:46:03.954617 scan_static_bus for PCI: 00:1f.0 done
1053 05:46:03.957811 scan_bus: scanning of bus PCI: 00:1f.0 took 12047 usecs
1054 05:46:03.960964 PCI: 00:1f.3 scanning...
1055 05:46:03.967622 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1056 05:46:03.970906 PCI: 00:1f.4 scanning...
1057 05:46:03.974257 scan_generic_bus for PCI: 00:1f.4
1058 05:46:03.977374 scan_generic_bus for PCI: 00:1f.4 done
1059 05:46:03.984104 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1060 05:46:03.984190 PCI: 00:1f.5 scanning...
1061 05:46:03.987308 scan_generic_bus for PCI: 00:1f.5
1062 05:46:03.993972 scan_generic_bus for PCI: 00:1f.5 done
1063 05:46:03.996976 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1064 05:46:04.003459 scan_bus: scanning of bus DOMAIN: 0000 took 604995 usecs
1065 05:46:04.006785 scan_static_bus for Root Device done
1066 05:46:04.013354 scan_bus: scanning of bus Root Device took 624875 usecs
1067 05:46:04.013440 done
1068 05:46:04.016819 Chrome EC: UHEPI supported
1069 05:46:04.023242 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 05:46:04.029695 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 05:46:04.036245 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 05:46:04.042598 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 05:46:04.045818 SPI flash protection: WPSW=0 SRP0=1
1074 05:46:04.049684 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 05:46:04.055917 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 05:46:04.058989 found VGA at PCI: 00:02.0
1077 05:46:04.062781 Setting up VGA for PCI: 00:02.0
1078 05:46:04.065423 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 05:46:04.072105 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 05:46:04.075453 Allocating resources...
1081 05:46:04.075539 Reading resources...
1082 05:46:04.082015 Root Device read_resources bus 0 link: 0
1083 05:46:04.085243 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 05:46:04.091432 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 05:46:04.094752 DOMAIN: 0000 read_resources bus 0 link: 0
1086 05:46:04.101342 PCI: 00:14.0 read_resources bus 0 link: 0
1087 05:46:04.104673 USB0 port 0 read_resources bus 0 link: 0
1088 05:46:04.113256 USB0 port 0 read_resources bus 0 link: 0 done
1089 05:46:04.115828 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 05:46:04.123807 PCI: 00:15.0 read_resources bus 1 link: 0
1091 05:46:04.127000 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 05:46:04.133559 PCI: 00:15.1 read_resources bus 2 link: 0
1093 05:46:04.136731 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 05:46:04.144654 PCI: 00:19.0 read_resources bus 3 link: 0
1095 05:46:04.151045 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 05:46:04.154379 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 05:46:04.160628 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 05:46:04.164342 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 05:46:04.170276 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 05:46:04.173781 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 05:46:04.180400 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 05:46:04.183596 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 05:46:04.190225 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 05:46:04.196722 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 05:46:04.200048 Root Device read_resources bus 0 link: 0 done
1106 05:46:04.203259 Done reading resources.
1107 05:46:04.209981 Show resources in subtree (Root Device)...After reading.
1108 05:46:04.213326 Root Device child on link 0 CPU_CLUSTER: 0
1109 05:46:04.216765 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 05:46:04.219356 APIC: 00
1111 05:46:04.219442 APIC: 02
1112 05:46:04.222842 APIC: 03
1113 05:46:04.222928 APIC: 01
1114 05:46:04.222997 APIC: 06
1115 05:46:04.226123 APIC: 05
1116 05:46:04.226208 APIC: 07
1117 05:46:04.226275 APIC: 04
1118 05:46:04.232524 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 05:46:04.242173 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 05:46:04.295338 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 05:46:04.295483 PCI: 00:00.0
1122 05:46:04.296198 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 05:46:04.296470 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 05:46:04.296746 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 05:46:04.297323 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 05:46:04.303440 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 05:46:04.309431 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 05:46:04.319316 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 05:46:04.329389 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 05:46:04.335906 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 05:46:04.345693 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 05:46:04.355802 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 05:46:04.365492 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 05:46:04.375132 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 05:46:04.385040 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 05:46:04.394918 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 05:46:04.401497 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 05:46:04.404658 PCI: 00:02.0
1139 05:46:04.414538 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 05:46:04.424392 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 05:46:04.434242 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 05:46:04.434329 PCI: 00:04.0
1143 05:46:04.437563 PCI: 00:08.0
1144 05:46:04.446869 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 05:46:04.446957 PCI: 00:12.0
1146 05:46:04.457165 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 05:46:04.463636 PCI: 00:14.0 child on link 0 USB0 port 0
1148 05:46:04.473441 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 05:46:04.476688 USB0 port 0 child on link 0 USB2 port 0
1150 05:46:04.480062 USB2 port 0
1151 05:46:04.480148 USB2 port 1
1152 05:46:04.483419 USB2 port 2
1153 05:46:04.483505 USB2 port 3
1154 05:46:04.486832 USB2 port 5
1155 05:46:04.486919 USB2 port 6
1156 05:46:04.490009 USB2 port 9
1157 05:46:04.490094 USB3 port 0
1158 05:46:04.493440 USB3 port 1
1159 05:46:04.493526 USB3 port 2
1160 05:46:04.496110 USB3 port 3
1161 05:46:04.496196 USB3 port 4
1162 05:46:04.499338 PCI: 00:14.2
1163 05:46:04.509210 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 05:46:04.519059 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 05:46:04.522289 PCI: 00:14.3
1166 05:46:04.532140 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 05:46:04.535315 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 05:46:04.545141 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 05:46:04.545228 I2C: 01:15
1170 05:46:04.551647 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 05:46:04.561909 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 05:46:04.561997 I2C: 02:5d
1173 05:46:04.564929 GENERIC: 0.0
1174 05:46:04.565015 PCI: 00:16.0
1175 05:46:04.575102 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 05:46:04.577727 PCI: 00:17.0
1177 05:46:04.588212 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 05:46:04.594208 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 05:46:04.603953 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 05:46:04.610463 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 05:46:04.620867 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 05:46:04.630526 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 05:46:04.633853 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 05:46:04.643523 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 05:46:04.646881 I2C: 03:1a
1186 05:46:04.646967 I2C: 03:38
1187 05:46:04.647035 I2C: 03:39
1188 05:46:04.650132 I2C: 03:3a
1189 05:46:04.650219 I2C: 03:3b
1190 05:46:04.656549 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 05:46:04.662901 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 05:46:04.673075 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 05:46:04.682408 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 05:46:04.685652 PCI: 01:00.0
1195 05:46:04.695557 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 05:46:04.695644 PCI: 00:1e.0
1197 05:46:04.708956 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 05:46:04.718746 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 05:46:04.722181 PCI: 00:1e.2 child on link 0 SPI: 00
1200 05:46:04.731430 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 05:46:04.731517 SPI: 00
1202 05:46:04.738038 PCI: 00:1e.3 child on link 0 SPI: 01
1203 05:46:04.747659 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 05:46:04.747745 SPI: 01
1205 05:46:04.751656 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 05:46:04.761175 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 05:46:04.770647 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 05:46:04.770732 PNP: 0c09.0
1209 05:46:04.780370 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 05:46:04.780455 PCI: 00:1f.3
1211 05:46:04.790645 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 05:46:04.803375 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 05:46:04.803482 PCI: 00:1f.4
1214 05:46:04.813539 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 05:46:04.823445 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 05:46:04.823531 PCI: 00:1f.5
1217 05:46:04.833128 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 05:46:04.839750 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 05:46:04.846361 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 05:46:04.852934 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 05:46:04.856305 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 05:46:04.859398 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 05:46:04.862520 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 05:46:04.865658 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 05:46:04.875355 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 05:46:04.881887 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 05:46:04.888997 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 05:46:04.898270 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 05:46:04.905005 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 05:46:04.908251 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 05:46:04.914678 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 05:46:04.921191 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 05:46:04.924466 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 05:46:04.930887 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 05:46:04.934169 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 05:46:04.940820 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 05:46:04.944114 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 05:46:04.950812 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 05:46:04.953990 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 05:46:04.960684 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 05:46:04.963918 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 05:46:04.970458 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 05:46:04.973642 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 05:46:04.976794 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 05:46:04.983643 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 05:46:04.986881 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 05:46:04.993433 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 05:46:04.996749 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 05:46:05.002677 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 05:46:05.006729 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 05:46:05.012622 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 05:46:05.015917 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 05:46:05.022873 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 05:46:05.025565 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 05:46:05.035959 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 05:46:05.039352 avoid_fixed_resources: DOMAIN: 0000
1257 05:46:05.045197 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 05:46:05.051843 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 05:46:05.058363 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 05:46:05.064927 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 05:46:05.074886 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 05:46:05.081130 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 05:46:05.088165 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 05:46:05.097430 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 05:46:05.104026 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 05:46:05.110597 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 05:46:05.120332 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 05:46:05.126914 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 05:46:05.130138 Setting resources...
1270 05:46:05.133522 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 05:46:05.140145 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 05:46:05.143432 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 05:46:05.146625 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 05:46:05.150040 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 05:46:05.156604 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 05:46:05.163133 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 05:46:05.169753 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 05:46:05.176127 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 05:46:05.182505 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 05:46:05.189504 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 05:46:05.192703 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 05:46:05.199520 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 05:46:05.202020 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 05:46:05.208824 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 05:46:05.212143 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 05:46:05.215379 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 05:46:05.221923 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 05:46:05.225206 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 05:46:05.231936 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 05:46:05.234961 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 05:46:05.241436 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 05:46:05.244712 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 05:46:05.251344 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 05:46:05.254591 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 05:46:05.260963 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 05:46:05.264505 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 05:46:05.270473 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 05:46:05.274086 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 05:46:05.280527 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 05:46:05.283639 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 05:46:05.289926 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 05:46:05.296585 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 05:46:05.303061 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 05:46:05.313036 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 05:46:05.319605 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 05:46:05.322750 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 05:46:05.332521 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 05:46:05.335714 Root Device assign_resources, bus 0 link: 0
1309 05:46:05.339069 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 05:46:05.349553 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 05:46:05.359249 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 05:46:05.366037 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 05:46:05.372476 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 05:46:05.382584 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 05:46:05.389001 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 05:46:05.395349 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 05:46:05.398501 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 05:46:05.408196 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 05:46:05.414873 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 05:46:05.424826 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 05:46:05.431122 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 05:46:05.437814 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 05:46:05.441044 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 05:46:05.450965 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 05:46:05.454225 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 05:46:05.460367 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 05:46:05.466868 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 05:46:05.476798 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 05:46:05.483290 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 05:46:05.490431 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 05:46:05.500103 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 05:46:05.506670 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 05:46:05.512683 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 05:46:05.522782 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 05:46:05.526142 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 05:46:05.532502 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 05:46:05.539047 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 05:46:05.548717 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 05:46:05.558750 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 05:46:05.562022 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 05:46:05.571519 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 05:46:05.575408 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 05:46:05.585017 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 05:46:05.591336 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 05:46:05.597867 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 05:46:05.601002 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 05:46:05.610796 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 05:46:05.614123 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 05:46:05.617499 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 05:46:05.623957 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 05:46:05.627197 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 05:46:05.633485 LPC: Trying to open IO window from 800 size 1ff
1353 05:46:05.640166 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 05:46:05.649977 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 05:46:05.656350 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 05:46:05.666192 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 05:46:05.669501 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 05:46:05.676171 Root Device assign_resources, bus 0 link: 0
1359 05:46:05.679357 Done setting resources.
1360 05:46:05.685852 Show resources in subtree (Root Device)...After assigning values.
1361 05:46:05.689124 Root Device child on link 0 CPU_CLUSTER: 0
1362 05:46:05.692378 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 05:46:05.695554 APIC: 00
1364 05:46:05.695633 APIC: 02
1365 05:46:05.695698 APIC: 03
1366 05:46:05.698672 APIC: 01
1367 05:46:05.698744 APIC: 06
1368 05:46:05.698808 APIC: 05
1369 05:46:05.702062 APIC: 07
1370 05:46:05.702132 APIC: 04
1371 05:46:05.708735 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 05:46:05.718816 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 05:46:05.727937 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 05:46:05.728015 PCI: 00:00.0
1375 05:46:05.737702 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 05:46:05.747561 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 05:46:05.757591 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 05:46:05.767444 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 05:46:05.777136 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 05:46:05.786935 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 05:46:05.796617 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 05:46:05.803057 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 05:46:05.812986 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 05:46:05.823024 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 05:46:05.832834 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 05:46:05.842556 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 05:46:05.852204 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 05:46:05.861843 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 05:46:05.871593 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 05:46:05.878279 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 05:46:05.881526 PCI: 00:02.0
1392 05:46:05.891136 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 05:46:05.904545 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 05:46:05.910935 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 05:46:05.914297 PCI: 00:04.0
1396 05:46:05.914372 PCI: 00:08.0
1397 05:46:05.923573 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 05:46:05.927025 PCI: 00:12.0
1399 05:46:05.936921 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 05:46:05.939981 PCI: 00:14.0 child on link 0 USB0 port 0
1401 05:46:05.952974 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 05:46:05.956449 USB0 port 0 child on link 0 USB2 port 0
1403 05:46:05.959695 USB2 port 0
1404 05:46:05.959772 USB2 port 1
1405 05:46:05.962885 USB2 port 2
1406 05:46:05.962963 USB2 port 3
1407 05:46:05.966062 USB2 port 5
1408 05:46:05.966136 USB2 port 6
1409 05:46:05.969466 USB2 port 9
1410 05:46:05.969545 USB3 port 0
1411 05:46:05.972619 USB3 port 1
1412 05:46:05.972690 USB3 port 2
1413 05:46:05.975843 USB3 port 3
1414 05:46:05.975913 USB3 port 4
1415 05:46:05.979289 PCI: 00:14.2
1416 05:46:05.989183 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 05:46:05.999248 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 05:46:06.002386 PCI: 00:14.3
1419 05:46:06.012011 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 05:46:06.015258 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 05:46:06.025389 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 05:46:06.028060 I2C: 01:15
1423 05:46:06.032114 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 05:46:06.041541 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 05:46:06.044808 I2C: 02:5d
1426 05:46:06.044883 GENERIC: 0.0
1427 05:46:06.048219 PCI: 00:16.0
1428 05:46:06.057941 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 05:46:06.061330 PCI: 00:17.0
1430 05:46:06.071133 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 05:46:06.080879 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 05:46:06.090457 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 05:46:06.096912 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 05:46:06.106956 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 05:46:06.116657 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 05:46:06.120095 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 05:46:06.133080 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 05:46:06.133162 I2C: 03:1a
1439 05:46:06.136418 I2C: 03:38
1440 05:46:06.136493 I2C: 03:39
1441 05:46:06.139615 I2C: 03:3a
1442 05:46:06.139688 I2C: 03:3b
1443 05:46:06.142868 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 05:46:06.152638 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 05:46:06.162778 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 05:46:06.171997 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 05:46:06.175397 PCI: 01:00.0
1448 05:46:06.185420 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 05:46:06.188560 PCI: 00:1e.0
1450 05:46:06.198328 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 05:46:06.208356 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 05:46:06.211610 PCI: 00:1e.2 child on link 0 SPI: 00
1453 05:46:06.224724 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 05:46:06.224808 SPI: 00
1455 05:46:06.227981 PCI: 00:1e.3 child on link 0 SPI: 01
1456 05:46:06.237956 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 05:46:06.240682 SPI: 01
1458 05:46:06.244569 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 05:46:06.253916 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 05:46:06.260973 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 05:46:06.263718 PNP: 0c09.0
1462 05:46:06.273389 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 05:46:06.273470 PCI: 00:1f.3
1464 05:46:06.283557 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 05:46:06.296494 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 05:46:06.296582 PCI: 00:1f.4
1467 05:46:06.306073 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 05:46:06.316312 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 05:46:06.316394 PCI: 00:1f.5
1470 05:46:06.328946 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 05:46:06.329027 Done allocating resources.
1472 05:46:06.335665 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 05:46:06.338959 Enabling resources...
1474 05:46:06.342385 PCI: 00:00.0 subsystem <- 8086/9b61
1475 05:46:06.345498 PCI: 00:00.0 cmd <- 06
1476 05:46:06.348736 PCI: 00:02.0 subsystem <- 8086/9b41
1477 05:46:06.352057 PCI: 00:02.0 cmd <- 03
1478 05:46:06.355411 PCI: 00:08.0 cmd <- 06
1479 05:46:06.358675 PCI: 00:12.0 subsystem <- 8086/02f9
1480 05:46:06.361805 PCI: 00:12.0 cmd <- 02
1481 05:46:06.364655 PCI: 00:14.0 subsystem <- 8086/02ed
1482 05:46:06.368049 PCI: 00:14.0 cmd <- 02
1483 05:46:06.368122 PCI: 00:14.2 cmd <- 02
1484 05:46:06.374592 PCI: 00:14.3 subsystem <- 8086/02f0
1485 05:46:06.374669 PCI: 00:14.3 cmd <- 02
1486 05:46:06.381257 PCI: 00:15.0 subsystem <- 8086/02e8
1487 05:46:06.381378 PCI: 00:15.0 cmd <- 02
1488 05:46:06.384421 PCI: 00:15.1 subsystem <- 8086/02e9
1489 05:46:06.387802 PCI: 00:15.1 cmd <- 02
1490 05:46:06.390899 PCI: 00:16.0 subsystem <- 8086/02e0
1491 05:46:06.394228 PCI: 00:16.0 cmd <- 02
1492 05:46:06.397546 PCI: 00:17.0 subsystem <- 8086/02d3
1493 05:46:06.400787 PCI: 00:17.0 cmd <- 03
1494 05:46:06.404122 PCI: 00:19.0 subsystem <- 8086/02c5
1495 05:46:06.407168 PCI: 00:19.0 cmd <- 02
1496 05:46:06.410854 PCI: 00:1d.0 bridge ctrl <- 0013
1497 05:46:06.414093 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 05:46:06.417213 PCI: 00:1d.0 cmd <- 06
1499 05:46:06.420397 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 05:46:06.423762 PCI: 00:1e.0 cmd <- 06
1501 05:46:06.427097 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 05:46:06.430338 PCI: 00:1e.2 cmd <- 06
1503 05:46:06.433679 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 05:46:06.437147 PCI: 00:1e.3 cmd <- 02
1505 05:46:06.440285 PCI: 00:1f.0 subsystem <- 8086/0284
1506 05:46:06.443597 PCI: 00:1f.0 cmd <- 407
1507 05:46:06.446355 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 05:46:06.446426 PCI: 00:1f.3 cmd <- 02
1509 05:46:06.453436 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 05:46:06.453516 PCI: 00:1f.4 cmd <- 03
1511 05:46:06.460116 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 05:46:06.460192 PCI: 00:1f.5 cmd <- 406
1513 05:46:06.469922 PCI: 01:00.0 cmd <- 02
1514 05:46:06.475052 done.
1515 05:46:06.488676 ME: Version: 14.0.39.1367
1516 05:46:06.495292 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 13
1517 05:46:06.498389 Initializing devices...
1518 05:46:06.498467 Root Device init ...
1519 05:46:06.504755 Chrome EC: Set SMI mask to 0x0000000000000000
1520 05:46:06.507937 Chrome EC: clear events_b mask to 0x0000000000000000
1521 05:46:06.514911 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 05:46:06.521374 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 05:46:06.528022 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 05:46:06.531409 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 05:46:06.537362 Root Device init finished in 35226 usecs
1526 05:46:06.537436 CPU_CLUSTER: 0 init ...
1527 05:46:06.543898 CPU_CLUSTER: 0 init finished in 2449 usecs
1528 05:46:06.549109 PCI: 00:00.0 init ...
1529 05:46:06.552900 CPU TDP: 15 Watts
1530 05:46:06.556182 CPU PL2 = 64 Watts
1531 05:46:06.558738 PCI: 00:00.0 init finished in 7084 usecs
1532 05:46:06.562030 PCI: 00:02.0 init ...
1533 05:46:06.565222 PCI: 00:02.0 init finished in 2253 usecs
1534 05:46:06.568627 PCI: 00:08.0 init ...
1535 05:46:06.572085 PCI: 00:08.0 init finished in 2254 usecs
1536 05:46:06.575332 PCI: 00:12.0 init ...
1537 05:46:06.578650 PCI: 00:12.0 init finished in 2252 usecs
1538 05:46:06.582135 PCI: 00:14.0 init ...
1539 05:46:06.585330 PCI: 00:14.0 init finished in 2253 usecs
1540 05:46:06.588522 PCI: 00:14.2 init ...
1541 05:46:06.591759 PCI: 00:14.2 init finished in 2252 usecs
1542 05:46:06.595107 PCI: 00:14.3 init ...
1543 05:46:06.598441 PCI: 00:14.3 init finished in 2262 usecs
1544 05:46:06.601739 PCI: 00:15.0 init ...
1545 05:46:06.605069 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 05:46:06.611464 PCI: 00:15.0 init finished in 5970 usecs
1547 05:46:06.611542 PCI: 00:15.1 init ...
1548 05:46:06.617684 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 05:46:06.621045 PCI: 00:15.1 init finished in 5978 usecs
1550 05:46:06.624257 PCI: 00:16.0 init ...
1551 05:46:06.627630 PCI: 00:16.0 init finished in 2252 usecs
1552 05:46:06.630967 PCI: 00:19.0 init ...
1553 05:46:06.634353 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 05:46:06.637653 PCI: 00:19.0 init finished in 5977 usecs
1555 05:46:06.640982 PCI: 00:1d.0 init ...
1556 05:46:06.643675 Initializing PCH PCIe bridge.
1557 05:46:06.647537 PCI: 00:1d.0 init finished in 5286 usecs
1558 05:46:06.650896 PCI: 00:1f.0 init ...
1559 05:46:06.653973 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 05:46:06.660633 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 05:46:06.660710 IOAPIC: ID = 0x02
1562 05:46:06.664060 IOAPIC: Dumping registers
1563 05:46:06.667234 reg 0x0000: 0x02000000
1564 05:46:06.670458 reg 0x0001: 0x00770020
1565 05:46:06.673812 reg 0x0002: 0x00000000
1566 05:46:06.677120 PCI: 00:1f.0 init finished in 23559 usecs
1567 05:46:06.680554 PCI: 00:1f.4 init ...
1568 05:46:06.683830 PCI: 00:1f.4 init finished in 2262 usecs
1569 05:46:06.694954 PCI: 01:00.0 init ...
1570 05:46:06.698332 PCI: 01:00.0 init finished in 2253 usecs
1571 05:46:06.703022 PNP: 0c09.0 init ...
1572 05:46:06.706268 Google Chrome EC uptime: 11.072 seconds
1573 05:46:06.712634 Google Chrome AP resets since EC boot: 0
1574 05:46:06.715800 Google Chrome most recent AP reset causes:
1575 05:46:06.722123 Google Chrome EC reset flags at last EC boot: reset-pin
1576 05:46:06.725479 PNP: 0c09.0 init finished in 20580 usecs
1577 05:46:06.728547 Devices initialized
1578 05:46:06.731952 Show all devs... After init.
1579 05:46:06.732028 Root Device: enabled 1
1580 05:46:06.735339 CPU_CLUSTER: 0: enabled 1
1581 05:46:06.738831 DOMAIN: 0000: enabled 1
1582 05:46:06.742009 APIC: 00: enabled 1
1583 05:46:06.742080 PCI: 00:00.0: enabled 1
1584 05:46:06.745276 PCI: 00:02.0: enabled 1
1585 05:46:06.748479 PCI: 00:04.0: enabled 0
1586 05:46:06.751839 PCI: 00:05.0: enabled 0
1587 05:46:06.751913 PCI: 00:12.0: enabled 1
1588 05:46:06.754874 PCI: 00:12.5: enabled 0
1589 05:46:06.758191 PCI: 00:12.6: enabled 0
1590 05:46:06.761346 PCI: 00:14.0: enabled 1
1591 05:46:06.761417 PCI: 00:14.1: enabled 0
1592 05:46:06.764753 PCI: 00:14.3: enabled 1
1593 05:46:06.767940 PCI: 00:14.5: enabled 0
1594 05:46:06.771334 PCI: 00:15.0: enabled 1
1595 05:46:06.771407 PCI: 00:15.1: enabled 1
1596 05:46:06.774693 PCI: 00:15.2: enabled 0
1597 05:46:06.777919 PCI: 00:15.3: enabled 0
1598 05:46:06.781383 PCI: 00:16.0: enabled 1
1599 05:46:06.781455 PCI: 00:16.1: enabled 0
1600 05:46:06.783978 PCI: 00:16.2: enabled 0
1601 05:46:06.787332 PCI: 00:16.3: enabled 0
1602 05:46:06.787410 PCI: 00:16.4: enabled 0
1603 05:46:06.791172 PCI: 00:16.5: enabled 0
1604 05:46:06.794229 PCI: 00:17.0: enabled 1
1605 05:46:06.797541 PCI: 00:19.0: enabled 1
1606 05:46:06.797615 PCI: 00:19.1: enabled 0
1607 05:46:06.800883 PCI: 00:19.2: enabled 0
1608 05:46:06.803561 PCI: 00:1a.0: enabled 0
1609 05:46:06.807357 PCI: 00:1c.0: enabled 0
1610 05:46:06.807433 PCI: 00:1c.1: enabled 0
1611 05:46:06.810386 PCI: 00:1c.2: enabled 0
1612 05:46:06.813564 PCI: 00:1c.3: enabled 0
1613 05:46:06.816753 PCI: 00:1c.4: enabled 0
1614 05:46:06.816824 PCI: 00:1c.5: enabled 0
1615 05:46:06.819864 PCI: 00:1c.6: enabled 0
1616 05:46:06.823331 PCI: 00:1c.7: enabled 0
1617 05:46:06.826421 PCI: 00:1d.0: enabled 1
1618 05:46:06.826492 PCI: 00:1d.1: enabled 0
1619 05:46:06.830162 PCI: 00:1d.2: enabled 0
1620 05:46:06.832839 PCI: 00:1d.3: enabled 0
1621 05:46:06.836164 PCI: 00:1d.4: enabled 0
1622 05:46:06.836235 PCI: 00:1d.5: enabled 0
1623 05:46:06.839580 PCI: 00:1e.0: enabled 1
1624 05:46:06.842991 PCI: 00:1e.1: enabled 0
1625 05:46:06.846153 PCI: 00:1e.2: enabled 1
1626 05:46:06.846228 PCI: 00:1e.3: enabled 1
1627 05:46:06.849413 PCI: 00:1f.0: enabled 1
1628 05:46:06.852529 PCI: 00:1f.1: enabled 0
1629 05:46:06.855970 PCI: 00:1f.2: enabled 0
1630 05:46:06.856046 PCI: 00:1f.3: enabled 1
1631 05:46:06.858973 PCI: 00:1f.4: enabled 1
1632 05:46:06.862302 PCI: 00:1f.5: enabled 1
1633 05:46:06.865587 PCI: 00:1f.6: enabled 0
1634 05:46:06.865660 USB0 port 0: enabled 1
1635 05:46:06.868957 I2C: 01:15: enabled 1
1636 05:46:06.872326 I2C: 02:5d: enabled 1
1637 05:46:06.872398 GENERIC: 0.0: enabled 1
1638 05:46:06.875819 I2C: 03:1a: enabled 1
1639 05:46:06.879061 I2C: 03:38: enabled 1
1640 05:46:06.882259 I2C: 03:39: enabled 1
1641 05:46:06.882331 I2C: 03:3a: enabled 1
1642 05:46:06.885577 I2C: 03:3b: enabled 1
1643 05:46:06.888727 PCI: 00:00.0: enabled 1
1644 05:46:06.888807 SPI: 00: enabled 1
1645 05:46:06.891826 SPI: 01: enabled 1
1646 05:46:06.894972 PNP: 0c09.0: enabled 1
1647 05:46:06.895049 USB2 port 0: enabled 1
1648 05:46:06.898178 USB2 port 1: enabled 1
1649 05:46:06.901516 USB2 port 2: enabled 0
1650 05:46:06.901587 USB2 port 3: enabled 0
1651 05:46:06.904715 USB2 port 5: enabled 0
1652 05:46:06.907958 USB2 port 6: enabled 1
1653 05:46:06.911779 USB2 port 9: enabled 1
1654 05:46:06.911855 USB3 port 0: enabled 1
1655 05:46:06.914951 USB3 port 1: enabled 1
1656 05:46:06.918169 USB3 port 2: enabled 1
1657 05:46:06.918242 USB3 port 3: enabled 1
1658 05:46:06.921351 USB3 port 4: enabled 0
1659 05:46:06.924517 APIC: 02: enabled 1
1660 05:46:06.924590 APIC: 03: enabled 1
1661 05:46:06.927603 APIC: 01: enabled 1
1662 05:46:06.930930 APIC: 06: enabled 1
1663 05:46:06.931000 APIC: 05: enabled 1
1664 05:46:06.934261 APIC: 07: enabled 1
1665 05:46:06.934332 APIC: 04: enabled 1
1666 05:46:06.937602 PCI: 00:08.0: enabled 1
1667 05:46:06.940973 PCI: 00:14.2: enabled 1
1668 05:46:06.944221 PCI: 01:00.0: enabled 1
1669 05:46:06.947441 Disabling ACPI via APMC:
1670 05:46:06.950854 done.
1671 05:46:06.954118 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 05:46:06.957157 ELOG: NV offset 0xaf0000 size 0x4000
1673 05:46:06.964366 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 05:46:06.970981 ELOG: Event(17) added with size 13 at 2022-08-23 05:45:53 UTC
1675 05:46:06.977628 POST: Unexpected post code in previous boot: 0x73
1676 05:46:06.984128 ELOG: Event(A3) added with size 11 at 2022-08-23 05:45:53 UTC
1677 05:46:06.990345 ELOG: Event(A6) added with size 13 at 2022-08-23 05:45:53 UTC
1678 05:46:06.996832 ELOG: Event(92) added with size 9 at 2022-08-23 05:45:53 UTC
1679 05:46:07.003351 ELOG: Event(93) added with size 9 at 2022-08-23 05:45:53 UTC
1680 05:46:07.009994 ELOG: Event(9A) added with size 9 at 2022-08-23 05:45:53 UTC
1681 05:46:07.016299 ELOG: Event(9E) added with size 10 at 2022-08-23 05:45:53 UTC
1682 05:46:07.023287 ELOG: Event(9F) added with size 14 at 2022-08-23 05:45:53 UTC
1683 05:46:07.026458 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1684 05:46:07.032823 ELOG: Event(A1) added with size 10 at 2022-08-23 05:45:53 UTC
1685 05:46:07.042576 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1686 05:46:07.049447 ELOG: Event(A0) added with size 9 at 2022-08-23 05:45:53 UTC
1687 05:46:07.052672 elog_add_boot_reason: Logged dev mode boot
1688 05:46:07.055839 Finalize devices...
1689 05:46:07.055925 PCI: 00:17.0 final
1690 05:46:07.058964 Devices finalized
1691 05:46:07.062203 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1692 05:46:07.068749 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1693 05:46:07.072141 ME: HFSTS1 : 0x90000245
1694 05:46:07.078114 ME: HFSTS2 : 0x3B850126
1695 05:46:07.081330 ME: HFSTS3 : 0x00000020
1696 05:46:07.084686 ME: HFSTS4 : 0x00004800
1697 05:46:07.087817 ME: HFSTS5 : 0x00000000
1698 05:46:07.094522 ME: HFSTS6 : 0x40400006
1699 05:46:07.097782 ME: Manufacturing Mode : NO
1700 05:46:07.100987 ME: FW Partition Table : OK
1701 05:46:07.104469 ME: Bringup Loader Failure : NO
1702 05:46:07.107627 ME: Firmware Init Complete : YES
1703 05:46:07.111018 ME: Boot Options Present : NO
1704 05:46:07.114352 ME: Update In Progress : NO
1705 05:46:07.117565 ME: D0i3 Support : YES
1706 05:46:07.120686 ME: Low Power State Enabled : NO
1707 05:46:07.123779 ME: CPU Replaced : NO
1708 05:46:07.126978 ME: CPU Replacement Valid : YES
1709 05:46:07.130854 ME: Current Working State : 5
1710 05:46:07.134155 ME: Current Operation State : 1
1711 05:46:07.137392 ME: Current Operation Mode : 0
1712 05:46:07.140149 ME: Error Code : 0
1713 05:46:07.143409 ME: CPU Debug Disabled : YES
1714 05:46:07.146703 ME: TXT Support : NO
1715 05:46:07.150010 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1716 05:46:07.156708 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1717 05:46:07.159885 CBFS @ c08000 size 3f8000
1718 05:46:07.166408 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1719 05:46:07.169762 CBFS: Locating 'fallback/dsdt.aml'
1720 05:46:07.173038 CBFS: Found @ offset 10bb80 size 3fa5
1721 05:46:07.176289 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 05:46:07.179493 CBFS @ c08000 size 3f8000
1723 05:46:07.186269 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 05:46:07.189459 CBFS: Locating 'fallback/slic'
1725 05:46:07.196600 CBFS: 'fallback/slic' not found.
1726 05:46:07.199695 ACPI: Writing ACPI tables at 99b3e000.
1727 05:46:07.199782 ACPI: * FACS
1728 05:46:07.203007 ACPI: * DSDT
1729 05:46:07.206363 Ramoops buffer: 0x100000@0x99a3d000.
1730 05:46:07.209686 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1731 05:46:07.216123 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1732 05:46:07.219402 Google Chrome EC: version:
1733 05:46:07.222573 ro: helios_v2.0.2659-56403530b
1734 05:46:07.225406 rw: helios_v2.0.2849-c41de27e7d
1735 05:46:07.225492 running image: 1
1736 05:46:07.230544 ACPI: * FADT
1737 05:46:07.230629 SCI is IRQ9
1738 05:46:07.236839 ACPI: added table 1/32, length now 40
1739 05:46:07.236926 ACPI: * SSDT
1740 05:46:07.240204 Found 1 CPU(s) with 8 core(s) each.
1741 05:46:07.246731 Error: Could not locate 'wifi_sar' in VPD.
1742 05:46:07.250138 Checking CBFS for default SAR values
1743 05:46:07.253488 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1744 05:46:07.256709 CBFS @ c08000 size 3f8000
1745 05:46:07.263204 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1746 05:46:07.266518 CBFS: Locating 'wifi_sar_defaults.hex'
1747 05:46:07.269912 CBFS: Found @ offset 5fac0 size 77
1748 05:46:07.272674 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1749 05:46:07.279540 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1750 05:46:07.282715 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1751 05:46:07.289294 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1752 05:46:07.292798 failed to find key in VPD: dsm_calib_r0_0
1753 05:46:07.302115 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1754 05:46:07.308890 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1755 05:46:07.312163 failed to find key in VPD: dsm_calib_r0_1
1756 05:46:07.322017 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1757 05:46:07.325143 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1758 05:46:07.328558 failed to find key in VPD: dsm_calib_r0_2
1759 05:46:07.338488 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1760 05:46:07.345145 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1761 05:46:07.348408 failed to find key in VPD: dsm_calib_r0_3
1762 05:46:07.358409 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1763 05:46:07.361760 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1764 05:46:07.368745 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1765 05:46:07.371314 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1766 05:46:07.374734 EC returned error result code 1
1767 05:46:07.378090 EC returned error result code 1
1768 05:46:07.381367 EC returned error result code 1
1769 05:46:07.388263 PS2K: Bad resp from EC. Vivaldi disabled!
1770 05:46:07.394684 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1771 05:46:07.397378 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1772 05:46:07.403897 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1773 05:46:07.407706 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1774 05:46:07.413895 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1775 05:46:07.420395 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1776 05:46:07.427179 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1777 05:46:07.433496 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1778 05:46:07.436647 ACPI: added table 2/32, length now 44
1779 05:46:07.437135 ACPI: * MCFG
1780 05:46:07.439911 ACPI: added table 3/32, length now 48
1781 05:46:07.443119 ACPI: * TPM2
1782 05:46:07.446499 TPM2 log created at 99a2d000
1783 05:46:07.449758 ACPI: added table 4/32, length now 52
1784 05:46:07.453231 ACPI: * MADT
1785 05:46:07.453808 SCI is IRQ9
1786 05:46:07.456367 ACPI: added table 5/32, length now 56
1787 05:46:07.459872 current = 99b43ac0
1788 05:46:07.460464 ACPI: * DMAR
1789 05:46:07.462997 ACPI: added table 6/32, length now 60
1790 05:46:07.465731 ACPI: * IGD OpRegion
1791 05:46:07.469417 GMA: Found VBT in CBFS
1792 05:46:07.472707 GMA: Found valid VBT in CBFS
1793 05:46:07.476423 ACPI: added table 7/32, length now 64
1794 05:46:07.477017 ACPI: * HPET
1795 05:46:07.482765 ACPI: added table 8/32, length now 68
1796 05:46:07.483253 ACPI: done.
1797 05:46:07.485437 ACPI tables: 31744 bytes.
1798 05:46:07.489433 smbios_write_tables: 99a2c000
1799 05:46:07.492429 EC returned error result code 3
1800 05:46:07.495676 Couldn't obtain OEM name from CBI
1801 05:46:07.499076 Create SMBIOS type 17
1802 05:46:07.502430 PCI: 00:00.0 (Intel Cannonlake)
1803 05:46:07.505440 PCI: 00:14.3 (Intel WiFi)
1804 05:46:07.505959 SMBIOS tables: 939 bytes.
1805 05:46:07.512054 Writing table forward entry at 0x00000500
1806 05:46:07.515297 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1807 05:46:07.522288 Writing coreboot table at 0x99b62000
1808 05:46:07.525436 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1809 05:46:07.532122 1. 0000000000001000-000000000009ffff: RAM
1810 05:46:07.535009 2. 00000000000a0000-00000000000fffff: RESERVED
1811 05:46:07.541662 3. 0000000000100000-0000000099a2bfff: RAM
1812 05:46:07.544792 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1813 05:46:07.551391 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1814 05:46:07.558133 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1815 05:46:07.561644 7. 000000009a000000-000000009f7fffff: RESERVED
1816 05:46:07.568020 8. 00000000e0000000-00000000efffffff: RESERVED
1817 05:46:07.570490 9. 00000000fc000000-00000000fc000fff: RESERVED
1818 05:46:07.574397 10. 00000000fe000000-00000000fe00ffff: RESERVED
1819 05:46:07.580895 11. 00000000fed10000-00000000fed17fff: RESERVED
1820 05:46:07.584303 12. 00000000fed80000-00000000fed83fff: RESERVED
1821 05:46:07.590681 13. 00000000fed90000-00000000fed91fff: RESERVED
1822 05:46:07.593835 14. 00000000feda0000-00000000feda1fff: RESERVED
1823 05:46:07.600502 15. 0000000100000000-000000045e7fffff: RAM
1824 05:46:07.603126 Graphics framebuffer located at 0xc0000000
1825 05:46:07.606902 Passing 5 GPIOs to payload:
1826 05:46:07.610123 NAME | PORT | POLARITY | VALUE
1827 05:46:07.616873 write protect | undefined | high | low
1828 05:46:07.623013 lid | undefined | high | high
1829 05:46:07.626064 power | undefined | high | low
1830 05:46:07.632964 oprom | undefined | high | low
1831 05:46:07.636354 EC in RW | 0x000000cb | high | low
1832 05:46:07.639235 Board ID: 4
1833 05:46:07.642550 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1834 05:46:07.645719 CBFS @ c08000 size 3f8000
1835 05:46:07.652411 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1836 05:46:07.659111 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d67
1837 05:46:07.662213 coreboot table: 1492 bytes.
1838 05:46:07.665720 IMD ROOT 0. 99fff000 00001000
1839 05:46:07.668845 IMD SMALL 1. 99ffe000 00001000
1840 05:46:07.672243 FSP MEMORY 2. 99c4e000 003b0000
1841 05:46:07.675291 CONSOLE 3. 99c2e000 00020000
1842 05:46:07.678505 FMAP 4. 99c2d000 0000054e
1843 05:46:07.682054 TIME STAMP 5. 99c2c000 00000910
1844 05:46:07.685227 VBOOT WORK 6. 99c18000 00014000
1845 05:46:07.688511 MRC DATA 7. 99c16000 00001958
1846 05:46:07.691812 ROMSTG STCK 8. 99c15000 00001000
1847 05:46:07.694999 AFTER CAR 9. 99c0b000 0000a000
1848 05:46:07.698449 RAMSTAGE 10. 99baf000 0005c000
1849 05:46:07.700983 REFCODE 11. 99b7a000 00035000
1850 05:46:07.704964 SMM BACKUP 12. 99b6a000 00010000
1851 05:46:07.708230 COREBOOT 13. 99b62000 00008000
1852 05:46:07.710873 ACPI 14. 99b3e000 00024000
1853 05:46:07.714621 ACPI GNVS 15. 99b3d000 00001000
1854 05:46:07.717878 RAMOOPS 16. 99a3d000 00100000
1855 05:46:07.721577 TPM2 TCGLOG17. 99a2d000 00010000
1856 05:46:07.724427 SMBIOS 18. 99a2c000 00000800
1857 05:46:07.727855 IMD small region:
1858 05:46:07.730890 IMD ROOT 0. 99ffec00 00000400
1859 05:46:07.734051 FSP RUNTIME 1. 99ffebe0 00000004
1860 05:46:07.737369 EC HOSTEVENT 2. 99ffebc0 00000008
1861 05:46:07.740438 POWER STATE 3. 99ffeb80 00000040
1862 05:46:07.744151 ROMSTAGE 4. 99ffeb60 00000004
1863 05:46:07.746778 MEM INFO 5. 99ffe9a0 000001b9
1864 05:46:07.750857 VPD 6. 99ffe940 0000004c
1865 05:46:07.754224 MTRR: Physical address space:
1866 05:46:07.760777 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1867 05:46:07.766760 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1868 05:46:07.773372 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1869 05:46:07.779531 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1870 05:46:07.786124 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1871 05:46:07.793124 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1872 05:46:07.796401 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1873 05:46:07.802828 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 05:46:07.805998 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 05:46:07.809335 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 05:46:07.812423 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 05:46:07.819092 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 05:46:07.822447 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 05:46:07.825716 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 05:46:07.828966 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 05:46:07.835367 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 05:46:07.838630 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 05:46:07.841628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 05:46:07.845598 call enable_fixed_mtrr()
1885 05:46:07.848341 CPU physical address size: 39 bits
1886 05:46:07.855226 MTRR: default type WB/UC MTRR counts: 6/8.
1887 05:46:07.858319 MTRR: WB selected as default type.
1888 05:46:07.865246 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1889 05:46:07.871568 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1890 05:46:07.875006 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1891 05:46:07.881450 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1892 05:46:07.887887 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1893 05:46:07.894284 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1894 05:46:07.901025 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 05:46:07.904595 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 05:46:07.907609 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 05:46:07.910864 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 05:46:07.917580 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 05:46:07.920170 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 05:46:07.923587 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 05:46:07.926988 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 05:46:07.933530 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 05:46:07.936669 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 05:46:07.939868 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 05:46:07.940354
1906 05:46:07.943190 MTRR check
1907 05:46:07.946361 Fixed MTRRs : Enabled
1908 05:46:07.946845 Variable MTRRs: Enabled
1909 05:46:07.947226
1910 05:46:07.949576 call enable_fixed_mtrr()
1911 05:46:07.956166 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1912 05:46:07.959753 CPU physical address size: 39 bits
1913 05:46:07.962965 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1914 05:46:07.969642 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 05:46:07.972794 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 05:46:07.976227 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 05:46:07.979169 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 05:46:07.985711 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 05:46:07.988810 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 05:46:07.992022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 05:46:07.995311 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 05:46:08.002006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 05:46:08.005476 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 05:46:08.008488 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 05:46:08.015299 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 05:46:08.018151 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 05:46:08.021567 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 05:46:08.024798 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 05:46:08.031507 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 05:46:08.034664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 05:46:08.038006 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 05:46:08.041078 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 05:46:08.048157 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 05:46:08.051306 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 05:46:08.054646 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 05:46:08.057807 call enable_fixed_mtrr()
1937 05:46:08.060906 call enable_fixed_mtrr()
1938 05:46:08.063967 CPU physical address size: 39 bits
1939 05:46:08.067418 CPU physical address size: 39 bits
1940 05:46:08.070819 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 05:46:08.074151 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 05:46:08.080560 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 05:46:08.083731 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 05:46:08.086852 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 05:46:08.090245 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 05:46:08.096609 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 05:46:08.099913 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 05:46:08.103123 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 05:46:08.106505 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 05:46:08.113228 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 05:46:08.116641 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 05:46:08.119920 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 05:46:08.123200 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 05:46:08.129849 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 05:46:08.132876 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 05:46:08.136035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 05:46:08.142439 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 05:46:08.145573 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 05:46:08.149244 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 05:46:08.152656 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 05:46:08.158846 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 05:46:08.159330 call enable_fixed_mtrr()
1963 05:46:08.162190 call enable_fixed_mtrr()
1964 05:46:08.165563 CPU physical address size: 39 bits
1965 05:46:08.169600 CPU physical address size: 39 bits
1966 05:46:08.175666 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 05:46:08.178687 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 05:46:08.181756 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 05:46:08.185169 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 05:46:08.192187 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 05:46:08.194906 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 05:46:08.198175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 05:46:08.201726 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 05:46:08.208335 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 05:46:08.211708 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 05:46:08.214935 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 05:46:08.217822 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 05:46:08.224536 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 05:46:08.227761 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 05:46:08.231240 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 05:46:08.237460 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 05:46:08.240942 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 05:46:08.244253 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 05:46:08.247180 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 05:46:08.254057 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 05:46:08.257313 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 05:46:08.260546 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 05:46:08.263765 call enable_fixed_mtrr()
1989 05:46:08.267095 call enable_fixed_mtrr()
1990 05:46:08.270877 CPU physical address size: 39 bits
1991 05:46:08.273530 CPU physical address size: 39 bits
1992 05:46:08.277545 CBFS @ c08000 size 3f8000
1993 05:46:08.280148 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1994 05:46:08.286465 CBFS: Locating 'fallback/payload'
1995 05:46:08.289836 CBFS: Found @ offset 1c96c0 size 3f798
1996 05:46:08.293077 Checking segment from ROM address 0xffdd16f8
1997 05:46:08.299563 Checking segment from ROM address 0xffdd1714
1998 05:46:08.302875 Loading segment from ROM address 0xffdd16f8
1999 05:46:08.306134 code (compression=0)
2000 05:46:08.312686 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2001 05:46:08.322630 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2002 05:46:08.325780 it's not compressed!
2003 05:46:08.417192 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2004 05:46:08.423277 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2005 05:46:08.430252 Loading segment from ROM address 0xffdd1714
2006 05:46:08.430740 Entry Point 0x30000000
2007 05:46:08.433217 Loaded segments
2008 05:46:08.439241 Finalizing chipset.
2009 05:46:08.442207 Finalizing SMM.
2010 05:46:08.446043 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2011 05:46:08.449296 mp_park_aps done after 0 msecs.
2012 05:46:08.455724 Jumping to boot code at 30000000(99b62000)
2013 05:46:08.461981 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2014 05:46:08.462476
2015 05:46:08.465205 Starting depthcharge on Helios...
2016 05:46:08.466480 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2017 05:46:08.467084 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2018 05:46:08.467552 Setting prompt string to ['hatch:']
2019 05:46:08.468008 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2020 05:46:08.475237 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 05:46:08.482125 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2022 05:46:08.488733 board_setup: Info: eMMC controller not present; skipping
2023 05:46:08.491101 New NVMe Controller 0x30053ac0 @ 00:1d:00
2024 05:46:08.498288 board_setup: Info: SDHCI controller not present; skipping
2025 05:46:08.504229 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2026 05:46:08.504714 Wipe memory regions:
2027 05:46:08.511385 [0x00000000001000, 0x000000000a0000)
2028 05:46:08.513925 [0x00000000100000, 0x00000030000000)
2029 05:46:08.581505 [0x00000030657430, 0x00000099a2c000)
2030 05:46:08.722077 [0x00000100000000, 0x0000045e800000)
2031 05:46:10.103492 R8152: Initializing
2032 05:46:10.106933 Version 9 (ocp_data = 6010)
2033 05:46:10.110973 R8152: Done initializing
2034 05:46:10.114202 Adding net device
2035 05:46:10.489726 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2036 05:46:10.489877
2037 05:46:10.490162 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2039 05:46:10.590962 hatch: tftpboot 192.168.201.1 7096680/tftp-deploy-alt88z8y/kernel/bzImage 7096680/tftp-deploy-alt88z8y/kernel/cmdline 7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
2040 05:46:10.591167 Setting prompt string to 'Starting kernel'
2041 05:46:10.591296 Setting prompt string to ['Starting kernel']
2042 05:46:10.591416 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2043 05:46:10.591552 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
2044 05:46:10.596073 tftpboot 192.168.201.1 7096680/tftp-deploy-alt88z8y/kernel/bzImoy-alt88z8y/kernel/cmdline 7096680/tftp-deploy-alt88z8y/ramdisk/ramdisk.cpio.gz
2045 05:46:10.596231 Waiting for link
2046 05:46:10.797488 done.
2047 05:46:10.797630 MAC: f4:f5:e8:50:e5:3a
2048 05:46:10.800016 Sending DHCP discover... done.
2049 05:46:10.803366 Waiting for reply... done.
2050 05:46:10.806620 Sending DHCP request... done.
2051 05:46:10.809891 Waiting for reply... done.
2052 05:46:10.813145 My ip is 192.168.201.17
2053 05:46:10.816572 The DHCP server ip is 192.168.201.1
2054 05:46:10.819954 TFTP server IP predefined by user: 192.168.201.1
2055 05:46:10.826548 Bootfile predefined by user: 7096680/tftp-deploy-alt88z8y/kernel/bzImage
2056 05:46:10.829879 Sending tftp read request... done.
2057 05:46:10.836095 Waiting for the transfer...
2058 05:46:11.081726 00000000 ################################################################
2059 05:46:11.357431 00080000 ################################################################
2060 05:46:11.616811 00100000 ################################################################
2061 05:46:11.853694 00180000 ################################################################
2062 05:46:12.089219 00200000 ################################################################
2063 05:46:12.337920 00280000 ################################################################
2064 05:46:12.579906 00300000 ################################################################
2065 05:46:12.864326 00380000 ################################################################
2066 05:46:13.129337 00400000 ################################################################
2067 05:46:13.378093 00480000 ################################################################
2068 05:46:13.616710 00500000 ################################################################
2069 05:46:13.858373 00580000 ################################################################
2070 05:46:14.098856 00600000 ################################################################
2071 05:46:14.339897 00680000 ################################################################
2072 05:46:14.611896 00700000 ################################################################
2073 05:46:14.846622 00780000 ################################################################
2074 05:46:15.091269 00800000 ################################################################
2075 05:46:15.114087 00880000 ###### done.
2076 05:46:15.117419 The bootfile was 8953856 bytes long.
2077 05:46:15.120554 Sending tftp read request... done.
2078 05:46:15.123962 Waiting for the transfer...
2079 05:46:15.455717 00000000 ################################################################
2080 05:46:15.764260 00080000 ################################################################
2081 05:46:16.247915 00100000 ################################################################
2082 05:46:16.712152 00180000 ################################################################
2083 05:46:17.213114 00200000 ################################################################
2084 05:46:17.591102 00280000 ################################################################
2085 05:46:17.973442 00300000 ################################################################
2086 05:46:18.502146 00380000 ################################################################
2087 05:46:18.748802 00400000 ################################################################
2088 05:46:18.991294 00480000 ################################################################
2089 05:46:19.111754 00500000 ################################ done.
2090 05:46:19.115089 Sending tftp read request... done.
2091 05:46:19.118315 Waiting for the transfer...
2092 05:46:19.118422 00000000 # done.
2093 05:46:19.128228 Command line loaded dynamically from TFTP file: 7096680/tftp-deploy-alt88z8y/kernel/cmdline
2094 05:46:19.151198 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096680/extract-nfsrootfs-ik4nitba,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2095 05:46:19.157853 ec_init(0): CrosEC protocol v3 supported (256, 256)
2096 05:46:19.165114 Shutting down all USB controllers.
2097 05:46:19.165564 Removing current net device
2098 05:46:19.168476 Finalizing coreboot
2099 05:46:19.175216 Exiting depthcharge with code 4 at timestamp: 18007647
2100 05:46:19.175787
2101 05:46:19.176176 Starting kernel ...
2102 05:46:19.177074 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2103 05:46:19.177686 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2104 05:46:19.178211 Setting prompt string to ['Linux version [0-9]']
2105 05:46:19.178667 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2106 05:46:19.179136 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2107 05:46:19.180125
2108 05:46:19.180542
2110 05:50:49.178030 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2112 05:50:49.178476 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2114 05:50:49.178822 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2117 05:50:49.179420 end: 2 depthcharge-action (duration 00:05:00) [common]
2119 05:50:49.179858 Cleaning after the job
2120 05:50:49.180042 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/ramdisk
2121 05:50:49.180965 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/kernel
2122 05:50:49.182136 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/nfsrootfs
2123 05:50:49.224081 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096680/tftp-deploy-alt88z8y/modules
2124 05:50:49.224375 start: 4.1 power-off (timeout 00:00:30) [common]
2125 05:50:49.224537 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2126 05:50:49.243593 >> Command sent successfully.
2127 05:50:49.245502 Returned 0 in 0 seconds
2128 05:50:49.346310 end: 4.1 power-off (duration 00:00:00) [common]
2130 05:50:49.346649 start: 4.2 read-feedback (timeout 00:10:00) [common]
2131 05:50:49.346894 Listened to connection for namespace 'common' for up to 1s
2132 05:50:50.352091 Finalising connection for namespace 'common'
2133 05:50:50.352507 Disconnecting from shell: Finalise
2134 05:50:50.453740 end: 4.2 read-feedback (duration 00:00:01) [common]
2135 05:50:50.454399 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096680
2136 05:50:50.622488 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096680
2137 05:50:50.622714 JobError: Your job cannot terminate cleanly.