Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:46:17.856943 lava-dispatcher, installed at version: 2022.06
2 05:46:17.857174 start: 0 validate
3 05:46:17.857330 Start time: 2022-08-23 05:46:17.857322+00:00 (UTC)
4 05:46:17.857485 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:46:17.857632 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:46:18.151032 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:46:18.151222 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:46:18.435491 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:46:18.435671 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:46:18.726441 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:46:18.726626 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:46:19.015844 validate duration: 1.16
14 05:46:19.016146 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:46:19.016265 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:46:19.016365 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:46:19.016470 Not decompressing ramdisk as can be used compressed.
18 05:46:19.016561 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/initrd.cpio.gz
19 05:46:19.016632 saving as /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/ramdisk/initrd.cpio.gz
20 05:46:19.016699 total size: 5411025 (5MB)
21 05:46:19.017937 progress 0% (0MB)
22 05:46:19.019545 progress 5% (0MB)
23 05:46:19.020999 progress 10% (0MB)
24 05:46:19.022565 progress 15% (0MB)
25 05:46:19.024165 progress 20% (1MB)
26 05:46:19.025712 progress 25% (1MB)
27 05:46:19.027151 progress 30% (1MB)
28 05:46:19.028594 progress 35% (1MB)
29 05:46:19.030205 progress 40% (2MB)
30 05:46:19.031644 progress 45% (2MB)
31 05:46:19.033110 progress 50% (2MB)
32 05:46:19.034566 progress 55% (2MB)
33 05:46:19.036252 progress 60% (3MB)
34 05:46:19.037839 progress 65% (3MB)
35 05:46:19.039351 progress 70% (3MB)
36 05:46:19.040789 progress 75% (3MB)
37 05:46:19.042404 progress 80% (4MB)
38 05:46:19.043929 progress 85% (4MB)
39 05:46:19.045417 progress 90% (4MB)
40 05:46:19.046866 progress 95% (4MB)
41 05:46:19.048454 progress 100% (5MB)
42 05:46:19.048641 5MB downloaded in 0.03s (161.58MB/s)
43 05:46:19.048840 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:46:19.049159 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:46:19.049258 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:46:19.049356 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:46:19.049472 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:46:19.049547 saving as /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/kernel/bzImage
50 05:46:19.049616 total size: 8953856 (8MB)
51 05:46:19.049683 No compression specified
52 05:46:19.050818 progress 0% (0MB)
53 05:46:19.053403 progress 5% (0MB)
54 05:46:19.055919 progress 10% (0MB)
55 05:46:19.058322 progress 15% (1MB)
56 05:46:19.060813 progress 20% (1MB)
57 05:46:19.063310 progress 25% (2MB)
58 05:46:19.065645 progress 30% (2MB)
59 05:46:19.068194 progress 35% (3MB)
60 05:46:19.070690 progress 40% (3MB)
61 05:46:19.072983 progress 45% (3MB)
62 05:46:19.075590 progress 50% (4MB)
63 05:46:19.078143 progress 55% (4MB)
64 05:46:19.080423 progress 60% (5MB)
65 05:46:19.082900 progress 65% (5MB)
66 05:46:19.085335 progress 70% (6MB)
67 05:46:19.087603 progress 75% (6MB)
68 05:46:19.090055 progress 80% (6MB)
69 05:46:19.092455 progress 85% (7MB)
70 05:46:19.094737 progress 90% (7MB)
71 05:46:19.097228 progress 95% (8MB)
72 05:46:19.099732 progress 100% (8MB)
73 05:46:19.099938 8MB downloaded in 0.05s (169.71MB/s)
74 05:46:19.100102 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:46:19.100368 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:46:19.100468 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:46:19.100566 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:46:19.100682 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/full.rootfs.tar.xz
80 05:46:19.100756 saving as /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/nfsrootfs/full.rootfs.tar
81 05:46:19.100824 total size: 122678960 (116MB)
82 05:46:19.100892 Using unxz to decompress xz
83 05:46:19.104468 progress 0% (0MB)
84 05:46:19.589114 progress 5% (5MB)
85 05:46:20.086928 progress 10% (11MB)
86 05:46:20.593125 progress 15% (17MB)
87 05:46:21.100455 progress 20% (23MB)
88 05:46:21.454197 progress 25% (29MB)
89 05:46:21.839818 progress 30% (35MB)
90 05:46:22.109344 progress 35% (40MB)
91 05:46:22.347292 progress 40% (46MB)
92 05:46:22.726703 progress 45% (52MB)
93 05:46:23.116315 progress 50% (58MB)
94 05:46:23.482323 progress 55% (64MB)
95 05:46:23.863563 progress 60% (70MB)
96 05:46:24.225341 progress 65% (76MB)
97 05:46:24.637982 progress 70% (81MB)
98 05:46:25.079560 progress 75% (87MB)
99 05:46:25.531432 progress 80% (93MB)
100 05:46:25.655362 progress 85% (99MB)
101 05:46:25.842944 progress 90% (105MB)
102 05:46:26.206675 progress 95% (111MB)
103 05:46:26.608994 progress 100% (116MB)
104 05:46:26.616084 116MB downloaded in 7.52s (15.57MB/s)
105 05:46:26.616372 end: 1.3.1 http-download (duration 00:00:08) [common]
107 05:46:26.616738 end: 1.3 download-retry (duration 00:00:08) [common]
108 05:46:26.616876 start: 1.4 download-retry (timeout 00:09:52) [common]
109 05:46:26.616979 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 05:46:26.617125 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:46:26.617210 saving as /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/modules/modules.tar
112 05:46:26.617282 total size: 64712 (0MB)
113 05:46:26.617355 Using unxz to decompress xz
114 05:46:26.620973 progress 50% (0MB)
115 05:46:26.621426 progress 100% (0MB)
116 05:46:26.626022 0MB downloaded in 0.01s (7.07MB/s)
117 05:46:26.626271 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:46:26.626573 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:46:26.626684 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 05:46:26.626796 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 05:46:28.501776 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096694/extract-nfsrootfs-6kr2y5lp
123 05:46:28.501995 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 05:46:28.502134 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 05:46:28.502300 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty
126 05:46:28.502414 makedir: /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin
127 05:46:28.502508 makedir: /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/tests
128 05:46:28.502598 makedir: /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/results
129 05:46:28.502706 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-add-keys
130 05:46:28.502846 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-add-sources
131 05:46:28.502977 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-background-process-start
132 05:46:28.503103 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-background-process-stop
133 05:46:28.503227 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-common-functions
134 05:46:28.503349 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-echo-ipv4
135 05:46:28.503473 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-install-packages
136 05:46:28.503594 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-installed-packages
137 05:46:28.503713 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-os-build
138 05:46:28.503833 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-probe-channel
139 05:46:28.503953 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-probe-ip
140 05:46:28.504072 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-target-ip
141 05:46:28.504193 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-target-mac
142 05:46:28.504312 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-target-storage
143 05:46:28.504433 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-case
144 05:46:28.504555 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-event
145 05:46:28.504673 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-feedback
146 05:46:28.504792 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-raise
147 05:46:28.504911 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-reference
148 05:46:28.505031 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-runner
149 05:46:28.505159 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-set
150 05:46:28.505278 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-test-shell
151 05:46:28.505399 Updating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-install-packages (oe)
152 05:46:28.505523 Updating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/bin/lava-installed-packages (oe)
153 05:46:28.505629 Creating /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/environment
154 05:46:28.505722 LAVA metadata
155 05:46:28.505794 - LAVA_JOB_ID=7096694
156 05:46:28.505865 - LAVA_DISPATCHER_IP=192.168.201.1
157 05:46:28.505972 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 05:46:28.506044 skipped lava-vland-overlay
159 05:46:28.506128 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 05:46:28.506216 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 05:46:28.506285 skipped lava-multinode-overlay
162 05:46:28.506366 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 05:46:28.506456 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 05:46:28.506535 Loading test definitions
165 05:46:28.506633 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 05:46:28.506715 Using /lava-7096694 at stage 0
167 05:46:28.506823 Fetching tests from https://github.com/kernelci/test-definitions
168 05:46:28.506911 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/0/tests/0_ltp-ipc'
169 05:46:31.555202 Running '/usr/bin/git checkout kernelci.org
170 05:46:31.703735 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 05:46:31.704564 uuid=7096694_1.5.2.3.1 testdef=None
172 05:46:31.704747 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 05:46:31.705043 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 05:46:31.705920 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 05:46:31.706196 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 05:46:31.707290 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 05:46:31.707590 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 05:46:31.708638 runner path: /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/0/tests/0_ltp-ipc test_uuid 7096694_1.5.2.3.1
182 05:46:31.708750 SKIPFILE='skipfile-lkft.yaml'
183 05:46:31.708827 SKIP_INSTALL='true'
184 05:46:31.708903 TST_CMDFILES='ipc'
185 05:46:31.709077 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 05:46:31.709340 Creating lava-test-runner.conf files
188 05:46:31.709418 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096694/lava-overlay-lpeyooty/lava-7096694/0 for stage 0
189 05:46:31.709518 - 0_ltp-ipc
190 05:46:31.709634 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 05:46:31.709745 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 05:46:39.726460 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 05:46:39.726632 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 05:46:39.726743 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 05:46:39.726854 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 05:46:39.726958 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 05:46:39.839942 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 05:46:39.840315 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 05:46:39.840444 extracting modules file /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096694/extract-nfsrootfs-6kr2y5lp
200 05:46:39.844948 extracting modules file /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096694/extract-overlay-ramdisk-kmwaa9ic/ramdisk
201 05:46:39.849042 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 05:46:39.849173 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 05:46:39.849277 [common] Applying overlay to NFS
204 05:46:39.849361 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096694/compress-overlay-5whyi083/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096694/extract-nfsrootfs-6kr2y5lp
205 05:46:40.337602 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 05:46:40.337779 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 05:46:40.337886 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 05:46:40.337986 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 05:46:40.338079 Building ramdisk /var/lib/lava/dispatcher/tmp/7096694/extract-overlay-ramdisk-kmwaa9ic/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096694/extract-overlay-ramdisk-kmwaa9ic/ramdisk
210 05:46:40.375260 >> 24662 blocks
211 05:46:40.896796 rename /var/lib/lava/dispatcher/tmp/7096694/extract-overlay-ramdisk-kmwaa9ic/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
212 05:46:40.897236 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 05:46:40.897378 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 05:46:40.897491 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 05:46:40.897601 No mkimage arch provided, not using FIT.
216 05:46:40.897707 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 05:46:40.897801 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 05:46:40.897920 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 05:46:40.898027 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 05:46:40.898114 No LXC device requested
221 05:46:40.898208 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 05:46:40.898308 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 05:46:40.898401 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 05:46:40.898476 Checking files for TFTP limit of 4294967296 bytes.
225 05:46:40.898890 end: 1 tftp-deploy (duration 00:00:22) [common]
226 05:46:40.899009 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 05:46:40.899118 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 05:46:40.899259 substitutions:
229 05:46:40.899337 - {DTB}: None
230 05:46:40.899412 - {INITRD}: 7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
231 05:46:40.899482 - {KERNEL}: 7096694/tftp-deploy-5jz_j5o4/kernel/bzImage
232 05:46:40.899549 - {LAVA_MAC}: None
233 05:46:40.899614 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096694/extract-nfsrootfs-6kr2y5lp
234 05:46:40.899678 - {NFS_SERVER_IP}: 192.168.201.1
235 05:46:40.899742 - {PRESEED_CONFIG}: None
236 05:46:40.899805 - {PRESEED_LOCAL}: None
237 05:46:40.899867 - {RAMDISK}: 7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
238 05:46:40.899930 - {ROOT_PART}: None
239 05:46:40.899994 - {ROOT}: None
240 05:46:40.900057 - {SERVER_IP}: 192.168.201.1
241 05:46:40.900119 - {TEE}: None
242 05:46:40.900184 Parsed boot commands:
243 05:46:40.900246 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 05:46:40.900416 Parsed boot commands: tftpboot 192.168.201.1 7096694/tftp-deploy-5jz_j5o4/kernel/bzImage 7096694/tftp-deploy-5jz_j5o4/kernel/cmdline 7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
245 05:46:40.900521 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 05:46:40.900621 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 05:46:40.900724 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 05:46:40.900820 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 05:46:40.900900 Not connected, no need to disconnect.
250 05:46:40.900989 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 05:46:40.901087 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 05:46:40.901165 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 05:46:40.904126 Setting prompt string to ['lava-test: # ']
254 05:46:40.904454 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 05:46:40.904574 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 05:46:40.904686 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 05:46:40.904789 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 05:46:40.904989 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 05:46:40.926067 >> Command sent successfully.
260 05:46:40.928303 Returned 0 in 0 seconds
261 05:46:41.029122 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 05:46:41.029475 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 05:46:41.029586 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 05:46:41.029684 Setting prompt string to 'Starting depthcharge on Helios...'
266 05:46:41.029761 Changing prompt to 'Starting depthcharge on Helios...'
267 05:46:41.029839 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 05:46:41.030139 [Enter `^Ec?' for help]
269 05:46:47.094976
270 05:46:47.095570
271 05:46:47.104131 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 05:46:47.107694 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 05:46:47.114189 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 05:46:47.117862 CPU: AES supported, TXT NOT supported, VT supported
275 05:46:47.124139 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 05:46:47.128213 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 05:46:47.133889 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 05:46:47.137536 VBOOT: Loading verstage.
279 05:46:47.140812 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 05:46:47.147408 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 05:46:47.153903 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 05:46:47.154368 CBFS @ c08000 size 3f8000
283 05:46:47.161147 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 05:46:47.163947 CBFS: Locating 'fallback/verstage'
285 05:46:47.166936 CBFS: Found @ offset 10fb80 size 1072c
286 05:46:47.171356
287 05:46:47.171800
288 05:46:47.181096 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 05:46:47.195331 Probing TPM: . done!
290 05:46:47.198803 TPM ready after 0 ms
291 05:46:47.202646 Connected to device vid:did:rid of 1ae0:0028:00
292 05:46:47.212541 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 05:46:47.215863 Initialized TPM device CR50 revision 0
294 05:46:47.261596 tlcl_send_startup: Startup return code is 0
295 05:46:47.261763 TPM: setup succeeded
296 05:46:47.275403 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 05:46:47.279196 Chrome EC: UHEPI supported
298 05:46:47.282037 Phase 1
299 05:46:47.285658 FMAP: area GBB found @ c05000 (12288 bytes)
300 05:46:47.292342 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 05:46:47.295400 Phase 2
302 05:46:47.295498 Phase 3
303 05:46:47.298982 FMAP: area GBB found @ c05000 (12288 bytes)
304 05:46:47.305963 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 05:46:47.312408 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 05:46:47.315683 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 05:46:47.322264 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 05:46:47.337941 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 05:46:47.341287 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 05:46:47.347988 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 05:46:47.352149 Phase 4
312 05:46:47.355236 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 05:46:47.361790 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 05:46:47.541966 VB2:vb2_rsa_verify_digest() Digest check failed!
315 05:46:47.545616 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 05:46:47.548549 Saving nvdata
317 05:46:47.551852 Reboot requested (10020007)
318 05:46:47.555066 board_reset() called!
319 05:46:47.555672 full_reset() called!
320 05:46:52.061557
321 05:46:52.061722
322 05:46:52.071389 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 05:46:52.074441 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 05:46:52.081038 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 05:46:52.084396 CPU: AES supported, TXT NOT supported, VT supported
326 05:46:52.090851 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 05:46:52.094611 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 05:46:52.100727 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 05:46:52.104252 VBOOT: Loading verstage.
330 05:46:52.107655 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 05:46:52.114019 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 05:46:52.120690 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 05:46:52.120786 CBFS @ c08000 size 3f8000
334 05:46:52.127552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 05:46:52.131516 CBFS: Locating 'fallback/verstage'
336 05:46:52.134431 CBFS: Found @ offset 10fb80 size 1072c
337 05:46:52.138006
338 05:46:52.138102
339 05:46:52.148289 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 05:46:52.162766 Probing TPM: . done!
341 05:46:52.165724 TPM ready after 0 ms
342 05:46:52.169300 Connected to device vid:did:rid of 1ae0:0028:00
343 05:46:52.179599 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 05:46:52.182706 Initialized TPM device CR50 revision 0
345 05:46:52.228371 tlcl_send_startup: Startup return code is 0
346 05:46:52.228475 TPM: setup succeeded
347 05:46:52.242714 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 05:46:52.246389 Chrome EC: UHEPI supported
349 05:46:52.249566 Phase 1
350 05:46:52.253580 FMAP: area GBB found @ c05000 (12288 bytes)
351 05:46:52.259914 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 05:46:52.266343 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 05:46:52.269558 Recovery requested (1009000e)
354 05:46:52.275076 Saving nvdata
355 05:46:52.281285 tlcl_extend: response is 0
356 05:46:52.290322 tlcl_extend: response is 0
357 05:46:52.297012 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 05:46:52.300790 CBFS @ c08000 size 3f8000
359 05:46:52.306919 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 05:46:52.310651 CBFS: Locating 'fallback/romstage'
361 05:46:52.313955 CBFS: Found @ offset 80 size 145fc
362 05:46:52.316875 Accumulated console time in verstage 98 ms
363 05:46:52.316972
364 05:46:52.317048
365 05:46:52.330256 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 05:46:52.336820 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 05:46:52.340531 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 05:46:52.343441 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 05:46:52.350259 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 05:46:52.353184 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 05:46:52.356903 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 05:46:52.360316 TCO_STS: 0000 0000
373 05:46:52.363405 GEN_PMCON: e0015238 00000200
374 05:46:52.366729 GBLRST_CAUSE: 00000000 00000000
375 05:46:52.366824 prev_sleep_state 5
376 05:46:52.370076 Boot Count incremented to 26689
377 05:46:52.376791 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 05:46:52.379916 CBFS @ c08000 size 3f8000
379 05:46:52.386870 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 05:46:52.386966 CBFS: Locating 'fspm.bin'
381 05:46:52.393209 CBFS: Found @ offset 5ffc0 size 71000
382 05:46:52.396925 Chrome EC: UHEPI supported
383 05:46:52.403029 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 05:46:52.406699 Probing TPM: done!
385 05:46:52.413470 Connected to device vid:did:rid of 1ae0:0028:00
386 05:46:52.423170 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 05:46:52.429788 Initialized TPM device CR50 revision 0
388 05:46:52.439838 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 05:46:52.445943 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 05:46:52.449542 MRC cache found, size 1948
391 05:46:52.452587 bootmode is set to: 2
392 05:46:52.456393 PRMRR disabled by config.
393 05:46:52.459247 SPD INDEX = 1
394 05:46:52.462266 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 05:46:52.466128 CBFS @ c08000 size 3f8000
396 05:46:52.472185 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 05:46:52.472271 CBFS: Locating 'spd.bin'
398 05:46:52.475974 CBFS: Found @ offset 5fb80 size 400
399 05:46:52.478940 SPD: module type is LPDDR3
400 05:46:52.482392 SPD: module part is
401 05:46:52.488986 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 05:46:52.491845 SPD: device width 4 bits, bus width 8 bits
403 05:46:52.495013 SPD: module size is 4096 MB (per channel)
404 05:46:52.498612 memory slot: 0 configuration done.
405 05:46:52.505542 memory slot: 2 configuration done.
406 05:46:52.553399 CBMEM:
407 05:46:52.557169 IMD: root @ 99fff000 254 entries.
408 05:46:52.560049 IMD: root @ 99ffec00 62 entries.
409 05:46:52.563513 External stage cache:
410 05:46:52.567209 IMD: root @ 9abff000 254 entries.
411 05:46:52.570294 IMD: root @ 9abfec00 62 entries.
412 05:46:52.573340 Chrome EC: clear events_b mask to 0x0000000020004000
413 05:46:52.590899 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 05:46:52.606088 tlcl_write: response is 0
415 05:46:52.615260 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 05:46:52.621869 MRC: TPM MRC hash updated successfully.
417 05:46:52.621965 2 DIMMs found
418 05:46:52.624968 SMM Memory Map
419 05:46:52.628685 SMRAM : 0x9a000000 0x1000000
420 05:46:52.631913 Subregion 0: 0x9a000000 0xa00000
421 05:46:52.635285 Subregion 1: 0x9aa00000 0x200000
422 05:46:52.638465 Subregion 2: 0x9ac00000 0x400000
423 05:46:52.642171 top_of_ram = 0x9a000000
424 05:46:52.645335 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 05:46:52.652047 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 05:46:52.655021 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 05:46:52.661848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 05:46:52.664823 CBFS @ c08000 size 3f8000
429 05:46:52.668483 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 05:46:52.671485 CBFS: Locating 'fallback/postcar'
431 05:46:52.677933 CBFS: Found @ offset 107000 size 4b44
432 05:46:52.681838 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 05:46:52.693962 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 05:46:52.696909 Processing 180 relocs. Offset value of 0x97c0c000
435 05:46:52.705507 Accumulated console time in romstage 286 ms
436 05:46:52.705602
437 05:46:52.705678
438 05:46:52.715366 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 05:46:52.722055 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 05:46:52.725290 CBFS @ c08000 size 3f8000
441 05:46:52.732101 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 05:46:52.735013 CBFS: Locating 'fallback/ramstage'
443 05:46:52.738748 CBFS: Found @ offset 43380 size 1b9e8
444 05:46:52.745002 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 05:46:52.777598 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 05:46:52.780688 Processing 3976 relocs. Offset value of 0x98db0000
447 05:46:52.787351 Accumulated console time in postcar 52 ms
448 05:46:52.787447
449 05:46:52.787522
450 05:46:52.797029 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 05:46:52.803821 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 05:46:52.807426 WARNING: RO_VPD is uninitialized or empty.
453 05:46:52.810666 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 05:46:52.817199 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 05:46:52.817295 Normal boot.
456 05:46:52.824150 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 05:46:52.827038 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 05:46:52.830918 CBFS @ c08000 size 3f8000
459 05:46:52.836997 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 05:46:52.840825 CBFS: Locating 'cpu_microcode_blob.bin'
461 05:46:52.843836 CBFS: Found @ offset 14700 size 2ec00
462 05:46:52.847023 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 05:46:52.850674 Skip microcode update
464 05:46:52.853757 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 05:46:52.857298 CBFS @ c08000 size 3f8000
466 05:46:52.863459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 05:46:52.867231 CBFS: Locating 'fsps.bin'
468 05:46:52.870203 CBFS: Found @ offset d1fc0 size 35000
469 05:46:52.895609 Detected 4 core, 8 thread CPU.
470 05:46:52.898668 Setting up SMI for CPU
471 05:46:52.902267 IED base = 0x9ac00000
472 05:46:52.902361 IED size = 0x00400000
473 05:46:52.905267 Will perform SMM setup.
474 05:46:52.911768 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 05:46:52.918887 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 05:46:52.921947 Processing 16 relocs. Offset value of 0x00030000
477 05:46:52.925577 Attempting to start 7 APs
478 05:46:52.928684 Waiting for 10ms after sending INIT.
479 05:46:52.945234 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
480 05:46:52.945330 done.
481 05:46:52.948444 AP: slot 6 apic_id 6.
482 05:46:52.952097 AP: slot 7 apic_id 7.
483 05:46:52.952192 AP: slot 4 apic_id 4.
484 05:46:52.955292 AP: slot 2 apic_id 5.
485 05:46:52.958346 AP: slot 1 apic_id 2.
486 05:46:52.958441 AP: slot 3 apic_id 3.
487 05:46:52.964927 Waiting for 2nd SIPI to complete...done.
488 05:46:52.971629 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 05:46:52.978535 Processing 13 relocs. Offset value of 0x00038000
490 05:46:52.981570 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 05:46:52.988194 Installing SMM handler to 0x9a000000
492 05:46:52.995047 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 05:46:53.001635 Processing 658 relocs. Offset value of 0x9a010000
494 05:46:53.008205 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 05:46:53.011262 Processing 13 relocs. Offset value of 0x9a008000
496 05:46:53.017905 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 05:46:53.024568 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 05:46:53.031217 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 05:46:53.034469 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 05:46:53.041663 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 05:46:53.047635 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 05:46:53.051305 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 05:46:53.057531 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 05:46:53.061174 Clearing SMI status registers
505 05:46:53.064765 SMI_STS: PM1
506 05:46:53.064860 PM1_STS: PWRBTN
507 05:46:53.067868 TCO_STS: SECOND_TO
508 05:46:53.071466 New SMBASE 0x9a000000
509 05:46:53.074480 In relocation handler: CPU 0
510 05:46:53.077578 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 05:46:53.081013 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 05:46:53.084484 Relocation complete.
513 05:46:53.087686 New SMBASE 0x99ffec00
514 05:46:53.091198 In relocation handler: CPU 5
515 05:46:53.094331 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
516 05:46:53.097401 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 05:46:53.101028 Relocation complete.
518 05:46:53.104598 New SMBASE 0x99fff000
519 05:46:53.104695 In relocation handler: CPU 4
520 05:46:53.111236 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
521 05:46:53.114379 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 05:46:53.117616 Relocation complete.
523 05:46:53.117712 New SMBASE 0x99fff800
524 05:46:53.121181 In relocation handler: CPU 2
525 05:46:53.127567 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
526 05:46:53.131026 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 05:46:53.134186 Relocation complete.
528 05:46:53.134283 New SMBASE 0x99fffc00
529 05:46:53.137872 In relocation handler: CPU 1
530 05:46:53.143934 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
531 05:46:53.147669 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 05:46:53.150917 Relocation complete.
533 05:46:53.151014 New SMBASE 0x99fff400
534 05:46:53.153875 In relocation handler: CPU 3
535 05:46:53.157595 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
536 05:46:53.164452 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 05:46:53.167157 Relocation complete.
538 05:46:53.167253 New SMBASE 0x99ffe800
539 05:46:53.170901 In relocation handler: CPU 6
540 05:46:53.173846 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
541 05:46:53.180540 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 05:46:53.184025 Relocation complete.
543 05:46:53.184122 New SMBASE 0x99ffe400
544 05:46:53.187001 In relocation handler: CPU 7
545 05:46:53.190431 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
546 05:46:53.197085 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 05:46:53.197184 Relocation complete.
548 05:46:53.200263 Initializing CPU #0
549 05:46:53.203834 CPU: vendor Intel device 806ec
550 05:46:53.207093 CPU: family 06, model 8e, stepping 0c
551 05:46:53.210543 Clearing out pending MCEs
552 05:46:53.213565 Setting up local APIC...
553 05:46:53.213661 apic_id: 0x00 done.
554 05:46:53.217009 Turbo is available but hidden
555 05:46:53.220166 Turbo is available and visible
556 05:46:53.223898 VMX status: enabled
557 05:46:53.226942 IA32_FEATURE_CONTROL status: locked
558 05:46:53.230549 Skip microcode update
559 05:46:53.230646 CPU #0 initialized
560 05:46:53.233670 Initializing CPU #5
561 05:46:53.236806 Initializing CPU #6
562 05:46:53.236902 Initializing CPU #7
563 05:46:53.240498 CPU: vendor Intel device 806ec
564 05:46:53.243629 CPU: family 06, model 8e, stepping 0c
565 05:46:53.247095 CPU: vendor Intel device 806ec
566 05:46:53.250276 CPU: family 06, model 8e, stepping 0c
567 05:46:53.253609 Initializing CPU #1
568 05:46:53.256542 Initializing CPU #3
569 05:46:53.260296 CPU: vendor Intel device 806ec
570 05:46:53.263273 CPU: family 06, model 8e, stepping 0c
571 05:46:53.266897 CPU: vendor Intel device 806ec
572 05:46:53.270085 CPU: family 06, model 8e, stepping 0c
573 05:46:53.273102 Clearing out pending MCEs
574 05:46:53.273198 Clearing out pending MCEs
575 05:46:53.276798 Setting up local APIC...
576 05:46:53.279793 CPU: vendor Intel device 806ec
577 05:46:53.283423 CPU: family 06, model 8e, stepping 0c
578 05:46:53.286829 Clearing out pending MCEs
579 05:46:53.289741 Clearing out pending MCEs
580 05:46:53.293254 Clearing out pending MCEs
581 05:46:53.293350 Setting up local APIC...
582 05:46:53.296260 Setting up local APIC...
583 05:46:53.300004 Initializing CPU #4
584 05:46:53.300100 Initializing CPU #2
585 05:46:53.303038 CPU: vendor Intel device 806ec
586 05:46:53.306190 CPU: family 06, model 8e, stepping 0c
587 05:46:53.309797 Setting up local APIC...
588 05:46:53.313436 apic_id: 0x02 done.
589 05:46:53.313534 apic_id: 0x03 done.
590 05:46:53.316384 VMX status: enabled
591 05:46:53.319551 VMX status: enabled
592 05:46:53.322989 IA32_FEATURE_CONTROL status: locked
593 05:46:53.326164 IA32_FEATURE_CONTROL status: locked
594 05:46:53.329761 Skip microcode update
595 05:46:53.329858 Skip microcode update
596 05:46:53.333045 CPU #1 initialized
597 05:46:53.333149 CPU #3 initialized
598 05:46:53.335975 apic_id: 0x01 done.
599 05:46:53.339692 CPU: vendor Intel device 806ec
600 05:46:53.342749 CPU: family 06, model 8e, stepping 0c
601 05:46:53.346325 Clearing out pending MCEs
602 05:46:53.349392 Clearing out pending MCEs
603 05:46:53.349490 Setting up local APIC...
604 05:46:53.352571 VMX status: enabled
605 05:46:53.356317 Setting up local APIC...
606 05:46:53.359502 Setting up local APIC...
607 05:46:53.359600 apic_id: 0x04 done.
608 05:46:53.363190 apic_id: 0x05 done.
609 05:46:53.363288 VMX status: enabled
610 05:46:53.366306 VMX status: enabled
611 05:46:53.369434 IA32_FEATURE_CONTROL status: locked
612 05:46:53.372912 IA32_FEATURE_CONTROL status: locked
613 05:46:53.376055 Skip microcode update
614 05:46:53.379642 Skip microcode update
615 05:46:53.379742 CPU #4 initialized
616 05:46:53.382793 CPU #2 initialized
617 05:46:53.382878 apic_id: 0x06 done.
618 05:46:53.385954 apic_id: 0x07 done.
619 05:46:53.389633 VMX status: enabled
620 05:46:53.389725 VMX status: enabled
621 05:46:53.392658 IA32_FEATURE_CONTROL status: locked
622 05:46:53.399247 IA32_FEATURE_CONTROL status: locked
623 05:46:53.399340 Skip microcode update
624 05:46:53.402350 Skip microcode update
625 05:46:53.402439 CPU #6 initialized
626 05:46:53.406213 CPU #7 initialized
627 05:46:53.409170 IA32_FEATURE_CONTROL status: locked
628 05:46:53.412627 Skip microcode update
629 05:46:53.412736 CPU #5 initialized
630 05:46:53.418834 bsp_do_flight_plan done after 452 msecs.
631 05:46:53.422331 CPU: frequency set to 4200 MHz
632 05:46:53.422430 Enabling SMIs.
633 05:46:53.425838 Locking SMM.
634 05:46:53.439335 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 05:46:53.442352 CBFS @ c08000 size 3f8000
636 05:46:53.448981 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 05:46:53.449080 CBFS: Locating 'vbt.bin'
638 05:46:53.452185 CBFS: Found @ offset 5f5c0 size 499
639 05:46:53.459179 Found a VBT of 4608 bytes after decompression
640 05:46:53.642359 Display FSP Version Info HOB
641 05:46:53.645475 Reference Code - CPU = 9.0.1e.30
642 05:46:53.648442 uCode Version = 0.0.0.ca
643 05:46:53.651787 TXT ACM version = ff.ff.ff.ffff
644 05:46:53.655425 Display FSP Version Info HOB
645 05:46:53.658436 Reference Code - ME = 9.0.1e.30
646 05:46:53.662223 MEBx version = 0.0.0.0
647 05:46:53.665305 ME Firmware Version = Consumer SKU
648 05:46:53.668412 Display FSP Version Info HOB
649 05:46:53.672181 Reference Code - CML PCH = 9.0.1e.30
650 05:46:53.675124 PCH-CRID Status = Disabled
651 05:46:53.678962 PCH-CRID Original Value = ff.ff.ff.ffff
652 05:46:53.681774 PCH-CRID New Value = ff.ff.ff.ffff
653 05:46:53.685274 OPROM - RST - RAID = ff.ff.ff.ffff
654 05:46:53.688198 ChipsetInit Base Version = ff.ff.ff.ffff
655 05:46:53.691819 ChipsetInit Oem Version = ff.ff.ff.ffff
656 05:46:53.695207 Display FSP Version Info HOB
657 05:46:53.701900 Reference Code - SA - System Agent = 9.0.1e.30
658 05:46:53.704743 Reference Code - MRC = 0.7.1.6c
659 05:46:53.704830 SA - PCIe Version = 9.0.1e.30
660 05:46:53.708435 SA-CRID Status = Disabled
661 05:46:53.711637 SA-CRID Original Value = 0.0.0.c
662 05:46:53.715036 SA-CRID New Value = 0.0.0.c
663 05:46:53.718148 OPROM - VBIOS = ff.ff.ff.ffff
664 05:46:53.721221 RTC Init
665 05:46:53.724894 Set power on after power failure.
666 05:46:53.724986 Disabling Deep S3
667 05:46:53.727835 Disabling Deep S3
668 05:46:53.727920 Disabling Deep S4
669 05:46:53.731376 Disabling Deep S4
670 05:46:53.734583 Disabling Deep S5
671 05:46:53.734670 Disabling Deep S5
672 05:46:53.741199 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
673 05:46:53.741292 Enumerating buses...
674 05:46:53.748163 Show all devs... Before device enumeration.
675 05:46:53.751108 Root Device: enabled 1
676 05:46:53.751197 CPU_CLUSTER: 0: enabled 1
677 05:46:53.754335 DOMAIN: 0000: enabled 1
678 05:46:53.757707 APIC: 00: enabled 1
679 05:46:53.757794 PCI: 00:00.0: enabled 1
680 05:46:53.761472 PCI: 00:02.0: enabled 1
681 05:46:53.764603 PCI: 00:04.0: enabled 0
682 05:46:53.767659 PCI: 00:05.0: enabled 0
683 05:46:53.767745 PCI: 00:12.0: enabled 1
684 05:46:53.770933 PCI: 00:12.5: enabled 0
685 05:46:53.774659 PCI: 00:12.6: enabled 0
686 05:46:53.777564 PCI: 00:14.0: enabled 1
687 05:46:53.777656 PCI: 00:14.1: enabled 0
688 05:46:53.781275 PCI: 00:14.3: enabled 1
689 05:46:53.784343 PCI: 00:14.5: enabled 0
690 05:46:53.784432 PCI: 00:15.0: enabled 1
691 05:46:53.787352 PCI: 00:15.1: enabled 1
692 05:46:53.790934 PCI: 00:15.2: enabled 0
693 05:46:53.794138 PCI: 00:15.3: enabled 0
694 05:46:53.794218 PCI: 00:16.0: enabled 1
695 05:46:53.797414 PCI: 00:16.1: enabled 0
696 05:46:53.800978 PCI: 00:16.2: enabled 0
697 05:46:53.804081 PCI: 00:16.3: enabled 0
698 05:46:53.804173 PCI: 00:16.4: enabled 0
699 05:46:53.807286 PCI: 00:16.5: enabled 0
700 05:46:53.810938 PCI: 00:17.0: enabled 1
701 05:46:53.813912 PCI: 00:19.0: enabled 1
702 05:46:53.814019 PCI: 00:19.1: enabled 0
703 05:46:53.817543 PCI: 00:19.2: enabled 0
704 05:46:53.820714 PCI: 00:1a.0: enabled 0
705 05:46:53.820811 PCI: 00:1c.0: enabled 0
706 05:46:53.823860 PCI: 00:1c.1: enabled 0
707 05:46:53.827343 PCI: 00:1c.2: enabled 0
708 05:46:53.830851 PCI: 00:1c.3: enabled 0
709 05:46:53.830948 PCI: 00:1c.4: enabled 0
710 05:46:53.833820 PCI: 00:1c.5: enabled 0
711 05:46:53.837610 PCI: 00:1c.6: enabled 0
712 05:46:53.840556 PCI: 00:1c.7: enabled 0
713 05:46:53.840653 PCI: 00:1d.0: enabled 1
714 05:46:53.843851 PCI: 00:1d.1: enabled 0
715 05:46:53.847381 PCI: 00:1d.2: enabled 0
716 05:46:53.850532 PCI: 00:1d.3: enabled 0
717 05:46:53.850629 PCI: 00:1d.4: enabled 0
718 05:46:53.854311 PCI: 00:1d.5: enabled 1
719 05:46:53.857225 PCI: 00:1e.0: enabled 1
720 05:46:53.857322 PCI: 00:1e.1: enabled 0
721 05:46:53.860260 PCI: 00:1e.2: enabled 1
722 05:46:53.864067 PCI: 00:1e.3: enabled 1
723 05:46:53.867137 PCI: 00:1f.0: enabled 1
724 05:46:53.867234 PCI: 00:1f.1: enabled 1
725 05:46:53.870369 PCI: 00:1f.2: enabled 1
726 05:46:53.873950 PCI: 00:1f.3: enabled 1
727 05:46:53.876958 PCI: 00:1f.4: enabled 1
728 05:46:53.877055 PCI: 00:1f.5: enabled 1
729 05:46:53.880435 PCI: 00:1f.6: enabled 0
730 05:46:53.883728 USB0 port 0: enabled 1
731 05:46:53.883824 I2C: 00:15: enabled 1
732 05:46:53.886817 I2C: 00:5d: enabled 1
733 05:46:53.890272 GENERIC: 0.0: enabled 1
734 05:46:53.893330 I2C: 00:1a: enabled 1
735 05:46:53.893431 I2C: 00:38: enabled 1
736 05:46:53.897029 I2C: 00:39: enabled 1
737 05:46:53.900163 I2C: 00:3a: enabled 1
738 05:46:53.900260 I2C: 00:3b: enabled 1
739 05:46:53.903426 PCI: 00:00.0: enabled 1
740 05:46:53.906897 SPI: 00: enabled 1
741 05:46:53.906994 SPI: 01: enabled 1
742 05:46:53.910188 PNP: 0c09.0: enabled 1
743 05:46:53.913254 USB2 port 0: enabled 1
744 05:46:53.913351 USB2 port 1: enabled 1
745 05:46:53.916841 USB2 port 2: enabled 0
746 05:46:53.919877 USB2 port 3: enabled 0
747 05:46:53.919975 USB2 port 5: enabled 0
748 05:46:53.923596 USB2 port 6: enabled 1
749 05:46:53.926636 USB2 port 9: enabled 1
750 05:46:53.930017 USB3 port 0: enabled 1
751 05:46:53.930119 USB3 port 1: enabled 1
752 05:46:53.933025 USB3 port 2: enabled 1
753 05:46:53.936610 USB3 port 3: enabled 1
754 05:46:53.936706 USB3 port 4: enabled 0
755 05:46:53.939666 APIC: 02: enabled 1
756 05:46:53.943391 APIC: 05: enabled 1
757 05:46:53.943489 APIC: 03: enabled 1
758 05:46:53.946452 APIC: 04: enabled 1
759 05:46:53.946550 APIC: 01: enabled 1
760 05:46:53.949601 APIC: 06: enabled 1
761 05:46:53.953470 APIC: 07: enabled 1
762 05:46:53.953567 Compare with tree...
763 05:46:53.956536 Root Device: enabled 1
764 05:46:53.960057 CPU_CLUSTER: 0: enabled 1
765 05:46:53.963144 APIC: 00: enabled 1
766 05:46:53.963240 APIC: 02: enabled 1
767 05:46:53.966135 APIC: 05: enabled 1
768 05:46:53.970137 APIC: 03: enabled 1
769 05:46:53.970233 APIC: 04: enabled 1
770 05:46:53.972986 APIC: 01: enabled 1
771 05:46:53.976186 APIC: 06: enabled 1
772 05:46:53.976283 APIC: 07: enabled 1
773 05:46:53.979956 DOMAIN: 0000: enabled 1
774 05:46:53.982861 PCI: 00:00.0: enabled 1
775 05:46:53.986422 PCI: 00:02.0: enabled 1
776 05:46:53.986519 PCI: 00:04.0: enabled 0
777 05:46:53.989475 PCI: 00:05.0: enabled 0
778 05:46:53.993019 PCI: 00:12.0: enabled 1
779 05:46:53.996072 PCI: 00:12.5: enabled 0
780 05:46:53.999161 PCI: 00:12.6: enabled 0
781 05:46:53.999258 PCI: 00:14.0: enabled 1
782 05:46:54.002554 USB0 port 0: enabled 1
783 05:46:54.005959 USB2 port 0: enabled 1
784 05:46:54.009087 USB2 port 1: enabled 1
785 05:46:54.012688 USB2 port 2: enabled 0
786 05:46:54.012795 USB2 port 3: enabled 0
787 05:46:54.015746 USB2 port 5: enabled 0
788 05:46:54.019681 USB2 port 6: enabled 1
789 05:46:54.022484 USB2 port 9: enabled 1
790 05:46:54.026230 USB3 port 0: enabled 1
791 05:46:54.029227 USB3 port 1: enabled 1
792 05:46:54.029325 USB3 port 2: enabled 1
793 05:46:54.032156 USB3 port 3: enabled 1
794 05:46:54.035682 USB3 port 4: enabled 0
795 05:46:54.039448 PCI: 00:14.1: enabled 0
796 05:46:54.042304 PCI: 00:14.3: enabled 1
797 05:46:54.042401 PCI: 00:14.5: enabled 0
798 05:46:54.045667 PCI: 00:15.0: enabled 1
799 05:46:54.048815 I2C: 00:15: enabled 1
800 05:46:54.052193 PCI: 00:15.1: enabled 1
801 05:46:54.055771 I2C: 00:5d: enabled 1
802 05:46:54.055868 GENERIC: 0.0: enabled 1
803 05:46:54.058889 PCI: 00:15.2: enabled 0
804 05:46:54.062535 PCI: 00:15.3: enabled 0
805 05:46:54.065639 PCI: 00:16.0: enabled 1
806 05:46:54.068819 PCI: 00:16.1: enabled 0
807 05:46:54.068915 PCI: 00:16.2: enabled 0
808 05:46:54.072508 PCI: 00:16.3: enabled 0
809 05:46:54.075640 PCI: 00:16.4: enabled 0
810 05:46:54.078826 PCI: 00:16.5: enabled 0
811 05:46:54.081843 PCI: 00:17.0: enabled 1
812 05:46:54.081940 PCI: 00:19.0: enabled 1
813 05:46:54.085370 I2C: 00:1a: enabled 1
814 05:46:54.088552 I2C: 00:38: enabled 1
815 05:46:54.092173 I2C: 00:39: enabled 1
816 05:46:54.092272 I2C: 00:3a: enabled 1
817 05:46:54.095066 I2C: 00:3b: enabled 1
818 05:46:54.098727 PCI: 00:19.1: enabled 0
819 05:46:54.101750 PCI: 00:19.2: enabled 0
820 05:46:54.105430 PCI: 00:1a.0: enabled 0
821 05:46:54.105524 PCI: 00:1c.0: enabled 0
822 05:46:54.108533 PCI: 00:1c.1: enabled 0
823 05:46:54.112152 PCI: 00:1c.2: enabled 0
824 05:46:54.115466 PCI: 00:1c.3: enabled 0
825 05:46:54.115561 PCI: 00:1c.4: enabled 0
826 05:46:54.118496 PCI: 00:1c.5: enabled 0
827 05:46:54.122025 PCI: 00:1c.6: enabled 0
828 05:46:54.125006 PCI: 00:1c.7: enabled 0
829 05:46:54.128586 PCI: 00:1d.0: enabled 1
830 05:46:54.128695 PCI: 00:1d.1: enabled 0
831 05:46:54.131694 PCI: 00:1d.2: enabled 0
832 05:46:54.134812 PCI: 00:1d.3: enabled 0
833 05:46:54.138298 PCI: 00:1d.4: enabled 0
834 05:46:54.141411 PCI: 00:1d.5: enabled 1
835 05:46:54.141506 PCI: 00:00.0: enabled 1
836 05:46:54.145051 PCI: 00:1e.0: enabled 1
837 05:46:54.147973 PCI: 00:1e.1: enabled 0
838 05:46:54.151722 PCI: 00:1e.2: enabled 1
839 05:46:54.154919 SPI: 00: enabled 1
840 05:46:54.155014 PCI: 00:1e.3: enabled 1
841 05:46:54.157882 SPI: 01: enabled 1
842 05:46:54.161741 PCI: 00:1f.0: enabled 1
843 05:46:54.164586 PNP: 0c09.0: enabled 1
844 05:46:54.164681 PCI: 00:1f.1: enabled 1
845 05:46:54.168236 PCI: 00:1f.2: enabled 1
846 05:46:54.171658 PCI: 00:1f.3: enabled 1
847 05:46:54.174481 PCI: 00:1f.4: enabled 1
848 05:46:54.178251 PCI: 00:1f.5: enabled 1
849 05:46:54.178346 PCI: 00:1f.6: enabled 0
850 05:46:54.181274 Root Device scanning...
851 05:46:54.184343 scan_static_bus for Root Device
852 05:46:54.187980 CPU_CLUSTER: 0 enabled
853 05:46:54.191093 DOMAIN: 0000 enabled
854 05:46:54.191188 DOMAIN: 0000 scanning...
855 05:46:54.194736 PCI: pci_scan_bus for bus 00
856 05:46:54.197888 PCI: 00:00.0 [8086/0000] ops
857 05:46:54.200975 PCI: 00:00.0 [8086/9b61] enabled
858 05:46:54.204605 PCI: 00:02.0 [8086/0000] bus ops
859 05:46:54.208131 PCI: 00:02.0 [8086/9b41] enabled
860 05:46:54.210963 PCI: 00:04.0 [8086/1903] disabled
861 05:46:54.214167 PCI: 00:08.0 [8086/1911] enabled
862 05:46:54.217890 PCI: 00:12.0 [8086/02f9] enabled
863 05:46:54.220862 PCI: 00:14.0 [8086/0000] bus ops
864 05:46:54.224618 PCI: 00:14.0 [8086/02ed] enabled
865 05:46:54.227597 PCI: 00:14.2 [8086/02ef] enabled
866 05:46:54.230993 PCI: 00:14.3 [8086/02f0] enabled
867 05:46:54.234046 PCI: 00:15.0 [8086/0000] bus ops
868 05:46:54.237677 PCI: 00:15.0 [8086/02e8] enabled
869 05:46:54.240721 PCI: 00:15.1 [8086/0000] bus ops
870 05:46:54.244449 PCI: 00:15.1 [8086/02e9] enabled
871 05:46:54.247532 PCI: 00:16.0 [8086/0000] ops
872 05:46:54.250983 PCI: 00:16.0 [8086/02e0] enabled
873 05:46:54.253988 PCI: 00:17.0 [8086/0000] ops
874 05:46:54.257655 PCI: 00:17.0 [8086/02d3] enabled
875 05:46:54.260778 PCI: 00:19.0 [8086/0000] bus ops
876 05:46:54.264419 PCI: 00:19.0 [8086/02c5] enabled
877 05:46:54.267442 PCI: 00:1d.0 [8086/0000] bus ops
878 05:46:54.270529 PCI: 00:1d.0 [8086/02b0] enabled
879 05:46:54.277221 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 05:46:54.280432 PCI: 00:1e.0 [8086/0000] ops
881 05:46:54.284059 PCI: 00:1e.0 [8086/02a8] enabled
882 05:46:54.287187 PCI: 00:1e.2 [8086/0000] bus ops
883 05:46:54.290286 PCI: 00:1e.2 [8086/02aa] enabled
884 05:46:54.293928 PCI: 00:1e.3 [8086/0000] bus ops
885 05:46:54.296974 PCI: 00:1e.3 [8086/02ab] enabled
886 05:46:54.300538 PCI: 00:1f.0 [8086/0000] bus ops
887 05:46:54.303754 PCI: 00:1f.0 [8086/0284] enabled
888 05:46:54.306665 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 05:46:54.313216 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 05:46:54.316838 PCI: 00:1f.3 [8086/0000] bus ops
891 05:46:54.319951 PCI: 00:1f.3 [8086/02c8] enabled
892 05:46:54.323568 PCI: 00:1f.4 [8086/0000] bus ops
893 05:46:54.326658 PCI: 00:1f.4 [8086/02a3] enabled
894 05:46:54.330184 PCI: 00:1f.5 [8086/0000] bus ops
895 05:46:54.333125 PCI: 00:1f.5 [8086/02a4] enabled
896 05:46:54.336312 PCI: Leftover static devices:
897 05:46:54.340037 PCI: 00:05.0
898 05:46:54.340132 PCI: 00:12.5
899 05:46:54.340207 PCI: 00:12.6
900 05:46:54.343414 PCI: 00:14.1
901 05:46:54.343510 PCI: 00:14.5
902 05:46:54.346491 PCI: 00:15.2
903 05:46:54.346587 PCI: 00:15.3
904 05:46:54.346663 PCI: 00:16.1
905 05:46:54.350213 PCI: 00:16.2
906 05:46:54.350308 PCI: 00:16.3
907 05:46:54.353507 PCI: 00:16.4
908 05:46:54.353602 PCI: 00:16.5
909 05:46:54.353679 PCI: 00:19.1
910 05:46:54.356757 PCI: 00:19.2
911 05:46:54.356852 PCI: 00:1a.0
912 05:46:54.359889 PCI: 00:1c.0
913 05:46:54.359984 PCI: 00:1c.1
914 05:46:54.360060 PCI: 00:1c.2
915 05:46:54.363452 PCI: 00:1c.3
916 05:46:54.363548 PCI: 00:1c.4
917 05:46:54.366449 PCI: 00:1c.5
918 05:46:54.366545 PCI: 00:1c.6
919 05:46:54.370146 PCI: 00:1c.7
920 05:46:54.370242 PCI: 00:1d.1
921 05:46:54.370319 PCI: 00:1d.2
922 05:46:54.373147 PCI: 00:1d.3
923 05:46:54.373242 PCI: 00:1d.4
924 05:46:54.376481 PCI: 00:1d.5
925 05:46:54.376578 PCI: 00:1e.1
926 05:46:54.376653 PCI: 00:1f.1
927 05:46:54.379555 PCI: 00:1f.2
928 05:46:54.379650 PCI: 00:1f.6
929 05:46:54.383186 PCI: Check your devicetree.cb.
930 05:46:54.386437 PCI: 00:02.0 scanning...
931 05:46:54.389654 scan_generic_bus for PCI: 00:02.0
932 05:46:54.393114 scan_generic_bus for PCI: 00:02.0 done
933 05:46:54.399278 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
934 05:46:54.402809 PCI: 00:14.0 scanning...
935 05:46:54.405943 scan_static_bus for PCI: 00:14.0
936 05:46:54.406038 USB0 port 0 enabled
937 05:46:54.409601 USB0 port 0 scanning...
938 05:46:54.412601 scan_static_bus for USB0 port 0
939 05:46:54.416029 USB2 port 0 enabled
940 05:46:54.416126 USB2 port 1 enabled
941 05:46:54.419663 USB2 port 2 disabled
942 05:46:54.422621 USB2 port 3 disabled
943 05:46:54.422716 USB2 port 5 disabled
944 05:46:54.425784 USB2 port 6 enabled
945 05:46:54.429411 USB2 port 9 enabled
946 05:46:54.429506 USB3 port 0 enabled
947 05:46:54.432901 USB3 port 1 enabled
948 05:46:54.432996 USB3 port 2 enabled
949 05:46:54.436057 USB3 port 3 enabled
950 05:46:54.439144 USB3 port 4 disabled
951 05:46:54.439239 USB2 port 0 scanning...
952 05:46:54.442836 scan_static_bus for USB2 port 0
953 05:46:54.449329 scan_static_bus for USB2 port 0 done
954 05:46:54.452947 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
955 05:46:54.455989 USB2 port 1 scanning...
956 05:46:54.459638 scan_static_bus for USB2 port 1
957 05:46:54.462824 scan_static_bus for USB2 port 1 done
958 05:46:54.469453 scan_bus: scanning of bus USB2 port 1 took 9694 usecs
959 05:46:54.469554 USB2 port 6 scanning...
960 05:46:54.472955 scan_static_bus for USB2 port 6
961 05:46:54.479553 scan_static_bus for USB2 port 6 done
962 05:46:54.482733 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
963 05:46:54.485906 USB2 port 9 scanning...
964 05:46:54.489689 scan_static_bus for USB2 port 9
965 05:46:54.492854 scan_static_bus for USB2 port 9 done
966 05:46:54.499400 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
967 05:46:54.499495 USB3 port 0 scanning...
968 05:46:54.502952 scan_static_bus for USB3 port 0
969 05:46:54.509548 scan_static_bus for USB3 port 0 done
970 05:46:54.512983 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
971 05:46:54.515742 USB3 port 1 scanning...
972 05:46:54.519496 scan_static_bus for USB3 port 1
973 05:46:54.522570 scan_static_bus for USB3 port 1 done
974 05:46:54.529311 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
975 05:46:54.529408 USB3 port 2 scanning...
976 05:46:54.532988 scan_static_bus for USB3 port 2
977 05:46:54.539607 scan_static_bus for USB3 port 2 done
978 05:46:54.542672 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
979 05:46:54.546162 USB3 port 3 scanning...
980 05:46:54.549207 scan_static_bus for USB3 port 3
981 05:46:54.552901 scan_static_bus for USB3 port 3 done
982 05:46:54.559141 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
983 05:46:54.562705 scan_static_bus for USB0 port 0 done
984 05:46:54.565850 scan_bus: scanning of bus USB0 port 0 took 155335 usecs
985 05:46:54.572703 scan_static_bus for PCI: 00:14.0 done
986 05:46:54.575633 scan_bus: scanning of bus PCI: 00:14.0 took 172954 usecs
987 05:46:54.579413 PCI: 00:15.0 scanning...
988 05:46:54.582545 scan_generic_bus for PCI: 00:15.0
989 05:46:54.585742 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 05:46:54.592665 scan_generic_bus for PCI: 00:15.0 done
991 05:46:54.596130 scan_bus: scanning of bus PCI: 00:15.0 took 14285 usecs
992 05:46:54.599289 PCI: 00:15.1 scanning...
993 05:46:54.602411 scan_generic_bus for PCI: 00:15.1
994 05:46:54.605838 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 05:46:54.612514 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 05:46:54.615902 scan_generic_bus for PCI: 00:15.1 done
997 05:46:54.622288 scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
998 05:46:54.622386 PCI: 00:19.0 scanning...
999 05:46:54.626077 scan_generic_bus for PCI: 00:19.0
1000 05:46:54.632483 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 05:46:54.635973 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 05:46:54.638837 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 05:46:54.642056 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 05:46:54.648725 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 05:46:54.652293 scan_generic_bus for PCI: 00:19.0 done
1006 05:46:54.655313 scan_bus: scanning of bus PCI: 00:19.0 took 30711 usecs
1007 05:46:54.658871 PCI: 00:1d.0 scanning...
1008 05:46:54.662659 do_pci_scan_bridge for PCI: 00:1d.0
1009 05:46:54.665742 PCI: pci_scan_bus for bus 01
1010 05:46:54.669477 PCI: 01:00.0 [1c5c/1327] enabled
1011 05:46:54.672704 Enabling Common Clock Configuration
1012 05:46:54.679418 L1 Sub-State supported from root port 29
1013 05:46:54.679853 L1 Sub-State Support = 0xf
1014 05:46:54.682516 CommonModeRestoreTime = 0x28
1015 05:46:54.689405 Power On Value = 0x16, Power On Scale = 0x0
1016 05:46:54.689849 ASPM: Enabled L1
1017 05:46:54.695518 scan_bus: scanning of bus PCI: 00:1d.0 took 32769 usecs
1018 05:46:54.698769 PCI: 00:1e.2 scanning...
1019 05:46:54.701919 scan_generic_bus for PCI: 00:1e.2
1020 05:46:54.705096 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 05:46:54.708530 scan_generic_bus for PCI: 00:1e.2 done
1022 05:46:54.715180 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1023 05:46:54.718650 PCI: 00:1e.3 scanning...
1024 05:46:54.721854 scan_generic_bus for PCI: 00:1e.3
1025 05:46:54.725049 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 05:46:54.728667 scan_generic_bus for PCI: 00:1e.3 done
1027 05:46:54.734709 scan_bus: scanning of bus PCI: 00:1e.3 took 13991 usecs
1028 05:46:54.734807 PCI: 00:1f.0 scanning...
1029 05:46:54.738363 scan_static_bus for PCI: 00:1f.0
1030 05:46:54.741971 PNP: 0c09.0 enabled
1031 05:46:54.745001 scan_static_bus for PCI: 00:1f.0 done
1032 05:46:54.751531 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1033 05:46:54.755276 PCI: 00:1f.3 scanning...
1034 05:46:54.758346 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1035 05:46:54.761979 PCI: 00:1f.4 scanning...
1036 05:46:54.764866 scan_generic_bus for PCI: 00:1f.4
1037 05:46:54.768605 scan_generic_bus for PCI: 00:1f.4 done
1038 05:46:54.774526 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1039 05:46:54.778621 PCI: 00:1f.5 scanning...
1040 05:46:54.781352 scan_generic_bus for PCI: 00:1f.5
1041 05:46:54.785573 scan_generic_bus for PCI: 00:1f.5 done
1042 05:46:54.791754 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1043 05:46:54.798304 scan_bus: scanning of bus DOMAIN: 0000 took 604789 usecs
1044 05:46:54.801403 scan_static_bus for Root Device done
1045 05:46:54.804946 scan_bus: scanning of bus Root Device took 624660 usecs
1046 05:46:54.807998 done
1047 05:46:54.811397 Chrome EC: UHEPI supported
1048 05:46:54.814468 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 05:46:54.821295 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 05:46:54.827977 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 05:46:54.834702 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 05:46:54.838347 SPI flash protection: WPSW=0 SRP0=0
1053 05:46:54.844477 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 05:46:54.848211 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1055 05:46:54.851234 found VGA at PCI: 00:02.0
1056 05:46:54.854634 Setting up VGA for PCI: 00:02.0
1057 05:46:54.861358 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 05:46:54.864325 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 05:46:54.867632 Allocating resources...
1060 05:46:54.867728 Reading resources...
1061 05:46:54.874203 Root Device read_resources bus 0 link: 0
1062 05:46:54.877989 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 05:46:54.884664 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 05:46:54.887709 DOMAIN: 0000 read_resources bus 0 link: 0
1065 05:46:54.894440 PCI: 00:14.0 read_resources bus 0 link: 0
1066 05:46:54.897512 USB0 port 0 read_resources bus 0 link: 0
1067 05:46:54.906145 USB0 port 0 read_resources bus 0 link: 0 done
1068 05:46:54.909090 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 05:46:54.916278 PCI: 00:15.0 read_resources bus 1 link: 0
1070 05:46:54.920119 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 05:46:54.926436 PCI: 00:15.1 read_resources bus 2 link: 0
1072 05:46:54.929749 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 05:46:54.936953 PCI: 00:19.0 read_resources bus 3 link: 0
1074 05:46:54.943717 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 05:46:54.947325 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 05:46:54.954270 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 05:46:54.957012 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 05:46:54.963654 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 05:46:54.967214 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 05:46:54.973317 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 05:46:54.977031 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 05:46:54.983872 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 05:46:54.990180 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 05:46:54.993880 Root Device read_resources bus 0 link: 0 done
1085 05:46:54.997110 Done reading resources.
1086 05:46:55.003937 Show resources in subtree (Root Device)...After reading.
1087 05:46:55.006975 Root Device child on link 0 CPU_CLUSTER: 0
1088 05:46:55.010047 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 05:46:55.010488 APIC: 00
1090 05:46:55.013607 APIC: 02
1091 05:46:55.014049 APIC: 05
1092 05:46:55.017437 APIC: 03
1093 05:46:55.017879 APIC: 04
1094 05:46:55.018231 APIC: 01
1095 05:46:55.020543 APIC: 06
1096 05:46:55.020988 APIC: 07
1097 05:46:55.023757 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 05:46:55.033362 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 05:46:55.083583 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 05:46:55.084030 PCI: 00:00.0
1101 05:46:55.084383 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 05:46:55.085105 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 05:46:55.085656 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 05:46:55.086051 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 05:46:55.133205 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 05:46:55.133652 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 05:46:55.134366 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 05:46:55.134726 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 05:46:55.135590 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 05:46:55.182391 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 05:46:55.183255 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 05:46:55.184020 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 05:46:55.184408 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 05:46:55.184759 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 05:46:55.192148 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 05:46:55.195323 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 05:46:55.198489 PCI: 00:02.0
1118 05:46:55.208702 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 05:46:55.218439 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 05:46:55.225095 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 05:46:55.228454 PCI: 00:04.0
1122 05:46:55.228949 PCI: 00:08.0
1123 05:46:55.238413 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 05:46:55.242095 PCI: 00:12.0
1125 05:46:55.251923 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 05:46:55.255042 PCI: 00:14.0 child on link 0 USB0 port 0
1127 05:46:55.265152 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 05:46:55.268297 USB0 port 0 child on link 0 USB2 port 0
1129 05:46:55.271433 USB2 port 0
1130 05:46:55.274944 USB2 port 1
1131 05:46:55.275378 USB2 port 2
1132 05:46:55.278156 USB2 port 3
1133 05:46:55.278591 USB2 port 5
1134 05:46:55.282022 USB2 port 6
1135 05:46:55.282458 USB2 port 9
1136 05:46:55.284815 USB3 port 0
1137 05:46:55.285275 USB3 port 1
1138 05:46:55.287936 USB3 port 2
1139 05:46:55.288372 USB3 port 3
1140 05:46:55.291557 USB3 port 4
1141 05:46:55.291993 PCI: 00:14.2
1142 05:46:55.301404 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 05:46:55.311252 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 05:46:55.314858 PCI: 00:14.3
1145 05:46:55.324432 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 05:46:55.327693 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 05:46:55.337806 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 05:46:55.341451 I2C: 01:15
1149 05:46:55.344302 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 05:46:55.354638 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 05:46:55.355085 I2C: 02:5d
1152 05:46:55.357499 GENERIC: 0.0
1153 05:46:55.357942 PCI: 00:16.0
1154 05:46:55.367959 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 05:46:55.370995 PCI: 00:17.0
1156 05:46:55.380711 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 05:46:55.387607 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 05:46:55.397527 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 05:46:55.404154 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 05:46:55.414218 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 05:46:55.423800 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 05:46:55.427383 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 05:46:55.436769 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 05:46:55.437249 I2C: 03:1a
1165 05:46:55.440506 I2C: 03:38
1166 05:46:55.440945 I2C: 03:39
1167 05:46:55.443640 I2C: 03:3a
1168 05:46:55.444079 I2C: 03:3b
1169 05:46:55.450881 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 05:46:55.456850 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 05:46:55.466959 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 05:46:55.476756 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 05:46:55.477235 PCI: 01:00.0
1174 05:46:55.486915 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 05:46:55.489993 PCI: 00:1e.0
1176 05:46:55.500089 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 05:46:55.509926 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 05:46:55.513657 PCI: 00:1e.2 child on link 0 SPI: 00
1179 05:46:55.523334 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 05:46:55.526764 SPI: 00
1181 05:46:55.530081 PCI: 00:1e.3 child on link 0 SPI: 01
1182 05:46:55.540155 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 05:46:55.540636 SPI: 01
1184 05:46:55.546607 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 05:46:55.553170 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 05:46:55.562941 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 05:46:55.566631 PNP: 0c09.0
1188 05:46:55.573242 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 05:46:55.576410 PCI: 00:1f.3
1190 05:46:55.585969 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 05:46:55.596004 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 05:46:55.596487 PCI: 00:1f.4
1193 05:46:55.606354 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 05:46:55.615740 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 05:46:55.616327 PCI: 00:1f.5
1196 05:46:55.625860 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 05:46:55.632766 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 05:46:55.639261 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 05:46:55.645151 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 05:46:55.648909 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 05:46:55.652086 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 05:46:55.655832 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 05:46:55.658827 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 05:46:55.668551 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 05:46:55.675246 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 05:46:55.681786 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 05:46:55.691891 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 05:46:55.698049 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 05:46:55.701908 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 05:46:55.707901 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 05:46:55.711607 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 05:46:55.717974 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 05:46:55.721352 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 05:46:55.728199 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 05:46:55.731187 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 05:46:55.738268 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 05:46:55.741513 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 05:46:55.748074 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 05:46:55.750809 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 05:46:55.757424 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 05:46:55.761402 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 05:46:55.767790 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 05:46:55.770917 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 05:46:55.777595 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 05:46:55.780550 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 05:46:55.787147 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 05:46:55.790903 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 05:46:55.793936 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 05:46:55.800915 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 05:46:55.803975 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 05:46:55.810686 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 05:46:55.813890 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 05:46:55.820385 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 05:46:55.827117 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 05:46:55.833817 avoid_fixed_resources: DOMAIN: 0000
1236 05:46:55.837226 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 05:46:55.843509 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 05:46:55.850084 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 05:46:55.860285 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 05:46:55.866756 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 05:46:55.873524 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 05:46:55.883176 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 05:46:55.889751 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 05:46:55.896464 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 05:46:55.906999 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 05:46:55.913671 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 05:46:55.919735 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 05:46:55.923429 Setting resources...
1249 05:46:55.927051 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 05:46:55.933035 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 05:46:55.936622 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 05:46:55.940393 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 05:46:55.943317 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 05:46:55.949950 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 05:46:55.956335 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 05:46:55.963070 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 05:46:55.969923 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 05:46:55.976649 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 05:46:55.980189 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 05:46:55.986771 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 05:46:55.989700 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 05:46:55.996629 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 05:46:55.999768 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 05:46:56.006239 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 05:46:56.009378 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 05:46:56.016419 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 05:46:56.019432 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 05:46:56.022986 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 05:46:56.029709 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 05:46:56.032749 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 05:46:56.039436 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 05:46:56.042342 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 05:46:56.049303 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 05:46:56.052729 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 05:46:56.059388 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 05:46:56.062467 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 05:46:56.068914 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 05:46:56.072571 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 05:46:56.079217 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 05:46:56.082226 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 05:46:56.088941 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 05:46:56.098804 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 05:46:56.105449 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 05:46:56.112296 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 05:46:56.118547 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 05:46:56.125474 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 05:46:56.128662 Root Device assign_resources, bus 0 link: 0
1288 05:46:56.135226 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 05:46:56.141910 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 05:46:56.152004 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 05:46:56.158383 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 05:46:56.165222 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 05:46:56.175462 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 05:46:56.182012 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 05:46:56.188889 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 05:46:56.191801 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 05:46:56.201823 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 05:46:56.208485 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 05:46:56.218198 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 05:46:56.225137 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 05:46:56.228380 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 05:46:56.235206 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 05:46:56.241963 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 05:46:56.248374 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 05:46:56.251613 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 05:46:56.261547 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 05:46:56.268209 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 05:46:56.274958 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 05:46:56.284752 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 05:46:56.291348 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 05:46:56.297885 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 05:46:56.307786 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 05:46:56.314544 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 05:46:56.321146 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 05:46:56.324269 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 05:46:56.334283 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 05:46:56.341190 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 05:46:56.350745 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 05:46:56.354567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 05:46:56.364123 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 05:46:56.367665 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 05:46:56.377533 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 05:46:56.383592 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 05:46:56.390497 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 05:46:56.393447 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 05:46:56.403341 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 05:46:56.407075 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 05:46:56.410102 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 05:46:56.416986 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 05:46:56.419892 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 05:46:56.426748 LPC: Trying to open IO window from 800 size 1ff
1332 05:46:56.433205 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 05:46:56.443505 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 05:46:56.449854 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 05:46:56.459530 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 05:46:56.463171 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 05:46:56.469235 Root Device assign_resources, bus 0 link: 0
1338 05:46:56.469320 Done setting resources.
1339 05:46:56.476000 Show resources in subtree (Root Device)...After assigning values.
1340 05:46:56.482828 Root Device child on link 0 CPU_CLUSTER: 0
1341 05:46:56.486390 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 05:46:56.486472 APIC: 00
1343 05:46:56.489502 APIC: 02
1344 05:46:56.489578 APIC: 05
1345 05:46:56.489645 APIC: 03
1346 05:46:56.492507 APIC: 04
1347 05:46:56.492589 APIC: 01
1348 05:46:56.496271 APIC: 06
1349 05:46:56.496353 APIC: 07
1350 05:46:56.499526 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 05:46:56.509672 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 05:46:56.522474 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 05:46:56.522569 PCI: 00:00.0
1354 05:46:56.532169 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 05:46:56.542248 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 05:46:56.552152 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 05:46:56.558840 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 05:46:56.568907 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 05:46:56.578654 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 05:46:56.588358 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 05:46:56.598679 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 05:46:56.608409 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 05:46:56.615214 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 05:46:56.625055 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 05:46:56.634865 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 05:46:56.644680 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 05:46:56.654675 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 05:46:56.664164 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 05:46:56.674064 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 05:46:56.674154 PCI: 00:02.0
1371 05:46:56.684236 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 05:46:56.693961 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 05:46:56.703728 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 05:46:56.707154 PCI: 00:04.0
1375 05:46:56.707236 PCI: 00:08.0
1376 05:46:56.717069 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 05:46:56.720415 PCI: 00:12.0
1378 05:46:56.730128 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 05:46:56.733886 PCI: 00:14.0 child on link 0 USB0 port 0
1380 05:46:56.743628 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 05:46:56.749852 USB0 port 0 child on link 0 USB2 port 0
1382 05:46:56.749940 USB2 port 0
1383 05:46:56.753631 USB2 port 1
1384 05:46:56.753713 USB2 port 2
1385 05:46:56.756649 USB2 port 3
1386 05:46:56.756729 USB2 port 5
1387 05:46:56.760333 USB2 port 6
1388 05:46:56.763546 USB2 port 9
1389 05:46:56.763625 USB3 port 0
1390 05:46:56.766785 USB3 port 1
1391 05:46:56.766871 USB3 port 2
1392 05:46:56.769820 USB3 port 3
1393 05:46:56.769898 USB3 port 4
1394 05:46:56.772966 PCI: 00:14.2
1395 05:46:56.783047 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 05:46:56.792692 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 05:46:56.792783 PCI: 00:14.3
1398 05:46:56.805901 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 05:46:56.809689 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 05:46:56.819531 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 05:46:56.819629 I2C: 01:15
1402 05:46:56.825624 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 05:46:56.835930 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 05:46:56.836020 I2C: 02:5d
1405 05:46:56.839399 GENERIC: 0.0
1406 05:46:56.839485 PCI: 00:16.0
1407 05:46:56.852354 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 05:46:56.852446 PCI: 00:17.0
1409 05:46:56.862033 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 05:46:56.872288 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 05:46:56.881927 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 05:46:56.891753 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 05:46:56.898855 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 05:46:56.911517 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 05:46:56.914768 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 05:46:56.925223 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 05:46:56.925317 I2C: 03:1a
1418 05:46:56.928400 I2C: 03:38
1419 05:46:56.928484 I2C: 03:39
1420 05:46:56.931350 I2C: 03:3a
1421 05:46:56.931429 I2C: 03:3b
1422 05:46:56.938298 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 05:46:56.944956 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 05:46:56.954934 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 05:46:56.967849 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 05:46:56.967943 PCI: 01:00.0
1427 05:46:56.978086 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 05:46:56.981046 PCI: 00:1e.0
1429 05:46:56.990851 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 05:46:57.001199 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 05:46:57.007328 PCI: 00:1e.2 child on link 0 SPI: 00
1432 05:46:57.017907 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 05:46:57.017998 SPI: 00
1434 05:46:57.021001 PCI: 00:1e.3 child on link 0 SPI: 01
1435 05:46:57.030744 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 05:46:57.033818 SPI: 01
1437 05:46:57.037613 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 05:46:57.047116 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 05:46:57.053807 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 05:46:57.057341 PNP: 0c09.0
1441 05:46:57.067260 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 05:46:57.067350 PCI: 00:1f.3
1443 05:46:57.076937 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 05:46:57.086683 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 05:46:57.090251 PCI: 00:1f.4
1446 05:46:57.100035 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 05:46:57.109728 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 05:46:57.109818 PCI: 00:1f.5
1449 05:46:57.119585 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 05:46:57.123138 Done allocating resources.
1451 05:46:57.129663 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 05:46:57.132990 Enabling resources...
1453 05:46:57.135875 PCI: 00:00.0 subsystem <- 8086/9b61
1454 05:46:57.139667 PCI: 00:00.0 cmd <- 06
1455 05:46:57.142599 PCI: 00:02.0 subsystem <- 8086/9b41
1456 05:46:57.146204 PCI: 00:02.0 cmd <- 03
1457 05:46:57.146293 PCI: 00:08.0 cmd <- 06
1458 05:46:57.152955 PCI: 00:12.0 subsystem <- 8086/02f9
1459 05:46:57.153044 PCI: 00:12.0 cmd <- 02
1460 05:46:57.156006 PCI: 00:14.0 subsystem <- 8086/02ed
1461 05:46:57.159770 PCI: 00:14.0 cmd <- 02
1462 05:46:57.162747 PCI: 00:14.2 cmd <- 02
1463 05:46:57.166299 PCI: 00:14.3 subsystem <- 8086/02f0
1464 05:46:57.169723 PCI: 00:14.3 cmd <- 02
1465 05:46:57.173089 PCI: 00:15.0 subsystem <- 8086/02e8
1466 05:46:57.175959 PCI: 00:15.0 cmd <- 02
1467 05:46:57.179672 PCI: 00:15.1 subsystem <- 8086/02e9
1468 05:46:57.182866 PCI: 00:15.1 cmd <- 02
1469 05:46:57.185761 PCI: 00:16.0 subsystem <- 8086/02e0
1470 05:46:57.189328 PCI: 00:16.0 cmd <- 02
1471 05:46:57.192422 PCI: 00:17.0 subsystem <- 8086/02d3
1472 05:46:57.192506 PCI: 00:17.0 cmd <- 03
1473 05:46:57.199108 PCI: 00:19.0 subsystem <- 8086/02c5
1474 05:46:57.199193 PCI: 00:19.0 cmd <- 02
1475 05:46:57.202658 PCI: 00:1d.0 bridge ctrl <- 0013
1476 05:46:57.205685 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 05:46:57.209261 PCI: 00:1d.0 cmd <- 06
1478 05:46:57.212248 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 05:46:57.216008 PCI: 00:1e.0 cmd <- 06
1480 05:46:57.219021 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 05:46:57.222787 PCI: 00:1e.2 cmd <- 06
1482 05:46:57.225732 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 05:46:57.228781 PCI: 00:1e.3 cmd <- 02
1484 05:46:57.232574 PCI: 00:1f.0 subsystem <- 8086/0284
1485 05:46:57.235556 PCI: 00:1f.0 cmd <- 407
1486 05:46:57.238828 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 05:46:57.242508 PCI: 00:1f.3 cmd <- 02
1488 05:46:57.245578 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 05:46:57.248624 PCI: 00:1f.4 cmd <- 03
1490 05:46:57.252312 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 05:46:57.255402 PCI: 00:1f.5 cmd <- 406
1492 05:46:57.262792 PCI: 01:00.0 cmd <- 02
1493 05:46:57.267932 done.
1494 05:46:57.276736 ME: Version: 14.0.39.1367
1495 05:46:57.283485 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1496 05:46:57.286419 Initializing devices...
1497 05:46:57.286507 Root Device init ...
1498 05:46:57.293200 Chrome EC: Set SMI mask to 0x0000000000000000
1499 05:46:57.296424 Chrome EC: clear events_b mask to 0x0000000000000000
1500 05:46:57.303136 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 05:46:57.309849 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 05:46:57.316387 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 05:46:57.320200 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 05:46:57.323319 Root Device init finished in 35315 usecs
1505 05:46:57.327000 CPU_CLUSTER: 0 init ...
1506 05:46:57.333683 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 05:46:57.337532 PCI: 00:00.0 init ...
1508 05:46:57.341138 CPU TDP: 15 Watts
1509 05:46:57.344255 CPU PL2 = 64 Watts
1510 05:46:57.347314 PCI: 00:00.0 init finished in 7083 usecs
1511 05:46:57.350926 PCI: 00:02.0 init ...
1512 05:46:57.354119 PCI: 00:02.0 init finished in 2255 usecs
1513 05:46:57.357208 PCI: 00:08.0 init ...
1514 05:46:57.361143 PCI: 00:08.0 init finished in 2253 usecs
1515 05:46:57.363878 PCI: 00:12.0 init ...
1516 05:46:57.367794 PCI: 00:12.0 init finished in 2253 usecs
1517 05:46:57.370647 PCI: 00:14.0 init ...
1518 05:46:57.373942 PCI: 00:14.0 init finished in 2252 usecs
1519 05:46:57.377251 PCI: 00:14.2 init ...
1520 05:46:57.380834 PCI: 00:14.2 init finished in 2253 usecs
1521 05:46:57.384239 PCI: 00:14.3 init ...
1522 05:46:57.387114 PCI: 00:14.3 init finished in 2273 usecs
1523 05:46:57.390965 PCI: 00:15.0 init ...
1524 05:46:57.393851 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 05:46:57.397280 PCI: 00:15.0 init finished in 5978 usecs
1526 05:46:57.400512 PCI: 00:15.1 init ...
1527 05:46:57.404165 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 05:46:57.410699 PCI: 00:15.1 init finished in 5969 usecs
1529 05:46:57.410781 PCI: 00:16.0 init ...
1530 05:46:57.416836 PCI: 00:16.0 init finished in 2253 usecs
1531 05:46:57.420545 PCI: 00:19.0 init ...
1532 05:46:57.423576 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 05:46:57.426858 PCI: 00:19.0 init finished in 5980 usecs
1534 05:46:57.430478 PCI: 00:1d.0 init ...
1535 05:46:57.433420 Initializing PCH PCIe bridge.
1536 05:46:57.436567 PCI: 00:1d.0 init finished in 5279 usecs
1537 05:46:57.440167 PCI: 00:1f.0 init ...
1538 05:46:57.443105 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 05:46:57.449790 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 05:46:57.449881 IOAPIC: ID = 0x02
1541 05:46:57.453499 IOAPIC: Dumping registers
1542 05:46:57.456443 reg 0x0000: 0x02000000
1543 05:46:57.460201 reg 0x0001: 0x00770020
1544 05:46:57.460282 reg 0x0002: 0x00000000
1545 05:46:57.466329 PCI: 00:1f.0 init finished in 23554 usecs
1546 05:46:57.469998 PCI: 00:1f.4 init ...
1547 05:46:57.473024 PCI: 00:1f.4 init finished in 2262 usecs
1548 05:46:57.483851 PCI: 01:00.0 init ...
1549 05:46:57.486828 PCI: 01:00.0 init finished in 2244 usecs
1550 05:46:57.491618 PNP: 0c09.0 init ...
1551 05:46:57.494584 Google Chrome EC uptime: 11.068 seconds
1552 05:46:57.501257 Google Chrome AP resets since EC boot: 0
1553 05:46:57.504333 Google Chrome most recent AP reset causes:
1554 05:46:57.511189 Google Chrome EC reset flags at last EC boot: reset-pin
1555 05:46:57.514291 PNP: 0c09.0 init finished in 20578 usecs
1556 05:46:57.517817 Devices initialized
1557 05:46:57.520799 Show all devs... After init.
1558 05:46:57.520889 Root Device: enabled 1
1559 05:46:57.524382 CPU_CLUSTER: 0: enabled 1
1560 05:46:57.527591 DOMAIN: 0000: enabled 1
1561 05:46:57.527678 APIC: 00: enabled 1
1562 05:46:57.531235 PCI: 00:00.0: enabled 1
1563 05:46:57.534270 PCI: 00:02.0: enabled 1
1564 05:46:57.537404 PCI: 00:04.0: enabled 0
1565 05:46:57.537489 PCI: 00:05.0: enabled 0
1566 05:46:57.541142 PCI: 00:12.0: enabled 1
1567 05:46:57.544343 PCI: 00:12.5: enabled 0
1568 05:46:57.547270 PCI: 00:12.6: enabled 0
1569 05:46:57.547354 PCI: 00:14.0: enabled 1
1570 05:46:57.551185 PCI: 00:14.1: enabled 0
1571 05:46:57.553948 PCI: 00:14.3: enabled 1
1572 05:46:57.557615 PCI: 00:14.5: enabled 0
1573 05:46:57.557729 PCI: 00:15.0: enabled 1
1574 05:46:57.560527 PCI: 00:15.1: enabled 1
1575 05:46:57.563864 PCI: 00:15.2: enabled 0
1576 05:46:57.563944 PCI: 00:15.3: enabled 0
1577 05:46:57.567259 PCI: 00:16.0: enabled 1
1578 05:46:57.570822 PCI: 00:16.1: enabled 0
1579 05:46:57.573799 PCI: 00:16.2: enabled 0
1580 05:46:57.573879 PCI: 00:16.3: enabled 0
1581 05:46:57.576979 PCI: 00:16.4: enabled 0
1582 05:46:57.580229 PCI: 00:16.5: enabled 0
1583 05:46:57.583672 PCI: 00:17.0: enabled 1
1584 05:46:57.583757 PCI: 00:19.0: enabled 1
1585 05:46:57.587250 PCI: 00:19.1: enabled 0
1586 05:46:57.590194 PCI: 00:19.2: enabled 0
1587 05:46:57.593925 PCI: 00:1a.0: enabled 0
1588 05:46:57.594008 PCI: 00:1c.0: enabled 0
1589 05:46:57.596848 PCI: 00:1c.1: enabled 0
1590 05:46:57.599846 PCI: 00:1c.2: enabled 0
1591 05:46:57.603569 PCI: 00:1c.3: enabled 0
1592 05:46:57.603648 PCI: 00:1c.4: enabled 0
1593 05:46:57.606723 PCI: 00:1c.5: enabled 0
1594 05:46:57.609597 PCI: 00:1c.6: enabled 0
1595 05:46:57.613333 PCI: 00:1c.7: enabled 0
1596 05:46:57.613417 PCI: 00:1d.0: enabled 1
1597 05:46:57.616315 PCI: 00:1d.1: enabled 0
1598 05:46:57.619973 PCI: 00:1d.2: enabled 0
1599 05:46:57.620060 PCI: 00:1d.3: enabled 0
1600 05:46:57.622949 PCI: 00:1d.4: enabled 0
1601 05:46:57.626688 PCI: 00:1d.5: enabled 0
1602 05:46:57.629823 PCI: 00:1e.0: enabled 1
1603 05:46:57.629905 PCI: 00:1e.1: enabled 0
1604 05:46:57.632945 PCI: 00:1e.2: enabled 1
1605 05:46:57.636485 PCI: 00:1e.3: enabled 1
1606 05:46:57.639635 PCI: 00:1f.0: enabled 1
1607 05:46:57.639716 PCI: 00:1f.1: enabled 0
1608 05:46:57.642738 PCI: 00:1f.2: enabled 0
1609 05:46:57.646498 PCI: 00:1f.3: enabled 1
1610 05:46:57.649645 PCI: 00:1f.4: enabled 1
1611 05:46:57.649732 PCI: 00:1f.5: enabled 1
1612 05:46:57.652795 PCI: 00:1f.6: enabled 0
1613 05:46:57.656322 USB0 port 0: enabled 1
1614 05:46:57.656415 I2C: 01:15: enabled 1
1615 05:46:57.659430 I2C: 02:5d: enabled 1
1616 05:46:57.662466 GENERIC: 0.0: enabled 1
1617 05:46:57.666250 I2C: 03:1a: enabled 1
1618 05:46:57.666345 I2C: 03:38: enabled 1
1619 05:46:57.669356 I2C: 03:39: enabled 1
1620 05:46:57.672982 I2C: 03:3a: enabled 1
1621 05:46:57.673071 I2C: 03:3b: enabled 1
1622 05:46:57.676070 PCI: 00:00.0: enabled 1
1623 05:46:57.679705 SPI: 00: enabled 1
1624 05:46:57.679786 SPI: 01: enabled 1
1625 05:46:57.683076 PNP: 0c09.0: enabled 1
1626 05:46:57.685866 USB2 port 0: enabled 1
1627 05:46:57.685955 USB2 port 1: enabled 1
1628 05:46:57.689601 USB2 port 2: enabled 0
1629 05:46:57.692842 USB2 port 3: enabled 0
1630 05:46:57.692928 USB2 port 5: enabled 0
1631 05:46:57.695690 USB2 port 6: enabled 1
1632 05:46:57.699297 USB2 port 9: enabled 1
1633 05:46:57.699388 USB3 port 0: enabled 1
1634 05:46:57.702340 USB3 port 1: enabled 1
1635 05:46:57.706090 USB3 port 2: enabled 1
1636 05:46:57.709146 USB3 port 3: enabled 1
1637 05:46:57.709228 USB3 port 4: enabled 0
1638 05:46:57.712770 APIC: 02: enabled 1
1639 05:46:57.715901 APIC: 05: enabled 1
1640 05:46:57.715983 APIC: 03: enabled 1
1641 05:46:57.718888 APIC: 04: enabled 1
1642 05:46:57.718972 APIC: 01: enabled 1
1643 05:46:57.722577 APIC: 06: enabled 1
1644 05:46:57.725823 APIC: 07: enabled 1
1645 05:46:57.725909 PCI: 00:08.0: enabled 1
1646 05:46:57.729002 PCI: 00:14.2: enabled 1
1647 05:46:57.732368 PCI: 01:00.0: enabled 1
1648 05:46:57.735464 Disabling ACPI via APMC:
1649 05:46:57.739164 done.
1650 05:46:57.742182 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 05:46:57.745209 ELOG: NV offset 0xaf0000 size 0x4000
1652 05:46:57.752935 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 05:46:57.759593 ELOG: Event(17) added with size 13 at 2022-08-23 05:46:26 UTC
1654 05:46:57.766218 ELOG: Event(92) added with size 9 at 2022-08-23 05:46:26 UTC
1655 05:46:57.772979 ELOG: Event(93) added with size 9 at 2022-08-23 05:46:26 UTC
1656 05:46:57.779235 ELOG: Event(9A) added with size 9 at 2022-08-23 05:46:26 UTC
1657 05:46:57.785893 ELOG: Event(9E) added with size 10 at 2022-08-23 05:46:26 UTC
1658 05:46:57.792514 ELOG: Event(9F) added with size 14 at 2022-08-23 05:46:26 UTC
1659 05:46:57.795709 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1660 05:46:57.803387 ELOG: Event(A1) added with size 10 at 2022-08-23 05:46:26 UTC
1661 05:46:57.813456 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 05:46:57.820233 ELOG: Event(A0) added with size 9 at 2022-08-23 05:46:26 UTC
1663 05:46:57.822969 elog_add_boot_reason: Logged dev mode boot
1664 05:46:57.826589 Finalize devices...
1665 05:46:57.826686 PCI: 00:17.0 final
1666 05:46:57.829764 Devices finalized
1667 05:46:57.832987 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 05:46:57.839796 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 05:46:57.842760 ME: HFSTS1 : 0x90000245
1670 05:46:57.846646 ME: HFSTS2 : 0x3B850126
1671 05:46:57.852610 ME: HFSTS3 : 0x00000020
1672 05:46:57.856374 ME: HFSTS4 : 0x00004800
1673 05:46:57.859338 ME: HFSTS5 : 0x00000000
1674 05:46:57.862489 ME: HFSTS6 : 0x40400006
1675 05:46:57.866265 ME: Manufacturing Mode : NO
1676 05:46:57.869254 ME: FW Partition Table : OK
1677 05:46:57.872479 ME: Bringup Loader Failure : NO
1678 05:46:57.876142 ME: Firmware Init Complete : YES
1679 05:46:57.882058 ME: Boot Options Present : NO
1680 05:46:57.882808 ME: Update In Progress : NO
1681 05:46:57.886045 ME: D0i3 Support : YES
1682 05:46:57.889223 ME: Low Power State Enabled : NO
1683 05:46:57.892890 ME: CPU Replaced : NO
1684 05:46:57.896211 ME: CPU Replacement Valid : YES
1685 05:46:57.899353 ME: Current Working State : 5
1686 05:46:57.902672 ME: Current Operation State : 1
1687 05:46:57.905722 ME: Current Operation Mode : 0
1688 05:46:57.909610 ME: Error Code : 0
1689 05:46:57.912537 ME: CPU Debug Disabled : YES
1690 05:46:57.915697 ME: TXT Support : NO
1691 05:46:57.922685 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 05:46:57.929729 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 05:46:57.930169 CBFS @ c08000 size 3f8000
1694 05:46:57.935669 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 05:46:57.939381 CBFS: Locating 'fallback/dsdt.aml'
1696 05:46:57.942285 CBFS: Found @ offset 10bb80 size 3fa5
1697 05:46:57.949483 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 05:46:57.952188 CBFS @ c08000 size 3f8000
1699 05:46:57.959133 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 05:46:57.959616 CBFS: Locating 'fallback/slic'
1701 05:46:57.964602 CBFS: 'fallback/slic' not found.
1702 05:46:57.970809 ACPI: Writing ACPI tables at 99b3e000.
1703 05:46:57.971323 ACPI: * FACS
1704 05:46:57.974455 ACPI: * DSDT
1705 05:46:57.977529 Ramoops buffer: 0x100000@0x99a3d000.
1706 05:46:57.981314 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 05:46:57.987767 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 05:46:57.991282 Google Chrome EC: version:
1709 05:46:57.994023 ro: helios_v2.0.2659-56403530b
1710 05:46:57.997717 rw: helios_v2.0.2849-c41de27e7d
1711 05:46:57.998161 running image: 1
1712 05:46:58.001991 ACPI: * FADT
1713 05:46:58.002437 SCI is IRQ9
1714 05:46:58.008703 ACPI: added table 1/32, length now 40
1715 05:46:58.009387 ACPI: * SSDT
1716 05:46:58.012173 Found 1 CPU(s) with 8 core(s) each.
1717 05:46:58.014959 Error: Could not locate 'wifi_sar' in VPD.
1718 05:46:58.021227 Checking CBFS for default SAR values
1719 05:46:58.024689 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 05:46:58.027692 CBFS @ c08000 size 3f8000
1721 05:46:58.034610 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 05:46:58.038157 CBFS: Locating 'wifi_sar_defaults.hex'
1723 05:46:58.041236 CBFS: Found @ offset 5fac0 size 77
1724 05:46:58.044671 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 05:46:58.051063 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 05:46:58.054868 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 05:46:58.061867 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 05:46:58.064549 failed to find key in VPD: dsm_calib_r0_0
1729 05:46:58.074344 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 05:46:58.077326 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 05:46:58.084068 failed to find key in VPD: dsm_calib_r0_1
1732 05:46:58.090790 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 05:46:58.097847 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 05:46:58.101116 failed to find key in VPD: dsm_calib_r0_2
1735 05:46:58.110697 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 05:46:58.113885 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 05:46:58.120552 failed to find key in VPD: dsm_calib_r0_3
1738 05:46:58.127281 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 05:46:58.133441 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 05:46:58.136959 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 05:46:58.143728 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 05:46:58.146932 EC returned error result code 1
1743 05:46:58.150589 EC returned error result code 1
1744 05:46:58.154365 EC returned error result code 1
1745 05:46:58.157567 PS2K: Bad resp from EC. Vivaldi disabled!
1746 05:46:58.163740 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 05:46:58.170472 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 05:46:58.173707 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 05:46:58.180342 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 05:46:58.183994 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 05:46:58.190828 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 05:46:58.196951 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 05:46:58.203732 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 05:46:58.206750 ACPI: added table 2/32, length now 44
1755 05:46:58.207196 ACPI: * MCFG
1756 05:46:58.213705 ACPI: added table 3/32, length now 48
1757 05:46:58.214270 ACPI: * TPM2
1758 05:46:58.217563 TPM2 log created at 99a2d000
1759 05:46:58.220279 ACPI: added table 4/32, length now 52
1760 05:46:58.223222 ACPI: * MADT
1761 05:46:58.223667 SCI is IRQ9
1762 05:46:58.226795 ACPI: added table 5/32, length now 56
1763 05:46:58.229785 current = 99b43ac0
1764 05:46:58.230226 ACPI: * DMAR
1765 05:46:58.233518 ACPI: added table 6/32, length now 60
1766 05:46:58.236537 ACPI: * IGD OpRegion
1767 05:46:58.239645 GMA: Found VBT in CBFS
1768 05:46:58.243741 GMA: Found valid VBT in CBFS
1769 05:46:58.246716 ACPI: added table 7/32, length now 64
1770 05:46:58.247257 ACPI: * HPET
1771 05:46:58.253158 ACPI: added table 8/32, length now 68
1772 05:46:58.253626 ACPI: done.
1773 05:46:58.256421 ACPI tables: 31744 bytes.
1774 05:46:58.260282 smbios_write_tables: 99a2c000
1775 05:46:58.263000 EC returned error result code 3
1776 05:46:58.266301 Couldn't obtain OEM name from CBI
1777 05:46:58.269944 Create SMBIOS type 17
1778 05:46:58.272816 PCI: 00:00.0 (Intel Cannonlake)
1779 05:46:58.273334 PCI: 00:14.3 (Intel WiFi)
1780 05:46:58.275858 SMBIOS tables: 939 bytes.
1781 05:46:58.282461 Writing table forward entry at 0x00000500
1782 05:46:58.286059 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 05:46:58.289224 Writing coreboot table at 0x99b62000
1784 05:46:58.295932 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 05:46:58.303096 1. 0000000000001000-000000000009ffff: RAM
1786 05:46:58.305946 2. 00000000000a0000-00000000000fffff: RESERVED
1787 05:46:58.308976 3. 0000000000100000-0000000099a2bfff: RAM
1788 05:46:58.315613 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 05:46:58.322324 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 05:46:58.325970 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 05:46:58.332482 7. 000000009a000000-000000009f7fffff: RESERVED
1792 05:46:58.335573 8. 00000000e0000000-00000000efffffff: RESERVED
1793 05:46:58.342331 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 05:46:58.345557 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 05:46:58.352367 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 05:46:58.355722 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 05:46:58.358823 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 05:46:58.365605 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 05:46:58.368755 15. 0000000100000000-000000045e7fffff: RAM
1800 05:46:58.371700 Graphics framebuffer located at 0xc0000000
1801 05:46:58.375684 Passing 5 GPIOs to payload:
1802 05:46:58.382009 NAME | PORT | POLARITY | VALUE
1803 05:46:58.385398 write protect | undefined | high | low
1804 05:46:58.392063 lid | undefined | high | high
1805 05:46:58.398391 power | undefined | high | low
1806 05:46:58.402038 oprom | undefined | high | low
1807 05:46:58.408139 EC in RW | 0x000000cb | high | low
1808 05:46:58.408582 Board ID: 4
1809 05:46:58.414729 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 05:46:58.418483 CBFS @ c08000 size 3f8000
1811 05:46:58.421512 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 05:46:58.428308 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6244
1813 05:46:58.431406 coreboot table: 1492 bytes.
1814 05:46:58.434941 IMD ROOT 0. 99fff000 00001000
1815 05:46:58.438026 IMD SMALL 1. 99ffe000 00001000
1816 05:46:58.441597 FSP MEMORY 2. 99c4e000 003b0000
1817 05:46:58.444706 CONSOLE 3. 99c2e000 00020000
1818 05:46:58.447912 FMAP 4. 99c2d000 0000054e
1819 05:46:58.451480 TIME STAMP 5. 99c2c000 00000910
1820 05:46:58.454574 VBOOT WORK 6. 99c18000 00014000
1821 05:46:58.457746 MRC DATA 7. 99c16000 00001958
1822 05:46:58.461358 ROMSTG STCK 8. 99c15000 00001000
1823 05:46:58.464669 AFTER CAR 9. 99c0b000 0000a000
1824 05:46:58.467687 RAMSTAGE 10. 99baf000 0005c000
1825 05:46:58.470840 REFCODE 11. 99b7a000 00035000
1826 05:46:58.474511 SMM BACKUP 12. 99b6a000 00010000
1827 05:46:58.477583 COREBOOT 13. 99b62000 00008000
1828 05:46:58.480823 ACPI 14. 99b3e000 00024000
1829 05:46:58.484700 ACPI GNVS 15. 99b3d000 00001000
1830 05:46:58.487694 RAMOOPS 16. 99a3d000 00100000
1831 05:46:58.491032 TPM2 TCGLOG17. 99a2d000 00010000
1832 05:46:58.494034 SMBIOS 18. 99a2c000 00000800
1833 05:46:58.497642 IMD small region:
1834 05:46:58.501092 IMD ROOT 0. 99ffec00 00000400
1835 05:46:58.503904 FSP RUNTIME 1. 99ffebe0 00000004
1836 05:46:58.507808 EC HOSTEVENT 2. 99ffebc0 00000008
1837 05:46:58.510932 POWER STATE 3. 99ffeb80 00000040
1838 05:46:58.514175 ROMSTAGE 4. 99ffeb60 00000004
1839 05:46:58.517802 MEM INFO 5. 99ffe9a0 000001b9
1840 05:46:58.520576 VPD 6. 99ffe940 0000004c
1841 05:46:58.524318 MTRR: Physical address space:
1842 05:46:58.530087 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 05:46:58.536927 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 05:46:58.543827 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 05:46:58.550428 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 05:46:58.557112 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 05:46:58.560661 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 05:46:58.566659 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 05:46:58.573577 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 05:46:58.576915 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 05:46:58.580143 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 05:46:58.583077 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 05:46:58.590271 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 05:46:58.593350 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 05:46:58.596738 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 05:46:58.599941 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 05:46:58.603099 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 05:46:58.609840 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 05:46:58.613577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 05:46:58.616097 call enable_fixed_mtrr()
1861 05:46:58.619883 CPU physical address size: 39 bits
1862 05:46:58.622869 MTRR: default type WB/UC MTRR counts: 6/8.
1863 05:46:58.626584 MTRR: WB selected as default type.
1864 05:46:58.632921 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 05:46:58.639754 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 05:46:58.646481 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 05:46:58.652924 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 05:46:58.659377 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 05:46:58.666167 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 05:46:58.666672
1871 05:46:58.667023 MTRR check
1872 05:46:58.669119 Fixed MTRRs : Enabled
1873 05:46:58.673013 Variable MTRRs: Enabled
1874 05:46:58.673497
1875 05:46:58.675974 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 05:46:58.679061 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 05:46:58.685963 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 05:46:58.689597 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 05:46:58.692480 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 05:46:58.695738 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 05:46:58.702246 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 05:46:58.705538 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 05:46:58.709634 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 05:46:58.712308 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 05:46:58.719103 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 05:46:58.722450 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1887 05:46:58.725415 call enable_fixed_mtrr()
1888 05:46:58.732158 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1889 05:46:58.735211 CPU physical address size: 39 bits
1890 05:46:58.739115 CBFS @ c08000 size 3f8000
1891 05:46:58.742099 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1892 05:46:58.745736 CBFS: Locating 'fallback/payload'
1893 05:46:58.752265 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 05:46:58.755114 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 05:46:58.758769 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 05:46:58.762017 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 05:46:58.765291 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 05:46:58.771910 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 05:46:58.775257 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 05:46:58.778845 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 05:46:58.781767 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 05:46:58.788296 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 05:46:58.791666 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 05:46:58.794886 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 05:46:58.801201 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 05:46:58.801675 call enable_fixed_mtrr()
1907 05:46:58.808055 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 05:46:58.811616 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 05:46:58.814607 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 05:46:58.818172 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 05:46:58.821380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 05:46:58.827859 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 05:46:58.831362 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 05:46:58.834436 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 05:46:58.837987 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 05:46:58.844610 CPU physical address size: 39 bits
1917 05:46:58.845183 call enable_fixed_mtrr()
1918 05:46:58.850977 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 05:46:58.853929 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 05:46:58.857691 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 05:46:58.860858 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 05:46:58.867794 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 05:46:58.870609 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 05:46:58.874132 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 05:46:58.877720 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 05:46:58.883969 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 05:46:58.887651 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 05:46:58.890734 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 05:46:58.893639 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 05:46:58.900292 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 05:46:58.903524 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 05:46:58.907468 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 05:46:58.910432 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 05:46:58.917179 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 05:46:58.920169 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 05:46:58.923764 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 05:46:58.926724 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 05:46:58.930203 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 05:46:58.936998 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 05:46:58.939850 call enable_fixed_mtrr()
1941 05:46:58.940310 call enable_fixed_mtrr()
1942 05:46:58.943570 CPU physical address size: 39 bits
1943 05:46:58.950223 CPU physical address size: 39 bits
1944 05:46:58.953171 CBFS: Found @ offset 1c96c0 size 3f798
1945 05:46:58.956377 CPU physical address size: 39 bits
1946 05:46:58.960100 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 05:46:58.963160 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 05:46:58.969942 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 05:46:58.973107 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 05:46:58.976676 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 05:46:58.980007 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 05:46:58.982819 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 05:46:58.989545 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 05:46:58.993209 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 05:46:58.996361 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 05:46:58.999519 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 05:46:59.006675 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 05:46:59.009587 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 05:46:59.012864 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 05:46:59.016020 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 05:46:59.022901 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 05:46:59.025744 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 05:46:59.029265 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 05:46:59.032246 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 05:46:59.038728 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 05:46:59.042440 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 05:46:59.045547 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 05:46:59.049108 call enable_fixed_mtrr()
1969 05:46:59.052371 call enable_fixed_mtrr()
1970 05:46:59.055862 CPU physical address size: 39 bits
1971 05:46:59.058707 CPU physical address size: 39 bits
1972 05:46:59.062618 Checking segment from ROM address 0xffdd16f8
1973 05:46:59.068746 Checking segment from ROM address 0xffdd1714
1974 05:46:59.072238 Loading segment from ROM address 0xffdd16f8
1975 05:46:59.075169 code (compression=0)
1976 05:46:59.082354 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 05:46:59.091908 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 05:46:59.094975 it's not compressed!
1979 05:46:59.186753 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 05:46:59.193393 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 05:46:59.196441 Loading segment from ROM address 0xffdd1714
1982 05:46:59.199574 Entry Point 0x30000000
1983 05:46:59.202894 Loaded segments
1984 05:46:59.208276 Finalizing chipset.
1985 05:46:59.211759 Finalizing SMM.
1986 05:46:59.214720 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1987 05:46:59.218331 mp_park_aps done after 0 msecs.
1988 05:46:59.224799 Jumping to boot code at 30000000(99b62000)
1989 05:46:59.231332 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 05:46:59.231785
1991 05:46:59.234887 Starting depthcharge on Helios...
1992 05:46:59.236071 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
1993 05:46:59.236719 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1994 05:46:59.237239 Setting prompt string to ['hatch:']
1995 05:46:59.237678 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1996 05:46:59.244540 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 05:46:59.251289 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 05:46:59.257803 board_setup: Info: eMMC controller not present; skipping
1999 05:46:59.261053 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 05:46:59.268044 board_setup: Info: SDHCI controller not present; skipping
2001 05:46:59.274055 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 05:46:59.274505 Wipe memory regions:
2003 05:46:59.277918 [0x00000000001000, 0x000000000a0000)
2004 05:46:59.281189 [0x00000000100000, 0x00000030000000)
2005 05:46:59.350322 [0x00000030657430, 0x00000099a2c000)
2006 05:46:59.500304 [0x00000100000000, 0x0000045e800000)
2007 05:47:00.956197 R8152: Initializing
2008 05:47:00.959437 Version 9 (ocp_data = 6010)
2009 05:47:00.963698 R8152: Done initializing
2010 05:47:00.966943 Adding net device
2011 05:47:01.341505 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 05:47:01.341771
2013 05:47:01.342191 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2015 05:47:01.443319 hatch: tftpboot 192.168.201.1 7096694/tftp-deploy-5jz_j5o4/kernel/bzImage 7096694/tftp-deploy-5jz_j5o4/kernel/cmdline 7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
2016 05:47:01.443944 Setting prompt string to 'Starting kernel'
2017 05:47:01.444376 Setting prompt string to ['Starting kernel']
2018 05:47:01.444720 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2019 05:47:01.445121 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2020 05:47:01.448837 tftpboot 192.168.201.1 7096694/tftp-deploy-5jz_j5o4/kernel/bzImoy-5jz_j5o4/kernel/cmdline 7096694/tftp-deploy-5jz_j5o4/ramdisk/ramdisk.cpio.gz
2021 05:47:01.449069 Waiting for link
2022 05:47:01.649551 done.
2023 05:47:01.649803 MAC: f4:f5:e8:50:e3:ec
2024 05:47:01.652792 Sending DHCP discover... done.
2025 05:47:01.655898 Waiting for reply... done.
2026 05:47:01.659406 Sending DHCP request... done.
2027 05:47:01.665539 Waiting for reply... done.
2028 05:47:01.665757 My ip is 192.168.201.14
2029 05:47:01.669226 The DHCP server ip is 192.168.201.1
2030 05:47:01.675481 TFTP server IP predefined by user: 192.168.201.1
2031 05:47:01.682190 Bootfile predefined by user: 7096694/tftp-deploy-5jz_j5o4/kernel/bzImage
2032 05:47:01.685916 Sending tftp read request... done.
2033 05:47:01.689032 Waiting for the transfer...
2034 05:47:01.992354 00000000 ################################################################
2035 05:47:02.252640 00080000 ################################################################
2036 05:47:02.516283 00100000 ################################################################
2037 05:47:02.803197 00180000 ################################################################
2038 05:47:03.075585 00200000 ################################################################
2039 05:47:03.356008 00280000 ################################################################
2040 05:47:03.621920 00300000 ################################################################
2041 05:47:03.879615 00380000 ################################################################
2042 05:47:04.126488 00400000 ################################################################
2043 05:47:04.377385 00480000 ################################################################
2044 05:47:04.640998 00500000 ################################################################
2045 05:47:04.892102 00580000 ################################################################
2046 05:47:05.170514 00600000 ################################################################
2047 05:47:05.434501 00680000 ################################################################
2048 05:47:05.693183 00700000 ################################################################
2049 05:47:05.967367 00780000 ################################################################
2050 05:47:06.247120 00800000 ################################################################
2051 05:47:06.269501 00880000 ###### done.
2052 05:47:06.273070 The bootfile was 8953856 bytes long.
2053 05:47:06.276355 Sending tftp read request... done.
2054 05:47:06.279281 Waiting for the transfer...
2055 05:47:06.527275 00000000 ################################################################
2056 05:47:06.778813 00080000 ################################################################
2057 05:47:07.021258 00100000 ################################################################
2058 05:47:07.268739 00180000 ################################################################
2059 05:47:07.534019 00200000 ################################################################
2060 05:47:07.770374 00280000 ################################################################
2061 05:47:08.041044 00300000 ################################################################
2062 05:47:08.324356 00380000 ################################################################
2063 05:47:08.587187 00400000 ################################################################
2064 05:47:08.844685 00480000 ################################################################
2065 05:47:08.968011 00500000 ################################ done.
2066 05:47:08.971051 Sending tftp read request... done.
2067 05:47:08.974415 Waiting for the transfer...
2068 05:47:08.974512 00000000 # done.
2069 05:47:08.984470 Command line loaded dynamically from TFTP file: 7096694/tftp-deploy-5jz_j5o4/kernel/cmdline
2070 05:47:09.007301 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096694/extract-nfsrootfs-6kr2y5lp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2071 05:47:09.014040 ec_init(0): CrosEC protocol v3 supported (256, 256)
2072 05:47:09.020636 Shutting down all USB controllers.
2073 05:47:09.020733 Removing current net device
2074 05:47:09.024492 Finalizing coreboot
2075 05:47:09.030969 Exiting depthcharge with code 4 at timestamp: 17080153
2076 05:47:09.031066
2077 05:47:09.031143 Starting kernel ...
2078 05:47:09.031213
2079 05:47:09.031528 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2080 05:47:09.031642 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2081 05:47:09.031729 Setting prompt string to ['Linux version [0-9]']
2082 05:47:09.031843 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2083 05:47:09.031931 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2084 05:47:09.034110
2086 05:51:41.031912 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2088 05:51:41.032150 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2090 05:51:41.032329 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2093 05:51:41.032625 end: 2 depthcharge-action (duration 00:05:00) [common]
2095 05:51:41.032848 Cleaning after the job
2096 05:51:41.032943 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/ramdisk
2097 05:51:41.033474 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/kernel
2098 05:51:41.034191 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/nfsrootfs
2099 05:51:41.086668 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096694/tftp-deploy-5jz_j5o4/modules
2100 05:51:41.087007 start: 4.1 power-off (timeout 00:00:30) [common]
2101 05:51:41.087191 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2102 05:51:41.108852 >> Command sent successfully.
2103 05:51:41.110920 Returned 0 in 0 seconds
2104 05:51:41.211721 end: 4.1 power-off (duration 00:00:00) [common]
2106 05:51:41.212077 start: 4.2 read-feedback (timeout 00:10:00) [common]
2107 05:51:41.212348 Listened to connection for namespace 'common' for up to 1s
2108 05:51:42.217165 Finalising connection for namespace 'common'
2109 05:51:42.217360 Disconnecting from shell: Finalise
2110 05:51:42.318084 end: 4.2 read-feedback (duration 00:00:01) [common]
2111 05:51:42.318235 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096694
2112 05:51:42.495472 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096694
2113 05:51:42.495685 JobError: Your job cannot terminate cleanly.