Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:40:41.455203 lava-dispatcher, installed at version: 2022.06
2 05:40:41.455404 start: 0 validate
3 05:40:41.455532 Start time: 2022-08-23 05:40:41.455525+00:00 (UTC)
4 05:40:41.455653 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:40:41.455778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:40:41.744143 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:40:41.744816 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:40:42.038712 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:40:42.039332 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:40:42.333394 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:40:42.333658 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:40:42.625079 validate duration: 1.17
14 05:40:42.625357 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:40:42.625456 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:40:42.625542 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:40:42.625636 Not decompressing ramdisk as can be used compressed.
18 05:40:42.625716 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/initrd.cpio.gz
19 05:40:42.625778 saving as /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/ramdisk/initrd.cpio.gz
20 05:40:42.625838 total size: 5411025 (5MB)
21 05:40:42.626928 progress 0% (0MB)
22 05:40:42.628365 progress 5% (0MB)
23 05:40:42.629707 progress 10% (0MB)
24 05:40:42.631053 progress 15% (0MB)
25 05:40:42.632557 progress 20% (1MB)
26 05:40:42.633889 progress 25% (1MB)
27 05:40:42.635159 progress 30% (1MB)
28 05:40:42.636545 progress 35% (1MB)
29 05:40:42.638065 progress 40% (2MB)
30 05:40:42.639487 progress 45% (2MB)
31 05:40:42.640810 progress 50% (2MB)
32 05:40:42.642140 progress 55% (2MB)
33 05:40:42.643607 progress 60% (3MB)
34 05:40:42.644908 progress 65% (3MB)
35 05:40:42.646231 progress 70% (3MB)
36 05:40:42.647496 progress 75% (3MB)
37 05:40:42.648906 progress 80% (4MB)
38 05:40:42.650232 progress 85% (4MB)
39 05:40:42.651573 progress 90% (4MB)
40 05:40:42.652853 progress 95% (4MB)
41 05:40:42.654319 progress 100% (5MB)
42 05:40:42.654491 5MB downloaded in 0.03s (180.12MB/s)
43 05:40:42.654637 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:40:42.654873 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:40:42.654959 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:40:42.655043 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:40:42.655143 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:40:42.655209 saving as /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/kernel/bzImage
50 05:40:42.655270 total size: 8953856 (8MB)
51 05:40:42.655330 No compression specified
52 05:40:42.656363 progress 0% (0MB)
53 05:40:42.658572 progress 5% (0MB)
54 05:40:42.660809 progress 10% (0MB)
55 05:40:42.662881 progress 15% (1MB)
56 05:40:42.665106 progress 20% (1MB)
57 05:40:42.667318 progress 25% (2MB)
58 05:40:42.669399 progress 30% (2MB)
59 05:40:42.671576 progress 35% (3MB)
60 05:40:42.673792 progress 40% (3MB)
61 05:40:42.675819 progress 45% (3MB)
62 05:40:42.678030 progress 50% (4MB)
63 05:40:42.680179 progress 55% (4MB)
64 05:40:42.682216 progress 60% (5MB)
65 05:40:42.684356 progress 65% (5MB)
66 05:40:42.686534 progress 70% (6MB)
67 05:40:42.688524 progress 75% (6MB)
68 05:40:42.690760 progress 80% (6MB)
69 05:40:42.692941 progress 85% (7MB)
70 05:40:42.694976 progress 90% (7MB)
71 05:40:42.697170 progress 95% (8MB)
72 05:40:42.699341 progress 100% (8MB)
73 05:40:42.699521 8MB downloaded in 0.04s (192.99MB/s)
74 05:40:42.699665 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:40:42.699954 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:40:42.700041 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:40:42.700124 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:40:42.700228 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/full.rootfs.tar.xz
80 05:40:42.700293 saving as /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/nfsrootfs/full.rootfs.tar
81 05:40:42.700351 total size: 122678960 (116MB)
82 05:40:42.700410 Using unxz to decompress xz
83 05:40:42.703774 progress 0% (0MB)
84 05:40:43.130201 progress 5% (5MB)
85 05:40:43.570198 progress 10% (11MB)
86 05:40:44.010472 progress 15% (17MB)
87 05:40:44.459887 progress 20% (23MB)
88 05:40:44.767681 progress 25% (29MB)
89 05:40:45.096371 progress 30% (35MB)
90 05:40:45.324316 progress 35% (40MB)
91 05:40:45.530758 progress 40% (46MB)
92 05:40:45.866721 progress 45% (52MB)
93 05:40:46.211141 progress 50% (58MB)
94 05:40:46.532971 progress 55% (64MB)
95 05:40:46.871334 progress 60% (70MB)
96 05:40:47.190265 progress 65% (76MB)
97 05:40:47.559269 progress 70% (81MB)
98 05:40:47.951818 progress 75% (87MB)
99 05:40:48.354114 progress 80% (93MB)
100 05:40:48.466371 progress 85% (99MB)
101 05:40:48.627846 progress 90% (105MB)
102 05:40:48.947036 progress 95% (111MB)
103 05:40:49.302411 progress 100% (116MB)
104 05:40:49.308607 116MB downloaded in 6.61s (17.70MB/s)
105 05:40:49.308859 end: 1.3.1 http-download (duration 00:00:07) [common]
107 05:40:49.309179 end: 1.3 download-retry (duration 00:00:07) [common]
108 05:40:49.309271 start: 1.4 download-retry (timeout 00:09:53) [common]
109 05:40:49.309357 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 05:40:49.309470 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:40:49.309539 saving as /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/modules/modules.tar
112 05:40:49.309599 total size: 64712 (0MB)
113 05:40:49.309661 Using unxz to decompress xz
114 05:40:49.312861 progress 50% (0MB)
115 05:40:49.313275 progress 100% (0MB)
116 05:40:49.317375 0MB downloaded in 0.01s (7.94MB/s)
117 05:40:49.317584 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:40:49.317833 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:40:49.317927 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 05:40:49.318021 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 05:40:50.985142 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096678/extract-nfsrootfs-r_rbbhcm
123 05:40:50.985350 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 05:40:50.985454 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 05:40:50.985592 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk
126 05:40:50.985693 makedir: /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin
127 05:40:50.985778 makedir: /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/tests
128 05:40:50.985858 makedir: /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/results
129 05:40:50.985953 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-add-keys
130 05:40:50.986084 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-add-sources
131 05:40:50.986197 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-background-process-start
132 05:40:50.986310 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-background-process-stop
133 05:40:50.986418 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-common-functions
134 05:40:50.986524 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-echo-ipv4
135 05:40:50.986632 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-install-packages
136 05:40:50.986739 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-installed-packages
137 05:40:50.986845 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-os-build
138 05:40:50.986951 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-probe-channel
139 05:40:50.987057 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-probe-ip
140 05:40:50.987162 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-target-ip
141 05:40:50.987271 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-target-mac
142 05:40:50.987376 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-target-storage
143 05:40:50.987483 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-case
144 05:40:50.987590 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-event
145 05:40:50.987694 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-feedback
146 05:40:50.987798 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-raise
147 05:40:50.987902 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-reference
148 05:40:50.988007 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-runner
149 05:40:50.988111 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-set
150 05:40:50.988217 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-test-shell
151 05:40:50.988323 Updating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-install-packages (oe)
152 05:40:50.988434 Updating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/bin/lava-installed-packages (oe)
153 05:40:50.988528 Creating /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/environment
154 05:40:50.988611 LAVA metadata
155 05:40:50.988675 - LAVA_JOB_ID=7096678
156 05:40:50.988738 - LAVA_DISPATCHER_IP=192.168.201.1
157 05:40:50.988833 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 05:40:50.988896 skipped lava-vland-overlay
159 05:40:50.988974 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 05:40:50.989055 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 05:40:50.989115 skipped lava-multinode-overlay
162 05:40:50.989190 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 05:40:50.989270 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 05:40:50.989340 Loading test definitions
165 05:40:50.989427 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 05:40:50.989498 Using /lava-7096678 at stage 0
167 05:40:50.989592 Fetching tests from https://github.com/kernelci/test-definitions
168 05:40:50.989671 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/0/tests/0_ltp-mm'
169 05:40:55.717144 Running '/usr/bin/git checkout kernelci.org
170 05:40:55.851251 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 05:40:55.851964 uuid=7096678_1.5.2.3.1 testdef=None
172 05:40:55.852126 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 05:40:55.852375 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 05:40:55.853139 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 05:40:55.853381 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 05:40:55.854322 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 05:40:55.854571 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 05:40:55.855474 runner path: /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/0/tests/0_ltp-mm test_uuid 7096678_1.5.2.3.1
182 05:40:55.855566 SKIPFILE='skipfile-lkft.yaml'
183 05:40:55.855631 SKIP_INSTALL='true'
184 05:40:55.855692 TST_CMDFILES='mm'
185 05:40:55.855828 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 05:40:55.856041 Creating lava-test-runner.conf files
188 05:40:55.856106 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096678/lava-overlay-i79kwqqk/lava-7096678/0 for stage 0
189 05:40:55.856189 - 0_ltp-mm
190 05:40:55.856288 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
191 05:40:55.856375 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 05:41:03.226131 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 05:41:03.226285 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
194 05:41:03.226378 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 05:41:03.226480 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 05:41:03.226573 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
197 05:41:03.328896 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 05:41:03.329246 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
199 05:41:03.329359 extracting modules file /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096678/extract-nfsrootfs-r_rbbhcm
200 05:41:03.333652 extracting modules file /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096678/extract-overlay-ramdisk-mscecg3q/ramdisk
201 05:41:03.337589 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 05:41:03.337698 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
203 05:41:03.337794 [common] Applying overlay to NFS
204 05:41:03.337865 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096678/compress-overlay-b58kxhlb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096678/extract-nfsrootfs-r_rbbhcm
205 05:41:03.779180 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 05:41:03.779344 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 05:41:03.779437 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 05:41:03.779528 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 05:41:03.779611 Building ramdisk /var/lib/lava/dispatcher/tmp/7096678/extract-overlay-ramdisk-mscecg3q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096678/extract-overlay-ramdisk-mscecg3q/ramdisk
210 05:41:03.812804 >> 24662 blocks
211 05:41:04.275037 rename /var/lib/lava/dispatcher/tmp/7096678/extract-overlay-ramdisk-mscecg3q/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
212 05:41:04.275489 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 05:41:04.275610 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
214 05:41:04.275718 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
215 05:41:04.275816 No mkimage arch provided, not using FIT.
216 05:41:04.275907 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 05:41:04.276005 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 05:41:04.276104 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 05:41:04.276205 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
220 05:41:04.276291 No LXC device requested
221 05:41:04.276373 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 05:41:04.276461 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
223 05:41:04.276557 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 05:41:04.276627 Checking files for TFTP limit of 4294967296 bytes.
225 05:41:04.277055 end: 1 tftp-deploy (duration 00:00:22) [common]
226 05:41:04.277162 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 05:41:04.277259 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 05:41:04.277393 substitutions:
229 05:41:04.277465 - {DTB}: None
230 05:41:04.277531 - {INITRD}: 7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
231 05:41:04.277594 - {KERNEL}: 7096678/tftp-deploy-uu81cpg8/kernel/bzImage
232 05:41:04.277663 - {LAVA_MAC}: None
233 05:41:04.277722 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096678/extract-nfsrootfs-r_rbbhcm
234 05:41:04.277782 - {NFS_SERVER_IP}: 192.168.201.1
235 05:41:04.277838 - {PRESEED_CONFIG}: None
236 05:41:04.277905 - {PRESEED_LOCAL}: None
237 05:41:04.277964 - {RAMDISK}: 7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
238 05:41:04.278020 - {ROOT_PART}: None
239 05:41:04.278078 - {ROOT}: None
240 05:41:04.278133 - {SERVER_IP}: 192.168.201.1
241 05:41:04.278200 - {TEE}: None
242 05:41:04.278256 Parsed boot commands:
243 05:41:04.278311 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 05:41:04.278472 Parsed boot commands: tftpboot 192.168.201.1 7096678/tftp-deploy-uu81cpg8/kernel/bzImage 7096678/tftp-deploy-uu81cpg8/kernel/cmdline 7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
245 05:41:04.278571 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 05:41:04.278660 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 05:41:04.278760 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 05:41:04.278852 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 05:41:04.278922 Not connected, no need to disconnect.
250 05:41:04.279007 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 05:41:04.279094 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 05:41:04.279162 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
253 05:41:04.281960 Setting prompt string to ['lava-test: # ']
254 05:41:04.282262 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 05:41:04.282366 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 05:41:04.282464 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 05:41:04.282564 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 05:41:04.282743 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
259 05:41:04.301949 >> Command sent successfully.
260 05:41:04.303868 Returned 0 in 0 seconds
261 05:41:04.404899 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 05:41:04.406207 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 05:41:04.406704 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 05:41:04.407104 Setting prompt string to 'Starting depthcharge on Helios...'
266 05:41:04.407452 Changing prompt to 'Starting depthcharge on Helios...'
267 05:41:04.407799 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 05:41:04.409009 [Enter `^Ec?' for help]
269 05:41:11.204258
270 05:41:11.204407
271 05:41:11.214079 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 05:41:11.217731 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 05:41:11.224045 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 05:41:11.227427 CPU: AES supported, TXT NOT supported, VT supported
275 05:41:11.234103 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 05:41:11.237274 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 05:41:11.243939 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 05:41:11.247842 VBOOT: Loading verstage.
279 05:41:11.250770 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 05:41:11.257681 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 05:41:11.264051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 05:41:11.264133 CBFS @ c08000 size 3f8000
283 05:41:11.270790 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 05:41:11.274077 CBFS: Locating 'fallback/verstage'
285 05:41:11.277447 CBFS: Found @ offset 10fb80 size 1072c
286 05:41:11.281491
287 05:41:11.281574
288 05:41:11.291020 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 05:41:11.305562 Probing TPM: . done!
290 05:41:11.309134 TPM ready after 0 ms
291 05:41:11.312106 Connected to device vid:did:rid of 1ae0:0028:00
292 05:41:11.322536 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 05:41:11.325912 Initialized TPM device CR50 revision 0
294 05:41:11.361781 tlcl_send_startup: Startup return code is 0
295 05:41:11.361867 TPM: setup succeeded
296 05:41:11.374392 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 05:41:11.378514 Chrome EC: UHEPI supported
298 05:41:11.381300 Phase 1
299 05:41:11.385199 FMAP: area GBB found @ c05000 (12288 bytes)
300 05:41:11.392042 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 05:41:11.394651 Phase 2
302 05:41:11.394735 Phase 3
303 05:41:11.398231 FMAP: area GBB found @ c05000 (12288 bytes)
304 05:41:11.404764 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 05:41:11.411211 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 05:41:11.414679 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 05:41:11.421093 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 05:41:11.437053 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 05:41:11.440179 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 05:41:11.446783 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 05:41:11.451028 Phase 4
312 05:41:11.454681 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 05:41:11.461649 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 05:41:11.640419 VB2:vb2_rsa_verify_digest() Digest check failed!
315 05:41:11.643924 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 05:41:11.647384 Saving nvdata
317 05:41:11.651033 Reboot requested (10020007)
318 05:41:11.654660 board_reset() called!
319 05:41:11.654760 full_reset() called!
320 05:41:16.172644
321 05:41:16.173246
322 05:41:16.181797 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 05:41:16.185015 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 05:41:16.191670 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 05:41:16.194819 CPU: AES supported, TXT NOT supported, VT supported
326 05:41:16.201500 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 05:41:16.205060 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 05:41:16.211468 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 05:41:16.214801 VBOOT: Loading verstage.
330 05:41:16.217797 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 05:41:16.224910 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 05:41:16.231538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 05:41:16.232003 CBFS @ c08000 size 3f8000
334 05:41:16.238079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 05:41:16.241408 CBFS: Locating 'fallback/verstage'
336 05:41:16.244791 CBFS: Found @ offset 10fb80 size 1072c
337 05:41:16.248980
338 05:41:16.249444
339 05:41:16.258641 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 05:41:16.273336 Probing TPM: . done!
341 05:41:16.276832 TPM ready after 0 ms
342 05:41:16.279521 Connected to device vid:did:rid of 1ae0:0028:00
343 05:41:16.290106 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 05:41:16.293411 Initialized TPM device CR50 revision 0
345 05:41:16.328754 tlcl_send_startup: Startup return code is 0
346 05:41:16.329332 TPM: setup succeeded
347 05:41:16.341894 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 05:41:16.345227 Chrome EC: UHEPI supported
349 05:41:16.348632 Phase 1
350 05:41:16.351843 FMAP: area GBB found @ c05000 (12288 bytes)
351 05:41:16.358483 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 05:41:16.365519 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 05:41:16.368295 Recovery requested (1009000e)
354 05:41:16.374285 Saving nvdata
355 05:41:16.380391 tlcl_extend: response is 0
356 05:41:16.389266 tlcl_extend: response is 0
357 05:41:16.396128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 05:41:16.399392 CBFS @ c08000 size 3f8000
359 05:41:16.406003 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 05:41:16.409461 CBFS: Locating 'fallback/romstage'
361 05:41:16.412616 CBFS: Found @ offset 80 size 145fc
362 05:41:16.415884 Accumulated console time in verstage 99 ms
363 05:41:16.416355
364 05:41:16.416725
365 05:41:16.429316 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 05:41:16.435828 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 05:41:16.439429 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 05:41:16.442556 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 05:41:16.449173 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 05:41:16.452250 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 05:41:16.456367 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 05:41:16.458948 TCO_STS: 0000 0000
373 05:41:16.462574 GEN_PMCON: e0015238 00000200
374 05:41:16.465705 GBLRST_CAUSE: 00000000 00000000
375 05:41:16.466134 prev_sleep_state 5
376 05:41:16.469219 Boot Count incremented to 36561
377 05:41:16.475796 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 05:41:16.479205 CBFS @ c08000 size 3f8000
379 05:41:16.485808 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 05:41:16.486237 CBFS: Locating 'fspm.bin'
381 05:41:16.492132 CBFS: Found @ offset 5ffc0 size 71000
382 05:41:16.495536 Chrome EC: UHEPI supported
383 05:41:16.502101 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 05:41:16.506201 Probing TPM: done!
385 05:41:16.512359 Connected to device vid:did:rid of 1ae0:0028:00
386 05:41:16.522278 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 05:41:16.528787 Initialized TPM device CR50 revision 0
388 05:41:16.537384 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 05:41:16.544373 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 05:41:16.547338 MRC cache found, size 1948
391 05:41:16.550651 bootmode is set to: 2
392 05:41:16.554153 PRMRR disabled by config.
393 05:41:16.557043 SPD INDEX = 1
394 05:41:16.560634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 05:41:16.564185 CBFS @ c08000 size 3f8000
396 05:41:16.570294 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 05:41:16.570759 CBFS: Locating 'spd.bin'
398 05:41:16.574239 CBFS: Found @ offset 5fb80 size 400
399 05:41:16.577049 SPD: module type is LPDDR3
400 05:41:16.580405 SPD: module part is
401 05:41:16.586920 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 05:41:16.590343 SPD: device width 4 bits, bus width 8 bits
403 05:41:16.593533 SPD: module size is 4096 MB (per channel)
404 05:41:16.597345 memory slot: 0 configuration done.
405 05:41:16.600622 memory slot: 2 configuration done.
406 05:41:16.652156 CBMEM:
407 05:41:16.655507 IMD: root @ 99fff000 254 entries.
408 05:41:16.658662 IMD: root @ 99ffec00 62 entries.
409 05:41:16.661937 External stage cache:
410 05:41:16.665467 IMD: root @ 9abff000 254 entries.
411 05:41:16.668852 IMD: root @ 9abfec00 62 entries.
412 05:41:16.675134 Chrome EC: clear events_b mask to 0x0000000020004000
413 05:41:16.687750 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 05:41:16.701481 tlcl_write: response is 0
415 05:41:16.710370 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 05:41:16.716870 MRC: TPM MRC hash updated successfully.
417 05:41:16.717350 2 DIMMs found
418 05:41:16.720284 SMM Memory Map
419 05:41:16.723397 SMRAM : 0x9a000000 0x1000000
420 05:41:16.726791 Subregion 0: 0x9a000000 0xa00000
421 05:41:16.730079 Subregion 1: 0x9aa00000 0x200000
422 05:41:16.733361 Subregion 2: 0x9ac00000 0x400000
423 05:41:16.736551 top_of_ram = 0x9a000000
424 05:41:16.740218 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 05:41:16.746490 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 05:41:16.750093 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 05:41:16.756889 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 05:41:16.760017 CBFS @ c08000 size 3f8000
429 05:41:16.763343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 05:41:16.766676 CBFS: Locating 'fallback/postcar'
431 05:41:16.773005 CBFS: Found @ offset 107000 size 4b44
432 05:41:16.776632 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 05:41:16.789633 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 05:41:16.792631 Processing 180 relocs. Offset value of 0x97c0c000
435 05:41:16.801096 Accumulated console time in romstage 286 ms
436 05:41:16.801595
437 05:41:16.801994
438 05:41:16.811377 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 05:41:16.817870 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 05:41:16.821060 CBFS @ c08000 size 3f8000
441 05:41:16.824361 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 05:41:16.830834 CBFS: Locating 'fallback/ramstage'
443 05:41:16.834353 CBFS: Found @ offset 43380 size 1b9e8
444 05:41:16.841027 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 05:41:16.872736 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 05:41:16.876281 Processing 3976 relocs. Offset value of 0x98db0000
447 05:41:16.882973 Accumulated console time in postcar 52 ms
448 05:41:16.883483
449 05:41:16.883893
450 05:41:16.892449 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 05:41:16.899180 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 05:41:16.902629 WARNING: RO_VPD is uninitialized or empty.
453 05:41:16.906108 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 05:41:16.912316 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 05:41:16.912803 Normal boot.
456 05:41:16.919661 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 05:41:16.922360 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 05:41:16.925986 CBFS @ c08000 size 3f8000
459 05:41:16.932358 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 05:41:16.936057 CBFS: Locating 'cpu_microcode_blob.bin'
461 05:41:16.938953 CBFS: Found @ offset 14700 size 2ec00
462 05:41:16.942281 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 05:41:16.945510 Skip microcode update
464 05:41:16.952420 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 05:41:16.952889 CBFS @ c08000 size 3f8000
466 05:41:16.958858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 05:41:16.962018 CBFS: Locating 'fsps.bin'
468 05:41:16.965201 CBFS: Found @ offset d1fc0 size 35000
469 05:41:16.991109 Detected 4 core, 8 thread CPU.
470 05:41:16.994553 Setting up SMI for CPU
471 05:41:16.997652 IED base = 0x9ac00000
472 05:41:16.998129 IED size = 0x00400000
473 05:41:17.000920 Will perform SMM setup.
474 05:41:17.007465 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 05:41:17.014348 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 05:41:17.017417 Processing 16 relocs. Offset value of 0x00030000
477 05:41:17.021070 Attempting to start 7 APs
478 05:41:17.024408 Waiting for 10ms after sending INIT.
479 05:41:17.041095 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
480 05:41:17.041583 done.
481 05:41:17.044221 AP: slot 4 apic_id 5.
482 05:41:17.047768 AP: slot 5 apic_id 4.
483 05:41:17.048196 AP: slot 7 apic_id 7.
484 05:41:17.051295 AP: slot 6 apic_id 6.
485 05:41:17.054196 Waiting for 2nd SIPI to complete...done.
486 05:41:17.057332 AP: slot 3 apic_id 3.
487 05:41:17.060636 AP: slot 1 apic_id 2.
488 05:41:17.067581 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 05:41:17.070926 Processing 13 relocs. Offset value of 0x00038000
490 05:41:17.077337 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 05:41:17.084215 Installing SMM handler to 0x9a000000
492 05:41:17.090757 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 05:41:17.094090 Processing 658 relocs. Offset value of 0x9a010000
494 05:41:17.104226 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 05:41:17.107744 Processing 13 relocs. Offset value of 0x9a008000
496 05:41:17.113923 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 05:41:17.120614 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 05:41:17.123850 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 05:41:17.130488 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 05:41:17.137045 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 05:41:17.143556 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 05:41:17.147095 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 05:41:17.153340 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 05:41:17.157105 Clearing SMI status registers
505 05:41:17.160326 SMI_STS: PM1
506 05:41:17.160751 PM1_STS: PWRBTN
507 05:41:17.163838 TCO_STS: SECOND_TO
508 05:41:17.166983 New SMBASE 0x9a000000
509 05:41:17.170320 In relocation handler: CPU 0
510 05:41:17.174059 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 05:41:17.177010 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 05:41:17.180475 Relocation complete.
513 05:41:17.183597 New SMBASE 0x99fff800
514 05:41:17.184071 In relocation handler: CPU 2
515 05:41:17.189713 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 05:41:17.193088 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 05:41:17.196595 Relocation complete.
518 05:41:17.199806 New SMBASE 0x99fff400
519 05:41:17.199890 In relocation handler: CPU 3
520 05:41:17.206530 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
521 05:41:17.209810 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 05:41:17.212858 Relocation complete.
523 05:41:17.212941 New SMBASE 0x99fff000
524 05:41:17.216351 In relocation handler: CPU 4
525 05:41:17.223229 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
526 05:41:17.226372 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 05:41:17.229627 Relocation complete.
528 05:41:17.229709 New SMBASE 0x99ffe800
529 05:41:17.232891 In relocation handler: CPU 6
530 05:41:17.239610 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
531 05:41:17.243024 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 05:41:17.246183 Relocation complete.
533 05:41:17.246266 New SMBASE 0x99ffe400
534 05:41:17.249830 In relocation handler: CPU 7
535 05:41:17.252773 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
536 05:41:17.259622 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 05:41:17.262479 Relocation complete.
538 05:41:17.262562 New SMBASE 0x99fffc00
539 05:41:17.266162 In relocation handler: CPU 1
540 05:41:17.269316 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
541 05:41:17.275904 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 05:41:17.279332 Relocation complete.
543 05:41:17.279415 New SMBASE 0x99ffec00
544 05:41:17.282648 In relocation handler: CPU 5
545 05:41:17.286086 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
546 05:41:17.292727 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 05:41:17.292810 Relocation complete.
548 05:41:17.296420 Initializing CPU #0
549 05:41:17.299115 CPU: vendor Intel device 806ec
550 05:41:17.302869 CPU: family 06, model 8e, stepping 0c
551 05:41:17.305794 Clearing out pending MCEs
552 05:41:17.309001 Setting up local APIC...
553 05:41:17.309083 apic_id: 0x00 done.
554 05:41:17.312225 Turbo is available but hidden
555 05:41:17.315587 Turbo is available and visible
556 05:41:17.318908 VMX status: enabled
557 05:41:17.322238 IA32_FEATURE_CONTROL status: locked
558 05:41:17.325677 Skip microcode update
559 05:41:17.325759 CPU #0 initialized
560 05:41:17.328723 Initializing CPU #2
561 05:41:17.332552 Initializing CPU #6
562 05:41:17.332639 Initializing CPU #5
563 05:41:17.335292 Initializing CPU #4
564 05:41:17.338641 CPU: vendor Intel device 806ec
565 05:41:17.341887 CPU: family 06, model 8e, stepping 0c
566 05:41:17.345986 CPU: vendor Intel device 806ec
567 05:41:17.348562 CPU: family 06, model 8e, stepping 0c
568 05:41:17.352121 Clearing out pending MCEs
569 05:41:17.355329 Clearing out pending MCEs
570 05:41:17.355411 Setting up local APIC...
571 05:41:17.358495 Initializing CPU #3
572 05:41:17.361868 Initializing CPU #1
573 05:41:17.365234 CPU: vendor Intel device 806ec
574 05:41:17.368477 CPU: family 06, model 8e, stepping 0c
575 05:41:17.371997 CPU: vendor Intel device 806ec
576 05:41:17.375487 CPU: family 06, model 8e, stepping 0c
577 05:41:17.378324 Clearing out pending MCEs
578 05:41:17.378407 Clearing out pending MCEs
579 05:41:17.381774 Setting up local APIC...
580 05:41:17.385359 CPU: vendor Intel device 806ec
581 05:41:17.388485 CPU: family 06, model 8e, stepping 0c
582 05:41:17.391647 Clearing out pending MCEs
583 05:41:17.394823 Setting up local APIC...
584 05:41:17.398889 Setting up local APIC...
585 05:41:17.398971 apic_id: 0x04 done.
586 05:41:17.401664 apic_id: 0x05 done.
587 05:41:17.404891 apic_id: 0x02 done.
588 05:41:17.404994 apic_id: 0x03 done.
589 05:41:17.408161 VMX status: enabled
590 05:41:17.408243 VMX status: enabled
591 05:41:17.411781 Setting up local APIC...
592 05:41:17.415148 IA32_FEATURE_CONTROL status: locked
593 05:41:17.418697 IA32_FEATURE_CONTROL status: locked
594 05:41:17.421835 Skip microcode update
595 05:41:17.425193 Skip microcode update
596 05:41:17.425274 CPU #3 initialized
597 05:41:17.428259 CPU #1 initialized
598 05:41:17.428343 VMX status: enabled
599 05:41:17.431558 VMX status: enabled
600 05:41:17.434997 IA32_FEATURE_CONTROL status: locked
601 05:41:17.438261 IA32_FEATURE_CONTROL status: locked
602 05:41:17.441578 Skip microcode update
603 05:41:17.444939 apic_id: 0x01 done.
604 05:41:17.445043 Initializing CPU #7
605 05:41:17.447982 CPU: vendor Intel device 806ec
606 05:41:17.451618 CPU: family 06, model 8e, stepping 0c
607 05:41:17.454699 CPU: vendor Intel device 806ec
608 05:41:17.458205 CPU: family 06, model 8e, stepping 0c
609 05:41:17.461655 Clearing out pending MCEs
610 05:41:17.464841 Clearing out pending MCEs
611 05:41:17.467997 Setting up local APIC...
612 05:41:17.468121 Skip microcode update
613 05:41:17.471357 VMX status: enabled
614 05:41:17.474455 Setting up local APIC...
615 05:41:17.474614 CPU #5 initialized
616 05:41:17.478329 CPU #4 initialized
617 05:41:17.481505 apic_id: 0x06 done.
618 05:41:17.481700 apic_id: 0x07 done.
619 05:41:17.484835 VMX status: enabled
620 05:41:17.487987 VMX status: enabled
621 05:41:17.491140 IA32_FEATURE_CONTROL status: locked
622 05:41:17.494658 IA32_FEATURE_CONTROL status: locked
623 05:41:17.495021 Skip microcode update
624 05:41:17.498260 Skip microcode update
625 05:41:17.501378 CPU #6 initialized
626 05:41:17.501798 CPU #7 initialized
627 05:41:17.505422 IA32_FEATURE_CONTROL status: locked
628 05:41:17.508133 Skip microcode update
629 05:41:17.511304 CPU #2 initialized
630 05:41:17.514539 bsp_do_flight_plan done after 457 msecs.
631 05:41:17.518063 CPU: frequency set to 4200 MHz
632 05:41:17.518535 Enabling SMIs.
633 05:41:17.521390 Locking SMM.
634 05:41:17.535147 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 05:41:17.538446 CBFS @ c08000 size 3f8000
636 05:41:17.544847 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 05:41:17.545355 CBFS: Locating 'vbt.bin'
638 05:41:17.551656 CBFS: Found @ offset 5f5c0 size 499
639 05:41:17.554729 Found a VBT of 4608 bytes after decompression
640 05:41:17.739530 Display FSP Version Info HOB
641 05:41:17.742896 Reference Code - CPU = 9.0.1e.30
642 05:41:17.746157 uCode Version = 0.0.0.ca
643 05:41:17.749597 TXT ACM version = ff.ff.ff.ffff
644 05:41:17.752886 Display FSP Version Info HOB
645 05:41:17.756132 Reference Code - ME = 9.0.1e.30
646 05:41:17.759235 MEBx version = 0.0.0.0
647 05:41:17.762721 ME Firmware Version = Consumer SKU
648 05:41:17.766187 Display FSP Version Info HOB
649 05:41:17.769280 Reference Code - CML PCH = 9.0.1e.30
650 05:41:17.772971 PCH-CRID Status = Disabled
651 05:41:17.775735 PCH-CRID Original Value = ff.ff.ff.ffff
652 05:41:17.779189 PCH-CRID New Value = ff.ff.ff.ffff
653 05:41:17.782512 OPROM - RST - RAID = ff.ff.ff.ffff
654 05:41:17.785534 ChipsetInit Base Version = ff.ff.ff.ffff
655 05:41:17.788888 ChipsetInit Oem Version = ff.ff.ff.ffff
656 05:41:17.792319 Display FSP Version Info HOB
657 05:41:17.798678 Reference Code - SA - System Agent = 9.0.1e.30
658 05:41:17.802500 Reference Code - MRC = 0.7.1.6c
659 05:41:17.805642 SA - PCIe Version = 9.0.1e.30
660 05:41:17.805724 SA-CRID Status = Disabled
661 05:41:17.808934 SA-CRID Original Value = 0.0.0.c
662 05:41:17.812146 SA-CRID New Value = 0.0.0.c
663 05:41:17.815554 OPROM - VBIOS = ff.ff.ff.ffff
664 05:41:17.818620 RTC Init
665 05:41:17.821925 Set power on after power failure.
666 05:41:17.822008 Disabling Deep S3
667 05:41:17.825254 Disabling Deep S3
668 05:41:17.825337 Disabling Deep S4
669 05:41:17.828495 Disabling Deep S4
670 05:41:17.831789 Disabling Deep S5
671 05:41:17.831871 Disabling Deep S5
672 05:41:17.838405 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
673 05:41:17.838488 Enumerating buses...
674 05:41:17.845211 Show all devs... Before device enumeration.
675 05:41:17.845293 Root Device: enabled 1
676 05:41:17.848486 CPU_CLUSTER: 0: enabled 1
677 05:41:17.851786 DOMAIN: 0000: enabled 1
678 05:41:17.855293 APIC: 00: enabled 1
679 05:41:17.855376 PCI: 00:00.0: enabled 1
680 05:41:17.858832 PCI: 00:02.0: enabled 1
681 05:41:17.861759 PCI: 00:04.0: enabled 0
682 05:41:17.864998 PCI: 00:05.0: enabled 0
683 05:41:17.865080 PCI: 00:12.0: enabled 1
684 05:41:17.868603 PCI: 00:12.5: enabled 0
685 05:41:17.871533 PCI: 00:12.6: enabled 0
686 05:41:17.874838 PCI: 00:14.0: enabled 1
687 05:41:17.874920 PCI: 00:14.1: enabled 0
688 05:41:17.878256 PCI: 00:14.3: enabled 1
689 05:41:17.881481 PCI: 00:14.5: enabled 0
690 05:41:17.881563 PCI: 00:15.0: enabled 1
691 05:41:17.884941 PCI: 00:15.1: enabled 1
692 05:41:17.888428 PCI: 00:15.2: enabled 0
693 05:41:17.891490 PCI: 00:15.3: enabled 0
694 05:41:17.891572 PCI: 00:16.0: enabled 1
695 05:41:17.894578 PCI: 00:16.1: enabled 0
696 05:41:17.897965 PCI: 00:16.2: enabled 0
697 05:41:17.901395 PCI: 00:16.3: enabled 0
698 05:41:17.901477 PCI: 00:16.4: enabled 0
699 05:41:17.904893 PCI: 00:16.5: enabled 0
700 05:41:17.908062 PCI: 00:17.0: enabled 1
701 05:41:17.911612 PCI: 00:19.0: enabled 1
702 05:41:17.911695 PCI: 00:19.1: enabled 0
703 05:41:17.914643 PCI: 00:19.2: enabled 0
704 05:41:17.917779 PCI: 00:1a.0: enabled 0
705 05:41:17.921198 PCI: 00:1c.0: enabled 0
706 05:41:17.921280 PCI: 00:1c.1: enabled 0
707 05:41:17.924658 PCI: 00:1c.2: enabled 0
708 05:41:17.928054 PCI: 00:1c.3: enabled 0
709 05:41:17.928136 PCI: 00:1c.4: enabled 0
710 05:41:17.931062 PCI: 00:1c.5: enabled 0
711 05:41:17.934480 PCI: 00:1c.6: enabled 0
712 05:41:17.937815 PCI: 00:1c.7: enabled 0
713 05:41:17.937898 PCI: 00:1d.0: enabled 1
714 05:41:17.941410 PCI: 00:1d.1: enabled 0
715 05:41:17.944927 PCI: 00:1d.2: enabled 0
716 05:41:17.948036 PCI: 00:1d.3: enabled 0
717 05:41:17.948140 PCI: 00:1d.4: enabled 0
718 05:41:17.951217 PCI: 00:1d.5: enabled 1
719 05:41:17.954507 PCI: 00:1e.0: enabled 1
720 05:41:17.958240 PCI: 00:1e.1: enabled 0
721 05:41:17.958355 PCI: 00:1e.2: enabled 1
722 05:41:17.961530 PCI: 00:1e.3: enabled 1
723 05:41:17.964862 PCI: 00:1f.0: enabled 1
724 05:41:17.965026 PCI: 00:1f.1: enabled 1
725 05:41:17.967709 PCI: 00:1f.2: enabled 1
726 05:41:17.971268 PCI: 00:1f.3: enabled 1
727 05:41:17.974625 PCI: 00:1f.4: enabled 1
728 05:41:17.974805 PCI: 00:1f.5: enabled 1
729 05:41:17.977680 PCI: 00:1f.6: enabled 0
730 05:41:17.980990 USB0 port 0: enabled 1
731 05:41:17.981189 I2C: 00:15: enabled 1
732 05:41:17.984554 I2C: 00:5d: enabled 1
733 05:41:17.987811 GENERIC: 0.0: enabled 1
734 05:41:17.991703 I2C: 00:1a: enabled 1
735 05:41:17.992012 I2C: 00:38: enabled 1
736 05:41:17.994899 I2C: 00:39: enabled 1
737 05:41:17.997716 I2C: 00:3a: enabled 1
738 05:41:17.998116 I2C: 00:3b: enabled 1
739 05:41:18.001621 PCI: 00:00.0: enabled 1
740 05:41:18.004627 SPI: 00: enabled 1
741 05:41:18.005225 SPI: 01: enabled 1
742 05:41:18.007727 PNP: 0c09.0: enabled 1
743 05:41:18.011711 USB2 port 0: enabled 1
744 05:41:18.012188 USB2 port 1: enabled 1
745 05:41:18.014749 USB2 port 2: enabled 0
746 05:41:18.018247 USB2 port 3: enabled 0
747 05:41:18.018829 USB2 port 5: enabled 0
748 05:41:18.021270 USB2 port 6: enabled 1
749 05:41:18.024686 USB2 port 9: enabled 1
750 05:41:18.027900 USB3 port 0: enabled 1
751 05:41:18.028478 USB3 port 1: enabled 1
752 05:41:18.031244 USB3 port 2: enabled 1
753 05:41:18.034610 USB3 port 3: enabled 1
754 05:41:18.035107 USB3 port 4: enabled 0
755 05:41:18.037838 APIC: 02: enabled 1
756 05:41:18.041467 APIC: 01: enabled 1
757 05:41:18.042048 APIC: 03: enabled 1
758 05:41:18.044703 APIC: 05: enabled 1
759 05:41:18.045209 APIC: 04: enabled 1
760 05:41:18.047818 APIC: 06: enabled 1
761 05:41:18.051285 APIC: 07: enabled 1
762 05:41:18.051894 Compare with tree...
763 05:41:18.054975 Root Device: enabled 1
764 05:41:18.057872 CPU_CLUSTER: 0: enabled 1
765 05:41:18.061062 APIC: 00: enabled 1
766 05:41:18.061636 APIC: 02: enabled 1
767 05:41:18.064859 APIC: 01: enabled 1
768 05:41:18.067616 APIC: 03: enabled 1
769 05:41:18.068091 APIC: 05: enabled 1
770 05:41:18.070925 APIC: 04: enabled 1
771 05:41:18.074353 APIC: 06: enabled 1
772 05:41:18.074929 APIC: 07: enabled 1
773 05:41:18.077437 DOMAIN: 0000: enabled 1
774 05:41:18.081190 PCI: 00:00.0: enabled 1
775 05:41:18.084410 PCI: 00:02.0: enabled 1
776 05:41:18.085015 PCI: 00:04.0: enabled 0
777 05:41:18.088050 PCI: 00:05.0: enabled 0
778 05:41:18.091148 PCI: 00:12.0: enabled 1
779 05:41:18.093966 PCI: 00:12.5: enabled 0
780 05:41:18.097651 PCI: 00:12.6: enabled 0
781 05:41:18.098237 PCI: 00:14.0: enabled 1
782 05:41:18.100879 USB0 port 0: enabled 1
783 05:41:18.103875 USB2 port 0: enabled 1
784 05:41:18.107250 USB2 port 1: enabled 1
785 05:41:18.110851 USB2 port 2: enabled 0
786 05:41:18.111329 USB2 port 3: enabled 0
787 05:41:18.114118 USB2 port 5: enabled 0
788 05:41:18.117754 USB2 port 6: enabled 1
789 05:41:18.120702 USB2 port 9: enabled 1
790 05:41:18.124010 USB3 port 0: enabled 1
791 05:41:18.127374 USB3 port 1: enabled 1
792 05:41:18.127948 USB3 port 2: enabled 1
793 05:41:18.130858 USB3 port 3: enabled 1
794 05:41:18.134598 USB3 port 4: enabled 0
795 05:41:18.137388 PCI: 00:14.1: enabled 0
796 05:41:18.140778 PCI: 00:14.3: enabled 1
797 05:41:18.141291 PCI: 00:14.5: enabled 0
798 05:41:18.144275 PCI: 00:15.0: enabled 1
799 05:41:18.147605 I2C: 00:15: enabled 1
800 05:41:18.150555 PCI: 00:15.1: enabled 1
801 05:41:18.151035 I2C: 00:5d: enabled 1
802 05:41:18.154353 GENERIC: 0.0: enabled 1
803 05:41:18.157577 PCI: 00:15.2: enabled 0
804 05:41:18.160678 PCI: 00:15.3: enabled 0
805 05:41:18.164028 PCI: 00:16.0: enabled 1
806 05:41:18.164615 PCI: 00:16.1: enabled 0
807 05:41:18.167614 PCI: 00:16.2: enabled 0
808 05:41:18.170589 PCI: 00:16.3: enabled 0
809 05:41:18.174110 PCI: 00:16.4: enabled 0
810 05:41:18.178017 PCI: 00:16.5: enabled 0
811 05:41:18.178593 PCI: 00:17.0: enabled 1
812 05:41:18.180905 PCI: 00:19.0: enabled 1
813 05:41:18.184230 I2C: 00:1a: enabled 1
814 05:41:18.187284 I2C: 00:38: enabled 1
815 05:41:18.187861 I2C: 00:39: enabled 1
816 05:41:18.190692 I2C: 00:3a: enabled 1
817 05:41:18.193989 I2C: 00:3b: enabled 1
818 05:41:18.197364 PCI: 00:19.1: enabled 0
819 05:41:18.200575 PCI: 00:19.2: enabled 0
820 05:41:18.201175 PCI: 00:1a.0: enabled 0
821 05:41:18.204222 PCI: 00:1c.0: enabled 0
822 05:41:18.207151 PCI: 00:1c.1: enabled 0
823 05:41:18.210270 PCI: 00:1c.2: enabled 0
824 05:41:18.213632 PCI: 00:1c.3: enabled 0
825 05:41:18.214108 PCI: 00:1c.4: enabled 0
826 05:41:18.217213 PCI: 00:1c.5: enabled 0
827 05:41:18.220599 PCI: 00:1c.6: enabled 0
828 05:41:18.223530 PCI: 00:1c.7: enabled 0
829 05:41:18.224010 PCI: 00:1d.0: enabled 1
830 05:41:18.227438 PCI: 00:1d.1: enabled 0
831 05:41:18.230315 PCI: 00:1d.2: enabled 0
832 05:41:18.233791 PCI: 00:1d.3: enabled 0
833 05:41:18.236979 PCI: 00:1d.4: enabled 0
834 05:41:18.237571 PCI: 00:1d.5: enabled 1
835 05:41:18.240162 PCI: 00:00.0: enabled 1
836 05:41:18.243925 PCI: 00:1e.0: enabled 1
837 05:41:18.246995 PCI: 00:1e.1: enabled 0
838 05:41:18.250051 PCI: 00:1e.2: enabled 1
839 05:41:18.250530 SPI: 00: enabled 1
840 05:41:18.254116 PCI: 00:1e.3: enabled 1
841 05:41:18.257119 SPI: 01: enabled 1
842 05:41:18.260264 PCI: 00:1f.0: enabled 1
843 05:41:18.260835 PNP: 0c09.0: enabled 1
844 05:41:18.263529 PCI: 00:1f.1: enabled 1
845 05:41:18.266742 PCI: 00:1f.2: enabled 1
846 05:41:18.270127 PCI: 00:1f.3: enabled 1
847 05:41:18.273108 PCI: 00:1f.4: enabled 1
848 05:41:18.273647 PCI: 00:1f.5: enabled 1
849 05:41:18.276773 PCI: 00:1f.6: enabled 0
850 05:41:18.280157 Root Device scanning...
851 05:41:18.283583 scan_static_bus for Root Device
852 05:41:18.286607 CPU_CLUSTER: 0 enabled
853 05:41:18.287113 DOMAIN: 0000 enabled
854 05:41:18.290345 DOMAIN: 0000 scanning...
855 05:41:18.293147 PCI: pci_scan_bus for bus 00
856 05:41:18.296687 PCI: 00:00.0 [8086/0000] ops
857 05:41:18.299899 PCI: 00:00.0 [8086/9b61] enabled
858 05:41:18.303581 PCI: 00:02.0 [8086/0000] bus ops
859 05:41:18.306720 PCI: 00:02.0 [8086/9b41] enabled
860 05:41:18.309769 PCI: 00:04.0 [8086/1903] disabled
861 05:41:18.313060 PCI: 00:08.0 [8086/1911] enabled
862 05:41:18.316511 PCI: 00:12.0 [8086/02f9] enabled
863 05:41:18.320239 PCI: 00:14.0 [8086/0000] bus ops
864 05:41:18.323583 PCI: 00:14.0 [8086/02ed] enabled
865 05:41:18.326615 PCI: 00:14.2 [8086/02ef] enabled
866 05:41:18.330248 PCI: 00:14.3 [8086/02f0] enabled
867 05:41:18.333316 PCI: 00:15.0 [8086/0000] bus ops
868 05:41:18.336340 PCI: 00:15.0 [8086/02e8] enabled
869 05:41:18.340167 PCI: 00:15.1 [8086/0000] bus ops
870 05:41:18.343089 PCI: 00:15.1 [8086/02e9] enabled
871 05:41:18.346670 PCI: 00:16.0 [8086/0000] ops
872 05:41:18.349988 PCI: 00:16.0 [8086/02e0] enabled
873 05:41:18.352758 PCI: 00:17.0 [8086/0000] ops
874 05:41:18.356756 PCI: 00:17.0 [8086/02d3] enabled
875 05:41:18.359934 PCI: 00:19.0 [8086/0000] bus ops
876 05:41:18.363094 PCI: 00:19.0 [8086/02c5] enabled
877 05:41:18.366577 PCI: 00:1d.0 [8086/0000] bus ops
878 05:41:18.369621 PCI: 00:1d.0 [8086/02b0] enabled
879 05:41:18.376782 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 05:41:18.377409 PCI: 00:1e.0 [8086/0000] ops
881 05:41:18.379537 PCI: 00:1e.0 [8086/02a8] enabled
882 05:41:18.383147 PCI: 00:1e.2 [8086/0000] bus ops
883 05:41:18.386444 PCI: 00:1e.2 [8086/02aa] enabled
884 05:41:18.389754 PCI: 00:1e.3 [8086/0000] bus ops
885 05:41:18.393141 PCI: 00:1e.3 [8086/02ab] enabled
886 05:41:18.395902 PCI: 00:1f.0 [8086/0000] bus ops
887 05:41:18.399506 PCI: 00:1f.0 [8086/0284] enabled
888 05:41:18.406120 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 05:41:18.412874 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 05:41:18.416139 PCI: 00:1f.3 [8086/0000] bus ops
891 05:41:18.419590 PCI: 00:1f.3 [8086/02c8] enabled
892 05:41:18.423050 PCI: 00:1f.4 [8086/0000] bus ops
893 05:41:18.426063 PCI: 00:1f.4 [8086/02a3] enabled
894 05:41:18.429308 PCI: 00:1f.5 [8086/0000] bus ops
895 05:41:18.432665 PCI: 00:1f.5 [8086/02a4] enabled
896 05:41:18.436390 PCI: Leftover static devices:
897 05:41:18.436995 PCI: 00:05.0
898 05:41:18.439669 PCI: 00:12.5
899 05:41:18.440333 PCI: 00:12.6
900 05:41:18.440715 PCI: 00:14.1
901 05:41:18.443215 PCI: 00:14.5
902 05:41:18.443797 PCI: 00:15.2
903 05:41:18.445699 PCI: 00:15.3
904 05:41:18.446174 PCI: 00:16.1
905 05:41:18.446547 PCI: 00:16.2
906 05:41:18.449478 PCI: 00:16.3
907 05:41:18.450060 PCI: 00:16.4
908 05:41:18.453262 PCI: 00:16.5
909 05:41:18.453839 PCI: 00:19.1
910 05:41:18.454213 PCI: 00:19.2
911 05:41:18.456069 PCI: 00:1a.0
912 05:41:18.456652 PCI: 00:1c.0
913 05:41:18.459467 PCI: 00:1c.1
914 05:41:18.460042 PCI: 00:1c.2
915 05:41:18.460420 PCI: 00:1c.3
916 05:41:18.462859 PCI: 00:1c.4
917 05:41:18.463444 PCI: 00:1c.5
918 05:41:18.465920 PCI: 00:1c.6
919 05:41:18.466397 PCI: 00:1c.7
920 05:41:18.469194 PCI: 00:1d.1
921 05:41:18.469770 PCI: 00:1d.2
922 05:41:18.470152 PCI: 00:1d.3
923 05:41:18.472986 PCI: 00:1d.4
924 05:41:18.473500 PCI: 00:1d.5
925 05:41:18.475906 PCI: 00:1e.1
926 05:41:18.476487 PCI: 00:1f.1
927 05:41:18.476913 PCI: 00:1f.2
928 05:41:18.479169 PCI: 00:1f.6
929 05:41:18.482485 PCI: Check your devicetree.cb.
930 05:41:18.485919 PCI: 00:02.0 scanning...
931 05:41:18.489286 scan_generic_bus for PCI: 00:02.0
932 05:41:18.492393 scan_generic_bus for PCI: 00:02.0 done
933 05:41:18.499123 scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
934 05:41:18.499707 PCI: 00:14.0 scanning...
935 05:41:18.502433 scan_static_bus for PCI: 00:14.0
936 05:41:18.505683 USB0 port 0 enabled
937 05:41:18.508994 USB0 port 0 scanning...
938 05:41:18.512474 scan_static_bus for USB0 port 0
939 05:41:18.512985 USB2 port 0 enabled
940 05:41:18.515480 USB2 port 1 enabled
941 05:41:18.519090 USB2 port 2 disabled
942 05:41:18.519657 USB2 port 3 disabled
943 05:41:18.522674 USB2 port 5 disabled
944 05:41:18.525275 USB2 port 6 enabled
945 05:41:18.525768 USB2 port 9 enabled
946 05:41:18.528913 USB3 port 0 enabled
947 05:41:18.529540 USB3 port 1 enabled
948 05:41:18.532834 USB3 port 2 enabled
949 05:41:18.535429 USB3 port 3 enabled
950 05:41:18.535906 USB3 port 4 disabled
951 05:41:18.538936 USB2 port 0 scanning...
952 05:41:18.542112 scan_static_bus for USB2 port 0
953 05:41:18.545646 scan_static_bus for USB2 port 0 done
954 05:41:18.552293 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
955 05:41:18.555702 USB2 port 1 scanning...
956 05:41:18.559343 scan_static_bus for USB2 port 1
957 05:41:18.561972 scan_static_bus for USB2 port 1 done
958 05:41:18.565508 scan_bus: scanning of bus USB2 port 1 took 9712 usecs
959 05:41:18.569163 USB2 port 6 scanning...
960 05:41:18.571845 scan_static_bus for USB2 port 6
961 05:41:18.575720 scan_static_bus for USB2 port 6 done
962 05:41:18.581543 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
963 05:41:18.585362 USB2 port 9 scanning...
964 05:41:18.588933 scan_static_bus for USB2 port 9
965 05:41:18.591798 scan_static_bus for USB2 port 9 done
966 05:41:18.595237 scan_bus: scanning of bus USB2 port 9 took 9712 usecs
967 05:41:18.598764 USB3 port 0 scanning...
968 05:41:18.602421 scan_static_bus for USB3 port 0
969 05:41:18.605374 scan_static_bus for USB3 port 0 done
970 05:41:18.611920 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
971 05:41:18.614956 USB3 port 1 scanning...
972 05:41:18.618595 scan_static_bus for USB3 port 1
973 05:41:18.621717 scan_static_bus for USB3 port 1 done
974 05:41:18.625296 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
975 05:41:18.629261 USB3 port 2 scanning...
976 05:41:18.631930 scan_static_bus for USB3 port 2
977 05:41:18.635309 scan_static_bus for USB3 port 2 done
978 05:41:18.641587 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
979 05:41:18.645163 USB3 port 3 scanning...
980 05:41:18.648436 scan_static_bus for USB3 port 3
981 05:41:18.651556 scan_static_bus for USB3 port 3 done
982 05:41:18.654998 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
983 05:41:18.661555 scan_static_bus for USB0 port 0 done
984 05:41:18.665145 scan_bus: scanning of bus USB0 port 0 took 155432 usecs
985 05:41:18.668069 scan_static_bus for PCI: 00:14.0 done
986 05:41:18.675057 scan_bus: scanning of bus PCI: 00:14.0 took 173063 usecs
987 05:41:18.678647 PCI: 00:15.0 scanning...
988 05:41:18.681417 scan_generic_bus for PCI: 00:15.0
989 05:41:18.684934 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 05:41:18.688090 scan_generic_bus for PCI: 00:15.0 done
991 05:41:18.694697 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
992 05:41:18.698318 PCI: 00:15.1 scanning...
993 05:41:18.701310 scan_generic_bus for PCI: 00:15.1
994 05:41:18.704916 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 05:41:18.707976 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 05:41:18.714446 scan_generic_bus for PCI: 00:15.1 done
997 05:41:18.717891 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
998 05:41:18.721541 PCI: 00:19.0 scanning...
999 05:41:18.724889 scan_generic_bus for PCI: 00:19.0
1000 05:41:18.728012 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 05:41:18.734751 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 05:41:18.738163 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 05:41:18.741374 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 05:41:18.744996 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 05:41:18.751342 scan_generic_bus for PCI: 00:19.0 done
1006 05:41:18.754740 scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
1007 05:41:18.757888 PCI: 00:1d.0 scanning...
1008 05:41:18.761070 do_pci_scan_bridge for PCI: 00:1d.0
1009 05:41:18.764528 PCI: pci_scan_bus for bus 01
1010 05:41:18.767691 PCI: 01:00.0 [1c5c/1327] enabled
1011 05:41:18.771005 Enabling Common Clock Configuration
1012 05:41:18.774411 L1 Sub-State supported from root port 29
1013 05:41:18.777672 L1 Sub-State Support = 0xf
1014 05:41:18.781175 CommonModeRestoreTime = 0x28
1015 05:41:18.787544 Power On Value = 0x16, Power On Scale = 0x0
1016 05:41:18.788024 ASPM: Enabled L1
1017 05:41:18.794179 scan_bus: scanning of bus PCI: 00:1d.0 took 32807 usecs
1018 05:41:18.794661 PCI: 00:1e.2 scanning...
1019 05:41:18.801080 scan_generic_bus for PCI: 00:1e.2
1020 05:41:18.804308 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 05:41:18.807827 scan_generic_bus for PCI: 00:1e.2 done
1022 05:41:18.814358 scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs
1023 05:41:18.814613 PCI: 00:1e.3 scanning...
1024 05:41:18.817246 scan_generic_bus for PCI: 00:1e.3
1025 05:41:18.823868 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 05:41:18.827567 scan_generic_bus for PCI: 00:1e.3 done
1027 05:41:18.830409 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1028 05:41:18.833754 PCI: 00:1f.0 scanning...
1029 05:41:18.837154 scan_static_bus for PCI: 00:1f.0
1030 05:41:18.840679 PNP: 0c09.0 enabled
1031 05:41:18.843706 scan_static_bus for PCI: 00:1f.0 done
1032 05:41:18.850354 scan_bus: scanning of bus PCI: 00:1f.0 took 12065 usecs
1033 05:41:18.850446 PCI: 00:1f.3 scanning...
1034 05:41:18.857279 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1035 05:41:18.861321 PCI: 00:1f.4 scanning...
1036 05:41:18.864445 scan_generic_bus for PCI: 00:1f.4
1037 05:41:18.867417 scan_generic_bus for PCI: 00:1f.4 done
1038 05:41:18.873982 scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
1039 05:41:18.877349 PCI: 00:1f.5 scanning...
1040 05:41:18.880721 scan_generic_bus for PCI: 00:1f.5
1041 05:41:18.883773 scan_generic_bus for PCI: 00:1f.5 done
1042 05:41:18.890551 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1043 05:41:18.893738 scan_bus: scanning of bus DOMAIN: 0000 took 605208 usecs
1044 05:41:18.897084 scan_static_bus for Root Device done
1045 05:41:18.903500 scan_bus: scanning of bus Root Device took 625093 usecs
1046 05:41:18.903590 done
1047 05:41:18.906837 Chrome EC: UHEPI supported
1048 05:41:18.913643 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 05:41:18.920196 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 05:41:18.927008 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 05:41:18.933690 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 05:41:18.937596 SPI flash protection: WPSW=0 SRP0=0
1053 05:41:18.940256 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 05:41:18.946808 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 05:41:18.950124 found VGA at PCI: 00:02.0
1056 05:41:18.953529 Setting up VGA for PCI: 00:02.0
1057 05:41:18.956865 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 05:41:18.963337 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 05:41:18.966507 Allocating resources...
1060 05:41:18.966603 Reading resources...
1061 05:41:18.973620 Root Device read_resources bus 0 link: 0
1062 05:41:18.976685 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 05:41:18.983213 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 05:41:18.987046 DOMAIN: 0000 read_resources bus 0 link: 0
1065 05:41:18.993292 PCI: 00:14.0 read_resources bus 0 link: 0
1066 05:41:18.996522 USB0 port 0 read_resources bus 0 link: 0
1067 05:41:19.004370 USB0 port 0 read_resources bus 0 link: 0 done
1068 05:41:19.007595 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 05:41:19.015402 PCI: 00:15.0 read_resources bus 1 link: 0
1070 05:41:19.018099 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 05:41:19.025275 PCI: 00:15.1 read_resources bus 2 link: 0
1072 05:41:19.028181 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 05:41:19.035763 PCI: 00:19.0 read_resources bus 3 link: 0
1074 05:41:19.042858 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 05:41:19.045799 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 05:41:19.052601 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 05:41:19.055726 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 05:41:19.062253 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 05:41:19.065627 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 05:41:19.071977 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 05:41:19.075352 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 05:41:19.081979 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 05:41:19.088578 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 05:41:19.092350 Root Device read_resources bus 0 link: 0 done
1085 05:41:19.095664 Done reading resources.
1086 05:41:19.098723 Show resources in subtree (Root Device)...After reading.
1087 05:41:19.105416 Root Device child on link 0 CPU_CLUSTER: 0
1088 05:41:19.108530 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 05:41:19.108604 APIC: 00
1090 05:41:19.112037 APIC: 02
1091 05:41:19.112114 APIC: 01
1092 05:41:19.115549 APIC: 03
1093 05:41:19.115630 APIC: 05
1094 05:41:19.115692 APIC: 04
1095 05:41:19.118765 APIC: 06
1096 05:41:19.118836 APIC: 07
1097 05:41:19.122122 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 05:41:19.131617 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 05:41:19.189564 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 05:41:19.190258 PCI: 00:00.0
1101 05:41:19.191216 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 05:41:19.191723 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 05:41:19.192456 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 05:41:19.192832 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 05:41:19.238705 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 05:41:19.239399 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 05:41:19.240305 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 05:41:19.240775 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 05:41:19.241644 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 05:41:19.242024 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 05:41:19.288271 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 05:41:19.288877 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 05:41:19.289920 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 05:41:19.290336 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 05:41:19.290696 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 05:41:19.338221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 05:41:19.338920 PCI: 00:02.0
1118 05:41:19.339337 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 05:41:19.340305 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 05:41:19.340720 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 05:41:19.341127 PCI: 00:04.0
1122 05:41:19.341469 PCI: 00:08.0
1123 05:41:19.341789 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 05:41:19.351785 PCI: 00:12.0
1125 05:41:19.352784 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 05:41:19.354691 PCI: 00:14.0 child on link 0 USB0 port 0
1127 05:41:19.364654 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 05:41:19.368002 USB0 port 0 child on link 0 USB2 port 0
1129 05:41:19.371653 USB2 port 0
1130 05:41:19.372223 USB2 port 1
1131 05:41:19.375021 USB2 port 2
1132 05:41:19.375527 USB2 port 3
1133 05:41:19.378546 USB2 port 5
1134 05:41:19.379115 USB2 port 6
1135 05:41:19.381580 USB2 port 9
1136 05:41:19.382053 USB3 port 0
1137 05:41:19.385077 USB3 port 1
1138 05:41:19.388161 USB3 port 2
1139 05:41:19.388727 USB3 port 3
1140 05:41:19.391363 USB3 port 4
1141 05:41:19.391930 PCI: 00:14.2
1142 05:41:19.401490 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 05:41:19.411399 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 05:41:19.414480 PCI: 00:14.3
1145 05:41:19.424425 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 05:41:19.427740 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 05:41:19.438096 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 05:41:19.438672 I2C: 01:15
1149 05:41:19.444295 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 05:41:19.454305 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 05:41:19.454873 I2C: 02:5d
1152 05:41:19.457445 GENERIC: 0.0
1153 05:41:19.457918 PCI: 00:16.0
1154 05:41:19.467620 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 05:41:19.471098 PCI: 00:17.0
1156 05:41:19.477757 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 05:41:19.487531 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 05:41:19.497482 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 05:41:19.504095 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 05:41:19.513901 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 05:41:19.520251 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 05:41:19.526988 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 05:41:19.537447 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 05:41:19.538010 I2C: 03:1a
1165 05:41:19.540563 I2C: 03:38
1166 05:41:19.541171 I2C: 03:39
1167 05:41:19.543843 I2C: 03:3a
1168 05:41:19.544406 I2C: 03:3b
1169 05:41:19.546972 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 05:41:19.557094 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 05:41:19.566734 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 05:41:19.576635 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 05:41:19.577232 PCI: 01:00.0
1174 05:41:19.586623 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 05:41:19.590313 PCI: 00:1e.0
1176 05:41:19.599919 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 05:41:19.609579 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 05:41:19.613180 PCI: 00:1e.2 child on link 0 SPI: 00
1179 05:41:19.623428 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 05:41:19.626572 SPI: 00
1181 05:41:19.630058 PCI: 00:1e.3 child on link 0 SPI: 01
1182 05:41:19.639708 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 05:41:19.640282 SPI: 01
1184 05:41:19.646255 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 05:41:19.653088 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 05:41:19.662953 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 05:41:19.663526 PNP: 0c09.0
1188 05:41:19.673121 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 05:41:19.675938 PCI: 00:1f.3
1190 05:41:19.686304 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 05:41:19.695716 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 05:41:19.696290 PCI: 00:1f.4
1193 05:41:19.705731 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 05:41:19.715289 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 05:41:19.715786 PCI: 00:1f.5
1196 05:41:19.725733 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 05:41:19.732297 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 05:41:19.739075 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 05:41:19.745161 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 05:41:19.749003 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 05:41:19.752195 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 05:41:19.755428 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 05:41:19.759033 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 05:41:19.765755 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 05:41:19.771835 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 05:41:19.782126 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 05:41:19.788685 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 05:41:19.795678 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 05:41:19.798713 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 05:41:19.808419 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 05:41:19.811487 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 05:41:19.818531 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 05:41:19.821749 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 05:41:19.828302 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 05:41:19.831958 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 05:41:19.838301 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 05:41:19.841506 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 05:41:19.848345 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 05:41:19.851855 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 05:41:19.855347 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 05:41:19.861531 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 05:41:19.865283 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 05:41:19.871473 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 05:41:19.874627 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 05:41:19.881174 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 05:41:19.885116 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 05:41:19.891593 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 05:41:19.894754 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 05:41:19.901394 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 05:41:19.904378 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 05:41:19.911317 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 05:41:19.914090 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 05:41:19.921497 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 05:41:19.927289 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 05:41:19.930702 avoid_fixed_resources: DOMAIN: 0000
1236 05:41:19.937919 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 05:41:19.944617 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 05:41:19.950638 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 05:41:19.958465 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 05:41:19.967660 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 05:41:19.974691 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 05:41:19.980796 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 05:41:19.991125 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 05:41:19.997806 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 05:41:20.004143 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 05:41:20.010854 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 05:41:20.020570 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 05:41:20.021175 Setting resources...
1249 05:41:20.027235 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 05:41:20.030197 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 05:41:20.036828 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 05:41:20.040023 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 05:41:20.043658 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 05:41:20.050072 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 05:41:20.057342 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 05:41:20.063844 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 05:41:20.070196 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 05:41:20.077039 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 05:41:20.080373 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 05:41:20.086838 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 05:41:20.090269 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 05:41:20.093246 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 05:41:20.100037 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 05:41:20.103365 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 05:41:20.109984 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 05:41:20.113545 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 05:41:20.119514 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 05:41:20.123335 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 05:41:20.129605 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 05:41:20.133195 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 05:41:20.139814 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 05:41:20.143365 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 05:41:20.150279 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 05:41:20.152919 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 05:41:20.156787 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 05:41:20.163752 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 05:41:20.166592 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 05:41:20.173263 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 05:41:20.176542 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 05:41:20.182867 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 05:41:20.189944 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 05:41:20.196571 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 05:41:20.203264 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 05:41:20.213059 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 05:41:20.216354 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 05:41:20.222990 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 05:41:20.229503 Root Device assign_resources, bus 0 link: 0
1288 05:41:20.233162 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 05:41:20.243057 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 05:41:20.249717 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 05:41:20.259619 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 05:41:20.266048 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 05:41:20.275929 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 05:41:20.282769 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 05:41:20.286505 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 05:41:20.293320 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 05:41:20.299330 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 05:41:20.309831 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 05:41:20.316175 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 05:41:20.326055 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 05:41:20.329263 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 05:41:20.332701 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 05:41:20.343016 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 05:41:20.346123 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 05:41:20.352981 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 05:41:20.359549 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 05:41:20.369780 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 05:41:20.376301 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 05:41:20.383346 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 05:41:20.392795 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 05:41:20.399825 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 05:41:20.406134 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 05:41:20.415897 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 05:41:20.419263 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 05:41:20.426111 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 05:41:20.432764 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 05:41:20.442576 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 05:41:20.449041 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 05:41:20.455642 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 05:41:20.462048 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 05:41:20.468748 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 05:41:20.475544 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 05:41:20.484812 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 05:41:20.488175 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 05:41:20.494773 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 05:41:20.501657 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 05:41:20.508485 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 05:41:20.511184 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 05:41:20.514576 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 05:41:20.521903 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 05:41:20.524782 LPC: Trying to open IO window from 800 size 1ff
1332 05:41:20.534584 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 05:41:20.541170 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 05:41:20.551067 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 05:41:20.557682 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 05:41:20.564138 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 05:41:20.567723 Root Device assign_resources, bus 0 link: 0
1338 05:41:20.571150 Done setting resources.
1339 05:41:20.577540 Show resources in subtree (Root Device)...After assigning values.
1340 05:41:20.581096 Root Device child on link 0 CPU_CLUSTER: 0
1341 05:41:20.584230 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 05:41:20.587858 APIC: 00
1343 05:41:20.588003 APIC: 02
1344 05:41:20.591372 APIC: 01
1345 05:41:20.591543 APIC: 03
1346 05:41:20.591620 APIC: 05
1347 05:41:20.594364 APIC: 04
1348 05:41:20.594545 APIC: 06
1349 05:41:20.594641 APIC: 07
1350 05:41:20.600837 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 05:41:20.610917 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 05:41:20.620834 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 05:41:20.624030 PCI: 00:00.0
1354 05:41:20.630783 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 05:41:20.640612 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 05:41:20.651104 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 05:41:20.660629 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 05:41:20.670496 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 05:41:20.680526 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 05:41:20.687100 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 05:41:20.697353 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 05:41:20.707118 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 05:41:20.717152 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 05:41:20.726629 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 05:41:20.736753 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 05:41:20.743387 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 05:41:20.752899 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 05:41:20.762870 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 05:41:20.773032 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 05:41:20.773615 PCI: 00:02.0
1371 05:41:20.786089 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 05:41:20.795872 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 05:41:20.805946 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 05:41:20.806513 PCI: 00:04.0
1375 05:41:20.809448 PCI: 00:08.0
1376 05:41:20.819022 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 05:41:20.819573 PCI: 00:12.0
1378 05:41:20.828982 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 05:41:20.835478 PCI: 00:14.0 child on link 0 USB0 port 0
1380 05:41:20.845682 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 05:41:20.849100 USB0 port 0 child on link 0 USB2 port 0
1382 05:41:20.852625 USB2 port 0
1383 05:41:20.853216 USB2 port 1
1384 05:41:20.855501 USB2 port 2
1385 05:41:20.855977 USB2 port 3
1386 05:41:20.858753 USB2 port 5
1387 05:41:20.859229 USB2 port 6
1388 05:41:20.862468 USB2 port 9
1389 05:41:20.862947 USB3 port 0
1390 05:41:20.865668 USB3 port 1
1391 05:41:20.868993 USB3 port 2
1392 05:41:20.869468 USB3 port 3
1393 05:41:20.872189 USB3 port 4
1394 05:41:20.872663 PCI: 00:14.2
1395 05:41:20.882511 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 05:41:20.892036 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 05:41:20.895356 PCI: 00:14.3
1398 05:41:20.905198 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 05:41:20.908701 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 05:41:20.918617 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 05:41:20.921861 I2C: 01:15
1402 05:41:20.925119 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 05:41:20.935027 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 05:41:20.938861 I2C: 02:5d
1405 05:41:20.939348 GENERIC: 0.0
1406 05:41:20.941733 PCI: 00:16.0
1407 05:41:20.951658 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 05:41:20.952221 PCI: 00:17.0
1409 05:41:20.961703 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 05:41:20.974914 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 05:41:20.981136 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 05:41:20.991417 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 05:41:21.000882 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 05:41:21.011124 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 05:41:21.014229 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 05:41:21.024513 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 05:41:21.028185 I2C: 03:1a
1418 05:41:21.028987 I2C: 03:38
1419 05:41:21.030697 I2C: 03:39
1420 05:41:21.031173 I2C: 03:3a
1421 05:41:21.034167 I2C: 03:3b
1422 05:41:21.037452 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 05:41:21.047365 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 05:41:21.057772 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 05:41:21.067509 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 05:41:21.070825 PCI: 01:00.0
1427 05:41:21.080263 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 05:41:21.080752 PCI: 00:1e.0
1429 05:41:21.094116 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 05:41:21.103628 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 05:41:21.106673 PCI: 00:1e.2 child on link 0 SPI: 00
1432 05:41:21.116711 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 05:41:21.117295 SPI: 00
1434 05:41:21.123462 PCI: 00:1e.3 child on link 0 SPI: 01
1435 05:41:21.133312 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 05:41:21.133789 SPI: 01
1437 05:41:21.136630 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 05:41:21.146752 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 05:41:21.156623 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 05:41:21.157209 PNP: 0c09.0
1441 05:41:21.166394 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 05:41:21.166940 PCI: 00:1f.3
1443 05:41:21.179680 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 05:41:21.189529 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 05:41:21.190113 PCI: 00:1f.4
1446 05:41:21.199571 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 05:41:21.209174 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 05:41:21.212507 PCI: 00:1f.5
1449 05:41:21.222232 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 05:41:21.225538 Done allocating resources.
1451 05:41:21.228893 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 05:41:21.232416 Enabling resources...
1453 05:41:21.235529 PCI: 00:00.0 subsystem <- 8086/9b61
1454 05:41:21.238837 PCI: 00:00.0 cmd <- 06
1455 05:41:21.242144 PCI: 00:02.0 subsystem <- 8086/9b41
1456 05:41:21.245411 PCI: 00:02.0 cmd <- 03
1457 05:41:21.248758 PCI: 00:08.0 cmd <- 06
1458 05:41:21.252029 PCI: 00:12.0 subsystem <- 8086/02f9
1459 05:41:21.255510 PCI: 00:12.0 cmd <- 02
1460 05:41:21.258553 PCI: 00:14.0 subsystem <- 8086/02ed
1461 05:41:21.262310 PCI: 00:14.0 cmd <- 02
1462 05:41:21.262846 PCI: 00:14.2 cmd <- 02
1463 05:41:21.269015 PCI: 00:14.3 subsystem <- 8086/02f0
1464 05:41:21.269487 PCI: 00:14.3 cmd <- 02
1465 05:41:21.272049 PCI: 00:15.0 subsystem <- 8086/02e8
1466 05:41:21.275048 PCI: 00:15.0 cmd <- 02
1467 05:41:21.278254 PCI: 00:15.1 subsystem <- 8086/02e9
1468 05:41:21.281598 PCI: 00:15.1 cmd <- 02
1469 05:41:21.285000 PCI: 00:16.0 subsystem <- 8086/02e0
1470 05:41:21.288319 PCI: 00:16.0 cmd <- 02
1471 05:41:21.292100 PCI: 00:17.0 subsystem <- 8086/02d3
1472 05:41:21.294922 PCI: 00:17.0 cmd <- 03
1473 05:41:21.298676 PCI: 00:19.0 subsystem <- 8086/02c5
1474 05:41:21.302163 PCI: 00:19.0 cmd <- 02
1475 05:41:21.305070 PCI: 00:1d.0 bridge ctrl <- 0013
1476 05:41:21.308239 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 05:41:21.311747 PCI: 00:1d.0 cmd <- 06
1478 05:41:21.315011 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 05:41:21.318236 PCI: 00:1e.0 cmd <- 06
1480 05:41:21.321642 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 05:41:21.322114 PCI: 00:1e.2 cmd <- 06
1482 05:41:21.328092 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 05:41:21.328584 PCI: 00:1e.3 cmd <- 02
1484 05:41:21.331761 PCI: 00:1f.0 subsystem <- 8086/0284
1485 05:41:21.335328 PCI: 00:1f.0 cmd <- 407
1486 05:41:21.338238 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 05:41:21.341610 PCI: 00:1f.3 cmd <- 02
1488 05:41:21.345053 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 05:41:21.348167 PCI: 00:1f.4 cmd <- 03
1490 05:41:21.351328 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 05:41:21.354664 PCI: 00:1f.5 cmd <- 406
1492 05:41:21.363311 PCI: 01:00.0 cmd <- 02
1493 05:41:21.368508 done.
1494 05:41:21.379756 ME: Version: 14.0.39.1367
1495 05:41:21.385949 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1496 05:41:21.389455 Initializing devices...
1497 05:41:21.389926 Root Device init ...
1498 05:41:21.395891 Chrome EC: Set SMI mask to 0x0000000000000000
1499 05:41:21.399312 Chrome EC: clear events_b mask to 0x0000000000000000
1500 05:41:21.405963 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 05:41:21.412710 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 05:41:21.419156 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 05:41:21.422596 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 05:41:21.425728 Root Device init finished in 35180 usecs
1505 05:41:21.429217 CPU_CLUSTER: 0 init ...
1506 05:41:21.435400 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 05:41:21.440323 PCI: 00:00.0 init ...
1508 05:41:21.443512 CPU TDP: 15 Watts
1509 05:41:21.446859 CPU PL2 = 64 Watts
1510 05:41:21.450068 PCI: 00:00.0 init finished in 7082 usecs
1511 05:41:21.453026 PCI: 00:02.0 init ...
1512 05:41:21.456311 PCI: 00:02.0 init finished in 2255 usecs
1513 05:41:21.459643 PCI: 00:08.0 init ...
1514 05:41:21.463374 PCI: 00:08.0 init finished in 2253 usecs
1515 05:41:21.466501 PCI: 00:12.0 init ...
1516 05:41:21.469552 PCI: 00:12.0 init finished in 2254 usecs
1517 05:41:21.473115 PCI: 00:14.0 init ...
1518 05:41:21.476433 PCI: 00:14.0 init finished in 2245 usecs
1519 05:41:21.479626 PCI: 00:14.2 init ...
1520 05:41:21.482701 PCI: 00:14.2 init finished in 2253 usecs
1521 05:41:21.486612 PCI: 00:14.3 init ...
1522 05:41:21.489715 PCI: 00:14.3 init finished in 2270 usecs
1523 05:41:21.492976 PCI: 00:15.0 init ...
1524 05:41:21.496665 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 05:41:21.499667 PCI: 00:15.0 init finished in 5982 usecs
1526 05:41:21.502717 PCI: 00:15.1 init ...
1527 05:41:21.506507 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 05:41:21.512697 PCI: 00:15.1 init finished in 5978 usecs
1529 05:41:21.513212 PCI: 00:16.0 init ...
1530 05:41:21.519943 PCI: 00:16.0 init finished in 2253 usecs
1531 05:41:21.523035 PCI: 00:19.0 init ...
1532 05:41:21.526197 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 05:41:21.529226 PCI: 00:19.0 init finished in 5979 usecs
1534 05:41:21.532667 PCI: 00:1d.0 init ...
1535 05:41:21.535700 Initializing PCH PCIe bridge.
1536 05:41:21.539239 PCI: 00:1d.0 init finished in 5286 usecs
1537 05:41:21.542906 PCI: 00:1f.0 init ...
1538 05:41:21.545924 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 05:41:21.552546 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 05:41:21.553075 IOAPIC: ID = 0x02
1541 05:41:21.555797 IOAPIC: Dumping registers
1542 05:41:21.559150 reg 0x0000: 0x02000000
1543 05:41:21.562347 reg 0x0001: 0x00770020
1544 05:41:21.562770 reg 0x0002: 0x00000000
1545 05:41:21.569252 PCI: 00:1f.0 init finished in 23550 usecs
1546 05:41:21.572052 PCI: 00:1f.4 init ...
1547 05:41:21.575185 PCI: 00:1f.4 init finished in 2263 usecs
1548 05:41:21.586129 PCI: 01:00.0 init ...
1549 05:41:21.590008 PCI: 01:00.0 init finished in 2253 usecs
1550 05:41:21.593899 PNP: 0c09.0 init ...
1551 05:41:21.597000 Google Chrome EC uptime: 11.092 seconds
1552 05:41:21.603456 Google Chrome AP resets since EC boot: 0
1553 05:41:21.607672 Google Chrome most recent AP reset causes:
1554 05:41:21.613770 Google Chrome EC reset flags at last EC boot: reset-pin
1555 05:41:21.616642 PNP: 0c09.0 init finished in 20578 usecs
1556 05:41:21.619879 Devices initialized
1557 05:41:21.623309 Show all devs... After init.
1558 05:41:21.623932 Root Device: enabled 1
1559 05:41:21.626707 CPU_CLUSTER: 0: enabled 1
1560 05:41:21.630493 DOMAIN: 0000: enabled 1
1561 05:41:21.631003 APIC: 00: enabled 1
1562 05:41:21.633691 PCI: 00:00.0: enabled 1
1563 05:41:21.636604 PCI: 00:02.0: enabled 1
1564 05:41:21.640058 PCI: 00:04.0: enabled 0
1565 05:41:21.640705 PCI: 00:05.0: enabled 0
1566 05:41:21.643791 PCI: 00:12.0: enabled 1
1567 05:41:21.646601 PCI: 00:12.5: enabled 0
1568 05:41:21.649723 PCI: 00:12.6: enabled 0
1569 05:41:21.650211 PCI: 00:14.0: enabled 1
1570 05:41:21.653065 PCI: 00:14.1: enabled 0
1571 05:41:21.656358 PCI: 00:14.3: enabled 1
1572 05:41:21.656780 PCI: 00:14.5: enabled 0
1573 05:41:21.659888 PCI: 00:15.0: enabled 1
1574 05:41:21.662912 PCI: 00:15.1: enabled 1
1575 05:41:21.666370 PCI: 00:15.2: enabled 0
1576 05:41:21.666795 PCI: 00:15.3: enabled 0
1577 05:41:21.669696 PCI: 00:16.0: enabled 1
1578 05:41:21.672554 PCI: 00:16.1: enabled 0
1579 05:41:21.675752 PCI: 00:16.2: enabled 0
1580 05:41:21.675834 PCI: 00:16.3: enabled 0
1581 05:41:21.679452 PCI: 00:16.4: enabled 0
1582 05:41:21.682962 PCI: 00:16.5: enabled 0
1583 05:41:21.685902 PCI: 00:17.0: enabled 1
1584 05:41:21.685984 PCI: 00:19.0: enabled 1
1585 05:41:21.689036 PCI: 00:19.1: enabled 0
1586 05:41:21.692402 PCI: 00:19.2: enabled 0
1587 05:41:21.692483 PCI: 00:1a.0: enabled 0
1588 05:41:21.695693 PCI: 00:1c.0: enabled 0
1589 05:41:21.699444 PCI: 00:1c.1: enabled 0
1590 05:41:21.702261 PCI: 00:1c.2: enabled 0
1591 05:41:21.702348 PCI: 00:1c.3: enabled 0
1592 05:41:21.705759 PCI: 00:1c.4: enabled 0
1593 05:41:21.708918 PCI: 00:1c.5: enabled 0
1594 05:41:21.712253 PCI: 00:1c.6: enabled 0
1595 05:41:21.712335 PCI: 00:1c.7: enabled 0
1596 05:41:21.715577 PCI: 00:1d.0: enabled 1
1597 05:41:21.719338 PCI: 00:1d.1: enabled 0
1598 05:41:21.722175 PCI: 00:1d.2: enabled 0
1599 05:41:21.722258 PCI: 00:1d.3: enabled 0
1600 05:41:21.725685 PCI: 00:1d.4: enabled 0
1601 05:41:21.728883 PCI: 00:1d.5: enabled 0
1602 05:41:21.732035 PCI: 00:1e.0: enabled 1
1603 05:41:21.732117 PCI: 00:1e.1: enabled 0
1604 05:41:21.735914 PCI: 00:1e.2: enabled 1
1605 05:41:21.738880 PCI: 00:1e.3: enabled 1
1606 05:41:21.738963 PCI: 00:1f.0: enabled 1
1607 05:41:21.742124 PCI: 00:1f.1: enabled 0
1608 05:41:21.745510 PCI: 00:1f.2: enabled 0
1609 05:41:21.748688 PCI: 00:1f.3: enabled 1
1610 05:41:21.748772 PCI: 00:1f.4: enabled 1
1611 05:41:21.752307 PCI: 00:1f.5: enabled 1
1612 05:41:21.755245 PCI: 00:1f.6: enabled 0
1613 05:41:21.758712 USB0 port 0: enabled 1
1614 05:41:21.758800 I2C: 01:15: enabled 1
1615 05:41:21.762260 I2C: 02:5d: enabled 1
1616 05:41:21.765409 GENERIC: 0.0: enabled 1
1617 05:41:21.765491 I2C: 03:1a: enabled 1
1618 05:41:21.768756 I2C: 03:38: enabled 1
1619 05:41:21.771959 I2C: 03:39: enabled 1
1620 05:41:21.772042 I2C: 03:3a: enabled 1
1621 05:41:21.775070 I2C: 03:3b: enabled 1
1622 05:41:21.778594 PCI: 00:00.0: enabled 1
1623 05:41:21.778677 SPI: 00: enabled 1
1624 05:41:21.781790 SPI: 01: enabled 1
1625 05:41:21.785069 PNP: 0c09.0: enabled 1
1626 05:41:21.785156 USB2 port 0: enabled 1
1627 05:41:21.788415 USB2 port 1: enabled 1
1628 05:41:21.791763 USB2 port 2: enabled 0
1629 05:41:21.794993 USB2 port 3: enabled 0
1630 05:41:21.795078 USB2 port 5: enabled 0
1631 05:41:21.798503 USB2 port 6: enabled 1
1632 05:41:21.801654 USB2 port 9: enabled 1
1633 05:41:21.801739 USB3 port 0: enabled 1
1634 05:41:21.804848 USB3 port 1: enabled 1
1635 05:41:21.808237 USB3 port 2: enabled 1
1636 05:41:21.808319 USB3 port 3: enabled 1
1637 05:41:21.811701 USB3 port 4: enabled 0
1638 05:41:21.814757 APIC: 02: enabled 1
1639 05:41:21.814840 APIC: 01: enabled 1
1640 05:41:21.818219 APIC: 03: enabled 1
1641 05:41:21.821271 APIC: 05: enabled 1
1642 05:41:21.821354 APIC: 04: enabled 1
1643 05:41:21.824745 APIC: 06: enabled 1
1644 05:41:21.827865 APIC: 07: enabled 1
1645 05:41:21.827947 PCI: 00:08.0: enabled 1
1646 05:41:21.831501 PCI: 00:14.2: enabled 1
1647 05:41:21.834529 PCI: 01:00.0: enabled 1
1648 05:41:21.838108 Disabling ACPI via APMC:
1649 05:41:21.841681 done.
1650 05:41:21.844902 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 05:41:21.847817 ELOG: NV offset 0xaf0000 size 0x4000
1652 05:41:21.855256 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 05:41:21.861542 ELOG: Event(17) added with size 13 at 2022-08-23 05:40:59 UTC
1654 05:41:21.868350 ELOG: Event(92) added with size 9 at 2022-08-23 05:40:59 UTC
1655 05:41:21.874948 ELOG: Event(93) added with size 9 at 2022-08-23 05:40:59 UTC
1656 05:41:21.881504 ELOG: Event(9A) added with size 9 at 2022-08-23 05:40:59 UTC
1657 05:41:21.887986 ELOG: Event(9E) added with size 10 at 2022-08-23 05:40:59 UTC
1658 05:41:21.894557 ELOG: Event(9F) added with size 14 at 2022-08-23 05:40:59 UTC
1659 05:41:21.898069 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 05:41:21.905161 ELOG: Event(A1) added with size 10 at 2022-08-23 05:40:59 UTC
1661 05:41:21.915253 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 05:41:21.921794 ELOG: Event(A0) added with size 9 at 2022-08-23 05:40:59 UTC
1663 05:41:21.924856 elog_add_boot_reason: Logged dev mode boot
1664 05:41:21.928259 Finalize devices...
1665 05:41:21.928343 PCI: 00:17.0 final
1666 05:41:21.931859 Devices finalized
1667 05:41:21.934744 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 05:41:21.941528 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 05:41:21.944838 ME: HFSTS1 : 0x90000245
1670 05:41:21.948105 ME: HFSTS2 : 0x3B850126
1671 05:41:21.954958 ME: HFSTS3 : 0x00000020
1672 05:41:21.958036 ME: HFSTS4 : 0x00004800
1673 05:41:21.961419 ME: HFSTS5 : 0x00000000
1674 05:41:21.964587 ME: HFSTS6 : 0x40400006
1675 05:41:21.968006 ME: Manufacturing Mode : NO
1676 05:41:21.971335 ME: FW Partition Table : OK
1677 05:41:21.974411 ME: Bringup Loader Failure : NO
1678 05:41:21.977921 ME: Firmware Init Complete : YES
1679 05:41:21.981311 ME: Boot Options Present : NO
1680 05:41:21.984286 ME: Update In Progress : NO
1681 05:41:21.988167 ME: D0i3 Support : YES
1682 05:41:21.991199 ME: Low Power State Enabled : NO
1683 05:41:21.994535 ME: CPU Replaced : NO
1684 05:41:21.997640 ME: CPU Replacement Valid : YES
1685 05:41:22.001289 ME: Current Working State : 5
1686 05:41:22.004543 ME: Current Operation State : 1
1687 05:41:22.007783 ME: Current Operation Mode : 0
1688 05:41:22.011049 ME: Error Code : 0
1689 05:41:22.014273 ME: CPU Debug Disabled : YES
1690 05:41:22.017533 ME: TXT Support : NO
1691 05:41:22.024252 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 05:41:22.030992 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 05:41:22.031076 CBFS @ c08000 size 3f8000
1694 05:41:22.037467 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 05:41:22.040805 CBFS: Locating 'fallback/dsdt.aml'
1696 05:41:22.044521 CBFS: Found @ offset 10bb80 size 3fa5
1697 05:41:22.050499 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 05:41:22.053934 CBFS @ c08000 size 3f8000
1699 05:41:22.057262 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 05:41:22.060705 CBFS: Locating 'fallback/slic'
1701 05:41:22.065779 CBFS: 'fallback/slic' not found.
1702 05:41:22.072634 ACPI: Writing ACPI tables at 99b3e000.
1703 05:41:22.072717 ACPI: * FACS
1704 05:41:22.075580 ACPI: * DSDT
1705 05:41:22.079076 Ramoops buffer: 0x100000@0x99a3d000.
1706 05:41:22.082792 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 05:41:22.088990 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 05:41:22.092313 Google Chrome EC: version:
1709 05:41:22.095729 ro: helios_v2.0.2659-56403530b
1710 05:41:22.098989 rw: helios_v2.0.2849-c41de27e7d
1711 05:41:22.099079 running image: 1
1712 05:41:22.103239 ACPI: * FADT
1713 05:41:22.103328 SCI is IRQ9
1714 05:41:22.110274 ACPI: added table 1/32, length now 40
1715 05:41:22.110444 ACPI: * SSDT
1716 05:41:22.113324 Found 1 CPU(s) with 8 core(s) each.
1717 05:41:22.116671 Error: Could not locate 'wifi_sar' in VPD.
1718 05:41:22.122848 Checking CBFS for default SAR values
1719 05:41:22.126384 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 05:41:22.129698 CBFS @ c08000 size 3f8000
1721 05:41:22.136547 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 05:41:22.139865 CBFS: Locating 'wifi_sar_defaults.hex'
1723 05:41:22.143409 CBFS: Found @ offset 5fac0 size 77
1724 05:41:22.146632 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 05:41:22.152538 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 05:41:22.156048 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 05:41:22.163006 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 05:41:22.165799 failed to find key in VPD: dsm_calib_r0_0
1729 05:41:22.175990 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 05:41:22.179164 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 05:41:22.185674 failed to find key in VPD: dsm_calib_r0_1
1732 05:41:22.192233 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 05:41:22.198971 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 05:41:22.202272 failed to find key in VPD: dsm_calib_r0_2
1735 05:41:22.212028 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 05:41:22.215326 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 05:41:22.221808 failed to find key in VPD: dsm_calib_r0_3
1738 05:41:22.228848 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 05:41:22.235778 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 05:41:22.238801 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 05:41:22.245713 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 05:41:22.249376 EC returned error result code 1
1743 05:41:22.253014 EC returned error result code 1
1744 05:41:22.255910 EC returned error result code 1
1745 05:41:22.259561 PS2K: Bad resp from EC. Vivaldi disabled!
1746 05:41:22.265994 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 05:41:22.272560 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 05:41:22.276135 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 05:41:22.282683 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 05:41:22.285738 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 05:41:22.292398 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 05:41:22.298911 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 05:41:22.305809 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 05:41:22.309102 ACPI: added table 2/32, length now 44
1755 05:41:22.309263 ACPI: * MCFG
1756 05:41:22.315970 ACPI: added table 3/32, length now 48
1757 05:41:22.316131 ACPI: * TPM2
1758 05:41:22.318828 TPM2 log created at 99a2d000
1759 05:41:22.321784 ACPI: added table 4/32, length now 52
1760 05:41:22.325008 ACPI: * MADT
1761 05:41:22.325146 SCI is IRQ9
1762 05:41:22.328728 ACPI: added table 5/32, length now 56
1763 05:41:22.332076 current = 99b43ac0
1764 05:41:22.332197 ACPI: * DMAR
1765 05:41:22.335065 ACPI: added table 6/32, length now 60
1766 05:41:22.338413 ACPI: * IGD OpRegion
1767 05:41:22.342032 GMA: Found VBT in CBFS
1768 05:41:22.345579 GMA: Found valid VBT in CBFS
1769 05:41:22.348913 ACPI: added table 7/32, length now 64
1770 05:41:22.349039 ACPI: * HPET
1771 05:41:22.351633 ACPI: added table 8/32, length now 68
1772 05:41:22.355020 ACPI: done.
1773 05:41:22.358575 ACPI tables: 31744 bytes.
1774 05:41:22.362014 smbios_write_tables: 99a2c000
1775 05:41:22.365071 EC returned error result code 3
1776 05:41:22.368598 Couldn't obtain OEM name from CBI
1777 05:41:22.372062 Create SMBIOS type 17
1778 05:41:22.374873 PCI: 00:00.0 (Intel Cannonlake)
1779 05:41:22.374994 PCI: 00:14.3 (Intel WiFi)
1780 05:41:22.378512 SMBIOS tables: 939 bytes.
1781 05:41:22.381465 Writing table forward entry at 0x00000500
1782 05:41:22.388479 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 05:41:22.391555 Writing coreboot table at 0x99b62000
1784 05:41:22.398520 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 05:41:22.401543 1. 0000000000001000-000000000009ffff: RAM
1786 05:41:22.408064 2. 00000000000a0000-00000000000fffff: RESERVED
1787 05:41:22.411367 3. 0000000000100000-0000000099a2bfff: RAM
1788 05:41:22.417707 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 05:41:22.420912 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 05:41:22.427949 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 05:41:22.434388 7. 000000009a000000-000000009f7fffff: RESERVED
1792 05:41:22.437619 8. 00000000e0000000-00000000efffffff: RESERVED
1793 05:41:22.444430 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 05:41:22.447451 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 05:41:22.450831 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 05:41:22.457594 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 05:41:22.460897 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 05:41:22.467482 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 05:41:22.471117 15. 0000000100000000-000000045e7fffff: RAM
1800 05:41:22.474005 Graphics framebuffer located at 0xc0000000
1801 05:41:22.477109 Passing 5 GPIOs to payload:
1802 05:41:22.484015 NAME | PORT | POLARITY | VALUE
1803 05:41:22.487098 write protect | undefined | high | low
1804 05:41:22.493567 lid | undefined | high | high
1805 05:41:22.500529 power | undefined | high | low
1806 05:41:22.503557 oprom | undefined | high | low
1807 05:41:22.510134 EC in RW | 0x000000cb | high | low
1808 05:41:22.510221 Board ID: 4
1809 05:41:22.516940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 05:41:22.517030 CBFS @ c08000 size 3f8000
1811 05:41:22.523978 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 05:41:22.530555 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
1813 05:41:22.533544 coreboot table: 1492 bytes.
1814 05:41:22.537043 IMD ROOT 0. 99fff000 00001000
1815 05:41:22.540033 IMD SMALL 1. 99ffe000 00001000
1816 05:41:22.543510 FSP MEMORY 2. 99c4e000 003b0000
1817 05:41:22.546923 CONSOLE 3. 99c2e000 00020000
1818 05:41:22.550356 FMAP 4. 99c2d000 0000054e
1819 05:41:22.553241 TIME STAMP 5. 99c2c000 00000910
1820 05:41:22.557073 VBOOT WORK 6. 99c18000 00014000
1821 05:41:22.559873 MRC DATA 7. 99c16000 00001958
1822 05:41:22.563916 ROMSTG STCK 8. 99c15000 00001000
1823 05:41:22.567189 AFTER CAR 9. 99c0b000 0000a000
1824 05:41:22.570171 RAMSTAGE 10. 99baf000 0005c000
1825 05:41:22.573407 REFCODE 11. 99b7a000 00035000
1826 05:41:22.576899 SMM BACKUP 12. 99b6a000 00010000
1827 05:41:22.580144 COREBOOT 13. 99b62000 00008000
1828 05:41:22.583542 ACPI 14. 99b3e000 00024000
1829 05:41:22.586905 ACPI GNVS 15. 99b3d000 00001000
1830 05:41:22.590007 RAMOOPS 16. 99a3d000 00100000
1831 05:41:22.593235 TPM2 TCGLOG17. 99a2d000 00010000
1832 05:41:22.596338 SMBIOS 18. 99a2c000 00000800
1833 05:41:22.599822 IMD small region:
1834 05:41:22.603435 IMD ROOT 0. 99ffec00 00000400
1835 05:41:22.606261 FSP RUNTIME 1. 99ffebe0 00000004
1836 05:41:22.609864 EC HOSTEVENT 2. 99ffebc0 00000008
1837 05:41:22.613485 POWER STATE 3. 99ffeb80 00000040
1838 05:41:22.616204 ROMSTAGE 4. 99ffeb60 00000004
1839 05:41:22.619882 MEM INFO 5. 99ffe9a0 000001b9
1840 05:41:22.622928 VPD 6. 99ffe940 0000004c
1841 05:41:22.626548 MTRR: Physical address space:
1842 05:41:22.632954 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 05:41:22.639335 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 05:41:22.646149 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 05:41:22.649616 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 05:41:22.656079 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 05:41:22.662504 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 05:41:22.669467 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 05:41:22.672533 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 05:41:22.679380 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 05:41:22.682538 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 05:41:22.685744 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 05:41:22.688965 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 05:41:22.695852 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 05:41:22.699184 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 05:41:22.702297 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 05:41:22.705697 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 05:41:22.708886 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 05:41:22.715629 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 05:41:22.718846 call enable_fixed_mtrr()
1861 05:41:22.722270 CPU physical address size: 39 bits
1862 05:41:22.725431 MTRR: default type WB/UC MTRR counts: 6/8.
1863 05:41:22.728733 MTRR: WB selected as default type.
1864 05:41:22.735362 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 05:41:22.742025 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 05:41:22.748878 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 05:41:22.755232 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 05:41:22.761776 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 05:41:22.765055 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 05:41:22.772543 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 05:41:22.776148 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 05:41:22.779236 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 05:41:22.782527 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 05:41:22.789394 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 05:41:22.792401 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 05:41:22.795589 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 05:41:22.799052 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 05:41:22.805955 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 05:41:22.809094 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 05:41:22.812272 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 05:41:22.812373
1882 05:41:22.815893 MTRR check
1883 05:41:22.815994 Fixed MTRRs : Enabled
1884 05:41:22.818807 Variable MTRRs: Enabled
1885 05:41:22.818913
1886 05:41:22.822322 call enable_fixed_mtrr()
1887 05:41:22.825844 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 05:41:22.832141 CPU physical address size: 39 bits
1889 05:41:22.835588 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 05:41:22.838977 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 05:41:22.845317 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 05:41:22.848600 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 05:41:22.852332 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 05:41:22.855316 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 05:41:22.861882 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 05:41:22.865312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 05:41:22.868588 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 05:41:22.871796 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 05:41:22.878309 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 05:41:22.881809 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 05:41:22.884851 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 05:41:22.888243 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 05:41:22.891525 call enable_fixed_mtrr()
1904 05:41:22.894920 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 05:41:22.901582 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 05:41:22.904932 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 05:41:22.908476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 05:41:22.911975 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 05:41:22.918113 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 05:41:22.921301 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 05:41:22.924768 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 05:41:22.928192 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 05:41:22.931200 CPU physical address size: 39 bits
1914 05:41:22.934751 call enable_fixed_mtrr()
1915 05:41:22.937799 CBFS @ c08000 size 3f8000
1916 05:41:22.944485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1917 05:41:22.948070 CBFS: Locating 'fallback/payload'
1918 05:41:22.951410 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 05:41:22.954872 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 05:41:22.961328 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 05:41:22.964455 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 05:41:22.967466 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 05:41:22.970944 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 05:41:22.977576 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 05:41:22.980701 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 05:41:22.984185 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 05:41:22.987402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 05:41:22.990641 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 05:41:22.997360 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 05:41:23.000574 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 05:41:23.003990 call enable_fixed_mtrr()
1932 05:41:23.007230 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 05:41:23.010379 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 05:41:23.016921 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 05:41:23.020498 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 05:41:23.023638 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 05:41:23.027014 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 05:41:23.030580 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 05:41:23.036775 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 05:41:23.040297 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 05:41:23.043425 CPU physical address size: 39 bits
1942 05:41:23.046901 call enable_fixed_mtrr()
1943 05:41:23.050281 CBFS: Found @ offset 1c96c0 size 3f798
1944 05:41:23.053505 CPU physical address size: 39 bits
1945 05:41:23.056813 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 05:41:23.063525 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 05:41:23.066754 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 05:41:23.069934 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 05:41:23.073211 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 05:41:23.079813 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 05:41:23.083150 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 05:41:23.086512 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 05:41:23.089700 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 05:41:23.096700 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 05:41:23.099823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 05:41:23.102938 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 05:41:23.106510 call enable_fixed_mtrr()
1958 05:41:23.109651 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 05:41:23.112894 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 05:41:23.119576 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 05:41:23.122814 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 05:41:23.126219 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 05:41:23.130045 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 05:41:23.136115 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 05:41:23.139430 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 05:41:23.142705 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 05:41:23.146319 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 05:41:23.149297 CPU physical address size: 39 bits
1969 05:41:23.152872 call enable_fixed_mtrr()
1970 05:41:23.156074 CPU physical address size: 39 bits
1971 05:41:23.163044 Checking segment from ROM address 0xffdd16f8
1972 05:41:23.166479 CPU physical address size: 39 bits
1973 05:41:23.169710 Checking segment from ROM address 0xffdd1714
1974 05:41:23.173011 Loading segment from ROM address 0xffdd16f8
1975 05:41:23.176065 code (compression=0)
1976 05:41:23.186219 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 05:41:23.192432 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 05:41:23.195740 it's not compressed!
1979 05:41:23.288598 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 05:41:23.294181 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 05:41:23.297662 Loading segment from ROM address 0xffdd1714
1982 05:41:23.300770 Entry Point 0x30000000
1983 05:41:23.304365 Loaded segments
1984 05:41:23.310211 Finalizing chipset.
1985 05:41:23.312904 Finalizing SMM.
1986 05:41:23.316189 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1987 05:41:23.319789 mp_park_aps done after 0 msecs.
1988 05:41:23.326333 Jumping to boot code at 30000000(99b62000)
1989 05:41:23.333273 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 05:41:23.333358
1991 05:41:23.336284 Starting depthcharge on Helios...
1992 05:41:23.336626 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1993 05:41:23.336736 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1994 05:41:23.336822 Setting prompt string to ['hatch:']
1995 05:41:23.336901 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1996 05:41:23.346081 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 05:41:23.352627 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 05:41:23.359643 board_setup: Info: eMMC controller not present; skipping
1999 05:41:23.362387 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 05:41:23.369174 board_setup: Info: SDHCI controller not present; skipping
2001 05:41:23.375593 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 05:41:23.375677 Wipe memory regions:
2003 05:41:23.378844 [0x00000000001000, 0x000000000a0000)
2004 05:41:23.386000 [0x00000000100000, 0x00000030000000)
2005 05:41:23.451586 [0x00000030657430, 0x00000099a2c000)
2006 05:41:23.591948 [0x00000100000000, 0x0000045e800000)
2007 05:41:24.975135 R8152: Initializing
2008 05:41:24.978195 Version 9 (ocp_data = 6010)
2009 05:41:24.983018 R8152: Done initializing
2010 05:41:24.985950 Adding net device
2011 05:41:25.482870 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 05:41:25.483007
2013 05:41:25.483286 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2015 05:41:25.584052 hatch: tftpboot 192.168.201.1 7096678/tftp-deploy-uu81cpg8/kernel/bzImage 7096678/tftp-deploy-uu81cpg8/kernel/cmdline 7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
2016 05:41:25.584217 Setting prompt string to 'Starting kernel'
2017 05:41:25.584301 Setting prompt string to ['Starting kernel']
2018 05:41:25.584371 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2019 05:41:25.584446 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2020 05:41:25.588404 tftpboot 192.168.201.1 7096678/tftp-deploy-uu81cpg8/kernel/bzImoy-uu81cpg8/kernel/cmdline 7096678/tftp-deploy-uu81cpg8/ramdisk/ramdisk.cpio.gz
2021 05:41:25.588495 Waiting for link
2022 05:41:25.789768 done.
2023 05:41:25.790327 MAC: f4:f5:e8:50:dc:f7
2024 05:41:25.793088 Sending DHCP discover... done.
2025 05:41:25.796245 Waiting for reply... done.
2026 05:41:25.799507 Sending DHCP request... done.
2027 05:41:25.806224 Waiting for reply... done.
2028 05:41:25.806695 My ip is 192.168.201.10
2029 05:41:25.809531 The DHCP server ip is 192.168.201.1
2030 05:41:25.816940 TFTP server IP predefined by user: 192.168.201.1
2031 05:41:25.823085 Bootfile predefined by user: 7096678/tftp-deploy-uu81cpg8/kernel/bzImage
2032 05:41:25.826126 Sending tftp read request... done.
2033 05:41:25.829391 Waiting for the transfer...
2034 05:41:26.204046 00000000 ################################################################
2035 05:41:26.569526 00080000 ################################################################
2036 05:41:26.937551 00100000 ################################################################
2037 05:41:27.267415 00180000 ################################################################
2038 05:41:27.548165 00200000 ################################################################
2039 05:41:27.850451 00280000 ################################################################
2040 05:41:28.155917 00300000 ################################################################
2041 05:41:28.459317 00380000 ################################################################
2042 05:41:28.729079 00400000 ################################################################
2043 05:41:28.970302 00480000 ################################################################
2044 05:41:29.227908 00500000 ################################################################
2045 05:41:29.520575 00580000 ################################################################
2046 05:41:29.810600 00600000 ################################################################
2047 05:41:30.050548 00680000 ################################################################
2048 05:41:30.327506 00700000 ################################################################
2049 05:41:30.590173 00780000 ################################################################
2050 05:41:30.839280 00800000 ################################################################
2051 05:41:30.861162 00880000 ###### done.
2052 05:41:30.864101 The bootfile was 8953856 bytes long.
2053 05:41:30.867501 Sending tftp read request... done.
2054 05:41:30.870706 Waiting for the transfer...
2055 05:41:31.211467 00000000 ################################################################
2056 05:41:31.587625 00080000 ################################################################
2057 05:41:31.915925 00100000 ################################################################
2058 05:41:32.209752 00180000 ################################################################
2059 05:41:32.496886 00200000 ################################################################
2060 05:41:32.765563 00280000 ################################################################
2061 05:41:33.027957 00300000 ################################################################
2062 05:41:33.312482 00380000 ################################################################
2063 05:41:33.554651 00400000 ################################################################
2064 05:41:33.804184 00480000 ################################################################
2065 05:41:33.942638 00500000 ################################ done.
2066 05:41:33.946008 Sending tftp read request... done.
2067 05:41:33.949315 Waiting for the transfer...
2068 05:41:33.949401 00000000 # done.
2069 05:41:33.959519 Command line loaded dynamically from TFTP file: 7096678/tftp-deploy-uu81cpg8/kernel/cmdline
2070 05:41:33.982965 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096678/extract-nfsrootfs-r_rbbhcm,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2071 05:41:33.989036 ec_init(0): CrosEC protocol v3 supported (256, 256)
2072 05:41:33.996148 Shutting down all USB controllers.
2073 05:41:33.996355 Removing current net device
2074 05:41:34.000041 Finalizing coreboot
2075 05:41:34.006846 Exiting depthcharge with code 4 at timestamp: 17949977
2076 05:41:34.007234
2077 05:41:34.007484 Starting kernel ...
2078 05:41:34.007713
2079 05:41:34.007951
2080 05:41:34.008650 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2081 05:41:34.009136 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2082 05:41:34.009510 Setting prompt string to ['Linux version [0-9]']
2083 05:41:34.009835 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2084 05:41:34.010155 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2086 05:46:04.010007 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2088 05:46:04.011162 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2090 05:46:04.011996 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2093 05:46:04.013526 end: 2 depthcharge-action (duration 00:05:00) [common]
2095 05:46:04.014633 Cleaning after the job
2096 05:46:04.014942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/ramdisk
2097 05:46:04.015404 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/kernel
2098 05:46:04.016022 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/nfsrootfs
2099 05:46:04.063186 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096678/tftp-deploy-uu81cpg8/modules
2100 05:46:04.063500 start: 4.1 power-off (timeout 00:00:30) [common]
2101 05:46:04.063661 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2102 05:46:04.082860 >> Command sent successfully.
2103 05:46:04.084779 Returned 0 in 0 seconds
2104 05:46:04.185913 end: 4.1 power-off (duration 00:00:00) [common]
2106 05:46:04.187468 start: 4.2 read-feedback (timeout 00:10:00) [common]
2107 05:46:04.188639 Listened to connection for namespace 'common' for up to 1s
2108 05:46:05.193378 Finalising connection for namespace 'common'
2109 05:46:05.194063 Disconnecting from shell: Finalise
2110 05:46:05.295640 end: 4.2 read-feedback (duration 00:00:01) [common]
2111 05:46:05.296268 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096678
2112 05:46:05.451008 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096678
2113 05:46:05.451201 JobError: Your job cannot terminate cleanly.