Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 05:39:37.193118 lava-dispatcher, installed at version: 2022.06
2 05:39:37.193304 start: 0 validate
3 05:39:37.193436 Start time: 2022-08-23 05:39:37.193427+00:00 (UTC)
4 05:39:37.193562 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:39:37.193725 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Finitrd.cpio.gz exists
6 05:39:37.484342 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:39:37.485072 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:39:37.781131 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:39:37.781361 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220812.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:39:38.070043 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:39:38.070728 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.255-cip79%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:39:38.371082 validate duration: 1.18
14 05:39:38.371372 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:39:38.371474 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:39:38.371564 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:39:38.371662 Not decompressing ramdisk as can be used compressed.
18 05:39:38.371748 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/initrd.cpio.gz
19 05:39:38.371814 saving as /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/ramdisk/initrd.cpio.gz
20 05:39:38.371875 total size: 5411025 (5MB)
21 05:39:38.372982 progress 0% (0MB)
22 05:39:38.374388 progress 5% (0MB)
23 05:39:38.375683 progress 10% (0MB)
24 05:39:38.377053 progress 15% (0MB)
25 05:39:38.378477 progress 20% (1MB)
26 05:39:38.379744 progress 25% (1MB)
27 05:39:38.381075 progress 30% (1MB)
28 05:39:38.382335 progress 35% (1MB)
29 05:39:38.383736 progress 40% (2MB)
30 05:39:38.385044 progress 45% (2MB)
31 05:39:38.386298 progress 50% (2MB)
32 05:39:38.387552 progress 55% (2MB)
33 05:39:38.389008 progress 60% (3MB)
34 05:39:38.390266 progress 65% (3MB)
35 05:39:38.391522 progress 70% (3MB)
36 05:39:38.392781 progress 75% (3MB)
37 05:39:38.394243 progress 80% (4MB)
38 05:39:38.395614 progress 85% (4MB)
39 05:39:38.396917 progress 90% (4MB)
40 05:39:38.398175 progress 95% (4MB)
41 05:39:38.399631 progress 100% (5MB)
42 05:39:38.399801 5MB downloaded in 0.03s (184.81MB/s)
43 05:39:38.399956 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:39:38.400203 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:39:38.400293 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:39:38.400381 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:39:38.400482 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:39:38.400550 saving as /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/kernel/bzImage
50 05:39:38.400613 total size: 8953856 (8MB)
51 05:39:38.400675 No compression specified
52 05:39:38.401797 progress 0% (0MB)
53 05:39:38.403995 progress 5% (0MB)
54 05:39:38.406328 progress 10% (0MB)
55 05:39:38.408404 progress 15% (1MB)
56 05:39:38.410644 progress 20% (1MB)
57 05:39:38.412885 progress 25% (2MB)
58 05:39:38.414915 progress 30% (2MB)
59 05:39:38.417242 progress 35% (3MB)
60 05:39:38.419421 progress 40% (3MB)
61 05:39:38.421510 progress 45% (3MB)
62 05:39:38.423717 progress 50% (4MB)
63 05:39:38.425904 progress 55% (4MB)
64 05:39:38.427898 progress 60% (5MB)
65 05:39:38.430083 progress 65% (5MB)
66 05:39:38.432257 progress 70% (6MB)
67 05:39:38.434281 progress 75% (6MB)
68 05:39:38.436423 progress 80% (6MB)
69 05:39:38.438729 progress 85% (7MB)
70 05:39:38.440790 progress 90% (7MB)
71 05:39:38.442986 progress 95% (8MB)
72 05:39:38.445188 progress 100% (8MB)
73 05:39:38.445370 8MB downloaded in 0.04s (190.80MB/s)
74 05:39:38.445517 end: 1.2.1 http-download (duration 00:00:00) [common]
76 05:39:38.445755 end: 1.2 download-retry (duration 00:00:00) [common]
77 05:39:38.445845 start: 1.3 download-retry (timeout 00:10:00) [common]
78 05:39:38.445932 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 05:39:38.446037 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220812.0/amd64/full.rootfs.tar.xz
80 05:39:38.446105 saving as /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/nfsrootfs/full.rootfs.tar
81 05:39:38.446167 total size: 122678960 (116MB)
82 05:39:38.446228 Using unxz to decompress xz
83 05:39:38.449492 progress 0% (0MB)
84 05:39:38.877714 progress 5% (5MB)
85 05:39:39.320437 progress 10% (11MB)
86 05:39:39.763490 progress 15% (17MB)
87 05:39:40.216316 progress 20% (23MB)
88 05:39:40.525353 progress 25% (29MB)
89 05:39:40.855161 progress 30% (35MB)
90 05:39:41.085028 progress 35% (40MB)
91 05:39:41.292328 progress 40% (46MB)
92 05:39:41.630102 progress 45% (52MB)
93 05:39:41.974891 progress 50% (58MB)
94 05:39:42.300825 progress 55% (64MB)
95 05:39:42.641594 progress 60% (70MB)
96 05:39:42.960325 progress 65% (76MB)
97 05:39:43.327336 progress 70% (81MB)
98 05:39:43.720093 progress 75% (87MB)
99 05:39:44.121080 progress 80% (93MB)
100 05:39:44.231492 progress 85% (99MB)
101 05:39:44.392168 progress 90% (105MB)
102 05:39:44.710959 progress 95% (111MB)
103 05:39:45.064051 progress 100% (116MB)
104 05:39:45.070316 116MB downloaded in 6.62s (17.66MB/s)
105 05:39:45.070584 end: 1.3.1 http-download (duration 00:00:07) [common]
107 05:39:45.070859 end: 1.3 download-retry (duration 00:00:07) [common]
108 05:39:45.070965 start: 1.4 download-retry (timeout 00:09:53) [common]
109 05:39:45.071060 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 05:39:45.071183 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.255-cip79/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:39:45.071256 saving as /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/modules/modules.tar
112 05:39:45.071321 total size: 64712 (0MB)
113 05:39:45.071387 Using unxz to decompress xz
114 05:39:45.074564 progress 50% (0MB)
115 05:39:45.074937 progress 100% (0MB)
116 05:39:45.079176 0MB downloaded in 0.01s (7.86MB/s)
117 05:39:45.079401 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:39:45.079667 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:39:45.079768 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 05:39:45.079866 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 05:39:46.751339 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7096664/extract-nfsrootfs-hws36gg_
123 05:39:46.751547 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 05:39:46.751654 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 05:39:46.751790 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a
126 05:39:46.751892 makedir: /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin
127 05:39:46.751981 makedir: /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/tests
128 05:39:46.752064 makedir: /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/results
129 05:39:46.752161 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-add-keys
130 05:39:46.752289 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-add-sources
131 05:39:46.752403 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-background-process-start
132 05:39:46.752517 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-background-process-stop
133 05:39:46.752643 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-common-functions
134 05:39:46.752756 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-echo-ipv4
135 05:39:46.752957 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-install-packages
136 05:39:46.753070 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-installed-packages
137 05:39:46.753179 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-os-build
138 05:39:46.753289 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-probe-channel
139 05:39:46.753398 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-probe-ip
140 05:39:46.753510 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-target-ip
141 05:39:46.753618 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-target-mac
142 05:39:46.753726 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-target-storage
143 05:39:46.753837 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-case
144 05:39:46.753949 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-event
145 05:39:46.754057 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-feedback
146 05:39:46.754165 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-raise
147 05:39:46.754271 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-reference
148 05:39:46.754379 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-runner
149 05:39:46.754487 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-set
150 05:39:46.754595 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-test-shell
151 05:39:46.754704 Updating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-install-packages (oe)
152 05:39:46.754815 Updating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/bin/lava-installed-packages (oe)
153 05:39:46.754911 Creating /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/environment
154 05:39:46.754996 LAVA metadata
155 05:39:46.755062 - LAVA_JOB_ID=7096664
156 05:39:46.755127 - LAVA_DISPATCHER_IP=192.168.201.1
157 05:39:46.755223 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 05:39:46.755289 skipped lava-vland-overlay
159 05:39:46.755366 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 05:39:46.755465 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 05:39:46.755530 skipped lava-multinode-overlay
162 05:39:46.755621 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 05:39:46.755706 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 05:39:46.755780 Loading test definitions
165 05:39:46.755873 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 05:39:46.755948 Using /lava-7096664 at stage 0
167 05:39:46.756044 Fetching tests from https://github.com/kernelci/test-definitions
168 05:39:46.756123 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/0/tests/0_ltp-timers'
169 05:39:50.474925 Running '/usr/bin/git checkout kernelci.org
170 05:39:50.606334 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 05:39:50.607028 uuid=7096664_1.5.2.3.1 testdef=None
172 05:39:50.607189 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 05:39:50.607445 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 05:39:50.608104 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 05:39:50.608351 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 05:39:50.609193 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 05:39:50.609445 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 05:39:50.610207 runner path: /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/0/tests/0_ltp-timers test_uuid 7096664_1.5.2.3.1
182 05:39:50.610300 GRP_TEST='TMR'
183 05:39:50.610368 SKIPFILE='skipfile-lkft.yaml'
184 05:39:50.610431 SKIP_INSTALL='true'
185 05:39:50.610504 TST_CMDFILES=''
186 05:39:50.610636 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 05:39:50.610855 Creating lava-test-runner.conf files
189 05:39:50.610921 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7096664/lava-overlay-_zih2m9a/lava-7096664/0 for stage 0
190 05:39:50.611004 - 0_ltp-timers
191 05:39:50.611101 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
192 05:39:50.611190 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
193 05:39:57.747485 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 05:39:57.747672 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
195 05:39:57.747771 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 05:39:57.747875 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
197 05:39:57.747998 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
198 05:39:57.848644 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 05:39:57.849044 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
200 05:39:57.849157 extracting modules file /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096664/extract-nfsrootfs-hws36gg_
201 05:39:57.853277 extracting modules file /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7096664/extract-overlay-ramdisk-9q_bg_8j/ramdisk
202 05:39:57.857006 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 05:39:57.857117 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
204 05:39:57.857203 [common] Applying overlay to NFS
205 05:39:57.857276 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7096664/compress-overlay-omfpmm7s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7096664/extract-nfsrootfs-hws36gg_
206 05:39:58.292719 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 05:39:58.292990 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
208 05:39:58.293086 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 05:39:58.293177 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
210 05:39:58.293257 Building ramdisk /var/lib/lava/dispatcher/tmp/7096664/extract-overlay-ramdisk-9q_bg_8j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7096664/extract-overlay-ramdisk-9q_bg_8j/ramdisk
211 05:39:58.326191 >> 24662 blocks
212 05:39:58.817606 rename /var/lib/lava/dispatcher/tmp/7096664/extract-overlay-ramdisk-9q_bg_8j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
213 05:39:58.818018 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 05:39:58.818143 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
215 05:39:58.818252 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
216 05:39:58.818353 No mkimage arch provided, not using FIT.
217 05:39:58.818442 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 05:39:58.818530 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 05:39:58.818630 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
220 05:39:58.818725 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
221 05:39:58.818807 No LXC device requested
222 05:39:58.818894 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 05:39:58.818984 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
224 05:39:58.819065 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 05:39:58.819138 Checking files for TFTP limit of 4294967296 bytes.
226 05:39:58.819521 end: 1 tftp-deploy (duration 00:00:20) [common]
227 05:39:58.819626 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 05:39:58.819722 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 05:39:58.819855 substitutions:
230 05:39:58.819924 - {DTB}: None
231 05:39:58.819991 - {INITRD}: 7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
232 05:39:58.820055 - {KERNEL}: 7096664/tftp-deploy-s_pmrkg7/kernel/bzImage
233 05:39:58.820117 - {LAVA_MAC}: None
234 05:39:58.820178 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7096664/extract-nfsrootfs-hws36gg_
235 05:39:58.820238 - {NFS_SERVER_IP}: 192.168.201.1
236 05:39:58.820297 - {PRESEED_CONFIG}: None
237 05:39:58.820356 - {PRESEED_LOCAL}: None
238 05:39:58.820415 - {RAMDISK}: 7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
239 05:39:58.820474 - {ROOT_PART}: None
240 05:39:58.820533 - {ROOT}: None
241 05:39:58.820590 - {SERVER_IP}: 192.168.201.1
242 05:39:58.820647 - {TEE}: None
243 05:39:58.820705 Parsed boot commands:
244 05:39:58.820761 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 05:39:58.820959 Parsed boot commands: tftpboot 192.168.201.1 7096664/tftp-deploy-s_pmrkg7/kernel/bzImage 7096664/tftp-deploy-s_pmrkg7/kernel/cmdline 7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
246 05:39:58.821053 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 05:39:58.821140 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 05:39:58.821241 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 05:39:58.821333 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 05:39:58.821412 Not connected, no need to disconnect.
251 05:39:58.821493 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 05:39:58.821576 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 05:39:58.821644 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
254 05:39:58.824380 Setting prompt string to ['lava-test: # ']
255 05:39:58.824696 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 05:39:58.824812 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 05:39:58.824926 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 05:39:58.825019 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 05:39:58.825191 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
260 05:39:58.844430 >> Command sent successfully.
261 05:39:58.846435 Returned 0 in 0 seconds
262 05:39:58.947237 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 05:39:58.947573 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 05:39:58.947676 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 05:39:58.947763 Setting prompt string to 'Starting depthcharge on Helios...'
267 05:39:58.947832 Changing prompt to 'Starting depthcharge on Helios...'
268 05:39:58.947902 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 05:39:58.948183 [Enter `^Ec?' for help]
270 05:40:05.775010
271 05:40:05.775183
272 05:40:05.784673 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 05:40:05.787892 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 05:40:05.794658 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 05:40:05.797785 CPU: AES supported, TXT NOT supported, VT supported
276 05:40:05.804786 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 05:40:05.810859 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 05:40:05.814651 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 05:40:05.817605 VBOOT: Loading verstage.
280 05:40:05.823922 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 05:40:05.827717 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 05:40:05.833819 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 05:40:05.837553 CBFS @ c08000 size 3f8000
284 05:40:05.840594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 05:40:05.843670 CBFS: Locating 'fallback/verstage'
286 05:40:05.850522 CBFS: Found @ offset 10fb80 size 1072c
287 05:40:05.850661
288 05:40:05.850736
289 05:40:05.860571 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 05:40:05.876032 Probing TPM: . done!
291 05:40:05.879608 TPM ready after 0 ms
292 05:40:05.882577 Connected to device vid:did:rid of 1ae0:0028:00
293 05:40:05.892820 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
294 05:40:05.896366 Initialized TPM device CR50 revision 0
295 05:40:05.939864 tlcl_send_startup: Startup return code is 0
296 05:40:05.940032 TPM: setup succeeded
297 05:40:05.953015 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 05:40:05.956701 Chrome EC: UHEPI supported
299 05:40:05.959886 Phase 1
300 05:40:05.963067 FMAP: area GBB found @ c05000 (12288 bytes)
301 05:40:05.969308 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 05:40:05.973173 Phase 2
303 05:40:05.973269 Phase 3
304 05:40:05.976056 FMAP: area GBB found @ c05000 (12288 bytes)
305 05:40:05.982317 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 05:40:05.989068 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 05:40:05.992346 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 05:40:05.999020 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 05:40:06.015271 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 05:40:06.018299 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 05:40:06.025149 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 05:40:06.029440 Phase 4
313 05:40:06.032676 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 05:40:06.038968 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 05:40:06.219050 VB2:vb2_rsa_verify_digest() Digest check failed!
316 05:40:06.225795 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 05:40:06.225892 Saving nvdata
318 05:40:06.229087 Reboot requested (10020007)
319 05:40:06.232056 board_reset() called!
320 05:40:06.232142 full_reset() called!
321 05:40:10.742003
322 05:40:10.742160
323 05:40:10.751813 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 05:40:10.755418 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 05:40:10.761888 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 05:40:10.765069 CPU: AES supported, TXT NOT supported, VT supported
327 05:40:10.771257 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 05:40:10.778177 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 05:40:10.781087 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 05:40:10.784251 VBOOT: Loading verstage.
331 05:40:10.790856 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 05:40:10.794774 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 05:40:10.800850 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 05:40:10.804597 CBFS @ c08000 size 3f8000
335 05:40:10.807753 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 05:40:10.810782 CBFS: Locating 'fallback/verstage'
337 05:40:10.817577 CBFS: Found @ offset 10fb80 size 1072c
338 05:40:10.817685
339 05:40:10.817757
340 05:40:10.827533 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 05:40:10.843241 Probing TPM: . done!
342 05:40:10.846290 TPM ready after 0 ms
343 05:40:10.850082 Connected to device vid:did:rid of 1ae0:0028:00
344 05:40:10.859746 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 05:40:10.863489 Initialized TPM device CR50 revision 0
346 05:40:10.907046 tlcl_send_startup: Startup return code is 0
347 05:40:10.907145 TPM: setup succeeded
348 05:40:10.919584 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 05:40:10.923317 Chrome EC: UHEPI supported
350 05:40:10.926342 Phase 1
351 05:40:10.929607 FMAP: area GBB found @ c05000 (12288 bytes)
352 05:40:10.936452 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 05:40:10.942865 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 05:40:10.946493 Recovery requested (1009000e)
355 05:40:10.952077 Saving nvdata
356 05:40:10.958843 tlcl_extend: response is 0
357 05:40:10.966805 tlcl_extend: response is 0
358 05:40:10.973805 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 05:40:10.977526 CBFS @ c08000 size 3f8000
360 05:40:10.983880 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 05:40:10.987085 CBFS: Locating 'fallback/romstage'
362 05:40:10.990144 CBFS: Found @ offset 80 size 145fc
363 05:40:10.993814 Accumulated console time in verstage 98 ms
364 05:40:10.993902
365 05:40:10.997058
366 05:40:11.006834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 05:40:11.013840 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 05:40:11.016960 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 05:40:11.020017 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 05:40:11.026840 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 05:40:11.030002 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 05:40:11.033158 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 05:40:11.036377 TCO_STS: 0000 0000
374 05:40:11.040050 GEN_PMCON: e0015238 00000200
375 05:40:11.043159 GBLRST_CAUSE: 00000000 00000000
376 05:40:11.046363 prev_sleep_state 5
377 05:40:11.049486 Boot Count incremented to 29302
378 05:40:11.053186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 05:40:11.056297 CBFS @ c08000 size 3f8000
380 05:40:11.063074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 05:40:11.066376 CBFS: Locating 'fspm.bin'
382 05:40:11.069354 CBFS: Found @ offset 5ffc0 size 71000
383 05:40:11.072552 Chrome EC: UHEPI supported
384 05:40:11.078838 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 05:40:11.083324 Probing TPM: done!
386 05:40:11.090065 Connected to device vid:did:rid of 1ae0:0028:00
387 05:40:11.100663 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 05:40:11.106966 Initialized TPM device CR50 revision 0
389 05:40:11.116305 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 05:40:11.123171 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 05:40:11.126159 MRC cache found, size 1948
392 05:40:11.129248 bootmode is set to: 2
393 05:40:11.133202 PRMRR disabled by config.
394 05:40:11.136401 SPD INDEX = 1
395 05:40:11.139247 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 05:40:11.142578 CBFS @ c08000 size 3f8000
397 05:40:11.149459 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 05:40:11.149546 CBFS: Locating 'spd.bin'
399 05:40:11.152594 CBFS: Found @ offset 5fb80 size 400
400 05:40:11.156126 SPD: module type is LPDDR3
401 05:40:11.159313 SPD: module part is
402 05:40:11.165568 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 05:40:11.169348 SPD: device width 4 bits, bus width 8 bits
404 05:40:11.172496 SPD: module size is 4096 MB (per channel)
405 05:40:11.175460 memory slot: 0 configuration done.
406 05:40:11.182466 memory slot: 2 configuration done.
407 05:40:11.229970 CBMEM:
408 05:40:11.233638 IMD: root @ 99fff000 254 entries.
409 05:40:11.236857 IMD: root @ 99ffec00 62 entries.
410 05:40:11.239884 External stage cache:
411 05:40:11.243646 IMD: root @ 9abff000 254 entries.
412 05:40:11.246780 IMD: root @ 9abfec00 62 entries.
413 05:40:11.253113 Chrome EC: clear events_b mask to 0x0000000020004000
414 05:40:11.267197 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 05:40:11.282202 tlcl_write: response is 0
416 05:40:11.291613 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 05:40:11.298474 MRC: TPM MRC hash updated successfully.
418 05:40:11.298563 2 DIMMs found
419 05:40:11.301401 SMM Memory Map
420 05:40:11.305124 SMRAM : 0x9a000000 0x1000000
421 05:40:11.308269 Subregion 0: 0x9a000000 0xa00000
422 05:40:11.311303 Subregion 1: 0x9aa00000 0x200000
423 05:40:11.314932 Subregion 2: 0x9ac00000 0x400000
424 05:40:11.318109 top_of_ram = 0x9a000000
425 05:40:11.321306 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 05:40:11.327998 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 05:40:11.331089 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 05:40:11.338004 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 05:40:11.341257 CBFS @ c08000 size 3f8000
430 05:40:11.344237 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 05:40:11.348094 CBFS: Locating 'fallback/postcar'
432 05:40:11.354285 CBFS: Found @ offset 107000 size 4b44
433 05:40:11.360923 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 05:40:11.370679 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 05:40:11.373948 Processing 180 relocs. Offset value of 0x97c0c000
436 05:40:11.382789 Accumulated console time in romstage 286 ms
437 05:40:11.382877
438 05:40:11.382947
439 05:40:11.392764 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 05:40:11.399517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 05:40:11.402595 CBFS @ c08000 size 3f8000
442 05:40:11.405695 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 05:40:11.412645 CBFS: Locating 'fallback/ramstage'
444 05:40:11.415678 CBFS: Found @ offset 43380 size 1b9e8
445 05:40:11.421910 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 05:40:11.454266 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 05:40:11.457949 Processing 3976 relocs. Offset value of 0x98db0000
448 05:40:11.464131 Accumulated console time in postcar 52 ms
449 05:40:11.464217
450 05:40:11.464288
451 05:40:11.474565 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 05:40:11.480983 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 05:40:11.484025 WARNING: RO_VPD is uninitialized or empty.
454 05:40:11.487315 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 05:40:11.494259 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 05:40:11.494350 Normal boot.
457 05:40:11.500954 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 05:40:11.504002 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 05:40:11.507169 CBFS @ c08000 size 3f8000
460 05:40:11.514049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 05:40:11.517169 CBFS: Locating 'cpu_microcode_blob.bin'
462 05:40:11.520327 CBFS: Found @ offset 14700 size 2ec00
463 05:40:11.524116 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 05:40:11.527182 Skip microcode update
465 05:40:11.533308 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 05:40:11.533396 CBFS @ c08000 size 3f8000
467 05:40:11.540151 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 05:40:11.543313 CBFS: Locating 'fsps.bin'
469 05:40:11.546924 CBFS: Found @ offset d1fc0 size 35000
470 05:40:11.572650 Detected 4 core, 8 thread CPU.
471 05:40:11.575832 Setting up SMI for CPU
472 05:40:11.579045 IED base = 0x9ac00000
473 05:40:11.582775 IED size = 0x00400000
474 05:40:11.582862 Will perform SMM setup.
475 05:40:11.588972 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 05:40:11.595784 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 05:40:11.602062 Processing 16 relocs. Offset value of 0x00030000
478 05:40:11.602150 Attempting to start 7 APs
479 05:40:11.608979 Waiting for 10ms after sending INIT.
480 05:40:11.622307 Waiting for 1st SIPI to complete...done.
481 05:40:11.622396 AP: slot 2 apic_id 1.
482 05:40:11.629190 Waiting for 2nd SIPI to complete...done.
483 05:40:11.629278 AP: slot 4 apic_id 5.
484 05:40:11.632359 AP: slot 5 apic_id 4.
485 05:40:11.635320 AP: slot 7 apic_id 7.
486 05:40:11.635407 AP: slot 6 apic_id 6.
487 05:40:11.638582 AP: slot 3 apic_id 3.
488 05:40:11.642175 AP: slot 1 apic_id 2.
489 05:40:11.648381 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 05:40:11.655184 Processing 13 relocs. Offset value of 0x00038000
491 05:40:11.662096 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 05:40:11.665181 Installing SMM handler to 0x9a000000
493 05:40:11.671882 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 05:40:11.678064 Processing 658 relocs. Offset value of 0x9a010000
495 05:40:11.684587 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 05:40:11.688153 Processing 13 relocs. Offset value of 0x9a008000
497 05:40:11.694517 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 05:40:11.701393 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 05:40:11.708108 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 05:40:11.711211 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 05:40:11.718248 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 05:40:11.724361 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 05:40:11.731070 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 05:40:11.737410 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 05:40:11.741052 Clearing SMI status registers
506 05:40:11.741139 SMI_STS: PM1
507 05:40:11.744116 PM1_STS: PWRBTN
508 05:40:11.744203 TCO_STS: SECOND_TO
509 05:40:11.747299 New SMBASE 0x9a000000
510 05:40:11.750331 In relocation handler: CPU 0
511 05:40:11.754063 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 05:40:11.760489 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 05:40:11.760578 Relocation complete.
514 05:40:11.763565 New SMBASE 0x99fff800
515 05:40:11.767193 In relocation handler: CPU 2
516 05:40:11.770287 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
517 05:40:11.776977 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 05:40:11.777065 Relocation complete.
519 05:40:11.780226 New SMBASE 0x99ffec00
520 05:40:11.783316 In relocation handler: CPU 5
521 05:40:11.786493 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
522 05:40:11.793351 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 05:40:11.793439 Relocation complete.
524 05:40:11.796576 New SMBASE 0x99fffc00
525 05:40:11.799650 In relocation handler: CPU 1
526 05:40:11.803228 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
527 05:40:11.809513 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 05:40:11.809601 Relocation complete.
529 05:40:11.813365 New SMBASE 0x99fff400
530 05:40:11.816360 In relocation handler: CPU 3
531 05:40:11.819602 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
532 05:40:11.825812 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 05:40:11.825900 Relocation complete.
534 05:40:11.829371 New SMBASE 0x99fff000
535 05:40:11.832516 In relocation handler: CPU 4
536 05:40:11.836180 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
537 05:40:11.842306 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 05:40:11.842394 Relocation complete.
539 05:40:11.846117 New SMBASE 0x99ffe400
540 05:40:11.849228 In relocation handler: CPU 7
541 05:40:11.852277 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 05:40:11.859202 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 05:40:11.859291 Relocation complete.
544 05:40:11.862347 New SMBASE 0x99ffe800
545 05:40:11.865378 In relocation handler: CPU 6
546 05:40:11.868691 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 05:40:11.875486 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 05:40:11.875577 Relocation complete.
549 05:40:11.878432 Initializing CPU #0
550 05:40:11.881522 CPU: vendor Intel device 806ec
551 05:40:11.884741 CPU: family 06, model 8e, stepping 0c
552 05:40:11.888545 Clearing out pending MCEs
553 05:40:11.891803 Setting up local APIC...
554 05:40:11.891891 apic_id: 0x00 done.
555 05:40:11.894798 Turbo is available but hidden
556 05:40:11.897988 Turbo is available and visible
557 05:40:11.901634 VMX status: enabled
558 05:40:11.904731 IA32_FEATURE_CONTROL status: locked
559 05:40:11.904827 Skip microcode update
560 05:40:11.908615 CPU #0 initialized
561 05:40:11.911641 Initializing CPU #2
562 05:40:11.911730 Initializing CPU #7
563 05:40:11.914940 Initializing CPU #6
564 05:40:11.917999 CPU: vendor Intel device 806ec
565 05:40:11.921634 CPU: family 06, model 8e, stepping 0c
566 05:40:11.924704 CPU: vendor Intel device 806ec
567 05:40:11.928293 CPU: family 06, model 8e, stepping 0c
568 05:40:11.931351 Clearing out pending MCEs
569 05:40:11.934676 Clearing out pending MCEs
570 05:40:11.934764 Setting up local APIC...
571 05:40:11.937764 CPU: vendor Intel device 806ec
572 05:40:11.944267 CPU: family 06, model 8e, stepping 0c
573 05:40:11.944356 Clearing out pending MCEs
574 05:40:11.948039 Setting up local APIC...
575 05:40:11.951167 Initializing CPU #4
576 05:40:11.951255 Initializing CPU #5
577 05:40:11.954303 CPU: vendor Intel device 806ec
578 05:40:11.958012 CPU: family 06, model 8e, stepping 0c
579 05:40:11.961121 CPU: vendor Intel device 806ec
580 05:40:11.967398 CPU: family 06, model 8e, stepping 0c
581 05:40:11.967486 Clearing out pending MCEs
582 05:40:11.970502 Clearing out pending MCEs
583 05:40:11.974231 Setting up local APIC...
584 05:40:11.977233 apic_id: 0x06 done.
585 05:40:11.977320 apic_id: 0x07 done.
586 05:40:11.980406 VMX status: enabled
587 05:40:11.983580 VMX status: enabled
588 05:40:11.987427 IA32_FEATURE_CONTROL status: locked
589 05:40:11.990497 IA32_FEATURE_CONTROL status: locked
590 05:40:11.990584 Skip microcode update
591 05:40:11.993823 Skip microcode update
592 05:40:11.996962 CPU #6 initialized
593 05:40:11.997051 CPU #7 initialized
594 05:40:12.000121 Initializing CPU #1
595 05:40:12.000207 Initializing CPU #3
596 05:40:12.003685 CPU: vendor Intel device 806ec
597 05:40:12.010084 CPU: family 06, model 8e, stepping 0c
598 05:40:12.013691 CPU: vendor Intel device 806ec
599 05:40:12.016764 CPU: family 06, model 8e, stepping 0c
600 05:40:12.016888 Clearing out pending MCEs
601 05:40:12.020530 Clearing out pending MCEs
602 05:40:12.023645 Setting up local APIC...
603 05:40:12.027268 Setting up local APIC...
604 05:40:12.027355 apic_id: 0x05 done.
605 05:40:12.030374 Setting up local APIC...
606 05:40:12.033363 apic_id: 0x02 done.
607 05:40:12.036481 Setting up local APIC...
608 05:40:12.036568 VMX status: enabled
609 05:40:12.039698 apic_id: 0x04 done.
610 05:40:12.043350 IA32_FEATURE_CONTROL status: locked
611 05:40:12.046579 VMX status: enabled
612 05:40:12.046665 Skip microcode update
613 05:40:12.049576 IA32_FEATURE_CONTROL status: locked
614 05:40:12.053317 CPU #4 initialized
615 05:40:12.056360 Skip microcode update
616 05:40:12.056447 VMX status: enabled
617 05:40:12.059423 apic_id: 0x03 done.
618 05:40:12.063207 IA32_FEATURE_CONTROL status: locked
619 05:40:12.066525 VMX status: enabled
620 05:40:12.066611 Skip microcode update
621 05:40:12.069486 IA32_FEATURE_CONTROL status: locked
622 05:40:12.072742 CPU #1 initialized
623 05:40:12.076329 Skip microcode update
624 05:40:12.076415 apic_id: 0x01 done.
625 05:40:12.079343 CPU #5 initialized
626 05:40:12.082486 VMX status: enabled
627 05:40:12.082573 CPU #3 initialized
628 05:40:12.085762 IA32_FEATURE_CONTROL status: locked
629 05:40:12.089412 Skip microcode update
630 05:40:12.092667 CPU #2 initialized
631 05:40:12.095638 bsp_do_flight_plan done after 466 msecs.
632 05:40:12.099558 CPU: frequency set to 4200 MHz
633 05:40:12.099644 Enabling SMIs.
634 05:40:12.102522 Locking SMM.
635 05:40:12.116099 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 05:40:12.119810 CBFS @ c08000 size 3f8000
637 05:40:12.126058 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 05:40:12.126146 CBFS: Locating 'vbt.bin'
639 05:40:12.129259 CBFS: Found @ offset 5f5c0 size 499
640 05:40:12.136512 Found a VBT of 4608 bytes after decompression
641 05:40:12.319961 Display FSP Version Info HOB
642 05:40:12.322955 Reference Code - CPU = 9.0.1e.30
643 05:40:12.325971 uCode Version = 0.0.0.ca
644 05:40:12.329143 TXT ACM version = ff.ff.ff.ffff
645 05:40:12.332762 Display FSP Version Info HOB
646 05:40:12.336019 Reference Code - ME = 9.0.1e.30
647 05:40:12.338933 MEBx version = 0.0.0.0
648 05:40:12.342026 ME Firmware Version = Consumer SKU
649 05:40:12.345715 Display FSP Version Info HOB
650 05:40:12.348739 Reference Code - CML PCH = 9.0.1e.30
651 05:40:12.351958 PCH-CRID Status = Disabled
652 05:40:12.355683 PCH-CRID Original Value = ff.ff.ff.ffff
653 05:40:12.358546 PCH-CRID New Value = ff.ff.ff.ffff
654 05:40:12.361786 OPROM - RST - RAID = ff.ff.ff.ffff
655 05:40:12.365565 ChipsetInit Base Version = ff.ff.ff.ffff
656 05:40:12.371804 ChipsetInit Oem Version = ff.ff.ff.ffff
657 05:40:12.371889 Display FSP Version Info HOB
658 05:40:12.378632 Reference Code - SA - System Agent = 9.0.1e.30
659 05:40:12.381715 Reference Code - MRC = 0.7.1.6c
660 05:40:12.384763 SA - PCIe Version = 9.0.1e.30
661 05:40:12.387726 SA-CRID Status = Disabled
662 05:40:12.391724 SA-CRID Original Value = 0.0.0.c
663 05:40:12.391809 SA-CRID New Value = 0.0.0.c
664 05:40:12.394734 OPROM - VBIOS = ff.ff.ff.ffff
665 05:40:12.398501 RTC Init
666 05:40:12.401584 Set power on after power failure.
667 05:40:12.401669 Disabling Deep S3
668 05:40:12.404752 Disabling Deep S3
669 05:40:12.407936 Disabling Deep S4
670 05:40:12.408024 Disabling Deep S4
671 05:40:12.411597 Disabling Deep S5
672 05:40:12.411681 Disabling Deep S5
673 05:40:12.417995 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
674 05:40:12.420985 Enumerating buses...
675 05:40:12.424603 Show all devs... Before device enumeration.
676 05:40:12.427772 Root Device: enabled 1
677 05:40:12.430681 CPU_CLUSTER: 0: enabled 1
678 05:40:12.430767 DOMAIN: 0000: enabled 1
679 05:40:12.433930 APIC: 00: enabled 1
680 05:40:12.437603 PCI: 00:00.0: enabled 1
681 05:40:12.437689 PCI: 00:02.0: enabled 1
682 05:40:12.440893 PCI: 00:04.0: enabled 0
683 05:40:12.443825 PCI: 00:05.0: enabled 0
684 05:40:12.447408 PCI: 00:12.0: enabled 1
685 05:40:12.447521 PCI: 00:12.5: enabled 0
686 05:40:12.450515 PCI: 00:12.6: enabled 0
687 05:40:12.454220 PCI: 00:14.0: enabled 1
688 05:40:12.457233 PCI: 00:14.1: enabled 0
689 05:40:12.457319 PCI: 00:14.3: enabled 1
690 05:40:12.460434 PCI: 00:14.5: enabled 0
691 05:40:12.464068 PCI: 00:15.0: enabled 1
692 05:40:12.467077 PCI: 00:15.1: enabled 1
693 05:40:12.467163 PCI: 00:15.2: enabled 0
694 05:40:12.470287 PCI: 00:15.3: enabled 0
695 05:40:12.473441 PCI: 00:16.0: enabled 1
696 05:40:12.476580 PCI: 00:16.1: enabled 0
697 05:40:12.476666 PCI: 00:16.2: enabled 0
698 05:40:12.479798 PCI: 00:16.3: enabled 0
699 05:40:12.483447 PCI: 00:16.4: enabled 0
700 05:40:12.486428 PCI: 00:16.5: enabled 0
701 05:40:12.486517 PCI: 00:17.0: enabled 1
702 05:40:12.489487 PCI: 00:19.0: enabled 1
703 05:40:12.493271 PCI: 00:19.1: enabled 0
704 05:40:12.496399 PCI: 00:19.2: enabled 0
705 05:40:12.496485 PCI: 00:1a.0: enabled 0
706 05:40:12.499414 PCI: 00:1c.0: enabled 0
707 05:40:12.502632 PCI: 00:1c.1: enabled 0
708 05:40:12.506403 PCI: 00:1c.2: enabled 0
709 05:40:12.506489 PCI: 00:1c.3: enabled 0
710 05:40:12.509500 PCI: 00:1c.4: enabled 0
711 05:40:12.512609 PCI: 00:1c.5: enabled 0
712 05:40:12.515704 PCI: 00:1c.6: enabled 0
713 05:40:12.515791 PCI: 00:1c.7: enabled 0
714 05:40:12.519247 PCI: 00:1d.0: enabled 1
715 05:40:12.522262 PCI: 00:1d.1: enabled 0
716 05:40:12.525452 PCI: 00:1d.2: enabled 0
717 05:40:12.525539 PCI: 00:1d.3: enabled 0
718 05:40:12.528698 PCI: 00:1d.4: enabled 0
719 05:40:12.531741 PCI: 00:1d.5: enabled 1
720 05:40:12.535558 PCI: 00:1e.0: enabled 1
721 05:40:12.535645 PCI: 00:1e.1: enabled 0
722 05:40:12.538495 PCI: 00:1e.2: enabled 1
723 05:40:12.542232 PCI: 00:1e.3: enabled 1
724 05:40:12.545239 PCI: 00:1f.0: enabled 1
725 05:40:12.545325 PCI: 00:1f.1: enabled 1
726 05:40:12.548295 PCI: 00:1f.2: enabled 1
727 05:40:12.551494 PCI: 00:1f.3: enabled 1
728 05:40:12.555053 PCI: 00:1f.4: enabled 1
729 05:40:12.555141 PCI: 00:1f.5: enabled 1
730 05:40:12.558216 PCI: 00:1f.6: enabled 0
731 05:40:12.561250 USB0 port 0: enabled 1
732 05:40:12.561337 I2C: 00:15: enabled 1
733 05:40:12.565157 I2C: 00:5d: enabled 1
734 05:40:12.568232 GENERIC: 0.0: enabled 1
735 05:40:12.571293 I2C: 00:1a: enabled 1
736 05:40:12.571380 I2C: 00:38: enabled 1
737 05:40:12.574421 I2C: 00:39: enabled 1
738 05:40:12.577773 I2C: 00:3a: enabled 1
739 05:40:12.577860 I2C: 00:3b: enabled 1
740 05:40:12.581377 PCI: 00:00.0: enabled 1
741 05:40:12.584251 SPI: 00: enabled 1
742 05:40:12.584339 SPI: 01: enabled 1
743 05:40:12.587517 PNP: 0c09.0: enabled 1
744 05:40:12.590610 USB2 port 0: enabled 1
745 05:40:12.590697 USB2 port 1: enabled 1
746 05:40:12.593777 USB2 port 2: enabled 0
747 05:40:12.597067 USB2 port 3: enabled 0
748 05:40:12.597155 USB2 port 5: enabled 0
749 05:40:12.601043 USB2 port 6: enabled 1
750 05:40:12.604126 USB2 port 9: enabled 1
751 05:40:12.607122 USB3 port 0: enabled 1
752 05:40:12.607209 USB3 port 1: enabled 1
753 05:40:12.610350 USB3 port 2: enabled 1
754 05:40:12.613442 USB3 port 3: enabled 1
755 05:40:12.613529 USB3 port 4: enabled 0
756 05:40:12.617249 APIC: 02: enabled 1
757 05:40:12.620189 APIC: 01: enabled 1
758 05:40:12.620276 APIC: 03: enabled 1
759 05:40:12.623915 APIC: 05: enabled 1
760 05:40:12.627105 APIC: 04: enabled 1
761 05:40:12.627193 APIC: 06: enabled 1
762 05:40:12.630070 APIC: 07: enabled 1
763 05:40:12.633897 Compare with tree...
764 05:40:12.633983 Root Device: enabled 1
765 05:40:12.636423 CPU_CLUSTER: 0: enabled 1
766 05:40:12.639829 APIC: 00: enabled 1
767 05:40:12.639916 APIC: 02: enabled 1
768 05:40:12.643138 APIC: 01: enabled 1
769 05:40:12.646612 APIC: 03: enabled 1
770 05:40:12.646698 APIC: 05: enabled 1
771 05:40:12.649757 APIC: 04: enabled 1
772 05:40:12.652736 APIC: 06: enabled 1
773 05:40:12.656441 APIC: 07: enabled 1
774 05:40:12.656529 DOMAIN: 0000: enabled 1
775 05:40:12.659627 PCI: 00:00.0: enabled 1
776 05:40:12.662761 PCI: 00:02.0: enabled 1
777 05:40:12.665982 PCI: 00:04.0: enabled 0
778 05:40:12.666067 PCI: 00:05.0: enabled 0
779 05:40:12.669689 PCI: 00:12.0: enabled 1
780 05:40:12.673014 PCI: 00:12.5: enabled 0
781 05:40:12.676030 PCI: 00:12.6: enabled 0
782 05:40:12.679161 PCI: 00:14.0: enabled 1
783 05:40:12.679247 USB0 port 0: enabled 1
784 05:40:12.682324 USB2 port 0: enabled 1
785 05:40:12.685499 USB2 port 1: enabled 1
786 05:40:12.689161 USB2 port 2: enabled 0
787 05:40:12.692231 USB2 port 3: enabled 0
788 05:40:12.695853 USB2 port 5: enabled 0
789 05:40:12.695965 USB2 port 6: enabled 1
790 05:40:12.699060 USB2 port 9: enabled 1
791 05:40:12.702216 USB3 port 0: enabled 1
792 05:40:12.705255 USB3 port 1: enabled 1
793 05:40:12.708540 USB3 port 2: enabled 1
794 05:40:12.711655 USB3 port 3: enabled 1
795 05:40:12.715411 USB3 port 4: enabled 0
796 05:40:12.715496 PCI: 00:14.1: enabled 0
797 05:40:12.718608 PCI: 00:14.3: enabled 1
798 05:40:12.721676 PCI: 00:14.5: enabled 0
799 05:40:12.725000 PCI: 00:15.0: enabled 1
800 05:40:12.727913 I2C: 00:15: enabled 1
801 05:40:12.727998 PCI: 00:15.1: enabled 1
802 05:40:12.731722 I2C: 00:5d: enabled 1
803 05:40:12.734813 GENERIC: 0.0: enabled 1
804 05:40:12.737921 PCI: 00:15.2: enabled 0
805 05:40:12.741561 PCI: 00:15.3: enabled 0
806 05:40:12.741658 PCI: 00:16.0: enabled 1
807 05:40:12.744632 PCI: 00:16.1: enabled 0
808 05:40:12.747765 PCI: 00:16.2: enabled 0
809 05:40:12.750872 PCI: 00:16.3: enabled 0
810 05:40:12.753920 PCI: 00:16.4: enabled 0
811 05:40:12.754008 PCI: 00:16.5: enabled 0
812 05:40:12.757505 PCI: 00:17.0: enabled 1
813 05:40:12.760862 PCI: 00:19.0: enabled 1
814 05:40:12.763852 I2C: 00:1a: enabled 1
815 05:40:12.766924 I2C: 00:38: enabled 1
816 05:40:12.767011 I2C: 00:39: enabled 1
817 05:40:12.770824 I2C: 00:3a: enabled 1
818 05:40:12.773855 I2C: 00:3b: enabled 1
819 05:40:12.776864 PCI: 00:19.1: enabled 0
820 05:40:12.776952 PCI: 00:19.2: enabled 0
821 05:40:12.780514 PCI: 00:1a.0: enabled 0
822 05:40:12.783686 PCI: 00:1c.0: enabled 0
823 05:40:12.786743 PCI: 00:1c.1: enabled 0
824 05:40:12.790377 PCI: 00:1c.2: enabled 0
825 05:40:12.790464 PCI: 00:1c.3: enabled 0
826 05:40:12.793572 PCI: 00:1c.4: enabled 0
827 05:40:12.796529 PCI: 00:1c.5: enabled 0
828 05:40:12.799625 PCI: 00:1c.6: enabled 0
829 05:40:12.803433 PCI: 00:1c.7: enabled 0
830 05:40:12.806663 PCI: 00:1d.0: enabled 1
831 05:40:12.806752 PCI: 00:1d.1: enabled 0
832 05:40:12.809642 PCI: 00:1d.2: enabled 0
833 05:40:12.812925 PCI: 00:1d.3: enabled 0
834 05:40:12.815915 PCI: 00:1d.4: enabled 0
835 05:40:12.819612 PCI: 00:1d.5: enabled 1
836 05:40:12.819708 PCI: 00:00.0: enabled 1
837 05:40:12.822683 PCI: 00:1e.0: enabled 1
838 05:40:12.825877 PCI: 00:1e.1: enabled 0
839 05:40:12.829040 PCI: 00:1e.2: enabled 1
840 05:40:12.829127 SPI: 00: enabled 1
841 05:40:12.832846 PCI: 00:1e.3: enabled 1
842 05:40:12.835989 SPI: 01: enabled 1
843 05:40:12.839062 PCI: 00:1f.0: enabled 1
844 05:40:12.842283 PNP: 0c09.0: enabled 1
845 05:40:12.842371 PCI: 00:1f.1: enabled 1
846 05:40:12.845298 PCI: 00:1f.2: enabled 1
847 05:40:12.849172 PCI: 00:1f.3: enabled 1
848 05:40:12.852011 PCI: 00:1f.4: enabled 1
849 05:40:12.855230 PCI: 00:1f.5: enabled 1
850 05:40:12.855318 PCI: 00:1f.6: enabled 0
851 05:40:12.858309 Root Device scanning...
852 05:40:12.861960 scan_static_bus for Root Device
853 05:40:12.865080 CPU_CLUSTER: 0 enabled
854 05:40:12.868151 DOMAIN: 0000 enabled
855 05:40:12.868238 DOMAIN: 0000 scanning...
856 05:40:12.871789 PCI: pci_scan_bus for bus 00
857 05:40:12.874828 PCI: 00:00.0 [8086/0000] ops
858 05:40:12.877995 PCI: 00:00.0 [8086/9b61] enabled
859 05:40:12.881299 PCI: 00:02.0 [8086/0000] bus ops
860 05:40:12.884789 PCI: 00:02.0 [8086/9b41] enabled
861 05:40:12.888084 PCI: 00:04.0 [8086/1903] disabled
862 05:40:12.891284 PCI: 00:08.0 [8086/1911] enabled
863 05:40:12.894317 PCI: 00:12.0 [8086/02f9] enabled
864 05:40:12.901133 PCI: 00:14.0 [8086/0000] bus ops
865 05:40:12.904265 PCI: 00:14.0 [8086/02ed] enabled
866 05:40:12.907376 PCI: 00:14.2 [8086/02ef] enabled
867 05:40:12.910590 PCI: 00:14.3 [8086/02f0] enabled
868 05:40:12.913798 PCI: 00:15.0 [8086/0000] bus ops
869 05:40:12.917500 PCI: 00:15.0 [8086/02e8] enabled
870 05:40:12.920764 PCI: 00:15.1 [8086/0000] bus ops
871 05:40:12.923751 PCI: 00:15.1 [8086/02e9] enabled
872 05:40:12.926874 PCI: 00:16.0 [8086/0000] ops
873 05:40:12.929986 PCI: 00:16.0 [8086/02e0] enabled
874 05:40:12.930073 PCI: 00:17.0 [8086/0000] ops
875 05:40:12.933539 PCI: 00:17.0 [8086/02d3] enabled
876 05:40:12.936730 PCI: 00:19.0 [8086/0000] bus ops
877 05:40:12.943123 PCI: 00:19.0 [8086/02c5] enabled
878 05:40:12.946665 PCI: 00:1d.0 [8086/0000] bus ops
879 05:40:12.949708 PCI: 00:1d.0 [8086/02b0] enabled
880 05:40:12.952810 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 05:40:12.956485 PCI: 00:1e.0 [8086/0000] ops
882 05:40:12.959404 PCI: 00:1e.0 [8086/02a8] enabled
883 05:40:12.962786 PCI: 00:1e.2 [8086/0000] bus ops
884 05:40:12.966208 PCI: 00:1e.2 [8086/02aa] enabled
885 05:40:12.969294 PCI: 00:1e.3 [8086/0000] bus ops
886 05:40:12.972334 PCI: 00:1e.3 [8086/02ab] enabled
887 05:40:12.976191 PCI: 00:1f.0 [8086/0000] bus ops
888 05:40:12.979412 PCI: 00:1f.0 [8086/0284] enabled
889 05:40:12.985594 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 05:40:12.992404 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 05:40:12.995389 PCI: 00:1f.3 [8086/0000] bus ops
892 05:40:12.999135 PCI: 00:1f.3 [8086/02c8] enabled
893 05:40:13.002095 PCI: 00:1f.4 [8086/0000] bus ops
894 05:40:13.005344 PCI: 00:1f.4 [8086/02a3] enabled
895 05:40:13.008424 PCI: 00:1f.5 [8086/0000] bus ops
896 05:40:13.012269 PCI: 00:1f.5 [8086/02a4] enabled
897 05:40:13.015278 PCI: Leftover static devices:
898 05:40:13.015367 PCI: 00:05.0
899 05:40:13.018409 PCI: 00:12.5
900 05:40:13.018496 PCI: 00:12.6
901 05:40:13.018564 PCI: 00:14.1
902 05:40:13.021623 PCI: 00:14.5
903 05:40:13.021711 PCI: 00:15.2
904 05:40:13.024720 PCI: 00:15.3
905 05:40:13.024841 PCI: 00:16.1
906 05:40:13.028385 PCI: 00:16.2
907 05:40:13.028471 PCI: 00:16.3
908 05:40:13.028540 PCI: 00:16.4
909 05:40:13.031226 PCI: 00:16.5
910 05:40:13.031313 PCI: 00:19.1
911 05:40:13.034468 PCI: 00:19.2
912 05:40:13.034555 PCI: 00:1a.0
913 05:40:13.038112 PCI: 00:1c.0
914 05:40:13.038198 PCI: 00:1c.1
915 05:40:13.038266 PCI: 00:1c.2
916 05:40:13.041230 PCI: 00:1c.3
917 05:40:13.041316 PCI: 00:1c.4
918 05:40:13.044493 PCI: 00:1c.5
919 05:40:13.044579 PCI: 00:1c.6
920 05:40:13.044647 PCI: 00:1c.7
921 05:40:13.047901 PCI: 00:1d.1
922 05:40:13.047988 PCI: 00:1d.2
923 05:40:13.050979 PCI: 00:1d.3
924 05:40:13.051065 PCI: 00:1d.4
925 05:40:13.054180 PCI: 00:1d.5
926 05:40:13.054267 PCI: 00:1e.1
927 05:40:13.054334 PCI: 00:1f.1
928 05:40:13.057311 PCI: 00:1f.2
929 05:40:13.057397 PCI: 00:1f.6
930 05:40:13.060410 PCI: Check your devicetree.cb.
931 05:40:13.063780 PCI: 00:02.0 scanning...
932 05:40:13.067398 scan_generic_bus for PCI: 00:02.0
933 05:40:13.070505 scan_generic_bus for PCI: 00:02.0 done
934 05:40:13.076918 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
935 05:40:13.080562 PCI: 00:14.0 scanning...
936 05:40:13.083762 scan_static_bus for PCI: 00:14.0
937 05:40:13.083848 USB0 port 0 enabled
938 05:40:13.087129 USB0 port 0 scanning...
939 05:40:13.089885 scan_static_bus for USB0 port 0
940 05:40:13.093137 USB2 port 0 enabled
941 05:40:13.096738 USB2 port 1 enabled
942 05:40:13.096888 USB2 port 2 disabled
943 05:40:13.099840 USB2 port 3 disabled
944 05:40:13.102950 USB2 port 5 disabled
945 05:40:13.103044 USB2 port 6 enabled
946 05:40:13.106240 USB2 port 9 enabled
947 05:40:13.106327 USB3 port 0 enabled
948 05:40:13.109442 USB3 port 1 enabled
949 05:40:13.112730 USB3 port 2 enabled
950 05:40:13.112823 USB3 port 3 enabled
951 05:40:13.116472 USB3 port 4 disabled
952 05:40:13.119550 USB2 port 0 scanning...
953 05:40:13.122892 scan_static_bus for USB2 port 0
954 05:40:13.125838 scan_static_bus for USB2 port 0 done
955 05:40:13.132788 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
956 05:40:13.132896 USB2 port 1 scanning...
957 05:40:13.135800 scan_static_bus for USB2 port 1
958 05:40:13.138791 scan_static_bus for USB2 port 1 done
959 05:40:13.145822 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
960 05:40:13.148773 USB2 port 6 scanning...
961 05:40:13.152426 scan_static_bus for USB2 port 6
962 05:40:13.155529 scan_static_bus for USB2 port 6 done
963 05:40:13.161779 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
964 05:40:13.161869 USB2 port 9 scanning...
965 05:40:13.165427 scan_static_bus for USB2 port 9
966 05:40:13.172455 scan_static_bus for USB2 port 9 done
967 05:40:13.175345 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
968 05:40:13.178572 USB3 port 0 scanning...
969 05:40:13.182048 scan_static_bus for USB3 port 0
970 05:40:13.185257 scan_static_bus for USB3 port 0 done
971 05:40:13.191476 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
972 05:40:13.194710 USB3 port 1 scanning...
973 05:40:13.197909 scan_static_bus for USB3 port 1
974 05:40:13.201115 scan_static_bus for USB3 port 1 done
975 05:40:13.204543 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
976 05:40:13.207677 USB3 port 2 scanning...
977 05:40:13.210897 scan_static_bus for USB3 port 2
978 05:40:13.214125 scan_static_bus for USB3 port 2 done
979 05:40:13.221061 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
980 05:40:13.224232 USB3 port 3 scanning...
981 05:40:13.227293 scan_static_bus for USB3 port 3
982 05:40:13.230759 scan_static_bus for USB3 port 3 done
983 05:40:13.237097 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
984 05:40:13.240604 scan_static_bus for USB0 port 0 done
985 05:40:13.243801 scan_bus: scanning of bus USB0 port 0 took 155328 usecs
986 05:40:13.250640 scan_static_bus for PCI: 00:14.0 done
987 05:40:13.253683 scan_bus: scanning of bus PCI: 00:14.0 took 172951 usecs
988 05:40:13.256688 PCI: 00:15.0 scanning...
989 05:40:13.259908 scan_generic_bus for PCI: 00:15.0
990 05:40:13.263099 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 05:40:13.269691 scan_generic_bus for PCI: 00:15.0 done
992 05:40:13.273386 scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs
993 05:40:13.276559 PCI: 00:15.1 scanning...
994 05:40:13.279498 scan_generic_bus for PCI: 00:15.1
995 05:40:13.286529 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 05:40:13.289610 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 05:40:13.292713 scan_generic_bus for PCI: 00:15.1 done
998 05:40:13.299612 scan_bus: scanning of bus PCI: 00:15.1 took 18592 usecs
999 05:40:13.299700 PCI: 00:19.0 scanning...
1000 05:40:13.306042 scan_generic_bus for PCI: 00:19.0
1001 05:40:13.309224 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 05:40:13.312978 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 05:40:13.316141 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 05:40:13.322548 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 05:40:13.325657 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 05:40:13.329381 scan_generic_bus for PCI: 00:19.0 done
1007 05:40:13.335527 scan_bus: scanning of bus PCI: 00:19.0 took 30709 usecs
1008 05:40:13.335615 PCI: 00:1d.0 scanning...
1009 05:40:13.342335 do_pci_scan_bridge for PCI: 00:1d.0
1010 05:40:13.342422 PCI: pci_scan_bus for bus 01
1011 05:40:13.346072 PCI: 01:00.0 [1c5c/1327] enabled
1012 05:40:13.352317 Enabling Common Clock Configuration
1013 05:40:13.355724 L1 Sub-State supported from root port 29
1014 05:40:13.359102 L1 Sub-State Support = 0xf
1015 05:40:13.362174 CommonModeRestoreTime = 0x28
1016 05:40:13.365254 Power On Value = 0x16, Power On Scale = 0x0
1017 05:40:13.365341 ASPM: Enabled L1
1018 05:40:13.372143 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
1019 05:40:13.375259 PCI: 00:1e.2 scanning...
1020 05:40:13.378466 scan_generic_bus for PCI: 00:1e.2
1021 05:40:13.382131 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 05:40:13.385405 scan_generic_bus for PCI: 00:1e.2 done
1023 05:40:13.391624 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1024 05:40:13.395250 PCI: 00:1e.3 scanning...
1025 05:40:13.398277 scan_generic_bus for PCI: 00:1e.3
1026 05:40:13.401423 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 05:40:13.405164 scan_generic_bus for PCI: 00:1e.3 done
1028 05:40:13.411456 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
1029 05:40:13.414651 PCI: 00:1f.0 scanning...
1030 05:40:13.417909 scan_static_bus for PCI: 00:1f.0
1031 05:40:13.421102 PNP: 0c09.0 enabled
1032 05:40:13.424334 scan_static_bus for PCI: 00:1f.0 done
1033 05:40:13.427344 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1034 05:40:13.430630 PCI: 00:1f.3 scanning...
1035 05:40:13.437421 scan_bus: scanning of bus PCI: 00:1f.3 took 2849 usecs
1036 05:40:13.440403 PCI: 00:1f.4 scanning...
1037 05:40:13.444202 scan_generic_bus for PCI: 00:1f.4
1038 05:40:13.447260 scan_generic_bus for PCI: 00:1f.4 done
1039 05:40:13.453625 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1040 05:40:13.456724 PCI: 00:1f.5 scanning...
1041 05:40:13.460499 scan_generic_bus for PCI: 00:1f.5
1042 05:40:13.463562 scan_generic_bus for PCI: 00:1f.5 done
1043 05:40:13.470438 scan_bus: scanning of bus PCI: 00:1f.5 took 10175 usecs
1044 05:40:13.473414 scan_bus: scanning of bus DOMAIN: 0000 took 604802 usecs
1045 05:40:13.476567 scan_static_bus for Root Device done
1046 05:40:13.483302 scan_bus: scanning of bus Root Device took 624707 usecs
1047 05:40:13.483389 done
1048 05:40:13.486314 Chrome EC: UHEPI supported
1049 05:40:13.492741 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 05:40:13.499498 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 05:40:13.506288 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 05:40:13.513088 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 05:40:13.516257 SPI flash protection: WPSW=0 SRP0=0
1054 05:40:13.522572 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 05:40:13.525872 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1056 05:40:13.528941 found VGA at PCI: 00:02.0
1057 05:40:13.532195 Setting up VGA for PCI: 00:02.0
1058 05:40:13.538868 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 05:40:13.542034 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 05:40:13.545521 Allocating resources...
1061 05:40:13.545608 Reading resources...
1062 05:40:13.551748 Root Device read_resources bus 0 link: 0
1063 05:40:13.554918 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 05:40:13.561850 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 05:40:13.564948 DOMAIN: 0000 read_resources bus 0 link: 0
1066 05:40:13.572273 PCI: 00:14.0 read_resources bus 0 link: 0
1067 05:40:13.575254 USB0 port 0 read_resources bus 0 link: 0
1068 05:40:13.583198 USB0 port 0 read_resources bus 0 link: 0 done
1069 05:40:13.586315 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 05:40:13.593986 PCI: 00:15.0 read_resources bus 1 link: 0
1071 05:40:13.597050 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 05:40:13.603938 PCI: 00:15.1 read_resources bus 2 link: 0
1073 05:40:13.610203 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 05:40:13.613745 PCI: 00:19.0 read_resources bus 3 link: 0
1075 05:40:13.620628 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 05:40:13.623855 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 05:40:13.630856 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 05:40:13.633887 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 05:40:13.641355 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 05:40:13.643943 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 05:40:13.651305 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 05:40:13.654315 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 05:40:13.660574 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 05:40:13.667372 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 05:40:13.670512 Root Device read_resources bus 0 link: 0 done
1086 05:40:13.673580 Done reading resources.
1087 05:40:13.680565 Show resources in subtree (Root Device)...After reading.
1088 05:40:13.683572 Root Device child on link 0 CPU_CLUSTER: 0
1089 05:40:13.686881 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 05:40:13.689989 APIC: 00
1091 05:40:13.690078 APIC: 02
1092 05:40:13.693062 APIC: 01
1093 05:40:13.693149 APIC: 03
1094 05:40:13.693217 APIC: 05
1095 05:40:13.696903 APIC: 04
1096 05:40:13.696991 APIC: 06
1097 05:40:13.697060 APIC: 07
1098 05:40:13.746585 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 05:40:13.747629 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 05:40:13.747941 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 05:40:13.748019 PCI: 00:00.0
1102 05:40:13.748498 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 05:40:13.748777 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 05:40:13.752148 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 05:40:13.761457 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 05:40:13.771443 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 05:40:13.777953 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 05:40:13.787645 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 05:40:13.797792 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 05:40:13.807223 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 05:40:13.817870 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 05:40:13.827286 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 05:40:13.833455 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 05:40:13.843268 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 05:40:13.853749 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 05:40:13.863270 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 05:40:13.873181 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 05:40:13.876198 PCI: 00:02.0
1119 05:40:13.886444 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 05:40:13.895620 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 05:40:13.902676 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 05:40:13.905745 PCI: 00:04.0
1123 05:40:13.905833 PCI: 00:08.0
1124 05:40:13.915179 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 05:40:13.918769 PCI: 00:12.0
1126 05:40:13.928555 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 05:40:13.931748 PCI: 00:14.0 child on link 0 USB0 port 0
1128 05:40:13.941297 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 05:40:13.948277 USB0 port 0 child on link 0 USB2 port 0
1130 05:40:13.948365 USB2 port 0
1131 05:40:13.951279 USB2 port 1
1132 05:40:13.951366 USB2 port 2
1133 05:40:13.954323 USB2 port 3
1134 05:40:13.954410 USB2 port 5
1135 05:40:13.957963 USB2 port 6
1136 05:40:13.958051 USB2 port 9
1137 05:40:13.960907 USB3 port 0
1138 05:40:13.964324 USB3 port 1
1139 05:40:13.964411 USB3 port 2
1140 05:40:13.968090 USB3 port 3
1141 05:40:13.968177 USB3 port 4
1142 05:40:13.971051 PCI: 00:14.2
1143 05:40:13.980377 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 05:40:13.990747 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 05:40:13.990836 PCI: 00:14.3
1146 05:40:14.000003 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 05:40:14.007113 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 05:40:14.016401 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 05:40:14.016491 I2C: 01:15
1150 05:40:14.023307 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 05:40:14.032932 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 05:40:14.033020 I2C: 02:5d
1153 05:40:14.036077 GENERIC: 0.0
1154 05:40:14.036164 PCI: 00:16.0
1155 05:40:14.046006 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 05:40:14.048971 PCI: 00:17.0
1157 05:40:14.055723 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 05:40:14.065281 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 05:40:14.075696 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 05:40:14.081952 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 05:40:14.091831 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 05:40:14.098652 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 05:40:14.104978 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 05:40:14.114400 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 05:40:14.114490 I2C: 03:1a
1166 05:40:14.117962 I2C: 03:38
1167 05:40:14.118074 I2C: 03:39
1168 05:40:14.121160 I2C: 03:3a
1169 05:40:14.121248 I2C: 03:3b
1170 05:40:14.128020 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 05:40:14.134472 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 05:40:14.143933 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 05:40:14.153814 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 05:40:14.153910 PCI: 01:00.0
1175 05:40:14.166925 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 05:40:14.167016 PCI: 00:1e.0
1177 05:40:14.176768 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 05:40:14.186478 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 05:40:14.193297 PCI: 00:1e.2 child on link 0 SPI: 00
1180 05:40:14.202640 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 05:40:14.202729 SPI: 00
1182 05:40:14.206451 PCI: 00:1e.3 child on link 0 SPI: 01
1183 05:40:14.215828 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 05:40:14.219123 SPI: 01
1185 05:40:14.222720 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 05:40:14.232058 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 05:40:14.238988 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 05:40:14.242144 PNP: 0c09.0
1189 05:40:14.251685 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 05:40:14.251772 PCI: 00:1f.3
1191 05:40:14.261713 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 05:40:14.271603 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 05:40:14.274546 PCI: 00:1f.4
1194 05:40:14.284514 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 05:40:14.294536 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 05:40:14.294624 PCI: 00:1f.5
1197 05:40:14.303860 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 05:40:14.310620 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 05:40:14.317544 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 05:40:14.323562 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 05:40:14.326883 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 05:40:14.330485 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 05:40:14.333651 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 05:40:14.336691 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 05:40:14.343679 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 05:40:14.350125 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 05:40:14.360040 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 05:40:14.366188 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 05:40:14.372725 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 05:40:14.379721 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 05:40:14.385723 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 05:40:14.389441 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 05:40:14.395840 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 05:40:14.398830 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 05:40:14.405768 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 05:40:14.408740 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 05:40:14.415108 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 05:40:14.418333 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 05:40:14.424740 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 05:40:14.428389 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 05:40:14.435098 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 05:40:14.438289 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 05:40:14.444543 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 05:40:14.447612 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 05:40:14.454349 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 05:40:14.457798 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 05:40:14.463918 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 05:40:14.467648 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 05:40:14.473727 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 05:40:14.477452 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 05:40:14.483648 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 05:40:14.487279 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 05:40:14.493648 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 05:40:14.496670 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 05:40:14.506640 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 05:40:14.509778 avoid_fixed_resources: DOMAIN: 0000
1237 05:40:14.516683 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 05:40:14.523193 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 05:40:14.529799 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 05:40:14.536024 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 05:40:14.546218 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 05:40:14.552411 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 05:40:14.559116 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 05:40:14.568949 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 05:40:14.575841 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 05:40:14.581851 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 05:40:14.588177 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 05:40:14.598129 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 05:40:14.598217 Setting resources...
1250 05:40:14.604974 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 05:40:14.611215 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 05:40:14.614382 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 05:40:14.618279 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 05:40:14.621198 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 05:40:14.627552 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 05:40:14.634189 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 05:40:14.640594 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 05:40:14.647483 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 05:40:14.653765 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 05:40:14.657561 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 05:40:14.663795 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 05:40:14.666800 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 05:40:14.673623 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 05:40:14.676636 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 05:40:14.683441 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 05:40:14.686567 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 05:40:14.692886 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 05:40:14.696521 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 05:40:14.702670 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 05:40:14.706238 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 05:40:14.712408 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 05:40:14.715602 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 05:40:14.722020 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 05:40:14.725655 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 05:40:14.731867 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 05:40:14.735616 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 05:40:14.741745 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 05:40:14.744883 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 05:40:14.751753 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 05:40:14.754888 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 05:40:14.761161 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 05:40:14.767826 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 05:40:14.774498 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 05:40:14.781076 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 05:40:14.790929 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 05:40:14.793897 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 05:40:14.800694 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 05:40:14.807033 Root Device assign_resources, bus 0 link: 0
1289 05:40:14.810659 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 05:40:14.819945 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 05:40:14.830166 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 05:40:14.836121 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 05:40:14.842918 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 05:40:14.852569 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 05:40:14.859255 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 05:40:14.865561 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 05:40:14.868706 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 05:40:14.879149 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 05:40:14.885438 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 05:40:14.895265 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 05:40:14.901586 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 05:40:14.908387 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 05:40:14.911492 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 05:40:14.921314 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 05:40:14.924570 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 05:40:14.930762 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 05:40:14.937554 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 05:40:14.947420 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 05:40:14.953809 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 05:40:14.960568 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 05:40:14.970466 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 05:40:14.977283 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 05:40:14.983290 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 05:40:14.992753 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 05:40:14.996280 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 05:40:15.003165 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 05:40:15.009272 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 05:40:15.019339 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 05:40:15.028724 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 05:40:15.032479 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 05:40:15.042096 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 05:40:15.045315 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 05:40:15.054775 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 05:40:15.061623 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 05:40:15.067941 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 05:40:15.071025 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 05:40:15.080936 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 05:40:15.084460 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 05:40:15.090800 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 05:40:15.093838 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 05:40:15.100230 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 05:40:15.104016 LPC: Trying to open IO window from 800 size 1ff
1333 05:40:15.113342 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 05:40:15.119891 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 05:40:15.129723 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 05:40:15.136005 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 05:40:15.139817 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 05:40:15.146531 Root Device assign_resources, bus 0 link: 0
1339 05:40:15.149680 Done setting resources.
1340 05:40:15.155886 Show resources in subtree (Root Device)...After assigning values.
1341 05:40:15.159116 Root Device child on link 0 CPU_CLUSTER: 0
1342 05:40:15.162880 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 05:40:15.166094 APIC: 00
1344 05:40:15.166186 APIC: 02
1345 05:40:15.166253 APIC: 01
1346 05:40:15.169267 APIC: 03
1347 05:40:15.169352 APIC: 05
1348 05:40:15.172419 APIC: 04
1349 05:40:15.172503 APIC: 06
1350 05:40:15.172570 APIC: 07
1351 05:40:15.179287 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 05:40:15.188532 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 05:40:15.198419 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 05:40:15.201595 PCI: 00:00.0
1355 05:40:15.211391 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 05:40:15.217782 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 05:40:15.227865 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 05:40:15.237810 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 05:40:15.247675 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 05:40:15.257010 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 05:40:15.267044 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 05:40:15.276977 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 05:40:15.283208 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 05:40:15.293171 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 05:40:15.303034 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 05:40:15.312863 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 05:40:15.322661 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 05:40:15.332012 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 05:40:15.341904 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 05:40:15.351880 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 05:40:15.351967 PCI: 00:02.0
1372 05:40:15.361315 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 05:40:15.374257 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 05:40:15.381281 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 05:40:15.384333 PCI: 00:04.0
1376 05:40:15.384423 PCI: 00:08.0
1377 05:40:15.397235 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 05:40:15.397325 PCI: 00:12.0
1379 05:40:15.407057 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 05:40:15.413840 PCI: 00:14.0 child on link 0 USB0 port 0
1381 05:40:15.423188 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 05:40:15.427037 USB0 port 0 child on link 0 USB2 port 0
1383 05:40:15.430158 USB2 port 0
1384 05:40:15.430245 USB2 port 1
1385 05:40:15.433241 USB2 port 2
1386 05:40:15.433328 USB2 port 3
1387 05:40:15.436397 USB2 port 5
1388 05:40:15.436485 USB2 port 6
1389 05:40:15.440096 USB2 port 9
1390 05:40:15.440184 USB3 port 0
1391 05:40:15.442599 USB3 port 1
1392 05:40:15.446516 USB3 port 2
1393 05:40:15.446604 USB3 port 3
1394 05:40:15.449280 USB3 port 4
1395 05:40:15.449367 PCI: 00:14.2
1396 05:40:15.459246 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 05:40:15.469343 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 05:40:15.472351 PCI: 00:14.3
1399 05:40:15.482306 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 05:40:15.485506 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 05:40:15.498415 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 05:40:15.498504 I2C: 01:15
1403 05:40:15.501569 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 05:40:15.514710 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 05:40:15.514799 I2C: 02:5d
1406 05:40:15.517758 GENERIC: 0.0
1407 05:40:15.517845 PCI: 00:16.0
1408 05:40:15.527571 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 05:40:15.530717 PCI: 00:17.0
1410 05:40:15.540840 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 05:40:15.550247 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 05:40:15.560113 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 05:40:15.570280 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 05:40:15.576572 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 05:40:15.586477 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 05:40:15.593126 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 05:40:15.602556 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 05:40:15.602645 I2C: 03:1a
1419 05:40:15.606239 I2C: 03:38
1420 05:40:15.606328 I2C: 03:39
1421 05:40:15.609277 I2C: 03:3a
1422 05:40:15.609365 I2C: 03:3b
1423 05:40:15.616236 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 05:40:15.625544 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 05:40:15.635566 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 05:40:15.645656 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 05:40:15.645773 PCI: 01:00.0
1428 05:40:15.658535 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 05:40:15.658623 PCI: 00:1e.0
1430 05:40:15.667972 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 05:40:15.681019 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 05:40:15.684608 PCI: 00:1e.2 child on link 0 SPI: 00
1433 05:40:15.694458 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 05:40:15.694548 SPI: 00
1435 05:40:15.700648 PCI: 00:1e.3 child on link 0 SPI: 01
1436 05:40:15.710534 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 05:40:15.710623 SPI: 01
1438 05:40:15.713832 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 05:40:15.724070 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 05:40:15.733198 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 05:40:15.733285 PNP: 0c09.0
1442 05:40:15.743172 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 05:40:15.746441 PCI: 00:1f.3
1444 05:40:15.756220 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 05:40:15.766146 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 05:40:15.766234 PCI: 00:1f.4
1447 05:40:15.775680 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 05:40:15.785700 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 05:40:15.788737 PCI: 00:1f.5
1450 05:40:15.798541 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 05:40:15.801696 Done allocating resources.
1452 05:40:15.808580 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 05:40:15.808667 Enabling resources...
1454 05:40:15.815962 PCI: 00:00.0 subsystem <- 8086/9b61
1455 05:40:15.816048 PCI: 00:00.0 cmd <- 06
1456 05:40:15.822251 PCI: 00:02.0 subsystem <- 8086/9b41
1457 05:40:15.822337 PCI: 00:02.0 cmd <- 03
1458 05:40:15.825268 PCI: 00:08.0 cmd <- 06
1459 05:40:15.828996 PCI: 00:12.0 subsystem <- 8086/02f9
1460 05:40:15.832148 PCI: 00:12.0 cmd <- 02
1461 05:40:15.835220 PCI: 00:14.0 subsystem <- 8086/02ed
1462 05:40:15.838369 PCI: 00:14.0 cmd <- 02
1463 05:40:15.841634 PCI: 00:14.2 cmd <- 02
1464 05:40:15.844746 PCI: 00:14.3 subsystem <- 8086/02f0
1465 05:40:15.848044 PCI: 00:14.3 cmd <- 02
1466 05:40:15.851618 PCI: 00:15.0 subsystem <- 8086/02e8
1467 05:40:15.854828 PCI: 00:15.0 cmd <- 02
1468 05:40:15.858035 PCI: 00:15.1 subsystem <- 8086/02e9
1469 05:40:15.858122 PCI: 00:15.1 cmd <- 02
1470 05:40:15.864681 PCI: 00:16.0 subsystem <- 8086/02e0
1471 05:40:15.864768 PCI: 00:16.0 cmd <- 02
1472 05:40:15.867899 PCI: 00:17.0 subsystem <- 8086/02d3
1473 05:40:15.871649 PCI: 00:17.0 cmd <- 03
1474 05:40:15.874812 PCI: 00:19.0 subsystem <- 8086/02c5
1475 05:40:15.877913 PCI: 00:19.0 cmd <- 02
1476 05:40:15.881201 PCI: 00:1d.0 bridge ctrl <- 0013
1477 05:40:15.884288 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 05:40:15.887742 PCI: 00:1d.0 cmd <- 06
1479 05:40:15.890927 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 05:40:15.894111 PCI: 00:1e.0 cmd <- 06
1481 05:40:15.897226 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 05:40:15.900367 PCI: 00:1e.2 cmd <- 06
1483 05:40:15.903934 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 05:40:15.906988 PCI: 00:1e.3 cmd <- 02
1485 05:40:15.910726 PCI: 00:1f.0 subsystem <- 8086/0284
1486 05:40:15.913874 PCI: 00:1f.0 cmd <- 407
1487 05:40:15.916960 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 05:40:15.920089 PCI: 00:1f.3 cmd <- 02
1489 05:40:15.923262 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 05:40:15.926446 PCI: 00:1f.4 cmd <- 03
1491 05:40:15.930055 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 05:40:15.933318 PCI: 00:1f.5 cmd <- 406
1493 05:40:15.940748 PCI: 01:00.0 cmd <- 02
1494 05:40:15.945829 done.
1495 05:40:15.957871 ME: Version: 14.0.39.1367
1496 05:40:15.964179 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1497 05:40:15.967364 Initializing devices...
1498 05:40:15.967485 Root Device init ...
1499 05:40:15.973671 Chrome EC: Set SMI mask to 0x0000000000000000
1500 05:40:15.980141 Chrome EC: clear events_b mask to 0x0000000000000000
1501 05:40:15.983931 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 05:40:15.990215 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 05:40:15.996480 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 05:40:16.000061 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 05:40:16.006226 Root Device init finished in 35167 usecs
1506 05:40:16.009929 CPU_CLUSTER: 0 init ...
1507 05:40:16.012949 CPU_CLUSTER: 0 init finished in 2449 usecs
1508 05:40:16.018051 PCI: 00:00.0 init ...
1509 05:40:16.021638 CPU TDP: 15 Watts
1510 05:40:16.024667 CPU PL2 = 64 Watts
1511 05:40:16.028219 PCI: 00:00.0 init finished in 7085 usecs
1512 05:40:16.031485 PCI: 00:02.0 init ...
1513 05:40:16.034493 PCI: 00:02.0 init finished in 2254 usecs
1514 05:40:16.038190 PCI: 00:08.0 init ...
1515 05:40:16.041405 PCI: 00:08.0 init finished in 2253 usecs
1516 05:40:16.044500 PCI: 00:12.0 init ...
1517 05:40:16.048025 PCI: 00:12.0 init finished in 2253 usecs
1518 05:40:16.050978 PCI: 00:14.0 init ...
1519 05:40:16.054169 PCI: 00:14.0 init finished in 2255 usecs
1520 05:40:16.057314 PCI: 00:14.2 init ...
1521 05:40:16.060924 PCI: 00:14.2 init finished in 2253 usecs
1522 05:40:16.063980 PCI: 00:14.3 init ...
1523 05:40:16.067139 PCI: 00:14.3 init finished in 2263 usecs
1524 05:40:16.070902 PCI: 00:15.0 init ...
1525 05:40:16.074005 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 05:40:16.080263 PCI: 00:15.0 init finished in 5982 usecs
1527 05:40:16.080351 PCI: 00:15.1 init ...
1528 05:40:16.087165 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 05:40:16.090105 PCI: 00:15.1 init finished in 5980 usecs
1530 05:40:16.093868 PCI: 00:16.0 init ...
1531 05:40:16.096982 PCI: 00:16.0 init finished in 2254 usecs
1532 05:40:16.100003 PCI: 00:19.0 init ...
1533 05:40:16.103128 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 05:40:16.106824 PCI: 00:19.0 init finished in 5979 usecs
1535 05:40:16.110061 PCI: 00:1d.0 init ...
1536 05:40:16.112966 Initializing PCH PCIe bridge.
1537 05:40:16.116085 PCI: 00:1d.0 init finished in 5286 usecs
1538 05:40:16.120432 PCI: 00:1f.0 init ...
1539 05:40:16.123597 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 05:40:16.129829 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 05:40:16.129918 IOAPIC: ID = 0x02
1542 05:40:16.133576 IOAPIC: Dumping registers
1543 05:40:16.136739 reg 0x0000: 0x02000000
1544 05:40:16.139780 reg 0x0001: 0x00770020
1545 05:40:16.142848 reg 0x0002: 0x00000000
1546 05:40:16.146558 PCI: 00:1f.0 init finished in 23566 usecs
1547 05:40:16.149775 PCI: 00:1f.4 init ...
1548 05:40:16.152779 PCI: 00:1f.4 init finished in 2265 usecs
1549 05:40:16.164404 PCI: 01:00.0 init ...
1550 05:40:16.168031 PCI: 01:00.0 init finished in 2253 usecs
1551 05:40:16.172486 PNP: 0c09.0 init ...
1552 05:40:16.175669 Google Chrome EC uptime: 11.161 seconds
1553 05:40:16.181860 Google Chrome AP resets since EC boot: 0
1554 05:40:16.185073 Google Chrome most recent AP reset causes:
1555 05:40:16.191875 Google Chrome EC reset flags at last EC boot: reset-pin
1556 05:40:16.195236 PNP: 0c09.0 init finished in 20570 usecs
1557 05:40:16.198238 Devices initialized
1558 05:40:16.201793 Show all devs... After init.
1559 05:40:16.201882 Root Device: enabled 1
1560 05:40:16.204842 CPU_CLUSTER: 0: enabled 1
1561 05:40:16.207811 DOMAIN: 0000: enabled 1
1562 05:40:16.207899 APIC: 00: enabled 1
1563 05:40:16.211793 PCI: 00:00.0: enabled 1
1564 05:40:16.214707 PCI: 00:02.0: enabled 1
1565 05:40:16.217924 PCI: 00:04.0: enabled 0
1566 05:40:16.218012 PCI: 00:05.0: enabled 0
1567 05:40:16.221102 PCI: 00:12.0: enabled 1
1568 05:40:16.224631 PCI: 00:12.5: enabled 0
1569 05:40:16.227631 PCI: 00:12.6: enabled 0
1570 05:40:16.227719 PCI: 00:14.0: enabled 1
1571 05:40:16.230896 PCI: 00:14.1: enabled 0
1572 05:40:16.233972 PCI: 00:14.3: enabled 1
1573 05:40:16.237451 PCI: 00:14.5: enabled 0
1574 05:40:16.237540 PCI: 00:15.0: enabled 1
1575 05:40:16.240620 PCI: 00:15.1: enabled 1
1576 05:40:16.243900 PCI: 00:15.2: enabled 0
1577 05:40:16.247426 PCI: 00:15.3: enabled 0
1578 05:40:16.247514 PCI: 00:16.0: enabled 1
1579 05:40:16.250527 PCI: 00:16.1: enabled 0
1580 05:40:16.253594 PCI: 00:16.2: enabled 0
1581 05:40:16.257288 PCI: 00:16.3: enabled 0
1582 05:40:16.257377 PCI: 00:16.4: enabled 0
1583 05:40:16.260521 PCI: 00:16.5: enabled 0
1584 05:40:16.263627 PCI: 00:17.0: enabled 1
1585 05:40:16.266602 PCI: 00:19.0: enabled 1
1586 05:40:16.266690 PCI: 00:19.1: enabled 0
1587 05:40:16.269686 PCI: 00:19.2: enabled 0
1588 05:40:16.273038 PCI: 00:1a.0: enabled 0
1589 05:40:16.276607 PCI: 00:1c.0: enabled 0
1590 05:40:16.276695 PCI: 00:1c.1: enabled 0
1591 05:40:16.279942 PCI: 00:1c.2: enabled 0
1592 05:40:16.283214 PCI: 00:1c.3: enabled 0
1593 05:40:16.286327 PCI: 00:1c.4: enabled 0
1594 05:40:16.286415 PCI: 00:1c.5: enabled 0
1595 05:40:16.289493 PCI: 00:1c.6: enabled 0
1596 05:40:16.293087 PCI: 00:1c.7: enabled 0
1597 05:40:16.295785 PCI: 00:1d.0: enabled 1
1598 05:40:16.295874 PCI: 00:1d.1: enabled 0
1599 05:40:16.299481 PCI: 00:1d.2: enabled 0
1600 05:40:16.302549 PCI: 00:1d.3: enabled 0
1601 05:40:16.305612 PCI: 00:1d.4: enabled 0
1602 05:40:16.305700 PCI: 00:1d.5: enabled 0
1603 05:40:16.309077 PCI: 00:1e.0: enabled 1
1604 05:40:16.312707 PCI: 00:1e.1: enabled 0
1605 05:40:16.315885 PCI: 00:1e.2: enabled 1
1606 05:40:16.315974 PCI: 00:1e.3: enabled 1
1607 05:40:16.318830 PCI: 00:1f.0: enabled 1
1608 05:40:16.321951 PCI: 00:1f.1: enabled 0
1609 05:40:16.325620 PCI: 00:1f.2: enabled 0
1610 05:40:16.325708 PCI: 00:1f.3: enabled 1
1611 05:40:16.328620 PCI: 00:1f.4: enabled 1
1612 05:40:16.331797 PCI: 00:1f.5: enabled 1
1613 05:40:16.335363 PCI: 00:1f.6: enabled 0
1614 05:40:16.335451 USB0 port 0: enabled 1
1615 05:40:16.338390 I2C: 01:15: enabled 1
1616 05:40:16.342184 I2C: 02:5d: enabled 1
1617 05:40:16.342273 GENERIC: 0.0: enabled 1
1618 05:40:16.345404 I2C: 03:1a: enabled 1
1619 05:40:16.348410 I2C: 03:38: enabled 1
1620 05:40:16.348497 I2C: 03:39: enabled 1
1621 05:40:16.351509 I2C: 03:3a: enabled 1
1622 05:40:16.354696 I2C: 03:3b: enabled 1
1623 05:40:16.357891 PCI: 00:00.0: enabled 1
1624 05:40:16.357980 SPI: 00: enabled 1
1625 05:40:16.361594 SPI: 01: enabled 1
1626 05:40:16.361682 PNP: 0c09.0: enabled 1
1627 05:40:16.364609 USB2 port 0: enabled 1
1628 05:40:16.367844 USB2 port 1: enabled 1
1629 05:40:16.371354 USB2 port 2: enabled 0
1630 05:40:16.371442 USB2 port 3: enabled 0
1631 05:40:16.374541 USB2 port 5: enabled 0
1632 05:40:16.377805 USB2 port 6: enabled 1
1633 05:40:16.380810 USB2 port 9: enabled 1
1634 05:40:16.380929 USB3 port 0: enabled 1
1635 05:40:16.383990 USB3 port 1: enabled 1
1636 05:40:16.387170 USB3 port 2: enabled 1
1637 05:40:16.387258 USB3 port 3: enabled 1
1638 05:40:16.390497 USB3 port 4: enabled 0
1639 05:40:16.394212 APIC: 02: enabled 1
1640 05:40:16.394301 APIC: 01: enabled 1
1641 05:40:16.397126 APIC: 03: enabled 1
1642 05:40:16.400751 APIC: 05: enabled 1
1643 05:40:16.400875 APIC: 04: enabled 1
1644 05:40:16.403912 APIC: 06: enabled 1
1645 05:40:16.404001 APIC: 07: enabled 1
1646 05:40:16.406875 PCI: 00:08.0: enabled 1
1647 05:40:16.410495 PCI: 00:14.2: enabled 1
1648 05:40:16.413606 PCI: 01:00.0: enabled 1
1649 05:40:16.417278 Disabling ACPI via APMC:
1650 05:40:16.420378 done.
1651 05:40:16.423483 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 05:40:16.426461 ELOG: NV offset 0xaf0000 size 0x4000
1653 05:40:16.433512 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 05:40:16.440362 ELOG: Event(17) added with size 13 at 2022-08-23 05:39:45 UTC
1655 05:40:16.447219 POST: Unexpected post code in previous boot: 0x73
1656 05:40:16.453582 ELOG: Event(A3) added with size 11 at 2022-08-23 05:39:45 UTC
1657 05:40:16.459839 ELOG: Event(92) added with size 9 at 2022-08-23 05:39:45 UTC
1658 05:40:16.466200 ELOG: Event(93) added with size 9 at 2022-08-23 05:39:45 UTC
1659 05:40:16.472707 ELOG: Event(9A) added with size 9 at 2022-08-23 05:39:45 UTC
1660 05:40:16.479185 ELOG: Event(9E) added with size 10 at 2022-08-23 05:39:45 UTC
1661 05:40:16.486212 ELOG: Event(9F) added with size 14 at 2022-08-23 05:39:45 UTC
1662 05:40:16.489307 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1663 05:40:16.495443 ELOG: Event(A1) added with size 10 at 2022-08-23 05:39:45 UTC
1664 05:40:16.505600 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 05:40:16.511635 ELOG: Event(A0) added with size 9 at 2022-08-23 05:39:45 UTC
1666 05:40:16.515437 elog_add_boot_reason: Logged dev mode boot
1667 05:40:16.518542 Finalize devices...
1668 05:40:16.518632 PCI: 00:17.0 final
1669 05:40:16.521539 Devices finalized
1670 05:40:16.525293 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 05:40:16.531488 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 05:40:16.534655 ME: HFSTS1 : 0x90000245
1673 05:40:16.538410 ME: HFSTS2 : 0x3B850126
1674 05:40:16.544452 ME: HFSTS3 : 0x00000020
1675 05:40:16.547570 ME: HFSTS4 : 0x00004800
1676 05:40:16.551178 ME: HFSTS5 : 0x00000000
1677 05:40:16.554429 ME: HFSTS6 : 0x40400006
1678 05:40:16.560683 ME: Manufacturing Mode : NO
1679 05:40:16.563849 ME: FW Partition Table : OK
1680 05:40:16.567002 ME: Bringup Loader Failure : NO
1681 05:40:16.570715 ME: Firmware Init Complete : YES
1682 05:40:16.573672 ME: Boot Options Present : NO
1683 05:40:16.576769 ME: Update In Progress : NO
1684 05:40:16.580535 ME: D0i3 Support : YES
1685 05:40:16.583659 ME: Low Power State Enabled : NO
1686 05:40:16.586794 ME: CPU Replaced : NO
1687 05:40:16.590127 ME: CPU Replacement Valid : YES
1688 05:40:16.593183 ME: Current Working State : 5
1689 05:40:16.596358 ME: Current Operation State : 1
1690 05:40:16.600025 ME: Current Operation Mode : 0
1691 05:40:16.603139 ME: Error Code : 0
1692 05:40:16.606360 ME: CPU Debug Disabled : YES
1693 05:40:16.609992 ME: TXT Support : NO
1694 05:40:16.612828 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 05:40:16.619496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 05:40:16.622659 CBFS @ c08000 size 3f8000
1697 05:40:16.629267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 05:40:16.632356 CBFS: Locating 'fallback/dsdt.aml'
1699 05:40:16.636093 CBFS: Found @ offset 10bb80 size 3fa5
1700 05:40:16.642239 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 05:40:16.642329 CBFS @ c08000 size 3f8000
1702 05:40:16.648608 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 05:40:16.652126 CBFS: Locating 'fallback/slic'
1704 05:40:16.659149 CBFS: 'fallback/slic' not found.
1705 05:40:16.662958 ACPI: Writing ACPI tables at 99b3e000.
1706 05:40:16.663045 ACPI: * FACS
1707 05:40:16.666032 ACPI: * DSDT
1708 05:40:16.669119 Ramoops buffer: 0x100000@0x99a3d000.
1709 05:40:16.672711 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 05:40:16.678870 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 05:40:16.682259 Google Chrome EC: version:
1712 05:40:16.685418 ro: helios_v2.0.2659-56403530b
1713 05:40:16.688560 rw: helios_v2.0.2849-c41de27e7d
1714 05:40:16.688646 running image: 1
1715 05:40:16.693663 ACPI: * FADT
1716 05:40:16.693750 SCI is IRQ9
1717 05:40:16.699856 ACPI: added table 1/32, length now 40
1718 05:40:16.699943 ACPI: * SSDT
1719 05:40:16.703334 Found 1 CPU(s) with 8 core(s) each.
1720 05:40:16.709593 Error: Could not locate 'wifi_sar' in VPD.
1721 05:40:16.713238 Checking CBFS for default SAR values
1722 05:40:16.716319 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 05:40:16.719259 CBFS @ c08000 size 3f8000
1724 05:40:16.726125 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 05:40:16.729158 CBFS: Locating 'wifi_sar_defaults.hex'
1726 05:40:16.732756 CBFS: Found @ offset 5fac0 size 77
1727 05:40:16.736074 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 05:40:16.742077 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 05:40:16.745263 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 05:40:16.752014 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 05:40:16.755182 failed to find key in VPD: dsm_calib_r0_0
1732 05:40:16.765329 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 05:40:16.771308 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 05:40:16.774501 failed to find key in VPD: dsm_calib_r0_1
1735 05:40:16.784894 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 05:40:16.787968 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 05:40:16.794233 failed to find key in VPD: dsm_calib_r0_2
1738 05:40:16.801106 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 05:40:16.807205 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 05:40:16.810518 failed to find key in VPD: dsm_calib_r0_3
1741 05:40:16.820411 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 05:40:16.827170 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 05:40:16.830351 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 05:40:16.834061 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 05:40:16.837078 EC returned error result code 1
1746 05:40:16.840238 EC returned error result code 1
1747 05:40:16.843910 EC returned error result code 1
1748 05:40:16.850861 PS2K: Bad resp from EC. Vivaldi disabled!
1749 05:40:16.853972 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 05:40:16.860126 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 05:40:16.866929 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 05:40:16.870104 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 05:40:16.876685 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 05:40:16.883114 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 05:40:16.889791 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 05:40:16.896173 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 05:40:16.899260 ACPI: added table 2/32, length now 44
1758 05:40:16.899348 ACPI: * MCFG
1759 05:40:16.902346 ACPI: added table 3/32, length now 48
1760 05:40:16.905988 ACPI: * TPM2
1761 05:40:16.909223 TPM2 log created at 99a2d000
1762 05:40:16.912496 ACPI: added table 4/32, length now 52
1763 05:40:16.915440 ACPI: * MADT
1764 05:40:16.915526 SCI is IRQ9
1765 05:40:16.919087 ACPI: added table 5/32, length now 56
1766 05:40:16.922469 current = 99b43ac0
1767 05:40:16.922556 ACPI: * DMAR
1768 05:40:16.925630 ACPI: added table 6/32, length now 60
1769 05:40:16.928929 ACPI: * IGD OpRegion
1770 05:40:16.931782 GMA: Found VBT in CBFS
1771 05:40:16.935376 GMA: Found valid VBT in CBFS
1772 05:40:16.938583 ACPI: added table 7/32, length now 64
1773 05:40:16.938670 ACPI: * HPET
1774 05:40:16.945435 ACPI: added table 8/32, length now 68
1775 05:40:16.945522 ACPI: done.
1776 05:40:16.948166 ACPI tables: 31744 bytes.
1777 05:40:16.951376 smbios_write_tables: 99a2c000
1778 05:40:16.955102 EC returned error result code 3
1779 05:40:16.958269 Couldn't obtain OEM name from CBI
1780 05:40:16.961309 Create SMBIOS type 17
1781 05:40:16.965001 PCI: 00:00.0 (Intel Cannonlake)
1782 05:40:16.965098 PCI: 00:14.3 (Intel WiFi)
1783 05:40:16.968182 SMBIOS tables: 939 bytes.
1784 05:40:16.974305 Writing table forward entry at 0x00000500
1785 05:40:16.978034 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 05:40:16.984467 Writing coreboot table at 0x99b62000
1787 05:40:16.987576 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 05:40:16.993925 1. 0000000000001000-000000000009ffff: RAM
1789 05:40:16.997562 2. 00000000000a0000-00000000000fffff: RESERVED
1790 05:40:17.000840 3. 0000000000100000-0000000099a2bfff: RAM
1791 05:40:17.007268 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 05:40:17.014072 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 05:40:17.020255 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 05:40:17.023231 7. 000000009a000000-000000009f7fffff: RESERVED
1795 05:40:17.027060 8. 00000000e0000000-00000000efffffff: RESERVED
1796 05:40:17.033099 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 05:40:17.036300 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 05:40:17.043164 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 05:40:17.046385 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 05:40:17.052608 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 05:40:17.056406 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 05:40:17.059294 15. 0000000100000000-000000045e7fffff: RAM
1803 05:40:17.066016 Graphics framebuffer located at 0xc0000000
1804 05:40:17.069138 Passing 5 GPIOs to payload:
1805 05:40:17.072303 NAME | PORT | POLARITY | VALUE
1806 05:40:17.079297 write protect | undefined | high | low
1807 05:40:17.082277 lid | undefined | high | high
1808 05:40:17.088682 power | undefined | high | low
1809 05:40:17.095707 oprom | undefined | high | low
1810 05:40:17.098827 EC in RW | 0x000000cb | high | low
1811 05:40:17.101972 Board ID: 4
1812 05:40:17.105142 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 05:40:17.108439 CBFS @ c08000 size 3f8000
1814 05:40:17.115162 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 05:40:17.121400 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d36
1816 05:40:17.124432 coreboot table: 1492 bytes.
1817 05:40:17.128334 IMD ROOT 0. 99fff000 00001000
1818 05:40:17.131359 IMD SMALL 1. 99ffe000 00001000
1819 05:40:17.134576 FSP MEMORY 2. 99c4e000 003b0000
1820 05:40:17.138067 CONSOLE 3. 99c2e000 00020000
1821 05:40:17.141242 FMAP 4. 99c2d000 0000054e
1822 05:40:17.144352 TIME STAMP 5. 99c2c000 00000910
1823 05:40:17.147468 VBOOT WORK 6. 99c18000 00014000
1824 05:40:17.150632 MRC DATA 7. 99c16000 00001958
1825 05:40:17.154370 ROMSTG STCK 8. 99c15000 00001000
1826 05:40:17.157401 AFTER CAR 9. 99c0b000 0000a000
1827 05:40:17.160521 RAMSTAGE 10. 99baf000 0005c000
1828 05:40:17.163566 REFCODE 11. 99b7a000 00035000
1829 05:40:17.167326 SMM BACKUP 12. 99b6a000 00010000
1830 05:40:17.170553 COREBOOT 13. 99b62000 00008000
1831 05:40:17.173608 ACPI 14. 99b3e000 00024000
1832 05:40:17.176691 ACPI GNVS 15. 99b3d000 00001000
1833 05:40:17.179901 RAMOOPS 16. 99a3d000 00100000
1834 05:40:17.183593 TPM2 TCGLOG17. 99a2d000 00010000
1835 05:40:17.186691 SMBIOS 18. 99a2c000 00000800
1836 05:40:17.189704 IMD small region:
1837 05:40:17.193432 IMD ROOT 0. 99ffec00 00000400
1838 05:40:17.196627 FSP RUNTIME 1. 99ffebe0 00000004
1839 05:40:17.199821 EC HOSTEVENT 2. 99ffebc0 00000008
1840 05:40:17.202955 POWER STATE 3. 99ffeb80 00000040
1841 05:40:17.206208 ROMSTAGE 4. 99ffeb60 00000004
1842 05:40:17.209815 MEM INFO 5. 99ffe9a0 000001b9
1843 05:40:17.212774 VPD 6. 99ffe940 0000004c
1844 05:40:17.215968 MTRR: Physical address space:
1845 05:40:17.222914 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 05:40:17.228808 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 05:40:17.235872 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 05:40:17.242103 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 05:40:17.248761 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 05:40:17.255318 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 05:40:17.258419 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 05:40:17.265115 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 05:40:17.268330 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 05:40:17.271394 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 05:40:17.274545 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 05:40:17.281087 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 05:40:17.284489 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 05:40:17.287610 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 05:40:17.291267 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 05:40:17.297566 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 05:40:17.300669 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 05:40:17.303933 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 05:40:17.307886 call enable_fixed_mtrr()
1864 05:40:17.310907 CPU physical address size: 39 bits
1865 05:40:17.317592 MTRR: default type WB/UC MTRR counts: 6/8.
1866 05:40:17.320761 MTRR: WB selected as default type.
1867 05:40:17.326868 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 05:40:17.333606 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 05:40:17.336785 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 05:40:17.343515 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 05:40:17.349676 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 05:40:17.356501 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 05:40:17.363186 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 05:40:17.366232 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 05:40:17.369351 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 05:40:17.373229 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 05:40:17.379277 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 05:40:17.382588 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 05:40:17.385525 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 05:40:17.392346 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 05:40:17.395531 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 05:40:17.398726 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 05:40:17.401814 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 05:40:17.401901
1885 05:40:17.405577 MTRR check
1886 05:40:17.408814 Fixed MTRRs : Enabled
1887 05:40:17.408916 Variable MTRRs: Enabled
1888 05:40:17.408993
1889 05:40:17.411829 call enable_fixed_mtrr()
1890 05:40:17.418830 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1891 05:40:17.421797 CPU physical address size: 39 bits
1892 05:40:17.424778 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1893 05:40:17.431535 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 05:40:17.434824 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 05:40:17.438409 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 05:40:17.441608 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 05:40:17.447766 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 05:40:17.451070 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 05:40:17.454447 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 05:40:17.457608 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 05:40:17.464435 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 05:40:17.467635 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 05:40:17.470546 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 05:40:17.477432 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 05:40:17.477520 call enable_fixed_mtrr()
1906 05:40:17.483703 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 05:40:17.487407 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 05:40:17.490275 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 05:40:17.493416 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 05:40:17.500448 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 05:40:17.503641 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 05:40:17.506739 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 05:40:17.509790 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 05:40:17.516776 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 05:40:17.519770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 05:40:17.522871 CPU physical address size: 39 bits
1917 05:40:17.526767 call enable_fixed_mtrr()
1918 05:40:17.529651 CBFS @ c08000 size 3f8000
1919 05:40:17.536025 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1920 05:40:17.539149 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 05:40:17.542301 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 05:40:17.546064 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 05:40:17.552204 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 05:40:17.555865 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 05:40:17.559239 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 05:40:17.562123 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 05:40:17.568880 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 05:40:17.571901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 05:40:17.574904 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 05:40:17.578074 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 05:40:17.584978 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 05:40:17.588267 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 05:40:17.591411 call enable_fixed_mtrr()
1934 05:40:17.594964 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 05:40:17.598191 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 05:40:17.601310 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 05:40:17.607738 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 05:40:17.610941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 05:40:17.614093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 05:40:17.617907 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 05:40:17.624090 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 05:40:17.627216 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 05:40:17.630951 CPU physical address size: 39 bits
1944 05:40:17.633977 call enable_fixed_mtrr()
1945 05:40:17.636959 CPU physical address size: 39 bits
1946 05:40:17.640342 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 05:40:17.647111 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 05:40:17.650043 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 05:40:17.653950 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 05:40:17.656820 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 05:40:17.663221 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 05:40:17.667037 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 05:40:17.670060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 05:40:17.673055 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 05:40:17.679423 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 05:40:17.682588 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 05:40:17.686134 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 05:40:17.689399 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 05:40:17.692652 call enable_fixed_mtrr()
1960 05:40:17.699430 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 05:40:17.702413 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 05:40:17.705563 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 05:40:17.708702 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 05:40:17.715810 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 05:40:17.718974 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 05:40:17.722076 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 05:40:17.725229 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 05:40:17.731435 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 05:40:17.735030 CPU physical address size: 39 bits
1970 05:40:17.738218 call enable_fixed_mtrr()
1971 05:40:17.741278 CPU physical address size: 39 bits
1972 05:40:17.745008 CPU physical address size: 39 bits
1973 05:40:17.748136 CBFS: Locating 'fallback/payload'
1974 05:40:17.751091 CBFS: Found @ offset 1c96c0 size 3f798
1975 05:40:17.757887 Checking segment from ROM address 0xffdd16f8
1976 05:40:17.760769 Checking segment from ROM address 0xffdd1714
1977 05:40:17.763982 Loading segment from ROM address 0xffdd16f8
1978 05:40:17.767229 code (compression=0)
1979 05:40:17.777646 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 05:40:17.784115 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 05:40:17.787171 it's not compressed!
1982 05:40:17.878924 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 05:40:17.885865 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 05:40:17.892099 Loading segment from ROM address 0xffdd1714
1985 05:40:17.892197 Entry Point 0x30000000
1986 05:40:17.895815 Loaded segments
1987 05:40:17.901215 Finalizing chipset.
1988 05:40:17.905070 Finalizing SMM.
1989 05:40:17.907641 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1990 05:40:17.911159 mp_park_aps done after 0 msecs.
1991 05:40:17.917802 Jumping to boot code at 30000000(99b62000)
1992 05:40:17.924433 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 05:40:17.924527
1994 05:40:17.927562 Starting depthcharge on Helios...
1995 05:40:17.927951 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1996 05:40:17.928060 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1997 05:40:17.928148 Setting prompt string to ['hatch:']
1998 05:40:17.928245 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1999 05:40:17.937410 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2000 05:40:17.943631 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2001 05:40:17.950399 board_setup: Info: eMMC controller not present; skipping
2002 05:40:17.953599 New NVMe Controller 0x30053ac0 @ 00:1d:00
2003 05:40:17.960284 board_setup: Info: SDHCI controller not present; skipping
2004 05:40:17.966972 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2005 05:40:17.967079 Wipe memory regions:
2006 05:40:17.973053 [0x00000000001000, 0x000000000a0000)
2007 05:40:17.976284 [0x00000000100000, 0x00000030000000)
2008 05:40:18.040494 [0x00000030657430, 0x00000099a2c000)
2009 05:40:18.173006 [0x00000100000000, 0x0000045e800000)
2010 05:40:19.491722 R8152: Initializing
2011 05:40:19.494720 Version 9 (ocp_data = 6010)
2012 05:40:19.499114 R8152: Done initializing
2013 05:40:19.502188 Adding net device
2014 05:40:19.994138 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 05:40:19.994673
2016 05:40:19.995433 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2018 05:40:20.097107 hatch: tftpboot 192.168.201.1 7096664/tftp-deploy-s_pmrkg7/kernel/bzImage 7096664/tftp-deploy-s_pmrkg7/kernel/cmdline 7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
2019 05:40:20.097762 Setting prompt string to 'Starting kernel'
2020 05:40:20.098187 Setting prompt string to ['Starting kernel']
2021 05:40:20.098538 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2022 05:40:20.098907 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2023 05:40:20.102890 tftpboot 192.168.201.1 7096664/tftp-deploy-s_pmrkg7/kernel/bzImoy-s_pmrkg7/kernel/cmdline 7096664/tftp-deploy-s_pmrkg7/ramdisk/ramdisk.cpio.gz
2024 05:40:20.103350 Waiting for link
2025 05:40:20.304384 done.
2026 05:40:20.305008 MAC: f4:f5:e8:50:e7:f3
2027 05:40:20.307115 Sending DHCP discover... done.
2028 05:40:20.310310 Waiting for reply... done.
2029 05:40:20.313486 Sending DHCP request... done.
2030 05:40:20.317243 Waiting for reply... done.
2031 05:40:20.320822 My ip is 192.168.201.16
2032 05:40:20.323879 The DHCP server ip is 192.168.201.1
2033 05:40:20.327165 TFTP server IP predefined by user: 192.168.201.1
2034 05:40:20.333073 Bootfile predefined by user: 7096664/tftp-deploy-s_pmrkg7/kernel/bzImage
2035 05:40:20.340055 Sending tftp read request... done.
2036 05:40:20.344488 Waiting for the transfer...
2037 05:40:20.641497 00000000 ################################################################
2038 05:40:20.925600 00080000 ################################################################
2039 05:40:21.215524 00100000 ################################################################
2040 05:40:21.509378 00180000 ################################################################
2041 05:40:21.787284 00200000 ################################################################
2042 05:40:22.031190 00280000 ################################################################
2043 05:40:22.311112 00300000 ################################################################
2044 05:40:22.602073 00380000 ################################################################
2045 05:40:22.896452 00400000 ################################################################
2046 05:40:23.189295 00480000 ################################################################
2047 05:40:23.486079 00500000 ################################################################
2048 05:40:23.780494 00580000 ################################################################
2049 05:40:24.060353 00600000 ################################################################
2050 05:40:24.351259 00680000 ################################################################
2051 05:40:24.603923 00700000 ################################################################
2052 05:40:24.890636 00780000 ################################################################
2053 05:40:25.167932 00800000 ################################################################
2054 05:40:25.186702 00880000 ###### done.
2055 05:40:25.189978 The bootfile was 8953856 bytes long.
2056 05:40:25.193143 Sending tftp read request... done.
2057 05:40:25.196466 Waiting for the transfer...
2058 05:40:25.479098 00000000 ################################################################
2059 05:40:25.792061 00080000 ################################################################
2060 05:40:26.105714 00100000 ################################################################
2061 05:40:26.419456 00180000 ################################################################
2062 05:40:26.733964 00200000 ################################################################
2063 05:40:27.135885 00280000 ################################################################
2064 05:40:27.503122 00300000 ################################################################
2065 05:40:27.785511 00380000 ################################################################
2066 05:40:28.061805 00400000 ################################################################
2067 05:40:28.339480 00480000 ################################################################
2068 05:40:28.476448 00500000 ################################ done.
2069 05:40:28.480489 Sending tftp read request... done.
2070 05:40:28.483424 Waiting for the transfer...
2071 05:40:28.483516 00000000 # done.
2072 05:40:28.492715 Command line loaded dynamically from TFTP file: 7096664/tftp-deploy-s_pmrkg7/kernel/cmdline
2073 05:40:28.516510 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7096664/extract-nfsrootfs-hws36gg_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2074 05:40:28.522820 ec_init(0): CrosEC protocol v3 supported (256, 256)
2075 05:40:28.529040 Shutting down all USB controllers.
2076 05:40:28.529278 Removing current net device
2077 05:40:28.532991 Finalizing coreboot
2078 05:40:28.539626 Exiting depthcharge with code 4 at timestamp: 17912821
2079 05:40:28.539901
2080 05:40:28.540061 Starting kernel ...
2081 05:40:28.540206
2082 05:40:28.540669 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2083 05:40:28.540895 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2084 05:40:28.541058 Setting prompt string to ['Linux version [0-9]']
2085 05:40:28.541213 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2086 05:40:28.541365 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2087 05:40:28.542539
2089 05:44:58.541157 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2091 05:44:58.541406 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2093 05:44:58.541572 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2096 05:44:58.541913 end: 2 depthcharge-action (duration 00:05:00) [common]
2098 05:44:58.542121 Cleaning after the job
2099 05:44:58.542208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/ramdisk
2100 05:44:58.542676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/kernel
2101 05:44:58.543355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/nfsrootfs
2102 05:44:58.592260 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7096664/tftp-deploy-s_pmrkg7/modules
2103 05:44:58.592560 start: 4.1 power-off (timeout 00:00:30) [common]
2104 05:44:58.592724 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2105 05:44:58.612430 >> Command sent successfully.
2106 05:44:58.614529 Returned 0 in 0 seconds
2107 05:44:58.715421 end: 4.1 power-off (duration 00:00:00) [common]
2109 05:44:58.716127 start: 4.2 read-feedback (timeout 00:10:00) [common]
2110 05:44:58.716505 Listened to connection for namespace 'common' for up to 1s
2111 05:44:59.712975 Listened to connection for namespace 'common' for up to 1s
2112 05:44:59.716222 Listened to connection for namespace 'common' for up to 1s
2113 05:44:59.716422 Finalising connection for namespace 'common'
2114 05:44:59.716532 Disconnecting from shell: Finalise
2115 05:44:59.716612
2116 05:44:59.816934 end: 4.2 read-feedback (duration 00:00:01) [common]
2117 05:44:59.817082 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7096664
2118 05:44:59.972430 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7096664
2119 05:44:59.972650 JobError: Your job cannot terminate cleanly.