Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 12:59:04.267369 lava-dispatcher, installed at version: 2022.06
2 12:59:04.267546 start: 0 validate
3 12:59:04.267674 Start time: 2022-08-31 12:59:04.267668+00:00 (UTC)
4 12:59:04.267799 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:59:04.267924 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 12:59:04.270129 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:59:04.270247 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:59:04.563404 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:59:04.563737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:59:04.566056 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:59:04.566347 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:59:04.859765 validate duration: 0.59
14 12:59:04.860046 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:59:04.860148 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:59:04.860240 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:59:04.860339 Not decompressing ramdisk as can be used compressed.
18 12:59:04.860423 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/initrd.cpio.gz
19 12:59:04.860492 saving as /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/ramdisk/initrd.cpio.gz
20 12:59:04.860553 total size: 5411076 (5MB)
21 12:59:04.861657 progress 0% (0MB)
22 12:59:04.863095 progress 5% (0MB)
23 12:59:04.864456 progress 10% (0MB)
24 12:59:04.865911 progress 15% (0MB)
25 12:59:04.867394 progress 20% (1MB)
26 12:59:04.868808 progress 25% (1MB)
27 12:59:04.870133 progress 30% (1MB)
28 12:59:04.871465 progress 35% (1MB)
29 12:59:04.872982 progress 40% (2MB)
30 12:59:04.874318 progress 45% (2MB)
31 12:59:04.875680 progress 50% (2MB)
32 12:59:04.877060 progress 55% (2MB)
33 12:59:04.878668 progress 60% (3MB)
34 12:59:04.879964 progress 65% (3MB)
35 12:59:04.881427 progress 70% (3MB)
36 12:59:04.882730 progress 75% (3MB)
37 12:59:04.884173 progress 80% (4MB)
38 12:59:04.885522 progress 85% (4MB)
39 12:59:04.886836 progress 90% (4MB)
40 12:59:04.888099 progress 95% (4MB)
41 12:59:04.889590 progress 100% (5MB)
42 12:59:04.889797 5MB downloaded in 0.03s (176.49MB/s)
43 12:59:04.889953 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:59:04.890195 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:59:04.890284 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:59:04.890372 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:59:04.890474 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:59:04.890542 saving as /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/kernel/bzImage
50 12:59:04.890604 total size: 8953856 (8MB)
51 12:59:04.890665 No compression specified
52 12:59:07.390740 progress 0% (0MB)
53 12:59:07.393221 progress 5% (0MB)
54 12:59:07.395477 progress 10% (0MB)
55 12:59:07.397758 progress 15% (1MB)
56 12:59:07.399979 progress 20% (1MB)
57 12:59:07.402289 progress 25% (2MB)
58 12:59:07.404322 progress 30% (2MB)
59 12:59:07.406572 progress 35% (3MB)
60 12:59:07.408791 progress 40% (3MB)
61 12:59:07.410853 progress 45% (3MB)
62 12:59:07.413170 progress 50% (4MB)
63 12:59:07.415319 progress 55% (4MB)
64 12:59:07.417451 progress 60% (5MB)
65 12:59:07.419668 progress 65% (5MB)
66 12:59:07.421888 progress 70% (6MB)
67 12:59:07.423929 progress 75% (6MB)
68 12:59:07.426163 progress 80% (6MB)
69 12:59:07.428346 progress 85% (7MB)
70 12:59:07.430378 progress 90% (7MB)
71 12:59:07.432563 progress 95% (8MB)
72 12:59:07.434778 progress 100% (8MB)
73 12:59:07.434965 8MB downloaded in 2.54s (3.36MB/s)
74 12:59:07.435120 end: 1.2.1 http-download (duration 00:00:03) [common]
76 12:59:07.435359 end: 1.2 download-retry (duration 00:00:03) [common]
77 12:59:07.435451 start: 1.3 download-retry (timeout 00:09:57) [common]
78 12:59:07.435541 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 12:59:07.435650 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/full.rootfs.tar.xz
80 12:59:07.435721 saving as /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/nfsrootfs/full.rootfs.tar
81 12:59:07.435784 total size: 207120848 (197MB)
82 12:59:07.435847 Using unxz to decompress xz
83 12:59:07.439114 progress 0% (0MB)
84 12:59:07.989932 progress 5% (9MB)
85 12:59:08.526060 progress 10% (19MB)
86 12:59:09.116515 progress 15% (29MB)
87 12:59:09.497636 progress 20% (39MB)
88 12:59:09.857811 progress 25% (49MB)
89 12:59:10.452674 progress 30% (59MB)
90 12:59:11.000404 progress 35% (69MB)
91 12:59:11.596481 progress 40% (79MB)
92 12:59:12.152603 progress 45% (88MB)
93 12:59:12.732487 progress 50% (98MB)
94 12:59:13.355620 progress 55% (108MB)
95 12:59:14.031728 progress 60% (118MB)
96 12:59:14.176281 progress 65% (128MB)
97 12:59:14.323377 progress 70% (138MB)
98 12:59:14.432635 progress 75% (148MB)
99 12:59:14.500069 progress 80% (158MB)
100 12:59:14.569970 progress 85% (167MB)
101 12:59:14.675114 progress 90% (177MB)
102 12:59:14.945640 progress 95% (187MB)
103 12:59:15.529964 progress 100% (197MB)
104 12:59:15.535988 197MB downloaded in 8.10s (24.39MB/s)
105 12:59:15.536237 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:59:15.536496 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:59:15.536592 start: 1.4 download-retry (timeout 00:09:49) [common]
109 12:59:15.536684 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 12:59:15.536836 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:59:15.536910 saving as /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/modules/modules.tar
112 12:59:15.536973 total size: 64656 (0MB)
113 12:59:15.537036 Using unxz to decompress xz
114 12:59:15.834014 progress 50% (0MB)
115 12:59:15.835952 progress 100% (0MB)
116 12:59:15.841190 0MB downloaded in 0.30s (0.20MB/s)
117 12:59:15.841449 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:59:15.841736 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:59:15.841842 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 12:59:15.841949 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 12:59:17.842258 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7148201/extract-nfsrootfs-kezwg545
123 12:59:17.842468 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:59:17.842572 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
125 12:59:17.842710 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5
126 12:59:17.842813 makedir: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin
127 12:59:17.842899 makedir: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/tests
128 12:59:17.842982 makedir: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/results
129 12:59:17.843082 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-add-keys
130 12:59:17.843214 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-add-sources
131 12:59:17.843332 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-background-process-start
132 12:59:17.843448 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-background-process-stop
133 12:59:17.843561 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-common-functions
134 12:59:17.843674 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-echo-ipv4
135 12:59:17.843786 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-install-packages
136 12:59:17.843898 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-installed-packages
137 12:59:17.844007 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-os-build
138 12:59:17.844116 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-probe-channel
139 12:59:17.844226 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-probe-ip
140 12:59:17.844336 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-target-ip
141 12:59:17.844446 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-target-mac
142 12:59:17.844560 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-target-storage
143 12:59:17.844674 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-case
144 12:59:17.844826 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-event
145 12:59:17.844937 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-feedback
146 12:59:17.845047 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-raise
147 12:59:17.845157 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-reference
148 12:59:17.845266 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-runner
149 12:59:17.845376 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-set
150 12:59:17.845485 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-test-shell
151 12:59:17.845595 Updating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-add-keys (debian)
152 12:59:17.845714 Updating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-add-sources (debian)
153 12:59:17.845827 Updating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-install-packages (debian)
154 12:59:17.845939 Updating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-installed-packages (debian)
155 12:59:17.846050 Updating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/bin/lava-os-build (debian)
156 12:59:17.846148 Creating /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/environment
157 12:59:17.846235 LAVA metadata
158 12:59:17.846303 - LAVA_JOB_ID=7148201
159 12:59:17.846367 - LAVA_DISPATCHER_IP=192.168.201.1
160 12:59:17.846467 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
161 12:59:17.846533 skipped lava-vland-overlay
162 12:59:17.846610 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 12:59:17.846692 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
164 12:59:17.846756 skipped lava-multinode-overlay
165 12:59:17.846833 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 12:59:17.846917 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
167 12:59:17.846990 Loading test definitions
168 12:59:17.847082 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
169 12:59:17.847158 Using /lava-7148201 at stage 0
170 12:59:17.847402 uuid=7148201_1.5.2.3.1 testdef=None
171 12:59:17.847508 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 12:59:17.847596 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
173 12:59:17.848015 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 12:59:17.848251 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
176 12:59:17.848944 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 12:59:17.849191 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
179 12:59:17.849653 runner path: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/0/tests/0_timesync-off test_uuid 7148201_1.5.2.3.1
180 12:59:17.849802 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 12:59:17.850042 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
183 12:59:17.850121 Using /lava-7148201 at stage 0
184 12:59:17.850218 Fetching tests from https://github.com/kernelci/test-definitions.git
185 12:59:17.850332 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/0/tests/1_kselftest-alsa'
186 12:59:21.842057 Running '/usr/bin/git checkout kernelci.org
187 12:59:21.975796 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 12:59:21.976456 uuid=7148201_1.5.2.3.5 testdef=None
189 12:59:21.976614 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 12:59:21.976906 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
192 12:59:21.977590 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 12:59:21.977834 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
195 12:59:21.978686 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 12:59:21.978931 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
198 12:59:21.979834 runner path: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/0/tests/1_kselftest-alsa test_uuid 7148201_1.5.2.3.5
199 12:59:21.979923 BOARD='asus-cx9400-volteer'
200 12:59:21.979990 BRANCH='cip'
201 12:59:21.980051 SKIPFILE='skipfile-lkft.yaml'
202 12:59:21.980109 TESTPROG_URL='None'
203 12:59:21.980167 TST_CASENAME=''
204 12:59:21.980224 TST_CMDFILES='alsa'
205 12:59:21.980362 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 12:59:21.980578 Creating lava-test-runner.conf files
208 12:59:21.980643 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148201/lava-overlay-6w7h8kv5/lava-7148201/0 for stage 0
209 12:59:21.980728 - 0_timesync-off
210 12:59:21.980839 - 1_kselftest-alsa
211 12:59:21.980930 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
212 12:59:21.981020 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
213 12:59:29.110839 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 12:59:29.111008 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
215 12:59:29.111103 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:59:29.111202 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
217 12:59:29.111292 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
218 12:59:29.212020 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:59:29.212354 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
220 12:59:29.212465 extracting modules file /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148201/extract-nfsrootfs-kezwg545
221 12:59:29.216630 extracting modules file /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148201/extract-overlay-ramdisk-yrcf47pr/ramdisk
222 12:59:29.220433 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:59:29.220548 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
224 12:59:29.220634 [common] Applying overlay to NFS
225 12:59:29.220750 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148201/compress-overlay-v467fryd/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148201/extract-nfsrootfs-kezwg545
226 12:59:29.661242 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:59:29.661412 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
228 12:59:29.661531 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:59:29.661669 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
230 12:59:29.661767 Building ramdisk /var/lib/lava/dispatcher/tmp/7148201/extract-overlay-ramdisk-yrcf47pr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148201/extract-overlay-ramdisk-yrcf47pr/ramdisk
231 12:59:29.694335 >> 24662 blocks
232 12:59:30.164015 rename /var/lib/lava/dispatcher/tmp/7148201/extract-overlay-ramdisk-yrcf47pr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
233 12:59:30.164405 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:59:30.164525 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
235 12:59:30.164632 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
236 12:59:30.164735 No mkimage arch provided, not using FIT.
237 12:59:30.164829 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:59:30.164912 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:59:30.165011 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
240 12:59:30.165104 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
241 12:59:30.165179 No LXC device requested
242 12:59:30.165267 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:59:30.165360 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
244 12:59:30.165441 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:59:30.165530 Checking files for TFTP limit of 4294967296 bytes.
246 12:59:30.165908 end: 1 tftp-deploy (duration 00:00:25) [common]
247 12:59:30.166017 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:59:30.166111 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:59:30.166238 substitutions:
250 12:59:30.166307 - {DTB}: None
251 12:59:30.166373 - {INITRD}: 7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
252 12:59:30.166434 - {KERNEL}: 7148201/tftp-deploy-vdmbfacu/kernel/bzImage
253 12:59:30.166493 - {LAVA_MAC}: None
254 12:59:30.166552 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7148201/extract-nfsrootfs-kezwg545
255 12:59:30.166611 - {NFS_SERVER_IP}: 192.168.201.1
256 12:59:30.166668 - {PRESEED_CONFIG}: None
257 12:59:30.166727 - {PRESEED_LOCAL}: None
258 12:59:30.166783 - {RAMDISK}: 7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
259 12:59:30.166838 - {ROOT_PART}: None
260 12:59:30.166894 - {ROOT}: None
261 12:59:30.166952 - {SERVER_IP}: 192.168.201.1
262 12:59:30.167008 - {TEE}: None
263 12:59:30.167063 Parsed boot commands:
264 12:59:30.167118 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:59:30.167268 Parsed boot commands: tftpboot 192.168.201.1 7148201/tftp-deploy-vdmbfacu/kernel/bzImage 7148201/tftp-deploy-vdmbfacu/kernel/cmdline 7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
266 12:59:30.167366 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:59:30.167457 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:59:30.167551 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:59:30.167643 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:59:30.167718 Not connected, no need to disconnect.
271 12:59:30.167795 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:59:30.167878 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:59:30.167951 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
274 12:59:30.170580 Setting prompt string to ['lava-test: # ']
275 12:59:30.170866 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:59:30.170969 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:59:30.171066 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:59:30.171158 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:59:30.171338 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
280 12:59:30.189280 >> Command sent successfully.
281 12:59:30.191008 Returned 0 in 0 seconds
282 12:59:30.292247 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 12:59:30.293692 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 12:59:30.294198 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 12:59:30.294631 Setting prompt string to 'Starting depthcharge on Voema...'
287 12:59:30.294978 Changing prompt to 'Starting depthcharge on Voema...'
288 12:59:30.295355 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 12:59:30.296536 [Enter `^Ec?' for help]
290 12:59:38.290998
291 12:59:38.291670
292 12:59:38.300632 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 12:59:38.304156 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 12:59:38.310882 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 12:59:38.314070 CPU: AES supported, TXT NOT supported, VT supported
296 12:59:38.320875 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 12:59:38.326975 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 12:59:38.330465 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 12:59:38.333963 VBOOT: Loading verstage.
300 12:59:38.337508 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
301 12:59:38.344352 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 12:59:38.347212 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:59:38.357700 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 12:59:38.364798 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 12:59:38.365384
306 12:59:38.365814
307 12:59:38.377954 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 12:59:38.391191 Probing TPM: . done!
309 12:59:38.394567 TPM ready after 0 ms
310 12:59:38.397939 Connected to device vid:did:rid of 1ae0:0028:00
311 12:59:38.409341 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
312 12:59:38.415948 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:59:38.419515 Initialized TPM device CR50 revision 0
314 12:59:38.473751 tlcl_send_startup: Startup return code is 0
315 12:59:38.474344 TPM: setup succeeded
316 12:59:38.488386 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:59:38.503413 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:59:38.515830 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:59:38.525889 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:59:38.529741 Chrome EC: UHEPI supported
321 12:59:38.532531 Phase 1
322 12:59:38.535663 FMAP: area GBB found @ 1805000 (458752 bytes)
323 12:59:38.543200 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 12:59:38.552820 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 12:59:38.559291 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 12:59:38.565637 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 12:59:38.569009 Recovery requested (1009000e)
328 12:59:38.572508 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 12:59:38.584404 tlcl_extend: response is 0
330 12:59:38.590584 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 12:59:38.600420 tlcl_extend: response is 0
332 12:59:38.606969 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:59:38.613642 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 12:59:38.620460 BS: verstage times (exec / console): total (unknown) / 142 ms
335 12:59:38.621077
336 12:59:38.621466
337 12:59:38.633270 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 12:59:38.640273 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:59:38.643672 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:59:38.646396 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 12:59:38.653043 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 12:59:38.656370 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 12:59:38.660114 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 12:59:38.663481 TCO_STS: 0000 0000
345 12:59:38.666288 GEN_PMCON: d0015038 00002200
346 12:59:38.669597 GBLRST_CAUSE: 00000000 00000000
347 12:59:38.673480 HPR_CAUSE0: 00000000
348 12:59:38.673980 prev_sleep_state 5
349 12:59:38.676278 Boot Count incremented to 9565
350 12:59:38.683150 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:59:38.689845 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:59:38.696917 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:59:38.703122 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 12:59:38.707701 Chrome EC: UHEPI supported
355 12:59:38.714465 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 12:59:38.727380 Probing TPM: done!
357 12:59:38.734006 Connected to device vid:did:rid of 1ae0:0028:00
358 12:59:38.745176 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
359 12:59:38.752496 Initialized TPM device CR50 revision 0
360 12:59:38.762329 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 12:59:38.768646 MRC: Hash idx 0x100b comparison successful.
362 12:59:38.772228 MRC cache found, size faa8
363 12:59:38.772848 bootmode is set to: 2
364 12:59:38.775497 SPD index = 0
365 12:59:38.781960 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 12:59:38.785513 SPD: module type is LPDDR4X
367 12:59:38.789053 SPD: module part number is MT53E512M64D4NW-046
368 12:59:38.795396 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 12:59:38.798607 SPD: device width 16 bits, bus width 16 bits
370 12:59:38.805703 SPD: module size is 1024 MB (per channel)
371 12:59:39.237376 CBMEM:
372 12:59:39.240802 IMD: root @ 0x76fff000 254 entries.
373 12:59:39.244280 IMD: root @ 0x76ffec00 62 entries.
374 12:59:39.247538 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 12:59:39.254398 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 12:59:39.257592 External stage cache:
377 12:59:39.260577 IMD: root @ 0x7b3ff000 254 entries.
378 12:59:39.264309 IMD: root @ 0x7b3fec00 62 entries.
379 12:59:39.279427 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 12:59:39.286162 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 12:59:39.292287 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 12:59:39.306207 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 12:59:39.313240 cse_lite: Skip switching to RW in the recovery path
384 12:59:39.313822 8 DIMMs found
385 12:59:39.314215 SMM Memory Map
386 12:59:39.317192 SMRAM : 0x7b000000 0x800000
387 12:59:39.320999 Subregion 0: 0x7b000000 0x200000
388 12:59:39.324528 Subregion 1: 0x7b200000 0x200000
389 12:59:39.327962 Subregion 2: 0x7b400000 0x400000
390 12:59:39.331322 top_of_ram = 0x77000000
391 12:59:39.335065 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 12:59:39.341618 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 12:59:39.347829 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 12:59:39.351398 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 12:59:39.358137 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 12:59:39.364179 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 12:59:39.376205 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 12:59:39.382954 Processing 211 relocs. Offset value of 0x74c0b000
399 12:59:39.389473 BS: romstage times (exec / console): total (unknown) / 277 ms
400 12:59:39.395282
401 12:59:39.395792
402 12:59:39.405448 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 12:59:39.408776 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 12:59:39.418407 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:59:39.425538 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:59:39.431888 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 12:59:39.438650 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 12:59:39.485414 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 12:59:39.492171 Processing 5008 relocs. Offset value of 0x75d98000
410 12:59:39.495348 BS: postcar times (exec / console): total (unknown) / 59 ms
411 12:59:39.498958
412 12:59:39.499551
413 12:59:39.508902 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 12:59:39.509493 Normal boot
415 12:59:39.512215 FW_CONFIG value is 0x804c02
416 12:59:39.515638 PCI: 00:07.0 disabled by fw_config
417 12:59:39.519237 PCI: 00:07.1 disabled by fw_config
418 12:59:39.522314 PCI: 00:0d.2 disabled by fw_config
419 12:59:39.525787 PCI: 00:1c.7 disabled by fw_config
420 12:59:39.532592 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:59:39.539015 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:59:39.542228 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 12:59:39.545307 GENERIC: 0.0 disabled by fw_config
424 12:59:39.549048 GENERIC: 1.0 disabled by fw_config
425 12:59:39.555800 fw_config match found: DB_USB=USB3_ACTIVE
426 12:59:39.558887 fw_config match found: DB_USB=USB3_ACTIVE
427 12:59:39.562597 fw_config match found: DB_USB=USB3_ACTIVE
428 12:59:39.565169 fw_config match found: DB_USB=USB3_ACTIVE
429 12:59:39.572155 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 12:59:39.578925 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:59:39.585597 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:59:39.595682 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 12:59:39.599110 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 12:59:39.605479 microcode: Update skipped, already up-to-date
435 12:59:39.612077 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 12:59:39.639240 Detected 4 core, 8 thread CPU.
437 12:59:39.642874 Setting up SMI for CPU
438 12:59:39.646144 IED base = 0x7b400000
439 12:59:39.646722 IED size = 0x00400000
440 12:59:39.649170 Will perform SMM setup.
441 12:59:39.655546 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 12:59:39.662365 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 12:59:39.668966 Processing 16 relocs. Offset value of 0x00030000
444 12:59:39.672447 Attempting to start 7 APs
445 12:59:39.675536 Waiting for 10ms after sending INIT.
446 12:59:39.691030 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 12:59:39.694538 AP: slot 6 apic_id 2.
448 12:59:39.697910 AP: slot 2 apic_id 3.
449 12:59:39.698396 done.
450 12:59:39.698774 AP: slot 3 apic_id 5.
451 12:59:39.701228 AP: slot 7 apic_id 4.
452 12:59:39.704781 AP: slot 4 apic_id 7.
453 12:59:39.705369 AP: slot 5 apic_id 6.
454 12:59:39.710776 Waiting for 2nd SIPI to complete...done.
455 12:59:39.717607 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 12:59:39.724420 Processing 13 relocs. Offset value of 0x00038000
457 12:59:39.725045 Unable to locate Global NVS
458 12:59:39.734812 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 12:59:39.737636 Installing permanent SMM handler to 0x7b000000
460 12:59:39.747798 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 12:59:39.751249 Processing 794 relocs. Offset value of 0x7b010000
462 12:59:39.757804 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 12:59:39.764581 Processing 13 relocs. Offset value of 0x7b008000
464 12:59:39.771285 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 12:59:39.774134 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 12:59:39.780844 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 12:59:39.787761 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 12:59:39.794318 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 12:59:39.801020 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 12:59:39.804393 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 12:59:39.807759 Unable to locate Global NVS
472 12:59:39.814170 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 12:59:39.819073 Clearing SMI status registers
474 12:59:39.822373 SMI_STS: PM1
475 12:59:39.822854 PM1_STS: PWRBTN
476 12:59:39.832356 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 12:59:39.832983 In relocation handler: CPU 0
478 12:59:39.838777 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 12:59:39.842061 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:59:39.845651 Relocation complete.
481 12:59:39.852067 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 12:59:39.855432 In relocation handler: CPU 1
483 12:59:39.858768 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 12:59:39.862056 Relocation complete.
485 12:59:39.868868 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
486 12:59:39.872366 In relocation handler: CPU 6
487 12:59:39.875802 New SMBASE=0x7affe800 IEDBASE=0x7b400000
488 12:59:39.882363 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 12:59:39.883012 Relocation complete.
490 12:59:39.888850 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
491 12:59:39.892294 In relocation handler: CPU 2
492 12:59:39.898524 New SMBASE=0x7afff800 IEDBASE=0x7b400000
493 12:59:39.899014 Relocation complete.
494 12:59:39.905442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 12:59:39.908622 In relocation handler: CPU 7
496 12:59:39.912034 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 12:59:39.918748 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 12:59:39.921913 Relocation complete.
499 12:59:39.928859 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
500 12:59:39.932307 In relocation handler: CPU 3
501 12:59:39.935099 New SMBASE=0x7afff400 IEDBASE=0x7b400000
502 12:59:39.938609 Relocation complete.
503 12:59:39.944960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
504 12:59:39.948443 In relocation handler: CPU 5
505 12:59:39.951682 New SMBASE=0x7affec00 IEDBASE=0x7b400000
506 12:59:39.954940 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:59:39.958390 Relocation complete.
508 12:59:39.965035 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
509 12:59:39.968017 In relocation handler: CPU 4
510 12:59:39.971372 New SMBASE=0x7afff000 IEDBASE=0x7b400000
511 12:59:39.974896 Relocation complete.
512 12:59:39.978199 Initializing CPU #0
513 12:59:39.981596 CPU: vendor Intel device 806c1
514 12:59:39.985050 CPU: family 06, model 8c, stepping 01
515 12:59:39.985534 Clearing out pending MCEs
516 12:59:39.989083 Setting up local APIC...
517 12:59:39.992443 apic_id: 0x00 done.
518 12:59:39.995193 Turbo is available but hidden
519 12:59:39.998741 Turbo is available and visible
520 12:59:40.002037 microcode: Update skipped, already up-to-date
521 12:59:40.005709 CPU #0 initialized
522 12:59:40.006287 Initializing CPU #5
523 12:59:40.008926 Initializing CPU #7
524 12:59:40.012598 Initializing CPU #3
525 12:59:40.015931 CPU: vendor Intel device 806c1
526 12:59:40.019093 CPU: family 06, model 8c, stepping 01
527 12:59:40.021720 CPU: vendor Intel device 806c1
528 12:59:40.025340 CPU: family 06, model 8c, stepping 01
529 12:59:40.028706 Clearing out pending MCEs
530 12:59:40.029320 Initializing CPU #2
531 12:59:40.031963 Initializing CPU #6
532 12:59:40.035629 CPU: vendor Intel device 806c1
533 12:59:40.039015 CPU: family 06, model 8c, stepping 01
534 12:59:40.042427 Setting up local APIC...
535 12:59:40.045340 CPU: vendor Intel device 806c1
536 12:59:40.048905 CPU: family 06, model 8c, stepping 01
537 12:59:40.052082 Clearing out pending MCEs
538 12:59:40.052664 Clearing out pending MCEs
539 12:59:40.055495 Setting up local APIC...
540 12:59:40.058676 Setting up local APIC...
541 12:59:40.061944 CPU: vendor Intel device 806c1
542 12:59:40.065422 CPU: family 06, model 8c, stepping 01
543 12:59:40.068848 Initializing CPU #4
544 12:59:40.069330 Clearing out pending MCEs
545 12:59:40.071705 CPU: vendor Intel device 806c1
546 12:59:40.075128 CPU: family 06, model 8c, stepping 01
547 12:59:40.078594 Setting up local APIC...
548 12:59:40.081844 apic_id: 0x02 done.
549 12:59:40.085213 apic_id: 0x03 done.
550 12:59:40.088815 microcode: Update skipped, already up-to-date
551 12:59:40.092111 microcode: Update skipped, already up-to-date
552 12:59:40.095211 CPU #6 initialized
553 12:59:40.095710 CPU #2 initialized
554 12:59:40.098412 Initializing CPU #1
555 12:59:40.101900 Clearing out pending MCEs
556 12:59:40.105248 apic_id: 0x06 done.
557 12:59:40.105744 Setting up local APIC...
558 12:59:40.108648 apic_id: 0x04 done.
559 12:59:40.112198 Clearing out pending MCEs
560 12:59:40.115417 microcode: Update skipped, already up-to-date
561 12:59:40.118621 Setting up local APIC...
562 12:59:40.119116 apic_id: 0x07 done.
563 12:59:40.125697 microcode: Update skipped, already up-to-date
564 12:59:40.128765 microcode: Update skipped, already up-to-date
565 12:59:40.131951 CPU #7 initialized
566 12:59:40.132442 apic_id: 0x05 done.
567 12:59:40.134816 CPU #5 initialized
568 12:59:40.138550 CPU #4 initialized
569 12:59:40.141630 CPU: vendor Intel device 806c1
570 12:59:40.145332 CPU: family 06, model 8c, stepping 01
571 12:59:40.148620 microcode: Update skipped, already up-to-date
572 12:59:40.151924 Clearing out pending MCEs
573 12:59:40.155339 CPU #3 initialized
574 12:59:40.155956 Setting up local APIC...
575 12:59:40.157962 apic_id: 0x01 done.
576 12:59:40.161366 microcode: Update skipped, already up-to-date
577 12:59:40.164705 CPU #1 initialized
578 12:59:40.168061 bsp_do_flight_plan done after 455 msecs.
579 12:59:40.171273 CPU: frequency set to 4000 MHz
580 12:59:40.174724 Enabling SMIs.
581 12:59:40.181664 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 12:59:40.196272 SATAXPCIE1 indicates PCIe NVMe is present
583 12:59:40.199738 Probing TPM: done!
584 12:59:40.203225 Connected to device vid:did:rid of 1ae0:0028:00
585 12:59:40.213550 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
586 12:59:40.217078 Initialized TPM device CR50 revision 0
587 12:59:40.220482 Enabling S0i3.4
588 12:59:40.227006 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 12:59:40.230264 Found a VBT of 8704 bytes after decompression
590 12:59:40.237087 cse_lite: CSE RO boot. HybridStorageMode disabled
591 12:59:40.243505 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 12:59:40.319762 FSPS returned 0
593 12:59:40.323202 Executing Phase 1 of FspMultiPhaseSiInit
594 12:59:40.332894 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 12:59:40.336341 port C0 DISC req: usage 1 usb3 1 usb2 5
596 12:59:40.339795 Raw Buffer output 0 00000511
597 12:59:40.342697 Raw Buffer output 1 00000000
598 12:59:40.346663 pmc_send_ipc_cmd succeeded
599 12:59:40.353478 port C1 DISC req: usage 1 usb3 2 usb2 3
600 12:59:40.354002 Raw Buffer output 0 00000321
601 12:59:40.356218 Raw Buffer output 1 00000000
602 12:59:40.361038 pmc_send_ipc_cmd succeeded
603 12:59:40.366020 Detected 4 core, 8 thread CPU.
604 12:59:40.369406 Detected 4 core, 8 thread CPU.
605 12:59:40.602918 Display FSP Version Info HOB
606 12:59:40.606869 Reference Code - CPU = a.0.4c.31
607 12:59:40.609479 uCode Version = 0.0.0.86
608 12:59:40.613221 TXT ACM version = ff.ff.ff.ffff
609 12:59:40.616471 Reference Code - ME = a.0.4c.31
610 12:59:40.620007 MEBx version = 0.0.0.0
611 12:59:40.623261 ME Firmware Version = Consumer SKU
612 12:59:40.626694 Reference Code - PCH = a.0.4c.31
613 12:59:40.630025 PCH-CRID Status = Disabled
614 12:59:40.633438 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:59:40.636764 PCH-CRID New Value = ff.ff.ff.ffff
616 12:59:40.639690 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:59:40.643286 PCH Hsio Version = 4.0.0.0
618 12:59:40.646318 Reference Code - SA - System Agent = a.0.4c.31
619 12:59:40.649651 Reference Code - MRC = 2.0.0.1
620 12:59:40.653082 SA - PCIe Version = a.0.4c.31
621 12:59:40.656627 SA-CRID Status = Disabled
622 12:59:40.659968 SA-CRID Original Value = 0.0.0.1
623 12:59:40.662834 SA-CRID New Value = 0.0.0.1
624 12:59:40.666133 OPROM - VBIOS = ff.ff.ff.ffff
625 12:59:40.669667 IO Manageability Engine FW Version = 11.1.4.0
626 12:59:40.672903 PHY Build Version = 0.0.0.e0
627 12:59:40.676373 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:59:40.683391 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:59:40.686020 ITSS IRQ Polarities Before:
630 12:59:40.686518 IPC0: 0xffffffff
631 12:59:40.689298 IPC1: 0xffffffff
632 12:59:40.689785 IPC2: 0xffffffff
633 12:59:40.692953 IPC3: 0xffffffff
634 12:59:40.696373 ITSS IRQ Polarities After:
635 12:59:40.696989 IPC0: 0xffffffff
636 12:59:40.699591 IPC1: 0xffffffff
637 12:59:40.700197 IPC2: 0xffffffff
638 12:59:40.702806 IPC3: 0xffffffff
639 12:59:40.706094 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:59:40.719744 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:59:40.729269 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:59:40.742817 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:59:40.749552 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
644 12:59:40.750137 Enumerating buses...
645 12:59:40.756357 Show all devs... Before device enumeration.
646 12:59:40.756969 Root Device: enabled 1
647 12:59:40.759311 DOMAIN: 0000: enabled 1
648 12:59:40.762782 CPU_CLUSTER: 0: enabled 1
649 12:59:40.766073 PCI: 00:00.0: enabled 1
650 12:59:40.766670 PCI: 00:02.0: enabled 1
651 12:59:40.769419 PCI: 00:04.0: enabled 1
652 12:59:40.772570 PCI: 00:05.0: enabled 1
653 12:59:40.775953 PCI: 00:06.0: enabled 0
654 12:59:40.776438 PCI: 00:07.0: enabled 0
655 12:59:40.779187 PCI: 00:07.1: enabled 0
656 12:59:40.782847 PCI: 00:07.2: enabled 0
657 12:59:40.786055 PCI: 00:07.3: enabled 0
658 12:59:40.786546 PCI: 00:08.0: enabled 1
659 12:59:40.789595 PCI: 00:09.0: enabled 0
660 12:59:40.792466 PCI: 00:0a.0: enabled 0
661 12:59:40.795799 PCI: 00:0d.0: enabled 1
662 12:59:40.796376 PCI: 00:0d.1: enabled 0
663 12:59:40.799078 PCI: 00:0d.2: enabled 0
664 12:59:40.802379 PCI: 00:0d.3: enabled 0
665 12:59:40.802864 PCI: 00:0e.0: enabled 0
666 12:59:40.805678 PCI: 00:10.2: enabled 1
667 12:59:40.809133 PCI: 00:10.6: enabled 0
668 12:59:40.812660 PCI: 00:10.7: enabled 0
669 12:59:40.813266 PCI: 00:12.0: enabled 0
670 12:59:40.816214 PCI: 00:12.6: enabled 0
671 12:59:40.819426 PCI: 00:13.0: enabled 0
672 12:59:40.822937 PCI: 00:14.0: enabled 1
673 12:59:40.823516 PCI: 00:14.1: enabled 0
674 12:59:40.825666 PCI: 00:14.2: enabled 1
675 12:59:40.829344 PCI: 00:14.3: enabled 1
676 12:59:40.832441 PCI: 00:15.0: enabled 1
677 12:59:40.833079 PCI: 00:15.1: enabled 1
678 12:59:40.835513 PCI: 00:15.2: enabled 1
679 12:59:40.838859 PCI: 00:15.3: enabled 1
680 12:59:40.843024 PCI: 00:16.0: enabled 1
681 12:59:40.843607 PCI: 00:16.1: enabled 0
682 12:59:40.845570 PCI: 00:16.2: enabled 0
683 12:59:40.848911 PCI: 00:16.3: enabled 0
684 12:59:40.849399 PCI: 00:16.4: enabled 0
685 12:59:40.852478 PCI: 00:16.5: enabled 0
686 12:59:40.856042 PCI: 00:17.0: enabled 1
687 12:59:40.859460 PCI: 00:19.0: enabled 0
688 12:59:40.860040 PCI: 00:19.1: enabled 1
689 12:59:40.862144 PCI: 00:19.2: enabled 0
690 12:59:40.865700 PCI: 00:1c.0: enabled 1
691 12:59:40.869353 PCI: 00:1c.1: enabled 0
692 12:59:40.869930 PCI: 00:1c.2: enabled 0
693 12:59:40.872436 PCI: 00:1c.3: enabled 0
694 12:59:40.875777 PCI: 00:1c.4: enabled 0
695 12:59:40.878668 PCI: 00:1c.5: enabled 0
696 12:59:40.879174 PCI: 00:1c.6: enabled 1
697 12:59:40.882337 PCI: 00:1c.7: enabled 0
698 12:59:40.885376 PCI: 00:1d.0: enabled 1
699 12:59:40.885862 PCI: 00:1d.1: enabled 0
700 12:59:40.888823 PCI: 00:1d.2: enabled 1
701 12:59:40.892358 PCI: 00:1d.3: enabled 0
702 12:59:40.895640 PCI: 00:1e.0: enabled 1
703 12:59:40.896119 PCI: 00:1e.1: enabled 0
704 12:59:40.898964 PCI: 00:1e.2: enabled 1
705 12:59:40.902280 PCI: 00:1e.3: enabled 1
706 12:59:40.905693 PCI: 00:1f.0: enabled 1
707 12:59:40.906253 PCI: 00:1f.1: enabled 0
708 12:59:40.909386 PCI: 00:1f.2: enabled 1
709 12:59:40.912495 PCI: 00:1f.3: enabled 1
710 12:59:40.915721 PCI: 00:1f.4: enabled 0
711 12:59:40.916301 PCI: 00:1f.5: enabled 1
712 12:59:40.919251 PCI: 00:1f.6: enabled 0
713 12:59:40.922356 PCI: 00:1f.7: enabled 0
714 12:59:40.922860 APIC: 00: enabled 1
715 12:59:40.925579 GENERIC: 0.0: enabled 1
716 12:59:40.928786 GENERIC: 0.0: enabled 1
717 12:59:40.932013 GENERIC: 1.0: enabled 1
718 12:59:40.932510 GENERIC: 0.0: enabled 1
719 12:59:40.935336 GENERIC: 1.0: enabled 1
720 12:59:40.938713 USB0 port 0: enabled 1
721 12:59:40.942230 GENERIC: 0.0: enabled 1
722 12:59:40.942813 USB0 port 0: enabled 1
723 12:59:40.945575 GENERIC: 0.0: enabled 1
724 12:59:40.948727 I2C: 00:1a: enabled 1
725 12:59:40.949242 I2C: 00:31: enabled 1
726 12:59:40.952354 I2C: 00:32: enabled 1
727 12:59:40.955782 I2C: 00:10: enabled 1
728 12:59:40.956373 I2C: 00:15: enabled 1
729 12:59:40.959170 GENERIC: 0.0: enabled 0
730 12:59:40.961819 GENERIC: 1.0: enabled 0
731 12:59:40.965351 GENERIC: 0.0: enabled 1
732 12:59:40.965938 SPI: 00: enabled 1
733 12:59:40.968851 SPI: 00: enabled 1
734 12:59:40.969445 PNP: 0c09.0: enabled 1
735 12:59:40.971977 GENERIC: 0.0: enabled 1
736 12:59:40.975511 USB3 port 0: enabled 1
737 12:59:40.978948 USB3 port 1: enabled 1
738 12:59:40.979542 USB3 port 2: enabled 0
739 12:59:40.981789 USB3 port 3: enabled 0
740 12:59:40.985167 USB2 port 0: enabled 0
741 12:59:40.985687 USB2 port 1: enabled 1
742 12:59:40.988450 USB2 port 2: enabled 1
743 12:59:40.992151 USB2 port 3: enabled 0
744 12:59:40.995607 USB2 port 4: enabled 1
745 12:59:40.996232 USB2 port 5: enabled 0
746 12:59:40.998686 USB2 port 6: enabled 0
747 12:59:41.002245 USB2 port 7: enabled 0
748 12:59:41.002845 USB2 port 8: enabled 0
749 12:59:41.004952 USB2 port 9: enabled 0
750 12:59:41.008665 USB3 port 0: enabled 0
751 12:59:41.009327 USB3 port 1: enabled 1
752 12:59:41.012009 USB3 port 2: enabled 0
753 12:59:41.015076 USB3 port 3: enabled 0
754 12:59:41.018404 GENERIC: 0.0: enabled 1
755 12:59:41.019008 GENERIC: 1.0: enabled 1
756 12:59:41.021836 APIC: 01: enabled 1
757 12:59:41.025333 APIC: 03: enabled 1
758 12:59:41.025957 APIC: 05: enabled 1
759 12:59:41.028549 APIC: 07: enabled 1
760 12:59:41.029077 APIC: 06: enabled 1
761 12:59:41.031816 APIC: 02: enabled 1
762 12:59:41.035122 APIC: 04: enabled 1
763 12:59:41.035608 Compare with tree...
764 12:59:41.038877 Root Device: enabled 1
765 12:59:41.042088 DOMAIN: 0000: enabled 1
766 12:59:41.045706 PCI: 00:00.0: enabled 1
767 12:59:41.046304 PCI: 00:02.0: enabled 1
768 12:59:41.048724 PCI: 00:04.0: enabled 1
769 12:59:41.052244 GENERIC: 0.0: enabled 1
770 12:59:41.055524 PCI: 00:05.0: enabled 1
771 12:59:41.059041 PCI: 00:06.0: enabled 0
772 12:59:41.059633 PCI: 00:07.0: enabled 0
773 12:59:41.061702 GENERIC: 0.0: enabled 1
774 12:59:41.065107 PCI: 00:07.1: enabled 0
775 12:59:41.068441 GENERIC: 1.0: enabled 1
776 12:59:41.071987 PCI: 00:07.2: enabled 0
777 12:59:41.072514 GENERIC: 0.0: enabled 1
778 12:59:41.074761 PCI: 00:07.3: enabled 0
779 12:59:41.078317 GENERIC: 1.0: enabled 1
780 12:59:41.081610 PCI: 00:08.0: enabled 1
781 12:59:41.085492 PCI: 00:09.0: enabled 0
782 12:59:41.086070 PCI: 00:0a.0: enabled 0
783 12:59:41.088591 PCI: 00:0d.0: enabled 1
784 12:59:41.092260 USB0 port 0: enabled 1
785 12:59:41.094993 USB3 port 0: enabled 1
786 12:59:41.098264 USB3 port 1: enabled 1
787 12:59:41.098849 USB3 port 2: enabled 0
788 12:59:41.101400 USB3 port 3: enabled 0
789 12:59:41.104863 PCI: 00:0d.1: enabled 0
790 12:59:41.108504 PCI: 00:0d.2: enabled 0
791 12:59:41.111621 GENERIC: 0.0: enabled 1
792 12:59:41.112109 PCI: 00:0d.3: enabled 0
793 12:59:41.115113 PCI: 00:0e.0: enabled 0
794 12:59:41.118286 PCI: 00:10.2: enabled 1
795 12:59:41.121830 PCI: 00:10.6: enabled 0
796 12:59:41.125275 PCI: 00:10.7: enabled 0
797 12:59:41.125864 PCI: 00:12.0: enabled 0
798 12:59:41.128760 PCI: 00:12.6: enabled 0
799 12:59:41.131846 PCI: 00:13.0: enabled 0
800 12:59:41.134582 PCI: 00:14.0: enabled 1
801 12:59:41.138056 USB0 port 0: enabled 1
802 12:59:41.138538 USB2 port 0: enabled 0
803 12:59:41.141627 USB2 port 1: enabled 1
804 12:59:41.144961 USB2 port 2: enabled 1
805 12:59:41.148414 USB2 port 3: enabled 0
806 12:59:41.151832 USB2 port 4: enabled 1
807 12:59:41.154837 USB2 port 5: enabled 0
808 12:59:41.155381 USB2 port 6: enabled 0
809 12:59:41.158206 USB2 port 7: enabled 0
810 12:59:41.161580 USB2 port 8: enabled 0
811 12:59:41.165201 USB2 port 9: enabled 0
812 12:59:41.168494 USB3 port 0: enabled 0
813 12:59:41.169106 USB3 port 1: enabled 1
814 12:59:41.171669 USB3 port 2: enabled 0
815 12:59:41.175062 USB3 port 3: enabled 0
816 12:59:41.178747 PCI: 00:14.1: enabled 0
817 12:59:41.181274 PCI: 00:14.2: enabled 1
818 12:59:41.181755 PCI: 00:14.3: enabled 1
819 12:59:41.184600 GENERIC: 0.0: enabled 1
820 12:59:41.188266 PCI: 00:15.0: enabled 1
821 12:59:41.191770 I2C: 00:1a: enabled 1
822 12:59:41.195177 I2C: 00:31: enabled 1
823 12:59:41.195831 I2C: 00:32: enabled 1
824 12:59:41.198526 PCI: 00:15.1: enabled 1
825 12:59:41.201264 I2C: 00:10: enabled 1
826 12:59:41.205311 PCI: 00:15.2: enabled 1
827 12:59:41.207905 PCI: 00:15.3: enabled 1
828 12:59:41.208441 PCI: 00:16.0: enabled 1
829 12:59:41.211220 PCI: 00:16.1: enabled 0
830 12:59:41.214955 PCI: 00:16.2: enabled 0
831 12:59:41.217999 PCI: 00:16.3: enabled 0
832 12:59:41.221381 PCI: 00:16.4: enabled 0
833 12:59:41.221961 PCI: 00:16.5: enabled 0
834 12:59:41.224614 PCI: 00:17.0: enabled 1
835 12:59:41.228280 PCI: 00:19.0: enabled 0
836 12:59:41.231444 PCI: 00:19.1: enabled 1
837 12:59:41.232029 I2C: 00:15: enabled 1
838 12:59:41.235269 PCI: 00:19.2: enabled 0
839 12:59:41.238666 PCI: 00:1d.0: enabled 1
840 12:59:41.242980 GENERIC: 0.0: enabled 1
841 12:59:41.243560 PCI: 00:1e.0: enabled 1
842 12:59:41.245584 PCI: 00:1e.1: enabled 0
843 12:59:41.249116 PCI: 00:1e.2: enabled 1
844 12:59:41.252495 SPI: 00: enabled 1
845 12:59:41.253167 PCI: 00:1e.3: enabled 1
846 12:59:41.256006 SPI: 00: enabled 1
847 12:59:41.259306 PCI: 00:1f.0: enabled 1
848 12:59:41.310940 PNP: 0c09.0: enabled 1
849 12:59:41.311561 PCI: 00:1f.1: enabled 0
850 12:59:41.311964 PCI: 00:1f.2: enabled 1
851 12:59:41.312339 GENERIC: 0.0: enabled 1
852 12:59:41.312691 GENERIC: 0.0: enabled 1
853 12:59:41.313056 GENERIC: 1.0: enabled 1
854 12:59:41.313393 PCI: 00:1f.3: enabled 1
855 12:59:41.313723 PCI: 00:1f.4: enabled 0
856 12:59:41.314045 PCI: 00:1f.5: enabled 1
857 12:59:41.314369 PCI: 00:1f.6: enabled 0
858 12:59:41.315073 PCI: 00:1f.7: enabled 0
859 12:59:41.315432 CPU_CLUSTER: 0: enabled 1
860 12:59:41.315765 APIC: 00: enabled 1
861 12:59:41.316090 APIC: 01: enabled 1
862 12:59:41.316413 APIC: 03: enabled 1
863 12:59:41.316758 APIC: 05: enabled 1
864 12:59:41.317103 APIC: 07: enabled 1
865 12:59:41.317421 APIC: 06: enabled 1
866 12:59:41.317736 APIC: 02: enabled 1
867 12:59:41.318051 APIC: 04: enabled 1
868 12:59:41.333029 Root Device scanning...
869 12:59:41.333637 scan_static_bus for Root Device
870 12:59:41.334028 DOMAIN: 0000 enabled
871 12:59:41.334388 CPU_CLUSTER: 0 enabled
872 12:59:41.334737 DOMAIN: 0000 scanning...
873 12:59:41.335073 PCI: pci_scan_bus for bus 00
874 12:59:41.335429 PCI: 00:00.0 [8086/0000] ops
875 12:59:41.336527 PCI: 00:00.0 [8086/9a12] enabled
876 12:59:41.337038 PCI: 00:02.0 [8086/0000] bus ops
877 12:59:41.339751 PCI: 00:02.0 [8086/9a40] enabled
878 12:59:41.343285 PCI: 00:04.0 [8086/0000] bus ops
879 12:59:41.346616 PCI: 00:04.0 [8086/9a03] enabled
880 12:59:41.349942 PCI: 00:05.0 [8086/9a19] enabled
881 12:59:41.353302 PCI: 00:07.0 [0000/0000] hidden
882 12:59:41.356529 PCI: 00:08.0 [8086/9a11] enabled
883 12:59:41.359921 PCI: 00:0a.0 [8086/9a0d] disabled
884 12:59:41.363113 PCI: 00:0d.0 [8086/0000] bus ops
885 12:59:41.366776 PCI: 00:0d.0 [8086/9a13] enabled
886 12:59:41.370070 PCI: 00:14.0 [8086/0000] bus ops
887 12:59:41.373582 PCI: 00:14.0 [8086/a0ed] enabled
888 12:59:41.376670 PCI: 00:14.2 [8086/a0ef] enabled
889 12:59:41.379611 PCI: 00:14.3 [8086/0000] bus ops
890 12:59:41.383243 PCI: 00:14.3 [8086/a0f0] enabled
891 12:59:41.386595 PCI: 00:15.0 [8086/0000] bus ops
892 12:59:41.389676 PCI: 00:15.0 [8086/a0e8] enabled
893 12:59:41.393063 PCI: 00:15.1 [8086/0000] bus ops
894 12:59:41.396579 PCI: 00:15.1 [8086/a0e9] enabled
895 12:59:41.399810 PCI: 00:15.2 [8086/0000] bus ops
896 12:59:41.403308 PCI: 00:15.2 [8086/a0ea] enabled
897 12:59:41.406124 PCI: 00:15.3 [8086/0000] bus ops
898 12:59:41.409762 PCI: 00:15.3 [8086/a0eb] enabled
899 12:59:41.412799 PCI: 00:16.0 [8086/0000] ops
900 12:59:41.416157 PCI: 00:16.0 [8086/a0e0] enabled
901 12:59:41.423271 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 12:59:41.426651 PCI: 00:19.0 [8086/0000] bus ops
903 12:59:41.429806 PCI: 00:19.0 [8086/a0c5] disabled
904 12:59:41.432707 PCI: 00:19.1 [8086/0000] bus ops
905 12:59:41.436073 PCI: 00:19.1 [8086/a0c6] enabled
906 12:59:41.439736 PCI: 00:1d.0 [8086/0000] bus ops
907 12:59:41.443230 PCI: 00:1d.0 [8086/a0b0] enabled
908 12:59:41.443814 PCI: 00:1e.0 [8086/0000] ops
909 12:59:41.446557 PCI: 00:1e.0 [8086/a0a8] enabled
910 12:59:41.450212 PCI: 00:1e.2 [8086/0000] bus ops
911 12:59:41.453009 PCI: 00:1e.2 [8086/a0aa] enabled
912 12:59:41.456563 PCI: 00:1e.3 [8086/0000] bus ops
913 12:59:41.459598 PCI: 00:1e.3 [8086/a0ab] enabled
914 12:59:41.462904 PCI: 00:1f.0 [8086/0000] bus ops
915 12:59:41.466469 PCI: 00:1f.0 [8086/a087] enabled
916 12:59:41.469965 RTC Init
917 12:59:41.473406 Set power on after power failure.
918 12:59:41.474057 Disabling Deep S3
919 12:59:41.476582 Disabling Deep S3
920 12:59:41.479610 Disabling Deep S4
921 12:59:41.480190 Disabling Deep S4
922 12:59:41.482796 Disabling Deep S5
923 12:59:41.483283 Disabling Deep S5
924 12:59:41.486372 PCI: 00:1f.2 [0000/0000] hidden
925 12:59:41.489495 PCI: 00:1f.3 [8086/0000] bus ops
926 12:59:41.492900 PCI: 00:1f.3 [8086/a0c8] enabled
927 12:59:41.496406 PCI: 00:1f.5 [8086/0000] bus ops
928 12:59:41.499933 PCI: 00:1f.5 [8086/a0a4] enabled
929 12:59:41.503258 PCI: Leftover static devices:
930 12:59:41.506433 PCI: 00:10.2
931 12:59:41.506923 PCI: 00:10.6
932 12:59:41.507304 PCI: 00:10.7
933 12:59:41.510050 PCI: 00:06.0
934 12:59:41.510627 PCI: 00:07.1
935 12:59:41.513210 PCI: 00:07.2
936 12:59:41.513699 PCI: 00:07.3
937 12:59:41.514086 PCI: 00:09.0
938 12:59:41.516830 PCI: 00:0d.1
939 12:59:41.517409 PCI: 00:0d.2
940 12:59:41.520170 PCI: 00:0d.3
941 12:59:41.520786 PCI: 00:0e.0
942 12:59:41.521188 PCI: 00:12.0
943 12:59:41.523498 PCI: 00:12.6
944 12:59:41.524088 PCI: 00:13.0
945 12:59:41.526098 PCI: 00:14.1
946 12:59:41.526585 PCI: 00:16.1
947 12:59:41.529513 PCI: 00:16.2
948 12:59:41.530009 PCI: 00:16.3
949 12:59:41.530494 PCI: 00:16.4
950 12:59:41.532822 PCI: 00:16.5
951 12:59:41.533301 PCI: 00:17.0
952 12:59:41.536396 PCI: 00:19.2
953 12:59:41.536908 PCI: 00:1e.1
954 12:59:41.537295 PCI: 00:1f.1
955 12:59:41.539817 PCI: 00:1f.4
956 12:59:41.540430 PCI: 00:1f.6
957 12:59:41.543181 PCI: 00:1f.7
958 12:59:41.546521 PCI: Check your devicetree.cb.
959 12:59:41.547105 PCI: 00:02.0 scanning...
960 12:59:41.549877 scan_generic_bus for PCI: 00:02.0
961 12:59:41.556341 scan_generic_bus for PCI: 00:02.0 done
962 12:59:41.559793 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:59:41.563296 PCI: 00:04.0 scanning...
964 12:59:41.565811 scan_generic_bus for PCI: 00:04.0
965 12:59:41.569225 GENERIC: 0.0 enabled
966 12:59:41.572795 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:59:41.579310 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:59:41.582713 PCI: 00:0d.0 scanning...
969 12:59:41.586331 scan_static_bus for PCI: 00:0d.0
970 12:59:41.586956 USB0 port 0 enabled
971 12:59:41.589447 USB0 port 0 scanning...
972 12:59:41.592809 scan_static_bus for USB0 port 0
973 12:59:41.596140 USB3 port 0 enabled
974 12:59:41.596623 USB3 port 1 enabled
975 12:59:41.599220 USB3 port 2 disabled
976 12:59:41.602659 USB3 port 3 disabled
977 12:59:41.603256 USB3 port 0 scanning...
978 12:59:41.605725 scan_static_bus for USB3 port 0
979 12:59:41.612661 scan_static_bus for USB3 port 0 done
980 12:59:41.616156 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:59:41.619088 USB3 port 1 scanning...
982 12:59:41.622678 scan_static_bus for USB3 port 1
983 12:59:41.625852 scan_static_bus for USB3 port 1 done
984 12:59:41.629318 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:59:41.632455 scan_static_bus for USB0 port 0 done
986 12:59:41.639456 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:59:41.642900 scan_static_bus for PCI: 00:0d.0 done
988 12:59:41.646040 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:59:41.649120 PCI: 00:14.0 scanning...
990 12:59:41.652444 scan_static_bus for PCI: 00:14.0
991 12:59:41.655772 USB0 port 0 enabled
992 12:59:41.658964 USB0 port 0 scanning...
993 12:59:41.662278 scan_static_bus for USB0 port 0
994 12:59:41.662767 USB2 port 0 disabled
995 12:59:41.665605 USB2 port 1 enabled
996 12:59:41.666126 USB2 port 2 enabled
997 12:59:41.669044 USB2 port 3 disabled
998 12:59:41.672350 USB2 port 4 enabled
999 12:59:41.672960 USB2 port 5 disabled
1000 12:59:41.675519 USB2 port 6 disabled
1001 12:59:41.678854 USB2 port 7 disabled
1002 12:59:41.679340 USB2 port 8 disabled
1003 12:59:41.682155 USB2 port 9 disabled
1004 12:59:41.685532 USB3 port 0 disabled
1005 12:59:41.686016 USB3 port 1 enabled
1006 12:59:41.688484 USB3 port 2 disabled
1007 12:59:41.692475 USB3 port 3 disabled
1008 12:59:41.693126 USB2 port 1 scanning...
1009 12:59:41.695039 scan_static_bus for USB2 port 1
1010 12:59:41.698494 scan_static_bus for USB2 port 1 done
1011 12:59:41.705260 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:59:41.708580 USB2 port 2 scanning...
1013 12:59:41.712086 scan_static_bus for USB2 port 2
1014 12:59:41.714876 scan_static_bus for USB2 port 2 done
1015 12:59:41.718523 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:59:41.721829 USB2 port 4 scanning...
1017 12:59:41.725369 scan_static_bus for USB2 port 4
1018 12:59:41.728210 scan_static_bus for USB2 port 4 done
1019 12:59:41.731663 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:59:41.735054 USB3 port 1 scanning...
1021 12:59:41.738380 scan_static_bus for USB3 port 1
1022 12:59:41.741864 scan_static_bus for USB3 port 1 done
1023 12:59:41.748769 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 12:59:41.752176 scan_static_bus for USB0 port 0 done
1025 12:59:41.754821 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 12:59:41.758378 scan_static_bus for PCI: 00:14.0 done
1027 12:59:41.765057 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 12:59:41.768287 PCI: 00:14.3 scanning...
1029 12:59:41.771383 scan_static_bus for PCI: 00:14.3
1030 12:59:41.771867 GENERIC: 0.0 enabled
1031 12:59:41.774920 scan_static_bus for PCI: 00:14.3 done
1032 12:59:41.781353 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 12:59:41.785107 PCI: 00:15.0 scanning...
1034 12:59:41.787893 scan_static_bus for PCI: 00:15.0
1035 12:59:41.788377 I2C: 00:1a enabled
1036 12:59:41.791665 I2C: 00:31 enabled
1037 12:59:41.792251 I2C: 00:32 enabled
1038 12:59:41.798255 scan_static_bus for PCI: 00:15.0 done
1039 12:59:41.801752 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1040 12:59:41.805226 PCI: 00:15.1 scanning...
1041 12:59:41.808260 scan_static_bus for PCI: 00:15.1
1042 12:59:41.808773 I2C: 00:10 enabled
1043 12:59:41.815257 scan_static_bus for PCI: 00:15.1 done
1044 12:59:41.819168 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 12:59:41.821964 PCI: 00:15.2 scanning...
1046 12:59:41.825688 scan_static_bus for PCI: 00:15.2
1047 12:59:41.828781 scan_static_bus for PCI: 00:15.2 done
1048 12:59:41.831979 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 12:59:41.835533 PCI: 00:15.3 scanning...
1050 12:59:41.839306 scan_static_bus for PCI: 00:15.3
1051 12:59:41.842704 scan_static_bus for PCI: 00:15.3 done
1052 12:59:41.849202 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 12:59:41.849787 PCI: 00:19.1 scanning...
1054 12:59:41.852223 scan_static_bus for PCI: 00:19.1
1055 12:59:41.855558 I2C: 00:15 enabled
1056 12:59:41.859063 scan_static_bus for PCI: 00:19.1 done
1057 12:59:41.865723 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 12:59:41.866296 PCI: 00:1d.0 scanning...
1059 12:59:41.872058 do_pci_scan_bridge for PCI: 00:1d.0
1060 12:59:41.872539 PCI: pci_scan_bus for bus 01
1061 12:59:41.875589 PCI: 01:00.0 [1c5c/174a] enabled
1062 12:59:41.878444 GENERIC: 0.0 enabled
1063 12:59:41.882031 Enabling Common Clock Configuration
1064 12:59:41.888766 L1 Sub-State supported from root port 29
1065 12:59:41.889343 L1 Sub-State Support = 0xf
1066 12:59:41.892255 CommonModeRestoreTime = 0x28
1067 12:59:41.898277 Power On Value = 0x16, Power On Scale = 0x0
1068 12:59:41.898899 ASPM: Enabled L1
1069 12:59:41.901662 PCIe: Max_Payload_Size adjusted to 128
1070 12:59:41.908374 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 12:59:41.908888 PCI: 00:1e.2 scanning...
1072 12:59:41.915420 scan_generic_bus for PCI: 00:1e.2
1073 12:59:41.916001 SPI: 00 enabled
1074 12:59:41.922090 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 12:59:41.925415 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 12:59:41.929186 PCI: 00:1e.3 scanning...
1077 12:59:41.932395 scan_generic_bus for PCI: 00:1e.3
1078 12:59:41.935010 SPI: 00 enabled
1079 12:59:41.938481 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 12:59:41.945261 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 12:59:41.948855 PCI: 00:1f.0 scanning...
1082 12:59:41.952143 scan_static_bus for PCI: 00:1f.0
1083 12:59:41.952719 PNP: 0c09.0 enabled
1084 12:59:41.955384 PNP: 0c09.0 scanning...
1085 12:59:41.959101 scan_static_bus for PNP: 0c09.0
1086 12:59:41.962042 scan_static_bus for PNP: 0c09.0 done
1087 12:59:41.968393 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 12:59:41.971630 scan_static_bus for PCI: 00:1f.0 done
1089 12:59:41.975296 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 12:59:41.978734 PCI: 00:1f.2 scanning...
1091 12:59:41.981906 scan_static_bus for PCI: 00:1f.2
1092 12:59:41.985071 GENERIC: 0.0 enabled
1093 12:59:41.985563 GENERIC: 0.0 scanning...
1094 12:59:41.988525 scan_static_bus for GENERIC: 0.0
1095 12:59:41.992180 GENERIC: 0.0 enabled
1096 12:59:41.995315 GENERIC: 1.0 enabled
1097 12:59:41.998921 scan_static_bus for GENERIC: 0.0 done
1098 12:59:42.002090 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 12:59:42.008318 scan_static_bus for PCI: 00:1f.2 done
1100 12:59:42.011874 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 12:59:42.015351 PCI: 00:1f.3 scanning...
1102 12:59:42.018712 scan_static_bus for PCI: 00:1f.3
1103 12:59:42.021920 scan_static_bus for PCI: 00:1f.3 done
1104 12:59:42.024990 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 12:59:42.028301 PCI: 00:1f.5 scanning...
1106 12:59:42.031455 scan_generic_bus for PCI: 00:1f.5
1107 12:59:42.035178 scan_generic_bus for PCI: 00:1f.5 done
1108 12:59:42.042016 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 12:59:42.044848 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 12:59:42.048324 scan_static_bus for Root Device done
1111 12:59:42.055115 scan_bus: bus Root Device finished in 736 msecs
1112 12:59:42.055671 done
1113 12:59:42.062099 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 12:59:42.064885 Chrome EC: UHEPI supported
1115 12:59:42.071567 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 12:59:42.078692 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 12:59:42.081469 SPI flash protection: WPSW=0 SRP0=0
1118 12:59:42.084843 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 12:59:42.091912 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 12:59:42.095168 found VGA at PCI: 00:02.0
1121 12:59:42.098774 Setting up VGA for PCI: 00:02.0
1122 12:59:42.101637 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 12:59:42.108518 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 12:59:42.109131 Allocating resources...
1125 12:59:42.112147 Reading resources...
1126 12:59:42.114732 Root Device read_resources bus 0 link: 0
1127 12:59:42.121704 DOMAIN: 0000 read_resources bus 0 link: 0
1128 12:59:42.125030 PCI: 00:04.0 read_resources bus 1 link: 0
1129 12:59:42.131586 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 12:59:42.134817 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 12:59:42.141595 USB0 port 0 read_resources bus 0 link: 0
1132 12:59:42.144851 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:59:42.150983 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 12:59:42.154520 PCI: 00:14.0 read_resources bus 0 link: 0
1135 12:59:42.157791 USB0 port 0 read_resources bus 0 link: 0
1136 12:59:42.165351 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:59:42.168776 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 12:59:42.175316 PCI: 00:14.3 read_resources bus 0 link: 0
1139 12:59:42.178468 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 12:59:42.185184 PCI: 00:15.0 read_resources bus 0 link: 0
1141 12:59:42.188770 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 12:59:42.194849 PCI: 00:15.1 read_resources bus 0 link: 0
1143 12:59:42.198223 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 12:59:42.205590 PCI: 00:19.1 read_resources bus 0 link: 0
1145 12:59:42.208825 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 12:59:42.215781 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 12:59:42.219066 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 12:59:42.225894 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 12:59:42.229312 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 12:59:42.235827 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 12:59:42.239160 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 12:59:42.245481 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 12:59:42.248773 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 12:59:42.252404 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 12:59:42.259021 GENERIC: 0.0 read_resources bus 0 link: 0
1156 12:59:42.262469 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 12:59:42.269238 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 12:59:42.275345 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 12:59:42.278779 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 12:59:42.282065 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 12:59:42.289457 Root Device read_resources bus 0 link: 0 done
1162 12:59:42.292420 Done reading resources.
1163 12:59:42.295593 Show resources in subtree (Root Device)...After reading.
1164 12:59:42.302328 Root Device child on link 0 DOMAIN: 0000
1165 12:59:42.305852 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:59:42.315451 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:59:42.325746 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:59:42.326087 PCI: 00:00.0
1169 12:59:42.335175 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:59:42.345021 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:59:42.355099 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:59:42.365127 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:59:42.371415 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:59:42.381505 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:59:42.391268 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:59:42.401216 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:59:42.411361 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:59:42.421595 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:59:42.427910 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:59:42.438309 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:59:42.448143 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:59:42.458081 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:59:42.464399 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:59:42.474701 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:59:42.484636 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:59:42.494379 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:59:42.504617 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:59:42.514411 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 12:59:42.514501 PCI: 00:02.0
1190 12:59:42.527469 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:59:42.537719 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 12:59:42.544543 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 12:59:42.551065 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:59:42.560593 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 12:59:42.560681 GENERIC: 0.0
1196 12:59:42.564400 PCI: 00:05.0
1197 12:59:42.574082 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:59:42.577419 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 12:59:42.580947 GENERIC: 0.0
1200 12:59:42.581034 PCI: 00:08.0
1201 12:59:42.590398 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:59:42.593849 PCI: 00:0a.0
1203 12:59:42.597251 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 12:59:42.607106 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:59:42.610437 USB0 port 0 child on link 0 USB3 port 0
1206 12:59:42.613916 USB3 port 0
1207 12:59:42.614005 USB3 port 1
1208 12:59:42.617246 USB3 port 2
1209 12:59:42.617341 USB3 port 3
1210 12:59:42.624342 PCI: 00:14.0 child on link 0 USB0 port 0
1211 12:59:42.634076 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:59:42.637391 USB0 port 0 child on link 0 USB2 port 0
1213 12:59:42.640718 USB2 port 0
1214 12:59:42.641184 USB2 port 1
1215 12:59:42.644169 USB2 port 2
1216 12:59:42.644628 USB2 port 3
1217 12:59:42.647436 USB2 port 4
1218 12:59:42.647889 USB2 port 5
1219 12:59:42.650779 USB2 port 6
1220 12:59:42.651220 USB2 port 7
1221 12:59:42.654126 USB2 port 8
1222 12:59:42.654594 USB2 port 9
1223 12:59:42.657288 USB3 port 0
1224 12:59:42.657743 USB3 port 1
1225 12:59:42.660848 USB3 port 2
1226 12:59:42.661330 USB3 port 3
1227 12:59:42.664269 PCI: 00:14.2
1228 12:59:42.674496 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:59:42.683955 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 12:59:42.687317 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 12:59:42.697570 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 12:59:42.700990 GENERIC: 0.0
1233 12:59:42.704357 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 12:59:42.714092 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:59:42.717670 I2C: 00:1a
1236 12:59:42.718348 I2C: 00:31
1237 12:59:42.720907 I2C: 00:32
1238 12:59:42.724148 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 12:59:42.734120 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:59:42.734676 I2C: 00:10
1241 12:59:42.737581 PCI: 00:15.2
1242 12:59:42.747523 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:59:42.748010 PCI: 00:15.3
1244 12:59:42.757100 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:59:42.760443 PCI: 00:16.0
1246 12:59:42.770550 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:59:42.771120 PCI: 00:19.0
1248 12:59:42.777403 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 12:59:42.787300 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:59:42.787806 I2C: 00:15
1251 12:59:42.790878 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 12:59:42.800953 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 12:59:42.810328 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 12:59:42.820492 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 12:59:42.821045 GENERIC: 0.0
1256 12:59:42.823846 PCI: 01:00.0
1257 12:59:42.833629 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:59:42.843687 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 12:59:42.850721 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 12:59:42.853312 PCI: 00:1e.0
1261 12:59:42.863261 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 12:59:42.866554 PCI: 00:1e.2 child on link 0 SPI: 00
1263 12:59:42.876660 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:59:42.879938 SPI: 00
1265 12:59:42.883306 PCI: 00:1e.3 child on link 0 SPI: 00
1266 12:59:42.893463 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 12:59:42.893947 SPI: 00
1268 12:59:42.900122 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 12:59:42.906490 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 12:59:42.909943 PNP: 0c09.0
1271 12:59:42.920310 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 12:59:42.922989 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 12:59:42.932972 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 12:59:42.943242 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 12:59:42.946313 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 12:59:42.946805 GENERIC: 0.0
1277 12:59:42.949809 GENERIC: 1.0
1278 12:59:42.953083 PCI: 00:1f.3
1279 12:59:42.963009 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 12:59:42.973314 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 12:59:42.973874 PCI: 00:1f.5
1282 12:59:42.982654 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 12:59:42.986031 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 12:59:42.986525 APIC: 00
1285 12:59:42.989638 APIC: 01
1286 12:59:42.990126 APIC: 03
1287 12:59:42.993010 APIC: 05
1288 12:59:42.993501 APIC: 07
1289 12:59:42.993983 APIC: 06
1290 12:59:42.996337 APIC: 02
1291 12:59:42.996895 APIC: 04
1292 12:59:43.006281 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 12:59:43.009445 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 12:59:43.016442 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 12:59:43.022538 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 12:59:43.026070 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 12:59:43.029354 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 12:59:43.036163 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 12:59:43.042541 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 12:59:43.049453 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 12:59:43.056185 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 12:59:43.066187 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 12:59:43.068999 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 12:59:43.079484 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 12:59:43.085561 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 12:59:43.092379 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 12:59:43.095594 DOMAIN: 0000: Resource ranges:
1308 12:59:43.099190 * Base: 1000, Size: 800, Tag: 100
1309 12:59:43.102417 * Base: 1900, Size: e700, Tag: 100
1310 12:59:43.109301 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 12:59:43.115735 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 12:59:43.122182 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 12:59:43.129171 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 12:59:43.139298 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 12:59:43.145482 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 12:59:43.152197 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 12:59:43.162172 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 12:59:43.168778 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 12:59:43.175885 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 12:59:43.185134 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 12:59:43.191836 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 12:59:43.198722 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 12:59:43.208313 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 12:59:43.215271 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 12:59:43.222234 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 12:59:43.231730 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 12:59:43.238549 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 12:59:43.244890 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 12:59:43.255145 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 12:59:43.261746 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 12:59:43.268340 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 12:59:43.278415 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 12:59:43.284786 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 12:59:43.291769 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 12:59:43.294894 DOMAIN: 0000: Resource ranges:
1336 12:59:43.301589 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 12:59:43.304674 * Base: d0000000, Size: 28000000, Tag: 200
1338 12:59:43.308212 * Base: fa000000, Size: 1000000, Tag: 200
1339 12:59:43.311697 * Base: fb001000, Size: 2fff000, Tag: 200
1340 12:59:43.318075 * Base: fe010000, Size: 2e000, Tag: 200
1341 12:59:43.321413 * Base: fe03f000, Size: d41000, Tag: 200
1342 12:59:43.324873 * Base: fed88000, Size: 8000, Tag: 200
1343 12:59:43.328196 * Base: fed93000, Size: d000, Tag: 200
1344 12:59:43.334585 * Base: feda2000, Size: 1e000, Tag: 200
1345 12:59:43.337920 * Base: fede0000, Size: 1220000, Tag: 200
1346 12:59:43.341310 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 12:59:43.347932 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 12:59:43.354765 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 12:59:43.361488 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 12:59:43.368214 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 12:59:43.374620 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 12:59:43.381006 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 12:59:43.387581 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 12:59:43.394426 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 12:59:43.400960 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 12:59:43.407527 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 12:59:43.414403 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 12:59:43.420867 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 12:59:43.427674 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 12:59:43.433926 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 12:59:43.440531 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 12:59:43.447219 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 12:59:43.453563 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 12:59:43.460400 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 12:59:43.466972 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 12:59:43.473579 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 12:59:43.480345 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 12:59:43.486883 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 12:59:43.497154 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 12:59:43.503428 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 12:59:43.506810 PCI: 00:1d.0: Resource ranges:
1372 12:59:43.510157 * Base: 7fc00000, Size: 100000, Tag: 200
1373 12:59:43.516946 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 12:59:43.523303 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 12:59:43.529995 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 12:59:43.540181 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 12:59:43.546914 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 12:59:43.550260 Root Device assign_resources, bus 0 link: 0
1379 12:59:43.556597 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 12:59:43.563371 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 12:59:43.573179 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 12:59:43.579768 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 12:59:43.590021 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 12:59:43.592914 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 12:59:43.596322 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 12:59:43.606630 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 12:59:43.613272 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 12:59:43.622939 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 12:59:43.626306 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 12:59:43.633131 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 12:59:43.639452 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 12:59:43.642700 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 12:59:43.649538 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 12:59:43.656350 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 12:59:43.666527 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 12:59:43.672657 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 12:59:43.679375 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 12:59:43.682647 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 12:59:43.692792 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 12:59:43.696321 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 12:59:43.699156 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 12:59:43.709350 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 12:59:43.712663 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 12:59:43.719342 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 12:59:43.725649 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 12:59:43.735824 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 12:59:43.742602 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 12:59:43.752383 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 12:59:43.755707 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 12:59:43.759108 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 12:59:43.769269 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 12:59:43.779056 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 12:59:43.788659 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 12:59:43.792230 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:59:43.798970 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 12:59:43.808648 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 12:59:43.815242 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 12:59:43.822158 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 12:59:43.828500 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 12:59:43.831949 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 12:59:43.838726 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 12:59:43.845488 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 12:59:43.851695 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 12:59:43.855111 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 12:59:43.861911 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 12:59:43.865313 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 12:59:43.868649 LPC: Trying to open IO window from 800 size 1ff
1428 12:59:43.878911 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 12:59:43.885453 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 12:59:43.895616 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 12:59:43.898876 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 12:59:43.905150 Root Device assign_resources, bus 0 link: 0
1433 12:59:43.905237 Done setting resources.
1434 12:59:43.911997 Show resources in subtree (Root Device)...After assigning values.
1435 12:59:43.918638 Root Device child on link 0 DOMAIN: 0000
1436 12:59:43.921549 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 12:59:43.931910 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 12:59:43.941489 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 12:59:43.941578 PCI: 00:00.0
1440 12:59:43.951759 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 12:59:43.961461 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 12:59:43.971233 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 12:59:43.981158 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 12:59:43.991335 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 12:59:43.998098 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 12:59:44.007636 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 12:59:44.017798 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 12:59:44.027918 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 12:59:44.037625 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 12:59:44.043966 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 12:59:44.054185 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 12:59:44.064293 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 12:59:44.073999 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 12:59:44.084080 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 12:59:44.094156 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 12:59:44.103848 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 12:59:44.110715 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 12:59:44.120436 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 12:59:44.130553 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 12:59:44.133956 PCI: 00:02.0
1461 12:59:44.143712 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 12:59:44.153719 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 12:59:44.163433 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 12:59:44.166901 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 12:59:44.176699 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 12:59:44.179950 GENERIC: 0.0
1467 12:59:44.180037 PCI: 00:05.0
1468 12:59:44.190436 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 12:59:44.197225 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 12:59:44.197316 GENERIC: 0.0
1471 12:59:44.199940 PCI: 00:08.0
1472 12:59:44.210200 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 12:59:44.210291 PCI: 00:0a.0
1474 12:59:44.216994 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 12:59:44.226630 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 12:59:44.229986 USB0 port 0 child on link 0 USB3 port 0
1477 12:59:44.233433 USB3 port 0
1478 12:59:44.233519 USB3 port 1
1479 12:59:44.236840 USB3 port 2
1480 12:59:44.236926 USB3 port 3
1481 12:59:44.243631 PCI: 00:14.0 child on link 0 USB0 port 0
1482 12:59:44.253221 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 12:59:44.256615 USB0 port 0 child on link 0 USB2 port 0
1484 12:59:44.260058 USB2 port 0
1485 12:59:44.260144 USB2 port 1
1486 12:59:44.263536 USB2 port 2
1487 12:59:44.263622 USB2 port 3
1488 12:59:44.266856 USB2 port 4
1489 12:59:44.266942 USB2 port 5
1490 12:59:44.269745 USB2 port 6
1491 12:59:44.269831 USB2 port 7
1492 12:59:44.273184 USB2 port 8
1493 12:59:44.273269 USB2 port 9
1494 12:59:44.276520 USB3 port 0
1495 12:59:44.279841 USB3 port 1
1496 12:59:44.279927 USB3 port 2
1497 12:59:44.283190 USB3 port 3
1498 12:59:44.283294 PCI: 00:14.2
1499 12:59:44.293286 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 12:59:44.303406 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 12:59:44.310115 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 12:59:44.319730 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 12:59:44.319827 GENERIC: 0.0
1504 12:59:44.326457 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 12:59:44.336457 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 12:59:44.336547 I2C: 00:1a
1507 12:59:44.339936 I2C: 00:31
1508 12:59:44.340022 I2C: 00:32
1509 12:59:44.343257 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 12:59:44.356192 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 12:59:44.356283 I2C: 00:10
1512 12:59:44.359666 PCI: 00:15.2
1513 12:59:44.369834 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 12:59:44.369923 PCI: 00:15.3
1515 12:59:44.379610 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 12:59:44.382994 PCI: 00:16.0
1517 12:59:44.392910 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 12:59:44.393023 PCI: 00:19.0
1519 12:59:44.399600 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 12:59:44.409829 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 12:59:44.409936 I2C: 00:15
1522 12:59:44.415994 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 12:59:44.422827 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 12:59:44.435849 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 12:59:44.446164 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 12:59:44.449606 GENERIC: 0.0
1527 12:59:44.449700 PCI: 01:00.0
1528 12:59:44.459611 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 12:59:44.469189 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 12:59:44.482468 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 12:59:44.482581 PCI: 00:1e.0
1532 12:59:44.492600 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 12:59:44.499153 PCI: 00:1e.2 child on link 0 SPI: 00
1534 12:59:44.509276 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 12:59:44.509381 SPI: 00
1536 12:59:44.512158 PCI: 00:1e.3 child on link 0 SPI: 00
1537 12:59:44.522461 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 12:59:44.525791 SPI: 00
1539 12:59:44.529105 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 12:59:44.538735 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 12:59:44.538833 PNP: 0c09.0
1542 12:59:44.548953 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 12:59:44.552387 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 12:59:44.562351 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 12:59:44.571922 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 12:59:44.575309 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 12:59:44.578796 GENERIC: 0.0
1548 12:59:44.578883 GENERIC: 1.0
1549 12:59:44.582136 PCI: 00:1f.3
1550 12:59:44.592191 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 12:59:44.602168 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 12:59:44.605528 PCI: 00:1f.5
1553 12:59:44.615244 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 12:59:44.618699 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 12:59:44.618793 APIC: 00
1556 12:59:44.622128 APIC: 01
1557 12:59:44.622215 APIC: 03
1558 12:59:44.625532 APIC: 05
1559 12:59:44.625619 APIC: 07
1560 12:59:44.625704 APIC: 06
1561 12:59:44.628715 APIC: 02
1562 12:59:44.628840 APIC: 04
1563 12:59:44.632166 Done allocating resources.
1564 12:59:44.638502 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 12:59:44.645368 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 12:59:44.648720 Configure GPIOs for I2S audio on UP4.
1567 12:59:44.654976 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 12:59:44.658429 Enabling resources...
1569 12:59:44.661870 PCI: 00:00.0 subsystem <- 8086/9a12
1570 12:59:44.661959 PCI: 00:00.0 cmd <- 06
1571 12:59:44.668640 PCI: 00:02.0 subsystem <- 8086/9a40
1572 12:59:44.668735 PCI: 00:02.0 cmd <- 03
1573 12:59:44.672134 PCI: 00:04.0 subsystem <- 8086/9a03
1574 12:59:44.675494 PCI: 00:04.0 cmd <- 02
1575 12:59:44.678383 PCI: 00:05.0 subsystem <- 8086/9a19
1576 12:59:44.681783 PCI: 00:05.0 cmd <- 02
1577 12:59:44.685056 PCI: 00:08.0 subsystem <- 8086/9a11
1578 12:59:44.688489 PCI: 00:08.0 cmd <- 06
1579 12:59:44.692281 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 12:59:44.695340 PCI: 00:0d.0 cmd <- 02
1581 12:59:44.698690 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 12:59:44.702071 PCI: 00:14.0 cmd <- 02
1583 12:59:44.705342 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 12:59:44.705432 PCI: 00:14.2 cmd <- 02
1585 12:59:44.712284 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 12:59:44.712381 PCI: 00:14.3 cmd <- 02
1587 12:59:44.715049 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 12:59:44.718450 PCI: 00:15.0 cmd <- 02
1589 12:59:44.721916 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 12:59:44.725300 PCI: 00:15.1 cmd <- 02
1591 12:59:44.728703 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 12:59:44.731980 PCI: 00:15.2 cmd <- 02
1593 12:59:44.735294 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 12:59:44.738657 PCI: 00:15.3 cmd <- 02
1595 12:59:44.742090 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 12:59:44.745013 PCI: 00:16.0 cmd <- 02
1597 12:59:44.748602 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 12:59:44.751954 PCI: 00:19.1 cmd <- 02
1599 12:59:44.755251 PCI: 00:1d.0 bridge ctrl <- 0013
1600 12:59:44.758120 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 12:59:44.758204 PCI: 00:1d.0 cmd <- 06
1602 12:59:44.765439 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 12:59:44.765526 PCI: 00:1e.0 cmd <- 06
1604 12:59:44.768382 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 12:59:44.771624 PCI: 00:1e.2 cmd <- 06
1606 12:59:44.775029 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 12:59:44.778444 PCI: 00:1e.3 cmd <- 02
1608 12:59:44.781898 PCI: 00:1f.0 subsystem <- 8086/a087
1609 12:59:44.784724 PCI: 00:1f.0 cmd <- 407
1610 12:59:44.788148 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 12:59:44.791515 PCI: 00:1f.3 cmd <- 02
1612 12:59:44.794904 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 12:59:44.798369 PCI: 00:1f.5 cmd <- 406
1614 12:59:44.801677 PCI: 01:00.0 cmd <- 02
1615 12:59:44.806064 done.
1616 12:59:44.809387 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 12:59:44.812657 Initializing devices...
1618 12:59:44.816090 Root Device init
1619 12:59:44.819501 Chrome EC: Set SMI mask to 0x0000000000000000
1620 12:59:44.826798 Chrome EC: clear events_b mask to 0x0000000000000000
1621 12:59:44.833087 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 12:59:44.839684 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 12:59:44.846491 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 12:59:44.853403 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 12:59:44.859756 fw_config match found: DB_USB=USB3_ACTIVE
1626 12:59:44.863213 Configure Right Type-C port orientation for retimer
1627 12:59:44.866524 Root Device init finished in 48 msecs
1628 12:59:44.869986 PCI: 00:00.0 init
1629 12:59:44.873209 CPU TDP = 9 Watts
1630 12:59:44.873298 CPU PL1 = 9 Watts
1631 12:59:44.876705 CPU PL2 = 40 Watts
1632 12:59:44.880094 CPU PL4 = 83 Watts
1633 12:59:44.883580 PCI: 00:00.0 init finished in 8 msecs
1634 12:59:44.883669 PCI: 00:02.0 init
1635 12:59:44.886396 GMA: Found VBT in CBFS
1636 12:59:44.889842 GMA: Found valid VBT in CBFS
1637 12:59:44.896532 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 12:59:44.903137 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 12:59:44.906513 PCI: 00:02.0 init finished in 18 msecs
1640 12:59:44.909950 PCI: 00:05.0 init
1641 12:59:44.913261 PCI: 00:05.0 init finished in 0 msecs
1642 12:59:44.916713 PCI: 00:08.0 init
1643 12:59:44.919557 PCI: 00:08.0 init finished in 0 msecs
1644 12:59:44.922995 PCI: 00:14.0 init
1645 12:59:44.926474 PCI: 00:14.0 init finished in 0 msecs
1646 12:59:44.929892 PCI: 00:14.2 init
1647 12:59:44.933328 PCI: 00:14.2 init finished in 0 msecs
1648 12:59:44.936672 PCI: 00:15.0 init
1649 12:59:44.936780 I2C bus 0 version 0x3230302a
1650 12:59:44.943205 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 12:59:44.946632 PCI: 00:15.0 init finished in 6 msecs
1652 12:59:44.946719 PCI: 00:15.1 init
1653 12:59:44.949986 I2C bus 1 version 0x3230302a
1654 12:59:44.952940 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 12:59:44.956299 PCI: 00:15.1 init finished in 6 msecs
1656 12:59:44.959726 PCI: 00:15.2 init
1657 12:59:44.963181 I2C bus 2 version 0x3230302a
1658 12:59:44.966592 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 12:59:44.969897 PCI: 00:15.2 init finished in 6 msecs
1660 12:59:44.973322 PCI: 00:15.3 init
1661 12:59:44.976230 I2C bus 3 version 0x3230302a
1662 12:59:44.979656 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 12:59:44.983054 PCI: 00:15.3 init finished in 6 msecs
1664 12:59:44.986491 PCI: 00:16.0 init
1665 12:59:44.989894 PCI: 00:16.0 init finished in 0 msecs
1666 12:59:44.993243 PCI: 00:19.1 init
1667 12:59:44.993329 I2C bus 5 version 0x3230302a
1668 12:59:44.999892 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 12:59:45.003355 PCI: 00:19.1 init finished in 6 msecs
1670 12:59:45.003442 PCI: 00:1d.0 init
1671 12:59:45.006693 Initializing PCH PCIe bridge.
1672 12:59:45.010025 PCI: 00:1d.0 init finished in 3 msecs
1673 12:59:45.014102 PCI: 00:1f.0 init
1674 12:59:45.017225 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 12:59:45.024107 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 12:59:45.024197 IOAPIC: ID = 0x02
1677 12:59:45.026979 IOAPIC: Dumping registers
1678 12:59:45.030368 reg 0x0000: 0x02000000
1679 12:59:45.033760 reg 0x0001: 0x00770020
1680 12:59:45.033846 reg 0x0002: 0x00000000
1681 12:59:45.040523 PCI: 00:1f.0 init finished in 21 msecs
1682 12:59:45.040608 PCI: 00:1f.2 init
1683 12:59:45.043809 Disabling ACPI via APMC.
1684 12:59:45.047264 APMC done.
1685 12:59:45.050159 PCI: 00:1f.2 init finished in 5 msecs
1686 12:59:45.062204 PCI: 01:00.0 init
1687 12:59:45.065482 PCI: 01:00.0 init finished in 0 msecs
1688 12:59:45.068908 PNP: 0c09.0 init
1689 12:59:45.072369 Google Chrome EC uptime: 8.382 seconds
1690 12:59:45.079209 Google Chrome AP resets since EC boot: 1
1691 12:59:45.082427 Google Chrome most recent AP reset causes:
1692 12:59:45.085364 0.346: 32775 shutdown: entering G3
1693 12:59:45.092125 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 12:59:45.095456 PNP: 0c09.0 init finished in 22 msecs
1695 12:59:45.101175 Devices initialized
1696 12:59:45.104464 Show all devs... After init.
1697 12:59:45.107829 Root Device: enabled 1
1698 12:59:45.107915 DOMAIN: 0000: enabled 1
1699 12:59:45.111133 CPU_CLUSTER: 0: enabled 1
1700 12:59:45.114403 PCI: 00:00.0: enabled 1
1701 12:59:45.117972 PCI: 00:02.0: enabled 1
1702 12:59:45.118057 PCI: 00:04.0: enabled 1
1703 12:59:45.121324 PCI: 00:05.0: enabled 1
1704 12:59:45.124674 PCI: 00:06.0: enabled 0
1705 12:59:45.127619 PCI: 00:07.0: enabled 0
1706 12:59:45.127704 PCI: 00:07.1: enabled 0
1707 12:59:45.131064 PCI: 00:07.2: enabled 0
1708 12:59:45.134389 PCI: 00:07.3: enabled 0
1709 12:59:45.137711 PCI: 00:08.0: enabled 1
1710 12:59:45.137796 PCI: 00:09.0: enabled 0
1711 12:59:45.140945 PCI: 00:0a.0: enabled 0
1712 12:59:45.144378 PCI: 00:0d.0: enabled 1
1713 12:59:45.147798 PCI: 00:0d.1: enabled 0
1714 12:59:45.147882 PCI: 00:0d.2: enabled 0
1715 12:59:45.151161 PCI: 00:0d.3: enabled 0
1716 12:59:45.154604 PCI: 00:0e.0: enabled 0
1717 12:59:45.154688 PCI: 00:10.2: enabled 1
1718 12:59:45.157498 PCI: 00:10.6: enabled 0
1719 12:59:45.160879 PCI: 00:10.7: enabled 0
1720 12:59:45.164248 PCI: 00:12.0: enabled 0
1721 12:59:45.164332 PCI: 00:12.6: enabled 0
1722 12:59:45.167632 PCI: 00:13.0: enabled 0
1723 12:59:45.170931 PCI: 00:14.0: enabled 1
1724 12:59:45.174390 PCI: 00:14.1: enabled 0
1725 12:59:45.174475 PCI: 00:14.2: enabled 1
1726 12:59:45.177780 PCI: 00:14.3: enabled 1
1727 12:59:45.181189 PCI: 00:15.0: enabled 1
1728 12:59:45.184022 PCI: 00:15.1: enabled 1
1729 12:59:45.184106 PCI: 00:15.2: enabled 1
1730 12:59:45.187336 PCI: 00:15.3: enabled 1
1731 12:59:45.190793 PCI: 00:16.0: enabled 1
1732 12:59:45.190878 PCI: 00:16.1: enabled 0
1733 12:59:45.194108 PCI: 00:16.2: enabled 0
1734 12:59:45.197507 PCI: 00:16.3: enabled 0
1735 12:59:45.200768 PCI: 00:16.4: enabled 0
1736 12:59:45.200865 PCI: 00:16.5: enabled 0
1737 12:59:45.204100 PCI: 00:17.0: enabled 0
1738 12:59:45.207461 PCI: 00:19.0: enabled 0
1739 12:59:45.210858 PCI: 00:19.1: enabled 1
1740 12:59:45.210941 PCI: 00:19.2: enabled 0
1741 12:59:45.214231 PCI: 00:1c.0: enabled 1
1742 12:59:45.217619 PCI: 00:1c.1: enabled 0
1743 12:59:45.221114 PCI: 00:1c.2: enabled 0
1744 12:59:45.221197 PCI: 00:1c.3: enabled 0
1745 12:59:45.223972 PCI: 00:1c.4: enabled 0
1746 12:59:45.227321 PCI: 00:1c.5: enabled 0
1747 12:59:45.230730 PCI: 00:1c.6: enabled 1
1748 12:59:45.230814 PCI: 00:1c.7: enabled 0
1749 12:59:45.234191 PCI: 00:1d.0: enabled 1
1750 12:59:45.237563 PCI: 00:1d.1: enabled 0
1751 12:59:45.237646 PCI: 00:1d.2: enabled 1
1752 12:59:45.240846 PCI: 00:1d.3: enabled 0
1753 12:59:45.244149 PCI: 00:1e.0: enabled 1
1754 12:59:45.247580 PCI: 00:1e.1: enabled 0
1755 12:59:45.247664 PCI: 00:1e.2: enabled 1
1756 12:59:45.250405 PCI: 00:1e.3: enabled 1
1757 12:59:45.253863 PCI: 00:1f.0: enabled 1
1758 12:59:45.257377 PCI: 00:1f.1: enabled 0
1759 12:59:45.257460 PCI: 00:1f.2: enabled 1
1760 12:59:45.260841 PCI: 00:1f.3: enabled 1
1761 12:59:45.264162 PCI: 00:1f.4: enabled 0
1762 12:59:45.267094 PCI: 00:1f.5: enabled 1
1763 12:59:45.267177 PCI: 00:1f.6: enabled 0
1764 12:59:45.270448 PCI: 00:1f.7: enabled 0
1765 12:59:45.273810 APIC: 00: enabled 1
1766 12:59:45.273894 GENERIC: 0.0: enabled 1
1767 12:59:45.277108 GENERIC: 0.0: enabled 1
1768 12:59:45.280350 GENERIC: 1.0: enabled 1
1769 12:59:45.283821 GENERIC: 0.0: enabled 1
1770 12:59:45.283909 GENERIC: 1.0: enabled 1
1771 12:59:45.287226 USB0 port 0: enabled 1
1772 12:59:45.290584 GENERIC: 0.0: enabled 1
1773 12:59:45.290668 USB0 port 0: enabled 1
1774 12:59:45.294019 GENERIC: 0.0: enabled 1
1775 12:59:45.297386 I2C: 00:1a: enabled 1
1776 12:59:45.300304 I2C: 00:31: enabled 1
1777 12:59:45.300387 I2C: 00:32: enabled 1
1778 12:59:45.303664 I2C: 00:10: enabled 1
1779 12:59:45.307099 I2C: 00:15: enabled 1
1780 12:59:45.307183 GENERIC: 0.0: enabled 0
1781 12:59:45.310359 GENERIC: 1.0: enabled 0
1782 12:59:45.313828 GENERIC: 0.0: enabled 1
1783 12:59:45.313913 SPI: 00: enabled 1
1784 12:59:45.317159 SPI: 00: enabled 1
1785 12:59:45.320530 PNP: 0c09.0: enabled 1
1786 12:59:45.320614 GENERIC: 0.0: enabled 1
1787 12:59:45.324160 USB3 port 0: enabled 1
1788 12:59:45.327406 USB3 port 1: enabled 1
1789 12:59:45.327489 USB3 port 2: enabled 0
1790 12:59:45.330231 USB3 port 3: enabled 0
1791 12:59:45.333741 USB2 port 0: enabled 0
1792 12:59:45.337083 USB2 port 1: enabled 1
1793 12:59:45.337171 USB2 port 2: enabled 1
1794 12:59:45.340531 USB2 port 3: enabled 0
1795 12:59:45.343901 USB2 port 4: enabled 1
1796 12:59:45.343988 USB2 port 5: enabled 0
1797 12:59:45.347087 USB2 port 6: enabled 0
1798 12:59:45.350548 USB2 port 7: enabled 0
1799 12:59:45.353903 USB2 port 8: enabled 0
1800 12:59:45.353987 USB2 port 9: enabled 0
1801 12:59:45.356722 USB3 port 0: enabled 0
1802 12:59:45.360369 USB3 port 1: enabled 1
1803 12:59:45.360453 USB3 port 2: enabled 0
1804 12:59:45.363636 USB3 port 3: enabled 0
1805 12:59:45.366962 GENERIC: 0.0: enabled 1
1806 12:59:45.370319 GENERIC: 1.0: enabled 1
1807 12:59:45.370422 APIC: 01: enabled 1
1808 12:59:45.373654 APIC: 03: enabled 1
1809 12:59:45.373738 APIC: 05: enabled 1
1810 12:59:45.377110 APIC: 07: enabled 1
1811 12:59:45.380650 APIC: 06: enabled 1
1812 12:59:45.380738 APIC: 02: enabled 1
1813 12:59:45.383888 APIC: 04: enabled 1
1814 12:59:45.386719 PCI: 01:00.0: enabled 1
1815 12:59:45.390083 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1816 12:59:45.396947 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 12:59:45.400327 ELOG: NV offset 0xf30000 size 0x1000
1818 12:59:45.407073 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 12:59:45.413682 ELOG: Event(17) added with size 13 at 2022-08-31 12:55:11 UTC
1820 12:59:45.420381 ELOG: Event(92) added with size 9 at 2022-08-31 12:55:11 UTC
1821 12:59:45.426592 ELOG: Event(93) added with size 9 at 2022-08-31 12:55:11 UTC
1822 12:59:45.433482 ELOG: Event(9E) added with size 10 at 2022-08-31 12:55:11 UTC
1823 12:59:45.440409 ELOG: Event(9F) added with size 14 at 2022-08-31 12:55:11 UTC
1824 12:59:45.443205 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 12:59:45.450251 ELOG: Event(A1) added with size 10 at 2022-08-31 12:55:11 UTC
1826 12:59:45.459956 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1827 12:59:45.466772 ELOG: Event(A0) added with size 9 at 2022-08-31 12:55:11 UTC
1828 12:59:45.470157 elog_add_boot_reason: Logged dev mode boot
1829 12:59:45.476211 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1830 12:59:45.476299 Finalize devices...
1831 12:59:45.479544 Devices finalized
1832 12:59:45.486348 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1833 12:59:45.489770 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1834 12:59:45.496132 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1835 12:59:45.499413 ME: HFSTS1 : 0x80030055
1836 12:59:45.506203 ME: HFSTS2 : 0x30280116
1837 12:59:45.509518 ME: HFSTS3 : 0x00000050
1838 12:59:45.512840 ME: HFSTS4 : 0x00004000
1839 12:59:45.519532 ME: HFSTS5 : 0x00000000
1840 12:59:45.523014 ME: HFSTS6 : 0x00400006
1841 12:59:45.526394 ME: Manufacturing Mode : YES
1842 12:59:45.529228 ME: SPI Protection Mode Enabled : NO
1843 12:59:45.533001 ME: FW Partition Table : OK
1844 12:59:45.535956 ME: Bringup Loader Failure : NO
1845 12:59:45.542823 ME: Firmware Init Complete : NO
1846 12:59:45.546252 ME: Boot Options Present : NO
1847 12:59:45.549458 ME: Update In Progress : NO
1848 12:59:45.552703 ME: D0i3 Support : YES
1849 12:59:45.556107 ME: Low Power State Enabled : NO
1850 12:59:45.559474 ME: CPU Replaced : YES
1851 12:59:45.562886 ME: CPU Replacement Valid : YES
1852 12:59:45.565875 ME: Current Working State : 5
1853 12:59:45.572593 ME: Current Operation State : 1
1854 12:59:45.575824 ME: Current Operation Mode : 3
1855 12:59:45.579246 ME: Error Code : 0
1856 12:59:45.582793 ME: Enhanced Debug Mode : NO
1857 12:59:45.586404 ME: CPU Debug Disabled : YES
1858 12:59:45.589123 ME: TXT Support : NO
1859 12:59:45.595884 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1860 12:59:45.602658 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1861 12:59:45.606087 CBFS: 'fallback/slic' not found.
1862 12:59:45.609280 ACPI: Writing ACPI tables at 76b01000.
1863 12:59:45.612564 ACPI: * FACS
1864 12:59:45.612649 ACPI: * DSDT
1865 12:59:45.619269 Ramoops buffer: 0x100000@0x76a00000.
1866 12:59:45.622609 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1867 12:59:45.625840 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1868 12:59:45.629845 Google Chrome EC: version:
1869 12:59:45.632690 ro: voema_v2.0.7540-147f8d37d1
1870 12:59:45.636138 rw: voema_v2.0.7540-147f8d37d1
1871 12:59:45.639600 running image: 2
1872 12:59:45.646414 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1873 12:59:45.649774 ACPI: * FADT
1874 12:59:45.649859 SCI is IRQ9
1875 12:59:45.653113 ACPI: added table 1/32, length now 40
1876 12:59:45.656076 ACPI: * SSDT
1877 12:59:45.659449 Found 1 CPU(s) with 8 core(s) each.
1878 12:59:45.662794 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1879 12:59:45.669668 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1880 12:59:45.673101 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1881 12:59:45.675907 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1882 12:59:45.682810 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1883 12:59:45.689398 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1884 12:59:45.692865 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1885 12:59:45.699149 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1886 12:59:45.705885 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1887 12:59:45.709130 \_SB.PCI0.RP09: Added StorageD3Enable property
1888 12:59:45.712470 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1889 12:59:45.719082 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1890 12:59:45.726228 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1891 12:59:45.729198 PS2K: Passing 80 keymaps to kernel
1892 12:59:45.735987 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1893 12:59:45.742477 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1894 12:59:45.749228 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1895 12:59:45.755947 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1896 12:59:45.762607 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1897 12:59:45.769422 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1898 12:59:45.776106 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1899 12:59:45.782270 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1900 12:59:45.785659 ACPI: added table 2/32, length now 44
1901 12:59:45.785743 ACPI: * MCFG
1902 12:59:45.789011 ACPI: added table 3/32, length now 48
1903 12:59:45.792426 ACPI: * TPM2
1904 12:59:45.795752 TPM2 log created at 0x769f0000
1905 12:59:45.799082 ACPI: added table 4/32, length now 52
1906 12:59:45.799166 ACPI: * MADT
1907 12:59:45.802589 SCI is IRQ9
1908 12:59:45.805995 ACPI: added table 5/32, length now 56
1909 12:59:45.808830 current = 76b09850
1910 12:59:45.808914 ACPI: * DMAR
1911 12:59:45.812218 ACPI: added table 6/32, length now 60
1912 12:59:45.815629 ACPI: added table 7/32, length now 64
1913 12:59:45.818952 ACPI: * HPET
1914 12:59:45.822348 ACPI: added table 8/32, length now 68
1915 12:59:45.822432 ACPI: done.
1916 12:59:45.825597 ACPI tables: 35216 bytes.
1917 12:59:45.829042 smbios_write_tables: 769ef000
1918 12:59:45.832410 EC returned error result code 3
1919 12:59:45.835381 Couldn't obtain OEM name from CBI
1920 12:59:45.839783 Create SMBIOS type 16
1921 12:59:45.842671 Create SMBIOS type 17
1922 12:59:45.846127 GENERIC: 0.0 (WIFI Device)
1923 12:59:45.849524 SMBIOS tables: 1750 bytes.
1924 12:59:45.852855 Writing table forward entry at 0x00000500
1925 12:59:45.859488 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1926 12:59:45.862855 Writing coreboot table at 0x76b25000
1927 12:59:45.869203 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1928 12:59:45.872679 1. 0000000000001000-000000000009ffff: RAM
1929 12:59:45.876152 2. 00000000000a0000-00000000000fffff: RESERVED
1930 12:59:45.882451 3. 0000000000100000-00000000769eefff: RAM
1931 12:59:45.885789 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1932 12:59:45.892616 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1933 12:59:45.899431 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1934 12:59:45.902675 7. 0000000077000000-000000007fbfffff: RESERVED
1935 12:59:45.909458 8. 00000000c0000000-00000000cfffffff: RESERVED
1936 12:59:45.912361 9. 00000000f8000000-00000000f9ffffff: RESERVED
1937 12:59:45.915642 10. 00000000fb000000-00000000fb000fff: RESERVED
1938 12:59:45.922415 11. 00000000fe000000-00000000fe00ffff: RESERVED
1939 12:59:45.925715 12. 00000000fed80000-00000000fed87fff: RESERVED
1940 12:59:45.932392 13. 00000000fed90000-00000000fed92fff: RESERVED
1941 12:59:45.935646 14. 00000000feda0000-00000000feda1fff: RESERVED
1942 12:59:45.941857 15. 00000000fedc0000-00000000feddffff: RESERVED
1943 12:59:45.945414 16. 0000000100000000-00000002803fffff: RAM
1944 12:59:45.948844 Passing 4 GPIOs to payload:
1945 12:59:45.952223 NAME | PORT | POLARITY | VALUE
1946 12:59:45.959010 lid | undefined | high | high
1947 12:59:45.965382 power | undefined | high | low
1948 12:59:45.968588 oprom | undefined | high | low
1949 12:59:45.975306 EC in RW | 0x000000e5 | high | high
1950 12:59:45.981616 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum cfc2
1951 12:59:45.984975 coreboot table: 1576 bytes.
1952 12:59:45.988317 IMD ROOT 0. 0x76fff000 0x00001000
1953 12:59:45.991705 IMD SMALL 1. 0x76ffe000 0x00001000
1954 12:59:45.995099 FSP MEMORY 2. 0x76c4e000 0x003b0000
1955 12:59:45.998573 VPD 3. 0x76c4d000 0x00000367
1956 12:59:46.001914 RO MCACHE 4. 0x76c4c000 0x00000fdc
1957 12:59:46.005358 CONSOLE 5. 0x76c2c000 0x00020000
1958 12:59:46.008708 FMAP 6. 0x76c2b000 0x00000578
1959 12:59:46.014943 TIME STAMP 7. 0x76c2a000 0x00000910
1960 12:59:46.018205 VBOOT WORK 8. 0x76c16000 0x00014000
1961 12:59:46.021544 ROMSTG STCK 9. 0x76c15000 0x00001000
1962 12:59:46.025267 AFTER CAR 10. 0x76c0a000 0x0000b000
1963 12:59:46.028607 RAMSTAGE 11. 0x76b97000 0x00073000
1964 12:59:46.031968 REFCODE 12. 0x76b42000 0x00055000
1965 12:59:46.035345 SMM BACKUP 13. 0x76b32000 0x00010000
1966 12:59:46.038814 4f444749 14. 0x76b30000 0x00002000
1967 12:59:46.042028 EXT VBT15. 0x76b2d000 0x0000219f
1968 12:59:46.048149 COREBOOT 16. 0x76b25000 0x00008000
1969 12:59:46.051455 ACPI 17. 0x76b01000 0x00024000
1970 12:59:46.054833 ACPI GNVS 18. 0x76b00000 0x00001000
1971 12:59:46.058213 RAMOOPS 19. 0x76a00000 0x00100000
1972 12:59:46.061528 TPM2 TCGLOG20. 0x769f0000 0x00010000
1973 12:59:46.064920 SMBIOS 21. 0x769ef000 0x00000800
1974 12:59:46.068434 IMD small region:
1975 12:59:46.071734 IMD ROOT 0. 0x76ffec00 0x00000400
1976 12:59:46.074804 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1977 12:59:46.078093 POWER STATE 2. 0x76ffeb80 0x00000044
1978 12:59:46.081390 ROMSTAGE 3. 0x76ffeb60 0x00000004
1979 12:59:46.088106 MEM INFO 4. 0x76ffe980 0x000001e0
1980 12:59:46.091450 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1981 12:59:46.094891 MTRR: Physical address space:
1982 12:59:46.101520 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1983 12:59:46.107961 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1984 12:59:46.114786 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1985 12:59:46.121097 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1986 12:59:46.127927 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1987 12:59:46.134629 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1988 12:59:46.141320 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1989 12:59:46.144650 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 12:59:46.147567 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 12:59:46.151042 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 12:59:46.154429 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 12:59:46.161142 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 12:59:46.164564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 12:59:46.167388 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 12:59:46.170813 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 12:59:46.177618 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 12:59:46.180533 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 12:59:46.183944 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 12:59:46.187383 call enable_fixed_mtrr()
2001 12:59:46.190759 CPU physical address size: 39 bits
2002 12:59:46.197563 MTRR: default type WB/UC MTRR counts: 6/6.
2003 12:59:46.200958 MTRR: UC selected as default type.
2004 12:59:46.207731 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2005 12:59:46.210639 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2006 12:59:46.217415 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2007 12:59:46.224179 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2008 12:59:46.230831 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2009 12:59:46.236966 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2010 12:59:46.237053
2011 12:59:46.240826 MTRR check
2012 12:59:46.243763 Fixed MTRRs : Enabled
2013 12:59:46.243849 Variable MTRRs: Enabled
2014 12:59:46.243918
2015 12:59:46.250696 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 12:59:46.254111 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 12:59:46.256915 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 12:59:46.260330 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 12:59:46.267172 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 12:59:46.270596 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 12:59:46.273972 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 12:59:46.276853 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 12:59:46.280288 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 12:59:46.287146 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 12:59:46.290484 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 12:59:46.296867 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2027 12:59:46.300097 call enable_fixed_mtrr()
2028 12:59:46.303470 Checking cr50 for pending updates
2029 12:59:46.307937 CPU physical address size: 39 bits
2030 12:59:46.311324 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 12:59:46.314792 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 12:59:46.318125 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 12:59:46.321479 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 12:59:46.328233 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 12:59:46.331504 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 12:59:46.334753 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 12:59:46.338030 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 12:59:46.344776 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 12:59:46.347655 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 12:59:46.351103 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 12:59:46.354548 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 12:59:46.361968 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 12:59:46.365305 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 12:59:46.368573 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 12:59:46.371923 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 12:59:46.378787 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 12:59:46.381751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 12:59:46.385014 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 12:59:46.388388 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 12:59:46.395303 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 12:59:46.398610 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 12:59:46.401525 call enable_fixed_mtrr()
2053 12:59:46.405397 call enable_fixed_mtrr()
2054 12:59:46.405484 Reading cr50 TPM mode
2055 12:59:46.408754 CPU physical address size: 39 bits
2056 12:59:46.412680 CPU physical address size: 39 bits
2057 12:59:46.419007 MTRR: Fixed MSR 0x250 0x0606060606060606
2058 12:59:46.422379 MTRR: Fixed MSR 0x250 0x0606060606060606
2059 12:59:46.425778 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 12:59:46.429071 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:59:46.435724 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:59:46.439105 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:59:46.442550 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:59:46.445892 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:59:46.452124 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:59:46.455620 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:59:46.459003 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:59:46.462470 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:59:46.469691 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 12:59:46.469776 call enable_fixed_mtrr()
2071 12:59:46.476497 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 12:59:46.479831 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 12:59:46.482728 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 12:59:46.486198 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 12:59:46.492946 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 12:59:46.496311 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 12:59:46.499753 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 12:59:46.503117 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 12:59:46.509353 MTRR: Fixed MSR 0x26f 0x0606060606060606
2080 12:59:46.512611 CPU physical address size: 39 bits
2081 12:59:46.516112 call enable_fixed_mtrr()
2082 12:59:46.519138 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 12:59:46.522950 MTRR: Fixed MSR 0x250 0x0606060606060606
2084 12:59:46.529134 MTRR: Fixed MSR 0x258 0x0606060606060606
2085 12:59:46.532579 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 12:59:46.535806 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 12:59:46.539102 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 12:59:46.546340 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 12:59:46.549144 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 12:59:46.552626 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 12:59:46.556042 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 12:59:46.562961 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 12:59:46.565824 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 12:59:46.569194 MTRR: Fixed MSR 0x258 0x0606060606060606
2095 12:59:46.572627 call enable_fixed_mtrr()
2096 12:59:46.575903 MTRR: Fixed MSR 0x259 0x0000000000000000
2097 12:59:46.582774 MTRR: Fixed MSR 0x268 0x0606060606060606
2098 12:59:46.586402 MTRR: Fixed MSR 0x269 0x0606060606060606
2099 12:59:46.589146 MTRR: Fixed MSR 0x26a 0x0606060606060606
2100 12:59:46.592493 MTRR: Fixed MSR 0x26b 0x0606060606060606
2101 12:59:46.595958 MTRR: Fixed MSR 0x26c 0x0606060606060606
2102 12:59:46.602736 MTRR: Fixed MSR 0x26d 0x0606060606060606
2103 12:59:46.605569 MTRR: Fixed MSR 0x26e 0x0606060606060606
2104 12:59:46.609076 MTRR: Fixed MSR 0x26f 0x0606060606060606
2105 12:59:46.612539 CPU physical address size: 39 bits
2106 12:59:46.619402 call enable_fixed_mtrr()
2107 12:59:46.622798 CPU physical address size: 39 bits
2108 12:59:46.626141 BS: BS_PAYLOAD_LOAD entry times (exec / console): 108 / 6 ms
2109 12:59:46.629569 CPU physical address size: 39 bits
2110 12:59:46.639606 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2111 12:59:46.642381 Checking segment from ROM address 0xffc02b38
2112 12:59:46.649228 Checking segment from ROM address 0xffc02b54
2113 12:59:46.652800 Loading segment from ROM address 0xffc02b38
2114 12:59:46.655992 code (compression=0)
2115 12:59:46.662183 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2116 12:59:46.672304 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2117 12:59:46.672400 it's not compressed!
2118 12:59:46.812907 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2119 12:59:46.819136 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2120 12:59:46.826111 Loading segment from ROM address 0xffc02b54
2121 12:59:46.826197 Entry Point 0x30000000
2122 12:59:46.829563 Loaded segments
2123 12:59:46.835817 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2124 12:59:46.878799 Finalizing chipset.
2125 12:59:46.882217 Finalizing SMM.
2126 12:59:46.882302 APMC done.
2127 12:59:46.888881 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2128 12:59:46.891856 mp_park_aps done after 0 msecs.
2129 12:59:46.895265 Jumping to boot code at 0x30000000(0x76b25000)
2130 12:59:46.905413 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2131 12:59:46.905502
2132 12:59:46.908666 Starting depthcharge on Voema...
2133 12:59:46.909048 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2134 12:59:46.909155 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2135 12:59:46.909243 Setting prompt string to ['volteer:']
2136 12:59:46.909326 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2137 12:59:46.918850 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2138 12:59:46.925074 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2139 12:59:46.931922 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 12:59:46.935375 Failed to find eMMC card reader
2141 12:59:46.935460 Wipe memory regions:
2142 12:59:46.941571 [0x00000000001000, 0x000000000a0000)
2143 12:59:46.944872 [0x00000000100000, 0x00000030000000)
2144 12:59:46.973444 [0x00000032662db0, 0x000000769ef000)
2145 12:59:47.012203 [0x00000100000000, 0x00000280400000)
2146 12:59:47.217510 ec_init: CrosEC protocol v3 supported (256, 256)
2147 12:59:47.223706 update_port_state: port C0 state: usb enable 1 mux conn 0
2148 12:59:47.233899 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2149 12:59:47.240667 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2150 12:59:47.243961 send_conn_disc_msg: pmc_send_cmd succeeded
2151 12:59:47.677337 R8152: Initializing
2152 12:59:47.680153 Version 9 (ocp_data = 6010)
2153 12:59:47.683545 R8152: Done initializing
2154 12:59:47.686900 Adding net device
2155 12:59:47.993290 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2156 12:59:47.993426
2157 12:59:47.996370 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2159 12:59:48.097150 volteer: tftpboot 192.168.201.1 7148201/tftp-deploy-vdmbfacu/kernel/bzImage 7148201/tftp-deploy-vdmbfacu/kernel/cmdline 7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
2160 12:59:48.097282 Setting prompt string to 'Starting kernel'
2161 12:59:48.097365 Setting prompt string to ['Starting kernel']
2162 12:59:48.097439 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2163 12:59:48.097512 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2164 12:59:48.101931 tftpboot 192.168.201.1 7148201/tftp-deploy-vdmbfacu/kernel/bzImaoy-vdmbfacu/kernel/cmdline 7148201/tftp-deploy-vdmbfacu/ramdisk/ramdisk.cpio.gz
2165 12:59:48.102021 Waiting for link
2166 12:59:48.305216 done.
2167 12:59:48.305346 MAC: 00:e0:4c:71:a6:42
2168 12:59:48.308482 Sending DHCP discover... done.
2169 12:59:48.311867 Waiting for reply... done.
2170 12:59:48.315222 Sending DHCP request... done.
2171 12:59:48.318497 Waiting for reply... done.
2172 12:59:48.322184 My ip is 192.168.201.13
2173 12:59:48.324965 The DHCP server ip is 192.168.201.1
2174 12:59:48.328368 TFTP server IP predefined by user: 192.168.201.1
2175 12:59:48.335218 Bootfile predefined by user: 7148201/tftp-deploy-vdmbfacu/kernel/bzImage
2176 12:59:48.338603 Sending tftp read request... done.
2177 12:59:48.341934 Waiting for the transfer...
2178 12:59:48.595408 00000000 ################################################################
2179 12:59:48.850280 00080000 ################################################################
2180 12:59:49.098779 00100000 ################################################################
2181 12:59:49.361292 00180000 ################################################################
2182 12:59:49.598745 00200000 ################################################################
2183 12:59:49.847460 00280000 ################################################################
2184 12:59:50.101811 00300000 ################################################################
2185 12:59:50.360660 00380000 ################################################################
2186 12:59:50.618806 00400000 ################################################################
2187 12:59:50.877458 00480000 ################################################################
2188 12:59:51.114726 00500000 ################################################################
2189 12:59:51.346006 00580000 ################################################################
2190 12:59:51.578563 00600000 ################################################################
2191 12:59:51.810615 00680000 ################################################################
2192 12:59:52.040906 00700000 ################################################################
2193 12:59:52.279363 00780000 ################################################################
2194 12:59:52.509269 00800000 ################################################################
2195 12:59:52.529428 00880000 ###### done.
2196 12:59:52.532286 The bootfile was 8953856 bytes long.
2197 12:59:52.535881 Sending tftp read request... done.
2198 12:59:52.539077 Waiting for the transfer...
2199 12:59:52.781214 00000000 ################################################################
2200 12:59:53.032595 00080000 ################################################################
2201 12:59:53.287200 00100000 ################################################################
2202 12:59:53.534796 00180000 ################################################################
2203 12:59:53.779779 00200000 ################################################################
2204 12:59:54.023447 00280000 ################################################################
2205 12:59:54.252902 00300000 ################################################################
2206 12:59:54.500467 00380000 ################################################################
2207 12:59:54.740560 00400000 ################################################################
2208 12:59:54.968879 00480000 ################################################################
2209 12:59:55.083361 00500000 ################################ done.
2210 12:59:55.086869 Sending tftp read request... done.
2211 12:59:55.090341 Waiting for the transfer...
2212 12:59:55.090428 00000000 # done.
2213 12:59:55.100153 Command line loaded dynamically from TFTP file: 7148201/tftp-deploy-vdmbfacu/kernel/cmdline
2214 12:59:55.123131 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7148201/extract-nfsrootfs-kezwg545,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2215 12:59:55.129948 Shutting down all USB controllers.
2216 12:59:55.130035 Removing current net device
2217 12:59:55.132723 Finalizing coreboot
2218 12:59:55.139683 Exiting depthcharge with code 4 at timestamp: 16883443
2219 12:59:55.139770
2220 12:59:55.139839 Starting kernel ...
2221 12:59:55.139902
2222 12:59:55.139964
2223 12:59:55.140258 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2224 12:59:55.140359 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2225 12:59:55.140437 Setting prompt string to ['Linux version [0-9]']
2226 12:59:55.140507 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2227 12:59:55.140577 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2229 13:04:30.141469 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2231 13:04:30.142624 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2233 13:04:30.143503 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2236 13:04:30.145048 end: 2 depthcharge-action (duration 00:05:00) [common]
2238 13:04:30.146121 Cleaning after the job
2239 13:04:30.146205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/ramdisk
2240 13:04:30.146632 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/kernel
2241 13:04:30.147229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/nfsrootfs
2242 13:04:30.183778 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148201/tftp-deploy-vdmbfacu/modules
2243 13:04:30.184091 start: 4.1 power-off (timeout 00:00:30) [common]
2244 13:04:30.184258 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2245 13:04:30.203561 >> Command sent successfully.
2246 13:04:30.205521 Returned 0 in 0 seconds
2247 13:04:30.306849 end: 4.1 power-off (duration 00:00:00) [common]
2249 13:04:30.308497 start: 4.2 read-feedback (timeout 00:10:00) [common]
2250 13:04:30.309703 Listened to connection for namespace 'common' for up to 1s
2251 13:04:31.312937 Finalising connection for namespace 'common'
2252 13:04:31.313276 Disconnecting from shell: Finalise
2253 13:04:31.414562 end: 4.2 read-feedback (duration 00:00:01) [common]
2254 13:04:31.415229 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148201
2255 13:04:31.579170 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148201
2256 13:04:31.579365 JobError: Your job cannot terminate cleanly.