Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 13:03:42.765885 lava-dispatcher, installed at version: 2022.06
2 13:03:42.766056 start: 0 validate
3 13:03:42.766186 Start time: 2022-08-31 13:03:42.766179+00:00 (UTC)
4 13:03:42.766313 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:03:42.766441 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
6 13:03:43.062108 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:03:43.062781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:03:43.358697 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:03:43.359358 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 13:03:43.653696 validate duration: 0.89
12 13:03:43.654916 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 13:03:43.655458 start: 1.1 download-retry (timeout 00:10:00) [common]
14 13:03:43.655969 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 13:03:43.656441 Not decompressing ramdisk as can be used compressed.
16 13:03:43.656847 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
17 13:03:43.657162 saving as /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/ramdisk/rootfs.cpio.gz
18 13:03:43.657507 total size: 8415960 (8MB)
19 13:03:43.663525 progress 0% (0MB)
20 13:03:43.673791 progress 5% (0MB)
21 13:03:43.678512 progress 10% (0MB)
22 13:03:43.680608 progress 15% (1MB)
23 13:03:43.682724 progress 20% (1MB)
24 13:03:43.684780 progress 25% (2MB)
25 13:03:43.686879 progress 30% (2MB)
26 13:03:43.688822 progress 35% (2MB)
27 13:03:43.691555 progress 40% (3MB)
28 13:03:43.695261 progress 45% (3MB)
29 13:03:43.699921 progress 50% (4MB)
30 13:03:43.703640 progress 55% (4MB)
31 13:03:43.707297 progress 60% (4MB)
32 13:03:43.710824 progress 65% (5MB)
33 13:03:43.714955 progress 70% (5MB)
34 13:03:43.718755 progress 75% (6MB)
35 13:03:43.722430 progress 80% (6MB)
36 13:03:43.726883 progress 85% (6MB)
37 13:03:43.730115 progress 90% (7MB)
38 13:03:43.733363 progress 95% (7MB)
39 13:03:43.737018 progress 100% (8MB)
40 13:03:43.737310 8MB downloaded in 0.08s (100.57MB/s)
41 13:03:43.737466 end: 1.1.1 http-download (duration 00:00:00) [common]
43 13:03:43.737811 end: 1.1 download-retry (duration 00:00:00) [common]
44 13:03:43.737904 start: 1.2 download-retry (timeout 00:10:00) [common]
45 13:03:43.737997 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 13:03:43.738137 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 13:03:43.738213 saving as /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/kernel/bzImage
48 13:03:43.738280 total size: 8953856 (8MB)
49 13:03:43.738343 No compression specified
50 13:03:43.740227 progress 0% (0MB)
51 13:03:43.744429 progress 5% (0MB)
52 13:03:43.748175 progress 10% (0MB)
53 13:03:43.751516 progress 15% (1MB)
54 13:03:43.755676 progress 20% (1MB)
55 13:03:43.759393 progress 25% (2MB)
56 13:03:43.763367 progress 30% (2MB)
57 13:03:43.766859 progress 35% (3MB)
58 13:03:43.770943 progress 40% (3MB)
59 13:03:43.774951 progress 45% (3MB)
60 13:03:43.778454 progress 50% (4MB)
61 13:03:43.782328 progress 55% (4MB)
62 13:03:43.785895 progress 60% (5MB)
63 13:03:43.789926 progress 65% (5MB)
64 13:03:43.793788 progress 70% (6MB)
65 13:03:43.797740 progress 75% (6MB)
66 13:03:43.801433 progress 80% (6MB)
67 13:03:43.805671 progress 85% (7MB)
68 13:03:43.808947 progress 90% (7MB)
69 13:03:43.812746 progress 95% (8MB)
70 13:03:43.816578 progress 100% (8MB)
71 13:03:43.816782 8MB downloaded in 0.08s (108.78MB/s)
72 13:03:43.816933 end: 1.2.1 http-download (duration 00:00:00) [common]
74 13:03:43.817192 end: 1.2 download-retry (duration 00:00:00) [common]
75 13:03:43.817283 start: 1.3 download-retry (timeout 00:10:00) [common]
76 13:03:43.817371 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 13:03:43.817476 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 13:03:43.817545 saving as /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/modules/modules.tar
79 13:03:43.817609 total size: 64656 (0MB)
80 13:03:43.817683 Using unxz to decompress xz
81 13:03:43.821525 progress 50% (0MB)
82 13:03:43.822162 progress 100% (0MB)
83 13:03:43.826175 0MB downloaded in 0.01s (7.20MB/s)
84 13:03:43.826401 end: 1.3.1 http-download (duration 00:00:00) [common]
86 13:03:43.826669 end: 1.3 download-retry (duration 00:00:00) [common]
87 13:03:43.826769 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 13:03:43.826865 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 13:03:43.826962 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 13:03:43.827064 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 13:03:43.827234 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis
92 13:03:43.827343 makedir: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin
93 13:03:43.827430 makedir: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/tests
94 13:03:43.827514 makedir: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/results
95 13:03:43.827621 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-add-keys
96 13:03:43.827753 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-add-sources
97 13:03:43.827872 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-background-process-start
98 13:03:43.827985 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-background-process-stop
99 13:03:43.828099 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-common-functions
100 13:03:43.828212 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-echo-ipv4
101 13:03:43.828326 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-install-packages
102 13:03:43.828439 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-installed-packages
103 13:03:43.828549 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-os-build
104 13:03:43.828665 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-probe-channel
105 13:03:43.828795 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-probe-ip
106 13:03:43.828923 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-target-ip
107 13:03:43.829037 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-target-mac
108 13:03:43.829158 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-target-storage
109 13:03:43.829275 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-case
110 13:03:43.829385 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-event
111 13:03:43.829496 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-feedback
112 13:03:43.829606 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-raise
113 13:03:43.829744 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-reference
114 13:03:43.829889 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-runner
115 13:03:43.830007 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-set
116 13:03:43.830129 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-test-shell
117 13:03:43.830244 Updating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-install-packages (oe)
118 13:03:43.830364 Updating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/bin/lava-installed-packages (oe)
119 13:03:43.830480 Creating /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/environment
120 13:03:43.830573 LAVA metadata
121 13:03:43.830646 - LAVA_JOB_ID=7148208
122 13:03:43.830714 - LAVA_DISPATCHER_IP=192.168.201.1
123 13:03:43.830823 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 13:03:43.830891 skipped lava-vland-overlay
125 13:03:43.830971 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 13:03:43.831069 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 13:03:43.831142 skipped lava-multinode-overlay
128 13:03:43.831222 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 13:03:43.831320 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 13:03:43.831407 Loading test definitions
131 13:03:43.831507 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 13:03:43.831585 Using /lava-7148208 at stage 0
133 13:03:43.831872 uuid=7148208_1.4.2.3.1 testdef=None
134 13:03:43.831967 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 13:03:43.832056 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 13:03:43.832565 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 13:03:43.832825 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 13:03:43.833451 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 13:03:43.833701 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 13:03:43.834312 runner path: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/0/tests/0_dmesg test_uuid 7148208_1.4.2.3.1
143 13:03:43.834467 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 13:03:43.834706 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 13:03:43.834781 Using /lava-7148208 at stage 1
147 13:03:43.835027 uuid=7148208_1.4.2.3.5 testdef=None
148 13:03:43.835123 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 13:03:43.835224 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 13:03:43.835679 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 13:03:43.835940 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 13:03:43.836528 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 13:03:43.836795 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 13:03:43.837362 runner path: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/1/tests/1_bootrr test_uuid 7148208_1.4.2.3.5
157 13:03:43.837525 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 13:03:43.837787 Creating lava-test-runner.conf files
160 13:03:43.837855 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/0 for stage 0
161 13:03:43.837943 - 0_dmesg
162 13:03:43.838022 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148208/lava-overlay-7va8ejis/lava-7148208/1 for stage 1
163 13:03:43.838121 - 1_bootrr
164 13:03:43.838216 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 13:03:43.838307 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 13:03:43.844561 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 13:03:43.844679 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 13:03:43.844785 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 13:03:43.844875 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 13:03:43.844964 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 13:03:44.026765 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 13:03:44.027113 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 13:03:44.027227 extracting modules file /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148208/extract-overlay-ramdisk-15iil3h7/ramdisk
174 13:03:44.031686 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 13:03:44.031802 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 13:03:44.031901 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148208/compress-overlay-1kpm3lmn/overlay-1.4.2.4.tar.gz to ramdisk
177 13:03:44.031977 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148208/compress-overlay-1kpm3lmn/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148208/extract-overlay-ramdisk-15iil3h7/ramdisk
178 13:03:44.036100 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 13:03:44.036213 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 13:03:44.036315 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 13:03:44.036416 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 13:03:44.036497 Building ramdisk /var/lib/lava/dispatcher/tmp/7148208/extract-overlay-ramdisk-15iil3h7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148208/extract-overlay-ramdisk-15iil3h7/ramdisk
183 13:03:44.098960 >> 48236 blocks
184 13:03:44.868696 rename /var/lib/lava/dispatcher/tmp/7148208/extract-overlay-ramdisk-15iil3h7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
185 13:03:44.869110 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 13:03:44.869238 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 13:03:44.869338 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 13:03:44.869433 No mkimage arch provided, not using FIT.
189 13:03:44.869525 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 13:03:44.869614 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 13:03:44.869714 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 13:03:44.869850 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 13:03:44.869930 No LXC device requested
194 13:03:44.870015 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 13:03:44.870106 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 13:03:44.870192 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 13:03:44.870266 Checking files for TFTP limit of 4294967296 bytes.
198 13:03:44.870644 end: 1 tftp-deploy (duration 00:00:01) [common]
199 13:03:44.870747 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 13:03:44.870850 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 13:03:44.870981 substitutions:
202 13:03:44.871051 - {DTB}: None
203 13:03:44.871119 - {INITRD}: 7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
204 13:03:44.871182 - {KERNEL}: 7148208/tftp-deploy-8dqshclf/kernel/bzImage
205 13:03:44.871244 - {LAVA_MAC}: None
206 13:03:44.871305 - {PRESEED_CONFIG}: None
207 13:03:44.871364 - {PRESEED_LOCAL}: None
208 13:03:44.871431 - {RAMDISK}: 7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
209 13:03:44.871494 - {ROOT_PART}: None
210 13:03:44.871551 - {ROOT}: None
211 13:03:44.871610 - {SERVER_IP}: 192.168.201.1
212 13:03:44.871667 - {TEE}: None
213 13:03:44.871725 Parsed boot commands:
214 13:03:44.871781 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 13:03:44.871932 Parsed boot commands: tftpboot 192.168.201.1 7148208/tftp-deploy-8dqshclf/kernel/bzImage 7148208/tftp-deploy-8dqshclf/kernel/cmdline 7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
216 13:03:44.872024 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 13:03:44.872112 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 13:03:44.872212 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 13:03:44.872307 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 13:03:44.872381 Not connected, no need to disconnect.
221 13:03:44.872459 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 13:03:44.872542 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 13:03:44.872611 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
224 13:03:44.875021 Setting prompt string to ['lava-test: # ']
225 13:03:44.875308 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 13:03:44.875409 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 13:03:44.875509 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 13:03:44.875601 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 13:03:44.875775 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
230 13:03:44.894383 >> Command sent successfully.
231 13:03:44.896093 Returned 0 in 0 seconds
232 13:03:44.996868 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 13:03:44.997438 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 13:03:44.997538 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 13:03:44.997626 Setting prompt string to 'Starting depthcharge on Helios...'
237 13:03:44.997694 Changing prompt to 'Starting depthcharge on Helios...'
238 13:03:44.997773 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 13:03:44.998067 [Enter `^Ec?' for help]
240 13:03:51.669942
241 13:03:51.670103
242 13:03:51.680010 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 13:03:51.683344 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 13:03:51.689345 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 13:03:51.692720 CPU: AES supported, TXT NOT supported, VT supported
246 13:03:51.699821 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 13:03:51.702900 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 13:03:51.709228 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 13:03:51.712634 VBOOT: Loading verstage.
250 13:03:51.716165 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 13:03:51.722669 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 13:03:51.729253 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 13:03:51.729339 CBFS @ c08000 size 3f8000
254 13:03:51.736128 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 13:03:51.739418 CBFS: Locating 'fallback/verstage'
256 13:03:51.742732 CBFS: Found @ offset 10fb80 size 1072c
257 13:03:51.746502
258 13:03:51.746588
259 13:03:51.756436 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 13:03:51.771001 Probing TPM: . done!
261 13:03:51.774632 TPM ready after 0 ms
262 13:03:51.777845 Connected to device vid:did:rid of 1ae0:0028:00
263 13:03:51.787615 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 13:03:51.791593 Initialized TPM device CR50 revision 0
265 13:03:51.826540 tlcl_send_startup: Startup return code is 0
266 13:03:51.826632 TPM: setup succeeded
267 13:03:51.839290 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 13:03:51.843270 Chrome EC: UHEPI supported
269 13:03:51.846576 Phase 1
270 13:03:51.849865 FMAP: area GBB found @ c05000 (12288 bytes)
271 13:03:51.856448 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 13:03:51.856535 Phase 2
273 13:03:51.859756 Phase 3
274 13:03:51.863059 FMAP: area GBB found @ c05000 (12288 bytes)
275 13:03:51.870162 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 13:03:51.876691 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 13:03:51.880224 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 13:03:51.886361 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 13:03:51.902065 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 13:03:51.905006 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 13:03:51.911966 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 13:03:51.915979 Phase 4
283 13:03:51.919440 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 13:03:51.925830 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 13:03:52.105476 VB2:vb2_rsa_verify_digest() Digest check failed!
286 13:03:52.112372 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 13:03:52.112465 Saving nvdata
288 13:03:52.115226 Reboot requested (10020007)
289 13:03:52.119196 board_reset() called!
290 13:03:52.119299 full_reset() called!
291 13:03:56.637385
292 13:03:56.637541
293 13:03:56.647012 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 13:03:56.650096 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 13:03:56.656689 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 13:03:56.660285 CPU: AES supported, TXT NOT supported, VT supported
297 13:03:56.666987 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 13:03:56.670253 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 13:03:56.676765 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 13:03:56.680060 VBOOT: Loading verstage.
301 13:03:56.683837 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 13:03:56.689935 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 13:03:56.696815 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 13:03:56.696902 CBFS @ c08000 size 3f8000
305 13:03:56.703480 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 13:03:56.706524 CBFS: Locating 'fallback/verstage'
307 13:03:56.710066 CBFS: Found @ offset 10fb80 size 1072c
308 13:03:56.713992
309 13:03:56.714077
310 13:03:56.723926 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 13:03:56.738268 Probing TPM: . done!
312 13:03:56.741594 TPM ready after 0 ms
313 13:03:56.745145 Connected to device vid:did:rid of 1ae0:0028:00
314 13:03:56.755564 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 13:03:56.758814 Initialized TPM device CR50 revision 0
316 13:03:56.794112 tlcl_send_startup: Startup return code is 0
317 13:03:56.794235 TPM: setup succeeded
318 13:03:56.806919 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 13:03:56.810670 Chrome EC: UHEPI supported
320 13:03:56.813823 Phase 1
321 13:03:56.817236 FMAP: area GBB found @ c05000 (12288 bytes)
322 13:03:56.824137 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 13:03:56.830579 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 13:03:56.833886 Recovery requested (1009000e)
325 13:03:56.839940 Saving nvdata
326 13:03:56.845881 tlcl_extend: response is 0
327 13:03:56.854528 tlcl_extend: response is 0
328 13:03:56.861689 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 13:03:56.864944 CBFS @ c08000 size 3f8000
330 13:03:56.871285 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 13:03:56.874968 CBFS: Locating 'fallback/romstage'
332 13:03:56.878140 CBFS: Found @ offset 80 size 145fc
333 13:03:56.881265 Accumulated console time in verstage 98 ms
334 13:03:56.881351
335 13:03:56.881421
336 13:03:56.894771 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 13:03:56.901117 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 13:03:56.904209 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 13:03:56.907888 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 13:03:56.914445 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 13:03:56.917900 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 13:03:56.920991 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 13:03:56.924680 TCO_STS: 0000 0000
344 13:03:56.927632 GEN_PMCON: e0015238 00000200
345 13:03:56.931074 GBLRST_CAUSE: 00000000 00000000
346 13:03:56.931160 prev_sleep_state 5
347 13:03:56.934224 Boot Count incremented to 37204
348 13:03:56.941258 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 13:03:56.944711 CBFS @ c08000 size 3f8000
350 13:03:56.950967 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 13:03:56.951054 CBFS: Locating 'fspm.bin'
352 13:03:56.957618 CBFS: Found @ offset 5ffc0 size 71000
353 13:03:56.960828 Chrome EC: UHEPI supported
354 13:03:56.967488 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 13:03:56.971176 Probing TPM: done!
356 13:03:56.977885 Connected to device vid:did:rid of 1ae0:0028:00
357 13:03:56.987639 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 13:03:56.993761 Initialized TPM device CR50 revision 0
359 13:03:57.002814 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 13:03:57.009331 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 13:03:57.012884 MRC cache found, size 1948
362 13:03:57.015947 bootmode is set to: 2
363 13:03:57.019040 PRMRR disabled by config.
364 13:03:57.022541 SPD INDEX = 1
365 13:03:57.025739 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 13:03:57.029343 CBFS @ c08000 size 3f8000
367 13:03:57.035900 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 13:03:57.035987 CBFS: Locating 'spd.bin'
369 13:03:57.039082 CBFS: Found @ offset 5fb80 size 400
370 13:03:57.042534 SPD: module type is LPDDR3
371 13:03:57.045622 SPD: module part is
372 13:03:57.052706 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 13:03:57.055747 SPD: device width 4 bits, bus width 8 bits
374 13:03:57.058825 SPD: module size is 4096 MB (per channel)
375 13:03:57.062237 memory slot: 0 configuration done.
376 13:03:57.065575 memory slot: 2 configuration done.
377 13:03:57.117299 CBMEM:
378 13:03:57.120510 IMD: root @ 99fff000 254 entries.
379 13:03:57.124238 IMD: root @ 99ffec00 62 entries.
380 13:03:57.127351 External stage cache:
381 13:03:57.130308 IMD: root @ 9abff000 254 entries.
382 13:03:57.133664 IMD: root @ 9abfec00 62 entries.
383 13:03:57.136913 Chrome EC: clear events_b mask to 0x0000000020004000
384 13:03:57.152791 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 13:03:57.166585 tlcl_write: response is 0
386 13:03:57.175375 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 13:03:57.181812 MRC: TPM MRC hash updated successfully.
388 13:03:57.181894 2 DIMMs found
389 13:03:57.185189 SMM Memory Map
390 13:03:57.188468 SMRAM : 0x9a000000 0x1000000
391 13:03:57.191741 Subregion 0: 0x9a000000 0xa00000
392 13:03:57.195296 Subregion 1: 0x9aa00000 0x200000
393 13:03:57.198757 Subregion 2: 0x9ac00000 0x400000
394 13:03:57.201689 top_of_ram = 0x9a000000
395 13:03:57.205240 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 13:03:57.211831 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 13:03:57.215044 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 13:03:57.221801 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 13:03:57.224945 CBFS @ c08000 size 3f8000
400 13:03:57.228129 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 13:03:57.231770 CBFS: Locating 'fallback/postcar'
402 13:03:57.238533 CBFS: Found @ offset 107000 size 4b44
403 13:03:57.241573 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 13:03:57.254397 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 13:03:57.257428 Processing 180 relocs. Offset value of 0x97c0c000
406 13:03:57.265877 Accumulated console time in romstage 286 ms
407 13:03:57.265965
408 13:03:57.266061
409 13:03:57.275997 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 13:03:57.282780 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 13:03:57.285811 CBFS @ c08000 size 3f8000
412 13:03:57.292387 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 13:03:57.295548 CBFS: Locating 'fallback/ramstage'
414 13:03:57.298916 CBFS: Found @ offset 43380 size 1b9e8
415 13:03:57.305611 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 13:03:57.337893 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 13:03:57.341415 Processing 3976 relocs. Offset value of 0x98db0000
418 13:03:57.348021 Accumulated console time in postcar 52 ms
419 13:03:57.348109
420 13:03:57.348178
421 13:03:57.357680 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 13:03:57.364184 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 13:03:57.367574 WARNING: RO_VPD is uninitialized or empty.
424 13:03:57.371009 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 13:03:57.377534 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 13:03:57.377628 Normal boot.
427 13:03:57.384405 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 13:03:57.387577 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 13:03:57.390641 CBFS @ c08000 size 3f8000
430 13:03:57.397490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 13:03:57.400786 CBFS: Locating 'cpu_microcode_blob.bin'
432 13:03:57.404204 CBFS: Found @ offset 14700 size 2ec00
433 13:03:57.407615 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 13:03:57.410751 Skip microcode update
435 13:03:57.417463 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 13:03:57.417556 CBFS @ c08000 size 3f8000
437 13:03:57.424204 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 13:03:57.427672 CBFS: Locating 'fsps.bin'
439 13:03:57.430499 CBFS: Found @ offset d1fc0 size 35000
440 13:03:57.456311 Detected 4 core, 8 thread CPU.
441 13:03:57.459325 Setting up SMI for CPU
442 13:03:57.462683 IED base = 0x9ac00000
443 13:03:57.462764 IED size = 0x00400000
444 13:03:57.466008 Will perform SMM setup.
445 13:03:57.472554 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 13:03:57.479250 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 13:03:57.482730 Processing 16 relocs. Offset value of 0x00030000
448 13:03:57.485999 Attempting to start 7 APs
449 13:03:57.489476 Waiting for 10ms after sending INIT.
450 13:03:57.505825 Waiting for 1st SIPI to complete...done.
451 13:03:57.505915 AP: slot 2 apic_id 1.
452 13:03:57.512161 Waiting for 2nd SIPI to complete...done.
453 13:03:57.512253 AP: slot 6 apic_id 6.
454 13:03:57.515514 AP: slot 5 apic_id 7.
455 13:03:57.519222 AP: slot 1 apic_id 3.
456 13:03:57.519304 AP: slot 3 apic_id 2.
457 13:03:57.522433 AP: slot 7 apic_id 4.
458 13:03:57.525743 AP: slot 4 apic_id 5.
459 13:03:57.532164 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 13:03:57.535381 Processing 13 relocs. Offset value of 0x00038000
461 13:03:57.542330 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 13:03:57.548646 Installing SMM handler to 0x9a000000
463 13:03:57.555361 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 13:03:57.558541 Processing 658 relocs. Offset value of 0x9a010000
465 13:03:57.568964 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 13:03:57.571711 Processing 13 relocs. Offset value of 0x9a008000
467 13:03:57.578416 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 13:03:57.585150 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 13:03:57.591801 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 13:03:57.595359 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 13:03:57.601851 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 13:03:57.608291 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 13:03:57.611690 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 13:03:57.618506 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 13:03:57.621600 Clearing SMI status registers
476 13:03:57.625159 SMI_STS: PM1
477 13:03:57.625246 PM1_STS: PWRBTN
478 13:03:57.628317 TCO_STS: SECOND_TO
479 13:03:57.631736 New SMBASE 0x9a000000
480 13:03:57.635358 In relocation handler: CPU 0
481 13:03:57.638690 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 13:03:57.641675 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 13:03:57.645453 Relocation complete.
484 13:03:57.648467 New SMBASE 0x99fff800
485 13:03:57.648555 In relocation handler: CPU 2
486 13:03:57.655089 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 13:03:57.658412 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 13:03:57.661624 Relocation complete.
489 13:03:57.665208 New SMBASE 0x99fffc00
490 13:03:57.665325 In relocation handler: CPU 1
491 13:03:57.671668 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
492 13:03:57.675065 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 13:03:57.678203 Relocation complete.
494 13:03:57.678301 New SMBASE 0x99fff400
495 13:03:57.681881 In relocation handler: CPU 3
496 13:03:57.688148 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
497 13:03:57.691390 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 13:03:57.694728 Relocation complete.
499 13:03:57.694832 New SMBASE 0x99ffe800
500 13:03:57.698397 In relocation handler: CPU 6
501 13:03:57.701530 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
502 13:03:57.708353 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 13:03:57.711406 Relocation complete.
504 13:03:57.711508 New SMBASE 0x99ffec00
505 13:03:57.715224 In relocation handler: CPU 5
506 13:03:57.718269 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
507 13:03:57.725119 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 13:03:57.727930 Relocation complete.
509 13:03:57.728035 New SMBASE 0x99fff000
510 13:03:57.731617 In relocation handler: CPU 4
511 13:03:57.734502 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
512 13:03:57.741142 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 13:03:57.741267 Relocation complete.
514 13:03:57.744960 New SMBASE 0x99ffe400
515 13:03:57.748025 In relocation handler: CPU 7
516 13:03:57.751651 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
517 13:03:57.758254 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 13:03:57.758346 Relocation complete.
519 13:03:57.761509 Initializing CPU #0
520 13:03:57.764593 CPU: vendor Intel device 806ec
521 13:03:57.767955 CPU: family 06, model 8e, stepping 0c
522 13:03:57.771383 Clearing out pending MCEs
523 13:03:57.774539 Setting up local APIC...
524 13:03:57.774621 apic_id: 0x00 done.
525 13:03:57.777673 Turbo is available but hidden
526 13:03:57.781288 Turbo is available and visible
527 13:03:57.784315 VMX status: enabled
528 13:03:57.788098 IA32_FEATURE_CONTROL status: locked
529 13:03:57.791357 Skip microcode update
530 13:03:57.791470 CPU #0 initialized
531 13:03:57.794685 Initializing CPU #2
532 13:03:57.797831 Initializing CPU #1
533 13:03:57.797916 Initializing CPU #3
534 13:03:57.800992 CPU: vendor Intel device 806ec
535 13:03:57.804226 CPU: family 06, model 8e, stepping 0c
536 13:03:57.807548 CPU: vendor Intel device 806ec
537 13:03:57.810822 CPU: family 06, model 8e, stepping 0c
538 13:03:57.814113 Clearing out pending MCEs
539 13:03:57.817628 Clearing out pending MCEs
540 13:03:57.821145 Setting up local APIC...
541 13:03:57.821233 Initializing CPU #6
542 13:03:57.824358 Initializing CPU #5
543 13:03:57.827588 CPU: vendor Intel device 806ec
544 13:03:57.830839 CPU: family 06, model 8e, stepping 0c
545 13:03:57.834667 CPU: vendor Intel device 806ec
546 13:03:57.837416 CPU: family 06, model 8e, stepping 0c
547 13:03:57.840760 Clearing out pending MCEs
548 13:03:57.840869 Initializing CPU #7
549 13:03:57.843903 Initializing CPU #4
550 13:03:57.847544 CPU: vendor Intel device 806ec
551 13:03:57.851052 CPU: family 06, model 8e, stepping 0c
552 13:03:57.853783 CPU: vendor Intel device 806ec
553 13:03:57.857244 CPU: family 06, model 8e, stepping 0c
554 13:03:57.860977 Clearing out pending MCEs
555 13:03:57.863941 Clearing out pending MCEs
556 13:03:57.867069 Setting up local APIC...
557 13:03:57.867163 apic_id: 0x02 done.
558 13:03:57.870804 Setting up local APIC...
559 13:03:57.873907 Setting up local APIC...
560 13:03:57.874022 VMX status: enabled
561 13:03:57.877175 apic_id: 0x03 done.
562 13:03:57.880656 IA32_FEATURE_CONTROL status: locked
563 13:03:57.883837 VMX status: enabled
564 13:03:57.883950 Skip microcode update
565 13:03:57.890716 IA32_FEATURE_CONTROL status: locked
566 13:03:57.890831 CPU #3 initialized
567 13:03:57.894080 Skip microcode update
568 13:03:57.897126 CPU: vendor Intel device 806ec
569 13:03:57.900208 CPU: family 06, model 8e, stepping 0c
570 13:03:57.903737 Clearing out pending MCEs
571 13:03:57.903833 Clearing out pending MCEs
572 13:03:57.907191 Setting up local APIC...
573 13:03:57.910536 CPU #1 initialized
574 13:03:57.910652 apic_id: 0x06 done.
575 13:03:57.913728 Setting up local APIC...
576 13:03:57.916876 Setting up local APIC...
577 13:03:57.920534 VMX status: enabled
578 13:03:57.920618 apic_id: 0x07 done.
579 13:03:57.923729 IA32_FEATURE_CONTROL status: locked
580 13:03:57.927283 VMX status: enabled
581 13:03:57.930169 Skip microcode update
582 13:03:57.933397 IA32_FEATURE_CONTROL status: locked
583 13:03:57.933490 CPU #6 initialized
584 13:03:57.936968 Skip microcode update
585 13:03:57.940602 apic_id: 0x01 done.
586 13:03:57.940717 apic_id: 0x05 done.
587 13:03:57.944076 CPU #5 initialized
588 13:03:57.944165 VMX status: enabled
589 13:03:57.947069 apic_id: 0x04 done.
590 13:03:57.950465 IA32_FEATURE_CONTROL status: locked
591 13:03:57.953790 VMX status: enabled
592 13:03:57.953903 Skip microcode update
593 13:03:57.960312 IA32_FEATURE_CONTROL status: locked
594 13:03:57.960400 CPU #4 initialized
595 13:03:57.963458 Skip microcode update
596 13:03:57.963557 VMX status: enabled
597 13:03:57.966934 CPU #7 initialized
598 13:03:57.970182 IA32_FEATURE_CONTROL status: locked
599 13:03:57.973369 Skip microcode update
600 13:03:57.973459 CPU #2 initialized
601 13:03:57.979952 bsp_do_flight_plan done after 466 msecs.
602 13:03:57.983137 CPU: frequency set to 4200 MHz
603 13:03:57.983252 Enabling SMIs.
604 13:03:57.986873 Locking SMM.
605 13:03:57.999872 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 13:03:58.003108 CBFS @ c08000 size 3f8000
607 13:03:58.009985 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 13:03:58.010074 CBFS: Locating 'vbt.bin'
609 13:03:58.013091 CBFS: Found @ offset 5f5c0 size 499
610 13:03:58.020007 Found a VBT of 4608 bytes after decompression
611 13:03:58.203633 Display FSP Version Info HOB
612 13:03:58.207004 Reference Code - CPU = 9.0.1e.30
613 13:03:58.210211 uCode Version = 0.0.0.ca
614 13:03:58.213377 TXT ACM version = ff.ff.ff.ffff
615 13:03:58.216677 Display FSP Version Info HOB
616 13:03:58.220282 Reference Code - ME = 9.0.1e.30
617 13:03:58.223733 MEBx version = 0.0.0.0
618 13:03:58.226876 ME Firmware Version = Consumer SKU
619 13:03:58.230304 Display FSP Version Info HOB
620 13:03:58.233414 Reference Code - CML PCH = 9.0.1e.30
621 13:03:58.236742 PCH-CRID Status = Disabled
622 13:03:58.239930 PCH-CRID Original Value = ff.ff.ff.ffff
623 13:03:58.243315 PCH-CRID New Value = ff.ff.ff.ffff
624 13:03:58.246606 OPROM - RST - RAID = ff.ff.ff.ffff
625 13:03:58.249866 ChipsetInit Base Version = ff.ff.ff.ffff
626 13:03:58.253397 ChipsetInit Oem Version = ff.ff.ff.ffff
627 13:03:58.256570 Display FSP Version Info HOB
628 13:03:58.263199 Reference Code - SA - System Agent = 9.0.1e.30
629 13:03:58.266438 Reference Code - MRC = 0.7.1.6c
630 13:03:58.266538 SA - PCIe Version = 9.0.1e.30
631 13:03:58.269655 SA-CRID Status = Disabled
632 13:03:58.273033 SA-CRID Original Value = 0.0.0.c
633 13:03:58.276496 SA-CRID New Value = 0.0.0.c
634 13:03:58.280224 OPROM - VBIOS = ff.ff.ff.ffff
635 13:03:58.283416 RTC Init
636 13:03:58.286616 Set power on after power failure.
637 13:03:58.286703 Disabling Deep S3
638 13:03:58.289915 Disabling Deep S3
639 13:03:58.290010 Disabling Deep S4
640 13:03:58.292968 Disabling Deep S4
641 13:03:58.293054 Disabling Deep S5
642 13:03:58.296430 Disabling Deep S5
643 13:03:58.302882 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
644 13:03:58.302970 Enumerating buses...
645 13:03:58.309626 Show all devs... Before device enumeration.
646 13:03:58.309733 Root Device: enabled 1
647 13:03:58.313280 CPU_CLUSTER: 0: enabled 1
648 13:03:58.316168 DOMAIN: 0000: enabled 1
649 13:03:58.319803 APIC: 00: enabled 1
650 13:03:58.319889 PCI: 00:00.0: enabled 1
651 13:03:58.323328 PCI: 00:02.0: enabled 1
652 13:03:58.326572 PCI: 00:04.0: enabled 0
653 13:03:58.329650 PCI: 00:05.0: enabled 0
654 13:03:58.329746 PCI: 00:12.0: enabled 1
655 13:03:58.332838 PCI: 00:12.5: enabled 0
656 13:03:58.336512 PCI: 00:12.6: enabled 0
657 13:03:58.336611 PCI: 00:14.0: enabled 1
658 13:03:58.339951 PCI: 00:14.1: enabled 0
659 13:03:58.342915 PCI: 00:14.3: enabled 1
660 13:03:58.346155 PCI: 00:14.5: enabled 0
661 13:03:58.346252 PCI: 00:15.0: enabled 1
662 13:03:58.349863 PCI: 00:15.1: enabled 1
663 13:03:58.353257 PCI: 00:15.2: enabled 0
664 13:03:58.356302 PCI: 00:15.3: enabled 0
665 13:03:58.356399 PCI: 00:16.0: enabled 1
666 13:03:58.359403 PCI: 00:16.1: enabled 0
667 13:03:58.363384 PCI: 00:16.2: enabled 0
668 13:03:58.365951 PCI: 00:16.3: enabled 0
669 13:03:58.366040 PCI: 00:16.4: enabled 0
670 13:03:58.369301 PCI: 00:16.5: enabled 0
671 13:03:58.372842 PCI: 00:17.0: enabled 1
672 13:03:58.372965 PCI: 00:19.0: enabled 1
673 13:03:58.376064 PCI: 00:19.1: enabled 0
674 13:03:58.379633 PCI: 00:19.2: enabled 0
675 13:03:58.382582 PCI: 00:1a.0: enabled 0
676 13:03:58.382709 PCI: 00:1c.0: enabled 0
677 13:03:58.386128 PCI: 00:1c.1: enabled 0
678 13:03:58.389386 PCI: 00:1c.2: enabled 0
679 13:03:58.392641 PCI: 00:1c.3: enabled 0
680 13:03:58.392717 PCI: 00:1c.4: enabled 0
681 13:03:58.396041 PCI: 00:1c.5: enabled 0
682 13:03:58.399230 PCI: 00:1c.6: enabled 0
683 13:03:58.402599 PCI: 00:1c.7: enabled 0
684 13:03:58.402680 PCI: 00:1d.0: enabled 1
685 13:03:58.405809 PCI: 00:1d.1: enabled 0
686 13:03:58.409172 PCI: 00:1d.2: enabled 0
687 13:03:58.409250 PCI: 00:1d.3: enabled 0
688 13:03:58.412487 PCI: 00:1d.4: enabled 0
689 13:03:58.415679 PCI: 00:1d.5: enabled 1
690 13:03:58.418980 PCI: 00:1e.0: enabled 1
691 13:03:58.419053 PCI: 00:1e.1: enabled 0
692 13:03:58.422464 PCI: 00:1e.2: enabled 1
693 13:03:58.425904 PCI: 00:1e.3: enabled 1
694 13:03:58.428917 PCI: 00:1f.0: enabled 1
695 13:03:58.429000 PCI: 00:1f.1: enabled 1
696 13:03:58.432370 PCI: 00:1f.2: enabled 1
697 13:03:58.435548 PCI: 00:1f.3: enabled 1
698 13:03:58.439070 PCI: 00:1f.4: enabled 1
699 13:03:58.439146 PCI: 00:1f.5: enabled 1
700 13:03:58.442209 PCI: 00:1f.6: enabled 0
701 13:03:58.445839 USB0 port 0: enabled 1
702 13:03:58.445917 I2C: 00:15: enabled 1
703 13:03:58.448940 I2C: 00:5d: enabled 1
704 13:03:58.452502 GENERIC: 0.0: enabled 1
705 13:03:58.455343 I2C: 00:1a: enabled 1
706 13:03:58.455421 I2C: 00:38: enabled 1
707 13:03:58.458815 I2C: 00:39: enabled 1
708 13:03:58.462446 I2C: 00:3a: enabled 1
709 13:03:58.462526 I2C: 00:3b: enabled 1
710 13:03:58.465383 PCI: 00:00.0: enabled 1
711 13:03:58.468700 SPI: 00: enabled 1
712 13:03:58.468771 SPI: 01: enabled 1
713 13:03:58.472298 PNP: 0c09.0: enabled 1
714 13:03:58.475137 USB2 port 0: enabled 1
715 13:03:58.475214 USB2 port 1: enabled 1
716 13:03:58.479146 USB2 port 2: enabled 0
717 13:03:58.482038 USB2 port 3: enabled 0
718 13:03:58.482114 USB2 port 5: enabled 0
719 13:03:58.485323 USB2 port 6: enabled 1
720 13:03:58.488545 USB2 port 9: enabled 1
721 13:03:58.488623 USB3 port 0: enabled 1
722 13:03:58.491951 USB3 port 1: enabled 1
723 13:03:58.495705 USB3 port 2: enabled 1
724 13:03:58.498574 USB3 port 3: enabled 1
725 13:03:58.498661 USB3 port 4: enabled 0
726 13:03:58.502003 APIC: 03: enabled 1
727 13:03:58.502084 APIC: 01: enabled 1
728 13:03:58.505545 APIC: 02: enabled 1
729 13:03:58.508549 APIC: 05: enabled 1
730 13:03:58.508625 APIC: 07: enabled 1
731 13:03:58.512036 APIC: 06: enabled 1
732 13:03:58.515303 APIC: 04: enabled 1
733 13:03:58.515378 Compare with tree...
734 13:03:58.518723 Root Device: enabled 1
735 13:03:58.522025 CPU_CLUSTER: 0: enabled 1
736 13:03:58.522099 APIC: 00: enabled 1
737 13:03:58.525102 APIC: 03: enabled 1
738 13:03:58.528531 APIC: 01: enabled 1
739 13:03:58.528654 APIC: 02: enabled 1
740 13:03:58.532062 APIC: 05: enabled 1
741 13:03:58.535371 APIC: 07: enabled 1
742 13:03:58.535449 APIC: 06: enabled 1
743 13:03:58.538530 APIC: 04: enabled 1
744 13:03:58.541900 DOMAIN: 0000: enabled 1
745 13:03:58.545143 PCI: 00:00.0: enabled 1
746 13:03:58.545243 PCI: 00:02.0: enabled 1
747 13:03:58.549177 PCI: 00:04.0: enabled 0
748 13:03:58.552132 PCI: 00:05.0: enabled 0
749 13:03:58.555144 PCI: 00:12.0: enabled 1
750 13:03:58.558366 PCI: 00:12.5: enabled 0
751 13:03:58.558489 PCI: 00:12.6: enabled 0
752 13:03:58.561986 PCI: 00:14.0: enabled 1
753 13:03:58.565108 USB0 port 0: enabled 1
754 13:03:58.568412 USB2 port 0: enabled 1
755 13:03:58.572145 USB2 port 1: enabled 1
756 13:03:58.572222 USB2 port 2: enabled 0
757 13:03:58.575152 USB2 port 3: enabled 0
758 13:03:58.578473 USB2 port 5: enabled 0
759 13:03:58.581586 USB2 port 6: enabled 1
760 13:03:58.584794 USB2 port 9: enabled 1
761 13:03:58.588525 USB3 port 0: enabled 1
762 13:03:58.588615 USB3 port 1: enabled 1
763 13:03:58.591591 USB3 port 2: enabled 1
764 13:03:58.594932 USB3 port 3: enabled 1
765 13:03:58.598331 USB3 port 4: enabled 0
766 13:03:58.601325 PCI: 00:14.1: enabled 0
767 13:03:58.601418 PCI: 00:14.3: enabled 1
768 13:03:58.604834 PCI: 00:14.5: enabled 0
769 13:03:58.608356 PCI: 00:15.0: enabled 1
770 13:03:58.611384 I2C: 00:15: enabled 1
771 13:03:58.615069 PCI: 00:15.1: enabled 1
772 13:03:58.615149 I2C: 00:5d: enabled 1
773 13:03:58.617954 GENERIC: 0.0: enabled 1
774 13:03:58.621603 PCI: 00:15.2: enabled 0
775 13:03:58.625046 PCI: 00:15.3: enabled 0
776 13:03:58.628083 PCI: 00:16.0: enabled 1
777 13:03:58.628180 PCI: 00:16.1: enabled 0
778 13:03:58.631719 PCI: 00:16.2: enabled 0
779 13:03:58.634982 PCI: 00:16.3: enabled 0
780 13:03:58.638163 PCI: 00:16.4: enabled 0
781 13:03:58.641399 PCI: 00:16.5: enabled 0
782 13:03:58.641485 PCI: 00:17.0: enabled 1
783 13:03:58.644541 PCI: 00:19.0: enabled 1
784 13:03:58.647884 I2C: 00:1a: enabled 1
785 13:03:58.651187 I2C: 00:38: enabled 1
786 13:03:58.651268 I2C: 00:39: enabled 1
787 13:03:58.654551 I2C: 00:3a: enabled 1
788 13:03:58.657901 I2C: 00:3b: enabled 1
789 13:03:58.661245 PCI: 00:19.1: enabled 0
790 13:03:58.664437 PCI: 00:19.2: enabled 0
791 13:03:58.664529 PCI: 00:1a.0: enabled 0
792 13:03:58.668288 PCI: 00:1c.0: enabled 0
793 13:03:58.671365 PCI: 00:1c.1: enabled 0
794 13:03:58.674998 PCI: 00:1c.2: enabled 0
795 13:03:58.675073 PCI: 00:1c.3: enabled 0
796 13:03:58.678008 PCI: 00:1c.4: enabled 0
797 13:03:58.681122 PCI: 00:1c.5: enabled 0
798 13:03:58.684739 PCI: 00:1c.6: enabled 0
799 13:03:58.687949 PCI: 00:1c.7: enabled 0
800 13:03:58.688030 PCI: 00:1d.0: enabled 1
801 13:03:58.691217 PCI: 00:1d.1: enabled 0
802 13:03:58.694448 PCI: 00:1d.2: enabled 0
803 13:03:58.697736 PCI: 00:1d.3: enabled 0
804 13:03:58.701277 PCI: 00:1d.4: enabled 0
805 13:03:58.701362 PCI: 00:1d.5: enabled 1
806 13:03:58.704426 PCI: 00:00.0: enabled 1
807 13:03:58.707989 PCI: 00:1e.0: enabled 1
808 13:03:58.710974 PCI: 00:1e.1: enabled 0
809 13:03:58.714482 PCI: 00:1e.2: enabled 1
810 13:03:58.714561 SPI: 00: enabled 1
811 13:03:58.717689 PCI: 00:1e.3: enabled 1
812 13:03:58.721473 SPI: 01: enabled 1
813 13:03:58.721553 PCI: 00:1f.0: enabled 1
814 13:03:58.724406 PNP: 0c09.0: enabled 1
815 13:03:58.727758 PCI: 00:1f.1: enabled 1
816 13:03:58.730966 PCI: 00:1f.2: enabled 1
817 13:03:58.734472 PCI: 00:1f.3: enabled 1
818 13:03:58.734592 PCI: 00:1f.4: enabled 1
819 13:03:58.737433 PCI: 00:1f.5: enabled 1
820 13:03:58.740973 PCI: 00:1f.6: enabled 0
821 13:03:58.744473 Root Device scanning...
822 13:03:58.747580 scan_static_bus for Root Device
823 13:03:58.751110 CPU_CLUSTER: 0 enabled
824 13:03:58.751213 DOMAIN: 0000 enabled
825 13:03:58.754110 DOMAIN: 0000 scanning...
826 13:03:58.757812 PCI: pci_scan_bus for bus 00
827 13:03:58.760753 PCI: 00:00.0 [8086/0000] ops
828 13:03:58.764167 PCI: 00:00.0 [8086/9b61] enabled
829 13:03:58.767571 PCI: 00:02.0 [8086/0000] bus ops
830 13:03:58.770918 PCI: 00:02.0 [8086/9b41] enabled
831 13:03:58.773982 PCI: 00:04.0 [8086/1903] disabled
832 13:03:58.777202 PCI: 00:08.0 [8086/1911] enabled
833 13:03:58.780470 PCI: 00:12.0 [8086/02f9] enabled
834 13:03:58.784055 PCI: 00:14.0 [8086/0000] bus ops
835 13:03:58.787547 PCI: 00:14.0 [8086/02ed] enabled
836 13:03:58.790695 PCI: 00:14.2 [8086/02ef] enabled
837 13:03:58.793941 PCI: 00:14.3 [8086/02f0] enabled
838 13:03:58.797586 PCI: 00:15.0 [8086/0000] bus ops
839 13:03:58.800564 PCI: 00:15.0 [8086/02e8] enabled
840 13:03:58.804024 PCI: 00:15.1 [8086/0000] bus ops
841 13:03:58.807319 PCI: 00:15.1 [8086/02e9] enabled
842 13:03:58.810418 PCI: 00:16.0 [8086/0000] ops
843 13:03:58.814111 PCI: 00:16.0 [8086/02e0] enabled
844 13:03:58.816848 PCI: 00:17.0 [8086/0000] ops
845 13:03:58.820252 PCI: 00:17.0 [8086/02d3] enabled
846 13:03:58.823685 PCI: 00:19.0 [8086/0000] bus ops
847 13:03:58.827378 PCI: 00:19.0 [8086/02c5] enabled
848 13:03:58.830474 PCI: 00:1d.0 [8086/0000] bus ops
849 13:03:58.833708 PCI: 00:1d.0 [8086/02b0] enabled
850 13:03:58.837226 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 13:03:58.840747 PCI: 00:1e.0 [8086/0000] ops
852 13:03:58.843604 PCI: 00:1e.0 [8086/02a8] enabled
853 13:03:58.846822 PCI: 00:1e.2 [8086/0000] bus ops
854 13:03:58.850322 PCI: 00:1e.2 [8086/02aa] enabled
855 13:03:58.853568 PCI: 00:1e.3 [8086/0000] bus ops
856 13:03:58.856827 PCI: 00:1e.3 [8086/02ab] enabled
857 13:03:58.860575 PCI: 00:1f.0 [8086/0000] bus ops
858 13:03:58.863377 PCI: 00:1f.0 [8086/0284] enabled
859 13:03:58.870562 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 13:03:58.876722 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 13:03:58.880170 PCI: 00:1f.3 [8086/0000] bus ops
862 13:03:58.883297 PCI: 00:1f.3 [8086/02c8] enabled
863 13:03:58.886596 PCI: 00:1f.4 [8086/0000] bus ops
864 13:03:58.890010 PCI: 00:1f.4 [8086/02a3] enabled
865 13:03:58.893657 PCI: 00:1f.5 [8086/0000] bus ops
866 13:03:58.896723 PCI: 00:1f.5 [8086/02a4] enabled
867 13:03:58.900142 PCI: Leftover static devices:
868 13:03:58.900219 PCI: 00:05.0
869 13:03:58.903579 PCI: 00:12.5
870 13:03:58.903654 PCI: 00:12.6
871 13:03:58.903720 PCI: 00:14.1
872 13:03:58.906759 PCI: 00:14.5
873 13:03:58.906834 PCI: 00:15.2
874 13:03:58.909797 PCI: 00:15.3
875 13:03:58.909872 PCI: 00:16.1
876 13:03:58.909950 PCI: 00:16.2
877 13:03:58.913392 PCI: 00:16.3
878 13:03:58.913469 PCI: 00:16.4
879 13:03:58.916317 PCI: 00:16.5
880 13:03:58.916396 PCI: 00:19.1
881 13:03:58.916462 PCI: 00:19.2
882 13:03:58.919767 PCI: 00:1a.0
883 13:03:58.919844 PCI: 00:1c.0
884 13:03:58.923239 PCI: 00:1c.1
885 13:03:58.923316 PCI: 00:1c.2
886 13:03:58.926635 PCI: 00:1c.3
887 13:03:58.926713 PCI: 00:1c.4
888 13:03:58.926784 PCI: 00:1c.5
889 13:03:58.929816 PCI: 00:1c.6
890 13:03:58.929904 PCI: 00:1c.7
891 13:03:58.933216 PCI: 00:1d.1
892 13:03:58.933296 PCI: 00:1d.2
893 13:03:58.933373 PCI: 00:1d.3
894 13:03:58.936564 PCI: 00:1d.4
895 13:03:58.936650 PCI: 00:1d.5
896 13:03:58.939892 PCI: 00:1e.1
897 13:03:58.939969 PCI: 00:1f.1
898 13:03:58.940034 PCI: 00:1f.2
899 13:03:58.943206 PCI: 00:1f.6
900 13:03:58.946372 PCI: Check your devicetree.cb.
901 13:03:58.949788 PCI: 00:02.0 scanning...
902 13:03:58.953137 scan_generic_bus for PCI: 00:02.0
903 13:03:58.956593 scan_generic_bus for PCI: 00:02.0 done
904 13:03:58.963252 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
905 13:03:58.963337 PCI: 00:14.0 scanning...
906 13:03:58.966447 scan_static_bus for PCI: 00:14.0
907 13:03:58.969666 USB0 port 0 enabled
908 13:03:58.972738 USB0 port 0 scanning...
909 13:03:58.976211 scan_static_bus for USB0 port 0
910 13:03:58.976291 USB2 port 0 enabled
911 13:03:58.979466 USB2 port 1 enabled
912 13:03:58.982940 USB2 port 2 disabled
913 13:03:58.983020 USB2 port 3 disabled
914 13:03:58.986499 USB2 port 5 disabled
915 13:03:58.989861 USB2 port 6 enabled
916 13:03:58.989950 USB2 port 9 enabled
917 13:03:58.992778 USB3 port 0 enabled
918 13:03:58.992858 USB3 port 1 enabled
919 13:03:58.996368 USB3 port 2 enabled
920 13:03:58.999537 USB3 port 3 enabled
921 13:03:58.999615 USB3 port 4 disabled
922 13:03:59.002920 USB2 port 0 scanning...
923 13:03:59.006223 scan_static_bus for USB2 port 0
924 13:03:59.009686 scan_static_bus for USB2 port 0 done
925 13:03:59.016335 scan_bus: scanning of bus USB2 port 0 took 9692 usecs
926 13:03:59.019431 USB2 port 1 scanning...
927 13:03:59.023083 scan_static_bus for USB2 port 1
928 13:03:59.025970 scan_static_bus for USB2 port 1 done
929 13:03:59.029367 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
930 13:03:59.032733 USB2 port 6 scanning...
931 13:03:59.036233 scan_static_bus for USB2 port 6
932 13:03:59.039280 scan_static_bus for USB2 port 6 done
933 13:03:59.045930 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
934 13:03:59.049288 USB2 port 9 scanning...
935 13:03:59.052350 scan_static_bus for USB2 port 9
936 13:03:59.055941 scan_static_bus for USB2 port 9 done
937 13:03:59.059555 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
938 13:03:59.062242 USB3 port 0 scanning...
939 13:03:59.065646 scan_static_bus for USB3 port 0
940 13:03:59.069042 scan_static_bus for USB3 port 0 done
941 13:03:59.075698 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
942 13:03:59.079039 USB3 port 1 scanning...
943 13:03:59.082167 scan_static_bus for USB3 port 1
944 13:03:59.085566 scan_static_bus for USB3 port 1 done
945 13:03:59.089018 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
946 13:03:59.092531 USB3 port 2 scanning...
947 13:03:59.095564 scan_static_bus for USB3 port 2
948 13:03:59.098832 scan_static_bus for USB3 port 2 done
949 13:03:59.105417 scan_bus: scanning of bus USB3 port 2 took 9709 usecs
950 13:03:59.108912 USB3 port 3 scanning...
951 13:03:59.112134 scan_static_bus for USB3 port 3
952 13:03:59.115686 scan_static_bus for USB3 port 3 done
953 13:03:59.122792 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
954 13:03:59.125225 scan_static_bus for USB0 port 0 done
955 13:03:59.128910 scan_bus: scanning of bus USB0 port 0 took 155396 usecs
956 13:03:59.132076 scan_static_bus for PCI: 00:14.0 done
957 13:03:59.138773 scan_bus: scanning of bus PCI: 00:14.0 took 173026 usecs
958 13:03:59.141672 PCI: 00:15.0 scanning...
959 13:03:59.145149 scan_generic_bus for PCI: 00:15.0
960 13:03:59.148554 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 13:03:59.151722 scan_generic_bus for PCI: 00:15.0 done
962 13:03:59.158625 scan_bus: scanning of bus PCI: 00:15.0 took 14312 usecs
963 13:03:59.161704 PCI: 00:15.1 scanning...
964 13:03:59.165699 scan_generic_bus for PCI: 00:15.1
965 13:03:59.168372 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 13:03:59.175161 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 13:03:59.178602 scan_generic_bus for PCI: 00:15.1 done
968 13:03:59.181645 scan_bus: scanning of bus PCI: 00:15.1 took 18614 usecs
969 13:03:59.185083 PCI: 00:19.0 scanning...
970 13:03:59.188678 scan_generic_bus for PCI: 00:19.0
971 13:03:59.191649 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 13:03:59.198492 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 13:03:59.202039 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 13:03:59.204787 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 13:03:59.208617 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 13:03:59.215070 scan_generic_bus for PCI: 00:19.0 done
977 13:03:59.218251 scan_bus: scanning of bus PCI: 00:19.0 took 30765 usecs
978 13:03:59.221400 PCI: 00:1d.0 scanning...
979 13:03:59.224944 do_pci_scan_bridge for PCI: 00:1d.0
980 13:03:59.228268 PCI: pci_scan_bus for bus 01
981 13:03:59.231727 PCI: 01:00.0 [1c5c/1327] enabled
982 13:03:59.234715 Enabling Common Clock Configuration
983 13:03:59.241242 L1 Sub-State supported from root port 29
984 13:03:59.241323 L1 Sub-State Support = 0xf
985 13:03:59.244827 CommonModeRestoreTime = 0x28
986 13:03:59.251338 Power On Value = 0x16, Power On Scale = 0x0
987 13:03:59.251425 ASPM: Enabled L1
988 13:03:59.258077 scan_bus: scanning of bus PCI: 00:1d.0 took 32802 usecs
989 13:03:59.261704 PCI: 00:1e.2 scanning...
990 13:03:59.264602 scan_generic_bus for PCI: 00:1e.2
991 13:03:59.267953 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 13:03:59.271358 scan_generic_bus for PCI: 00:1e.2 done
993 13:03:59.277857 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
994 13:03:59.277939 PCI: 00:1e.3 scanning...
995 13:03:59.284741 scan_generic_bus for PCI: 00:1e.3
996 13:03:59.287982 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 13:03:59.291095 scan_generic_bus for PCI: 00:1e.3 done
998 13:03:59.298158 scan_bus: scanning of bus PCI: 00:1e.3 took 14016 usecs
999 13:03:59.298247 PCI: 00:1f.0 scanning...
1000 13:03:59.301291 scan_static_bus for PCI: 00:1f.0
1001 13:03:59.304485 PNP: 0c09.0 enabled
1002 13:03:59.308051 scan_static_bus for PCI: 00:1f.0 done
1003 13:03:59.314336 scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs
1004 13:03:59.317884 PCI: 00:1f.3 scanning...
1005 13:03:59.321040 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1006 13:03:59.324355 PCI: 00:1f.4 scanning...
1007 13:03:59.327566 scan_generic_bus for PCI: 00:1f.4
1008 13:03:59.330837 scan_generic_bus for PCI: 00:1f.4 done
1009 13:03:59.337412 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1010 13:03:59.340815 PCI: 00:1f.5 scanning...
1011 13:03:59.344162 scan_generic_bus for PCI: 00:1f.5
1012 13:03:59.347439 scan_generic_bus for PCI: 00:1f.5 done
1013 13:03:59.354280 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1014 13:03:59.360892 scan_bus: scanning of bus DOMAIN: 0000 took 605203 usecs
1015 13:03:59.364271 scan_static_bus for Root Device done
1016 13:03:59.367790 scan_bus: scanning of bus Root Device took 625096 usecs
1017 13:03:59.370951 done
1018 13:03:59.371037 Chrome EC: UHEPI supported
1019 13:03:59.377662 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 13:03:59.384445 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 13:03:59.390760 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 13:03:59.397481 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 13:03:59.400666 SPI flash protection: WPSW=0 SRP0=0
1024 13:03:59.407609 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 13:03:59.410799 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 13:03:59.413669 found VGA at PCI: 00:02.0
1027 13:03:59.417053 Setting up VGA for PCI: 00:02.0
1028 13:03:59.423673 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 13:03:59.426895 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 13:03:59.430455 Allocating resources...
1031 13:03:59.433653 Reading resources...
1032 13:03:59.437299 Root Device read_resources bus 0 link: 0
1033 13:03:59.440573 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 13:03:59.446955 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 13:03:59.450317 DOMAIN: 0000 read_resources bus 0 link: 0
1036 13:03:59.457354 PCI: 00:14.0 read_resources bus 0 link: 0
1037 13:03:59.460467 USB0 port 0 read_resources bus 0 link: 0
1038 13:03:59.468599 USB0 port 0 read_resources bus 0 link: 0 done
1039 13:03:59.471897 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 13:03:59.479313 PCI: 00:15.0 read_resources bus 1 link: 0
1041 13:03:59.483043 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 13:03:59.489282 PCI: 00:15.1 read_resources bus 2 link: 0
1043 13:03:59.492838 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 13:03:59.500342 PCI: 00:19.0 read_resources bus 3 link: 0
1045 13:03:59.506475 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 13:03:59.510072 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 13:03:59.516472 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 13:03:59.519973 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 13:03:59.526502 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 13:03:59.529879 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 13:03:59.536326 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 13:03:59.539968 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 13:03:59.546189 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 13:03:59.552992 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 13:03:59.556336 Root Device read_resources bus 0 link: 0 done
1056 13:03:59.559734 Done reading resources.
1057 13:03:59.566495 Show resources in subtree (Root Device)...After reading.
1058 13:03:59.569507 Root Device child on link 0 CPU_CLUSTER: 0
1059 13:03:59.573156 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 13:03:59.573244 APIC: 00
1061 13:03:59.576363 APIC: 03
1062 13:03:59.576450 APIC: 01
1063 13:03:59.579754 APIC: 02
1064 13:03:59.579841 APIC: 05
1065 13:03:59.579910 APIC: 07
1066 13:03:59.583051 APIC: 06
1067 13:03:59.583144 APIC: 04
1068 13:03:59.586479 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 13:03:59.596374 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 13:03:59.605961 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 13:03:59.655824 PCI: 00:00.0
1072 13:03:59.656188 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 13:03:59.656454 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 13:03:59.656960 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 13:03:59.657216 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 13:03:59.657590 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 13:03:59.705765 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 13:03:59.706066 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 13:03:59.706332 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 13:03:59.706968 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 13:03:59.707645 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 13:03:59.755391 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 13:03:59.756218 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 13:03:59.756520 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 13:03:59.757692 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 13:03:59.757996 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 13:03:59.762221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 13:03:59.762305 PCI: 00:02.0
1089 13:03:59.768257 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 13:03:59.781790 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 13:03:59.788209 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 13:03:59.791485 PCI: 00:04.0
1093 13:03:59.791567 PCI: 00:08.0
1094 13:03:59.801957 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 13:03:59.804945 PCI: 00:12.0
1096 13:03:59.815246 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 13:03:59.818274 PCI: 00:14.0 child on link 0 USB0 port 0
1098 13:03:59.828756 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 13:03:59.831529 USB0 port 0 child on link 0 USB2 port 0
1100 13:03:59.834737 USB2 port 0
1101 13:03:59.834828 USB2 port 1
1102 13:03:59.838130 USB2 port 2
1103 13:03:59.838231 USB2 port 3
1104 13:03:59.841304 USB2 port 5
1105 13:03:59.844461 USB2 port 6
1106 13:03:59.844562 USB2 port 9
1107 13:03:59.848313 USB3 port 0
1108 13:03:59.848399 USB3 port 1
1109 13:03:59.851422 USB3 port 2
1110 13:03:59.851501 USB3 port 3
1111 13:03:59.854999 USB3 port 4
1112 13:03:59.855076 PCI: 00:14.2
1113 13:03:59.864419 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 13:03:59.874482 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 13:03:59.877646 PCI: 00:14.3
1116 13:03:59.887790 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 13:03:59.891255 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 13:03:59.900981 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 13:03:59.901070 I2C: 01:15
1120 13:03:59.907675 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 13:03:59.917368 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 13:03:59.917458 I2C: 02:5d
1123 13:03:59.920923 GENERIC: 0.0
1124 13:03:59.921012 PCI: 00:16.0
1125 13:03:59.930936 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 13:03:59.934026 PCI: 00:17.0
1127 13:03:59.940681 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 13:03:59.950732 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 13:03:59.960505 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 13:03:59.967418 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 13:03:59.977015 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 13:03:59.983616 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 13:03:59.990606 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 13:04:00.000454 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 13:04:00.000543 I2C: 03:1a
1136 13:04:00.003825 I2C: 03:38
1137 13:04:00.003913 I2C: 03:39
1138 13:04:00.006968 I2C: 03:3a
1139 13:04:00.007055 I2C: 03:3b
1140 13:04:00.010292 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 13:04:00.020129 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 13:04:00.030509 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 13:04:00.040214 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 13:04:00.040300 PCI: 01:00.0
1145 13:04:00.050395 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 13:04:00.053532 PCI: 00:1e.0
1147 13:04:00.063666 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 13:04:00.073151 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 13:04:00.076883 PCI: 00:1e.2 child on link 0 SPI: 00
1150 13:04:00.087150 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 13:04:00.090164 SPI: 00
1152 13:04:00.093553 PCI: 00:1e.3 child on link 0 SPI: 01
1153 13:04:00.103051 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 13:04:00.103139 SPI: 01
1155 13:04:00.110002 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 13:04:00.116483 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 13:04:00.126354 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 13:04:00.126455 PNP: 0c09.0
1159 13:04:00.135982 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 13:04:00.139753 PCI: 00:1f.3
1161 13:04:00.149423 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 13:04:00.159303 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 13:04:00.159435 PCI: 00:1f.4
1164 13:04:00.169543 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 13:04:00.179356 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 13:04:00.179444 PCI: 00:1f.5
1167 13:04:00.189602 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 13:04:00.195592 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 13:04:00.202269 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 13:04:00.208804 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 13:04:00.212235 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 13:04:00.215491 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 13:04:00.218862 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 13:04:00.222114 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 13:04:00.229158 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 13:04:00.235521 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 13:04:00.245408 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 13:04:00.252349 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 13:04:00.258621 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 13:04:00.262452 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 13:04:00.272074 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 13:04:00.275237 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 13:04:00.281897 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 13:04:00.285077 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 13:04:00.291803 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 13:04:00.294997 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 13:04:00.301693 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 13:04:00.305483 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 13:04:00.311613 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 13:04:00.314853 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 13:04:00.318146 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 13:04:00.324976 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 13:04:00.328023 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 13:04:00.334920 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 13:04:00.338284 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 13:04:00.344857 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 13:04:00.348326 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 13:04:00.354788 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 13:04:00.358229 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 13:04:00.364730 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 13:04:00.368172 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 13:04:00.374623 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 13:04:00.377933 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 13:04:00.384703 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 13:04:00.391166 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 13:04:00.394449 avoid_fixed_resources: DOMAIN: 0000
1207 13:04:00.401114 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 13:04:00.407719 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 13:04:00.414416 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 13:04:00.421022 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 13:04:00.431003 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 13:04:00.437639 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 13:04:00.444459 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 13:04:00.454451 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 13:04:00.460761 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 13:04:00.467487 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 13:04:00.473888 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 13:04:00.483919 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 13:04:00.484006 Setting resources...
1220 13:04:00.490569 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 13:04:00.494119 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 13:04:00.500717 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 13:04:00.503987 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 13:04:00.507496 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 13:04:00.513638 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 13:04:00.520288 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 13:04:00.527029 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 13:04:00.533633 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 13:04:00.540289 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 13:04:00.543970 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 13:04:00.546891 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 13:04:00.553666 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 13:04:00.557163 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 13:04:00.563420 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 13:04:00.566664 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 13:04:00.573160 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 13:04:00.577204 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 13:04:00.583471 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 13:04:00.586798 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 13:04:00.593342 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 13:04:00.596597 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 13:04:00.602962 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 13:04:00.606280 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 13:04:00.612992 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 13:04:00.616660 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 13:04:00.622870 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 13:04:00.626145 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 13:04:00.629756 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 13:04:00.636354 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 13:04:00.639469 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 13:04:00.646457 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 13:04:00.652764 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 13:04:00.659489 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 13:04:00.669251 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 13:04:00.675894 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 13:04:00.679372 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 13:04:00.689480 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 13:04:00.692747 Root Device assign_resources, bus 0 link: 0
1259 13:04:00.695650 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 13:04:00.706073 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 13:04:00.712599 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 13:04:00.722435 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 13:04:00.729053 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 13:04:00.739156 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 13:04:00.745850 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 13:04:00.752435 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 13:04:00.755972 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 13:04:00.765466 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 13:04:00.772274 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 13:04:00.778527 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 13:04:00.788979 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 13:04:00.792070 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 13:04:00.798688 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 13:04:00.805393 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 13:04:00.812220 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 13:04:00.815918 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 13:04:00.822068 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 13:04:00.832543 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 13:04:00.839230 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 13:04:00.845686 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 13:04:00.855533 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 13:04:00.861918 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 13:04:00.868539 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 13:04:00.878809 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 13:04:00.882478 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 13:04:00.888959 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 13:04:00.895263 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 13:04:00.905354 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 13:04:00.914900 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 13:04:00.918580 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 13:04:00.925125 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 13:04:00.931937 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 13:04:00.938696 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 13:04:00.948620 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 13:04:00.951871 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 13:04:00.958527 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 13:04:00.965111 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 13:04:00.971395 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 13:04:00.974409 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 13:04:00.977839 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 13:04:00.985333 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 13:04:00.988664 LPC: Trying to open IO window from 800 size 1ff
1303 13:04:00.998202 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 13:04:01.005002 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 13:04:01.014624 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 13:04:01.021408 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 13:04:01.028034 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 13:04:01.031156 Root Device assign_resources, bus 0 link: 0
1309 13:04:01.034455 Done setting resources.
1310 13:04:01.041144 Show resources in subtree (Root Device)...After assigning values.
1311 13:04:01.044250 Root Device child on link 0 CPU_CLUSTER: 0
1312 13:04:01.047665 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 13:04:01.051048 APIC: 00
1314 13:04:01.051129 APIC: 03
1315 13:04:01.054349 APIC: 01
1316 13:04:01.054427 APIC: 02
1317 13:04:01.054497 APIC: 05
1318 13:04:01.057743 APIC: 07
1319 13:04:01.057818 APIC: 06
1320 13:04:01.057890 APIC: 04
1321 13:04:01.064058 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 13:04:01.073959 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 13:04:01.084153 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 13:04:01.087298 PCI: 00:00.0
1325 13:04:01.096973 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 13:04:01.103948 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 13:04:01.113894 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 13:04:01.123397 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 13:04:01.133203 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 13:04:01.143219 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 13:04:01.153294 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 13:04:01.159751 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 13:04:01.169747 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 13:04:01.179598 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 13:04:01.189449 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 13:04:01.199367 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 13:04:01.209453 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 13:04:01.219211 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 13:04:01.226003 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 13:04:01.235715 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 13:04:01.239123 PCI: 00:02.0
1342 13:04:01.249012 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 13:04:01.258748 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 13:04:01.269112 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 13:04:01.269196 PCI: 00:04.0
1346 13:04:01.272536 PCI: 00:08.0
1347 13:04:01.282224 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 13:04:01.282309 PCI: 00:12.0
1349 13:04:01.295150 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 13:04:01.298849 PCI: 00:14.0 child on link 0 USB0 port 0
1351 13:04:01.308466 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 13:04:01.311624 USB0 port 0 child on link 0 USB2 port 0
1353 13:04:01.315065 USB2 port 0
1354 13:04:01.315148 USB2 port 1
1355 13:04:01.318414 USB2 port 2
1356 13:04:01.318495 USB2 port 3
1357 13:04:01.321564 USB2 port 5
1358 13:04:01.321642 USB2 port 6
1359 13:04:01.324977 USB2 port 9
1360 13:04:01.328860 USB3 port 0
1361 13:04:01.328948 USB3 port 1
1362 13:04:01.331776 USB3 port 2
1363 13:04:01.331865 USB3 port 3
1364 13:04:01.334905 USB3 port 4
1365 13:04:01.334992 PCI: 00:14.2
1366 13:04:01.344938 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 13:04:01.354718 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 13:04:01.358323 PCI: 00:14.3
1369 13:04:01.368097 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 13:04:01.371419 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 13:04:01.381466 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 13:04:01.384438 I2C: 01:15
1373 13:04:01.387984 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 13:04:01.398046 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 13:04:01.401183 I2C: 02:5d
1376 13:04:01.401269 GENERIC: 0.0
1377 13:04:01.404645 PCI: 00:16.0
1378 13:04:01.414517 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 13:04:01.414604 PCI: 00:17.0
1380 13:04:01.427688 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 13:04:01.437591 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 13:04:01.444439 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 13:04:01.453750 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 13:04:01.463681 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 13:04:01.473622 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 13:04:01.477349 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 13:04:01.486871 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 13:04:01.490760 I2C: 03:1a
1389 13:04:01.490846 I2C: 03:38
1390 13:04:01.493494 I2C: 03:39
1391 13:04:01.493580 I2C: 03:3a
1392 13:04:01.496759 I2C: 03:3b
1393 13:04:01.500292 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 13:04:01.510161 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 13:04:01.520009 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 13:04:01.529745 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 13:04:01.533243 PCI: 01:00.0
1398 13:04:01.543175 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 13:04:01.543263 PCI: 00:1e.0
1400 13:04:01.556264 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 13:04:01.566447 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 13:04:01.569337 PCI: 00:1e.2 child on link 0 SPI: 00
1403 13:04:01.579158 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 13:04:01.579246 SPI: 00
1405 13:04:01.585668 PCI: 00:1e.3 child on link 0 SPI: 01
1406 13:04:01.595732 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 13:04:01.595819 SPI: 01
1408 13:04:01.602416 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 13:04:01.609222 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 13:04:01.619083 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 13:04:01.619172 PNP: 0c09.0
1412 13:04:01.628777 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 13:04:01.628864 PCI: 00:1f.3
1414 13:04:01.642220 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 13:04:01.652270 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 13:04:01.652358 PCI: 00:1f.4
1417 13:04:01.662023 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 13:04:01.671812 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 13:04:01.675034 PCI: 00:1f.5
1420 13:04:01.685121 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 13:04:01.688414 Done allocating resources.
1422 13:04:01.691895 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 13:04:01.694937 Enabling resources...
1424 13:04:01.698436 PCI: 00:00.0 subsystem <- 8086/9b61
1425 13:04:01.701451 PCI: 00:00.0 cmd <- 06
1426 13:04:01.705441 PCI: 00:02.0 subsystem <- 8086/9b41
1427 13:04:01.708159 PCI: 00:02.0 cmd <- 03
1428 13:04:01.711444 PCI: 00:08.0 cmd <- 06
1429 13:04:01.714987 PCI: 00:12.0 subsystem <- 8086/02f9
1430 13:04:01.718441 PCI: 00:12.0 cmd <- 02
1431 13:04:01.721534 PCI: 00:14.0 subsystem <- 8086/02ed
1432 13:04:01.724894 PCI: 00:14.0 cmd <- 02
1433 13:04:01.724981 PCI: 00:14.2 cmd <- 02
1434 13:04:01.731321 PCI: 00:14.3 subsystem <- 8086/02f0
1435 13:04:01.731408 PCI: 00:14.3 cmd <- 02
1436 13:04:01.734832 PCI: 00:15.0 subsystem <- 8086/02e8
1437 13:04:01.737890 PCI: 00:15.0 cmd <- 02
1438 13:04:01.741254 PCI: 00:15.1 subsystem <- 8086/02e9
1439 13:04:01.744614 PCI: 00:15.1 cmd <- 02
1440 13:04:01.747925 PCI: 00:16.0 subsystem <- 8086/02e0
1441 13:04:01.751008 PCI: 00:16.0 cmd <- 02
1442 13:04:01.754414 PCI: 00:17.0 subsystem <- 8086/02d3
1443 13:04:01.757891 PCI: 00:17.0 cmd <- 03
1444 13:04:01.761024 PCI: 00:19.0 subsystem <- 8086/02c5
1445 13:04:01.764957 PCI: 00:19.0 cmd <- 02
1446 13:04:01.767739 PCI: 00:1d.0 bridge ctrl <- 0013
1447 13:04:01.771408 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 13:04:01.774270 PCI: 00:1d.0 cmd <- 06
1449 13:04:01.777630 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 13:04:01.781112 PCI: 00:1e.0 cmd <- 06
1451 13:04:01.784437 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 13:04:01.784523 PCI: 00:1e.2 cmd <- 06
1453 13:04:01.790829 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 13:04:01.790920 PCI: 00:1e.3 cmd <- 02
1455 13:04:01.794184 PCI: 00:1f.0 subsystem <- 8086/0284
1456 13:04:01.797621 PCI: 00:1f.0 cmd <- 407
1457 13:04:01.800939 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 13:04:01.804264 PCI: 00:1f.3 cmd <- 02
1459 13:04:01.807161 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 13:04:01.810661 PCI: 00:1f.4 cmd <- 03
1461 13:04:01.814152 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 13:04:01.817043 PCI: 00:1f.5 cmd <- 406
1463 13:04:01.825781 PCI: 01:00.0 cmd <- 02
1464 13:04:01.831199 done.
1465 13:04:01.839643 ME: Version: 14.0.39.1367
1466 13:04:01.846109 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1467 13:04:01.849382 Initializing devices...
1468 13:04:01.849468 Root Device init ...
1469 13:04:01.856020 Chrome EC: Set SMI mask to 0x0000000000000000
1470 13:04:01.859194 Chrome EC: clear events_b mask to 0x0000000000000000
1471 13:04:01.865982 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 13:04:01.872682 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 13:04:01.879019 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 13:04:01.882323 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 13:04:01.886051 Root Device init finished in 35166 usecs
1476 13:04:01.889147 CPU_CLUSTER: 0 init ...
1477 13:04:01.895888 CPU_CLUSTER: 0 init finished in 2446 usecs
1478 13:04:01.900162 PCI: 00:00.0 init ...
1479 13:04:01.903677 CPU TDP: 15 Watts
1480 13:04:01.906528 CPU PL2 = 64 Watts
1481 13:04:01.909969 PCI: 00:00.0 init finished in 7076 usecs
1482 13:04:01.913324 PCI: 00:02.0 init ...
1483 13:04:01.916755 PCI: 00:02.0 init finished in 2253 usecs
1484 13:04:01.920037 PCI: 00:08.0 init ...
1485 13:04:01.923571 PCI: 00:08.0 init finished in 2252 usecs
1486 13:04:01.926517 PCI: 00:12.0 init ...
1487 13:04:01.929896 PCI: 00:12.0 init finished in 2243 usecs
1488 13:04:01.933238 PCI: 00:14.0 init ...
1489 13:04:01.936645 PCI: 00:14.0 init finished in 2252 usecs
1490 13:04:01.939917 PCI: 00:14.2 init ...
1491 13:04:01.943213 PCI: 00:14.2 init finished in 2251 usecs
1492 13:04:01.946652 PCI: 00:14.3 init ...
1493 13:04:01.949696 PCI: 00:14.3 init finished in 2269 usecs
1494 13:04:01.953462 PCI: 00:15.0 init ...
1495 13:04:01.956482 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 13:04:01.959722 PCI: 00:15.0 init finished in 5976 usecs
1497 13:04:01.962933 PCI: 00:15.1 init ...
1498 13:04:01.966367 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 13:04:01.969433 PCI: 00:15.1 init finished in 5976 usecs
1500 13:04:01.973454 PCI: 00:16.0 init ...
1501 13:04:01.976623 PCI: 00:16.0 init finished in 2251 usecs
1502 13:04:01.980753 PCI: 00:19.0 init ...
1503 13:04:01.983692 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 13:04:01.990269 PCI: 00:19.0 init finished in 5975 usecs
1505 13:04:01.990356 PCI: 00:1d.0 init ...
1506 13:04:01.993480 Initializing PCH PCIe bridge.
1507 13:04:02.000263 PCI: 00:1d.0 init finished in 5285 usecs
1508 13:04:02.003307 PCI: 00:1f.0 init ...
1509 13:04:02.006869 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 13:04:02.010060 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 13:04:02.013190 IOAPIC: ID = 0x02
1512 13:04:02.016622 IOAPIC: Dumping registers
1513 13:04:02.020010 reg 0x0000: 0x02000000
1514 13:04:02.020096 reg 0x0001: 0x00770020
1515 13:04:02.022934 reg 0x0002: 0x00000000
1516 13:04:02.026190 PCI: 00:1f.0 init finished in 23556 usecs
1517 13:04:02.030727 PCI: 00:1f.4 init ...
1518 13:04:02.033681 PCI: 00:1f.4 init finished in 2262 usecs
1519 13:04:02.046173 PCI: 01:00.0 init ...
1520 13:04:02.049389 PCI: 01:00.0 init finished in 2244 usecs
1521 13:04:02.053937 PNP: 0c09.0 init ...
1522 13:04:02.056914 Google Chrome EC uptime: 11.082 seconds
1523 13:04:02.063759 Google Chrome AP resets since EC boot: 0
1524 13:04:02.067363 Google Chrome most recent AP reset causes:
1525 13:04:02.073863 Google Chrome EC reset flags at last EC boot: reset-pin
1526 13:04:02.077085 PNP: 0c09.0 init finished in 20573 usecs
1527 13:04:02.080459 Devices initialized
1528 13:04:02.080544 Show all devs... After init.
1529 13:04:02.083533 Root Device: enabled 1
1530 13:04:02.086977 CPU_CLUSTER: 0: enabled 1
1531 13:04:02.090431 DOMAIN: 0000: enabled 1
1532 13:04:02.090516 APIC: 00: enabled 1
1533 13:04:02.093631 PCI: 00:00.0: enabled 1
1534 13:04:02.096621 PCI: 00:02.0: enabled 1
1535 13:04:02.100358 PCI: 00:04.0: enabled 0
1536 13:04:02.100444 PCI: 00:05.0: enabled 0
1537 13:04:02.103214 PCI: 00:12.0: enabled 1
1538 13:04:02.106798 PCI: 00:12.5: enabled 0
1539 13:04:02.106884 PCI: 00:12.6: enabled 0
1540 13:04:02.110784 PCI: 00:14.0: enabled 1
1541 13:04:02.113215 PCI: 00:14.1: enabled 0
1542 13:04:02.116719 PCI: 00:14.3: enabled 1
1543 13:04:02.116805 PCI: 00:14.5: enabled 0
1544 13:04:02.119741 PCI: 00:15.0: enabled 1
1545 13:04:02.123442 PCI: 00:15.1: enabled 1
1546 13:04:02.126521 PCI: 00:15.2: enabled 0
1547 13:04:02.126607 PCI: 00:15.3: enabled 0
1548 13:04:02.130135 PCI: 00:16.0: enabled 1
1549 13:04:02.133157 PCI: 00:16.1: enabled 0
1550 13:04:02.136486 PCI: 00:16.2: enabled 0
1551 13:04:02.136572 PCI: 00:16.3: enabled 0
1552 13:04:02.139683 PCI: 00:16.4: enabled 0
1553 13:04:02.143099 PCI: 00:16.5: enabled 0
1554 13:04:02.146450 PCI: 00:17.0: enabled 1
1555 13:04:02.146536 PCI: 00:19.0: enabled 1
1556 13:04:02.149628 PCI: 00:19.1: enabled 0
1557 13:04:02.153088 PCI: 00:19.2: enabled 0
1558 13:04:02.153174 PCI: 00:1a.0: enabled 0
1559 13:04:02.156145 PCI: 00:1c.0: enabled 0
1560 13:04:02.159475 PCI: 00:1c.1: enabled 0
1561 13:04:02.163140 PCI: 00:1c.2: enabled 0
1562 13:04:02.163226 PCI: 00:1c.3: enabled 0
1563 13:04:02.166164 PCI: 00:1c.4: enabled 0
1564 13:04:02.169692 PCI: 00:1c.5: enabled 0
1565 13:04:02.172984 PCI: 00:1c.6: enabled 0
1566 13:04:02.173071 PCI: 00:1c.7: enabled 0
1567 13:04:02.176184 PCI: 00:1d.0: enabled 1
1568 13:04:02.179300 PCI: 00:1d.1: enabled 0
1569 13:04:02.182731 PCI: 00:1d.2: enabled 0
1570 13:04:02.182817 PCI: 00:1d.3: enabled 0
1571 13:04:02.186111 PCI: 00:1d.4: enabled 0
1572 13:04:02.189458 PCI: 00:1d.5: enabled 0
1573 13:04:02.192484 PCI: 00:1e.0: enabled 1
1574 13:04:02.192570 PCI: 00:1e.1: enabled 0
1575 13:04:02.196062 PCI: 00:1e.2: enabled 1
1576 13:04:02.199583 PCI: 00:1e.3: enabled 1
1577 13:04:02.199669 PCI: 00:1f.0: enabled 1
1578 13:04:02.202643 PCI: 00:1f.1: enabled 0
1579 13:04:02.205951 PCI: 00:1f.2: enabled 0
1580 13:04:02.209125 PCI: 00:1f.3: enabled 1
1581 13:04:02.209210 PCI: 00:1f.4: enabled 1
1582 13:04:02.212652 PCI: 00:1f.5: enabled 1
1583 13:04:02.216112 PCI: 00:1f.6: enabled 0
1584 13:04:02.219174 USB0 port 0: enabled 1
1585 13:04:02.219259 I2C: 01:15: enabled 1
1586 13:04:02.222459 I2C: 02:5d: enabled 1
1587 13:04:02.225583 GENERIC: 0.0: enabled 1
1588 13:04:02.225669 I2C: 03:1a: enabled 1
1589 13:04:02.229071 I2C: 03:38: enabled 1
1590 13:04:02.232327 I2C: 03:39: enabled 1
1591 13:04:02.232414 I2C: 03:3a: enabled 1
1592 13:04:02.235480 I2C: 03:3b: enabled 1
1593 13:04:02.238910 PCI: 00:00.0: enabled 1
1594 13:04:02.238996 SPI: 00: enabled 1
1595 13:04:02.242431 SPI: 01: enabled 1
1596 13:04:02.245773 PNP: 0c09.0: enabled 1
1597 13:04:02.245859 USB2 port 0: enabled 1
1598 13:04:02.249117 USB2 port 1: enabled 1
1599 13:04:02.252313 USB2 port 2: enabled 0
1600 13:04:02.252399 USB2 port 3: enabled 0
1601 13:04:02.255560 USB2 port 5: enabled 0
1602 13:04:02.258801 USB2 port 6: enabled 1
1603 13:04:02.261915 USB2 port 9: enabled 1
1604 13:04:02.262001 USB3 port 0: enabled 1
1605 13:04:02.265396 USB3 port 1: enabled 1
1606 13:04:02.268481 USB3 port 2: enabled 1
1607 13:04:02.268567 USB3 port 3: enabled 1
1608 13:04:02.271807 USB3 port 4: enabled 0
1609 13:04:02.275368 APIC: 03: enabled 1
1610 13:04:02.275454 APIC: 01: enabled 1
1611 13:04:02.278668 APIC: 02: enabled 1
1612 13:04:02.281790 APIC: 05: enabled 1
1613 13:04:02.281876 APIC: 07: enabled 1
1614 13:04:02.285517 APIC: 06: enabled 1
1615 13:04:02.285603 APIC: 04: enabled 1
1616 13:04:02.288297 PCI: 00:08.0: enabled 1
1617 13:04:02.292023 PCI: 00:14.2: enabled 1
1618 13:04:02.295284 PCI: 01:00.0: enabled 1
1619 13:04:02.298809 Disabling ACPI via APMC:
1620 13:04:02.298896 done.
1621 13:04:02.305410 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 13:04:02.308653 ELOG: NV offset 0xaf0000 size 0x4000
1623 13:04:02.315120 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 13:04:02.322064 ELOG: Event(17) added with size 13 at 2022-08-31 13:03:49 UTC
1625 13:04:02.328627 ELOG: Event(92) added with size 9 at 2022-08-31 13:03:49 UTC
1626 13:04:02.335299 ELOG: Event(93) added with size 9 at 2022-08-31 13:03:49 UTC
1627 13:04:02.341695 ELOG: Event(9A) added with size 9 at 2022-08-31 13:03:49 UTC
1628 13:04:02.348682 ELOG: Event(16) added with size 11 at 2022-08-31 13:03:49 UTC
1629 13:04:02.351820 Erasing flash addr af0000 + 4 KiB
1630 13:04:02.422943 ELOG: Event(9E) added with size 10 at 2022-08-31 13:03:49 UTC
1631 13:04:02.429408 ELOG: Event(9F) added with size 14 at 2022-08-31 13:03:49 UTC
1632 13:04:02.435933 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 62
1633 13:04:02.442441 ELOG: Event(A1) added with size 10 at 2022-08-31 13:03:49 UTC
1634 13:04:02.449318 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 13:04:02.455621 ELOG: Event(A0) added with size 9 at 2022-08-31 13:03:49 UTC
1636 13:04:02.462241 elog_add_boot_reason: Logged dev mode boot
1637 13:04:02.462328 Finalize devices...
1638 13:04:02.465733 PCI: 00:17.0 final
1639 13:04:02.465846 Devices finalized
1640 13:04:02.472148 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 13:04:02.475601 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 13:04:02.482208 ME: HFSTS1 : 0x90000245
1643 13:04:02.485527 ME: HFSTS2 : 0x3B850126
1644 13:04:02.488898 ME: HFSTS3 : 0x00000020
1645 13:04:02.492059 ME: HFSTS4 : 0x00004800
1646 13:04:02.498753 ME: HFSTS5 : 0x00000000
1647 13:04:02.501746 ME: HFSTS6 : 0x40400006
1648 13:04:02.505076 ME: Manufacturing Mode : NO
1649 13:04:02.508341 ME: FW Partition Table : OK
1650 13:04:02.511871 ME: Bringup Loader Failure : NO
1651 13:04:02.515283 ME: Firmware Init Complete : YES
1652 13:04:02.518425 ME: Boot Options Present : NO
1653 13:04:02.521767 ME: Update In Progress : NO
1654 13:04:02.525460 ME: D0i3 Support : YES
1655 13:04:02.528417 ME: Low Power State Enabled : NO
1656 13:04:02.531775 ME: CPU Replaced : NO
1657 13:04:02.534854 ME: CPU Replacement Valid : YES
1658 13:04:02.538143 ME: Current Working State : 5
1659 13:04:02.541748 ME: Current Operation State : 1
1660 13:04:02.545319 ME: Current Operation Mode : 0
1661 13:04:02.548511 ME: Error Code : 0
1662 13:04:02.551564 ME: CPU Debug Disabled : YES
1663 13:04:02.554717 ME: TXT Support : NO
1664 13:04:02.561851 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 13:04:02.564686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 13:04:02.567973 CBFS @ c08000 size 3f8000
1667 13:04:02.574466 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 13:04:02.577867 CBFS: Locating 'fallback/dsdt.aml'
1669 13:04:02.581249 CBFS: Found @ offset 10bb80 size 3fa5
1670 13:04:02.588093 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 13:04:02.588180 CBFS @ c08000 size 3f8000
1672 13:04:02.594311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 13:04:02.597597 CBFS: Locating 'fallback/slic'
1674 13:04:02.602212 CBFS: 'fallback/slic' not found.
1675 13:04:02.608370 ACPI: Writing ACPI tables at 99b3e000.
1676 13:04:02.608457 ACPI: * FACS
1677 13:04:02.611746 ACPI: * DSDT
1678 13:04:02.615118 Ramoops buffer: 0x100000@0x99a3d000.
1679 13:04:02.618598 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 13:04:02.624800 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 13:04:02.628168 Google Chrome EC: version:
1682 13:04:02.631713 ro: helios_v2.0.2659-56403530b
1683 13:04:02.634972 rw: helios_v2.0.2849-c41de27e7d
1684 13:04:02.635058 running image: 1
1685 13:04:02.639413 ACPI: * FADT
1686 13:04:02.639498 SCI is IRQ9
1687 13:04:02.646094 ACPI: added table 1/32, length now 40
1688 13:04:02.646180 ACPI: * SSDT
1689 13:04:02.649377 Found 1 CPU(s) with 8 core(s) each.
1690 13:04:02.652482 Error: Could not locate 'wifi_sar' in VPD.
1691 13:04:02.659486 Checking CBFS for default SAR values
1692 13:04:02.662459 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 13:04:02.665638 CBFS @ c08000 size 3f8000
1694 13:04:02.672540 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 13:04:02.675784 CBFS: Locating 'wifi_sar_defaults.hex'
1696 13:04:02.679077 CBFS: Found @ offset 5fac0 size 77
1697 13:04:02.682265 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 13:04:02.689050 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 13:04:02.692811 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 13:04:02.699238 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 13:04:02.702361 failed to find key in VPD: dsm_calib_r0_0
1702 13:04:02.712377 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 13:04:02.715638 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 13:04:02.718685 failed to find key in VPD: dsm_calib_r0_1
1705 13:04:02.729487 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 13:04:02.735931 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 13:04:02.739471 failed to find key in VPD: dsm_calib_r0_2
1708 13:04:02.748806 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 13:04:02.752174 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 13:04:02.758567 failed to find key in VPD: dsm_calib_r0_3
1711 13:04:02.765473 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 13:04:02.772182 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 13:04:02.775505 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 13:04:02.778563 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 13:04:02.782808 EC returned error result code 1
1716 13:04:02.786577 EC returned error result code 1
1717 13:04:02.790186 EC returned error result code 1
1718 13:04:02.797057 PS2K: Bad resp from EC. Vivaldi disabled!
1719 13:04:02.800225 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 13:04:02.806740 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 13:04:02.813635 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 13:04:02.816542 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 13:04:02.823092 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 13:04:02.829861 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 13:04:02.836194 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 13:04:02.839672 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 13:04:02.846078 ACPI: added table 2/32, length now 44
1728 13:04:02.846583 ACPI: * MCFG
1729 13:04:02.849408 ACPI: added table 3/32, length now 48
1730 13:04:02.852891 ACPI: * TPM2
1731 13:04:02.856539 TPM2 log created at 99a2d000
1732 13:04:02.859704 ACPI: added table 4/32, length now 52
1733 13:04:02.860196 ACPI: * MADT
1734 13:04:02.862878 SCI is IRQ9
1735 13:04:02.866184 ACPI: added table 5/32, length now 56
1736 13:04:02.866628 current = 99b43ac0
1737 13:04:02.869617 ACPI: * DMAR
1738 13:04:02.872940 ACPI: added table 6/32, length now 60
1739 13:04:02.876328 ACPI: * IGD OpRegion
1740 13:04:02.876788 GMA: Found VBT in CBFS
1741 13:04:02.879831 GMA: Found valid VBT in CBFS
1742 13:04:02.882566 ACPI: added table 7/32, length now 64
1743 13:04:02.886433 ACPI: * HPET
1744 13:04:02.889789 ACPI: added table 8/32, length now 68
1745 13:04:02.890384 ACPI: done.
1746 13:04:02.892797 ACPI tables: 31744 bytes.
1747 13:04:02.896558 smbios_write_tables: 99a2c000
1748 13:04:02.899563 EC returned error result code 3
1749 13:04:02.902923 Couldn't obtain OEM name from CBI
1750 13:04:02.906384 Create SMBIOS type 17
1751 13:04:02.909875 PCI: 00:00.0 (Intel Cannonlake)
1752 13:04:02.913871 PCI: 00:14.3 (Intel WiFi)
1753 13:04:02.916474 SMBIOS tables: 939 bytes.
1754 13:04:02.919684 Writing table forward entry at 0x00000500
1755 13:04:02.926206 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 13:04:02.929787 Writing coreboot table at 0x99b62000
1757 13:04:02.935928 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 13:04:02.939508 1. 0000000000001000-000000000009ffff: RAM
1759 13:04:02.942660 2. 00000000000a0000-00000000000fffff: RESERVED
1760 13:04:02.949506 3. 0000000000100000-0000000099a2bfff: RAM
1761 13:04:02.952845 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 13:04:02.959219 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 13:04:02.966264 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 13:04:02.969251 7. 000000009a000000-000000009f7fffff: RESERVED
1765 13:04:02.976073 8. 00000000e0000000-00000000efffffff: RESERVED
1766 13:04:02.979298 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 13:04:02.982723 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 13:04:02.989452 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 13:04:02.992716 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 13:04:02.999231 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 13:04:03.002469 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 13:04:03.009033 15. 0000000100000000-000000045e7fffff: RAM
1773 13:04:03.011972 Graphics framebuffer located at 0xc0000000
1774 13:04:03.015767 Passing 5 GPIOs to payload:
1775 13:04:03.018934 NAME | PORT | POLARITY | VALUE
1776 13:04:03.025676 write protect | undefined | high | low
1777 13:04:03.028704 lid | undefined | high | high
1778 13:04:03.035132 power | undefined | high | low
1779 13:04:03.042402 oprom | undefined | high | low
1780 13:04:03.044953 EC in RW | 0x000000cb | high | low
1781 13:04:03.048774 Board ID: 4
1782 13:04:03.051799 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 13:04:03.055201 CBFS @ c08000 size 3f8000
1784 13:04:03.061828 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 13:04:03.068505 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1786 13:04:03.069107 coreboot table: 1492 bytes.
1787 13:04:03.071724 IMD ROOT 0. 99fff000 00001000
1788 13:04:03.075445 IMD SMALL 1. 99ffe000 00001000
1789 13:04:03.078369 FSP MEMORY 2. 99c4e000 003b0000
1790 13:04:03.081772 CONSOLE 3. 99c2e000 00020000
1791 13:04:03.085018 FMAP 4. 99c2d000 0000054e
1792 13:04:03.088628 TIME STAMP 5. 99c2c000 00000910
1793 13:04:03.091685 VBOOT WORK 6. 99c18000 00014000
1794 13:04:03.094551 MRC DATA 7. 99c16000 00001958
1795 13:04:03.098263 ROMSTG STCK 8. 99c15000 00001000
1796 13:04:03.101765 AFTER CAR 9. 99c0b000 0000a000
1797 13:04:03.104775 RAMSTAGE 10. 99baf000 0005c000
1798 13:04:03.108268 REFCODE 11. 99b7a000 00035000
1799 13:04:03.111615 SMM BACKUP 12. 99b6a000 00010000
1800 13:04:03.114714 COREBOOT 13. 99b62000 00008000
1801 13:04:03.118390 ACPI 14. 99b3e000 00024000
1802 13:04:03.121415 ACPI GNVS 15. 99b3d000 00001000
1803 13:04:03.125108 RAMOOPS 16. 99a3d000 00100000
1804 13:04:03.127789 TPM2 TCGLOG17. 99a2d000 00010000
1805 13:04:03.131027 SMBIOS 18. 99a2c000 00000800
1806 13:04:03.134581 IMD small region:
1807 13:04:03.137956 IMD ROOT 0. 99ffec00 00000400
1808 13:04:03.141101 FSP RUNTIME 1. 99ffebe0 00000004
1809 13:04:03.144741 EC HOSTEVENT 2. 99ffebc0 00000008
1810 13:04:03.147697 POWER STATE 3. 99ffeb80 00000040
1811 13:04:03.151165 ROMSTAGE 4. 99ffeb60 00000004
1812 13:04:03.157586 MEM INFO 5. 99ffe9a0 000001b9
1813 13:04:03.161196 VPD 6. 99ffe920 0000006c
1814 13:04:03.161818 MTRR: Physical address space:
1815 13:04:03.167183 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1816 13:04:03.174018 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1817 13:04:03.180835 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1818 13:04:03.187701 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1819 13:04:03.194181 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1820 13:04:03.200258 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1821 13:04:03.207056 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1822 13:04:03.210467 MTRR: Fixed MSR 0x250 0x0606060606060606
1823 13:04:03.213901 MTRR: Fixed MSR 0x258 0x0606060606060606
1824 13:04:03.217011 MTRR: Fixed MSR 0x259 0x0000000000000000
1825 13:04:03.223786 MTRR: Fixed MSR 0x268 0x0606060606060606
1826 13:04:03.227132 MTRR: Fixed MSR 0x269 0x0606060606060606
1827 13:04:03.230040 MTRR: Fixed MSR 0x26a 0x0606060606060606
1828 13:04:03.233832 MTRR: Fixed MSR 0x26b 0x0606060606060606
1829 13:04:03.240380 MTRR: Fixed MSR 0x26c 0x0606060606060606
1830 13:04:03.243346 MTRR: Fixed MSR 0x26d 0x0606060606060606
1831 13:04:03.246694 MTRR: Fixed MSR 0x26e 0x0606060606060606
1832 13:04:03.249847 MTRR: Fixed MSR 0x26f 0x0606060606060606
1833 13:04:03.253537 call enable_fixed_mtrr()
1834 13:04:03.257060 CPU physical address size: 39 bits
1835 13:04:03.263953 MTRR: default type WB/UC MTRR counts: 6/8.
1836 13:04:03.266897 MTRR: WB selected as default type.
1837 13:04:03.273851 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1838 13:04:03.277316 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1839 13:04:03.283688 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1840 13:04:03.290121 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 13:04:03.296804 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1842 13:04:03.303209 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1843 13:04:03.309655 MTRR: Fixed MSR 0x250 0x0606060606060606
1844 13:04:03.313367 MTRR: Fixed MSR 0x258 0x0606060606060606
1845 13:04:03.316637 MTRR: Fixed MSR 0x259 0x0000000000000000
1846 13:04:03.319575 MTRR: Fixed MSR 0x268 0x0606060606060606
1847 13:04:03.323386 MTRR: Fixed MSR 0x269 0x0606060606060606
1848 13:04:03.329653 MTRR: Fixed MSR 0x26a 0x0606060606060606
1849 13:04:03.332751 MTRR: Fixed MSR 0x26b 0x0606060606060606
1850 13:04:03.336100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1851 13:04:03.339356 MTRR: Fixed MSR 0x26d 0x0606060606060606
1852 13:04:03.345943 MTRR: Fixed MSR 0x26e 0x0606060606060606
1853 13:04:03.349223 MTRR: Fixed MSR 0x26f 0x0606060606060606
1854 13:04:03.349713
1855 13:04:03.350137 MTRR check
1856 13:04:03.352393 Fixed MTRRs : Enabled
1857 13:04:03.355823 Variable MTRRs: Enabled
1858 13:04:03.356331
1859 13:04:03.359581 call enable_fixed_mtrr()
1860 13:04:03.362607 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1861 13:04:03.365948 CPU physical address size: 39 bits
1862 13:04:03.372320 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1863 13:04:03.375635 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 13:04:03.382622 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 13:04:03.385977 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 13:04:03.389300 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 13:04:03.392503 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 13:04:03.395745 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 13:04:03.402109 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 13:04:03.405673 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 13:04:03.409222 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 13:04:03.412020 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 13:04:03.418704 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 13:04:03.422205 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 13:04:03.425257 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 13:04:03.428947 call enable_fixed_mtrr()
1877 13:04:03.432257 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 13:04:03.435218 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 13:04:03.441840 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 13:04:03.445401 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 13:04:03.448780 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 13:04:03.452049 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 13:04:03.458276 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 13:04:03.462127 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 13:04:03.465129 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 13:04:03.468032 CPU physical address size: 39 bits
1887 13:04:03.472022 call enable_fixed_mtrr()
1888 13:04:03.475710 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 13:04:03.482240 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 13:04:03.485531 CPU physical address size: 39 bits
1891 13:04:03.486144 CBFS @ c08000 size 3f8000
1892 13:04:03.492132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1893 13:04:03.495144 CBFS: Locating 'fallback/payload'
1894 13:04:03.498758 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 13:04:03.504932 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 13:04:03.508076 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 13:04:03.511881 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 13:04:03.514994 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 13:04:03.521681 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 13:04:03.524741 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 13:04:03.528290 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 13:04:03.531663 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 13:04:03.537667 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 13:04:03.541049 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 13:04:03.544480 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 13:04:03.548167 call enable_fixed_mtrr()
1907 13:04:03.551081 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 13:04:03.554343 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 13:04:03.561184 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 13:04:03.564583 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 13:04:03.567617 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 13:04:03.570667 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 13:04:03.577826 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 13:04:03.580714 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 13:04:03.584613 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 13:04:03.587633 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 13:04:03.591444 CPU physical address size: 39 bits
1918 13:04:03.594249 call enable_fixed_mtrr()
1919 13:04:03.597728 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 13:04:03.604214 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 13:04:03.607485 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 13:04:03.610983 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 13:04:03.614451 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 13:04:03.620551 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 13:04:03.624108 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 13:04:03.627731 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 13:04:03.630864 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 13:04:03.636997 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 13:04:03.640580 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 13:04:03.643966 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 13:04:03.646904 call enable_fixed_mtrr()
1932 13:04:03.650405 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 13:04:03.653828 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 13:04:03.660153 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 13:04:03.664062 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 13:04:03.667114 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 13:04:03.670305 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 13:04:03.676978 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 13:04:03.680145 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 13:04:03.683451 CPU physical address size: 39 bits
1941 13:04:03.687008 call enable_fixed_mtrr()
1942 13:04:03.690330 CPU physical address size: 39 bits
1943 13:04:03.693950 CPU physical address size: 39 bits
1944 13:04:03.696972 CBFS: Found @ offset 1c96c0 size 3f798
1945 13:04:03.700562 Checking segment from ROM address 0xffdd16f8
1946 13:04:03.706733 Checking segment from ROM address 0xffdd1714
1947 13:04:03.710319 Loading segment from ROM address 0xffdd16f8
1948 13:04:03.713808 code (compression=0)
1949 13:04:03.719847 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1950 13:04:03.730353 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1951 13:04:03.733399 it's not compressed!
1952 13:04:03.824329 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1953 13:04:03.830926 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1954 13:04:03.834570 Loading segment from ROM address 0xffdd1714
1955 13:04:03.837386 Entry Point 0x30000000
1956 13:04:03.840715 Loaded segments
1957 13:04:03.846426 Finalizing chipset.
1958 13:04:03.849652 Finalizing SMM.
1959 13:04:03.853495 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1960 13:04:03.856796 mp_park_aps done after 0 msecs.
1961 13:04:03.863183 Jumping to boot code at 30000000(99b62000)
1962 13:04:03.869573 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1963 13:04:03.870268
1964 13:04:03.873155 Starting depthcharge on Helios...
1965 13:04:03.874512 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1966 13:04:03.875092 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1967 13:04:03.875560 Setting prompt string to ['hatch:']
1968 13:04:03.876051 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1969 13:04:03.883322 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1970 13:04:03.889493 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1971 13:04:03.896624 board_setup: Info: eMMC controller not present; skipping
1972 13:04:03.899545 New NVMe Controller 0x30053ac0 @ 00:1d:00
1973 13:04:03.906598 board_setup: Info: SDHCI controller not present; skipping
1974 13:04:03.912926 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1975 13:04:03.913572 Wipe memory regions:
1976 13:04:03.916386 [0x00000000001000, 0x000000000a0000)
1977 13:04:03.919148 [0x00000000100000, 0x00000030000000)
1978 13:04:03.988907 [0x00000030657430, 0x00000099a2c000)
1979 13:04:04.129511 [0x00000100000000, 0x0000045e800000)
1980 13:04:05.510780 R8152: Initializing
1981 13:04:05.514146 Version 9 (ocp_data = 6010)
1982 13:04:05.518604 R8152: Done initializing
1983 13:04:05.521918 Adding net device
1984 13:04:06.019099 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1985 13:04:06.019242
1986 13:04:06.019524 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1988 13:04:06.120205 hatch: tftpboot 192.168.201.1 7148208/tftp-deploy-8dqshclf/kernel/bzImage 7148208/tftp-deploy-8dqshclf/kernel/cmdline 7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
1989 13:04:06.120820 Setting prompt string to 'Starting kernel'
1990 13:04:06.121193 Setting prompt string to ['Starting kernel']
1991 13:04:06.121545 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1992 13:04:06.121967 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
1993 13:04:06.126160 tftpboot 192.168.201.1 7148208/tftp-deploy-8dqshclf/kernel/bzImay-8dqshclf/kernel/cmdline 7148208/tftp-deploy-8dqshclf/ramdisk/ramdisk.cpio.gz
1994 13:04:06.126626 Waiting for link
1995 13:04:06.326443 done.
1996 13:04:06.326589 MAC: f4:f5:e8:50:dc:f7
1997 13:04:06.329853 Sending DHCP discover... done.
1998 13:04:06.333017 Waiting for reply... done.
1999 13:04:06.336565 Sending DHCP request... done.
2000 13:04:06.339708 Waiting for reply... done.
2001 13:04:06.342845 My ip is 192.168.201.10
2002 13:04:06.346637 The DHCP server ip is 192.168.201.1
2003 13:04:06.349761 TFTP server IP predefined by user: 192.168.201.1
2004 13:04:06.356099 Bootfile predefined by user: 7148208/tftp-deploy-8dqshclf/kernel/bzImage
2005 13:04:06.359675 Sending tftp read request... done.
2006 13:04:06.363400 Waiting for the transfer...
2007 13:04:06.670648 00000000 ################################################################
2008 13:04:06.975751 00080000 ################################################################
2009 13:04:07.284956 00100000 ################################################################
2010 13:04:07.564952 00180000 ################################################################
2011 13:04:07.805034 00200000 ################################################################
2012 13:04:08.085029 00280000 ################################################################
2013 13:04:08.322734 00300000 ################################################################
2014 13:04:08.595980 00380000 ################################################################
2015 13:04:08.847935 00400000 ################################################################
2016 13:04:09.090582 00480000 ################################################################
2017 13:04:09.332570 00500000 ################################################################
2018 13:04:09.561299 00580000 ################################################################
2019 13:04:09.802742 00600000 ################################################################
2020 13:04:10.044082 00680000 ################################################################
2021 13:04:10.313843 00700000 ################################################################
2022 13:04:10.571936 00780000 ################################################################
2023 13:04:10.805832 00800000 ################################################################
2024 13:04:10.825082 00880000 ###### done.
2025 13:04:10.827853 The bootfile was 8953856 bytes long.
2026 13:04:10.831327 Sending tftp read request... done.
2027 13:04:10.834363 Waiting for the transfer...
2028 13:04:11.092394 00000000 ################################################################
2029 13:04:11.369211 00080000 ################################################################
2030 13:04:11.602531 00100000 ################################################################
2031 13:04:11.854907 00180000 ################################################################
2032 13:04:12.102508 00200000 ################################################################
2033 13:04:12.340811 00280000 ################################################################
2034 13:04:12.603518 00300000 ################################################################
2035 13:04:12.869567 00380000 ################################################################
2036 13:04:13.150946 00400000 ################################################################
2037 13:04:13.384073 00480000 ################################################################
2038 13:04:13.612077 00500000 ################################################################
2039 13:04:13.840804 00580000 ################################################################
2040 13:04:14.074503 00600000 ################################################################
2041 13:04:14.307461 00680000 ################################################################
2042 13:04:14.540008 00700000 ################################################################
2043 13:04:14.831279 00780000 ################################################################
2044 13:04:14.919168 00800000 ####################### done.
2045 13:04:14.922946 Sending tftp read request... done.
2046 13:04:14.926359 Waiting for the transfer...
2047 13:04:14.929062 00000000 # done.
2048 13:04:14.935817 Command line loaded dynamically from TFTP file: 7148208/tftp-deploy-8dqshclf/kernel/cmdline
2049 13:04:14.952582 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2050 13:04:14.959066 ec_init(0): CrosEC protocol v3 supported (256, 256)
2051 13:04:14.967901 Shutting down all USB controllers.
2052 13:04:14.968161 Removing current net device
2053 13:04:14.971723 Finalizing coreboot
2054 13:04:14.978490 Exiting depthcharge with code 4 at timestamp: 18459240
2055 13:04:14.978907
2056 13:04:14.979320 Starting kernel ...
2057 13:04:14.979713
2058 13:04:14.980098
2059 13:04:14.980973 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2060 13:04:14.981492 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2061 13:04:14.981900 Setting prompt string to ['Linux version [0-9]']
2062 13:04:14.982318 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2063 13:04:14.982741 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2065 13:08:44.982406 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2067 13:08:44.983565 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2069 13:08:44.984432 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2072 13:08:44.986039 end: 2 depthcharge-action (duration 00:05:00) [common]
2074 13:08:44.986606 Cleaning after the job
2075 13:08:44.986687 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/ramdisk
2076 13:08:44.987281 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/kernel
2077 13:08:44.987841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148208/tftp-deploy-8dqshclf/modules
2078 13:08:44.988040 start: 5.1 power-off (timeout 00:00:30) [common]
2079 13:08:44.988192 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2080 13:08:45.006551 >> Command sent successfully.
2081 13:08:45.008323 Returned 0 in 0 seconds
2082 13:08:45.109626 end: 5.1 power-off (duration 00:00:00) [common]
2084 13:08:45.111319 start: 5.2 read-feedback (timeout 00:10:00) [common]
2085 13:08:45.112516 Listened to connection for namespace 'common' for up to 1s
2086 13:08:46.116134 Finalising connection for namespace 'common'
2087 13:08:46.116921 Disconnecting from shell: Finalise
2088 13:08:46.218185 end: 5.2 read-feedback (duration 00:00:01) [common]
2089 13:08:46.218814 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148208
2090 13:08:46.242224 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148208
2091 13:08:46.242791 JobError: Your job cannot terminate cleanly.