Boot log: asus-cx9400-volteer

    1 12:59:03.256190  lava-dispatcher, installed at version: 2022.06
    2 12:59:03.256374  start: 0 validate
    3 12:59:03.256499  Start time: 2022-08-31 12:59:03.256493+00:00 (UTC)
    4 12:59:03.256621  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:59:03.256745  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220805.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:59:03.542119  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:59:03.542288  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:59:03.831912  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:59:03.832071  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:59:04.123427  validate duration: 0.87
   12 12:59:04.123699  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:59:04.123805  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:59:04.123903  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:59:04.123998  Not decompressing ramdisk as can be used compressed.
   16 12:59:04.124083  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220805.0/x86/rootfs.cpio.gz
   17 12:59:04.124150  saving as /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/ramdisk/rootfs.cpio.gz
   18 12:59:04.124212  total size: 8415960 (8MB)
   19 12:59:04.125333  progress   0% (0MB)
   20 12:59:04.127426  progress   5% (0MB)
   21 12:59:04.129554  progress  10% (0MB)
   22 12:59:04.131645  progress  15% (1MB)
   23 12:59:04.133722  progress  20% (1MB)
   24 12:59:04.135841  progress  25% (2MB)
   25 12:59:04.137944  progress  30% (2MB)
   26 12:59:04.139857  progress  35% (2MB)
   27 12:59:04.141969  progress  40% (3MB)
   28 12:59:04.144073  progress  45% (3MB)
   29 12:59:04.146156  progress  50% (4MB)
   30 12:59:04.148190  progress  55% (4MB)
   31 12:59:04.150228  progress  60% (4MB)
   32 12:59:04.152118  progress  65% (5MB)
   33 12:59:04.154202  progress  70% (5MB)
   34 12:59:04.156226  progress  75% (6MB)
   35 12:59:04.158351  progress  80% (6MB)
   36 12:59:04.160474  progress  85% (6MB)
   37 12:59:04.162513  progress  90% (7MB)
   38 12:59:04.164398  progress  95% (7MB)
   39 12:59:04.166473  progress 100% (8MB)
   40 12:59:04.166751  8MB downloaded in 0.04s (188.70MB/s)
   41 12:59:04.166908  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:59:04.167158  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:59:04.167249  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:59:04.167336  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:59:04.167441  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:59:04.167509  saving as /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/kernel/bzImage
   48 12:59:04.167570  total size: 8953856 (8MB)
   49 12:59:04.167631  No compression specified
   50 12:59:06.676223  progress   0% (0MB)
   51 12:59:06.678593  progress   5% (0MB)
   52 12:59:06.680830  progress  10% (0MB)
   53 12:59:06.682908  progress  15% (1MB)
   54 12:59:06.685125  progress  20% (1MB)
   55 12:59:06.687381  progress  25% (2MB)
   56 12:59:06.689524  progress  30% (2MB)
   57 12:59:06.691814  progress  35% (3MB)
   58 12:59:06.694121  progress  40% (3MB)
   59 12:59:06.696240  progress  45% (3MB)
   60 12:59:06.698540  progress  50% (4MB)
   61 12:59:06.700728  progress  55% (4MB)
   62 12:59:06.702828  progress  60% (5MB)
   63 12:59:06.705005  progress  65% (5MB)
   64 12:59:06.707257  progress  70% (6MB)
   65 12:59:06.709298  progress  75% (6MB)
   66 12:59:06.711521  progress  80% (6MB)
   67 12:59:06.713681  progress  85% (7MB)
   68 12:59:06.715750  progress  90% (7MB)
   69 12:59:06.717973  progress  95% (8MB)
   70 12:59:06.720209  progress 100% (8MB)
   71 12:59:06.720410  8MB downloaded in 2.55s (3.34MB/s)
   72 12:59:06.720561  end: 1.2.1 http-download (duration 00:00:03) [common]
   74 12:59:06.720798  end: 1.2 download-retry (duration 00:00:03) [common]
   75 12:59:06.720888  start: 1.3 download-retry (timeout 00:09:57) [common]
   76 12:59:06.720975  start: 1.3.1 http-download (timeout 00:09:57) [common]
   77 12:59:06.721075  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:59:06.721143  saving as /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/modules/modules.tar
   79 12:59:06.721206  total size: 64656 (0MB)
   80 12:59:06.721279  Using unxz to decompress xz
   81 12:59:06.724322  progress  50% (0MB)
   82 12:59:06.724692  progress 100% (0MB)
   83 12:59:06.728897  0MB downloaded in 0.01s (8.03MB/s)
   84 12:59:06.729177  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 12:59:06.729450  end: 1.3 download-retry (duration 00:00:00) [common]
   87 12:59:06.729551  start: 1.4 prepare-tftp-overlay (timeout 00:09:57) [common]
   88 12:59:06.729648  start: 1.4.1 extract-nfsrootfs (timeout 00:09:57) [common]
   89 12:59:06.729736  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 12:59:06.729872  start: 1.4.2 lava-overlay (timeout 00:09:57) [common]
   91 12:59:06.730055  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0
   92 12:59:06.730164  makedir: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin
   93 12:59:06.730251  makedir: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/tests
   94 12:59:06.730334  makedir: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/results
   95 12:59:06.730449  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-add-keys
   96 12:59:06.730585  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-add-sources
   97 12:59:06.730703  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-background-process-start
   98 12:59:06.730817  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-background-process-stop
   99 12:59:06.730928  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-common-functions
  100 12:59:06.731038  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-echo-ipv4
  101 12:59:06.731154  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-install-packages
  102 12:59:06.731275  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-installed-packages
  103 12:59:06.731390  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-os-build
  104 12:59:06.731500  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-probe-channel
  105 12:59:06.731612  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-probe-ip
  106 12:59:06.731720  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-target-ip
  107 12:59:06.731829  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-target-mac
  108 12:59:06.731937  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-target-storage
  109 12:59:06.732050  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-case
  110 12:59:06.732159  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-event
  111 12:59:06.732269  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-feedback
  112 12:59:06.732382  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-raise
  113 12:59:06.732495  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-reference
  114 12:59:06.732603  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-runner
  115 12:59:06.732712  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-set
  116 12:59:06.732821  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-test-shell
  117 12:59:06.732932  Updating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-install-packages (oe)
  118 12:59:06.733047  Updating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/bin/lava-installed-packages (oe)
  119 12:59:06.733148  Creating /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/environment
  120 12:59:06.733236  LAVA metadata
  121 12:59:06.733307  - LAVA_JOB_ID=7148219
  122 12:59:06.733374  - LAVA_DISPATCHER_IP=192.168.201.1
  123 12:59:06.733489  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:57) [common]
  124 12:59:06.733557  skipped lava-vland-overlay
  125 12:59:06.733637  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 12:59:06.733727  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:57) [common]
  127 12:59:06.733827  skipped lava-multinode-overlay
  128 12:59:06.733921  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 12:59:06.734004  start: 1.4.2.3 test-definition (timeout 00:09:57) [common]
  130 12:59:06.734084  Loading test definitions
  131 12:59:06.734186  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:57) [common]
  132 12:59:06.734265  Using /lava-7148219 at stage 0
  133 12:59:06.734541  uuid=7148219_1.4.2.3.1 testdef=None
  134 12:59:06.734636  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 12:59:06.734723  start: 1.4.2.3.2 test-overlay (timeout 00:09:57) [common]
  136 12:59:06.735228  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 12:59:06.735465  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:57) [common]
  139 12:59:06.736036  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 12:59:06.736281  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:57) [common]
  142 12:59:06.736820  runner path: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/0/tests/0_dmesg test_uuid 7148219_1.4.2.3.1
  143 12:59:06.736970  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 12:59:06.737206  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:57) [common]
  146 12:59:06.737280  Using /lava-7148219 at stage 1
  147 12:59:06.737525  uuid=7148219_1.4.2.3.5 testdef=None
  148 12:59:06.737616  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 12:59:06.737706  start: 1.4.2.3.6 test-overlay (timeout 00:09:57) [common]
  150 12:59:06.738192  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 12:59:06.738418  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:57) [common]
  153 12:59:06.738989  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 12:59:06.739231  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:57) [common]
  156 12:59:06.739779  runner path: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/1/tests/1_bootrr test_uuid 7148219_1.4.2.3.5
  157 12:59:06.739921  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 12:59:06.740133  Creating lava-test-runner.conf files
  160 12:59:06.740199  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/0 for stage 0
  161 12:59:06.740281  - 0_dmesg
  162 12:59:06.740355  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148219/lava-overlay-136y66k0/lava-7148219/1 for stage 1
  163 12:59:06.740438  - 1_bootrr
  164 12:59:06.740527  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 12:59:06.740612  start: 1.4.2.4 compress-overlay (timeout 00:09:57) [common]
  166 12:59:06.746773  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 12:59:06.746883  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:57) [common]
  168 12:59:06.746973  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 12:59:06.747062  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 12:59:06.747149  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  171 12:59:06.929210  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 12:59:06.929600  start: 1.4.4 extract-modules (timeout 00:09:57) [common]
  173 12:59:06.929757  extracting modules file /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148219/extract-overlay-ramdisk-q1rdar_s/ramdisk
  174 12:59:06.935620  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 12:59:06.935812  start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
  176 12:59:06.935955  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148219/compress-overlay-hsn0gysx/overlay-1.4.2.4.tar.gz to ramdisk
  177 12:59:06.936075  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148219/compress-overlay-hsn0gysx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148219/extract-overlay-ramdisk-q1rdar_s/ramdisk
  178 12:59:06.940824  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 12:59:06.940939  start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
  180 12:59:06.941033  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 12:59:06.941126  start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
  182 12:59:06.941216  Building ramdisk /var/lib/lava/dispatcher/tmp/7148219/extract-overlay-ramdisk-q1rdar_s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148219/extract-overlay-ramdisk-q1rdar_s/ramdisk
  183 12:59:07.005401  >> 48236 blocks

  184 12:59:07.763444  rename /var/lib/lava/dispatcher/tmp/7148219/extract-overlay-ramdisk-q1rdar_s/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
  185 12:59:07.763919  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 12:59:07.764088  start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
  187 12:59:07.764222  start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
  188 12:59:07.764333  No mkimage arch provided, not using FIT.
  189 12:59:07.764427  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 12:59:07.764514  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 12:59:07.764655  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 12:59:07.764775  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
  193 12:59:07.764854  No LXC device requested
  194 12:59:07.764941  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 12:59:07.765033  start: 1.6 deploy-device-env (timeout 00:09:56) [common]
  196 12:59:07.765121  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 12:59:07.765195  Checking files for TFTP limit of 4294967296 bytes.
  198 12:59:07.765592  end: 1 tftp-deploy (duration 00:00:04) [common]
  199 12:59:07.765698  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 12:59:07.765837  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 12:59:07.765963  substitutions:
  202 12:59:07.766033  - {DTB}: None
  203 12:59:07.766101  - {INITRD}: 7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
  204 12:59:07.766164  - {KERNEL}: 7148219/tftp-deploy-lb693xpb/kernel/bzImage
  205 12:59:07.766225  - {LAVA_MAC}: None
  206 12:59:07.766285  - {PRESEED_CONFIG}: None
  207 12:59:07.766360  - {PRESEED_LOCAL}: None
  208 12:59:07.766434  - {RAMDISK}: 7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
  209 12:59:07.766493  - {ROOT_PART}: None
  210 12:59:07.766551  - {ROOT}: None
  211 12:59:07.766609  - {SERVER_IP}: 192.168.201.1
  212 12:59:07.766666  - {TEE}: None
  213 12:59:07.766725  Parsed boot commands:
  214 12:59:07.766782  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 12:59:07.766936  Parsed boot commands: tftpboot 192.168.201.1 7148219/tftp-deploy-lb693xpb/kernel/bzImage 7148219/tftp-deploy-lb693xpb/kernel/cmdline 7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
  216 12:59:07.767029  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 12:59:07.767125  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 12:59:07.767224  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 12:59:07.767314  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 12:59:07.767386  Not connected, no need to disconnect.
  221 12:59:07.767465  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 12:59:07.767553  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 12:59:07.767622  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
  224 12:59:07.770096  Setting prompt string to ['lava-test: # ']
  225 12:59:07.770403  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 12:59:07.770513  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 12:59:07.770647  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 12:59:07.770771  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 12:59:07.771010  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
  230 12:59:07.791069  >> Command sent successfully.

  231 12:59:07.793164  Returned 0 in 0 seconds
  232 12:59:07.893931  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 12:59:07.894516  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 12:59:07.894620  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 12:59:07.894708  Setting prompt string to 'Starting depthcharge on Voema...'
  237 12:59:07.894775  Changing prompt to 'Starting depthcharge on Voema...'
  238 12:59:07.894847  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 12:59:07.895117  [Enter `^Ec?' for help]
  240 12:59:15.480688  
  241 12:59:15.480857  
  242 12:59:15.490071  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  243 12:59:15.493605  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
  244 12:59:15.500334  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  245 12:59:15.503642  CPU: AES supported, TXT NOT supported, VT supported
  246 12:59:15.510327  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  247 12:59:15.517183  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  248 12:59:15.520393  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  249 12:59:15.523905  VBOOT: Loading verstage.
  250 12:59:15.527191  FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
  251 12:59:15.534236  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  252 12:59:15.537155  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  253 12:59:15.547695  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  254 12:59:15.554195  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  255 12:59:15.554294  
  256 12:59:15.554363  
  257 12:59:15.567038  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  258 12:59:15.581312  Probing TPM: . done!
  259 12:59:15.584171  TPM ready after 0 ms
  260 12:59:15.587497  Connected to device vid:did:rid of 1ae0:0028:00
  261 12:59:15.598892  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  262 12:59:15.605935  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  263 12:59:15.609161  Initialized TPM device CR50 revision 0
  264 12:59:15.723038  tlcl_send_startup: Startup return code is 0
  265 12:59:15.723184  TPM: setup succeeded
  266 12:59:15.738637  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  267 12:59:15.752665  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  268 12:59:15.765394  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  269 12:59:15.775011  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  270 12:59:15.778895  Chrome EC: UHEPI supported
  271 12:59:15.782371  Phase 1
  272 12:59:15.785347  FMAP: area GBB found @ 1805000 (458752 bytes)
  273 12:59:15.795223  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  274 12:59:15.801713  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  275 12:59:15.809012  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  276 12:59:15.815277  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  277 12:59:15.818826  Recovery requested (1009000e)
  278 12:59:15.821732  TPM: Extending digest for VBOOT: boot mode into PCR 0
  279 12:59:15.833638  tlcl_extend: response is 0
  280 12:59:15.840386  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  281 12:59:15.850097  tlcl_extend: response is 0
  282 12:59:15.857031  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  283 12:59:15.863412  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  284 12:59:15.870108  BS: verstage times (exec / console): total (unknown) / 142 ms
  285 12:59:15.870196  
  286 12:59:15.870265  
  287 12:59:15.883702  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  288 12:59:15.889604  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  289 12:59:15.892994  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  290 12:59:15.896296  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  291 12:59:15.903140  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  292 12:59:15.905982  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  293 12:59:15.909618  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  294 12:59:15.912822  TCO_STS:   0000 0000
  295 12:59:15.916260  GEN_PMCON: d0015038 00002200
  296 12:59:15.919488  GBLRST_CAUSE: 00000000 00000000
  297 12:59:15.923068  HPR_CAUSE0: 00000000
  298 12:59:15.923154  prev_sleep_state 5
  299 12:59:15.926287  Boot Count incremented to 10627
  300 12:59:15.933972  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  301 12:59:15.940801  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  302 12:59:15.947557  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  303 12:59:15.953774  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  304 12:59:15.959362  Chrome EC: UHEPI supported
  305 12:59:15.965992  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  306 12:59:15.978956  Probing TPM:  done!
  307 12:59:15.985543  Connected to device vid:did:rid of 1ae0:0028:00
  308 12:59:15.995227  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  309 12:59:15.998864  Initialized TPM device CR50 revision 0
  310 12:59:16.013994  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  311 12:59:16.020327  MRC: Hash idx 0x100b comparison successful.
  312 12:59:16.023627  MRC cache found, size faa8
  313 12:59:16.023715  bootmode is set to: 2
  314 12:59:16.026817  SPD index = 0
  315 12:59:16.033457  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  316 12:59:16.036894  SPD: module type is LPDDR4X
  317 12:59:16.040764  SPD: module part number is MT53E512M64D4NW-046
  318 12:59:16.046982  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
  319 12:59:16.050448  SPD: device width 16 bits, bus width 16 bits
  320 12:59:16.056596  SPD: module size is 1024 MB (per channel)
  321 12:59:16.495280  CBMEM:
  322 12:59:16.498596  IMD: root @ 0x76fff000 254 entries.
  323 12:59:16.501759  IMD: root @ 0x76ffec00 62 entries.
  324 12:59:16.504950  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  325 12:59:16.512789  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  326 12:59:16.516518  External stage cache:
  327 12:59:16.519760  IMD: root @ 0x7b3ff000 254 entries.
  328 12:59:16.523162  IMD: root @ 0x7b3fec00 62 entries.
  329 12:59:16.536972  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  330 12:59:16.543734  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  331 12:59:16.550082  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  332 12:59:16.564042  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  333 12:59:16.570507  cse_lite: Skip switching to RW in the recovery path
  334 12:59:16.570602  8 DIMMs found
  335 12:59:16.574021  SMM Memory Map
  336 12:59:16.577247  SMRAM       : 0x7b000000 0x800000
  337 12:59:16.580433   Subregion 0: 0x7b000000 0x200000
  338 12:59:16.583894   Subregion 1: 0x7b200000 0x200000
  339 12:59:16.587646   Subregion 2: 0x7b400000 0x400000
  340 12:59:16.587731  top_of_ram = 0x77000000
  341 12:59:16.594145  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  342 12:59:16.600501  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  343 12:59:16.603462  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  344 12:59:16.610061  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  345 12:59:16.616932  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  346 12:59:16.623725  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  347 12:59:16.634339  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  348 12:59:16.640180  Processing 211 relocs. Offset value of 0x74c0b000
  349 12:59:16.646841  BS: romstage times (exec / console): total (unknown) / 277 ms
  350 12:59:16.653110  
  351 12:59:16.653239  
  352 12:59:16.662875  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  353 12:59:16.666422  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  354 12:59:16.676236  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  355 12:59:16.683204  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  356 12:59:16.689631  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  357 12:59:16.696013  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  358 12:59:16.742906  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  359 12:59:16.749214  Processing 5008 relocs. Offset value of 0x75d98000
  360 12:59:16.752954  BS: postcar times (exec / console): total (unknown) / 59 ms
  361 12:59:16.756202  
  362 12:59:16.756306  
  363 12:59:16.765978  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  364 12:59:16.766094  Normal boot
  365 12:59:16.769346  FW_CONFIG value is 0x804c02
  366 12:59:16.772586  PCI: 00:07.0 disabled by fw_config
  367 12:59:16.776039  PCI: 00:07.1 disabled by fw_config
  368 12:59:16.779330  PCI: 00:0d.2 disabled by fw_config
  369 12:59:16.786323  PCI: 00:1c.7 disabled by fw_config
  370 12:59:16.789231  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  371 12:59:16.796085  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  372 12:59:16.799734  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  373 12:59:16.806074  GENERIC: 0.0 disabled by fw_config
  374 12:59:16.809245  GENERIC: 1.0 disabled by fw_config
  375 12:59:16.812638  fw_config match found: DB_USB=USB3_ACTIVE
  376 12:59:16.815658  fw_config match found: DB_USB=USB3_ACTIVE
  377 12:59:16.819127  fw_config match found: DB_USB=USB3_ACTIVE
  378 12:59:16.825863  fw_config match found: DB_USB=USB3_ACTIVE
  379 12:59:16.829108  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  380 12:59:16.835374  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  381 12:59:16.845382  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  382 12:59:16.852257  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  383 12:59:16.855994  microcode: sig=0x806c1 pf=0x80 revision=0x86
  384 12:59:16.861946  microcode: Update skipped, already up-to-date
  385 12:59:16.868556  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  386 12:59:16.896324  Detected 4 core, 8 thread CPU.
  387 12:59:16.899663  Setting up SMI for CPU
  388 12:59:16.903259  IED base = 0x7b400000
  389 12:59:16.903361  IED size = 0x00400000
  390 12:59:16.906617  Will perform SMM setup.
  391 12:59:16.913412  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
  392 12:59:16.919612  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  393 12:59:16.926524  Processing 16 relocs. Offset value of 0x00030000
  394 12:59:16.929940  Attempting to start 7 APs
  395 12:59:16.932662  Waiting for 10ms after sending INIT.
  396 12:59:16.948654  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  397 12:59:16.951565  AP: slot 2 apic_id 3.
  398 12:59:16.955088  AP: slot 6 apic_id 2.
  399 12:59:16.955174  AP: slot 4 apic_id 7.
  400 12:59:16.958660  AP: slot 5 apic_id 6.
  401 12:59:16.961885  AP: slot 7 apic_id 4.
  402 12:59:16.961972  AP: slot 3 apic_id 5.
  403 12:59:16.962040  done.
  404 12:59:16.968261  Waiting for 2nd SIPI to complete...done.
  405 12:59:16.975070  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  406 12:59:16.981627  Processing 13 relocs. Offset value of 0x00038000
  407 12:59:16.985267  Unable to locate Global NVS
  408 12:59:16.991769  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  409 12:59:16.994717  Installing permanent SMM handler to 0x7b000000
  410 12:59:17.004981  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  411 12:59:17.008045  Processing 794 relocs. Offset value of 0x7b010000
  412 12:59:17.018271  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  413 12:59:17.021618  Processing 13 relocs. Offset value of 0x7b008000
  414 12:59:17.028327  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  415 12:59:17.034516  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  416 12:59:17.037952  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  417 12:59:17.044537  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  418 12:59:17.051617  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  419 12:59:17.057688  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  420 12:59:17.064551  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  421 12:59:17.064695  Unable to locate Global NVS
  422 12:59:17.074543  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  423 12:59:17.077597  Clearing SMI status registers
  424 12:59:17.077745  SMI_STS: PM1 
  425 12:59:17.080971  PM1_STS: PWRBTN 
  426 12:59:17.087685  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  427 12:59:17.091050  In relocation handler: CPU 0
  428 12:59:17.094419  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  429 12:59:17.100704  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  430 12:59:17.100837  Relocation complete.
  431 12:59:17.111120  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  432 12:59:17.114537  In relocation handler: CPU 1
  433 12:59:17.117681  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  434 12:59:17.117844  Relocation complete.
  435 12:59:17.127792  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  436 12:59:17.127943  In relocation handler: CPU 4
  437 12:59:17.134429  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  438 12:59:17.134519  Relocation complete.
  439 12:59:17.144098  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  440 12:59:17.144188  In relocation handler: CPU 5
  441 12:59:17.150837  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  442 12:59:17.154172  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  443 12:59:17.157715  Relocation complete.
  444 12:59:17.164118  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  445 12:59:17.167142  In relocation handler: CPU 2
  446 12:59:17.170287  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  447 12:59:17.173666  Relocation complete.
  448 12:59:17.181053  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  449 12:59:17.184429  In relocation handler: CPU 6
  450 12:59:17.187930  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  451 12:59:17.191390  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  452 12:59:17.194793  Relocation complete.
  453 12:59:17.201468  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  454 12:59:17.204958  In relocation handler: CPU 7
  455 12:59:17.208399  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  456 12:59:17.214800  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  457 12:59:17.214888  Relocation complete.
  458 12:59:17.225028  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  459 12:59:17.225121  In relocation handler: CPU 3
  460 12:59:17.231689  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  461 12:59:17.231816  Relocation complete.
  462 12:59:17.234594  Initializing CPU #0
  463 12:59:17.237823  CPU: vendor Intel device 806c1
  464 12:59:17.241470  CPU: family 06, model 8c, stepping 01
  465 12:59:17.244313  Clearing out pending MCEs
  466 12:59:17.247760  Setting up local APIC...
  467 12:59:17.247886   apic_id: 0x00 done.
  468 12:59:17.251014  Turbo is available but hidden
  469 12:59:17.254595  Turbo is available and visible
  470 12:59:17.260967  microcode: Update skipped, already up-to-date
  471 12:59:17.261101  CPU #0 initialized
  472 12:59:17.264438  Initializing CPU #7
  473 12:59:17.268030  Initializing CPU #3
  474 12:59:17.270842  CPU: vendor Intel device 806c1
  475 12:59:17.274262  CPU: family 06, model 8c, stepping 01
  476 12:59:17.277571  CPU: vendor Intel device 806c1
  477 12:59:17.280978  CPU: family 06, model 8c, stepping 01
  478 12:59:17.284242  Clearing out pending MCEs
  479 12:59:17.284329  Clearing out pending MCEs
  480 12:59:17.287586  Setting up local APIC...
  481 12:59:17.291159  Initializing CPU #2
  482 12:59:17.291245  Initializing CPU #5
  483 12:59:17.294387  Initializing CPU #4
  484 12:59:17.297444  CPU: vendor Intel device 806c1
  485 12:59:17.300764  CPU: family 06, model 8c, stepping 01
  486 12:59:17.304096  CPU: vendor Intel device 806c1
  487 12:59:17.307631  CPU: family 06, model 8c, stepping 01
  488 12:59:17.310850  Clearing out pending MCEs
  489 12:59:17.314138  Clearing out pending MCEs
  490 12:59:17.314228  Setting up local APIC...
  491 12:59:17.317490   apic_id: 0x05 done.
  492 12:59:17.320926  Setting up local APIC...
  493 12:59:17.324509  CPU: vendor Intel device 806c1
  494 12:59:17.327567  CPU: family 06, model 8c, stepping 01
  495 12:59:17.330772  Initializing CPU #1
  496 12:59:17.331117  Initializing CPU #6
  497 12:59:17.334090  Clearing out pending MCEs
  498 12:59:17.337652  CPU: vendor Intel device 806c1
  499 12:59:17.341269  CPU: family 06, model 8c, stepping 01
  500 12:59:17.344274  Setting up local APIC...
  501 12:59:17.347842  CPU: vendor Intel device 806c1
  502 12:59:17.351239  CPU: family 06, model 8c, stepping 01
  503 12:59:17.354109  Clearing out pending MCEs
  504 12:59:17.357859  microcode: Update skipped, already up-to-date
  505 12:59:17.361033   apic_id: 0x04 done.
  506 12:59:17.361450  CPU #3 initialized
  507 12:59:17.367511  microcode: Update skipped, already up-to-date
  508 12:59:17.368035   apic_id: 0x03 done.
  509 12:59:17.370966  Clearing out pending MCEs
  510 12:59:17.377972  microcode: Update skipped, already up-to-date
  511 12:59:17.378471  Setting up local APIC...
  512 12:59:17.381063  CPU #2 initialized
  513 12:59:17.384405   apic_id: 0x02 done.
  514 12:59:17.384812  Setting up local APIC...
  515 12:59:17.387424  CPU #7 initialized
  516 12:59:17.390623  microcode: Update skipped, already up-to-date
  517 12:59:17.394427   apic_id: 0x01 done.
  518 12:59:17.397174   apic_id: 0x06 done.
  519 12:59:17.397582  Setting up local APIC...
  520 12:59:17.404064  microcode: Update skipped, already up-to-date
  521 12:59:17.404492  CPU #6 initialized
  522 12:59:17.407391  CPU #1 initialized
  523 12:59:17.410572  microcode: Update skipped, already up-to-date
  524 12:59:17.413759   apic_id: 0x07 done.
  525 12:59:17.417303  CPU #5 initialized
  526 12:59:17.420779  microcode: Update skipped, already up-to-date
  527 12:59:17.424123  CPU #4 initialized
  528 12:59:17.427359  bsp_do_flight_plan done after 455 msecs.
  529 12:59:17.430240  CPU: frequency set to 4000 MHz
  530 12:59:17.430464  Enabling SMIs.
  531 12:59:17.437008  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  532 12:59:17.453730  SATAXPCIE1 indicates PCIe NVMe is present
  533 12:59:17.457066  Probing TPM:  done!
  534 12:59:17.461017  Connected to device vid:did:rid of 1ae0:0028:00
  535 12:59:17.471646  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  536 12:59:17.474104  Initialized TPM device CR50 revision 0
  537 12:59:17.477930  Enabling S0i3.4
  538 12:59:17.484408  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  539 12:59:17.487729  Found a VBT of 8704 bytes after decompression
  540 12:59:17.494199  cse_lite: CSE RO boot. HybridStorageMode disabled
  541 12:59:17.500758  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  542 12:59:17.576928  FSPS returned 0
  543 12:59:17.580458  Executing Phase 1 of FspMultiPhaseSiInit
  544 12:59:17.590049  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  545 12:59:17.593137  port C0 DISC req: usage 1 usb3 1 usb2 5
  546 12:59:17.597027  Raw Buffer output 0 00000511
  547 12:59:17.599777  Raw Buffer output 1 00000000
  548 12:59:17.603685  pmc_send_ipc_cmd succeeded
  549 12:59:17.610101  port C1 DISC req: usage 1 usb3 2 usb2 3
  550 12:59:17.610565  Raw Buffer output 0 00000321
  551 12:59:17.613576  Raw Buffer output 1 00000000
  552 12:59:17.617691  pmc_send_ipc_cmd succeeded
  553 12:59:17.623017  Detected 4 core, 8 thread CPU.
  554 12:59:17.626479  Detected 4 core, 8 thread CPU.
  555 12:59:17.860679  Display FSP Version Info HOB
  556 12:59:17.864091  Reference Code - CPU = a.0.4c.31
  557 12:59:17.867491  uCode Version = 0.0.0.86
  558 12:59:17.870646  TXT ACM version = ff.ff.ff.ffff
  559 12:59:17.874210  Reference Code - ME = a.0.4c.31
  560 12:59:17.877241  MEBx version = 0.0.0.0
  561 12:59:17.880719  ME Firmware Version = Consumer SKU
  562 12:59:17.884448  Reference Code - PCH = a.0.4c.31
  563 12:59:17.887995  PCH-CRID Status = Disabled
  564 12:59:17.890523  PCH-CRID Original Value = ff.ff.ff.ffff
  565 12:59:17.894259  PCH-CRID New Value = ff.ff.ff.ffff
  566 12:59:17.897815  OPROM - RST - RAID = ff.ff.ff.ffff
  567 12:59:17.900792  PCH Hsio Version = 4.0.0.0
  568 12:59:17.904096  Reference Code - SA - System Agent = a.0.4c.31
  569 12:59:17.907368  Reference Code - MRC = 2.0.0.1
  570 12:59:17.910709  SA - PCIe Version = a.0.4c.31
  571 12:59:17.914341  SA-CRID Status = Disabled
  572 12:59:17.917210  SA-CRID Original Value = 0.0.0.1
  573 12:59:17.921004  SA-CRID New Value = 0.0.0.1
  574 12:59:17.923888  OPROM - VBIOS = ff.ff.ff.ffff
  575 12:59:17.927308  IO Manageability Engine FW Version = 11.1.4.0
  576 12:59:17.930648  PHY Build Version = 0.0.0.e0
  577 12:59:17.933967  Thunderbolt(TM) FW Version = 0.0.0.0
  578 12:59:17.940827  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  579 12:59:17.944205  ITSS IRQ Polarities Before:
  580 12:59:17.944640  IPC0: 0xffffffff
  581 12:59:17.947558  IPC1: 0xffffffff
  582 12:59:17.947990  IPC2: 0xffffffff
  583 12:59:17.950792  IPC3: 0xffffffff
  584 12:59:17.953597  ITSS IRQ Polarities After:
  585 12:59:17.954117  IPC0: 0xffffffff
  586 12:59:17.956887  IPC1: 0xffffffff
  587 12:59:17.957364  IPC2: 0xffffffff
  588 12:59:17.960328  IPC3: 0xffffffff
  589 12:59:17.963689  Found PCIe Root Port #9 at PCI: 00:1d.0.
  590 12:59:17.976928  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  591 12:59:17.987852  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  592 12:59:18.000309  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  593 12:59:18.007135  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
  594 12:59:18.009979  Enumerating buses...
  595 12:59:18.013602  Show all devs... Before device enumeration.
  596 12:59:18.016803  Root Device: enabled 1
  597 12:59:18.017239  DOMAIN: 0000: enabled 1
  598 12:59:18.020519  CPU_CLUSTER: 0: enabled 1
  599 12:59:18.023368  PCI: 00:00.0: enabled 1
  600 12:59:18.026983  PCI: 00:02.0: enabled 1
  601 12:59:18.027428  PCI: 00:04.0: enabled 1
  602 12:59:18.030220  PCI: 00:05.0: enabled 1
  603 12:59:18.033599  PCI: 00:06.0: enabled 0
  604 12:59:18.036709  PCI: 00:07.0: enabled 0
  605 12:59:18.037152  PCI: 00:07.1: enabled 0
  606 12:59:18.040079  PCI: 00:07.2: enabled 0
  607 12:59:18.043234  PCI: 00:07.3: enabled 0
  608 12:59:18.043673  PCI: 00:08.0: enabled 1
  609 12:59:18.046860  PCI: 00:09.0: enabled 0
  610 12:59:18.050616  PCI: 00:0a.0: enabled 0
  611 12:59:18.053858  PCI: 00:0d.0: enabled 1
  612 12:59:18.054433  PCI: 00:0d.1: enabled 0
  613 12:59:18.056979  PCI: 00:0d.2: enabled 0
  614 12:59:18.060230  PCI: 00:0d.3: enabled 0
  615 12:59:18.063763  PCI: 00:0e.0: enabled 0
  616 12:59:18.064328  PCI: 00:10.2: enabled 1
  617 12:59:18.067087  PCI: 00:10.6: enabled 0
  618 12:59:18.070394  PCI: 00:10.7: enabled 0
  619 12:59:18.073240  PCI: 00:12.0: enabled 0
  620 12:59:18.073689  PCI: 00:12.6: enabled 0
  621 12:59:18.076676  PCI: 00:13.0: enabled 0
  622 12:59:18.080115  PCI: 00:14.0: enabled 1
  623 12:59:18.080559  PCI: 00:14.1: enabled 0
  624 12:59:18.083243  PCI: 00:14.2: enabled 1
  625 12:59:18.086480  PCI: 00:14.3: enabled 1
  626 12:59:18.090184  PCI: 00:15.0: enabled 1
  627 12:59:18.090710  PCI: 00:15.1: enabled 1
  628 12:59:18.093162  PCI: 00:15.2: enabled 1
  629 12:59:18.096661  PCI: 00:15.3: enabled 1
  630 12:59:18.100035  PCI: 00:16.0: enabled 1
  631 12:59:18.100611  PCI: 00:16.1: enabled 0
  632 12:59:18.103164  PCI: 00:16.2: enabled 0
  633 12:59:18.106318  PCI: 00:16.3: enabled 0
  634 12:59:18.109609  PCI: 00:16.4: enabled 0
  635 12:59:18.110112  PCI: 00:16.5: enabled 0
  636 12:59:18.112988  PCI: 00:17.0: enabled 1
  637 12:59:18.116294  PCI: 00:19.0: enabled 0
  638 12:59:18.119950  PCI: 00:19.1: enabled 1
  639 12:59:18.120406  PCI: 00:19.2: enabled 0
  640 12:59:18.123319  PCI: 00:1c.0: enabled 1
  641 12:59:18.126528  PCI: 00:1c.1: enabled 0
  642 12:59:18.127181  PCI: 00:1c.2: enabled 0
  643 12:59:18.129902  PCI: 00:1c.3: enabled 0
  644 12:59:18.133430  PCI: 00:1c.4: enabled 0
  645 12:59:18.136483  PCI: 00:1c.5: enabled 0
  646 12:59:18.136926  PCI: 00:1c.6: enabled 1
  647 12:59:18.139916  PCI: 00:1c.7: enabled 0
  648 12:59:18.143175  PCI: 00:1d.0: enabled 1
  649 12:59:18.146569  PCI: 00:1d.1: enabled 0
  650 12:59:18.147021  PCI: 00:1d.2: enabled 1
  651 12:59:18.149982  PCI: 00:1d.3: enabled 0
  652 12:59:18.153439  PCI: 00:1e.0: enabled 1
  653 12:59:18.156888  PCI: 00:1e.1: enabled 0
  654 12:59:18.157409  PCI: 00:1e.2: enabled 1
  655 12:59:18.159901  PCI: 00:1e.3: enabled 1
  656 12:59:18.163689  PCI: 00:1f.0: enabled 1
  657 12:59:18.164136  PCI: 00:1f.1: enabled 0
  658 12:59:18.166327  PCI: 00:1f.2: enabled 1
  659 12:59:18.169753  PCI: 00:1f.3: enabled 1
  660 12:59:18.173009  PCI: 00:1f.4: enabled 0
  661 12:59:18.173484  PCI: 00:1f.5: enabled 1
  662 12:59:18.176459  PCI: 00:1f.6: enabled 0
  663 12:59:18.180010  PCI: 00:1f.7: enabled 0
  664 12:59:18.182906  APIC: 00: enabled 1
  665 12:59:18.183345  GENERIC: 0.0: enabled 1
  666 12:59:18.186338  GENERIC: 0.0: enabled 1
  667 12:59:18.189619  GENERIC: 1.0: enabled 1
  668 12:59:18.190089  GENERIC: 0.0: enabled 1
  669 12:59:18.193086  GENERIC: 1.0: enabled 1
  670 12:59:18.196160  USB0 port 0: enabled 1
  671 12:59:18.199426  GENERIC: 0.0: enabled 1
  672 12:59:18.199867  USB0 port 0: enabled 1
  673 12:59:18.203330  GENERIC: 0.0: enabled 1
  674 12:59:18.206515  I2C: 00:1a: enabled 1
  675 12:59:18.206959  I2C: 00:31: enabled 1
  676 12:59:18.209526  I2C: 00:32: enabled 1
  677 12:59:18.212909  I2C: 00:10: enabled 1
  678 12:59:18.213370  I2C: 00:15: enabled 1
  679 12:59:18.216342  GENERIC: 0.0: enabled 0
  680 12:59:18.219755  GENERIC: 1.0: enabled 0
  681 12:59:18.222559  GENERIC: 0.0: enabled 1
  682 12:59:18.223000  SPI: 00: enabled 1
  683 12:59:18.226089  SPI: 00: enabled 1
  684 12:59:18.229557  PNP: 0c09.0: enabled 1
  685 12:59:18.230050  GENERIC: 0.0: enabled 1
  686 12:59:18.232915  USB3 port 0: enabled 1
  687 12:59:18.236589  USB3 port 1: enabled 1
  688 12:59:18.237136  USB3 port 2: enabled 0
  689 12:59:18.239438  USB3 port 3: enabled 0
  690 12:59:18.242985  USB2 port 0: enabled 0
  691 12:59:18.246433  USB2 port 1: enabled 1
  692 12:59:18.247138  USB2 port 2: enabled 1
  693 12:59:18.249965  USB2 port 3: enabled 0
  694 12:59:18.253279  USB2 port 4: enabled 1
  695 12:59:18.253858  USB2 port 5: enabled 0
  696 12:59:18.256450  USB2 port 6: enabled 0
  697 12:59:18.259212  USB2 port 7: enabled 0
  698 12:59:18.259659  USB2 port 8: enabled 0
  699 12:59:18.262872  USB2 port 9: enabled 0
  700 12:59:18.266282  USB3 port 0: enabled 0
  701 12:59:18.269409  USB3 port 1: enabled 1
  702 12:59:18.269886  USB3 port 2: enabled 0
  703 12:59:18.272787  USB3 port 3: enabled 0
  704 12:59:18.275847  GENERIC: 0.0: enabled 1
  705 12:59:18.276314  GENERIC: 1.0: enabled 1
  706 12:59:18.279113  APIC: 01: enabled 1
  707 12:59:18.282626  APIC: 03: enabled 1
  708 12:59:18.283077  APIC: 05: enabled 1
  709 12:59:18.285735  APIC: 07: enabled 1
  710 12:59:18.288942  APIC: 06: enabled 1
  711 12:59:18.289390  APIC: 02: enabled 1
  712 12:59:18.292531  APIC: 04: enabled 1
  713 12:59:18.293096  Compare with tree...
  714 12:59:18.296068  Root Device: enabled 1
  715 12:59:18.299283   DOMAIN: 0000: enabled 1
  716 12:59:18.302505    PCI: 00:00.0: enabled 1
  717 12:59:18.305681    PCI: 00:02.0: enabled 1
  718 12:59:18.306176    PCI: 00:04.0: enabled 1
  719 12:59:18.308893     GENERIC: 0.0: enabled 1
  720 12:59:18.312530    PCI: 00:05.0: enabled 1
  721 12:59:18.315926    PCI: 00:06.0: enabled 0
  722 12:59:18.318802    PCI: 00:07.0: enabled 0
  723 12:59:18.319247     GENERIC: 0.0: enabled 1
  724 12:59:18.322039    PCI: 00:07.1: enabled 0
  725 12:59:18.325626     GENERIC: 1.0: enabled 1
  726 12:59:18.329021    PCI: 00:07.2: enabled 0
  727 12:59:18.331911     GENERIC: 0.0: enabled 1
  728 12:59:18.332353    PCI: 00:07.3: enabled 0
  729 12:59:18.335376     GENERIC: 1.0: enabled 1
  730 12:59:18.338838    PCI: 00:08.0: enabled 1
  731 12:59:18.342479    PCI: 00:09.0: enabled 0
  732 12:59:18.345458    PCI: 00:0a.0: enabled 0
  733 12:59:18.345924    PCI: 00:0d.0: enabled 1
  734 12:59:18.348439     USB0 port 0: enabled 1
  735 12:59:18.352300      USB3 port 0: enabled 1
  736 12:59:18.355049      USB3 port 1: enabled 1
  737 12:59:18.358475      USB3 port 2: enabled 0
  738 12:59:18.362072      USB3 port 3: enabled 0
  739 12:59:18.362515    PCI: 00:0d.1: enabled 0
  740 12:59:18.365176    PCI: 00:0d.2: enabled 0
  741 12:59:18.368621     GENERIC: 0.0: enabled 1
  742 12:59:18.372067    PCI: 00:0d.3: enabled 0
  743 12:59:18.375376    PCI: 00:0e.0: enabled 0
  744 12:59:18.375818    PCI: 00:10.2: enabled 1
  745 12:59:18.378377    PCI: 00:10.6: enabled 0
  746 12:59:18.381966    PCI: 00:10.7: enabled 0
  747 12:59:18.385466    PCI: 00:12.0: enabled 0
  748 12:59:18.386084    PCI: 00:12.6: enabled 0
  749 12:59:18.388749    PCI: 00:13.0: enabled 0
  750 12:59:18.391788    PCI: 00:14.0: enabled 1
  751 12:59:18.395606     USB0 port 0: enabled 1
  752 12:59:18.398862      USB2 port 0: enabled 0
  753 12:59:18.402297      USB2 port 1: enabled 1
  754 12:59:18.402745      USB2 port 2: enabled 1
  755 12:59:18.405484      USB2 port 3: enabled 0
  756 12:59:18.408635      USB2 port 4: enabled 1
  757 12:59:18.411640      USB2 port 5: enabled 0
  758 12:59:18.414816      USB2 port 6: enabled 0
  759 12:59:18.415270      USB2 port 7: enabled 0
  760 12:59:18.418402      USB2 port 8: enabled 0
  761 12:59:18.421947      USB2 port 9: enabled 0
  762 12:59:18.425025      USB3 port 0: enabled 0
  763 12:59:18.428103      USB3 port 1: enabled 1
  764 12:59:18.431607      USB3 port 2: enabled 0
  765 12:59:18.432050      USB3 port 3: enabled 0
  766 12:59:18.481240    PCI: 00:14.1: enabled 0
  767 12:59:18.481759    PCI: 00:14.2: enabled 1
  768 12:59:18.482565    PCI: 00:14.3: enabled 1
  769 12:59:18.482950     GENERIC: 0.0: enabled 1
  770 12:59:18.483287    PCI: 00:15.0: enabled 1
  771 12:59:18.483609     I2C: 00:1a: enabled 1
  772 12:59:18.483919     I2C: 00:31: enabled 1
  773 12:59:18.484218     I2C: 00:32: enabled 1
  774 12:59:18.484515    PCI: 00:15.1: enabled 1
  775 12:59:18.484848     I2C: 00:10: enabled 1
  776 12:59:18.485304    PCI: 00:15.2: enabled 1
  777 12:59:18.485753    PCI: 00:15.3: enabled 1
  778 12:59:18.486473    PCI: 00:16.0: enabled 1
  779 12:59:18.486815    PCI: 00:16.1: enabled 0
  780 12:59:18.487120    PCI: 00:16.2: enabled 0
  781 12:59:18.487415    PCI: 00:16.3: enabled 0
  782 12:59:18.487713    PCI: 00:16.4: enabled 0
  783 12:59:18.488013    PCI: 00:16.5: enabled 0
  784 12:59:18.488316    PCI: 00:17.0: enabled 1
  785 12:59:18.532022    PCI: 00:19.0: enabled 0
  786 12:59:18.532610    PCI: 00:19.1: enabled 1
  787 12:59:18.533472     I2C: 00:15: enabled 1
  788 12:59:18.533898    PCI: 00:19.2: enabled 0
  789 12:59:18.534249    PCI: 00:1d.0: enabled 1
  790 12:59:18.534609     GENERIC: 0.0: enabled 1
  791 12:59:18.535097    PCI: 00:1e.0: enabled 1
  792 12:59:18.535426    PCI: 00:1e.1: enabled 0
  793 12:59:18.535740    PCI: 00:1e.2: enabled 1
  794 12:59:18.536514     SPI: 00: enabled 1
  795 12:59:18.536874    PCI: 00:1e.3: enabled 1
  796 12:59:18.537193     SPI: 00: enabled 1
  797 12:59:18.537504    PCI: 00:1f.0: enabled 1
  798 12:59:18.537838     PNP: 0c09.0: enabled 1
  799 12:59:18.538143    PCI: 00:1f.1: enabled 0
  800 12:59:18.538436    PCI: 00:1f.2: enabled 1
  801 12:59:18.538786     GENERIC: 0.0: enabled 1
  802 12:59:18.539121      GENERIC: 0.0: enabled 1
  803 12:59:18.539414      GENERIC: 1.0: enabled 1
  804 12:59:18.565720    PCI: 00:1f.3: enabled 1
  805 12:59:18.566284    PCI: 00:1f.4: enabled 0
  806 12:59:18.566643    PCI: 00:1f.5: enabled 1
  807 12:59:18.566976    PCI: 00:1f.6: enabled 0
  808 12:59:18.567669    PCI: 00:1f.7: enabled 0
  809 12:59:18.568012   CPU_CLUSTER: 0: enabled 1
  810 12:59:18.568325    APIC: 00: enabled 1
  811 12:59:18.568632    APIC: 01: enabled 1
  812 12:59:18.569036    APIC: 03: enabled 1
  813 12:59:18.569365    APIC: 05: enabled 1
  814 12:59:18.569668    APIC: 07: enabled 1
  815 12:59:18.570007    APIC: 06: enabled 1
  816 12:59:18.570303    APIC: 02: enabled 1
  817 12:59:18.570947    APIC: 04: enabled 1
  818 12:59:18.571284  Root Device scanning...
  819 12:59:18.573134  scan_static_bus for Root Device
  820 12:59:18.576664  DOMAIN: 0000 enabled
  821 12:59:18.579210  CPU_CLUSTER: 0 enabled
  822 12:59:18.579673  DOMAIN: 0000 scanning...
  823 12:59:18.582797  PCI: pci_scan_bus for bus 00
  824 12:59:18.586419  PCI: 00:00.0 [8086/0000] ops
  825 12:59:18.589508  PCI: 00:00.0 [8086/9a12] enabled
  826 12:59:18.593169  PCI: 00:02.0 [8086/0000] bus ops
  827 12:59:18.596236  PCI: 00:02.0 [8086/9a40] enabled
  828 12:59:18.599034  PCI: 00:04.0 [8086/0000] bus ops
  829 12:59:18.602654  PCI: 00:04.0 [8086/9a03] enabled
  830 12:59:18.606058  PCI: 00:05.0 [8086/9a19] enabled
  831 12:59:18.609711  PCI: 00:07.0 [0000/0000] hidden
  832 12:59:18.612755  PCI: 00:08.0 [8086/9a11] enabled
  833 12:59:18.616268  PCI: 00:0a.0 [8086/9a0d] disabled
  834 12:59:18.619012  PCI: 00:0d.0 [8086/0000] bus ops
  835 12:59:18.622444  PCI: 00:0d.0 [8086/9a13] enabled
  836 12:59:18.625565  PCI: 00:14.0 [8086/0000] bus ops
  837 12:59:18.628973  PCI: 00:14.0 [8086/a0ed] enabled
  838 12:59:18.632679  PCI: 00:14.2 [8086/a0ef] enabled
  839 12:59:18.635910  PCI: 00:14.3 [8086/0000] bus ops
  840 12:59:18.639499  PCI: 00:14.3 [8086/a0f0] enabled
  841 12:59:18.642278  PCI: 00:15.0 [8086/0000] bus ops
  842 12:59:18.645408  PCI: 00:15.0 [8086/a0e8] enabled
  843 12:59:18.649180  PCI: 00:15.1 [8086/0000] bus ops
  844 12:59:18.652541  PCI: 00:15.1 [8086/a0e9] enabled
  845 12:59:18.655761  PCI: 00:15.2 [8086/0000] bus ops
  846 12:59:18.658912  PCI: 00:15.2 [8086/a0ea] enabled
  847 12:59:18.662461  PCI: 00:15.3 [8086/0000] bus ops
  848 12:59:18.669313  PCI: 00:15.3 [8086/a0eb] enabled
  849 12:59:18.669934  PCI: 00:16.0 [8086/0000] ops
  850 12:59:18.672328  PCI: 00:16.0 [8086/a0e0] enabled
  851 12:59:18.678544  PCI: Static device PCI: 00:17.0 not found, disabling it.
  852 12:59:18.681854  PCI: 00:19.0 [8086/0000] bus ops
  853 12:59:18.685382  PCI: 00:19.0 [8086/a0c5] disabled
  854 12:59:18.688343  PCI: 00:19.1 [8086/0000] bus ops
  855 12:59:18.691988  PCI: 00:19.1 [8086/a0c6] enabled
  856 12:59:18.695307  PCI: 00:1d.0 [8086/0000] bus ops
  857 12:59:18.698965  PCI: 00:1d.0 [8086/a0b0] enabled
  858 12:59:18.701588  PCI: 00:1e.0 [8086/0000] ops
  859 12:59:18.705018  PCI: 00:1e.0 [8086/a0a8] enabled
  860 12:59:18.708615  PCI: 00:1e.2 [8086/0000] bus ops
  861 12:59:18.711588  PCI: 00:1e.2 [8086/a0aa] enabled
  862 12:59:18.715206  PCI: 00:1e.3 [8086/0000] bus ops
  863 12:59:18.718364  PCI: 00:1e.3 [8086/a0ab] enabled
  864 12:59:18.721548  PCI: 00:1f.0 [8086/0000] bus ops
  865 12:59:18.724974  PCI: 00:1f.0 [8086/a087] enabled
  866 12:59:18.728066  RTC Init
  867 12:59:18.731840  Set power on after power failure.
  868 12:59:18.732419  Disabling Deep S3
  869 12:59:18.735067  Disabling Deep S3
  870 12:59:18.735514  Disabling Deep S4
  871 12:59:18.738349  Disabling Deep S4
  872 12:59:18.741592  Disabling Deep S5
  873 12:59:18.742242  Disabling Deep S5
  874 12:59:18.744825  PCI: 00:1f.2 [0000/0000] hidden
  875 12:59:18.748160  PCI: 00:1f.3 [8086/0000] bus ops
  876 12:59:18.751318  PCI: 00:1f.3 [8086/a0c8] enabled
  877 12:59:18.754461  PCI: 00:1f.5 [8086/0000] bus ops
  878 12:59:18.758301  PCI: 00:1f.5 [8086/a0a4] enabled
  879 12:59:18.761884  PCI: Leftover static devices:
  880 12:59:18.762400  PCI: 00:10.2
  881 12:59:18.764743  PCI: 00:10.6
  882 12:59:18.765376  PCI: 00:10.7
  883 12:59:18.768113  PCI: 00:06.0
  884 12:59:18.768719  PCI: 00:07.1
  885 12:59:18.769190  PCI: 00:07.2
  886 12:59:18.771491  PCI: 00:07.3
  887 12:59:18.772006  PCI: 00:09.0
  888 12:59:18.774852  PCI: 00:0d.1
  889 12:59:18.775291  PCI: 00:0d.2
  890 12:59:18.777572  PCI: 00:0d.3
  891 12:59:18.778204  PCI: 00:0e.0
  892 12:59:18.778640  PCI: 00:12.0
  893 12:59:18.781021  PCI: 00:12.6
  894 12:59:18.781515  PCI: 00:13.0
  895 12:59:18.784616  PCI: 00:14.1
  896 12:59:18.785079  PCI: 00:16.1
  897 12:59:18.785434  PCI: 00:16.2
  898 12:59:18.787636  PCI: 00:16.3
  899 12:59:18.788137  PCI: 00:16.4
  900 12:59:18.791101  PCI: 00:16.5
  901 12:59:18.791550  PCI: 00:17.0
  902 12:59:18.794457  PCI: 00:19.2
  903 12:59:18.794904  PCI: 00:1e.1
  904 12:59:18.795254  PCI: 00:1f.1
  905 12:59:18.797475  PCI: 00:1f.4
  906 12:59:18.797959  PCI: 00:1f.6
  907 12:59:18.800927  PCI: 00:1f.7
  908 12:59:18.804286  PCI: Check your devicetree.cb.
  909 12:59:18.804738  PCI: 00:02.0 scanning...
  910 12:59:18.807336  scan_generic_bus for PCI: 00:02.0
  911 12:59:18.814468  scan_generic_bus for PCI: 00:02.0 done
  912 12:59:18.817811  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  913 12:59:18.820868  PCI: 00:04.0 scanning...
  914 12:59:18.823811  scan_generic_bus for PCI: 00:04.0
  915 12:59:18.827186  GENERIC: 0.0 enabled
  916 12:59:18.830722  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  917 12:59:18.837158  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  918 12:59:18.840549  PCI: 00:0d.0 scanning...
  919 12:59:18.843841  scan_static_bus for PCI: 00:0d.0
  920 12:59:18.844284  USB0 port 0 enabled
  921 12:59:18.847169  USB0 port 0 scanning...
  922 12:59:18.850913  scan_static_bus for USB0 port 0
  923 12:59:18.853860  USB3 port 0 enabled
  924 12:59:18.854306  USB3 port 1 enabled
  925 12:59:18.857007  USB3 port 2 disabled
  926 12:59:18.859937  USB3 port 3 disabled
  927 12:59:18.860380  USB3 port 0 scanning...
  928 12:59:18.863733  scan_static_bus for USB3 port 0
  929 12:59:18.870169  scan_static_bus for USB3 port 0 done
  930 12:59:18.873812  scan_bus: bus USB3 port 0 finished in 6 msecs
  931 12:59:18.876653  USB3 port 1 scanning...
  932 12:59:18.879968  scan_static_bus for USB3 port 1
  933 12:59:18.883861  scan_static_bus for USB3 port 1 done
  934 12:59:18.887068  scan_bus: bus USB3 port 1 finished in 6 msecs
  935 12:59:18.890251  scan_static_bus for USB0 port 0 done
  936 12:59:18.896799  scan_bus: bus USB0 port 0 finished in 43 msecs
  937 12:59:18.900387  scan_static_bus for PCI: 00:0d.0 done
  938 12:59:18.903939  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  939 12:59:18.906549  PCI: 00:14.0 scanning...
  940 12:59:18.909939  scan_static_bus for PCI: 00:14.0
  941 12:59:18.913350  USB0 port 0 enabled
  942 12:59:18.916632  USB0 port 0 scanning...
  943 12:59:18.919909  scan_static_bus for USB0 port 0
  944 12:59:18.920413  USB2 port 0 disabled
  945 12:59:18.923547  USB2 port 1 enabled
  946 12:59:18.926176  USB2 port 2 enabled
  947 12:59:18.926627  USB2 port 3 disabled
  948 12:59:18.929647  USB2 port 4 enabled
  949 12:59:18.930153  USB2 port 5 disabled
  950 12:59:18.933261  USB2 port 6 disabled
  951 12:59:18.936749  USB2 port 7 disabled
  952 12:59:18.937301  USB2 port 8 disabled
  953 12:59:18.939859  USB2 port 9 disabled
  954 12:59:18.942786  USB3 port 0 disabled
  955 12:59:18.943259  USB3 port 1 enabled
  956 12:59:18.946113  USB3 port 2 disabled
  957 12:59:18.949704  USB3 port 3 disabled
  958 12:59:18.950173  USB2 port 1 scanning...
  959 12:59:18.953260  scan_static_bus for USB2 port 1
  960 12:59:18.959686  scan_static_bus for USB2 port 1 done
  961 12:59:18.962898  scan_bus: bus USB2 port 1 finished in 6 msecs
  962 12:59:18.966090  USB2 port 2 scanning...
  963 12:59:18.969120  scan_static_bus for USB2 port 2
  964 12:59:18.972838  scan_static_bus for USB2 port 2 done
  965 12:59:18.976433  scan_bus: bus USB2 port 2 finished in 6 msecs
  966 12:59:18.979503  USB2 port 4 scanning...
  967 12:59:18.982377  scan_static_bus for USB2 port 4
  968 12:59:18.985754  scan_static_bus for USB2 port 4 done
  969 12:59:18.992406  scan_bus: bus USB2 port 4 finished in 6 msecs
  970 12:59:18.992917  USB3 port 1 scanning...
  971 12:59:18.996057  scan_static_bus for USB3 port 1
  972 12:59:18.999554  scan_static_bus for USB3 port 1 done
  973 12:59:19.005907  scan_bus: bus USB3 port 1 finished in 6 msecs
  974 12:59:19.009233  scan_static_bus for USB0 port 0 done
  975 12:59:19.012250  scan_bus: bus USB0 port 0 finished in 93 msecs
  976 12:59:19.016384  scan_static_bus for PCI: 00:14.0 done
  977 12:59:19.023138  scan_bus: bus PCI: 00:14.0 finished in 110 msecs
  978 12:59:19.023584  PCI: 00:14.3 scanning...
  979 12:59:19.026760  scan_static_bus for PCI: 00:14.3
  980 12:59:19.030296  GENERIC: 0.0 enabled
  981 12:59:19.033674  scan_static_bus for PCI: 00:14.3 done
  982 12:59:19.040166  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  983 12:59:19.040611  PCI: 00:15.0 scanning...
  984 12:59:19.043644  scan_static_bus for PCI: 00:15.0
  985 12:59:19.046904  I2C: 00:1a enabled
  986 12:59:19.049941  I2C: 00:31 enabled
  987 12:59:19.050363  I2C: 00:32 enabled
  988 12:59:19.053290  scan_static_bus for PCI: 00:15.0 done
  989 12:59:19.059970  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
  990 12:59:19.063520  PCI: 00:15.1 scanning...
  991 12:59:19.066656  scan_static_bus for PCI: 00:15.1
  992 12:59:19.067077  I2C: 00:10 enabled
  993 12:59:19.070389  scan_static_bus for PCI: 00:15.1 done
  994 12:59:19.077088  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
  995 12:59:19.079873  PCI: 00:15.2 scanning...
  996 12:59:19.083380  scan_static_bus for PCI: 00:15.2
  997 12:59:19.086943  scan_static_bus for PCI: 00:15.2 done
  998 12:59:19.090067  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
  999 12:59:19.093020  PCI: 00:15.3 scanning...
 1000 12:59:19.096505  scan_static_bus for PCI: 00:15.3
 1001 12:59:19.099585  scan_static_bus for PCI: 00:15.3 done
 1002 12:59:19.106553  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1003 12:59:19.107001  PCI: 00:19.1 scanning...
 1004 12:59:19.109831  scan_static_bus for PCI: 00:19.1
 1005 12:59:19.113031  I2C: 00:15 enabled
 1006 12:59:19.116787  scan_static_bus for PCI: 00:19.1 done
 1007 12:59:19.123304  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1008 12:59:19.123750  PCI: 00:1d.0 scanning...
 1009 12:59:19.129878  do_pci_scan_bridge for PCI: 00:1d.0
 1010 12:59:19.130328  PCI: pci_scan_bus for bus 01
 1011 12:59:19.133381  PCI: 01:00.0 [1c5c/174a] enabled
 1012 12:59:19.136624  GENERIC: 0.0 enabled
 1013 12:59:19.139494  Enabling Common Clock Configuration
 1014 12:59:19.146375  L1 Sub-State supported from root port 29
 1015 12:59:19.146832  L1 Sub-State Support = 0xf
 1016 12:59:19.149698  CommonModeRestoreTime = 0x28
 1017 12:59:19.156163  Power On Value = 0x16, Power On Scale = 0x0
 1018 12:59:19.156615  ASPM: Enabled L1
 1019 12:59:19.159377  PCIe: Max_Payload_Size adjusted to 128
 1020 12:59:19.166000  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1021 12:59:19.169559  PCI: 00:1e.2 scanning...
 1022 12:59:19.172951  scan_generic_bus for PCI: 00:1e.2
 1023 12:59:19.173398  SPI: 00 enabled
 1024 12:59:19.179743  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1025 12:59:19.183113  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1026 12:59:19.186772  PCI: 00:1e.3 scanning...
 1027 12:59:19.189660  scan_generic_bus for PCI: 00:1e.3
 1028 12:59:19.193223  SPI: 00 enabled
 1029 12:59:19.199989  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1030 12:59:19.202524  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1031 12:59:19.206002  PCI: 00:1f.0 scanning...
 1032 12:59:19.209506  scan_static_bus for PCI: 00:1f.0
 1033 12:59:19.209980  PNP: 0c09.0 enabled
 1034 12:59:19.212877  PNP: 0c09.0 scanning...
 1035 12:59:19.216144  scan_static_bus for PNP: 0c09.0
 1036 12:59:19.219025  scan_static_bus for PNP: 0c09.0 done
 1037 12:59:19.225767  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1038 12:59:19.229245  scan_static_bus for PCI: 00:1f.0 done
 1039 12:59:19.232573  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1040 12:59:19.236153  PCI: 00:1f.2 scanning...
 1041 12:59:19.239375  scan_static_bus for PCI: 00:1f.2
 1042 12:59:19.242228  GENERIC: 0.0 enabled
 1043 12:59:19.245640  GENERIC: 0.0 scanning...
 1044 12:59:19.249065  scan_static_bus for GENERIC: 0.0
 1045 12:59:19.249614  GENERIC: 0.0 enabled
 1046 12:59:19.252485  GENERIC: 1.0 enabled
 1047 12:59:19.255535  scan_static_bus for GENERIC: 0.0 done
 1048 12:59:19.262482  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1049 12:59:19.265876  scan_static_bus for PCI: 00:1f.2 done
 1050 12:59:19.268672  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1051 12:59:19.272245  PCI: 00:1f.3 scanning...
 1052 12:59:19.275422  scan_static_bus for PCI: 00:1f.3
 1053 12:59:19.278671  scan_static_bus for PCI: 00:1f.3 done
 1054 12:59:19.285928  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1055 12:59:19.286481  PCI: 00:1f.5 scanning...
 1056 12:59:19.289123  scan_generic_bus for PCI: 00:1f.5
 1057 12:59:19.295230  scan_generic_bus for PCI: 00:1f.5 done
 1058 12:59:19.298479  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1059 12:59:19.305637  scan_bus: bus DOMAIN: 0000 finished in 717 msecs
 1060 12:59:19.308884  scan_static_bus for Root Device done
 1061 12:59:19.311852  scan_bus: bus Root Device finished in 737 msecs
 1062 12:59:19.312297  done
 1063 12:59:19.318368  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
 1064 12:59:19.322053  Chrome EC: UHEPI supported
 1065 12:59:19.328554  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1066 12:59:19.334843  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1067 12:59:19.338485  SPI flash protection: WPSW=0 SRP0=0
 1068 12:59:19.341650  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1069 12:59:19.348178  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1070 12:59:19.351677  found VGA at PCI: 00:02.0
 1071 12:59:19.354911  Setting up VGA for PCI: 00:02.0
 1072 12:59:19.361666  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1073 12:59:19.364949  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1074 12:59:19.368155  Allocating resources...
 1075 12:59:19.368626  Reading resources...
 1076 12:59:19.374833  Root Device read_resources bus 0 link: 0
 1077 12:59:19.378298  DOMAIN: 0000 read_resources bus 0 link: 0
 1078 12:59:19.381366  PCI: 00:04.0 read_resources bus 1 link: 0
 1079 12:59:19.388567  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1080 12:59:19.391904  PCI: 00:0d.0 read_resources bus 0 link: 0
 1081 12:59:19.398767  USB0 port 0 read_resources bus 0 link: 0
 1082 12:59:19.402226  USB0 port 0 read_resources bus 0 link: 0 done
 1083 12:59:19.408245  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1084 12:59:19.411825  PCI: 00:14.0 read_resources bus 0 link: 0
 1085 12:59:19.418689  USB0 port 0 read_resources bus 0 link: 0
 1086 12:59:19.421850  USB0 port 0 read_resources bus 0 link: 0 done
 1087 12:59:19.428312  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1088 12:59:19.431757  PCI: 00:14.3 read_resources bus 0 link: 0
 1089 12:59:19.438159  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1090 12:59:19.441643  PCI: 00:15.0 read_resources bus 0 link: 0
 1091 12:59:19.447853  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1092 12:59:19.451313  PCI: 00:15.1 read_resources bus 0 link: 0
 1093 12:59:19.458206  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1094 12:59:19.461202  PCI: 00:19.1 read_resources bus 0 link: 0
 1095 12:59:19.468042  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1096 12:59:19.471513  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 12:59:19.478168  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 12:59:19.481356  PCI: 00:1e.2 read_resources bus 2 link: 0
 1099 12:59:19.488655  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1100 12:59:19.491333  PCI: 00:1e.3 read_resources bus 3 link: 0
 1101 12:59:19.498012  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1102 12:59:19.501742  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 12:59:19.508157  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 12:59:19.511324  PCI: 00:1f.2 read_resources bus 0 link: 0
 1105 12:59:19.514932  GENERIC: 0.0 read_resources bus 0 link: 0
 1106 12:59:19.522100  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1107 12:59:19.525158  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1108 12:59:19.532540  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1109 12:59:19.535689  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1110 12:59:19.542130  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1111 12:59:19.545717  Root Device read_resources bus 0 link: 0 done
 1112 12:59:19.549111  Done reading resources.
 1113 12:59:19.555472  Show resources in subtree (Root Device)...After reading.
 1114 12:59:19.558884   Root Device child on link 0 DOMAIN: 0000
 1115 12:59:19.562406    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1116 12:59:19.572158    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1117 12:59:19.582104    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1118 12:59:19.585639     PCI: 00:00.0
 1119 12:59:19.595481     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1120 12:59:19.602214     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1121 12:59:19.612236     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1122 12:59:19.622100     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1123 12:59:19.631644     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1124 12:59:19.641520     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1125 12:59:19.651609     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1126 12:59:19.658547     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1127 12:59:19.668636     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1128 12:59:19.678015     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1129 12:59:19.688400     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1130 12:59:19.698003     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1131 12:59:19.704644     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1132 12:59:19.714381     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1133 12:59:19.724660     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1134 12:59:19.734649     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1135 12:59:19.744187     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1136 12:59:19.754716     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1137 12:59:19.764513     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1138 12:59:19.771124     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1139 12:59:19.774243     PCI: 00:02.0
 1140 12:59:19.784293     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1141 12:59:19.794265     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1142 12:59:19.804267     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1143 12:59:19.807468     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1144 12:59:19.817193     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1145 12:59:19.820502      GENERIC: 0.0
 1146 12:59:19.820946     PCI: 00:05.0
 1147 12:59:19.830320     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1148 12:59:19.837061     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1149 12:59:19.837510      GENERIC: 0.0
 1150 12:59:19.840122     PCI: 00:08.0
 1151 12:59:19.850342     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1152 12:59:19.850796     PCI: 00:0a.0
 1153 12:59:19.857134     PCI: 00:0d.0 child on link 0 USB0 port 0
 1154 12:59:19.867186     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1155 12:59:19.870600      USB0 port 0 child on link 0 USB3 port 0
 1156 12:59:19.871169       USB3 port 0
 1157 12:59:19.873774       USB3 port 1
 1158 12:59:19.874278       USB3 port 2
 1159 12:59:19.877162       USB3 port 3
 1160 12:59:19.880021     PCI: 00:14.0 child on link 0 USB0 port 0
 1161 12:59:19.890234     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1162 12:59:19.897154      USB0 port 0 child on link 0 USB2 port 0
 1163 12:59:19.897606       USB2 port 0
 1164 12:59:19.900312       USB2 port 1
 1165 12:59:19.900758       USB2 port 2
 1166 12:59:19.903557       USB2 port 3
 1167 12:59:19.904004       USB2 port 4
 1168 12:59:19.906755       USB2 port 5
 1169 12:59:19.907202       USB2 port 6
 1170 12:59:19.910067       USB2 port 7
 1171 12:59:19.910511       USB2 port 8
 1172 12:59:19.913535       USB2 port 9
 1173 12:59:19.914029       USB3 port 0
 1174 12:59:19.916938       USB3 port 1
 1175 12:59:19.919794       USB3 port 2
 1176 12:59:19.920247       USB3 port 3
 1177 12:59:19.923395     PCI: 00:14.2
 1178 12:59:19.932913     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1179 12:59:19.943713     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1180 12:59:19.946428     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1181 12:59:19.956627     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1182 12:59:19.960232      GENERIC: 0.0
 1183 12:59:19.962875     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1184 12:59:19.973080     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 12:59:19.973536      I2C: 00:1a
 1186 12:59:19.976820      I2C: 00:31
 1187 12:59:19.977399      I2C: 00:32
 1188 12:59:19.982616     PCI: 00:15.1 child on link 0 I2C: 00:10
 1189 12:59:19.993188     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1190 12:59:19.993647      I2C: 00:10
 1191 12:59:19.996033     PCI: 00:15.2
 1192 12:59:20.006245     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 12:59:20.006754     PCI: 00:15.3
 1194 12:59:20.015952     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 12:59:20.019352     PCI: 00:16.0
 1196 12:59:20.029500     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1197 12:59:20.029986     PCI: 00:19.0
 1198 12:59:20.032673     PCI: 00:19.1 child on link 0 I2C: 00:15
 1199 12:59:20.042672     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1200 12:59:20.046216      I2C: 00:15
 1201 12:59:20.048928     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1202 12:59:20.059019     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1203 12:59:20.068900     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1204 12:59:20.079060     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1205 12:59:20.079505      GENERIC: 0.0
 1206 12:59:20.081807      PCI: 01:00.0
 1207 12:59:20.092377      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1208 12:59:20.098820      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
 1209 12:59:20.108783      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
 1210 12:59:20.111876     PCI: 00:1e.0
 1211 12:59:20.121956     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1212 12:59:20.125191     PCI: 00:1e.2 child on link 0 SPI: 00
 1213 12:59:20.135276     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1214 12:59:20.138698      SPI: 00
 1215 12:59:20.141617     PCI: 00:1e.3 child on link 0 SPI: 00
 1216 12:59:20.151933     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1217 12:59:20.152446      SPI: 00
 1218 12:59:20.158526     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1219 12:59:20.165046     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1220 12:59:20.168488      PNP: 0c09.0
 1221 12:59:20.175378      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1222 12:59:20.181509     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1223 12:59:20.191405     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1224 12:59:20.197964     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1225 12:59:20.204541      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1226 12:59:20.204986       GENERIC: 0.0
 1227 12:59:20.208377       GENERIC: 1.0
 1228 12:59:20.208846     PCI: 00:1f.3
 1229 12:59:20.218120     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1230 12:59:20.227875     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1231 12:59:20.231095     PCI: 00:1f.5
 1232 12:59:20.240975     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1233 12:59:20.244471    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1234 12:59:20.244935     APIC: 00
 1235 12:59:20.247825     APIC: 01
 1236 12:59:20.248371     APIC: 03
 1237 12:59:20.251146     APIC: 05
 1238 12:59:20.251589     APIC: 07
 1239 12:59:20.251942     APIC: 06
 1240 12:59:20.254258     APIC: 02
 1241 12:59:20.254699     APIC: 04
 1242 12:59:20.260943  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1243 12:59:20.267996   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1244 12:59:20.274226   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1245 12:59:20.281116   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1246 12:59:20.284577    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1247 12:59:20.287663    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem
 1248 12:59:20.293975    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem
 1249 12:59:20.301021   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1250 12:59:20.307631   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1251 12:59:20.313753   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1252 12:59:20.324027  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1253 12:59:20.327268  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1254 12:59:20.337387   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1255 12:59:20.344275   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1256 12:59:20.350375   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1257 12:59:20.353628   DOMAIN: 0000: Resource ranges:
 1258 12:59:20.356967   * Base: 1000, Size: 800, Tag: 100
 1259 12:59:20.360319   * Base: 1900, Size: e700, Tag: 100
 1260 12:59:20.366940    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1261 12:59:20.373464  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1262 12:59:20.380380  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1263 12:59:20.387224   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1264 12:59:20.396919   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1265 12:59:20.403793   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1266 12:59:20.410320   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1267 12:59:20.420064   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1268 12:59:20.426408   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1269 12:59:20.433643   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1270 12:59:20.443285   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1271 12:59:20.450026   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1272 12:59:20.456749   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1273 12:59:20.466462   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1274 12:59:20.473147   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1275 12:59:20.479473   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1276 12:59:20.490266   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1277 12:59:20.496617   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1278 12:59:20.502673   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1279 12:59:20.513038   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
 1280 12:59:20.519586   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1281 12:59:20.526293   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1282 12:59:20.535866   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1283 12:59:20.542704   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1284 12:59:20.549250   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1285 12:59:20.552697   DOMAIN: 0000: Resource ranges:
 1286 12:59:20.559205   * Base: 7fc00000, Size: 40400000, Tag: 200
 1287 12:59:20.562619   * Base: d0000000, Size: 28000000, Tag: 200
 1288 12:59:20.565901   * Base: fa000000, Size: 1000000, Tag: 200
 1289 12:59:20.569295   * Base: fb001000, Size: 2fff000, Tag: 200
 1290 12:59:20.576297   * Base: fe010000, Size: 2e000, Tag: 200
 1291 12:59:20.578904   * Base: fe03f000, Size: d41000, Tag: 200
 1292 12:59:20.582352   * Base: fed88000, Size: 8000, Tag: 200
 1293 12:59:20.585767   * Base: fed93000, Size: d000, Tag: 200
 1294 12:59:20.592520   * Base: feda2000, Size: 1e000, Tag: 200
 1295 12:59:20.595445   * Base: fede0000, Size: 1220000, Tag: 200
 1296 12:59:20.598838   * Base: 280400000, Size: 7d7fc00000, Tag: 100200
 1297 12:59:20.608965    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1298 12:59:20.615339    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1299 12:59:20.622193    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1300 12:59:20.628746    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1301 12:59:20.635941    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1302 12:59:20.641911    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1303 12:59:20.648976    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1304 12:59:20.655564    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1305 12:59:20.661954    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1306 12:59:20.669025    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1307 12:59:20.675043    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1308 12:59:20.681507    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1309 12:59:20.688253    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1310 12:59:20.695363    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1311 12:59:20.701733    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1312 12:59:20.708324    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1313 12:59:20.715295    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1314 12:59:20.721611    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1315 12:59:20.728249    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1316 12:59:20.735106    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1317 12:59:20.741569    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1318 12:59:20.748256    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1319 12:59:20.754714  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1320 12:59:20.761601  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1321 12:59:20.764866   PCI: 00:1d.0: Resource ranges:
 1322 12:59:20.767815   * Base: 7fc00000, Size: 100000, Tag: 200
 1323 12:59:20.774980    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1324 12:59:20.781350    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
 1325 12:59:20.787895    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
 1326 12:59:20.797799  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1327 12:59:20.804475  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1328 12:59:20.807640  Root Device assign_resources, bus 0 link: 0
 1329 12:59:20.814178  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1330 12:59:20.820762  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1331 12:59:20.831317  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1332 12:59:20.837611  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1333 12:59:20.847765  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1334 12:59:20.850777  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1335 12:59:20.857724  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1336 12:59:20.864224  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1337 12:59:20.874304  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1338 12:59:20.880634  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1339 12:59:20.884016  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1340 12:59:20.890748  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1341 12:59:20.897170  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1342 12:59:20.903675  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1343 12:59:20.907050  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1344 12:59:20.917219  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1345 12:59:20.923641  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1346 12:59:20.934081  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1347 12:59:20.937261  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1348 12:59:20.940266  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1349 12:59:20.950280  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1350 12:59:20.953438  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1351 12:59:20.960554  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1352 12:59:20.966803  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1353 12:59:20.969762  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1354 12:59:20.977061  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1355 12:59:20.983438  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1356 12:59:20.992929  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1357 12:59:20.999581  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1358 12:59:21.010085  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1359 12:59:21.012982  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1360 12:59:21.019807  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1361 12:59:21.026235  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1362 12:59:21.035975  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1363 12:59:21.046035  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1364 12:59:21.049554  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1365 12:59:21.059845  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1366 12:59:21.065971  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
 1367 12:59:21.072610  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
 1368 12:59:21.079170  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1369 12:59:21.085811  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1370 12:59:21.092469  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1371 12:59:21.096049  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1372 12:59:21.105979  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1373 12:59:21.108717  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1374 12:59:21.112085  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1375 12:59:21.118942  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1376 12:59:21.122285  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1377 12:59:21.128840  LPC: Trying to open IO window from 800 size 1ff
 1378 12:59:21.136003  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1379 12:59:21.145694  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1380 12:59:21.152072  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1381 12:59:21.158508  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1382 12:59:21.161914  Root Device assign_resources, bus 0 link: 0
 1383 12:59:21.165545  Done setting resources.
 1384 12:59:21.171797  Show resources in subtree (Root Device)...After assigning values.
 1385 12:59:21.175149   Root Device child on link 0 DOMAIN: 0000
 1386 12:59:21.178322    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1387 12:59:21.188342    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1388 12:59:21.198122    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1389 12:59:21.201566     PCI: 00:00.0
 1390 12:59:21.211278     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1391 12:59:21.218103     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1392 12:59:21.228216     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1393 12:59:21.238045     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1394 12:59:21.248305     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1395 12:59:21.258054     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1396 12:59:21.267988     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1397 12:59:21.274434     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1398 12:59:21.284187     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1399 12:59:21.294114     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1400 12:59:21.304622     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1401 12:59:21.314157     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1402 12:59:21.324260     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1403 12:59:21.330599     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1404 12:59:21.340577     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1405 12:59:21.350274     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1406 12:59:21.360063     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1407 12:59:21.369886     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1408 12:59:21.380402     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1409 12:59:21.389653     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1410 12:59:21.390153     PCI: 00:02.0
 1411 12:59:21.400042     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1412 12:59:21.413022     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1413 12:59:21.420009     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1414 12:59:21.426204     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1415 12:59:21.436618     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1416 12:59:21.437072      GENERIC: 0.0
 1417 12:59:21.439522     PCI: 00:05.0
 1418 12:59:21.449465     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1419 12:59:21.455882     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1420 12:59:21.456332      GENERIC: 0.0
 1421 12:59:21.459068     PCI: 00:08.0
 1422 12:59:21.469123     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1423 12:59:21.469734     PCI: 00:0a.0
 1424 12:59:21.475909     PCI: 00:0d.0 child on link 0 USB0 port 0
 1425 12:59:21.486256     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1426 12:59:21.488899      USB0 port 0 child on link 0 USB3 port 0
 1427 12:59:21.492319       USB3 port 0
 1428 12:59:21.492766       USB3 port 1
 1429 12:59:21.495382       USB3 port 2
 1430 12:59:21.495992       USB3 port 3
 1431 12:59:21.502191     PCI: 00:14.0 child on link 0 USB0 port 0
 1432 12:59:21.511785     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1433 12:59:21.515387      USB0 port 0 child on link 0 USB2 port 0
 1434 12:59:21.519014       USB2 port 0
 1435 12:59:21.519458       USB2 port 1
 1436 12:59:21.521936       USB2 port 2
 1437 12:59:21.522551       USB2 port 3
 1438 12:59:21.525201       USB2 port 4
 1439 12:59:21.525666       USB2 port 5
 1440 12:59:21.528615       USB2 port 6
 1441 12:59:21.529035       USB2 port 7
 1442 12:59:21.531915       USB2 port 8
 1443 12:59:21.532355       USB2 port 9
 1444 12:59:21.535475       USB3 port 0
 1445 12:59:21.535916       USB3 port 1
 1446 12:59:21.538380       USB3 port 2
 1447 12:59:21.541677       USB3 port 3
 1448 12:59:21.542303     PCI: 00:14.2
 1449 12:59:21.552107     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1450 12:59:21.561872     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1451 12:59:21.568086     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1452 12:59:21.578048     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1453 12:59:21.578656      GENERIC: 0.0
 1454 12:59:21.585415     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1455 12:59:21.594501     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1456 12:59:21.595080      I2C: 00:1a
 1457 12:59:21.598025      I2C: 00:31
 1458 12:59:21.598604      I2C: 00:32
 1459 12:59:21.601424     PCI: 00:15.1 child on link 0 I2C: 00:10
 1460 12:59:21.614618     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1461 12:59:21.615063      I2C: 00:10
 1462 12:59:21.617832     PCI: 00:15.2
 1463 12:59:21.627760     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1464 12:59:21.628264     PCI: 00:15.3
 1465 12:59:21.638083     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1466 12:59:21.640866     PCI: 00:16.0
 1467 12:59:21.650629     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1468 12:59:21.651253     PCI: 00:19.0
 1469 12:59:21.657463     PCI: 00:19.1 child on link 0 I2C: 00:15
 1470 12:59:21.667919     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1471 12:59:21.668429      I2C: 00:15
 1472 12:59:21.673938     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1473 12:59:21.684202     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1474 12:59:21.694186     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1475 12:59:21.704056     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1476 12:59:21.707278      GENERIC: 0.0
 1477 12:59:21.707764      PCI: 01:00.0
 1478 12:59:21.717091      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1479 12:59:21.730337      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
 1480 12:59:21.740139      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
 1481 12:59:21.740729     PCI: 00:1e.0
 1482 12:59:21.753502     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1483 12:59:21.756417     PCI: 00:1e.2 child on link 0 SPI: 00
 1484 12:59:21.766492     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1485 12:59:21.766991      SPI: 00
 1486 12:59:21.773108     PCI: 00:1e.3 child on link 0 SPI: 00
 1487 12:59:21.783032     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1488 12:59:21.783602      SPI: 00
 1489 12:59:21.786413     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1490 12:59:21.796482     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1491 12:59:21.799732      PNP: 0c09.0
 1492 12:59:21.805658      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1493 12:59:21.812865     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1494 12:59:21.822391     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1495 12:59:21.828934     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1496 12:59:21.836143      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1497 12:59:21.836593       GENERIC: 0.0
 1498 12:59:21.838979       GENERIC: 1.0
 1499 12:59:21.839423     PCI: 00:1f.3
 1500 12:59:21.849359     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1501 12:59:21.862473     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1502 12:59:21.863002     PCI: 00:1f.5
 1503 12:59:21.872742     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1504 12:59:21.879114    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1505 12:59:21.879724     APIC: 00
 1506 12:59:21.880119     APIC: 01
 1507 12:59:21.881970     APIC: 03
 1508 12:59:21.882524     APIC: 05
 1509 12:59:21.883066     APIC: 07
 1510 12:59:21.885307     APIC: 06
 1511 12:59:21.885906     APIC: 02
 1512 12:59:21.888566     APIC: 04
 1513 12:59:21.889114  Done allocating resources.
 1514 12:59:21.895713  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
 1515 12:59:21.901534  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1516 12:59:21.904807  Configure GPIOs for I2S audio on UP4.
 1517 12:59:21.912327  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1518 12:59:21.915947  Enabling resources...
 1519 12:59:21.919304  PCI: 00:00.0 subsystem <- 8086/9a12
 1520 12:59:21.922767  PCI: 00:00.0 cmd <- 06
 1521 12:59:21.925971  PCI: 00:02.0 subsystem <- 8086/9a40
 1522 12:59:21.929222  PCI: 00:02.0 cmd <- 03
 1523 12:59:21.932156  PCI: 00:04.0 subsystem <- 8086/9a03
 1524 12:59:21.935799  PCI: 00:04.0 cmd <- 02
 1525 12:59:21.939134  PCI: 00:05.0 subsystem <- 8086/9a19
 1526 12:59:21.939621  PCI: 00:05.0 cmd <- 02
 1527 12:59:21.945967  PCI: 00:08.0 subsystem <- 8086/9a11
 1528 12:59:21.946493  PCI: 00:08.0 cmd <- 06
 1529 12:59:21.949086  PCI: 00:0d.0 subsystem <- 8086/9a13
 1530 12:59:21.952451  PCI: 00:0d.0 cmd <- 02
 1531 12:59:21.955361  PCI: 00:14.0 subsystem <- 8086/a0ed
 1532 12:59:21.958766  PCI: 00:14.0 cmd <- 02
 1533 12:59:21.962532  PCI: 00:14.2 subsystem <- 8086/a0ef
 1534 12:59:21.965566  PCI: 00:14.2 cmd <- 02
 1535 12:59:21.968979  PCI: 00:14.3 subsystem <- 8086/a0f0
 1536 12:59:21.971696  PCI: 00:14.3 cmd <- 02
 1537 12:59:21.975287  PCI: 00:15.0 subsystem <- 8086/a0e8
 1538 12:59:21.978870  PCI: 00:15.0 cmd <- 02
 1539 12:59:21.981741  PCI: 00:15.1 subsystem <- 8086/a0e9
 1540 12:59:21.985227  PCI: 00:15.1 cmd <- 02
 1541 12:59:21.988217  PCI: 00:15.2 subsystem <- 8086/a0ea
 1542 12:59:21.988679  PCI: 00:15.2 cmd <- 02
 1543 12:59:21.995214  PCI: 00:15.3 subsystem <- 8086/a0eb
 1544 12:59:21.995745  PCI: 00:15.3 cmd <- 02
 1545 12:59:21.998322  PCI: 00:16.0 subsystem <- 8086/a0e0
 1546 12:59:22.002062  PCI: 00:16.0 cmd <- 02
 1547 12:59:22.005222  PCI: 00:19.1 subsystem <- 8086/a0c6
 1548 12:59:22.008461  PCI: 00:19.1 cmd <- 02
 1549 12:59:22.011785  PCI: 00:1d.0 bridge ctrl <- 0013
 1550 12:59:22.014967  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1551 12:59:22.018775  PCI: 00:1d.0 cmd <- 06
 1552 12:59:22.021937  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1553 12:59:22.024675  PCI: 00:1e.0 cmd <- 06
 1554 12:59:22.028298  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1555 12:59:22.031835  PCI: 00:1e.2 cmd <- 06
 1556 12:59:22.035411  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1557 12:59:22.038050  PCI: 00:1e.3 cmd <- 02
 1558 12:59:22.041359  PCI: 00:1f.0 subsystem <- 8086/a087
 1559 12:59:22.041836  PCI: 00:1f.0 cmd <- 407
 1560 12:59:22.048429  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1561 12:59:22.048879  PCI: 00:1f.3 cmd <- 02
 1562 12:59:22.052034  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1563 12:59:22.054714  PCI: 00:1f.5 cmd <- 406
 1564 12:59:22.059986  PCI: 01:00.0 cmd <- 02
 1565 12:59:22.064750  done.
 1566 12:59:22.067684  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1567 12:59:22.071080  Initializing devices...
 1568 12:59:22.074561  Root Device init
 1569 12:59:22.077433  Chrome EC: Set SMI mask to 0x0000000000000000
 1570 12:59:22.084258  Chrome EC: clear events_b mask to 0x0000000000000000
 1571 12:59:22.090622  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1572 12:59:22.097812  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1573 12:59:22.103906  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1574 12:59:22.107702  Chrome EC: Set WAKE mask to 0x0000000000000000
 1575 12:59:22.114739  fw_config match found: DB_USB=USB3_ACTIVE
 1576 12:59:22.117797  Configure Right Type-C port orientation for retimer
 1577 12:59:22.121083  Root Device init finished in 45 msecs
 1578 12:59:22.125181  PCI: 00:00.0 init
 1579 12:59:22.128620  CPU TDP = 9 Watts
 1580 12:59:22.129042  CPU PL1 = 9 Watts
 1581 12:59:22.132099  CPU PL2 = 40 Watts
 1582 12:59:22.135596  CPU PL4 = 83 Watts
 1583 12:59:22.138938  PCI: 00:00.0 init finished in 8 msecs
 1584 12:59:22.139295  PCI: 00:02.0 init
 1585 12:59:22.141797  GMA: Found VBT in CBFS
 1586 12:59:22.145202  GMA: Found valid VBT in CBFS
 1587 12:59:22.151995  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1588 12:59:22.158410                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1589 12:59:22.161765  PCI: 00:02.0 init finished in 18 msecs
 1590 12:59:22.165175  PCI: 00:05.0 init
 1591 12:59:22.168605  PCI: 00:05.0 init finished in 0 msecs
 1592 12:59:22.171546  PCI: 00:08.0 init
 1593 12:59:22.175194  PCI: 00:08.0 init finished in 0 msecs
 1594 12:59:22.178169  PCI: 00:14.0 init
 1595 12:59:22.181836  PCI: 00:14.0 init finished in 0 msecs
 1596 12:59:22.185029  PCI: 00:14.2 init
 1597 12:59:22.188401  PCI: 00:14.2 init finished in 0 msecs
 1598 12:59:22.191935  PCI: 00:15.0 init
 1599 12:59:22.192249  I2C bus 0 version 0x3230302a
 1600 12:59:22.198087  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1601 12:59:22.201574  PCI: 00:15.0 init finished in 6 msecs
 1602 12:59:22.201910  PCI: 00:15.1 init
 1603 12:59:22.205334  I2C bus 1 version 0x3230302a
 1604 12:59:22.208593  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1605 12:59:22.214717  PCI: 00:15.1 init finished in 6 msecs
 1606 12:59:22.215027  PCI: 00:15.2 init
 1607 12:59:22.218078  I2C bus 2 version 0x3230302a
 1608 12:59:22.221565  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1609 12:59:22.224751  PCI: 00:15.2 init finished in 6 msecs
 1610 12:59:22.227910  PCI: 00:15.3 init
 1611 12:59:22.231534  I2C bus 3 version 0x3230302a
 1612 12:59:22.234879  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1613 12:59:22.237874  PCI: 00:15.3 init finished in 6 msecs
 1614 12:59:22.241624  PCI: 00:16.0 init
 1615 12:59:22.244698  PCI: 00:16.0 init finished in 0 msecs
 1616 12:59:22.247940  PCI: 00:19.1 init
 1617 12:59:22.251214  I2C bus 5 version 0x3230302a
 1618 12:59:22.254536  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1619 12:59:22.257588  PCI: 00:19.1 init finished in 6 msecs
 1620 12:59:22.260982  PCI: 00:1d.0 init
 1621 12:59:22.261290  Initializing PCH PCIe bridge.
 1622 12:59:22.267939  PCI: 00:1d.0 init finished in 3 msecs
 1623 12:59:22.271212  PCI: 00:1f.0 init
 1624 12:59:22.274751  IOAPIC: Initializing IOAPIC at 0xfec00000
 1625 12:59:22.278099  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1626 12:59:22.281460  IOAPIC: ID = 0x02
 1627 12:59:22.284475  IOAPIC: Dumping registers
 1628 12:59:22.285008    reg 0x0000: 0x02000000
 1629 12:59:22.287630    reg 0x0001: 0x00770020
 1630 12:59:22.291247    reg 0x0002: 0x00000000
 1631 12:59:22.294685  PCI: 00:1f.0 init finished in 21 msecs
 1632 12:59:22.297533  PCI: 00:1f.2 init
 1633 12:59:22.301711  Disabling ACPI via APMC.
 1634 12:59:22.302142  APMC done.
 1635 12:59:22.304403  PCI: 00:1f.2 init finished in 5 msecs
 1636 12:59:22.317865  PCI: 01:00.0 init
 1637 12:59:22.321171  PCI: 01:00.0 init finished in 0 msecs
 1638 12:59:22.324832  PNP: 0c09.0 init
 1639 12:59:22.328022  Google Chrome EC uptime: 8.427 seconds
 1640 12:59:22.334272  Google Chrome AP resets since EC boot: 1
 1641 12:59:22.337744  Google Chrome most recent AP reset causes:
 1642 12:59:22.340979  	0.346: 32775 shutdown: entering G3
 1643 12:59:22.348231  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1644 12:59:22.350941  PNP: 0c09.0 init finished in 22 msecs
 1645 12:59:22.356824  Devices initialized
 1646 12:59:22.360552  Show all devs... After init.
 1647 12:59:22.363279  Root Device: enabled 1
 1648 12:59:22.363683  DOMAIN: 0000: enabled 1
 1649 12:59:22.366887  CPU_CLUSTER: 0: enabled 1
 1650 12:59:22.369869  PCI: 00:00.0: enabled 1
 1651 12:59:22.373312  PCI: 00:02.0: enabled 1
 1652 12:59:22.373714  PCI: 00:04.0: enabled 1
 1653 12:59:22.376944  PCI: 00:05.0: enabled 1
 1654 12:59:22.379734  PCI: 00:06.0: enabled 0
 1655 12:59:22.383117  PCI: 00:07.0: enabled 0
 1656 12:59:22.383513  PCI: 00:07.1: enabled 0
 1657 12:59:22.386632  PCI: 00:07.2: enabled 0
 1658 12:59:22.390056  PCI: 00:07.3: enabled 0
 1659 12:59:22.393441  PCI: 00:08.0: enabled 1
 1660 12:59:22.393854  PCI: 00:09.0: enabled 0
 1661 12:59:22.396780  PCI: 00:0a.0: enabled 0
 1662 12:59:22.400168  PCI: 00:0d.0: enabled 1
 1663 12:59:22.403622  PCI: 00:0d.1: enabled 0
 1664 12:59:22.404099  PCI: 00:0d.2: enabled 0
 1665 12:59:22.407295  PCI: 00:0d.3: enabled 0
 1666 12:59:22.410420  PCI: 00:0e.0: enabled 0
 1667 12:59:22.410822  PCI: 00:10.2: enabled 1
 1668 12:59:22.413317  PCI: 00:10.6: enabled 0
 1669 12:59:22.416674  PCI: 00:10.7: enabled 0
 1670 12:59:22.419775  PCI: 00:12.0: enabled 0
 1671 12:59:22.420246  PCI: 00:12.6: enabled 0
 1672 12:59:22.423781  PCI: 00:13.0: enabled 0
 1673 12:59:22.426282  PCI: 00:14.0: enabled 1
 1674 12:59:22.430072  PCI: 00:14.1: enabled 0
 1675 12:59:22.430470  PCI: 00:14.2: enabled 1
 1676 12:59:22.433059  PCI: 00:14.3: enabled 1
 1677 12:59:22.436330  PCI: 00:15.0: enabled 1
 1678 12:59:22.439673  PCI: 00:15.1: enabled 1
 1679 12:59:22.440067  PCI: 00:15.2: enabled 1
 1680 12:59:22.443117  PCI: 00:15.3: enabled 1
 1681 12:59:22.446415  PCI: 00:16.0: enabled 1
 1682 12:59:22.446818  PCI: 00:16.1: enabled 0
 1683 12:59:22.449567  PCI: 00:16.2: enabled 0
 1684 12:59:22.452959  PCI: 00:16.3: enabled 0
 1685 12:59:22.456243  PCI: 00:16.4: enabled 0
 1686 12:59:22.456643  PCI: 00:16.5: enabled 0
 1687 12:59:22.459737  PCI: 00:17.0: enabled 0
 1688 12:59:22.463330  PCI: 00:19.0: enabled 0
 1689 12:59:22.466229  PCI: 00:19.1: enabled 1
 1690 12:59:22.466639  PCI: 00:19.2: enabled 0
 1691 12:59:22.469513  PCI: 00:1c.0: enabled 1
 1692 12:59:22.472725  PCI: 00:1c.1: enabled 0
 1693 12:59:22.476136  PCI: 00:1c.2: enabled 0
 1694 12:59:22.476560  PCI: 00:1c.3: enabled 0
 1695 12:59:22.479809  PCI: 00:1c.4: enabled 0
 1696 12:59:22.482646  PCI: 00:1c.5: enabled 0
 1697 12:59:22.486163  PCI: 00:1c.6: enabled 1
 1698 12:59:22.486572  PCI: 00:1c.7: enabled 0
 1699 12:59:22.489826  PCI: 00:1d.0: enabled 1
 1700 12:59:22.493228  PCI: 00:1d.1: enabled 0
 1701 12:59:22.493639  PCI: 00:1d.2: enabled 1
 1702 12:59:22.496503  PCI: 00:1d.3: enabled 0
 1703 12:59:22.499698  PCI: 00:1e.0: enabled 1
 1704 12:59:22.502883  PCI: 00:1e.1: enabled 0
 1705 12:59:22.503291  PCI: 00:1e.2: enabled 1
 1706 12:59:22.506331  PCI: 00:1e.3: enabled 1
 1707 12:59:22.509969  PCI: 00:1f.0: enabled 1
 1708 12:59:22.513263  PCI: 00:1f.1: enabled 0
 1709 12:59:22.513670  PCI: 00:1f.2: enabled 1
 1710 12:59:22.516286  PCI: 00:1f.3: enabled 1
 1711 12:59:22.519412  PCI: 00:1f.4: enabled 0
 1712 12:59:22.522667  PCI: 00:1f.5: enabled 1
 1713 12:59:22.523076  PCI: 00:1f.6: enabled 0
 1714 12:59:22.526222  PCI: 00:1f.7: enabled 0
 1715 12:59:22.529285  APIC: 00: enabled 1
 1716 12:59:22.529707  GENERIC: 0.0: enabled 1
 1717 12:59:22.532727  GENERIC: 0.0: enabled 1
 1718 12:59:22.536224  GENERIC: 1.0: enabled 1
 1719 12:59:22.539370  GENERIC: 0.0: enabled 1
 1720 12:59:22.539823  GENERIC: 1.0: enabled 1
 1721 12:59:22.542843  USB0 port 0: enabled 1
 1722 12:59:22.546240  GENERIC: 0.0: enabled 1
 1723 12:59:22.546641  USB0 port 0: enabled 1
 1724 12:59:22.549239  GENERIC: 0.0: enabled 1
 1725 12:59:22.552917  I2C: 00:1a: enabled 1
 1726 12:59:22.555714  I2C: 00:31: enabled 1
 1727 12:59:22.556115  I2C: 00:32: enabled 1
 1728 12:59:22.559556  I2C: 00:10: enabled 1
 1729 12:59:22.562834  I2C: 00:15: enabled 1
 1730 12:59:22.563244  GENERIC: 0.0: enabled 0
 1731 12:59:22.565619  GENERIC: 1.0: enabled 0
 1732 12:59:22.569055  GENERIC: 0.0: enabled 1
 1733 12:59:22.569466  SPI: 00: enabled 1
 1734 12:59:22.572459  SPI: 00: enabled 1
 1735 12:59:22.575793  PNP: 0c09.0: enabled 1
 1736 12:59:22.576206  GENERIC: 0.0: enabled 1
 1737 12:59:22.579118  USB3 port 0: enabled 1
 1738 12:59:22.582257  USB3 port 1: enabled 1
 1739 12:59:22.585607  USB3 port 2: enabled 0
 1740 12:59:22.586027  USB3 port 3: enabled 0
 1741 12:59:22.589460  USB2 port 0: enabled 0
 1742 12:59:22.592342  USB2 port 1: enabled 1
 1743 12:59:22.592788  USB2 port 2: enabled 1
 1744 12:59:22.596324  USB2 port 3: enabled 0
 1745 12:59:22.599110  USB2 port 4: enabled 1
 1746 12:59:22.602132  USB2 port 5: enabled 0
 1747 12:59:22.602583  USB2 port 6: enabled 0
 1748 12:59:22.605619  USB2 port 7: enabled 0
 1749 12:59:22.608857  USB2 port 8: enabled 0
 1750 12:59:22.609304  USB2 port 9: enabled 0
 1751 12:59:22.612734  USB3 port 0: enabled 0
 1752 12:59:22.615676  USB3 port 1: enabled 1
 1753 12:59:22.616293  USB3 port 2: enabled 0
 1754 12:59:22.619182  USB3 port 3: enabled 0
 1755 12:59:22.622146  GENERIC: 0.0: enabled 1
 1756 12:59:22.625447  GENERIC: 1.0: enabled 1
 1757 12:59:22.626043  APIC: 01: enabled 1
 1758 12:59:22.628733  APIC: 03: enabled 1
 1759 12:59:22.629277  APIC: 05: enabled 1
 1760 12:59:22.632311  APIC: 07: enabled 1
 1761 12:59:22.635632  APIC: 06: enabled 1
 1762 12:59:22.636211  APIC: 02: enabled 1
 1763 12:59:22.638599  APIC: 04: enabled 1
 1764 12:59:22.642568  PCI: 01:00.0: enabled 1
 1765 12:59:22.645658  BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
 1766 12:59:22.652337  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1767 12:59:22.656166  ELOG: NV offset 0xf30000 size 0x1000
 1768 12:59:22.661902  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1769 12:59:22.668597  ELOG: Event(17) added with size 13 at 2022-08-31 12:49:35 UTC
 1770 12:59:22.675500  ELOG: Event(92) added with size 9 at 2022-08-31 12:49:35 UTC
 1771 12:59:22.681707  ELOG: Event(16) added with size 11 at 2022-08-31 12:49:35 UTC
 1772 12:59:22.684869  Erasing flash addr f30000 + 4 KiB
 1773 12:59:22.741478  ELOG: Event(93) added with size 9 at 2022-08-31 12:49:35 UTC
 1774 12:59:22.748052  ELOG: Event(9E) added with size 10 at 2022-08-31 12:49:35 UTC
 1775 12:59:22.755089  ELOG: Event(9F) added with size 14 at 2022-08-31 12:49:35 UTC
 1776 12:59:22.761687  BS: BS_DEV_INIT exit times (exec / console): 30 / 55 ms
 1777 12:59:22.767514  ELOG: Event(A1) added with size 10 at 2022-08-31 12:49:35 UTC
 1778 12:59:22.774532  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1779 12:59:22.780946  ELOG: Event(A0) added with size 9 at 2022-08-31 12:49:35 UTC
 1780 12:59:22.784093  elog_add_boot_reason: Logged dev mode boot
 1781 12:59:22.790939  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
 1782 12:59:22.794698  Finalize devices...
 1783 12:59:22.795173  Devices finalized
 1784 12:59:22.801165  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1785 12:59:22.807738  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1786 12:59:22.811253  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1787 12:59:22.817937  ME: HFSTS1                      : 0x80030055
 1788 12:59:22.820671  ME: HFSTS2                      : 0x30280116
 1789 12:59:22.823983  ME: HFSTS3                      : 0x00000050
 1790 12:59:22.830837  ME: HFSTS4                      : 0x00004000
 1791 12:59:22.834258  ME: HFSTS5                      : 0x00000000
 1792 12:59:22.837440  ME: HFSTS6                      : 0x00400006
 1793 12:59:22.843490  ME: Manufacturing Mode          : YES
 1794 12:59:22.847079  ME: SPI Protection Mode Enabled : NO
 1795 12:59:22.850419  ME: FW Partition Table          : OK
 1796 12:59:22.853730  ME: Bringup Loader Failure      : NO
 1797 12:59:22.857425  ME: Firmware Init Complete      : NO
 1798 12:59:22.860607  ME: Boot Options Present        : NO
 1799 12:59:22.863787  ME: Update In Progress          : NO
 1800 12:59:22.870498  ME: D0i3 Support                : YES
 1801 12:59:22.873241  ME: Low Power State Enabled     : NO
 1802 12:59:22.876888  ME: CPU Replaced                : YES
 1803 12:59:22.880063  ME: CPU Replacement Valid       : YES
 1804 12:59:22.883438  ME: Current Working State       : 5
 1805 12:59:22.886803  ME: Current Operation State     : 1
 1806 12:59:22.890390  ME: Current Operation Mode      : 3
 1807 12:59:22.893251  ME: Error Code                  : 0
 1808 12:59:22.896728  ME: Enhanced Debug Mode         : NO
 1809 12:59:22.903354  ME: CPU Debug Disabled          : YES
 1810 12:59:22.906497  ME: TXT Support                 : NO
 1811 12:59:22.913064  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1812 12:59:22.919757  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1813 12:59:22.923083  CBFS: 'fallback/slic' not found.
 1814 12:59:22.926266  ACPI: Writing ACPI tables at 76b01000.
 1815 12:59:22.929514  ACPI:    * FACS
 1816 12:59:22.930138  ACPI:    * DSDT
 1817 12:59:22.932632  Ramoops buffer: 0x100000@0x76a00000.
 1818 12:59:22.939942  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1819 12:59:22.942624  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1820 12:59:22.946270  Google Chrome EC: version:
 1821 12:59:22.949286  	ro: voema_v2.0.7540-147f8d37d1
 1822 12:59:22.952603  	rw: voema_v2.0.7540-147f8d37d1
 1823 12:59:22.956045    running image: 2
 1824 12:59:22.962539  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
 1825 12:59:22.966035  ACPI:    * FADT
 1826 12:59:22.966473  SCI is IRQ9
 1827 12:59:22.969042  ACPI: added table 1/32, length now 40
 1828 12:59:22.972605  ACPI:     * SSDT
 1829 12:59:22.975983  Found 1 CPU(s) with 8 core(s) each.
 1830 12:59:22.978945  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1831 12:59:22.985497  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1832 12:59:22.988858  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1833 12:59:22.992149  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1834 12:59:22.998641  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1835 12:59:23.005339  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1836 12:59:23.008443  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1837 12:59:23.015681  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1838 12:59:23.021937  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1839 12:59:23.025618  \_SB.PCI0.RP09: Added StorageD3Enable property
 1840 12:59:23.031662  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1841 12:59:23.034857  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1842 12:59:23.041591  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1843 12:59:23.044913  PS2K: Passing 80 keymaps to kernel
 1844 12:59:23.051635  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1845 12:59:23.058346  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1846 12:59:23.064568  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1847 12:59:23.071532  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1848 12:59:23.078227  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1849 12:59:23.084949  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1850 12:59:23.091699  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1851 12:59:23.097971  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1852 12:59:23.101303  ACPI: added table 2/32, length now 44
 1853 12:59:23.101762  ACPI:    * MCFG
 1854 12:59:23.104654  ACPI: added table 3/32, length now 48
 1855 12:59:23.107608  ACPI:    * TPM2
 1856 12:59:23.111290  TPM2 log created at 0x769f0000
 1857 12:59:23.114550  ACPI: added table 4/32, length now 52
 1858 12:59:23.115006  ACPI:    * MADT
 1859 12:59:23.117460  SCI is IRQ9
 1860 12:59:23.121336  ACPI: added table 5/32, length now 56
 1861 12:59:23.124927  current = 76b09850
 1862 12:59:23.125423  ACPI:    * DMAR
 1863 12:59:23.127787  ACPI: added table 6/32, length now 60
 1864 12:59:23.130698  ACPI: added table 7/32, length now 64
 1865 12:59:23.134166  ACPI:    * HPET
 1866 12:59:23.137548  ACPI: added table 8/32, length now 68
 1867 12:59:23.138061  ACPI: done.
 1868 12:59:23.140900  ACPI tables: 35216 bytes.
 1869 12:59:23.143865  smbios_write_tables: 769ef000
 1870 12:59:23.147865  EC returned error result code 3
 1871 12:59:23.151357  Couldn't obtain OEM name from CBI
 1872 12:59:23.154947  Create SMBIOS type 16
 1873 12:59:23.158701  Create SMBIOS type 17
 1874 12:59:23.161981  GENERIC: 0.0 (WIFI Device)
 1875 12:59:23.164969  SMBIOS tables: 1750 bytes.
 1876 12:59:23.168312  Writing table forward entry at 0x00000500
 1877 12:59:23.175032  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1878 12:59:23.178000  Writing coreboot table at 0x76b25000
 1879 12:59:23.184766   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1880 12:59:23.188136   1. 0000000000001000-000000000009ffff: RAM
 1881 12:59:23.191710   2. 00000000000a0000-00000000000fffff: RESERVED
 1882 12:59:23.197871   3. 0000000000100000-00000000769eefff: RAM
 1883 12:59:23.201299   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1884 12:59:23.208120   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1885 12:59:23.214680   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1886 12:59:23.217919   7. 0000000077000000-000000007fbfffff: RESERVED
 1887 12:59:23.224344   8. 00000000c0000000-00000000cfffffff: RESERVED
 1888 12:59:23.227897   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1889 12:59:23.231311  10. 00000000fb000000-00000000fb000fff: RESERVED
 1890 12:59:23.238074  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1891 12:59:23.241220  12. 00000000fed80000-00000000fed87fff: RESERVED
 1892 12:59:23.247686  13. 00000000fed90000-00000000fed92fff: RESERVED
 1893 12:59:23.251116  14. 00000000feda0000-00000000feda1fff: RESERVED
 1894 12:59:23.257648  15. 00000000fedc0000-00000000feddffff: RESERVED
 1895 12:59:23.260939  16. 0000000100000000-00000002803fffff: RAM
 1896 12:59:23.264280  Passing 4 GPIOs to payload:
 1897 12:59:23.267884              NAME |       PORT | POLARITY |     VALUE
 1898 12:59:23.274068               lid |  undefined |     high |      high
 1899 12:59:23.281137             power |  undefined |     high |       low
 1900 12:59:23.284271             oprom |  undefined |     high |       low
 1901 12:59:23.290540          EC in RW | 0x000000e5 |     high |      high
 1902 12:59:23.297953  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2992
 1903 12:59:23.298471  coreboot table: 1576 bytes.
 1904 12:59:23.304694  IMD ROOT    0. 0x76fff000 0x00001000
 1905 12:59:23.307396  IMD SMALL   1. 0x76ffe000 0x00001000
 1906 12:59:23.310976  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1907 12:59:23.314297  VPD         3. 0x76c4d000 0x00000367
 1908 12:59:23.317671  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1909 12:59:23.321097  CONSOLE     5. 0x76c2c000 0x00020000
 1910 12:59:23.324112  FMAP        6. 0x76c2b000 0x00000578
 1911 12:59:23.327256  TIME STAMP  7. 0x76c2a000 0x00000910
 1912 12:59:23.334317  VBOOT WORK  8. 0x76c16000 0x00014000
 1913 12:59:23.337616  ROMSTG STCK 9. 0x76c15000 0x00001000
 1914 12:59:23.340842  AFTER CAR  10. 0x76c0a000 0x0000b000
 1915 12:59:23.343902  RAMSTAGE   11. 0x76b97000 0x00073000
 1916 12:59:23.347323  REFCODE    12. 0x76b42000 0x00055000
 1917 12:59:23.350825  SMM BACKUP 13. 0x76b32000 0x00010000
 1918 12:59:23.354249  4f444749   14. 0x76b30000 0x00002000
 1919 12:59:23.357438  EXT VBT15. 0x76b2d000 0x0000219f
 1920 12:59:23.360673  COREBOOT   16. 0x76b25000 0x00008000
 1921 12:59:23.367299  ACPI       17. 0x76b01000 0x00024000
 1922 12:59:23.370320  ACPI GNVS  18. 0x76b00000 0x00001000
 1923 12:59:23.373904  RAMOOPS    19. 0x76a00000 0x00100000
 1924 12:59:23.377112  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1925 12:59:23.380850  SMBIOS     21. 0x769ef000 0x00000800
 1926 12:59:23.383988  IMD small region:
 1927 12:59:23.386849    IMD ROOT    0. 0x76ffec00 0x00000400
 1928 12:59:23.390810    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1929 12:59:23.393605    POWER STATE 2. 0x76ffeb80 0x00000044
 1930 12:59:23.397327    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1931 12:59:23.403484    MEM INFO    4. 0x76ffe980 0x000001e0
 1932 12:59:23.407101  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
 1933 12:59:23.410732  MTRR: Physical address space:
 1934 12:59:23.417240  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1935 12:59:23.423598  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1936 12:59:23.430207  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1937 12:59:23.437042  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1938 12:59:23.443803  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1939 12:59:23.450352  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1940 12:59:23.453540  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
 1941 12:59:23.460057  MTRR: Fixed MSR 0x250 0x0606060606060606
 1942 12:59:23.463490  MTRR: Fixed MSR 0x258 0x0606060606060606
 1943 12:59:23.467206  MTRR: Fixed MSR 0x259 0x0000000000000000
 1944 12:59:23.469998  MTRR: Fixed MSR 0x268 0x0606060606060606
 1945 12:59:23.476722  MTRR: Fixed MSR 0x269 0x0606060606060606
 1946 12:59:23.480307  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1947 12:59:23.483219  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1948 12:59:23.486783  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1949 12:59:23.493692  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1950 12:59:23.496851  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1951 12:59:23.499833  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1952 12:59:23.503214  call enable_fixed_mtrr()
 1953 12:59:23.506917  CPU physical address size: 39 bits
 1954 12:59:23.513242  MTRR: default type WB/UC MTRR counts: 6/6.
 1955 12:59:23.516271  MTRR: UC selected as default type.
 1956 12:59:23.519756  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1957 12:59:23.526638  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1958 12:59:23.532913  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1959 12:59:23.539938  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1960 12:59:23.546680  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1961 12:59:23.552820  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
 1962 12:59:23.553284  
 1963 12:59:23.556137  MTRR check
 1964 12:59:23.556598  Fixed MTRRs   : Enabled
 1965 12:59:23.559842  Variable MTRRs: Enabled
 1966 12:59:23.560307  
 1967 12:59:23.562769  MTRR: Fixed MSR 0x250 0x0606060606060606
 1968 12:59:23.569648  MTRR: Fixed MSR 0x258 0x0606060606060606
 1969 12:59:23.573017  MTRR: Fixed MSR 0x259 0x0000000000000000
 1970 12:59:23.576273  MTRR: Fixed MSR 0x268 0x0606060606060606
 1971 12:59:23.579674  MTRR: Fixed MSR 0x269 0x0606060606060606
 1972 12:59:23.585842  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1973 12:59:23.589329  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1974 12:59:23.592850  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1975 12:59:23.595659  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1976 12:59:23.602376  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1977 12:59:23.605972  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1978 12:59:23.612717  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
 1979 12:59:23.616314  call enable_fixed_mtrr()
 1980 12:59:23.619749  Checking cr50 for pending updates
 1981 12:59:23.622808  CPU physical address size: 39 bits
 1982 12:59:23.626362  MTRR: Fixed MSR 0x250 0x0606060606060606
 1983 12:59:23.629657  MTRR: Fixed MSR 0x250 0x0606060606060606
 1984 12:59:23.633172  MTRR: Fixed MSR 0x258 0x0606060606060606
 1985 12:59:23.639893  MTRR: Fixed MSR 0x259 0x0000000000000000
 1986 12:59:23.642891  MTRR: Fixed MSR 0x268 0x0606060606060606
 1987 12:59:23.646025  MTRR: Fixed MSR 0x269 0x0606060606060606
 1988 12:59:23.649432  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1989 12:59:23.656078  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1990 12:59:23.659222  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1991 12:59:23.662498  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1992 12:59:23.665924  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1993 12:59:23.672186  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1994 12:59:23.675760  MTRR: Fixed MSR 0x258 0x0606060606060606
 1995 12:59:23.679089  call enable_fixed_mtrr()
 1996 12:59:23.682577  MTRR: Fixed MSR 0x259 0x0000000000000000
 1997 12:59:23.686225  MTRR: Fixed MSR 0x268 0x0606060606060606
 1998 12:59:23.692210  MTRR: Fixed MSR 0x269 0x0606060606060606
 1999 12:59:23.695804  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2000 12:59:23.699055  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2001 12:59:23.702506  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2002 12:59:23.708980  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2003 12:59:23.712690  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2004 12:59:23.715814  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2005 12:59:23.718875  CPU physical address size: 39 bits
 2006 12:59:23.722786  call enable_fixed_mtrr()
 2007 12:59:23.726354  MTRR: Fixed MSR 0x250 0x0606060606060606
 2008 12:59:23.733094  MTRR: Fixed MSR 0x250 0x0606060606060606
 2009 12:59:23.736087  MTRR: Fixed MSR 0x258 0x0606060606060606
 2010 12:59:23.739543  MTRR: Fixed MSR 0x259 0x0000000000000000
 2011 12:59:23.743104  MTRR: Fixed MSR 0x268 0x0606060606060606
 2012 12:59:23.749404  MTRR: Fixed MSR 0x269 0x0606060606060606
 2013 12:59:23.752881  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2014 12:59:23.756516  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2015 12:59:23.759118  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2016 12:59:23.766451  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2017 12:59:23.769105  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2018 12:59:23.772790  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2019 12:59:23.779298  MTRR: Fixed MSR 0x258 0x0606060606060606
 2020 12:59:23.779808  call enable_fixed_mtrr()
 2021 12:59:23.786233  MTRR: Fixed MSR 0x259 0x0000000000000000
 2022 12:59:23.789451  MTRR: Fixed MSR 0x268 0x0606060606060606
 2023 12:59:23.792520  MTRR: Fixed MSR 0x269 0x0606060606060606
 2024 12:59:23.795989  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2025 12:59:23.802390  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2026 12:59:23.805823  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2027 12:59:23.809109  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2028 12:59:23.812448  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2029 12:59:23.819104  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2030 12:59:23.822268  CPU physical address size: 39 bits
 2031 12:59:23.825982  call enable_fixed_mtrr()
 2032 12:59:23.829408  Reading cr50 TPM mode
 2033 12:59:23.833946  CPU physical address size: 39 bits
 2034 12:59:23.836472  CPU physical address size: 39 bits
 2035 12:59:23.839919  BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
 2036 12:59:23.846296  MTRR: Fixed MSR 0x250 0x0606060606060606
 2037 12:59:23.849661  MTRR: Fixed MSR 0x250 0x0606060606060606
 2038 12:59:23.853145  MTRR: Fixed MSR 0x258 0x0606060606060606
 2039 12:59:23.856526  MTRR: Fixed MSR 0x259 0x0000000000000000
 2040 12:59:23.862671  MTRR: Fixed MSR 0x268 0x0606060606060606
 2041 12:59:23.866474  MTRR: Fixed MSR 0x269 0x0606060606060606
 2042 12:59:23.869324  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2043 12:59:23.872651  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2044 12:59:23.879290  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2045 12:59:23.882932  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2046 12:59:23.886201  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2047 12:59:23.889586  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2048 12:59:23.896666  MTRR: Fixed MSR 0x258 0x0606060606060606
 2049 12:59:23.900107  MTRR: Fixed MSR 0x259 0x0000000000000000
 2050 12:59:23.903404  MTRR: Fixed MSR 0x268 0x0606060606060606
 2051 12:59:23.906188  MTRR: Fixed MSR 0x269 0x0606060606060606
 2052 12:59:23.913096  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2053 12:59:23.917103  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2054 12:59:23.919848  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2055 12:59:23.923173  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2056 12:59:23.929412  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2057 12:59:23.932896  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2058 12:59:23.936473  call enable_fixed_mtrr()
 2059 12:59:23.939648  call enable_fixed_mtrr()
 2060 12:59:23.945936  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2061 12:59:23.949839  CPU physical address size: 39 bits
 2062 12:59:23.952370  CPU physical address size: 39 bits
 2063 12:59:23.960107  Checking segment from ROM address 0xffc02b38
 2064 12:59:23.962700  Checking segment from ROM address 0xffc02b54
 2065 12:59:23.966254  Loading segment from ROM address 0xffc02b38
 2066 12:59:23.969531    code (compression=0)
 2067 12:59:23.979602    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2068 12:59:23.985800  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2069 12:59:23.989333  it's not compressed!
 2070 12:59:24.128372  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2071 12:59:24.134878  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2072 12:59:24.141303  Loading segment from ROM address 0xffc02b54
 2073 12:59:24.144647    Entry Point 0x30000000
 2074 12:59:24.145141  Loaded segments
 2075 12:59:24.150861  BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
 2076 12:59:24.194258  Finalizing chipset.
 2077 12:59:24.197651  Finalizing SMM.
 2078 12:59:24.198178  APMC done.
 2079 12:59:24.204270  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
 2080 12:59:24.207499  mp_park_aps done after 0 msecs.
 2081 12:59:24.211137  Jumping to boot code at 0x30000000(0x76b25000)
 2082 12:59:24.220329  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2083 12:59:24.220848  
 2084 12:59:24.223983  Starting depthcharge on Voema...
 2085 12:59:24.225268  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2086 12:59:24.225859  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2087 12:59:24.226413  Setting prompt string to ['volteer:']
 2088 12:59:24.226854  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2089 12:59:24.233982  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2090 12:59:24.240313  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2091 12:59:24.247091  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2092 12:59:24.250344  Failed to find eMMC card reader
 2093 12:59:24.250805  Wipe memory regions:
 2094 12:59:24.256823  	[0x00000000001000, 0x000000000a0000)
 2095 12:59:24.259977  	[0x00000000100000, 0x00000030000000)
 2096 12:59:24.288495  	[0x00000032662db0, 0x000000769ef000)
 2097 12:59:24.326665  	[0x00000100000000, 0x00000280400000)
 2098 12:59:24.532224  ec_init: CrosEC protocol v3 supported (256, 256)
 2099 12:59:24.538855  update_port_state: port C0 state: usb enable 1 mux conn 0
 2100 12:59:24.548989  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
 2101 12:59:24.555441  pmc_check_ipc_sts: STS_BUSY done after 1511 us
 2102 12:59:24.558818  send_conn_disc_msg: pmc_send_cmd succeeded
 2103 12:59:24.992785  R8152: Initializing
 2104 12:59:24.996271  Version 6 (ocp_data = 5c30)
 2105 12:59:24.999725  R8152: Done initializing
 2106 12:59:25.002660  Adding net device
 2107 12:59:25.307782  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2108 12:59:25.307921  
 2109 12:59:25.311648  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2111 12:59:25.412442  volteer: tftpboot 192.168.201.1 7148219/tftp-deploy-lb693xpb/kernel/bzImage 7148219/tftp-deploy-lb693xpb/kernel/cmdline 7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
 2112 12:59:25.412598  Setting prompt string to 'Starting kernel'
 2113 12:59:25.412677  Setting prompt string to ['Starting kernel']
 2114 12:59:25.412745  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2115 12:59:25.412817  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
 2116 12:59:25.417235  tftpboot 192.168.201.1 7148219/tftp-deploy-lb693xpb/kernel/bzImay-lb693xpb/kernel/cmdline 7148219/tftp-deploy-lb693xpb/ramdisk/ramdisk.cpio.gz
 2117 12:59:25.417328  Waiting for link
 2118 12:59:25.622248  done.
 2119 12:59:25.622396  MAC: 00:24:32:30:79:06
 2120 12:59:25.625392  Sending DHCP discover... done.
 2121 12:59:25.628914  Waiting for reply... done.
 2122 12:59:25.631819  Sending DHCP request... done.
 2123 12:59:25.635182  Waiting for reply... done.
 2124 12:59:25.638716  My ip is 192.168.201.14
 2125 12:59:25.641946  The DHCP server ip is 192.168.201.1
 2126 12:59:25.645366  TFTP server IP predefined by user: 192.168.201.1
 2127 12:59:25.651789  Bootfile predefined by user: 7148219/tftp-deploy-lb693xpb/kernel/bzImage
 2128 12:59:25.655137  Sending tftp read request... done.
 2129 12:59:25.658709  Waiting for the transfer... 
 2130 12:59:26.191248  00000000 ################################################################
 2131 12:59:26.744831  00080000 ################################################################
 2132 12:59:27.277677  00100000 ################################################################
 2133 12:59:27.794595  00180000 ################################################################
 2134 12:59:28.308821  00200000 ################################################################
 2135 12:59:28.826262  00280000 ################################################################
 2136 12:59:29.345599  00300000 ################################################################
 2137 12:59:29.862332  00380000 ################################################################
 2138 12:59:30.384214  00400000 ################################################################
 2139 12:59:30.907350  00480000 ################################################################
 2140 12:59:31.443609  00500000 ################################################################
 2141 12:59:31.962594  00580000 ################################################################
 2142 12:59:32.488091  00600000 ################################################################
 2143 12:59:33.022633  00680000 ################################################################
 2144 12:59:33.540722  00700000 ################################################################
 2145 12:59:34.057138  00780000 ################################################################
 2146 12:59:34.578393  00800000 ################################################################
 2147 12:59:34.620718  00880000 ###### done.
 2148 12:59:34.624479  The bootfile was 8953856 bytes long.
 2149 12:59:34.627049  Sending tftp read request... done.
 2150 12:59:34.630362  Waiting for the transfer... 
 2151 12:59:35.169909  00000000 ################################################################
 2152 12:59:35.713590  00080000 ################################################################
 2153 12:59:36.257794  00100000 ################################################################
 2154 12:59:36.797246  00180000 ################################################################
 2155 12:59:37.323584  00200000 ################################################################
 2156 12:59:37.856223  00280000 ################################################################
 2157 12:59:38.377643  00300000 ################################################################
 2158 12:59:38.907273  00380000 ################################################################
 2159 12:59:39.462896  00400000 ################################################################
 2160 12:59:40.015692  00480000 ################################################################
 2161 12:59:40.588958  00500000 ################################################################
 2162 12:59:41.126542  00580000 ################################################################
 2163 12:59:41.660267  00600000 ################################################################
 2164 12:59:42.192879  00680000 ################################################################
 2165 12:59:42.719049  00700000 ################################################################
 2166 12:59:43.243429  00780000 ################################################################
 2167 12:59:43.421315  00800000 ####################### done.
 2168 12:59:43.428069  Sending tftp read request... done.
 2169 12:59:43.428168  Waiting for the transfer... 
 2170 12:59:43.431020  00000000 # done.
 2171 12:59:43.440715  Command line loaded dynamically from TFTP file: 7148219/tftp-deploy-lb693xpb/kernel/cmdline
 2172 12:59:43.454314  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2173 12:59:43.462421  Shutting down all USB controllers.
 2174 12:59:43.462517  Removing current net device
 2175 12:59:43.465753  Finalizing coreboot
 2176 12:59:43.472196  Exiting depthcharge with code 4 at timestamp: 28031083
 2177 12:59:43.472285  
 2178 12:59:43.472355  Starting kernel ...
 2179 12:59:43.472434  
 2180 12:59:43.472495  
 2181 12:59:43.472796  end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
 2182 12:59:43.472895  start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
 2183 12:59:43.472972  Setting prompt string to ['Linux version [0-9]']
 2184 12:59:43.473043  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2185 12:59:43.473113  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2187 13:04:07.473862  end: 2.2.5 auto-login-action (duration 00:04:24) [common]
 2189 13:04:07.475020  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
 2191 13:04:07.475882  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2194 13:04:07.477357  end: 2 depthcharge-action (duration 00:05:00) [common]
 2196 13:04:07.478458  Cleaning after the job
 2197 13:04:07.478617  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/ramdisk
 2198 13:04:07.479227  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/kernel
 2199 13:04:07.479828  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148219/tftp-deploy-lb693xpb/modules
 2200 13:04:07.480030  start: 5.1 power-off (timeout 00:00:30) [common]
 2201 13:04:07.480187  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
 2202 13:04:07.500578  >> Command sent successfully.

 2203 13:04:07.502645  Returned 0 in 0 seconds
 2204 13:04:07.603860  end: 5.1 power-off (duration 00:00:00) [common]
 2206 13:04:07.605415  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2207 13:04:07.606631  Listened to connection for namespace 'common' for up to 1s
 2208 13:04:08.611171  Finalising connection for namespace 'common'
 2209 13:04:08.611384  Disconnecting from shell: Finalise
 2210 13:04:08.712560  end: 5.2 read-feedback (duration 00:00:01) [common]
 2211 13:04:08.713210  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148219
 2212 13:04:08.740426  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148219
 2213 13:04:08.741179  JobError: Your job cannot terminate cleanly.