Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 12:59:02.900101 lava-dispatcher, installed at version: 2022.06
2 12:59:02.900281 start: 0 validate
3 12:59:02.900408 Start time: 2022-08-31 12:59:02.900401+00:00 (UTC)
4 12:59:02.900530 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:59:02.900654 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 12:59:03.197455 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:59:03.197625 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:59:03.488765 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:59:03.488913 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:59:03.779230 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:59:03.779388 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:59:04.072774 validate duration: 1.17
14 12:59:04.073055 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:59:04.073157 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:59:04.073244 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:59:04.073342 Not decompressing ramdisk as can be used compressed.
18 12:59:04.073425 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/initrd.cpio.gz
19 12:59:04.073490 saving as /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/ramdisk/initrd.cpio.gz
20 12:59:04.073550 total size: 5411044 (5MB)
21 12:59:04.075538 progress 0% (0MB)
22 12:59:04.078082 progress 5% (0MB)
23 12:59:04.080356 progress 10% (0MB)
24 12:59:04.082383 progress 15% (0MB)
25 12:59:04.084984 progress 20% (1MB)
26 12:59:04.087289 progress 25% (1MB)
27 12:59:04.089479 progress 30% (1MB)
28 12:59:04.091594 progress 35% (1MB)
29 12:59:04.094087 progress 40% (2MB)
30 12:59:04.096393 progress 45% (2MB)
31 12:59:04.098881 progress 50% (2MB)
32 12:59:04.101386 progress 55% (2MB)
33 12:59:04.103341 progress 60% (3MB)
34 12:59:04.105611 progress 65% (3MB)
35 12:59:04.107915 progress 70% (3MB)
36 12:59:04.110432 progress 75% (3MB)
37 12:59:04.112549 progress 80% (4MB)
38 12:59:04.114813 progress 85% (4MB)
39 12:59:04.117167 progress 90% (4MB)
40 12:59:04.119274 progress 95% (4MB)
41 12:59:04.121791 progress 100% (5MB)
42 12:59:04.121967 5MB downloaded in 0.05s (106.59MB/s)
43 12:59:04.122114 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:59:04.122363 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:59:04.122451 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:59:04.122538 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:59:04.122642 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:59:04.122709 saving as /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/kernel/bzImage
50 12:59:04.122771 total size: 8953856 (8MB)
51 12:59:04.122831 No compression specified
52 12:59:06.129787 progress 0% (0MB)
53 12:59:06.133390 progress 5% (0MB)
54 12:59:06.138379 progress 10% (0MB)
55 12:59:06.142014 progress 15% (1MB)
56 12:59:06.145849 progress 20% (1MB)
57 12:59:06.149884 progress 25% (2MB)
58 12:59:06.153550 progress 30% (2MB)
59 12:59:06.157354 progress 35% (3MB)
60 12:59:06.161224 progress 40% (3MB)
61 12:59:06.164848 progress 45% (3MB)
62 12:59:06.168858 progress 50% (4MB)
63 12:59:06.172765 progress 55% (4MB)
64 12:59:06.176925 progress 60% (5MB)
65 12:59:06.180999 progress 65% (5MB)
66 12:59:06.184465 progress 70% (6MB)
67 12:59:06.188081 progress 75% (6MB)
68 12:59:06.192100 progress 80% (6MB)
69 12:59:06.195970 progress 85% (7MB)
70 12:59:06.200028 progress 90% (7MB)
71 12:59:06.203395 progress 95% (8MB)
72 12:59:06.207237 progress 100% (8MB)
73 12:59:06.207428 8MB downloaded in 2.08s (4.10MB/s)
74 12:59:06.207590 end: 1.2.1 http-download (duration 00:00:02) [common]
76 12:59:06.207821 end: 1.2 download-retry (duration 00:00:02) [common]
77 12:59:06.207910 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:59:06.207996 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:59:06.208102 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220826.0/amd64/full.rootfs.tar.xz
80 12:59:06.208184 saving as /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/nfsrootfs/full.rootfs.tar
81 12:59:06.208258 total size: 133217788 (127MB)
82 12:59:06.208319 Using unxz to decompress xz
83 12:59:06.212653 progress 0% (0MB)
84 12:59:06.554224 progress 5% (6MB)
85 12:59:06.918183 progress 10% (12MB)
86 12:59:07.225493 progress 15% (19MB)
87 12:59:07.447548 progress 20% (25MB)
88 12:59:07.696444 progress 25% (31MB)
89 12:59:08.034841 progress 30% (38MB)
90 12:59:08.381465 progress 35% (44MB)
91 12:59:08.771022 progress 40% (50MB)
92 12:59:09.153806 progress 45% (57MB)
93 12:59:09.509266 progress 50% (63MB)
94 12:59:09.878772 progress 55% (69MB)
95 12:59:10.237597 progress 60% (76MB)
96 12:59:10.596563 progress 65% (82MB)
97 12:59:10.955594 progress 70% (88MB)
98 12:59:11.320109 progress 75% (95MB)
99 12:59:11.754746 progress 80% (101MB)
100 12:59:12.191325 progress 85% (108MB)
101 12:59:12.454462 progress 90% (114MB)
102 12:59:12.797613 progress 95% (120MB)
103 12:59:13.191509 progress 100% (127MB)
104 12:59:13.197087 127MB downloaded in 6.99s (18.18MB/s)
105 12:59:13.197378 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:59:13.197652 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:59:13.197766 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:59:13.197858 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:59:13.197983 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:59:13.198065 saving as /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/modules/modules.tar
112 12:59:13.198126 total size: 64656 (0MB)
113 12:59:13.198187 Using unxz to decompress xz
114 12:59:13.202574 progress 50% (0MB)
115 12:59:13.203359 progress 100% (0MB)
116 12:59:13.207416 0MB downloaded in 0.01s (6.64MB/s)
117 12:59:13.207628 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:59:13.207885 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:59:13.207980 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 12:59:13.208076 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 12:59:14.423920 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7148229/extract-nfsrootfs-y6m98l4w
123 12:59:14.424130 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 12:59:14.424234 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 12:59:14.424371 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule
126 12:59:14.424473 makedir: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin
127 12:59:14.424558 makedir: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/tests
128 12:59:14.424639 makedir: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/results
129 12:59:14.424738 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-add-keys
130 12:59:14.424870 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-add-sources
131 12:59:14.424984 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-background-process-start
132 12:59:14.425098 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-background-process-stop
133 12:59:14.425237 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-common-functions
134 12:59:14.425350 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-echo-ipv4
135 12:59:14.425464 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-install-packages
136 12:59:14.425575 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-installed-packages
137 12:59:14.425684 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-os-build
138 12:59:14.425831 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-probe-channel
139 12:59:14.425941 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-probe-ip
140 12:59:14.426050 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-target-ip
141 12:59:14.426159 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-target-mac
142 12:59:14.426268 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-target-storage
143 12:59:14.426378 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-case
144 12:59:14.426489 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-event
145 12:59:14.426599 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-feedback
146 12:59:14.426707 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-raise
147 12:59:14.426816 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-reference
148 12:59:14.426925 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-runner
149 12:59:14.427034 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-set
150 12:59:14.427143 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-test-shell
151 12:59:14.427251 Updating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-install-packages (oe)
152 12:59:14.427369 Updating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/bin/lava-installed-packages (oe)
153 12:59:14.427468 Creating /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/environment
154 12:59:14.427555 LAVA metadata
155 12:59:14.427656 - LAVA_JOB_ID=7148229
156 12:59:14.427720 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:59:14.427818 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 12:59:14.427884 skipped lava-vland-overlay
159 12:59:14.427960 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:59:14.428041 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 12:59:14.428103 skipped lava-multinode-overlay
162 12:59:14.428176 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:59:14.428258 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 12:59:14.428329 Loading test definitions
165 12:59:14.428419 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 12:59:14.428494 Using /lava-7148229 at stage 0
167 12:59:14.428744 uuid=7148229_1.5.2.3.1 testdef=None
168 12:59:14.428834 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 12:59:14.428922 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 12:59:14.429394 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 12:59:14.429626 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 12:59:14.430468 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 12:59:14.430711 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 12:59:14.431247 runner path: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/0/tests/0_dmesg test_uuid 7148229_1.5.2.3.1
177 12:59:14.431393 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 12:59:14.431627 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 12:59:14.431702 Using /lava-7148229 at stage 1
181 12:59:14.431938 uuid=7148229_1.5.2.3.5 testdef=None
182 12:59:14.432027 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 12:59:14.432114 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 12:59:14.432553 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 12:59:14.432780 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 12:59:14.433348 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 12:59:14.433585 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 12:59:14.434172 runner path: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/1/tests/1_bootrr test_uuid 7148229_1.5.2.3.5
191 12:59:14.434313 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 12:59:14.434525 Creating lava-test-runner.conf files
194 12:59:14.434589 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/0 for stage 0
195 12:59:14.434670 - 0_dmesg
196 12:59:14.434744 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148229/lava-overlay-gul7yule/lava-7148229/1 for stage 1
197 12:59:14.434826 - 1_bootrr
198 12:59:14.434915 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 12:59:14.435001 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 12:59:14.440420 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 12:59:14.440525 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 12:59:14.440614 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 12:59:14.440702 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 12:59:14.440789 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 12:59:14.542732 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 12:59:14.543080 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
207 12:59:14.543188 extracting modules file /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148229/extract-nfsrootfs-y6m98l4w
208 12:59:14.547134 extracting modules file /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148229/extract-overlay-ramdisk-qbmk4l7m/ramdisk
209 12:59:14.550831 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 12:59:14.550943 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
211 12:59:14.551028 [common] Applying overlay to NFS
212 12:59:14.551100 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148229/compress-overlay-yhx8wl42/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148229/extract-nfsrootfs-y6m98l4w
213 12:59:14.554843 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 12:59:14.554954 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
215 12:59:14.555047 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 12:59:14.555142 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
217 12:59:14.555220 Building ramdisk /var/lib/lava/dispatcher/tmp/7148229/extract-overlay-ramdisk-qbmk4l7m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148229/extract-overlay-ramdisk-qbmk4l7m/ramdisk
218 12:59:14.587954 >> 24662 blocks
219 12:59:15.070008 rename /var/lib/lava/dispatcher/tmp/7148229/extract-overlay-ramdisk-qbmk4l7m/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
220 12:59:15.070416 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 12:59:15.070533 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 12:59:15.070640 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 12:59:15.070740 No mkimage arch provided, not using FIT.
224 12:59:15.070829 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 12:59:15.070914 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 12:59:15.071015 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 12:59:15.071109 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 12:59:15.071191 No LXC device requested
229 12:59:15.071275 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 12:59:15.071368 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 12:59:15.071453 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 12:59:15.071522 Checking files for TFTP limit of 4294967296 bytes.
233 12:59:15.071898 end: 1 tftp-deploy (duration 00:00:11) [common]
234 12:59:15.072004 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 12:59:15.072098 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 12:59:15.072261 substitutions:
237 12:59:15.072331 - {DTB}: None
238 12:59:15.072396 - {INITRD}: 7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
239 12:59:15.072457 - {KERNEL}: 7148229/tftp-deploy-eeci0mjy/kernel/bzImage
240 12:59:15.072517 - {LAVA_MAC}: None
241 12:59:15.072575 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7148229/extract-nfsrootfs-y6m98l4w
242 12:59:15.072635 - {NFS_SERVER_IP}: 192.168.201.1
243 12:59:15.072692 - {PRESEED_CONFIG}: None
244 12:59:15.072748 - {PRESEED_LOCAL}: None
245 12:59:15.072804 - {RAMDISK}: 7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
246 12:59:15.072861 - {ROOT_PART}: None
247 12:59:15.072916 - {ROOT}: None
248 12:59:15.072971 - {SERVER_IP}: 192.168.201.1
249 12:59:15.073027 - {TEE}: None
250 12:59:15.073082 Parsed boot commands:
251 12:59:15.073136 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 12:59:15.073286 Parsed boot commands: tftpboot 192.168.201.1 7148229/tftp-deploy-eeci0mjy/kernel/bzImage 7148229/tftp-deploy-eeci0mjy/kernel/cmdline 7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
253 12:59:15.073380 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 12:59:15.073471 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 12:59:15.073564 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 12:59:15.073652 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 12:59:15.073722 Not connected, no need to disconnect.
258 12:59:15.073805 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 12:59:15.073896 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 12:59:15.073965 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
261 12:59:15.076531 Setting prompt string to ['lava-test: # ']
262 12:59:15.076839 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 12:59:15.076945 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 12:59:15.077045 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 12:59:15.077135 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 12:59:15.077339 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
267 12:59:15.096162 >> Command sent successfully.
268 12:59:15.098083 Returned 0 in 0 seconds
269 12:59:15.198833 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 12:59:15.199154 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 12:59:15.199255 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 12:59:15.199343 Setting prompt string to 'Starting depthcharge on Voema...'
274 12:59:15.199411 Changing prompt to 'Starting depthcharge on Voema...'
275 12:59:15.199480 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 12:59:15.199746 [Enter `^Ec?' for help]
277 12:59:22.972662
278 12:59:22.973319
279 12:59:22.982384 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 12:59:22.989506 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 12:59:22.992568 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 12:59:22.996116 CPU: AES supported, TXT NOT supported, VT supported
283 12:59:23.002289 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 12:59:23.006149 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 12:59:23.012418 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 12:59:23.016385 VBOOT: Loading verstage.
287 12:59:23.019362 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 12:59:23.025772 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 12:59:23.028766 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 12:59:23.039490 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 12:59:23.046203 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 12:59:23.046708
293 12:59:23.047097
294 12:59:23.059638 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 12:59:23.073202 Probing TPM: . done!
296 12:59:23.076626 TPM ready after 0 ms
297 12:59:23.080073 Connected to device vid:did:rid of 1ae0:0028:00
298 12:59:23.091196 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 12:59:23.097805 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 12:59:23.100975 Initialized TPM device CR50 revision 0
301 12:59:23.153802 tlcl_send_startup: Startup return code is 0
302 12:59:23.154362 TPM: setup succeeded
303 12:59:23.168257 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 12:59:23.182613 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 12:59:23.195570 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 12:59:23.205057 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 12:59:23.209026 Chrome EC: UHEPI supported
308 12:59:23.211868 Phase 1
309 12:59:23.215258 FMAP: area GBB found @ 1805000 (458752 bytes)
310 12:59:23.225540 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 12:59:23.231850 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 12:59:23.238362 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 12:59:23.245087 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 12:59:23.248781 Recovery requested (1009000e)
315 12:59:23.252206 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 12:59:23.263289 tlcl_extend: response is 0
317 12:59:23.270086 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 12:59:23.279832 tlcl_extend: response is 0
319 12:59:23.286205 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 12:59:23.293143 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 12:59:23.299997 BS: verstage times (exec / console): total (unknown) / 142 ms
322 12:59:23.300535
323 12:59:23.300885
324 12:59:23.313008 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 12:59:23.319552 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 12:59:23.322808 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 12:59:23.329571 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 12:59:23.333058 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 12:59:23.336769 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 12:59:23.339107 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 12:59:23.342949 TCO_STS: 0000 0000
332 12:59:23.345831 GEN_PMCON: d0015038 00002200
333 12:59:23.348887 GBLRST_CAUSE: 00000000 00000000
334 12:59:23.352355 HPR_CAUSE0: 00000000
335 12:59:23.352837 prev_sleep_state 5
336 12:59:23.355667 Boot Count incremented to 7451
337 12:59:23.362933 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 12:59:23.369340 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 12:59:23.378774 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 12:59:23.385292 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 12:59:23.388976 Chrome EC: UHEPI supported
342 12:59:23.394781 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 12:59:23.406977 Probing TPM: done!
344 12:59:23.413453 Connected to device vid:did:rid of 1ae0:0028:00
345 12:59:23.423237 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 12:59:23.426424 Initialized TPM device CR50 revision 0
347 12:59:23.441956 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 12:59:23.448432 MRC: Hash idx 0x100b comparison successful.
349 12:59:23.451047 MRC cache found, size faa8
350 12:59:23.451530 bootmode is set to: 2
351 12:59:23.454973 SPD index = 2
352 12:59:23.462083 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 12:59:23.464862 SPD: module type is LPDDR4X
354 12:59:23.467723 SPD: module part number is MT53D1G64D4NW-046
355 12:59:23.474365 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 12:59:23.477811 SPD: device width 16 bits, bus width 16 bits
357 12:59:23.484460 SPD: module size is 2048 MB (per channel)
358 12:59:23.912383 CBMEM:
359 12:59:23.916131 IMD: root @ 0x76fff000 254 entries.
360 12:59:23.919326 IMD: root @ 0x76ffec00 62 entries.
361 12:59:23.923164 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 12:59:23.929323 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 12:59:23.932234 External stage cache:
364 12:59:23.935690 IMD: root @ 0x7b3ff000 254 entries.
365 12:59:23.938622 IMD: root @ 0x7b3fec00 62 entries.
366 12:59:23.954098 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 12:59:23.960595 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 12:59:23.967075 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 12:59:23.980709 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 12:59:23.987455 cse_lite: Skip switching to RW in the recovery path
371 12:59:23.987540 8 DIMMs found
372 12:59:23.987612 SMM Memory Map
373 12:59:23.993773 SMRAM : 0x7b000000 0x800000
374 12:59:23.997068 Subregion 0: 0x7b000000 0x200000
375 12:59:24.000652 Subregion 1: 0x7b200000 0x200000
376 12:59:24.003618 Subregion 2: 0x7b400000 0x400000
377 12:59:24.003691 top_of_ram = 0x77000000
378 12:59:24.010588 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 12:59:24.017817 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 12:59:24.020488 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 12:59:24.026802 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 12:59:24.034280 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 12:59:24.040363 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 12:59:24.050172 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 12:59:24.056890 Processing 211 relocs. Offset value of 0x74c0b000
386 12:59:24.063773 BS: romstage times (exec / console): total (unknown) / 276 ms
387 12:59:24.069064
388 12:59:24.069143
389 12:59:24.080244 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 12:59:24.083508 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 12:59:24.089982 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 12:59:24.100326 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 12:59:24.106599 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 12:59:24.113506 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 12:59:24.156124 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 12:59:24.162454 Processing 5008 relocs. Offset value of 0x75d98000
397 12:59:24.166210 BS: postcar times (exec / console): total (unknown) / 59 ms
398 12:59:24.168897
399 12:59:24.168973
400 12:59:24.178823 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 12:59:24.178915 Normal boot
402 12:59:24.182184 FW_CONFIG value is 0x804c02
403 12:59:24.186515 PCI: 00:07.0 disabled by fw_config
404 12:59:24.189243 PCI: 00:07.1 disabled by fw_config
405 12:59:24.192201 PCI: 00:0d.2 disabled by fw_config
406 12:59:24.199236 PCI: 00:1c.7 disabled by fw_config
407 12:59:24.202467 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 12:59:24.208663 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 12:59:24.212203 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 12:59:24.218771 GENERIC: 0.0 disabled by fw_config
411 12:59:24.221985 GENERIC: 1.0 disabled by fw_config
412 12:59:24.225435 fw_config match found: DB_USB=USB3_ACTIVE
413 12:59:24.228625 fw_config match found: DB_USB=USB3_ACTIVE
414 12:59:24.232383 fw_config match found: DB_USB=USB3_ACTIVE
415 12:59:24.238669 fw_config match found: DB_USB=USB3_ACTIVE
416 12:59:24.241876 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 12:59:24.248461 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 12:59:24.258657 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 12:59:24.265347 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 12:59:24.268346 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 12:59:24.275826 microcode: Update skipped, already up-to-date
422 12:59:24.281439 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 12:59:24.310043 Detected 4 core, 8 thread CPU.
424 12:59:24.312847 Setting up SMI for CPU
425 12:59:24.316007 IED base = 0x7b400000
426 12:59:24.319213 IED size = 0x00400000
427 12:59:24.319300 Will perform SMM setup.
428 12:59:24.325640 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
429 12:59:24.332463 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 12:59:24.339048 Processing 16 relocs. Offset value of 0x00030000
431 12:59:24.342228 Attempting to start 7 APs
432 12:59:24.346703 Waiting for 10ms after sending INIT.
433 12:59:24.361124 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 12:59:24.364688 AP: slot 3 apic_id 2.
435 12:59:24.368319 AP: slot 6 apic_id 3.
436 12:59:24.368397 AP: slot 7 apic_id 5.
437 12:59:24.371436 AP: slot 4 apic_id 4.
438 12:59:24.371520 done.
439 12:59:24.374659 AP: slot 5 apic_id 6.
440 12:59:24.374736 AP: slot 2 apic_id 7.
441 12:59:24.381142 Waiting for 2nd SIPI to complete...done.
442 12:59:24.387654 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 12:59:24.394543 Processing 13 relocs. Offset value of 0x00038000
444 12:59:24.397852 Unable to locate Global NVS
445 12:59:24.404565 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 12:59:24.407615 Installing permanent SMM handler to 0x7b000000
447 12:59:24.417528 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 12:59:24.421116 Processing 794 relocs. Offset value of 0x7b010000
449 12:59:24.430799 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 12:59:24.434385 Processing 13 relocs. Offset value of 0x7b008000
451 12:59:24.440689 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 12:59:24.447312 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 12:59:24.450490 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 12:59:24.457081 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 12:59:24.463651 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 12:59:24.470635 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 12:59:24.476983 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 12:59:24.480621 Unable to locate Global NVS
459 12:59:24.487051 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 12:59:24.490132 Clearing SMI status registers
461 12:59:24.490230 SMI_STS: PM1
462 12:59:24.493527 PM1_STS: PWRBTN
463 12:59:24.500019 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 12:59:24.503624 In relocation handler: CPU 0
465 12:59:24.507126 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 12:59:24.513288 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 12:59:24.516440 Relocation complete.
468 12:59:24.523141 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 12:59:24.526227 In relocation handler: CPU 1
470 12:59:24.529622 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 12:59:24.532935 Relocation complete.
472 12:59:24.539685 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
473 12:59:24.542919 In relocation handler: CPU 7
474 12:59:24.545867 New SMBASE=0x7affe400 IEDBASE=0x7b400000
475 12:59:24.549584 Relocation complete.
476 12:59:24.556304 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
477 12:59:24.559443 In relocation handler: CPU 4
478 12:59:24.562511 New SMBASE=0x7afff000 IEDBASE=0x7b400000
479 12:59:24.566335 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:59:24.569498 Relocation complete.
481 12:59:24.575752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 12:59:24.579414 In relocation handler: CPU 3
483 12:59:24.582542 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 12:59:24.589091 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:59:24.589177 Relocation complete.
486 12:59:24.599012 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
487 12:59:24.602482 In relocation handler: CPU 6
488 12:59:24.605542 New SMBASE=0x7affe800 IEDBASE=0x7b400000
489 12:59:24.605634 Relocation complete.
490 12:59:24.615491 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 12:59:24.619359 In relocation handler: CPU 5
492 12:59:24.621941 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 12:59:24.625602 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:59:24.628806 Relocation complete.
495 12:59:24.635175 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
496 12:59:24.638839 In relocation handler: CPU 2
497 12:59:24.641711 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 12:59:24.645788 Relocation complete.
499 12:59:24.648349 Initializing CPU #0
500 12:59:24.651897 CPU: vendor Intel device 806c1
501 12:59:24.655203 CPU: family 06, model 8c, stepping 01
502 12:59:24.655297 Clearing out pending MCEs
503 12:59:24.658745 Setting up local APIC...
504 12:59:24.661950 apic_id: 0x00 done.
505 12:59:24.665025 Turbo is available but hidden
506 12:59:24.668556 Turbo is available and visible
507 12:59:24.671783 microcode: Update skipped, already up-to-date
508 12:59:24.675222 CPU #0 initialized
509 12:59:24.679156 Initializing CPU #5
510 12:59:24.679241 Initializing CPU #2
511 12:59:24.681712 Initializing CPU #1
512 12:59:24.685078 CPU: vendor Intel device 806c1
513 12:59:24.689431 CPU: family 06, model 8c, stepping 01
514 12:59:24.691666 CPU: vendor Intel device 806c1
515 12:59:24.695161 CPU: family 06, model 8c, stepping 01
516 12:59:24.698065 Clearing out pending MCEs
517 12:59:24.701639 Clearing out pending MCEs
518 12:59:24.701744 Setting up local APIC...
519 12:59:24.704834 CPU: vendor Intel device 806c1
520 12:59:24.708142 CPU: family 06, model 8c, stepping 01
521 12:59:24.712145 Initializing CPU #7
522 12:59:24.714645 Initializing CPU #4
523 12:59:24.717967 CPU: vendor Intel device 806c1
524 12:59:24.721254 CPU: family 06, model 8c, stepping 01
525 12:59:24.724613 CPU: vendor Intel device 806c1
526 12:59:24.728094 CPU: family 06, model 8c, stepping 01
527 12:59:24.728209 apic_id: 0x06 done.
528 12:59:24.731554 Setting up local APIC...
529 12:59:24.734418 Initializing CPU #6
530 12:59:24.738153 apic_id: 0x07 done.
531 12:59:24.742058 microcode: Update skipped, already up-to-date
532 12:59:24.745563 microcode: Update skipped, already up-to-date
533 12:59:24.748525 CPU #5 initialized
534 12:59:24.748646 CPU #2 initialized
535 12:59:24.751920 Clearing out pending MCEs
536 12:59:24.755576 CPU: vendor Intel device 806c1
537 12:59:24.758076 CPU: family 06, model 8c, stepping 01
538 12:59:24.761725 Setting up local APIC...
539 12:59:24.764905 Initializing CPU #3
540 12:59:24.765015 Clearing out pending MCEs
541 12:59:24.767968 CPU: vendor Intel device 806c1
542 12:59:24.771430 CPU: family 06, model 8c, stepping 01
543 12:59:24.774528 Setting up local APIC...
544 12:59:24.777927 Clearing out pending MCEs
545 12:59:24.781219 Clearing out pending MCEs
546 12:59:24.784605 Setting up local APIC...
547 12:59:24.784715 apic_id: 0x03 done.
548 12:59:24.788134 Clearing out pending MCEs
549 12:59:24.791223 microcode: Update skipped, already up-to-date
550 12:59:24.794457 Setting up local APIC...
551 12:59:24.798066 apic_id: 0x05 done.
552 12:59:24.801320 Setting up local APIC...
553 12:59:24.801430 apic_id: 0x01 done.
554 12:59:24.805050 apic_id: 0x02 done.
555 12:59:24.807750 CPU #6 initialized
556 12:59:24.811091 microcode: Update skipped, already up-to-date
557 12:59:24.814203 microcode: Update skipped, already up-to-date
558 12:59:24.817721 apic_id: 0x04 done.
559 12:59:24.821036 CPU #7 initialized
560 12:59:24.824036 microcode: Update skipped, already up-to-date
561 12:59:24.827699 CPU #3 initialized
562 12:59:24.827809 CPU #4 initialized
563 12:59:24.834305 microcode: Update skipped, already up-to-date
564 12:59:24.834416 CPU #1 initialized
565 12:59:24.837527 bsp_do_flight_plan done after 454 msecs.
566 12:59:24.840937 CPU: frequency set to 4400 MHz
567 12:59:24.844723 Enabling SMIs.
568 12:59:24.850554 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 12:59:24.866098 SATAXPCIE1 indicates PCIe NVMe is present
570 12:59:24.869156 Probing TPM: done!
571 12:59:24.872340 Connected to device vid:did:rid of 1ae0:0028:00
572 12:59:24.883189 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
573 12:59:24.886888 Initialized TPM device CR50 revision 0
574 12:59:24.889592 Enabling S0i3.4
575 12:59:24.896598 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 12:59:24.899770 Found a VBT of 8704 bytes after decompression
577 12:59:24.906444 cse_lite: CSE RO boot. HybridStorageMode disabled
578 12:59:24.912762 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 12:59:24.988043 FSPS returned 0
580 12:59:24.991384 Executing Phase 1 of FspMultiPhaseSiInit
581 12:59:25.001231 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 12:59:25.004388 port C0 DISC req: usage 1 usb3 1 usb2 5
583 12:59:25.008349 Raw Buffer output 0 00000511
584 12:59:25.011199 Raw Buffer output 1 00000000
585 12:59:25.014783 pmc_send_ipc_cmd succeeded
586 12:59:25.021238 port C1 DISC req: usage 1 usb3 2 usb2 3
587 12:59:25.021362 Raw Buffer output 0 00000321
588 12:59:25.024708 Raw Buffer output 1 00000000
589 12:59:25.028879 pmc_send_ipc_cmd succeeded
590 12:59:25.034531 Detected 4 core, 8 thread CPU.
591 12:59:25.037422 Detected 4 core, 8 thread CPU.
592 12:59:25.237808 Display FSP Version Info HOB
593 12:59:25.241194 Reference Code - CPU = a.0.4c.31
594 12:59:25.244779 uCode Version = 0.0.0.86
595 12:59:25.247254 TXT ACM version = ff.ff.ff.ffff
596 12:59:25.250792 Reference Code - ME = a.0.4c.31
597 12:59:25.253929 MEBx version = 0.0.0.0
598 12:59:25.257451 ME Firmware Version = Consumer SKU
599 12:59:25.260598 Reference Code - PCH = a.0.4c.31
600 12:59:25.264117 PCH-CRID Status = Disabled
601 12:59:25.267425 PCH-CRID Original Value = ff.ff.ff.ffff
602 12:59:25.270447 PCH-CRID New Value = ff.ff.ff.ffff
603 12:59:25.274206 OPROM - RST - RAID = ff.ff.ff.ffff
604 12:59:25.277098 PCH Hsio Version = 4.0.0.0
605 12:59:25.280667 Reference Code - SA - System Agent = a.0.4c.31
606 12:59:25.283611 Reference Code - MRC = 2.0.0.1
607 12:59:25.287448 SA - PCIe Version = a.0.4c.31
608 12:59:25.290690 SA-CRID Status = Disabled
609 12:59:25.293854 SA-CRID Original Value = 0.0.0.1
610 12:59:25.297659 SA-CRID New Value = 0.0.0.1
611 12:59:25.300195 OPROM - VBIOS = ff.ff.ff.ffff
612 12:59:25.303653 IO Manageability Engine FW Version = 11.1.4.0
613 12:59:25.307419 PHY Build Version = 0.0.0.e0
614 12:59:25.310661 Thunderbolt(TM) FW Version = 0.0.0.0
615 12:59:25.316954 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 12:59:25.320179 ITSS IRQ Polarities Before:
617 12:59:25.320293 IPC0: 0xffffffff
618 12:59:25.323876 IPC1: 0xffffffff
619 12:59:25.323991 IPC2: 0xffffffff
620 12:59:25.327579 IPC3: 0xffffffff
621 12:59:25.331429 ITSS IRQ Polarities After:
622 12:59:25.331541 IPC0: 0xffffffff
623 12:59:25.331637 IPC1: 0xffffffff
624 12:59:25.334633 IPC2: 0xffffffff
625 12:59:25.338206 IPC3: 0xffffffff
626 12:59:25.341282 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 12:59:25.351307 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 12:59:25.364837 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 12:59:25.377677 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 12:59:25.384737 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
631 12:59:25.384865 Enumerating buses...
632 12:59:25.390857 Show all devs... Before device enumeration.
633 12:59:25.390972 Root Device: enabled 1
634 12:59:25.394258 DOMAIN: 0000: enabled 1
635 12:59:25.397864 CPU_CLUSTER: 0: enabled 1
636 12:59:25.401318 PCI: 00:00.0: enabled 1
637 12:59:25.401429 PCI: 00:02.0: enabled 1
638 12:59:25.404586 PCI: 00:04.0: enabled 1
639 12:59:25.407722 PCI: 00:05.0: enabled 1
640 12:59:25.407834 PCI: 00:06.0: enabled 0
641 12:59:25.410973 PCI: 00:07.0: enabled 0
642 12:59:25.414126 PCI: 00:07.1: enabled 0
643 12:59:25.417791 PCI: 00:07.2: enabled 0
644 12:59:25.417904 PCI: 00:07.3: enabled 0
645 12:59:25.420778 PCI: 00:08.0: enabled 1
646 12:59:25.424506 PCI: 00:09.0: enabled 0
647 12:59:25.427379 PCI: 00:0a.0: enabled 0
648 12:59:25.427491 PCI: 00:0d.0: enabled 1
649 12:59:25.431262 PCI: 00:0d.1: enabled 0
650 12:59:25.434712 PCI: 00:0d.2: enabled 0
651 12:59:25.437471 PCI: 00:0d.3: enabled 0
652 12:59:25.437585 PCI: 00:0e.0: enabled 0
653 12:59:25.440879 PCI: 00:10.2: enabled 1
654 12:59:25.444044 PCI: 00:10.6: enabled 0
655 12:59:25.447886 PCI: 00:10.7: enabled 0
656 12:59:25.447999 PCI: 00:12.0: enabled 0
657 12:59:25.450727 PCI: 00:12.6: enabled 0
658 12:59:25.453920 PCI: 00:13.0: enabled 0
659 12:59:25.454038 PCI: 00:14.0: enabled 1
660 12:59:25.457623 PCI: 00:14.1: enabled 0
661 12:59:25.460695 PCI: 00:14.2: enabled 1
662 12:59:25.463928 PCI: 00:14.3: enabled 1
663 12:59:25.464041 PCI: 00:15.0: enabled 1
664 12:59:25.467603 PCI: 00:15.1: enabled 1
665 12:59:25.471188 PCI: 00:15.2: enabled 1
666 12:59:25.473990 PCI: 00:15.3: enabled 1
667 12:59:25.474104 PCI: 00:16.0: enabled 1
668 12:59:25.477558 PCI: 00:16.1: enabled 0
669 12:59:25.480978 PCI: 00:16.2: enabled 0
670 12:59:25.484053 PCI: 00:16.3: enabled 0
671 12:59:25.484163 PCI: 00:16.4: enabled 0
672 12:59:25.487618 PCI: 00:16.5: enabled 0
673 12:59:25.490687 PCI: 00:17.0: enabled 1
674 12:59:25.490800 PCI: 00:19.0: enabled 0
675 12:59:25.494304 PCI: 00:19.1: enabled 1
676 12:59:25.497326 PCI: 00:19.2: enabled 0
677 12:59:25.500883 PCI: 00:1c.0: enabled 1
678 12:59:25.500994 PCI: 00:1c.1: enabled 0
679 12:59:25.503889 PCI: 00:1c.2: enabled 0
680 12:59:25.507102 PCI: 00:1c.3: enabled 0
681 12:59:25.510514 PCI: 00:1c.4: enabled 0
682 12:59:25.510626 PCI: 00:1c.5: enabled 0
683 12:59:25.514414 PCI: 00:1c.6: enabled 1
684 12:59:25.517086 PCI: 00:1c.7: enabled 0
685 12:59:25.520344 PCI: 00:1d.0: enabled 1
686 12:59:25.520457 PCI: 00:1d.1: enabled 0
687 12:59:25.524142 PCI: 00:1d.2: enabled 1
688 12:59:25.527206 PCI: 00:1d.3: enabled 0
689 12:59:25.530595 PCI: 00:1e.0: enabled 1
690 12:59:25.530706 PCI: 00:1e.1: enabled 0
691 12:59:25.534025 PCI: 00:1e.2: enabled 1
692 12:59:25.537214 PCI: 00:1e.3: enabled 1
693 12:59:25.537321 PCI: 00:1f.0: enabled 1
694 12:59:25.540511 PCI: 00:1f.1: enabled 0
695 12:59:25.543763 PCI: 00:1f.2: enabled 1
696 12:59:25.547301 PCI: 00:1f.3: enabled 1
697 12:59:25.547410 PCI: 00:1f.4: enabled 0
698 12:59:25.550472 PCI: 00:1f.5: enabled 1
699 12:59:25.553861 PCI: 00:1f.6: enabled 0
700 12:59:25.556756 PCI: 00:1f.7: enabled 0
701 12:59:25.556871 APIC: 00: enabled 1
702 12:59:25.560391 GENERIC: 0.0: enabled 1
703 12:59:25.563636 GENERIC: 0.0: enabled 1
704 12:59:25.563752 GENERIC: 1.0: enabled 1
705 12:59:25.566884 GENERIC: 0.0: enabled 1
706 12:59:25.570350 GENERIC: 1.0: enabled 1
707 12:59:25.573641 USB0 port 0: enabled 1
708 12:59:25.573773 GENERIC: 0.0: enabled 1
709 12:59:25.576901 USB0 port 0: enabled 1
710 12:59:25.580089 GENERIC: 0.0: enabled 1
711 12:59:25.580199 I2C: 00:1a: enabled 1
712 12:59:25.583633 I2C: 00:31: enabled 1
713 12:59:25.586986 I2C: 00:32: enabled 1
714 12:59:25.590351 I2C: 00:10: enabled 1
715 12:59:25.590462 I2C: 00:15: enabled 1
716 12:59:25.593648 GENERIC: 0.0: enabled 0
717 12:59:25.596793 GENERIC: 1.0: enabled 0
718 12:59:25.596903 GENERIC: 0.0: enabled 1
719 12:59:25.600409 SPI: 00: enabled 1
720 12:59:25.603490 SPI: 00: enabled 1
721 12:59:25.603614 PNP: 0c09.0: enabled 1
722 12:59:25.607432 GENERIC: 0.0: enabled 1
723 12:59:25.610174 USB3 port 0: enabled 1
724 12:59:25.610285 USB3 port 1: enabled 1
725 12:59:25.613268 USB3 port 2: enabled 0
726 12:59:25.616720 USB3 port 3: enabled 0
727 12:59:25.619789 USB2 port 0: enabled 0
728 12:59:25.619901 USB2 port 1: enabled 1
729 12:59:25.623172 USB2 port 2: enabled 1
730 12:59:25.627056 USB2 port 3: enabled 0
731 12:59:25.627182 USB2 port 4: enabled 1
732 12:59:25.629897 USB2 port 5: enabled 0
733 12:59:25.633273 USB2 port 6: enabled 0
734 12:59:25.636775 USB2 port 7: enabled 0
735 12:59:25.636886 USB2 port 8: enabled 0
736 12:59:25.639916 USB2 port 9: enabled 0
737 12:59:25.643269 USB3 port 0: enabled 0
738 12:59:25.643378 USB3 port 1: enabled 1
739 12:59:25.646489 USB3 port 2: enabled 0
740 12:59:25.649877 USB3 port 3: enabled 0
741 12:59:25.649988 GENERIC: 0.0: enabled 1
742 12:59:25.652974 GENERIC: 1.0: enabled 1
743 12:59:25.656491 APIC: 01: enabled 1
744 12:59:25.656601 APIC: 07: enabled 1
745 12:59:25.659824 APIC: 02: enabled 1
746 12:59:25.663027 APIC: 04: enabled 1
747 12:59:25.663138 APIC: 06: enabled 1
748 12:59:25.666540 APIC: 03: enabled 1
749 12:59:25.670006 APIC: 05: enabled 1
750 12:59:25.670112 Compare with tree...
751 12:59:25.673287 Root Device: enabled 1
752 12:59:25.676555 DOMAIN: 0000: enabled 1
753 12:59:25.676665 PCI: 00:00.0: enabled 1
754 12:59:25.679571 PCI: 00:02.0: enabled 1
755 12:59:25.683004 PCI: 00:04.0: enabled 1
756 12:59:25.686275 GENERIC: 0.0: enabled 1
757 12:59:25.690090 PCI: 00:05.0: enabled 1
758 12:59:25.690206 PCI: 00:06.0: enabled 0
759 12:59:25.692969 PCI: 00:07.0: enabled 0
760 12:59:25.696569 GENERIC: 0.0: enabled 1
761 12:59:25.699390 PCI: 00:07.1: enabled 0
762 12:59:25.702940 GENERIC: 1.0: enabled 1
763 12:59:25.706528 PCI: 00:07.2: enabled 0
764 12:59:25.706637 GENERIC: 0.0: enabled 1
765 12:59:25.709266 PCI: 00:07.3: enabled 0
766 12:59:25.712648 GENERIC: 1.0: enabled 1
767 12:59:25.716397 PCI: 00:08.0: enabled 1
768 12:59:25.719565 PCI: 00:09.0: enabled 0
769 12:59:25.719675 PCI: 00:0a.0: enabled 0
770 12:59:25.722595 PCI: 00:0d.0: enabled 1
771 12:59:25.726083 USB0 port 0: enabled 1
772 12:59:25.729247 USB3 port 0: enabled 1
773 12:59:25.732677 USB3 port 1: enabled 1
774 12:59:25.732784 USB3 port 2: enabled 0
775 12:59:25.736066 USB3 port 3: enabled 0
776 12:59:25.739140 PCI: 00:0d.1: enabled 0
777 12:59:25.742765 PCI: 00:0d.2: enabled 0
778 12:59:25.746012 GENERIC: 0.0: enabled 1
779 12:59:25.746124 PCI: 00:0d.3: enabled 0
780 12:59:25.749037 PCI: 00:0e.0: enabled 0
781 12:59:25.752615 PCI: 00:10.2: enabled 1
782 12:59:25.755618 PCI: 00:10.6: enabled 0
783 12:59:25.759029 PCI: 00:10.7: enabled 0
784 12:59:25.759144 PCI: 00:12.0: enabled 0
785 12:59:25.762552 PCI: 00:12.6: enabled 0
786 12:59:25.765964 PCI: 00:13.0: enabled 0
787 12:59:25.769449 PCI: 00:14.0: enabled 1
788 12:59:25.772558 USB0 port 0: enabled 1
789 12:59:25.772640 USB2 port 0: enabled 0
790 12:59:25.775814 USB2 port 1: enabled 1
791 12:59:25.779027 USB2 port 2: enabled 1
792 12:59:25.782778 USB2 port 3: enabled 0
793 12:59:25.785934 USB2 port 4: enabled 1
794 12:59:25.788664 USB2 port 5: enabled 0
795 12:59:25.788774 USB2 port 6: enabled 0
796 12:59:25.791977 USB2 port 7: enabled 0
797 12:59:25.795355 USB2 port 8: enabled 0
798 12:59:25.798909 USB2 port 9: enabled 0
799 12:59:25.801906 USB3 port 0: enabled 0
800 12:59:25.806016 USB3 port 1: enabled 1
801 12:59:25.806127 USB3 port 2: enabled 0
802 12:59:25.809038 USB3 port 3: enabled 0
803 12:59:25.812232 PCI: 00:14.1: enabled 0
804 12:59:25.815192 PCI: 00:14.2: enabled 1
805 12:59:25.818623 PCI: 00:14.3: enabled 1
806 12:59:25.818732 GENERIC: 0.0: enabled 1
807 12:59:25.822054 PCI: 00:15.0: enabled 1
808 12:59:25.825661 I2C: 00:1a: enabled 1
809 12:59:25.828437 I2C: 00:31: enabled 1
810 12:59:25.831688 I2C: 00:32: enabled 1
811 12:59:25.831798 PCI: 00:15.1: enabled 1
812 12:59:25.835216 I2C: 00:10: enabled 1
813 12:59:25.838412 PCI: 00:15.2: enabled 1
814 12:59:25.841772 PCI: 00:15.3: enabled 1
815 12:59:25.841881 PCI: 00:16.0: enabled 1
816 12:59:25.845049 PCI: 00:16.1: enabled 0
817 12:59:25.848551 PCI: 00:16.2: enabled 0
818 12:59:25.851525 PCI: 00:16.3: enabled 0
819 12:59:25.854774 PCI: 00:16.4: enabled 0
820 12:59:25.854889 PCI: 00:16.5: enabled 0
821 12:59:25.858297 PCI: 00:17.0: enabled 1
822 12:59:25.861831 PCI: 00:19.0: enabled 0
823 12:59:25.865245 PCI: 00:19.1: enabled 1
824 12:59:25.868269 I2C: 00:15: enabled 1
825 12:59:25.868379 PCI: 00:19.2: enabled 0
826 12:59:25.871712 PCI: 00:1d.0: enabled 1
827 12:59:25.874916 GENERIC: 0.0: enabled 1
828 12:59:25.878138 PCI: 00:1e.0: enabled 1
829 12:59:25.881468 PCI: 00:1e.1: enabled 0
830 12:59:25.881589 PCI: 00:1e.2: enabled 1
831 12:59:25.884730 SPI: 00: enabled 1
832 12:59:25.888356 PCI: 00:1e.3: enabled 1
833 12:59:25.891417 SPI: 00: enabled 1
834 12:59:25.891530 PCI: 00:1f.0: enabled 1
835 12:59:25.894831 PNP: 0c09.0: enabled 1
836 12:59:25.898399 PCI: 00:1f.1: enabled 0
837 12:59:25.901577 PCI: 00:1f.2: enabled 1
838 12:59:25.905069 GENERIC: 0.0: enabled 1
839 12:59:25.905180 GENERIC: 0.0: enabled 1
840 12:59:25.908274 GENERIC: 1.0: enabled 1
841 12:59:25.911227 PCI: 00:1f.3: enabled 1
842 12:59:25.915268 PCI: 00:1f.4: enabled 0
843 12:59:25.917987 PCI: 00:1f.5: enabled 1
844 12:59:25.918097 PCI: 00:1f.6: enabled 0
845 12:59:25.921588 PCI: 00:1f.7: enabled 0
846 12:59:25.924805 CPU_CLUSTER: 0: enabled 1
847 12:59:25.976511 APIC: 00: enabled 1
848 12:59:25.976658 APIC: 01: enabled 1
849 12:59:25.976747 APIC: 07: enabled 1
850 12:59:25.977024 APIC: 02: enabled 1
851 12:59:25.977095 APIC: 04: enabled 1
852 12:59:25.977174 APIC: 06: enabled 1
853 12:59:25.977239 APIC: 03: enabled 1
854 12:59:25.977314 APIC: 05: enabled 1
855 12:59:25.977577 Root Device scanning...
856 12:59:25.977661 scan_static_bus for Root Device
857 12:59:25.977722 DOMAIN: 0000 enabled
858 12:59:25.977841 CPU_CLUSTER: 0 enabled
859 12:59:25.977900 DOMAIN: 0000 scanning...
860 12:59:25.977981 PCI: pci_scan_bus for bus 00
861 12:59:25.978040 PCI: 00:00.0 [8086/0000] ops
862 12:59:25.978310 PCI: 00:00.0 [8086/9a12] enabled
863 12:59:25.978407 PCI: 00:02.0 [8086/0000] bus ops
864 12:59:25.978473 PCI: 00:02.0 [8086/9a40] enabled
865 12:59:25.978550 PCI: 00:04.0 [8086/0000] bus ops
866 12:59:26.026382 PCI: 00:04.0 [8086/9a03] enabled
867 12:59:26.026532 PCI: 00:05.0 [8086/9a19] enabled
868 12:59:26.026848 PCI: 00:07.0 [0000/0000] hidden
869 12:59:26.026959 PCI: 00:08.0 [8086/9a11] enabled
870 12:59:26.027395 PCI: 00:0a.0 [8086/9a0d] disabled
871 12:59:26.027506 PCI: 00:0d.0 [8086/0000] bus ops
872 12:59:26.027843 PCI: 00:0d.0 [8086/9a13] enabled
873 12:59:26.027953 PCI: 00:14.0 [8086/0000] bus ops
874 12:59:26.028052 PCI: 00:14.0 [8086/a0ed] enabled
875 12:59:26.028149 PCI: 00:14.2 [8086/a0ef] enabled
876 12:59:26.028246 PCI: 00:14.3 [8086/0000] bus ops
877 12:59:26.028545 PCI: 00:14.3 [8086/a0f0] enabled
878 12:59:26.028653 PCI: 00:15.0 [8086/0000] bus ops
879 12:59:26.028753 PCI: 00:15.0 [8086/a0e8] enabled
880 12:59:26.028852 PCI: 00:15.1 [8086/0000] bus ops
881 12:59:26.035653 PCI: 00:15.1 [8086/a0e9] enabled
882 12:59:26.035765 PCI: 00:15.2 [8086/0000] bus ops
883 12:59:26.038852 PCI: 00:15.2 [8086/a0ea] enabled
884 12:59:26.038965 PCI: 00:15.3 [8086/0000] bus ops
885 12:59:26.042298 PCI: 00:15.3 [8086/a0eb] enabled
886 12:59:26.045586 PCI: 00:16.0 [8086/0000] ops
887 12:59:26.049155 PCI: 00:16.0 [8086/a0e0] enabled
888 12:59:26.055480 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 12:59:26.058811 PCI: 00:19.0 [8086/0000] bus ops
890 12:59:26.061948 PCI: 00:19.0 [8086/a0c5] disabled
891 12:59:26.065559 PCI: 00:19.1 [8086/0000] bus ops
892 12:59:26.068825 PCI: 00:19.1 [8086/a0c6] enabled
893 12:59:26.071906 PCI: 00:1d.0 [8086/0000] bus ops
894 12:59:26.075336 PCI: 00:1d.0 [8086/a0b0] enabled
895 12:59:26.078664 PCI: 00:1e.0 [8086/0000] ops
896 12:59:26.081703 PCI: 00:1e.0 [8086/a0a8] enabled
897 12:59:26.085296 PCI: 00:1e.2 [8086/0000] bus ops
898 12:59:26.088837 PCI: 00:1e.2 [8086/a0aa] enabled
899 12:59:26.091766 PCI: 00:1e.3 [8086/0000] bus ops
900 12:59:26.095219 PCI: 00:1e.3 [8086/a0ab] enabled
901 12:59:26.098419 PCI: 00:1f.0 [8086/0000] bus ops
902 12:59:26.101838 PCI: 00:1f.0 [8086/a087] enabled
903 12:59:26.101964 RTC Init
904 12:59:26.105064 Set power on after power failure.
905 12:59:26.108598 Disabling Deep S3
906 12:59:26.111598 Disabling Deep S3
907 12:59:26.111712 Disabling Deep S4
908 12:59:26.115191 Disabling Deep S4
909 12:59:26.115302 Disabling Deep S5
910 12:59:26.118397 Disabling Deep S5
911 12:59:26.121509 PCI: 00:1f.2 [0000/0000] hidden
912 12:59:26.125108 PCI: 00:1f.3 [8086/0000] bus ops
913 12:59:26.128382 PCI: 00:1f.3 [8086/a0c8] enabled
914 12:59:26.131646 PCI: 00:1f.5 [8086/0000] bus ops
915 12:59:26.134689 PCI: 00:1f.5 [8086/a0a4] enabled
916 12:59:26.138533 PCI: Leftover static devices:
917 12:59:26.138647 PCI: 00:10.2
918 12:59:26.141322 PCI: 00:10.6
919 12:59:26.141435 PCI: 00:10.7
920 12:59:26.141534 PCI: 00:06.0
921 12:59:26.144901 PCI: 00:07.1
922 12:59:26.145013 PCI: 00:07.2
923 12:59:26.147949 PCI: 00:07.3
924 12:59:26.148062 PCI: 00:09.0
925 12:59:26.148160 PCI: 00:0d.1
926 12:59:26.151801 PCI: 00:0d.2
927 12:59:26.151913 PCI: 00:0d.3
928 12:59:26.154697 PCI: 00:0e.0
929 12:59:26.154809 PCI: 00:12.0
930 12:59:26.158510 PCI: 00:12.6
931 12:59:26.158622 PCI: 00:13.0
932 12:59:26.158722 PCI: 00:14.1
933 12:59:26.161674 PCI: 00:16.1
934 12:59:26.161827 PCI: 00:16.2
935 12:59:26.164642 PCI: 00:16.3
936 12:59:26.164754 PCI: 00:16.4
937 12:59:26.164854 PCI: 00:16.5
938 12:59:26.168026 PCI: 00:17.0
939 12:59:26.168136 PCI: 00:19.2
940 12:59:26.171050 PCI: 00:1e.1
941 12:59:26.171161 PCI: 00:1f.1
942 12:59:26.171262 PCI: 00:1f.4
943 12:59:26.174659 PCI: 00:1f.6
944 12:59:26.174771 PCI: 00:1f.7
945 12:59:26.177809 PCI: Check your devicetree.cb.
946 12:59:26.181132 PCI: 00:02.0 scanning...
947 12:59:26.184516 scan_generic_bus for PCI: 00:02.0
948 12:59:26.187809 scan_generic_bus for PCI: 00:02.0 done
949 12:59:26.194491 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 12:59:26.194605 PCI: 00:04.0 scanning...
951 12:59:26.201475 scan_generic_bus for PCI: 00:04.0
952 12:59:26.201588 GENERIC: 0.0 enabled
953 12:59:26.207711 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 12:59:26.211357 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 12:59:26.214542 PCI: 00:0d.0 scanning...
956 12:59:26.217633 scan_static_bus for PCI: 00:0d.0
957 12:59:26.221124 USB0 port 0 enabled
958 12:59:26.224496 USB0 port 0 scanning...
959 12:59:26.227763 scan_static_bus for USB0 port 0
960 12:59:26.227879 USB3 port 0 enabled
961 12:59:26.230807 USB3 port 1 enabled
962 12:59:26.234399 USB3 port 2 disabled
963 12:59:26.234522 USB3 port 3 disabled
964 12:59:26.237614 USB3 port 0 scanning...
965 12:59:26.240919 scan_static_bus for USB3 port 0
966 12:59:26.243879 scan_static_bus for USB3 port 0 done
967 12:59:26.250539 scan_bus: bus USB3 port 0 finished in 6 msecs
968 12:59:26.250655 USB3 port 1 scanning...
969 12:59:26.253862 scan_static_bus for USB3 port 1
970 12:59:26.257434 scan_static_bus for USB3 port 1 done
971 12:59:26.263807 scan_bus: bus USB3 port 1 finished in 6 msecs
972 12:59:26.267568 scan_static_bus for USB0 port 0 done
973 12:59:26.270483 scan_bus: bus USB0 port 0 finished in 43 msecs
974 12:59:26.277207 scan_static_bus for PCI: 00:0d.0 done
975 12:59:26.280425 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 12:59:26.283571 PCI: 00:14.0 scanning...
977 12:59:26.287126 scan_static_bus for PCI: 00:14.0
978 12:59:26.290071 USB0 port 0 enabled
979 12:59:26.290183 USB0 port 0 scanning...
980 12:59:26.293607 scan_static_bus for USB0 port 0
981 12:59:26.296857 USB2 port 0 disabled
982 12:59:26.299894 USB2 port 1 enabled
983 12:59:26.300007 USB2 port 2 enabled
984 12:59:26.303413 USB2 port 3 disabled
985 12:59:26.303526 USB2 port 4 enabled
986 12:59:26.306519 USB2 port 5 disabled
987 12:59:26.309842 USB2 port 6 disabled
988 12:59:26.309954 USB2 port 7 disabled
989 12:59:26.313305 USB2 port 8 disabled
990 12:59:26.316640 USB2 port 9 disabled
991 12:59:26.316752 USB3 port 0 disabled
992 12:59:26.320440 USB3 port 1 enabled
993 12:59:26.323133 USB3 port 2 disabled
994 12:59:26.323244 USB3 port 3 disabled
995 12:59:26.326567 USB2 port 1 scanning...
996 12:59:26.330234 scan_static_bus for USB2 port 1
997 12:59:26.333154 scan_static_bus for USB2 port 1 done
998 12:59:26.339672 scan_bus: bus USB2 port 1 finished in 6 msecs
999 12:59:26.339786 USB2 port 2 scanning...
1000 12:59:26.343277 scan_static_bus for USB2 port 2
1001 12:59:26.349611 scan_static_bus for USB2 port 2 done
1002 12:59:26.353411 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 12:59:26.356384 USB2 port 4 scanning...
1004 12:59:26.359399 scan_static_bus for USB2 port 4
1005 12:59:26.362682 scan_static_bus for USB2 port 4 done
1006 12:59:26.365870 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 12:59:26.368937 USB3 port 1 scanning...
1008 12:59:26.372311 scan_static_bus for USB3 port 1
1009 12:59:26.375561 scan_static_bus for USB3 port 1 done
1010 12:59:26.382599 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 12:59:26.385847 scan_static_bus for USB0 port 0 done
1012 12:59:26.388797 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 12:59:26.392526 scan_static_bus for PCI: 00:14.0 done
1014 12:59:26.398862 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1015 12:59:26.398974 PCI: 00:14.3 scanning...
1016 12:59:26.402340 scan_static_bus for PCI: 00:14.3
1017 12:59:26.406198 GENERIC: 0.0 enabled
1018 12:59:26.409037 scan_static_bus for PCI: 00:14.3 done
1019 12:59:26.415568 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 12:59:26.415681 PCI: 00:15.0 scanning...
1021 12:59:26.419167 scan_static_bus for PCI: 00:15.0
1022 12:59:26.422776 I2C: 00:1a enabled
1023 12:59:26.425977 I2C: 00:31 enabled
1024 12:59:26.426089 I2C: 00:32 enabled
1025 12:59:26.429277 scan_static_bus for PCI: 00:15.0 done
1026 12:59:26.435709 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 12:59:26.438719 PCI: 00:15.1 scanning...
1028 12:59:26.442085 scan_static_bus for PCI: 00:15.1
1029 12:59:26.442197 I2C: 00:10 enabled
1030 12:59:26.445517 scan_static_bus for PCI: 00:15.1 done
1031 12:59:26.452062 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 12:59:26.455379 PCI: 00:15.2 scanning...
1033 12:59:26.458681 scan_static_bus for PCI: 00:15.2
1034 12:59:26.462034 scan_static_bus for PCI: 00:15.2 done
1035 12:59:26.465269 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 12:59:26.468478 PCI: 00:15.3 scanning...
1037 12:59:26.471680 scan_static_bus for PCI: 00:15.3
1038 12:59:26.475099 scan_static_bus for PCI: 00:15.3 done
1039 12:59:26.481999 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 12:59:26.485194 PCI: 00:19.1 scanning...
1041 12:59:26.488393 scan_static_bus for PCI: 00:19.1
1042 12:59:26.488509 I2C: 00:15 enabled
1043 12:59:26.491879 scan_static_bus for PCI: 00:19.1 done
1044 12:59:26.498382 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 12:59:26.501569 PCI: 00:1d.0 scanning...
1046 12:59:26.504676 do_pci_scan_bridge for PCI: 00:1d.0
1047 12:59:26.508045 PCI: pci_scan_bus for bus 01
1048 12:59:26.511386 PCI: 01:00.0 [15b7/5009] enabled
1049 12:59:26.511499 GENERIC: 0.0 enabled
1050 12:59:26.514298 Enabling Common Clock Configuration
1051 12:59:26.521197 L1 Sub-State supported from root port 29
1052 12:59:26.524747 L1 Sub-State Support = 0x5
1053 12:59:26.524860 CommonModeRestoreTime = 0x28
1054 12:59:26.530898 Power On Value = 0x16, Power On Scale = 0x0
1055 12:59:26.531009 ASPM: Enabled L1
1056 12:59:26.537480 PCIe: Max_Payload_Size adjusted to 128
1057 12:59:26.540709 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 12:59:26.544131 PCI: 00:1e.2 scanning...
1059 12:59:26.547733 scan_generic_bus for PCI: 00:1e.2
1060 12:59:26.547845 SPI: 00 enabled
1061 12:59:26.554159 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 12:59:26.560484 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 12:59:26.560597 PCI: 00:1e.3 scanning...
1064 12:59:26.567262 scan_generic_bus for PCI: 00:1e.3
1065 12:59:26.567375 SPI: 00 enabled
1066 12:59:26.574579 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 12:59:26.577954 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 12:59:26.581039 PCI: 00:1f.0 scanning...
1069 12:59:26.584634 scan_static_bus for PCI: 00:1f.0
1070 12:59:26.587929 PNP: 0c09.0 enabled
1071 12:59:26.588045 PNP: 0c09.0 scanning...
1072 12:59:26.591200 scan_static_bus for PNP: 0c09.0
1073 12:59:26.597674 scan_static_bus for PNP: 0c09.0 done
1074 12:59:26.600813 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 12:59:26.604844 scan_static_bus for PCI: 00:1f.0 done
1076 12:59:26.607766 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 12:59:26.610619 PCI: 00:1f.2 scanning...
1078 12:59:26.614160 scan_static_bus for PCI: 00:1f.2
1079 12:59:26.617561 GENERIC: 0.0 enabled
1080 12:59:26.620476 GENERIC: 0.0 scanning...
1081 12:59:26.624528 scan_static_bus for GENERIC: 0.0
1082 12:59:26.624640 GENERIC: 0.0 enabled
1083 12:59:26.627188 GENERIC: 1.0 enabled
1084 12:59:26.630811 scan_static_bus for GENERIC: 0.0 done
1085 12:59:26.637383 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 12:59:26.640618 scan_static_bus for PCI: 00:1f.2 done
1087 12:59:26.644205 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 12:59:26.647660 PCI: 00:1f.3 scanning...
1089 12:59:26.650764 scan_static_bus for PCI: 00:1f.3
1090 12:59:26.653851 scan_static_bus for PCI: 00:1f.3 done
1091 12:59:26.660552 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 12:59:26.660640 PCI: 00:1f.5 scanning...
1093 12:59:26.667572 scan_generic_bus for PCI: 00:1f.5
1094 12:59:26.670551 scan_generic_bus for PCI: 00:1f.5 done
1095 12:59:26.674804 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 12:59:26.680918 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1097 12:59:26.684089 scan_static_bus for Root Device done
1098 12:59:26.687448 scan_bus: bus Root Device finished in 735 msecs
1099 12:59:26.687536 done
1100 12:59:26.693915 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1101 12:59:26.696932 Chrome EC: UHEPI supported
1102 12:59:26.703794 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 12:59:26.710512 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 12:59:26.713429 SPI flash protection: WPSW=0 SRP0=1
1105 12:59:26.716995 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 12:59:26.723802 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 12:59:26.726615 found VGA at PCI: 00:02.0
1108 12:59:26.730203 Setting up VGA for PCI: 00:02.0
1109 12:59:26.736921 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 12:59:26.740547 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 12:59:26.743552 Allocating resources...
1112 12:59:26.743637 Reading resources...
1113 12:59:26.750008 Root Device read_resources bus 0 link: 0
1114 12:59:26.753328 DOMAIN: 0000 read_resources bus 0 link: 0
1115 12:59:26.760096 PCI: 00:04.0 read_resources bus 1 link: 0
1116 12:59:26.763278 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 12:59:26.769594 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 12:59:26.772825 USB0 port 0 read_resources bus 0 link: 0
1119 12:59:26.779915 USB0 port 0 read_resources bus 0 link: 0 done
1120 12:59:26.782740 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 12:59:26.786064 PCI: 00:14.0 read_resources bus 0 link: 0
1122 12:59:26.792781 USB0 port 0 read_resources bus 0 link: 0
1123 12:59:26.796586 USB0 port 0 read_resources bus 0 link: 0 done
1124 12:59:26.803108 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 12:59:26.806238 PCI: 00:14.3 read_resources bus 0 link: 0
1126 12:59:26.812911 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 12:59:26.816231 PCI: 00:15.0 read_resources bus 0 link: 0
1128 12:59:26.823752 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 12:59:26.826303 PCI: 00:15.1 read_resources bus 0 link: 0
1130 12:59:26.833159 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 12:59:26.836337 PCI: 00:19.1 read_resources bus 0 link: 0
1132 12:59:26.843393 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 12:59:26.846715 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 12:59:26.853639 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 12:59:26.856509 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 12:59:26.863139 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 12:59:26.867158 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 12:59:26.873319 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 12:59:26.876478 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 12:59:26.883263 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 12:59:26.886514 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 12:59:26.889557 GENERIC: 0.0 read_resources bus 0 link: 0
1143 12:59:26.897255 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 12:59:26.900086 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 12:59:26.907932 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 12:59:26.910786 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 12:59:26.917115 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 12:59:26.920566 Root Device read_resources bus 0 link: 0 done
1149 12:59:26.923752 Done reading resources.
1150 12:59:26.930290 Show resources in subtree (Root Device)...After reading.
1151 12:59:26.933735 Root Device child on link 0 DOMAIN: 0000
1152 12:59:26.937391 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 12:59:26.947328 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 12:59:26.957484 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 12:59:26.960304 PCI: 00:00.0
1156 12:59:26.970279 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 12:59:26.976716 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 12:59:26.987212 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 12:59:26.996701 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 12:59:27.007060 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 12:59:27.016691 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 12:59:27.026898 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 12:59:27.032863 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 12:59:27.042872 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 12:59:27.052748 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 12:59:27.062885 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 12:59:27.073094 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 12:59:27.082868 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 12:59:27.089250 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 12:59:27.099578 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 12:59:27.109504 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 12:59:27.119633 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 12:59:27.129119 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 12:59:27.139278 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 12:59:27.149283 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 12:59:27.149372 PCI: 00:02.0
1177 12:59:27.159267 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 12:59:27.168867 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 12:59:27.178856 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 12:59:27.182185 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 12:59:27.192094 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 12:59:27.195613 GENERIC: 0.0
1183 12:59:27.195701 PCI: 00:05.0
1184 12:59:27.205494 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 12:59:27.212330 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 12:59:27.212427 GENERIC: 0.0
1187 12:59:27.215186 PCI: 00:08.0
1188 12:59:27.225440 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 12:59:27.225530 PCI: 00:0a.0
1190 12:59:27.231730 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 12:59:27.242066 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 12:59:27.245115 USB0 port 0 child on link 0 USB3 port 0
1193 12:59:27.245201 USB3 port 0
1194 12:59:27.248500 USB3 port 1
1195 12:59:27.251707 USB3 port 2
1196 12:59:27.251793 USB3 port 3
1197 12:59:27.255005 PCI: 00:14.0 child on link 0 USB0 port 0
1198 12:59:27.265395 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 12:59:27.271909 USB0 port 0 child on link 0 USB2 port 0
1200 12:59:27.271996 USB2 port 0
1201 12:59:27.275177 USB2 port 1
1202 12:59:27.275263 USB2 port 2
1203 12:59:27.278019 USB2 port 3
1204 12:59:27.278104 USB2 port 4
1205 12:59:27.281664 USB2 port 5
1206 12:59:27.281786 USB2 port 6
1207 12:59:27.284779 USB2 port 7
1208 12:59:27.288202 USB2 port 8
1209 12:59:27.288288 USB2 port 9
1210 12:59:27.291293 USB3 port 0
1211 12:59:27.291379 USB3 port 1
1212 12:59:27.294797 USB3 port 2
1213 12:59:27.294883 USB3 port 3
1214 12:59:27.298046 PCI: 00:14.2
1215 12:59:27.308410 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 12:59:27.318215 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 12:59:27.321235 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 12:59:27.331120 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 12:59:27.334491 GENERIC: 0.0
1220 12:59:27.337821 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 12:59:27.347929 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:59:27.348016 I2C: 00:1a
1223 12:59:27.350964 I2C: 00:31
1224 12:59:27.351047 I2C: 00:32
1225 12:59:27.357769 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 12:59:27.367645 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:59:27.367740 I2C: 00:10
1228 12:59:27.370912 PCI: 00:15.2
1229 12:59:27.381017 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 12:59:27.381107 PCI: 00:15.3
1231 12:59:27.390888 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:59:27.393953 PCI: 00:16.0
1233 12:59:27.403900 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:59:27.403996 PCI: 00:19.0
1235 12:59:27.407368 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 12:59:27.416991 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:59:27.420265 I2C: 00:15
1238 12:59:27.423494 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 12:59:27.433566 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 12:59:27.443384 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 12:59:27.453984 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 12:59:27.454073 GENERIC: 0.0
1243 12:59:27.456663 PCI: 01:00.0
1244 12:59:27.467017 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 12:59:27.476863 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1246 12:59:27.476955 PCI: 00:1e.0
1247 12:59:27.489766 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 12:59:27.492985 PCI: 00:1e.2 child on link 0 SPI: 00
1249 12:59:27.503269 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:59:27.503359 SPI: 00
1251 12:59:27.506415 PCI: 00:1e.3 child on link 0 SPI: 00
1252 12:59:27.516119 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 12:59:27.519944 SPI: 00
1254 12:59:27.522791 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1255 12:59:27.532812 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1256 12:59:27.532901 PNP: 0c09.0
1257 12:59:27.542800 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1258 12:59:27.545851 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1259 12:59:27.555833 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1260 12:59:27.565978 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1261 12:59:27.569230 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1262 12:59:27.572660 GENERIC: 0.0
1263 12:59:27.572747 GENERIC: 1.0
1264 12:59:27.576211 PCI: 00:1f.3
1265 12:59:27.585623 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1266 12:59:27.595361 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1267 12:59:27.598961 PCI: 00:1f.5
1268 12:59:27.605317 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1269 12:59:27.612075 CPU_CLUSTER: 0 child on link 0 APIC: 00
1270 12:59:27.612163 APIC: 00
1271 12:59:27.612232 APIC: 01
1272 12:59:27.615245 APIC: 07
1273 12:59:27.615331 APIC: 02
1274 12:59:27.615398 APIC: 04
1275 12:59:27.618981 APIC: 06
1276 12:59:27.619068 APIC: 03
1277 12:59:27.622065 APIC: 05
1278 12:59:27.628884 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1279 12:59:27.635409 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1280 12:59:27.641658 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1281 12:59:27.645307 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1282 12:59:27.651903 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1283 12:59:27.655081 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1284 12:59:27.661483 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 12:59:27.668838 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 12:59:27.678192 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 12:59:27.684909 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 12:59:27.691283 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 12:59:27.697932 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 12:59:27.704471 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 12:59:27.714338 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 12:59:27.718229 DOMAIN: 0000: Resource ranges:
1293 12:59:27.721347 * Base: 1000, Size: 800, Tag: 100
1294 12:59:27.724380 * Base: 1900, Size: e700, Tag: 100
1295 12:59:27.727618 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 12:59:27.734292 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 12:59:27.740900 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 12:59:27.751429 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 12:59:27.757370 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 12:59:27.764091 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 12:59:27.774226 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 12:59:27.780534 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 12:59:27.787758 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 12:59:27.797228 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 12:59:27.804019 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 12:59:27.810972 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 12:59:27.820636 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 12:59:27.827437 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 12:59:27.833509 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 12:59:27.843379 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 12:59:27.850039 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 12:59:27.856742 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 12:59:27.866918 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 12:59:27.873033 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1315 12:59:27.879785 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 12:59:27.890675 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 12:59:27.896434 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 12:59:27.902872 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 12:59:27.912950 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 12:59:27.916130 DOMAIN: 0000: Resource ranges:
1321 12:59:27.919684 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 12:59:27.922709 * Base: d0000000, Size: 28000000, Tag: 200
1323 12:59:27.929868 * Base: fa000000, Size: 1000000, Tag: 200
1324 12:59:27.933028 * Base: fb001000, Size: 2fff000, Tag: 200
1325 12:59:27.935903 * Base: fe010000, Size: 2e000, Tag: 200
1326 12:59:27.939696 * Base: fe03f000, Size: d41000, Tag: 200
1327 12:59:27.946074 * Base: fed88000, Size: 8000, Tag: 200
1328 12:59:27.949262 * Base: fed93000, Size: d000, Tag: 200
1329 12:59:27.952592 * Base: feda2000, Size: 1e000, Tag: 200
1330 12:59:27.955607 * Base: fede0000, Size: 1220000, Tag: 200
1331 12:59:27.962386 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1332 12:59:27.969254 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 12:59:27.975566 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 12:59:27.982334 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 12:59:27.989094 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 12:59:27.995384 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 12:59:28.002471 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 12:59:28.008743 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 12:59:28.015395 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 12:59:28.022003 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 12:59:28.028790 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 12:59:28.035189 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 12:59:28.041860 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 12:59:28.048263 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 12:59:28.054907 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 12:59:28.061509 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 12:59:28.068293 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 12:59:28.074645 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 12:59:28.081604 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 12:59:28.088254 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 12:59:28.094722 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 12:59:28.101604 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 12:59:28.107746 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 12:59:28.114800 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 12:59:28.124536 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 12:59:28.128165 PCI: 00:1d.0: Resource ranges:
1357 12:59:28.131147 * Base: 7fc00000, Size: 100000, Tag: 200
1358 12:59:28.137713 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 12:59:28.144279 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1360 12:59:28.153967 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 12:59:28.161091 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 12:59:28.164307 Root Device assign_resources, bus 0 link: 0
1363 12:59:28.170724 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 12:59:28.177342 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 12:59:28.187568 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 12:59:28.193903 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 12:59:28.200526 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 12:59:28.207105 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 12:59:28.210243 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 12:59:28.220174 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1371 12:59:28.227152 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1372 12:59:28.236720 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1373 12:59:28.239951 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1374 12:59:28.246796 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 12:59:28.253210 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1376 12:59:28.256222 PCI: 00:14.0 assign_resources, bus 0 link: 0
1377 12:59:28.262826 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 12:59:28.269479 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1379 12:59:28.279411 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1380 12:59:28.286264 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1381 12:59:28.292449 PCI: 00:14.3 assign_resources, bus 0 link: 0
1382 12:59:28.295759 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 12:59:28.305672 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1384 12:59:28.309390 PCI: 00:15.0 assign_resources, bus 0 link: 0
1385 12:59:28.312620 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 12:59:28.322270 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1387 12:59:28.325644 PCI: 00:15.1 assign_resources, bus 0 link: 0
1388 12:59:28.332323 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 12:59:28.338664 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1390 12:59:28.348441 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1391 12:59:28.355684 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1392 12:59:28.365250 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1393 12:59:28.368240 PCI: 00:19.1 assign_resources, bus 0 link: 0
1394 12:59:28.371717 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 12:59:28.382013 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1396 12:59:28.391985 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1397 12:59:28.401972 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1398 12:59:28.405266 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 12:59:28.411761 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1400 12:59:28.421456 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1401 12:59:28.424698 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 12:59:28.434507 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1403 12:59:28.438131 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1404 12:59:28.445117 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1405 12:59:28.451035 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1406 12:59:28.454232 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1407 12:59:28.461057 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1408 12:59:28.464340 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1409 12:59:28.471287 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1410 12:59:28.474046 LPC: Trying to open IO window from 800 size 1ff
1411 12:59:28.484808 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1412 12:59:28.491196 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1413 12:59:28.500563 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1414 12:59:28.503851 DOMAIN: 0000 assign_resources, bus 0 link: 0
1415 12:59:28.507551 Root Device assign_resources, bus 0 link: 0
1416 12:59:28.510412 Done setting resources.
1417 12:59:28.517071 Show resources in subtree (Root Device)...After assigning values.
1418 12:59:28.520393 Root Device child on link 0 DOMAIN: 0000
1419 12:59:28.527154 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1420 12:59:28.537169 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1421 12:59:28.547126 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1422 12:59:28.547215 PCI: 00:00.0
1423 12:59:28.556712 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1424 12:59:28.566823 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1425 12:59:28.576976 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1426 12:59:28.586720 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1427 12:59:28.593771 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1428 12:59:28.603300 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1429 12:59:28.613214 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1430 12:59:28.622995 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1431 12:59:28.632862 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1432 12:59:28.642768 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1433 12:59:28.649541 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1434 12:59:28.659170 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1435 12:59:28.669364 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1436 12:59:28.679003 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1437 12:59:28.689053 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1438 12:59:28.695746 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1439 12:59:28.708733 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1440 12:59:28.715431 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1441 12:59:28.725469 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1442 12:59:28.735206 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1443 12:59:28.738266 PCI: 00:02.0
1444 12:59:28.748545 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1445 12:59:28.758359 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1446 12:59:28.768519 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1447 12:59:28.771574 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1448 12:59:28.781625 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1449 12:59:28.785145 GENERIC: 0.0
1450 12:59:28.785230 PCI: 00:05.0
1451 12:59:28.798336 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1452 12:59:28.801383 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1453 12:59:28.801469 GENERIC: 0.0
1454 12:59:28.804803 PCI: 00:08.0
1455 12:59:28.814512 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1456 12:59:28.817682 PCI: 00:0a.0
1457 12:59:28.821314 PCI: 00:0d.0 child on link 0 USB0 port 0
1458 12:59:28.831095 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1459 12:59:28.834133 USB0 port 0 child on link 0 USB3 port 0
1460 12:59:28.837528 USB3 port 0
1461 12:59:28.840705 USB3 port 1
1462 12:59:28.840790 USB3 port 2
1463 12:59:28.844227 USB3 port 3
1464 12:59:28.847843 PCI: 00:14.0 child on link 0 USB0 port 0
1465 12:59:28.857303 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1466 12:59:28.860663 USB0 port 0 child on link 0 USB2 port 0
1467 12:59:28.863931 USB2 port 0
1468 12:59:28.867111 USB2 port 1
1469 12:59:28.867196 USB2 port 2
1470 12:59:28.870334 USB2 port 3
1471 12:59:28.870421 USB2 port 4
1472 12:59:28.873695 USB2 port 5
1473 12:59:28.873836 USB2 port 6
1474 12:59:28.877164 USB2 port 7
1475 12:59:28.877250 USB2 port 8
1476 12:59:28.880604 USB2 port 9
1477 12:59:28.880689 USB3 port 0
1478 12:59:28.883913 USB3 port 1
1479 12:59:28.883998 USB3 port 2
1480 12:59:28.888045 USB3 port 3
1481 12:59:28.888130 PCI: 00:14.2
1482 12:59:28.901094 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1483 12:59:28.910317 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1484 12:59:28.913580 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1485 12:59:28.923857 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1486 12:59:28.927259 GENERIC: 0.0
1487 12:59:28.930049 PCI: 00:15.0 child on link 0 I2C: 00:1a
1488 12:59:28.940215 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1489 12:59:28.943939 I2C: 00:1a
1490 12:59:28.944037 I2C: 00:31
1491 12:59:28.946536 I2C: 00:32
1492 12:59:28.949852 PCI: 00:15.1 child on link 0 I2C: 00:10
1493 12:59:28.960100 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1494 12:59:28.960196 I2C: 00:10
1495 12:59:28.963163 PCI: 00:15.2
1496 12:59:28.972798 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1497 12:59:28.976315 PCI: 00:15.3
1498 12:59:28.986327 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1499 12:59:28.986415 PCI: 00:16.0
1500 12:59:28.996450 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1501 12:59:28.999375 PCI: 00:19.0
1502 12:59:29.003057 PCI: 00:19.1 child on link 0 I2C: 00:15
1503 12:59:29.012766 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1504 12:59:29.016535 I2C: 00:15
1505 12:59:29.019353 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1506 12:59:29.028998 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1507 12:59:29.039345 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1508 12:59:29.052412 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1509 12:59:29.052506 GENERIC: 0.0
1510 12:59:29.055683 PCI: 01:00.0
1511 12:59:29.065446 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1512 12:59:29.075375 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1513 12:59:29.075472 PCI: 00:1e.0
1514 12:59:29.088572 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 12:59:29.091953 PCI: 00:1e.2 child on link 0 SPI: 00
1516 12:59:29.102160 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 12:59:29.102250 SPI: 00
1518 12:59:29.108603 PCI: 00:1e.3 child on link 0 SPI: 00
1519 12:59:29.118401 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 12:59:29.118490 SPI: 00
1521 12:59:29.124635 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 12:59:29.131350 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 12:59:29.134486 PNP: 0c09.0
1524 12:59:29.141443 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 12:59:29.147992 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 12:59:29.157718 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 12:59:29.164715 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 12:59:29.171104 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 12:59:29.171190 GENERIC: 0.0
1530 12:59:29.174564 GENERIC: 1.0
1531 12:59:29.174650 PCI: 00:1f.3
1532 12:59:29.187514 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 12:59:29.198000 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 12:59:29.198089 PCI: 00:1f.5
1535 12:59:29.207888 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 12:59:29.214099 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 12:59:29.214186 APIC: 00
1538 12:59:29.214252 APIC: 01
1539 12:59:29.217539 APIC: 07
1540 12:59:29.217625 APIC: 02
1541 12:59:29.220599 APIC: 04
1542 12:59:29.220684 APIC: 06
1543 12:59:29.220750 APIC: 03
1544 12:59:29.224116 APIC: 05
1545 12:59:29.227276 Done allocating resources.
1546 12:59:29.230468 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1547 12:59:29.237254 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 12:59:29.240701 Configure GPIOs for I2S audio on UP4.
1549 12:59:29.247977 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 12:59:29.251738 Enabling resources...
1551 12:59:29.254561 PCI: 00:00.0 subsystem <- 8086/9a12
1552 12:59:29.257686 PCI: 00:00.0 cmd <- 06
1553 12:59:29.261575 PCI: 00:02.0 subsystem <- 8086/9a40
1554 12:59:29.264343 PCI: 00:02.0 cmd <- 03
1555 12:59:29.267668 PCI: 00:04.0 subsystem <- 8086/9a03
1556 12:59:29.271112 PCI: 00:04.0 cmd <- 02
1557 12:59:29.274940 PCI: 00:05.0 subsystem <- 8086/9a19
1558 12:59:29.275028 PCI: 00:05.0 cmd <- 02
1559 12:59:29.281206 PCI: 00:08.0 subsystem <- 8086/9a11
1560 12:59:29.281293 PCI: 00:08.0 cmd <- 06
1561 12:59:29.284729 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 12:59:29.287468 PCI: 00:0d.0 cmd <- 02
1563 12:59:29.291212 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 12:59:29.294620 PCI: 00:14.0 cmd <- 02
1565 12:59:29.297720 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 12:59:29.300664 PCI: 00:14.2 cmd <- 02
1567 12:59:29.303985 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 12:59:29.307575 PCI: 00:14.3 cmd <- 02
1569 12:59:29.310428 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 12:59:29.314088 PCI: 00:15.0 cmd <- 02
1571 12:59:29.317328 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 12:59:29.320494 PCI: 00:15.1 cmd <- 02
1573 12:59:29.323575 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 12:59:29.326924 PCI: 00:15.2 cmd <- 02
1575 12:59:29.330145 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 12:59:29.330230 PCI: 00:15.3 cmd <- 02
1577 12:59:29.337090 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 12:59:29.337175 PCI: 00:16.0 cmd <- 02
1579 12:59:29.339935 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 12:59:29.343556 PCI: 00:19.1 cmd <- 02
1581 12:59:29.347077 PCI: 00:1d.0 bridge ctrl <- 0013
1582 12:59:29.350069 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 12:59:29.353139 PCI: 00:1d.0 cmd <- 06
1584 12:59:29.356788 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 12:59:29.359859 PCI: 00:1e.0 cmd <- 06
1586 12:59:29.363267 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 12:59:29.366335 PCI: 00:1e.2 cmd <- 06
1588 12:59:29.369990 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 12:59:29.373337 PCI: 00:1e.3 cmd <- 02
1590 12:59:29.376268 PCI: 00:1f.0 subsystem <- 8086/a087
1591 12:59:29.379687 PCI: 00:1f.0 cmd <- 407
1592 12:59:29.382780 PCI: 00:1f.3 subsystem <- 8086/a0c8
1593 12:59:29.386177 PCI: 00:1f.3 cmd <- 02
1594 12:59:29.389298 PCI: 00:1f.5 subsystem <- 8086/a0a4
1595 12:59:29.389382 PCI: 00:1f.5 cmd <- 406
1596 12:59:29.395373 PCI: 01:00.0 cmd <- 02
1597 12:59:29.399392 done.
1598 12:59:29.402666 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1599 12:59:29.406174 Initializing devices...
1600 12:59:29.409666 Root Device init
1601 12:59:29.413110 Chrome EC: Set SMI mask to 0x0000000000000000
1602 12:59:29.419614 Chrome EC: clear events_b mask to 0x0000000000000000
1603 12:59:29.426003 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1604 12:59:29.429242 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1605 12:59:29.435778 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1606 12:59:29.442911 Chrome EC: Set WAKE mask to 0x0000000000000000
1607 12:59:29.445944 fw_config match found: DB_USB=USB3_ACTIVE
1608 12:59:29.452575 Configure Right Type-C port orientation for retimer
1609 12:59:29.456294 Root Device init finished in 42 msecs
1610 12:59:29.459314 PCI: 00:00.0 init
1611 12:59:29.462622 CPU TDP = 9 Watts
1612 12:59:29.462710 CPU PL1 = 9 Watts
1613 12:59:29.465703 CPU PL2 = 40 Watts
1614 12:59:29.465823 CPU PL4 = 83 Watts
1615 12:59:29.469111 PCI: 00:00.0 init finished in 8 msecs
1616 12:59:29.472809 PCI: 00:02.0 init
1617 12:59:29.475902 GMA: Found VBT in CBFS
1618 12:59:29.479141 GMA: Found valid VBT in CBFS
1619 12:59:29.482384 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1620 12:59:29.492159 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1621 12:59:29.496110 PCI: 00:02.0 init finished in 18 msecs
1622 12:59:29.498860 PCI: 00:05.0 init
1623 12:59:29.502241 PCI: 00:05.0 init finished in 0 msecs
1624 12:59:29.502327 PCI: 00:08.0 init
1625 12:59:29.509162 PCI: 00:08.0 init finished in 0 msecs
1626 12:59:29.509247 PCI: 00:14.0 init
1627 12:59:29.515241 PCI: 00:14.0 init finished in 0 msecs
1628 12:59:29.515327 PCI: 00:14.2 init
1629 12:59:29.518855 PCI: 00:14.2 init finished in 0 msecs
1630 12:59:29.522276 PCI: 00:15.0 init
1631 12:59:29.525675 I2C bus 0 version 0x3230302a
1632 12:59:29.529133 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 12:59:29.532470 PCI: 00:15.0 init finished in 6 msecs
1634 12:59:29.536109 PCI: 00:15.1 init
1635 12:59:29.539144 I2C bus 1 version 0x3230302a
1636 12:59:29.542386 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 12:59:29.545654 PCI: 00:15.1 init finished in 6 msecs
1638 12:59:29.548840 PCI: 00:15.2 init
1639 12:59:29.552050 I2C bus 2 version 0x3230302a
1640 12:59:29.555318 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1641 12:59:29.558562 PCI: 00:15.2 init finished in 6 msecs
1642 12:59:29.562111 PCI: 00:15.3 init
1643 12:59:29.562196 I2C bus 3 version 0x3230302a
1644 12:59:29.568491 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1645 12:59:29.572412 PCI: 00:15.3 init finished in 6 msecs
1646 12:59:29.572497 PCI: 00:16.0 init
1647 12:59:29.578256 PCI: 00:16.0 init finished in 0 msecs
1648 12:59:29.578341 PCI: 00:19.1 init
1649 12:59:29.581760 I2C bus 5 version 0x3230302a
1650 12:59:29.585183 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1651 12:59:29.588373 PCI: 00:19.1 init finished in 6 msecs
1652 12:59:29.592060 PCI: 00:1d.0 init
1653 12:59:29.595419 Initializing PCH PCIe bridge.
1654 12:59:29.598344 PCI: 00:1d.0 init finished in 3 msecs
1655 12:59:29.601873 PCI: 00:1f.0 init
1656 12:59:29.605409 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 12:59:29.611618 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 12:59:29.611703 IOAPIC: ID = 0x02
1659 12:59:29.614959 IOAPIC: Dumping registers
1660 12:59:29.618270 reg 0x0000: 0x02000000
1661 12:59:29.621513 reg 0x0001: 0x00770020
1662 12:59:29.621597 reg 0x0002: 0x00000000
1663 12:59:29.628183 PCI: 00:1f.0 init finished in 21 msecs
1664 12:59:29.628266 PCI: 00:1f.2 init
1665 12:59:29.631461 Disabling ACPI via APMC.
1666 12:59:29.636387 APMC done.
1667 12:59:29.639324 PCI: 00:1f.2 init finished in 6 msecs
1668 12:59:29.650936 PCI: 01:00.0 init
1669 12:59:29.654251 PCI: 01:00.0 init finished in 0 msecs
1670 12:59:29.657718 PNP: 0c09.0 init
1671 12:59:29.660663 Google Chrome EC uptime: 8.253 seconds
1672 12:59:29.667853 Google Chrome AP resets since EC boot: 1
1673 12:59:29.671049 Google Chrome most recent AP reset causes:
1674 12:59:29.673951 0.451: 32775 shutdown: entering G3
1675 12:59:29.680556 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1676 12:59:29.683770 PNP: 0c09.0 init finished in 23 msecs
1677 12:59:29.689880 Devices initialized
1678 12:59:29.693309 Show all devs... After init.
1679 12:59:29.696812 Root Device: enabled 1
1680 12:59:29.696907 DOMAIN: 0000: enabled 1
1681 12:59:29.699900 CPU_CLUSTER: 0: enabled 1
1682 12:59:29.703463 PCI: 00:00.0: enabled 1
1683 12:59:29.706842 PCI: 00:02.0: enabled 1
1684 12:59:29.706927 PCI: 00:04.0: enabled 1
1685 12:59:29.710327 PCI: 00:05.0: enabled 1
1686 12:59:29.713382 PCI: 00:06.0: enabled 0
1687 12:59:29.716968 PCI: 00:07.0: enabled 0
1688 12:59:29.717052 PCI: 00:07.1: enabled 0
1689 12:59:29.719837 PCI: 00:07.2: enabled 0
1690 12:59:29.723309 PCI: 00:07.3: enabled 0
1691 12:59:29.726370 PCI: 00:08.0: enabled 1
1692 12:59:29.726454 PCI: 00:09.0: enabled 0
1693 12:59:29.730225 PCI: 00:0a.0: enabled 0
1694 12:59:29.733598 PCI: 00:0d.0: enabled 1
1695 12:59:29.736892 PCI: 00:0d.1: enabled 0
1696 12:59:29.736975 PCI: 00:0d.2: enabled 0
1697 12:59:29.740272 PCI: 00:0d.3: enabled 0
1698 12:59:29.743284 PCI: 00:0e.0: enabled 0
1699 12:59:29.743369 PCI: 00:10.2: enabled 1
1700 12:59:29.746700 PCI: 00:10.6: enabled 0
1701 12:59:29.749992 PCI: 00:10.7: enabled 0
1702 12:59:29.753238 PCI: 00:12.0: enabled 0
1703 12:59:29.753322 PCI: 00:12.6: enabled 0
1704 12:59:29.756449 PCI: 00:13.0: enabled 0
1705 12:59:29.759936 PCI: 00:14.0: enabled 1
1706 12:59:29.763156 PCI: 00:14.1: enabled 0
1707 12:59:29.763241 PCI: 00:14.2: enabled 1
1708 12:59:29.766592 PCI: 00:14.3: enabled 1
1709 12:59:29.769709 PCI: 00:15.0: enabled 1
1710 12:59:29.773008 PCI: 00:15.1: enabled 1
1711 12:59:29.773093 PCI: 00:15.2: enabled 1
1712 12:59:29.776864 PCI: 00:15.3: enabled 1
1713 12:59:29.779714 PCI: 00:16.0: enabled 1
1714 12:59:29.783487 PCI: 00:16.1: enabled 0
1715 12:59:29.783571 PCI: 00:16.2: enabled 0
1716 12:59:29.786509 PCI: 00:16.3: enabled 0
1717 12:59:29.789677 PCI: 00:16.4: enabled 0
1718 12:59:29.789796 PCI: 00:16.5: enabled 0
1719 12:59:29.792710 PCI: 00:17.0: enabled 0
1720 12:59:29.796390 PCI: 00:19.0: enabled 0
1721 12:59:29.799763 PCI: 00:19.1: enabled 1
1722 12:59:29.799846 PCI: 00:19.2: enabled 0
1723 12:59:29.802945 PCI: 00:1c.0: enabled 1
1724 12:59:29.806089 PCI: 00:1c.1: enabled 0
1725 12:59:29.809572 PCI: 00:1c.2: enabled 0
1726 12:59:29.809656 PCI: 00:1c.3: enabled 0
1727 12:59:29.812858 PCI: 00:1c.4: enabled 0
1728 12:59:29.816096 PCI: 00:1c.5: enabled 0
1729 12:59:29.819107 PCI: 00:1c.6: enabled 1
1730 12:59:29.819192 PCI: 00:1c.7: enabled 0
1731 12:59:29.822709 PCI: 00:1d.0: enabled 1
1732 12:59:29.825942 PCI: 00:1d.1: enabled 0
1733 12:59:29.829531 PCI: 00:1d.2: enabled 1
1734 12:59:29.829615 PCI: 00:1d.3: enabled 0
1735 12:59:29.832739 PCI: 00:1e.0: enabled 1
1736 12:59:29.835967 PCI: 00:1e.1: enabled 0
1737 12:59:29.836051 PCI: 00:1e.2: enabled 1
1738 12:59:29.838984 PCI: 00:1e.3: enabled 1
1739 12:59:29.842651 PCI: 00:1f.0: enabled 1
1740 12:59:29.845957 PCI: 00:1f.1: enabled 0
1741 12:59:29.846041 PCI: 00:1f.2: enabled 1
1742 12:59:29.849106 PCI: 00:1f.3: enabled 1
1743 12:59:29.852648 PCI: 00:1f.4: enabled 0
1744 12:59:29.855765 PCI: 00:1f.5: enabled 1
1745 12:59:29.855850 PCI: 00:1f.6: enabled 0
1746 12:59:29.858973 PCI: 00:1f.7: enabled 0
1747 12:59:29.862411 APIC: 00: enabled 1
1748 12:59:29.862497 GENERIC: 0.0: enabled 1
1749 12:59:29.865480 GENERIC: 0.0: enabled 1
1750 12:59:29.869233 GENERIC: 1.0: enabled 1
1751 12:59:29.872417 GENERIC: 0.0: enabled 1
1752 12:59:29.872501 GENERIC: 1.0: enabled 1
1753 12:59:29.875922 USB0 port 0: enabled 1
1754 12:59:29.879338 GENERIC: 0.0: enabled 1
1755 12:59:29.882250 USB0 port 0: enabled 1
1756 12:59:29.882334 GENERIC: 0.0: enabled 1
1757 12:59:29.885978 I2C: 00:1a: enabled 1
1758 12:59:29.888738 I2C: 00:31: enabled 1
1759 12:59:29.888822 I2C: 00:32: enabled 1
1760 12:59:29.892672 I2C: 00:10: enabled 1
1761 12:59:29.895410 I2C: 00:15: enabled 1
1762 12:59:29.895495 GENERIC: 0.0: enabled 0
1763 12:59:29.898971 GENERIC: 1.0: enabled 0
1764 12:59:29.902488 GENERIC: 0.0: enabled 1
1765 12:59:29.902572 SPI: 00: enabled 1
1766 12:59:29.905579 SPI: 00: enabled 1
1767 12:59:29.909066 PNP: 0c09.0: enabled 1
1768 12:59:29.909150 GENERIC: 0.0: enabled 1
1769 12:59:29.912115 USB3 port 0: enabled 1
1770 12:59:29.916024 USB3 port 1: enabled 1
1771 12:59:29.919112 USB3 port 2: enabled 0
1772 12:59:29.919196 USB3 port 3: enabled 0
1773 12:59:29.922366 USB2 port 0: enabled 0
1774 12:59:29.925582 USB2 port 1: enabled 1
1775 12:59:29.925666 USB2 port 2: enabled 1
1776 12:59:29.928489 USB2 port 3: enabled 0
1777 12:59:29.932192 USB2 port 4: enabled 1
1778 12:59:29.935524 USB2 port 5: enabled 0
1779 12:59:29.935605 USB2 port 6: enabled 0
1780 12:59:29.938813 USB2 port 7: enabled 0
1781 12:59:29.942080 USB2 port 8: enabled 0
1782 12:59:29.942165 USB2 port 9: enabled 0
1783 12:59:29.945346 USB3 port 0: enabled 0
1784 12:59:29.948433 USB3 port 1: enabled 1
1785 12:59:29.952011 USB3 port 2: enabled 0
1786 12:59:29.952096 USB3 port 3: enabled 0
1787 12:59:29.955384 GENERIC: 0.0: enabled 1
1788 12:59:29.958367 GENERIC: 1.0: enabled 1
1789 12:59:29.958457 APIC: 01: enabled 1
1790 12:59:29.961646 APIC: 07: enabled 1
1791 12:59:29.966041 APIC: 02: enabled 1
1792 12:59:29.966127 APIC: 04: enabled 1
1793 12:59:29.968355 APIC: 06: enabled 1
1794 12:59:29.968440 APIC: 03: enabled 1
1795 12:59:29.971751 APIC: 05: enabled 1
1796 12:59:29.975252 PCI: 01:00.0: enabled 1
1797 12:59:29.978530 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1798 12:59:29.985291 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1799 12:59:29.988359 ELOG: NV offset 0xf30000 size 0x1000
1800 12:59:29.995104 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1801 12:59:30.002103 ELOG: Event(17) added with size 13 at 2022-08-31 12:58:58 UTC
1802 12:59:30.008229 ELOG: Event(92) added with size 9 at 2022-08-31 12:58:58 UTC
1803 12:59:30.014949 ELOG: Event(93) added with size 9 at 2022-08-31 12:58:58 UTC
1804 12:59:30.021483 ELOG: Event(9E) added with size 10 at 2022-08-31 12:58:58 UTC
1805 12:59:30.028212 ELOG: Event(9F) added with size 14 at 2022-08-31 12:58:58 UTC
1806 12:59:30.034741 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1807 12:59:30.041485 ELOG: Event(A1) added with size 10 at 2022-08-31 12:58:58 UTC
1808 12:59:30.047823 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 12:59:30.054675 ELOG: Event(A0) added with size 9 at 2022-08-31 12:58:58 UTC
1810 12:59:30.058041 elog_add_boot_reason: Logged dev mode boot
1811 12:59:30.064450 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1812 12:59:30.064545 Finalize devices...
1813 12:59:30.067609 Devices finalized
1814 12:59:30.074579 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 12:59:30.077451 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 12:59:30.084407 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 12:59:30.087936 ME: HFSTS1 : 0x80030055
1818 12:59:30.094347 ME: HFSTS2 : 0x30280116
1819 12:59:30.097559 ME: HFSTS3 : 0x00000050
1820 12:59:30.100741 ME: HFSTS4 : 0x00004000
1821 12:59:30.107305 ME: HFSTS5 : 0x00000000
1822 12:59:30.110760 ME: HFSTS6 : 0x40400006
1823 12:59:30.114060 ME: Manufacturing Mode : YES
1824 12:59:30.118035 ME: SPI Protection Mode Enabled : NO
1825 12:59:30.124270 ME: FW Partition Table : OK
1826 12:59:30.127569 ME: Bringup Loader Failure : NO
1827 12:59:30.130539 ME: Firmware Init Complete : NO
1828 12:59:30.133993 ME: Boot Options Present : NO
1829 12:59:30.137349 ME: Update In Progress : NO
1830 12:59:30.140630 ME: D0i3 Support : YES
1831 12:59:30.143885 ME: Low Power State Enabled : NO
1832 12:59:30.150257 ME: CPU Replaced : YES
1833 12:59:30.153617 ME: CPU Replacement Valid : YES
1834 12:59:30.156849 ME: Current Working State : 5
1835 12:59:30.160076 ME: Current Operation State : 1
1836 12:59:30.163399 ME: Current Operation Mode : 3
1837 12:59:30.167581 ME: Error Code : 0
1838 12:59:30.170298 ME: Enhanced Debug Mode : NO
1839 12:59:30.173413 ME: CPU Debug Disabled : YES
1840 12:59:30.176655 ME: TXT Support : NO
1841 12:59:30.184229 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 12:59:30.193452 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 12:59:30.196410 CBFS: 'fallback/slic' not found.
1844 12:59:30.199996 ACPI: Writing ACPI tables at 76b01000.
1845 12:59:30.200113 ACPI: * FACS
1846 12:59:30.203283 ACPI: * DSDT
1847 12:59:30.206572 Ramoops buffer: 0x100000@0x76a00000.
1848 12:59:30.209900 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 12:59:30.216387 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 12:59:30.219988 Google Chrome EC: version:
1851 12:59:30.223281 ro: voema_v2.0.10114-a447f03e46
1852 12:59:30.226121 rw: voema_v2.0.10114-a447f03e46
1853 12:59:30.226207 running image: 2
1854 12:59:30.232680 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1855 12:59:30.237892 ACPI: * FADT
1856 12:59:30.237980 SCI is IRQ9
1857 12:59:30.244470 ACPI: added table 1/32, length now 40
1858 12:59:30.244555 ACPI: * SSDT
1859 12:59:30.247830 Found 1 CPU(s) with 8 core(s) each.
1860 12:59:30.254701 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1861 12:59:30.257814 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1862 12:59:30.261343 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1863 12:59:30.264260 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1864 12:59:30.271140 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1865 12:59:30.278023 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1866 12:59:30.280817 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1867 12:59:30.287896 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1868 12:59:30.294834 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1869 12:59:30.297227 \_SB.PCI0.RP09: Added StorageD3Enable property
1870 12:59:30.303859 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1871 12:59:30.307409 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1872 12:59:30.314098 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1873 12:59:30.317057 PS2K: Passing 80 keymaps to kernel
1874 12:59:30.323769 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1875 12:59:30.330499 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1876 12:59:30.337310 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1877 12:59:30.343685 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1878 12:59:30.351001 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1879 12:59:30.357110 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1880 12:59:30.363534 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1881 12:59:30.370793 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1882 12:59:30.373562 ACPI: added table 2/32, length now 44
1883 12:59:30.373673 ACPI: * MCFG
1884 12:59:30.376907 ACPI: added table 3/32, length now 48
1885 12:59:30.380394 ACPI: * TPM2
1886 12:59:30.383801 TPM2 log created at 0x769f0000
1887 12:59:30.386664 ACPI: added table 4/32, length now 52
1888 12:59:30.390871 ACPI: * MADT
1889 12:59:30.390957 SCI is IRQ9
1890 12:59:30.393595 ACPI: added table 5/32, length now 56
1891 12:59:30.396954 current = 76b09850
1892 12:59:30.397044 ACPI: * DMAR
1893 12:59:30.400440 ACPI: added table 6/32, length now 60
1894 12:59:30.403275 ACPI: added table 7/32, length now 64
1895 12:59:30.407016 ACPI: * HPET
1896 12:59:30.410163 ACPI: added table 8/32, length now 68
1897 12:59:30.413297 ACPI: done.
1898 12:59:30.413382 ACPI tables: 35216 bytes.
1899 12:59:30.416822 smbios_write_tables: 769ef000
1900 12:59:30.419721 EC returned error result code 3
1901 12:59:30.423031 Couldn't obtain OEM name from CBI
1902 12:59:30.426430 Create SMBIOS type 16
1903 12:59:30.429767 Create SMBIOS type 17
1904 12:59:30.433496 GENERIC: 0.0 (WIFI Device)
1905 12:59:30.436266 SMBIOS tables: 1734 bytes.
1906 12:59:30.439877 Writing table forward entry at 0x00000500
1907 12:59:30.446827 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1908 12:59:30.449600 Writing coreboot table at 0x76b25000
1909 12:59:30.456511 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1910 12:59:30.459829 1. 0000000000001000-000000000009ffff: RAM
1911 12:59:30.462907 2. 00000000000a0000-00000000000fffff: RESERVED
1912 12:59:30.469702 3. 0000000000100000-00000000769eefff: RAM
1913 12:59:30.473076 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1914 12:59:30.479626 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1915 12:59:30.486227 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1916 12:59:30.489543 7. 0000000077000000-000000007fbfffff: RESERVED
1917 12:59:30.495977 8. 00000000c0000000-00000000cfffffff: RESERVED
1918 12:59:30.499613 9. 00000000f8000000-00000000f9ffffff: RESERVED
1919 12:59:30.502628 10. 00000000fb000000-00000000fb000fff: RESERVED
1920 12:59:30.509182 11. 00000000fe000000-00000000fe00ffff: RESERVED
1921 12:59:30.512805 12. 00000000fed80000-00000000fed87fff: RESERVED
1922 12:59:30.519549 13. 00000000fed90000-00000000fed92fff: RESERVED
1923 12:59:30.522432 14. 00000000feda0000-00000000feda1fff: RESERVED
1924 12:59:30.529534 15. 00000000fedc0000-00000000feddffff: RESERVED
1925 12:59:30.532447 16. 0000000100000000-00000004803fffff: RAM
1926 12:59:30.536201 Passing 4 GPIOs to payload:
1927 12:59:30.539009 NAME | PORT | POLARITY | VALUE
1928 12:59:30.546137 lid | undefined | high | high
1929 12:59:30.552290 power | undefined | high | low
1930 12:59:30.555779 oprom | undefined | high | low
1931 12:59:30.562398 EC in RW | 0x000000e5 | high | high
1932 12:59:30.568758 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1933 12:59:30.572003 coreboot table: 1576 bytes.
1934 12:59:30.575486 IMD ROOT 0. 0x76fff000 0x00001000
1935 12:59:30.578723 IMD SMALL 1. 0x76ffe000 0x00001000
1936 12:59:30.581954 FSP MEMORY 2. 0x76c4e000 0x003b0000
1937 12:59:30.585187 VPD 3. 0x76c4d000 0x00000367
1938 12:59:30.588567 RO MCACHE 4. 0x76c4c000 0x00000fdc
1939 12:59:30.591832 CONSOLE 5. 0x76c2c000 0x00020000
1940 12:59:30.595063 FMAP 6. 0x76c2b000 0x00000578
1941 12:59:30.601984 TIME STAMP 7. 0x76c2a000 0x00000910
1942 12:59:30.604887 VBOOT WORK 8. 0x76c16000 0x00014000
1943 12:59:30.608248 ROMSTG STCK 9. 0x76c15000 0x00001000
1944 12:59:30.611644 AFTER CAR 10. 0x76c0a000 0x0000b000
1945 12:59:30.615133 RAMSTAGE 11. 0x76b97000 0x00073000
1946 12:59:30.618389 REFCODE 12. 0x76b42000 0x00055000
1947 12:59:30.621628 SMM BACKUP 13. 0x76b32000 0x00010000
1948 12:59:30.628137 4f444749 14. 0x76b30000 0x00002000
1949 12:59:30.631579 EXT VBT15. 0x76b2d000 0x0000219f
1950 12:59:30.634677 COREBOOT 16. 0x76b25000 0x00008000
1951 12:59:30.638571 ACPI 17. 0x76b01000 0x00024000
1952 12:59:30.641348 ACPI GNVS 18. 0x76b00000 0x00001000
1953 12:59:30.644329 RAMOOPS 19. 0x76a00000 0x00100000
1954 12:59:30.648159 TPM2 TCGLOG20. 0x769f0000 0x00010000
1955 12:59:30.650915 SMBIOS 21. 0x769ef000 0x00000800
1956 12:59:30.654735 IMD small region:
1957 12:59:30.657970 IMD ROOT 0. 0x76ffec00 0x00000400
1958 12:59:30.661318 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1959 12:59:30.664282 POWER STATE 2. 0x76ffeb80 0x00000044
1960 12:59:30.670877 ROMSTAGE 3. 0x76ffeb60 0x00000004
1961 12:59:30.674467 MEM INFO 4. 0x76ffe980 0x000001e0
1962 12:59:30.681246 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1963 12:59:30.684343 MTRR: Physical address space:
1964 12:59:30.688098 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1965 12:59:30.694483 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1966 12:59:30.700900 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1967 12:59:30.707340 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1968 12:59:30.714513 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1969 12:59:30.720859 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1970 12:59:30.727081 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1971 12:59:30.731077 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 12:59:30.734178 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 12:59:30.737338 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:59:30.743760 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:59:30.747291 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:59:30.750942 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:59:30.753717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 12:59:30.760143 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 12:59:30.764004 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 12:59:30.767432 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 12:59:30.770715 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 12:59:30.775064 call enable_fixed_mtrr()
1983 12:59:30.778449 CPU physical address size: 39 bits
1984 12:59:30.785055 MTRR: default type WB/UC MTRR counts: 6/7.
1985 12:59:30.788600 MTRR: WB selected as default type.
1986 12:59:30.795211 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1987 12:59:30.798472 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1988 12:59:30.805044 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1989 12:59:30.811818 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1990 12:59:30.818584 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1991 12:59:30.825317 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1992 12:59:30.829335
1993 12:59:30.829428 MTRR check
1994 12:59:30.831682 Fixed MTRRs : Enabled
1995 12:59:30.831769 Variable MTRRs: Enabled
1996 12:59:30.831853
1997 12:59:30.838436 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 12:59:30.841727 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 12:59:30.844986 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 12:59:30.848228 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 12:59:30.854753 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 12:59:30.858427 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 12:59:30.861876 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 12:59:30.865047 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 12:59:30.872045 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 12:59:30.875100 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 12:59:30.878158 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 12:59:30.885395 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2009 12:59:30.888566 call enable_fixed_mtrr()
2010 12:59:30.892437 Checking cr50 for pending updates
2011 12:59:30.895732 CPU physical address size: 39 bits
2012 12:59:30.899551 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 12:59:30.902740 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:59:30.909371 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 12:59:30.912363 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 12:59:30.915685 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 12:59:30.919097 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 12:59:30.925553 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 12:59:30.929102 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 12:59:30.932032 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 12:59:30.935721 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 12:59:30.942352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 12:59:30.945947 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 12:59:30.952007 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:59:30.952092 call enable_fixed_mtrr()
2026 12:59:30.958563 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:59:30.962027 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:59:30.964996 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:59:30.968589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:59:30.972023 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:59:30.978646 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:59:30.981670 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:59:30.985267 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:59:30.988434 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:59:30.993663 CPU physical address size: 39 bits
2036 12:59:31.000032 call enable_fixed_mtrr()
2037 12:59:31.003606 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 12:59:31.006580 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:59:31.009848 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 12:59:31.016496 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 12:59:31.020108 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 12:59:31.023871 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 12:59:31.026743 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 12:59:31.033258 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 12:59:31.037507 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 12:59:31.039947 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 12:59:31.043692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 12:59:31.049610 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 12:59:31.053163 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:59:31.059910 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:59:31.062890 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:59:31.066672 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:59:31.069759 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:59:31.076438 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:59:31.079808 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 12:59:31.083096 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 12:59:31.086568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 12:59:31.089580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 12:59:31.096246 call enable_fixed_mtrr()
2060 12:59:31.099666 call enable_fixed_mtrr()
2061 12:59:31.102795 CPU physical address size: 39 bits
2062 12:59:31.105959 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 12:59:31.109363 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 12:59:31.112588 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 12:59:31.119337 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 12:59:31.122549 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 12:59:31.126079 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 12:59:31.129565 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 12:59:31.135857 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 12:59:31.139158 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 12:59:31.142861 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 12:59:31.145758 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 12:59:31.149216 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 12:59:31.155894 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 12:59:31.158796 call enable_fixed_mtrr()
2076 12:59:31.162257 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 12:59:31.165631 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 12:59:31.172629 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 12:59:31.175464 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 12:59:31.179128 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 12:59:31.182118 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 12:59:31.188876 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 12:59:31.192644 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 12:59:31.195695 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 12:59:31.199730 CPU physical address size: 39 bits
2086 12:59:31.206152 call enable_fixed_mtrr()
2087 12:59:31.210419 CPU physical address size: 39 bits
2088 12:59:31.213084 CPU physical address size: 39 bits
2089 12:59:31.216515 Reading cr50 TPM mode
2090 12:59:31.220354 CPU physical address size: 39 bits
2091 12:59:31.227281 BS: BS_PAYLOAD_LOAD entry times (exec / console): 329 / 6 ms
2092 12:59:31.237043 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2093 12:59:31.240317 Checking segment from ROM address 0xffc02b38
2094 12:59:31.243936 Checking segment from ROM address 0xffc02b54
2095 12:59:31.250144 Loading segment from ROM address 0xffc02b38
2096 12:59:31.250230 code (compression=0)
2097 12:59:31.260045 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2098 12:59:31.269709 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2099 12:59:31.269842 it's not compressed!
2100 12:59:31.410022 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2101 12:59:31.416543 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2102 12:59:31.423910 Loading segment from ROM address 0xffc02b54
2103 12:59:31.427204 Entry Point 0x30000000
2104 12:59:31.427291 Loaded segments
2105 12:59:31.433360 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2106 12:59:31.478281 Finalizing chipset.
2107 12:59:31.482270 Finalizing SMM.
2108 12:59:31.482368 APMC done.
2109 12:59:31.488154 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2110 12:59:31.491554 mp_park_aps done after 0 msecs.
2111 12:59:31.495029 Jumping to boot code at 0x30000000(0x76b25000)
2112 12:59:31.504669 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2113 12:59:31.508036
2114 12:59:31.511355 Starting depthcharge on Voema...
2115 12:59:31.511736 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2116 12:59:31.511843 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2117 12:59:31.511928 Setting prompt string to ['volteer:']
2118 12:59:31.512009 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2119 12:59:31.518326 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2120 12:59:31.524146 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2121 12:59:31.530995 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2122 12:59:31.534461 Failed to find eMMC card reader
2123 12:59:31.537427 Wipe memory regions:
2124 12:59:31.541076 [0x00000000001000, 0x000000000a0000)
2125 12:59:31.544158 [0x00000000100000, 0x00000030000000)
2126 12:59:31.582037 [0x00000032662db0, 0x000000769ef000)
2127 12:59:31.632982 [0x00000100000000, 0x00000480400000)
2128 12:59:32.279858 ec_init: CrosEC protocol v3 supported (256, 256)
2129 12:59:32.711194 R8152: Initializing
2130 12:59:32.714265 Version 6 (ocp_data = 5c30)
2131 12:59:32.717688 R8152: Done initializing
2132 12:59:32.720732 Adding net device
2133 12:59:33.025230 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2134 12:59:33.025396
2135 12:59:33.028489 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2137 12:59:33.129352 volteer: tftpboot 192.168.201.1 7148229/tftp-deploy-eeci0mjy/kernel/bzImage 7148229/tftp-deploy-eeci0mjy/kernel/cmdline 7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
2138 12:59:33.129538 Setting prompt string to 'Starting kernel'
2139 12:59:33.129631 Setting prompt string to ['Starting kernel']
2140 12:59:33.129700 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2141 12:59:33.129820 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2142 12:59:33.134143 tftpboot 192.168.201.1 7148229/tftp-deploy-eeci0mjy/kernel/bzImoy-eeci0mjy/kernel/cmdline 7148229/tftp-deploy-eeci0mjy/ramdisk/ramdisk.cpio.gz
2143 12:59:33.134232 Waiting for link
2144 12:59:33.337980 done.
2145 12:59:33.338136 MAC: 00:24:32:30:7d:ab
2146 12:59:33.341139 Sending DHCP discover... done.
2147 12:59:33.344929 Waiting for reply... done.
2148 12:59:33.347822 Sending DHCP request... done.
2149 12:59:33.351077 Waiting for reply... done.
2150 12:59:33.354290 My ip is 192.168.201.19
2151 12:59:33.357849 The DHCP server ip is 192.168.201.1
2152 12:59:33.364795 TFTP server IP predefined by user: 192.168.201.1
2153 12:59:33.370754 Bootfile predefined by user: 7148229/tftp-deploy-eeci0mjy/kernel/bzImage
2154 12:59:33.374253 Sending tftp read request... done.
2155 12:59:33.377357 Waiting for the transfer...
2156 12:59:33.997634 00000000 ################################################################
2157 12:59:34.678617 00080000 ################################################################
2158 12:59:35.321725 00100000 ################################################################
2159 12:59:35.960797 00180000 ################################################################
2160 12:59:36.608900 00200000 ################################################################
2161 12:59:37.244514 00280000 ################################################################
2162 12:59:37.852234 00300000 ################################################################
2163 12:59:38.464345 00380000 ################################################################
2164 12:59:39.074818 00400000 ################################################################
2165 12:59:39.690613 00480000 ################################################################
2166 12:59:40.306653 00500000 ################################################################
2167 12:59:40.922689 00580000 ################################################################
2168 12:59:41.537570 00600000 ################################################################
2169 12:59:42.116580 00680000 ################################################################
2170 12:59:42.730264 00700000 ################################################################
2171 12:59:43.279334 00780000 ################################################################
2172 12:59:43.804247 00800000 ################################################################
2173 12:59:43.852623 00880000 ###### done.
2174 12:59:43.855978 The bootfile was 8953856 bytes long.
2175 12:59:43.859266 Sending tftp read request... done.
2176 12:59:43.862729 Waiting for the transfer...
2177 12:59:44.470022 00000000 ################################################################
2178 12:59:45.076455 00080000 ################################################################
2179 12:59:45.677983 00100000 ################################################################
2180 12:59:46.307767 00180000 ################################################################
2181 12:59:47.007915 00200000 ################################################################
2182 12:59:47.705953 00280000 ################################################################
2183 12:59:48.336586 00300000 ################################################################
2184 12:59:48.930065 00380000 ################################################################
2185 12:59:49.525797 00400000 ################################################################
2186 12:59:50.110550 00480000 ################################################################
2187 12:59:50.376428 00500000 ################################ done.
2188 12:59:50.379879 Sending tftp read request... done.
2189 12:59:50.383289 Waiting for the transfer...
2190 12:59:50.383375 00000000 # done.
2191 12:59:50.392928 Command line loaded dynamically from TFTP file: 7148229/tftp-deploy-eeci0mjy/kernel/cmdline
2192 12:59:50.415586 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7148229/extract-nfsrootfs-y6m98l4w,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2193 12:59:50.422748 Shutting down all USB controllers.
2194 12:59:50.422835 Removing current net device
2195 12:59:50.425873 Finalizing coreboot
2196 12:59:50.432667 Exiting depthcharge with code 4 at timestamp: 27487268
2197 12:59:50.432753
2198 12:59:50.432820 Starting kernel ...
2199 12:59:50.432880
2200 12:59:50.432940
2201 12:59:50.433233 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2202 12:59:50.433329 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2203 12:59:50.433402 Setting prompt string to ['Linux version [0-9]']
2204 12:59:50.433473 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2205 12:59:50.433543 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2207 13:04:15.434257 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2209 13:04:15.435372 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2211 13:04:15.436301 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2214 13:04:15.438118 end: 2 depthcharge-action (duration 00:05:00) [common]
2216 13:04:15.439472 Cleaning after the job
2217 13:04:15.439913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/ramdisk
2218 13:04:15.442404 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/kernel
2219 13:04:15.445612 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/nfsrootfs
2220 13:04:15.498816 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148229/tftp-deploy-eeci0mjy/modules
2221 13:04:15.499162 start: 5.1 power-off (timeout 00:00:30) [common]
2222 13:04:15.499347 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2223 13:04:15.518809 >> Command sent successfully.
2224 13:04:15.520721 Returned 0 in 0 seconds
2225 13:04:15.621830 end: 5.1 power-off (duration 00:00:00) [common]
2227 13:04:15.623371 start: 5.2 read-feedback (timeout 00:10:00) [common]
2228 13:04:15.624512 Listened to connection for namespace 'common' for up to 1s
2229 13:04:16.627549 Finalising connection for namespace 'common'
2230 13:04:16.627756 Disconnecting from shell: Finalise
2231 13:04:16.728834 end: 5.2 read-feedback (duration 00:00:01) [common]
2232 13:04:16.729472 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148229
2233 13:04:16.859050 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148229
2234 13:04:16.859247 JobError: Your job cannot terminate cleanly.