Boot log: asus-C436FA-Flip-hatch

    1 13:06:21.978203  lava-dispatcher, installed at version: 2022.06
    2 13:06:21.978387  start: 0 validate
    3 13:06:21.978512  Start time: 2022-08-31 13:06:21.978505+00:00 (UTC)
    4 13:06:21.978630  Using caching service: 'http://localhost/cache/?uri=%s'
    5 13:06:21.978750  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
    6 13:06:22.273884  Using caching service: 'http://localhost/cache/?uri=%s'
    7 13:06:22.274624  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 13:06:22.564368  Using caching service: 'http://localhost/cache/?uri=%s'
    9 13:06:22.565142  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 13:06:22.860746  Using caching service: 'http://localhost/cache/?uri=%s'
   11 13:06:22.861512  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 13:06:23.167178  validate duration: 1.19
   14 13:06:23.168744  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 13:06:23.169347  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 13:06:23.169867  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 13:06:23.170409  Not decompressing ramdisk as can be used compressed.
   18 13:06:23.170882  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/initrd.cpio.gz
   19 13:06:23.171251  saving as /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/ramdisk/initrd.cpio.gz
   20 13:06:23.171599  total size: 5411076 (5MB)
   21 13:06:23.177307  progress   0% (0MB)
   22 13:06:23.185134  progress   5% (0MB)
   23 13:06:23.189847  progress  10% (0MB)
   24 13:06:23.193534  progress  15% (0MB)
   25 13:06:23.197346  progress  20% (1MB)
   26 13:06:23.200209  progress  25% (1MB)
   27 13:06:23.202610  progress  30% (1MB)
   28 13:06:23.205020  progress  35% (1MB)
   29 13:06:23.207327  progress  40% (2MB)
   30 13:06:23.209409  progress  45% (2MB)
   31 13:06:23.211287  progress  50% (2MB)
   32 13:06:23.213091  progress  55% (2MB)
   33 13:06:23.215080  progress  60% (3MB)
   34 13:06:23.216684  progress  65% (3MB)
   35 13:06:23.218285  progress  70% (3MB)
   36 13:06:23.219880  progress  75% (3MB)
   37 13:06:23.221547  progress  80% (4MB)
   38 13:06:23.223035  progress  85% (4MB)
   39 13:06:23.224473  progress  90% (4MB)
   40 13:06:23.225896  progress  95% (4MB)
   41 13:06:23.227392  progress 100% (5MB)
   42 13:06:23.227584  5MB downloaded in 0.06s (92.17MB/s)
   43 13:06:23.227747  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 13:06:23.227998  end: 1.1 download-retry (duration 00:00:00) [common]
   46 13:06:23.228089  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 13:06:23.228183  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 13:06:23.228290  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 13:06:23.228360  saving as /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/kernel/bzImage
   50 13:06:23.228422  total size: 8953856 (8MB)
   51 13:06:23.228484  No compression specified
   52 13:06:25.732753  progress   0% (0MB)
   53 13:06:25.745710  progress   5% (0MB)
   54 13:06:25.757495  progress  10% (0MB)
   55 13:06:25.765647  progress  15% (1MB)
   56 13:06:25.771587  progress  20% (1MB)
   57 13:06:25.776237  progress  25% (2MB)
   58 13:06:25.780031  progress  30% (2MB)
   59 13:06:25.783539  progress  35% (3MB)
   60 13:06:25.786829  progress  40% (3MB)
   61 13:06:25.789733  progress  45% (3MB)
   62 13:06:25.792523  progress  50% (4MB)
   63 13:06:25.795265  progress  55% (4MB)
   64 13:06:25.797573  progress  60% (5MB)
   65 13:06:25.800024  progress  65% (5MB)
   66 13:06:25.802286  progress  70% (6MB)
   67 13:06:25.804366  progress  75% (6MB)
   68 13:06:25.806589  progress  80% (6MB)
   69 13:06:25.808767  progress  85% (7MB)
   70 13:06:25.810952  progress  90% (7MB)
   71 13:06:25.813184  progress  95% (8MB)
   72 13:06:25.815476  progress 100% (8MB)
   73 13:06:25.815663  8MB downloaded in 2.59s (3.30MB/s)
   74 13:06:25.815810  end: 1.2.1 http-download (duration 00:00:03) [common]
   76 13:06:25.816041  end: 1.2 download-retry (duration 00:00:03) [common]
   77 13:06:25.816128  start: 1.3 download-retry (timeout 00:09:57) [common]
   78 13:06:25.816213  start: 1.3.1 http-download (timeout 00:09:57) [common]
   79 13:06:25.816315  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220826.0/amd64/full.rootfs.tar.xz
   80 13:06:25.816381  saving as /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/nfsrootfs/full.rootfs.tar
   81 13:06:25.816441  total size: 207120848 (197MB)
   82 13:06:25.816506  Using unxz to decompress xz
   83 13:06:25.819965  progress   0% (0MB)
   84 13:06:26.368307  progress   5% (9MB)
   85 13:06:26.901844  progress  10% (19MB)
   86 13:06:27.487666  progress  15% (29MB)
   87 13:06:27.862408  progress  20% (39MB)
   88 13:06:28.215096  progress  25% (49MB)
   89 13:06:28.803733  progress  30% (59MB)
   90 13:06:29.347852  progress  35% (69MB)
   91 13:06:29.940400  progress  40% (79MB)
   92 13:06:30.489784  progress  45% (88MB)
   93 13:06:31.062393  progress  50% (98MB)
   94 13:06:31.679492  progress  55% (108MB)
   95 13:06:32.346012  progress  60% (118MB)
   96 13:06:32.489882  progress  65% (128MB)
   97 13:06:32.637010  progress  70% (138MB)
   98 13:06:32.732856  progress  75% (148MB)
   99 13:06:32.800063  progress  80% (158MB)
  100 13:06:32.870345  progress  85% (167MB)
  101 13:06:32.975177  progress  90% (177MB)
  102 13:06:33.240028  progress  95% (187MB)
  103 13:06:33.819493  progress 100% (197MB)
  104 13:06:33.825661  197MB downloaded in 8.01s (24.66MB/s)
  105 13:06:33.825958  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 13:06:33.826224  end: 1.3 download-retry (duration 00:00:08) [common]
  108 13:06:33.826332  start: 1.4 download-retry (timeout 00:09:49) [common]
  109 13:06:33.826442  start: 1.4.1 http-download (timeout 00:09:49) [common]
  110 13:06:33.826560  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 13:06:33.826630  saving as /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/modules/modules.tar
  112 13:06:33.826692  total size: 64656 (0MB)
  113 13:06:33.826754  Using unxz to decompress xz
  114 13:06:33.830080  progress  50% (0MB)
  115 13:06:33.830444  progress 100% (0MB)
  116 13:06:33.834752  0MB downloaded in 0.01s (7.66MB/s)
  117 13:06:33.834973  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 13:06:33.835299  end: 1.4 download-retry (duration 00:00:00) [common]
  120 13:06:33.835404  start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
  121 13:06:33.835499  start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
  122 13:06:35.862028  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7148220/extract-nfsrootfs-2y1rv_fc
  123 13:06:35.862236  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 13:06:35.862343  start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
  125 13:06:35.862482  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7
  126 13:06:35.862584  makedir: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin
  127 13:06:35.862670  makedir: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/tests
  128 13:06:35.862753  makedir: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/results
  129 13:06:35.862851  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-add-keys
  130 13:06:35.862985  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-add-sources
  131 13:06:35.863102  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-background-process-start
  132 13:06:35.863217  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-background-process-stop
  133 13:06:35.863330  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-common-functions
  134 13:06:35.863442  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-echo-ipv4
  135 13:06:35.863554  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-install-packages
  136 13:06:35.863664  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-installed-packages
  137 13:06:35.863773  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-os-build
  138 13:06:35.863884  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-probe-channel
  139 13:06:35.863994  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-probe-ip
  140 13:06:35.864104  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-target-ip
  141 13:06:35.864213  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-target-mac
  142 13:06:35.864322  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-target-storage
  143 13:06:35.864436  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-case
  144 13:06:35.864547  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-event
  145 13:06:35.864657  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-feedback
  146 13:06:35.864766  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-raise
  147 13:06:35.864913  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-reference
  148 13:06:35.865023  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-runner
  149 13:06:35.865133  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-set
  150 13:06:35.865242  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-test-shell
  151 13:06:35.865354  Updating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-add-keys (debian)
  152 13:06:35.865467  Updating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-add-sources (debian)
  153 13:06:35.865579  Updating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-install-packages (debian)
  154 13:06:35.865691  Updating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-installed-packages (debian)
  155 13:06:35.865802  Updating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/bin/lava-os-build (debian)
  156 13:06:35.865899  Creating /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/environment
  157 13:06:35.865984  LAVA metadata
  158 13:06:35.866051  - LAVA_JOB_ID=7148220
  159 13:06:35.866115  - LAVA_DISPATCHER_IP=192.168.201.1
  160 13:06:35.866212  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
  161 13:06:35.866278  skipped lava-vland-overlay
  162 13:06:35.866354  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 13:06:35.866435  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
  164 13:06:35.866497  skipped lava-multinode-overlay
  165 13:06:35.866571  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 13:06:35.866653  start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
  167 13:06:35.866725  Loading test definitions
  168 13:06:35.866818  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
  169 13:06:35.866892  Using /lava-7148220 at stage 0
  170 13:06:35.867121  uuid=7148220_1.5.2.3.1 testdef=None
  171 13:06:35.867210  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 13:06:35.867297  start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
  173 13:06:35.867707  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 13:06:35.867941  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
  176 13:06:35.868419  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 13:06:35.868655  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
  179 13:06:35.869148  runner path: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/0/tests/0_timesync-off test_uuid 7148220_1.5.2.3.1
  180 13:06:35.869296  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 13:06:35.869529  start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
  183 13:06:35.869604  Using /lava-7148220 at stage 0
  184 13:06:35.869700  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 13:06:35.869782  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/0/tests/1_kselftest-alsa'
  186 13:06:38.946506  Running '/usr/bin/git checkout kernelci.org
  187 13:06:39.078919  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
  188 13:06:39.079582  uuid=7148220_1.5.2.3.5 testdef=None
  189 13:06:39.079742  end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
  191 13:06:39.079988  start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
  192 13:06:39.080666  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 13:06:39.080947  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
  195 13:06:39.081806  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 13:06:39.082058  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
  198 13:06:39.082933  runner path: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/0/tests/1_kselftest-alsa test_uuid 7148220_1.5.2.3.5
  199 13:06:39.083022  BOARD='asus-C436FA-Flip-hatch'
  200 13:06:39.083088  BRANCH='cip'
  201 13:06:39.083148  SKIPFILE='skipfile-lkft.yaml'
  202 13:06:39.083207  TESTPROG_URL='None'
  203 13:06:39.083266  TST_CASENAME=''
  204 13:06:39.083323  TST_CMDFILES='alsa'
  205 13:06:39.083453  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 13:06:39.083668  Creating lava-test-runner.conf files
  208 13:06:39.083734  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148220/lava-overlay-31_kd5_7/lava-7148220/0 for stage 0
  209 13:06:39.083854  - 0_timesync-off
  210 13:06:39.083958  - 1_kselftest-alsa
  211 13:06:39.084054  end: 1.5.2.3 test-definition (duration 00:00:03) [common]
  212 13:06:39.084143  start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
  213 13:06:46.118733  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 13:06:46.118920  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  215 13:06:46.119068  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 13:06:46.119172  end: 1.5.2 lava-overlay (duration 00:00:10) [common]
  217 13:06:46.119264  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  218 13:06:46.220309  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 13:06:46.220653  start: 1.5.4 extract-modules (timeout 00:09:37) [common]
  220 13:06:46.220764  extracting modules file /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148220/extract-nfsrootfs-2y1rv_fc
  221 13:06:46.224762  extracting modules file /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148220/extract-overlay-ramdisk-f005osst/ramdisk
  222 13:06:46.228574  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 13:06:46.228685  start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
  224 13:06:46.228772  [common] Applying overlay to NFS
  225 13:06:46.228904  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148220/compress-overlay-lld5ejm0/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148220/extract-nfsrootfs-2y1rv_fc
  226 13:06:46.670447  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 13:06:46.670616  start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
  228 13:06:46.670714  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 13:06:46.670802  start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
  230 13:06:46.670881  Building ramdisk /var/lib/lava/dispatcher/tmp/7148220/extract-overlay-ramdisk-f005osst/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148220/extract-overlay-ramdisk-f005osst/ramdisk
  231 13:06:46.703924  >> 24662 blocks

  232 13:06:47.176473  rename /var/lib/lava/dispatcher/tmp/7148220/extract-overlay-ramdisk-f005osst/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
  233 13:06:47.176923  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  234 13:06:47.177060  start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
  235 13:06:47.177164  start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
  236 13:06:47.177263  No mkimage arch provided, not using FIT.
  237 13:06:47.177353  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 13:06:47.177490  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 13:06:47.177602  end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
  240 13:06:47.177698  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
  241 13:06:47.177777  No LXC device requested
  242 13:06:47.177858  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 13:06:47.177948  start: 1.7 deploy-device-env (timeout 00:09:36) [common]
  244 13:06:47.178030  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 13:06:47.178099  Checking files for TFTP limit of 4294967296 bytes.
  246 13:06:47.178467  end: 1 tftp-deploy (duration 00:00:24) [common]
  247 13:06:47.178573  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 13:06:47.178666  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 13:06:47.178792  substitutions:
  250 13:06:47.178861  - {DTB}: None
  251 13:06:47.178926  - {INITRD}: 7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
  252 13:06:47.178987  - {KERNEL}: 7148220/tftp-deploy-mwxxguor/kernel/bzImage
  253 13:06:47.179048  - {LAVA_MAC}: None
  254 13:06:47.179107  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7148220/extract-nfsrootfs-2y1rv_fc
  255 13:06:47.179168  - {NFS_SERVER_IP}: 192.168.201.1
  256 13:06:47.179225  - {PRESEED_CONFIG}: None
  257 13:06:47.179283  - {PRESEED_LOCAL}: None
  258 13:06:47.179340  - {RAMDISK}: 7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
  259 13:06:47.179398  - {ROOT_PART}: None
  260 13:06:47.179454  - {ROOT}: None
  261 13:06:47.179510  - {SERVER_IP}: 192.168.201.1
  262 13:06:47.179566  - {TEE}: None
  263 13:06:47.179623  Parsed boot commands:
  264 13:06:47.179679  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 13:06:47.179832  Parsed boot commands: tftpboot 192.168.201.1 7148220/tftp-deploy-mwxxguor/kernel/bzImage 7148220/tftp-deploy-mwxxguor/kernel/cmdline 7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
  266 13:06:47.179925  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 13:06:47.180013  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 13:06:47.180109  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 13:06:47.180197  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 13:06:47.180268  Not connected, no need to disconnect.
  271 13:06:47.180344  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 13:06:47.180429  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 13:06:47.180499  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
  274 13:06:47.183295  Setting prompt string to ['lava-test: # ']
  275 13:06:47.183579  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 13:06:47.183682  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 13:06:47.183779  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 13:06:47.183869  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 13:06:47.184045  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
  280 13:06:47.202754  >> Command sent successfully.

  281 13:06:47.204555  Returned 0 in 0 seconds
  282 13:06:47.305698  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 13:06:47.307144  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 13:06:47.307647  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 13:06:47.308092  Setting prompt string to 'Starting depthcharge on Helios...'
  287 13:06:47.308441  Changing prompt to 'Starting depthcharge on Helios...'
  288 13:06:47.308823  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 13:06:47.310081  [Enter `^Ec?' for help]
  290 13:06:53.991573  
  291 13:06:53.992157  
  292 13:06:54.001665  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 13:06:54.004774  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 13:06:54.011063  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 13:06:54.014225  CPU: AES supported, TXT NOT supported, VT supported
  296 13:06:54.021419  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 13:06:54.027605  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 13:06:54.030544  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 13:06:54.034630  VBOOT: Loading verstage.
  300 13:06:54.041655  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 13:06:54.043903  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 13:06:54.050348  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 13:06:54.050819  CBFS @ c08000 size 3f8000
  304 13:06:54.057118  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 13:06:54.060966  CBFS: Locating 'fallback/verstage'
  306 13:06:54.067206  CBFS: Found @ offset 10fb80 size 1072c
  307 13:06:54.067754  
  308 13:06:54.068108  
  309 13:06:54.076763  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 13:06:54.092659  Probing TPM: . done!
  311 13:06:54.095931  TPM ready after 0 ms
  312 13:06:54.099016  Connected to device vid:did:rid of 1ae0:0028:00
  313 13:06:54.109406  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  314 13:06:54.113001  Initialized TPM device CR50 revision 0
  315 13:06:54.157425  tlcl_send_startup: Startup return code is 0
  316 13:06:54.157950  TPM: setup succeeded
  317 13:06:54.170383  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 13:06:54.173622  Chrome EC: UHEPI supported
  319 13:06:54.177297  Phase 1
  320 13:06:54.180416  FMAP: area GBB found @ c05000 (12288 bytes)
  321 13:06:54.187007  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 13:06:54.190425  Phase 2
  323 13:06:54.190867  Phase 3
  324 13:06:54.193503  FMAP: area GBB found @ c05000 (12288 bytes)
  325 13:06:54.200557  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 13:06:54.206943  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  327 13:06:54.210004  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  328 13:06:54.216928  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 13:06:54.233146  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  330 13:06:54.236222  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  331 13:06:54.242749  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 13:06:54.246554  Phase 4
  333 13:06:54.250379  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  334 13:06:54.256659  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 13:06:54.436780  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 13:06:54.442916  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 13:06:54.443461  Saving nvdata
  338 13:06:54.445918  Reboot requested (10020007)
  339 13:06:54.449181  board_reset() called!
  340 13:06:54.449619  full_reset() called!
  341 13:06:58.958488  
  342 13:06:58.959023  
  343 13:06:58.968180  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 13:06:58.971153  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 13:06:58.977874  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 13:06:58.981171  CPU: AES supported, TXT NOT supported, VT supported
  347 13:06:58.987808  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 13:06:58.994351  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 13:06:58.997811  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 13:06:59.000970  VBOOT: Loading verstage.
  351 13:06:59.007121  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 13:06:59.010478  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 13:06:59.016972  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 13:06:59.017418  CBFS @ c08000 size 3f8000
  355 13:06:59.023872  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 13:06:59.027201  CBFS: Locating 'fallback/verstage'
  357 13:06:59.033900  CBFS: Found @ offset 10fb80 size 1072c
  358 13:06:59.034439  
  359 13:06:59.034793  
  360 13:06:59.043296  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 13:06:59.059273  Probing TPM: . done!
  362 13:06:59.062675  TPM ready after 0 ms
  363 13:06:59.065531  Connected to device vid:did:rid of 1ae0:0028:00
  364 13:06:59.076221  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  365 13:06:59.079849  Initialized TPM device CR50 revision 0
  366 13:06:59.123788  tlcl_send_startup: Startup return code is 0
  367 13:06:59.124316  TPM: setup succeeded
  368 13:06:59.136998  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 13:06:59.140745  Chrome EC: UHEPI supported
  370 13:06:59.143950  Phase 1
  371 13:06:59.147394  FMAP: area GBB found @ c05000 (12288 bytes)
  372 13:06:59.154269  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 13:06:59.160485  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 13:06:59.163363  Recovery requested (1009000e)
  375 13:06:59.169758  Saving nvdata
  376 13:06:59.176128  tlcl_extend: response is 0
  377 13:06:59.184634  tlcl_extend: response is 0
  378 13:06:59.191655  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 13:06:59.194969  CBFS @ c08000 size 3f8000
  380 13:06:59.201434  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 13:06:59.204963  CBFS: Locating 'fallback/romstage'
  382 13:06:59.207981  CBFS: Found @ offset 80 size 145fc
  383 13:06:59.210806  Accumulated console time in verstage 98 ms
  384 13:06:59.211249  
  385 13:06:59.213979  
  386 13:06:59.224225  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 13:06:59.231010  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 13:06:59.233661  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 13:06:59.237750  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 13:06:59.244219  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 13:06:59.247310  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 13:06:59.250472  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  393 13:06:59.253590  TCO_STS:   0000 0000
  394 13:06:59.257302  GEN_PMCON: e0015238 00000200
  395 13:06:59.260370  GBLRST_CAUSE: 00000000 00000000
  396 13:06:59.260953  prev_sleep_state 5
  397 13:06:59.264163  Boot Count incremented to 29981
  398 13:06:59.271172  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 13:06:59.274235  CBFS @ c08000 size 3f8000
  400 13:06:59.281028  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 13:06:59.281568  CBFS: Locating 'fspm.bin'
  402 13:06:59.287616  CBFS: Found @ offset 5ffc0 size 71000
  403 13:06:59.290931  Chrome EC: UHEPI supported
  404 13:06:59.297175  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 13:06:59.301233  Probing TPM:  done!
  406 13:06:59.307448  Connected to device vid:did:rid of 1ae0:0028:00
  407 13:06:59.317355  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  408 13:06:59.324259  Initialized TPM device CR50 revision 0
  409 13:06:59.334064  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 13:06:59.340424  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 13:06:59.343940  MRC cache found, size 1948
  412 13:06:59.347192  bootmode is set to: 2
  413 13:06:59.350362  PRMRR disabled by config.
  414 13:06:59.353531  SPD INDEX = 1
  415 13:06:59.356551  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 13:06:59.360312  CBFS @ c08000 size 3f8000
  417 13:06:59.366737  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 13:06:59.367283  CBFS: Locating 'spd.bin'
  419 13:06:59.369952  CBFS: Found @ offset 5fb80 size 400
  420 13:06:59.372948  SPD: module type is LPDDR3
  421 13:06:59.376421  SPD: module part is 
  422 13:06:59.383356  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 13:06:59.386554  SPD: device width 4 bits, bus width 8 bits
  424 13:06:59.389874  SPD: module size is 4096 MB (per channel)
  425 13:06:59.393031  memory slot: 0 configuration done.
  426 13:06:59.399655  memory slot: 2 configuration done.
  427 13:06:59.448156  CBMEM:
  428 13:06:59.451446  IMD: root @ 99fff000 254 entries.
  429 13:06:59.454399  IMD: root @ 99ffec00 62 entries.
  430 13:06:59.457494  External stage cache:
  431 13:06:59.460952  IMD: root @ 9abff000 254 entries.
  432 13:06:59.464246  IMD: root @ 9abfec00 62 entries.
  433 13:06:59.471205  Chrome EC: clear events_b mask to 0x0000000020004000
  434 13:06:59.484980  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 13:06:59.500051  tlcl_write: response is 0
  436 13:06:59.509601  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 13:06:59.516443  MRC: TPM MRC hash updated successfully.
  438 13:06:59.517081  2 DIMMs found
  439 13:06:59.519220  SMM Memory Map
  440 13:06:59.522332  SMRAM       : 0x9a000000 0x1000000
  441 13:06:59.525611   Subregion 0: 0x9a000000 0xa00000
  442 13:06:59.529598   Subregion 1: 0x9aa00000 0x200000
  443 13:06:59.532867   Subregion 2: 0x9ac00000 0x400000
  444 13:06:59.536192  top_of_ram = 0x9a000000
  445 13:06:59.539414  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 13:06:59.545790  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 13:06:59.549426  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 13:06:59.555961  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 13:06:59.558718  CBFS @ c08000 size 3f8000
  450 13:06:59.562077  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 13:06:59.568747  CBFS: Locating 'fallback/postcar'
  452 13:06:59.571980  CBFS: Found @ offset 107000 size 4b44
  453 13:06:59.578432  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 13:06:59.588697  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 13:06:59.592059  Processing 180 relocs. Offset value of 0x97c0c000
  456 13:06:59.600498  Accumulated console time in romstage 286 ms
  457 13:06:59.601083  
  458 13:06:59.601442  
  459 13:06:59.610816  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 13:06:59.616845  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 13:06:59.620452  CBFS @ c08000 size 3f8000
  462 13:06:59.627162  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 13:06:59.630415  CBFS: Locating 'fallback/ramstage'
  464 13:06:59.633525  CBFS: Found @ offset 43380 size 1b9e8
  465 13:06:59.639982  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 13:06:59.672255  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 13:06:59.675996  Processing 3976 relocs. Offset value of 0x98db0000
  468 13:06:59.681914  Accumulated console time in postcar 52 ms
  469 13:06:59.682366  
  470 13:06:59.682714  
  471 13:06:59.691716  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 13:06:59.698509  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 13:06:59.702361  WARNING: RO_VPD is uninitialized or empty.
  474 13:06:59.705048  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 13:06:59.711428  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 13:06:59.711980  Normal boot.
  477 13:06:59.718565  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 13:06:59.721336  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 13:06:59.724943  CBFS @ c08000 size 3f8000
  480 13:06:59.731384  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 13:06:59.734663  CBFS: Locating 'cpu_microcode_blob.bin'
  482 13:06:59.738299  CBFS: Found @ offset 14700 size 2ec00
  483 13:06:59.744704  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 13:06:59.745286  Skip microcode update
  485 13:06:59.751466  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 13:06:59.754636  CBFS @ c08000 size 3f8000
  487 13:06:59.757961  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 13:06:59.761151  CBFS: Locating 'fsps.bin'
  489 13:06:59.764212  CBFS: Found @ offset d1fc0 size 35000
  490 13:06:59.790972  Detected 4 core, 8 thread CPU.
  491 13:06:59.793319  Setting up SMI for CPU
  492 13:06:59.797722  IED base = 0x9ac00000
  493 13:06:59.798276  IED size = 0x00400000
  494 13:06:59.800941  Will perform SMM setup.
  495 13:06:59.807027  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 13:06:59.813446  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 13:06:59.820306  Processing 16 relocs. Offset value of 0x00030000
  498 13:06:59.820882  Attempting to start 7 APs
  499 13:06:59.826811  Waiting for 10ms after sending INIT.
  500 13:06:59.840064  Waiting for 1st SIPI to complete...done.
  501 13:06:59.840652  AP: slot 5 apic_id 5.
  502 13:06:59.843485  AP: slot 4 apic_id 4.
  503 13:06:59.846999  AP: slot 2 apic_id 3.
  504 13:06:59.847590  AP: slot 3 apic_id 2.
  505 13:06:59.850065  AP: slot 1 apic_id 1.
  506 13:06:59.853399  Waiting for 2nd SIPI to complete...done.
  507 13:06:59.856837  AP: slot 6 apic_id 7.
  508 13:06:59.860362  AP: slot 7 apic_id 6.
  509 13:06:59.866488  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 13:06:59.873288  Processing 13 relocs. Offset value of 0x00038000
  511 13:06:59.879790  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 13:06:59.883383  Installing SMM handler to 0x9a000000
  513 13:06:59.889150  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 13:06:59.895593  Processing 658 relocs. Offset value of 0x9a010000
  515 13:06:59.902719  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 13:06:59.906435  Processing 13 relocs. Offset value of 0x9a008000
  517 13:06:59.912435  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 13:06:59.918957  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 13:06:59.925712  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 13:06:59.929174  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 13:06:59.935733  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 13:06:59.941979  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 13:06:59.949021  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 13:06:59.955246  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 13:06:59.958439  Clearing SMI status registers
  526 13:06:59.958878  SMI_STS: PM1 
  527 13:06:59.962101  PM1_STS: PWRBTN 
  528 13:06:59.962657  TCO_STS: SECOND_TO 
  529 13:06:59.965145  New SMBASE 0x9a000000
  530 13:06:59.968193  In relocation handler: CPU 0
  531 13:06:59.972233  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 13:06:59.978836  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 13:06:59.979390  Relocation complete.
  534 13:06:59.981872  New SMBASE 0x99fffc00
  535 13:06:59.985314  In relocation handler: CPU 1
  536 13:06:59.987743  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  537 13:06:59.994564  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 13:06:59.995010  Relocation complete.
  539 13:06:59.997794  New SMBASE 0x99fff800
  540 13:07:00.001379  In relocation handler: CPU 2
  541 13:07:00.004521  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  542 13:07:00.011017  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 13:07:00.011640  Relocation complete.
  544 13:07:00.014128  New SMBASE 0x99fff400
  545 13:07:00.017398  In relocation handler: CPU 3
  546 13:07:00.020871  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  547 13:07:00.027265  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 13:07:00.027725  Relocation complete.
  549 13:07:00.031267  New SMBASE 0x99ffec00
  550 13:07:00.034130  In relocation handler: CPU 5
  551 13:07:00.037673  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  552 13:07:00.043822  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 13:07:00.044376  Relocation complete.
  554 13:07:00.047272  New SMBASE 0x99fff000
  555 13:07:00.050624  In relocation handler: CPU 4
  556 13:07:00.053699  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  557 13:07:00.060584  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 13:07:00.061178  Relocation complete.
  559 13:07:00.063617  New SMBASE 0x99ffe400
  560 13:07:00.067152  In relocation handler: CPU 7
  561 13:07:00.070059  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  562 13:07:00.077248  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 13:07:00.077699  Relocation complete.
  564 13:07:00.080046  New SMBASE 0x99ffe800
  565 13:07:00.083455  In relocation handler: CPU 6
  566 13:07:00.086477  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  567 13:07:00.092828  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 13:07:00.093349  Relocation complete.
  569 13:07:00.096769  Initializing CPU #0
  570 13:07:00.100137  CPU: vendor Intel device 806ec
  571 13:07:00.103304  CPU: family 06, model 8e, stepping 0c
  572 13:07:00.106644  Clearing out pending MCEs
  573 13:07:00.110050  Setting up local APIC...
  574 13:07:00.110622   apic_id: 0x00 done.
  575 13:07:00.112544  Turbo is available but hidden
  576 13:07:00.116335  Turbo is available and visible
  577 13:07:00.119605  VMX status: enabled
  578 13:07:00.122702  IA32_FEATURE_CONTROL status: locked
  579 13:07:00.126105  Skip microcode update
  580 13:07:00.126549  CPU #0 initialized
  581 13:07:00.129516  Initializing CPU #1
  582 13:07:00.129963  Initializing CPU #6
  583 13:07:00.133191  Initializing CPU #7
  584 13:07:00.135988  CPU: vendor Intel device 806ec
  585 13:07:00.139221  CPU: family 06, model 8e, stepping 0c
  586 13:07:00.142182  CPU: vendor Intel device 806ec
  587 13:07:00.145770  CPU: family 06, model 8e, stepping 0c
  588 13:07:00.148824  Clearing out pending MCEs
  589 13:07:00.152269  Clearing out pending MCEs
  590 13:07:00.156286  Setting up local APIC...
  591 13:07:00.158680  CPU: vendor Intel device 806ec
  592 13:07:00.162393  CPU: family 06, model 8e, stepping 0c
  593 13:07:00.162950  Clearing out pending MCEs
  594 13:07:00.165362  Setting up local APIC...
  595 13:07:00.168962  Setting up local APIC...
  596 13:07:00.171892  Initializing CPU #5
  597 13:07:00.172333  Initializing CPU #4
  598 13:07:00.175534  CPU: vendor Intel device 806ec
  599 13:07:00.178489  CPU: family 06, model 8e, stepping 0c
  600 13:07:00.182061  CPU: vendor Intel device 806ec
  601 13:07:00.185623  CPU: family 06, model 8e, stepping 0c
  602 13:07:00.188638  Initializing CPU #2
  603 13:07:00.191949  Initializing CPU #3
  604 13:07:00.195085  CPU: vendor Intel device 806ec
  605 13:07:00.198841  CPU: family 06, model 8e, stepping 0c
  606 13:07:00.202237  CPU: vendor Intel device 806ec
  607 13:07:00.205367  CPU: family 06, model 8e, stepping 0c
  608 13:07:00.208750  Clearing out pending MCEs
  609 13:07:00.209328  Clearing out pending MCEs
  610 13:07:00.211870  Setting up local APIC...
  611 13:07:00.215080  Clearing out pending MCEs
  612 13:07:00.218333  Clearing out pending MCEs
  613 13:07:00.221943  Setting up local APIC...
  614 13:07:00.222490   apic_id: 0x03 done.
  615 13:07:00.225210  Setting up local APIC...
  616 13:07:00.228248   apic_id: 0x06 done.
  617 13:07:00.228697   apic_id: 0x07 done.
  618 13:07:00.232054  VMX status: enabled
  619 13:07:00.235438  VMX status: enabled
  620 13:07:00.238903  IA32_FEATURE_CONTROL status: locked
  621 13:07:00.241973  IA32_FEATURE_CONTROL status: locked
  622 13:07:00.242566  Skip microcode update
  623 13:07:00.244619  Skip microcode update
  624 13:07:00.248241  CPU #7 initialized
  625 13:07:00.248687  CPU #6 initialized
  626 13:07:00.251932   apic_id: 0x05 done.
  627 13:07:00.255102  Setting up local APIC...
  628 13:07:00.255666   apic_id: 0x02 done.
  629 13:07:00.257541  VMX status: enabled
  630 13:07:00.261519  VMX status: enabled
  631 13:07:00.265159  IA32_FEATURE_CONTROL status: locked
  632 13:07:00.267859  IA32_FEATURE_CONTROL status: locked
  633 13:07:00.268453  Skip microcode update
  634 13:07:00.270781  Skip microcode update
  635 13:07:00.274324   apic_id: 0x01 done.
  636 13:07:00.274777  CPU #2 initialized
  637 13:07:00.277301  CPU #3 initialized
  638 13:07:00.281020  VMX status: enabled
  639 13:07:00.281461   apic_id: 0x04 done.
  640 13:07:00.284590  IA32_FEATURE_CONTROL status: locked
  641 13:07:00.287522  VMX status: enabled
  642 13:07:00.291290  Skip microcode update
  643 13:07:00.293991  IA32_FEATURE_CONTROL status: locked
  644 13:07:00.294476  CPU #5 initialized
  645 13:07:00.297171  VMX status: enabled
  646 13:07:00.300695  Skip microcode update
  647 13:07:00.303777  IA32_FEATURE_CONTROL status: locked
  648 13:07:00.304219  CPU #4 initialized
  649 13:07:00.307044  Skip microcode update
  650 13:07:00.310404  CPU #1 initialized
  651 13:07:00.313598  bsp_do_flight_plan done after 457 msecs.
  652 13:07:00.316866  CPU: frequency set to 4200 MHz
  653 13:07:00.317308  Enabling SMIs.
  654 13:07:00.320117  Locking SMM.
  655 13:07:00.335184  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 13:07:00.337939  CBFS @ c08000 size 3f8000
  657 13:07:00.344338  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 13:07:00.344970  CBFS: Locating 'vbt.bin'
  659 13:07:00.347522  CBFS: Found @ offset 5f5c0 size 499
  660 13:07:00.354276  Found a VBT of 4608 bytes after decompression
  661 13:07:00.537158  Display FSP Version Info HOB
  662 13:07:00.540580  Reference Code - CPU = 9.0.1e.30
  663 13:07:00.543890  uCode Version = 0.0.0.ca
  664 13:07:00.546754  TXT ACM version = ff.ff.ff.ffff
  665 13:07:00.549679  Display FSP Version Info HOB
  666 13:07:00.553362  Reference Code - ME = 9.0.1e.30
  667 13:07:00.556245  MEBx version = 0.0.0.0
  668 13:07:00.559386  ME Firmware Version = Consumer SKU
  669 13:07:00.562698  Display FSP Version Info HOB
  670 13:07:00.566226  Reference Code - CML PCH = 9.0.1e.30
  671 13:07:00.569544  PCH-CRID Status = Disabled
  672 13:07:00.572900  PCH-CRID Original Value = ff.ff.ff.ffff
  673 13:07:00.576310  PCH-CRID New Value = ff.ff.ff.ffff
  674 13:07:00.578892  OPROM - RST - RAID = ff.ff.ff.ffff
  675 13:07:00.582326  ChipsetInit Base Version = ff.ff.ff.ffff
  676 13:07:00.589036  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 13:07:00.589478  Display FSP Version Info HOB
  678 13:07:00.595198  Reference Code - SA - System Agent = 9.0.1e.30
  679 13:07:00.598541  Reference Code - MRC = 0.7.1.6c
  680 13:07:00.601929  SA - PCIe Version = 9.0.1e.30
  681 13:07:00.604985  SA-CRID Status = Disabled
  682 13:07:00.608519  SA-CRID Original Value = 0.0.0.c
  683 13:07:00.611985  SA-CRID New Value = 0.0.0.c
  684 13:07:00.612581  OPROM - VBIOS = ff.ff.ff.ffff
  685 13:07:00.615388  RTC Init
  686 13:07:00.618627  Set power on after power failure.
  687 13:07:00.619072  Disabling Deep S3
  688 13:07:00.622460  Disabling Deep S3
  689 13:07:00.625186  Disabling Deep S4
  690 13:07:00.625632  Disabling Deep S4
  691 13:07:00.628738  Disabling Deep S5
  692 13:07:00.629376  Disabling Deep S5
  693 13:07:00.635400  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
  694 13:07:00.638666  Enumerating buses...
  695 13:07:00.641587  Show all devs... Before device enumeration.
  696 13:07:00.645047  Root Device: enabled 1
  697 13:07:00.648750  CPU_CLUSTER: 0: enabled 1
  698 13:07:00.649388  DOMAIN: 0000: enabled 1
  699 13:07:00.651806  APIC: 00: enabled 1
  700 13:07:00.655594  PCI: 00:00.0: enabled 1
  701 13:07:00.656138  PCI: 00:02.0: enabled 1
  702 13:07:00.658496  PCI: 00:04.0: enabled 0
  703 13:07:00.661074  PCI: 00:05.0: enabled 0
  704 13:07:00.665403  PCI: 00:12.0: enabled 1
  705 13:07:00.665997  PCI: 00:12.5: enabled 0
  706 13:07:00.668297  PCI: 00:12.6: enabled 0
  707 13:07:00.671314  PCI: 00:14.0: enabled 1
  708 13:07:00.674629  PCI: 00:14.1: enabled 0
  709 13:07:00.675215  PCI: 00:14.3: enabled 1
  710 13:07:00.677621  PCI: 00:14.5: enabled 0
  711 13:07:00.680927  PCI: 00:15.0: enabled 1
  712 13:07:00.684655  PCI: 00:15.1: enabled 1
  713 13:07:00.685266  PCI: 00:15.2: enabled 0
  714 13:07:00.687538  PCI: 00:15.3: enabled 0
  715 13:07:00.690853  PCI: 00:16.0: enabled 1
  716 13:07:00.694347  PCI: 00:16.1: enabled 0
  717 13:07:00.694913  PCI: 00:16.2: enabled 0
  718 13:07:00.697801  PCI: 00:16.3: enabled 0
  719 13:07:00.700542  PCI: 00:16.4: enabled 0
  720 13:07:00.703975  PCI: 00:16.5: enabled 0
  721 13:07:00.704584  PCI: 00:17.0: enabled 1
  722 13:07:00.707067  PCI: 00:19.0: enabled 1
  723 13:07:00.710388  PCI: 00:19.1: enabled 0
  724 13:07:00.713683  PCI: 00:19.2: enabled 0
  725 13:07:00.714553  PCI: 00:1a.0: enabled 0
  726 13:07:00.716698  PCI: 00:1c.0: enabled 0
  727 13:07:00.720074  PCI: 00:1c.1: enabled 0
  728 13:07:00.723493  PCI: 00:1c.2: enabled 0
  729 13:07:00.723946  PCI: 00:1c.3: enabled 0
  730 13:07:00.726765  PCI: 00:1c.4: enabled 0
  731 13:07:00.729886  PCI: 00:1c.5: enabled 0
  732 13:07:00.733290  PCI: 00:1c.6: enabled 0
  733 13:07:00.733725  PCI: 00:1c.7: enabled 0
  734 13:07:00.736110  PCI: 00:1d.0: enabled 1
  735 13:07:00.740461  PCI: 00:1d.1: enabled 0
  736 13:07:00.742997  PCI: 00:1d.2: enabled 0
  737 13:07:00.743455  PCI: 00:1d.3: enabled 0
  738 13:07:00.746226  PCI: 00:1d.4: enabled 0
  739 13:07:00.749663  PCI: 00:1d.5: enabled 1
  740 13:07:00.752364  PCI: 00:1e.0: enabled 1
  741 13:07:00.752840  PCI: 00:1e.1: enabled 0
  742 13:07:00.756026  PCI: 00:1e.2: enabled 1
  743 13:07:00.759261  PCI: 00:1e.3: enabled 1
  744 13:07:00.762858  PCI: 00:1f.0: enabled 1
  745 13:07:00.763397  PCI: 00:1f.1: enabled 1
  746 13:07:00.765804  PCI: 00:1f.2: enabled 1
  747 13:07:00.769269  PCI: 00:1f.3: enabled 1
  748 13:07:00.771904  PCI: 00:1f.4: enabled 1
  749 13:07:00.772337  PCI: 00:1f.5: enabled 1
  750 13:07:00.775805  PCI: 00:1f.6: enabled 0
  751 13:07:00.778702  USB0 port 0: enabled 1
  752 13:07:00.779157  I2C: 00:15: enabled 1
  753 13:07:00.782099  I2C: 00:5d: enabled 1
  754 13:07:00.785779  GENERIC: 0.0: enabled 1
  755 13:07:00.788950  I2C: 00:1a: enabled 1
  756 13:07:00.789510  I2C: 00:38: enabled 1
  757 13:07:00.791776  I2C: 00:39: enabled 1
  758 13:07:00.794862  I2C: 00:3a: enabled 1
  759 13:07:00.795337  I2C: 00:3b: enabled 1
  760 13:07:00.798618  PCI: 00:00.0: enabled 1
  761 13:07:00.801774  SPI: 00: enabled 1
  762 13:07:00.802214  SPI: 01: enabled 1
  763 13:07:00.804986  PNP: 0c09.0: enabled 1
  764 13:07:00.808160  USB2 port 0: enabled 1
  765 13:07:00.808622  USB2 port 1: enabled 1
  766 13:07:00.811754  USB2 port 2: enabled 0
  767 13:07:00.814803  USB2 port 3: enabled 0
  768 13:07:00.818095  USB2 port 5: enabled 0
  769 13:07:00.818532  USB2 port 6: enabled 1
  770 13:07:00.821492  USB2 port 9: enabled 1
  771 13:07:00.825023  USB3 port 0: enabled 1
  772 13:07:00.825561  USB3 port 1: enabled 1
  773 13:07:00.827821  USB3 port 2: enabled 1
  774 13:07:00.831179  USB3 port 3: enabled 1
  775 13:07:00.834543  USB3 port 4: enabled 0
  776 13:07:00.835079  APIC: 01: enabled 1
  777 13:07:00.837682  APIC: 03: enabled 1
  778 13:07:00.838119  APIC: 02: enabled 1
  779 13:07:00.841066  APIC: 04: enabled 1
  780 13:07:00.844349  APIC: 05: enabled 1
  781 13:07:00.844786  APIC: 07: enabled 1
  782 13:07:00.847135  APIC: 06: enabled 1
  783 13:07:00.850654  Compare with tree...
  784 13:07:00.851193  Root Device: enabled 1
  785 13:07:00.854182   CPU_CLUSTER: 0: enabled 1
  786 13:07:00.857289    APIC: 00: enabled 1
  787 13:07:00.857728    APIC: 01: enabled 1
  788 13:07:00.860429    APIC: 03: enabled 1
  789 13:07:00.863299    APIC: 02: enabled 1
  790 13:07:00.867624    APIC: 04: enabled 1
  791 13:07:00.868166    APIC: 05: enabled 1
  792 13:07:00.870008    APIC: 07: enabled 1
  793 13:07:00.873356    APIC: 06: enabled 1
  794 13:07:00.873954   DOMAIN: 0000: enabled 1
  795 13:07:00.876962    PCI: 00:00.0: enabled 1
  796 13:07:00.879834    PCI: 00:02.0: enabled 1
  797 13:07:00.883288    PCI: 00:04.0: enabled 0
  798 13:07:00.886966    PCI: 00:05.0: enabled 0
  799 13:07:00.887519    PCI: 00:12.0: enabled 1
  800 13:07:00.889819    PCI: 00:12.5: enabled 0
  801 13:07:00.892952    PCI: 00:12.6: enabled 0
  802 13:07:00.896018    PCI: 00:14.0: enabled 1
  803 13:07:00.899530     USB0 port 0: enabled 1
  804 13:07:00.899969      USB2 port 0: enabled 1
  805 13:07:00.902686      USB2 port 1: enabled 1
  806 13:07:00.906020      USB2 port 2: enabled 0
  807 13:07:00.909642      USB2 port 3: enabled 0
  808 13:07:00.912775      USB2 port 5: enabled 0
  809 13:07:00.915680      USB2 port 6: enabled 1
  810 13:07:00.916121      USB2 port 9: enabled 1
  811 13:07:00.918923      USB3 port 0: enabled 1
  812 13:07:00.922318      USB3 port 1: enabled 1
  813 13:07:00.925659      USB3 port 2: enabled 1
  814 13:07:00.929162      USB3 port 3: enabled 1
  815 13:07:00.932215      USB3 port 4: enabled 0
  816 13:07:00.932656    PCI: 00:14.1: enabled 0
  817 13:07:00.935816    PCI: 00:14.3: enabled 1
  818 13:07:00.939022    PCI: 00:14.5: enabled 0
  819 13:07:00.942361    PCI: 00:15.0: enabled 1
  820 13:07:00.945716     I2C: 00:15: enabled 1
  821 13:07:00.946266    PCI: 00:15.1: enabled 1
  822 13:07:00.948901     I2C: 00:5d: enabled 1
  823 13:07:00.952378     GENERIC: 0.0: enabled 1
  824 13:07:00.954989    PCI: 00:15.2: enabled 0
  825 13:07:00.958627    PCI: 00:15.3: enabled 0
  826 13:07:00.959069    PCI: 00:16.0: enabled 1
  827 13:07:00.961220    PCI: 00:16.1: enabled 0
  828 13:07:00.965452    PCI: 00:16.2: enabled 0
  829 13:07:00.967930    PCI: 00:16.3: enabled 0
  830 13:07:00.971051    PCI: 00:16.4: enabled 0
  831 13:07:00.974487    PCI: 00:16.5: enabled 0
  832 13:07:00.975035    PCI: 00:17.0: enabled 1
  833 13:07:00.977936    PCI: 00:19.0: enabled 1
  834 13:07:00.981219     I2C: 00:1a: enabled 1
  835 13:07:00.984443     I2C: 00:38: enabled 1
  836 13:07:00.984913     I2C: 00:39: enabled 1
  837 13:07:00.987573     I2C: 00:3a: enabled 1
  838 13:07:00.991012     I2C: 00:3b: enabled 1
  839 13:07:00.994243    PCI: 00:19.1: enabled 0
  840 13:07:00.997267    PCI: 00:19.2: enabled 0
  841 13:07:00.997708    PCI: 00:1a.0: enabled 0
  842 13:07:01.001250    PCI: 00:1c.0: enabled 0
  843 13:07:01.004079    PCI: 00:1c.1: enabled 0
  844 13:07:01.007098    PCI: 00:1c.2: enabled 0
  845 13:07:01.010625    PCI: 00:1c.3: enabled 0
  846 13:07:01.011194    PCI: 00:1c.4: enabled 0
  847 13:07:01.013768    PCI: 00:1c.5: enabled 0
  848 13:07:01.016842    PCI: 00:1c.6: enabled 0
  849 13:07:01.020085    PCI: 00:1c.7: enabled 0
  850 13:07:01.023224    PCI: 00:1d.0: enabled 1
  851 13:07:01.023678    PCI: 00:1d.1: enabled 0
  852 13:07:01.026773    PCI: 00:1d.2: enabled 0
  853 13:07:01.030330    PCI: 00:1d.3: enabled 0
  854 13:07:01.033070    PCI: 00:1d.4: enabled 0
  855 13:07:01.036650    PCI: 00:1d.5: enabled 1
  856 13:07:01.037226     PCI: 00:00.0: enabled 1
  857 13:07:01.040361    PCI: 00:1e.0: enabled 1
  858 13:07:01.042952    PCI: 00:1e.1: enabled 0
  859 13:07:01.046816    PCI: 00:1e.2: enabled 1
  860 13:07:01.049368     SPI: 00: enabled 1
  861 13:07:01.049809    PCI: 00:1e.3: enabled 1
  862 13:07:01.053162     SPI: 01: enabled 1
  863 13:07:01.056408    PCI: 00:1f.0: enabled 1
  864 13:07:01.059844     PNP: 0c09.0: enabled 1
  865 13:07:01.060383    PCI: 00:1f.1: enabled 1
  866 13:07:01.063114    PCI: 00:1f.2: enabled 1
  867 13:07:01.066467    PCI: 00:1f.3: enabled 1
  868 13:07:01.069768    PCI: 00:1f.4: enabled 1
  869 13:07:01.072553    PCI: 00:1f.5: enabled 1
  870 13:07:01.076241    PCI: 00:1f.6: enabled 0
  871 13:07:01.076778  Root Device scanning...
  872 13:07:01.079331  scan_static_bus for Root Device
  873 13:07:01.082915  CPU_CLUSTER: 0 enabled
  874 13:07:01.085516  DOMAIN: 0000 enabled
  875 13:07:01.086086  DOMAIN: 0000 scanning...
  876 13:07:01.088894  PCI: pci_scan_bus for bus 00
  877 13:07:01.092308  PCI: 00:00.0 [8086/0000] ops
  878 13:07:01.095265  PCI: 00:00.0 [8086/9b61] enabled
  879 13:07:01.099255  PCI: 00:02.0 [8086/0000] bus ops
  880 13:07:01.102709  PCI: 00:02.0 [8086/9b41] enabled
  881 13:07:01.105270  PCI: 00:04.0 [8086/1903] disabled
  882 13:07:01.108952  PCI: 00:08.0 [8086/1911] enabled
  883 13:07:01.111790  PCI: 00:12.0 [8086/02f9] enabled
  884 13:07:01.115009  PCI: 00:14.0 [8086/0000] bus ops
  885 13:07:01.121679  PCI: 00:14.0 [8086/02ed] enabled
  886 13:07:01.124909  PCI: 00:14.2 [8086/02ef] enabled
  887 13:07:01.127956  PCI: 00:14.3 [8086/02f0] enabled
  888 13:07:01.131148  PCI: 00:15.0 [8086/0000] bus ops
  889 13:07:01.134894  PCI: 00:15.0 [8086/02e8] enabled
  890 13:07:01.138142  PCI: 00:15.1 [8086/0000] bus ops
  891 13:07:01.141251  PCI: 00:15.1 [8086/02e9] enabled
  892 13:07:01.144278  PCI: 00:16.0 [8086/0000] ops
  893 13:07:01.148055  PCI: 00:16.0 [8086/02e0] enabled
  894 13:07:01.148727  PCI: 00:17.0 [8086/0000] ops
  895 13:07:01.151144  PCI: 00:17.0 [8086/02d3] enabled
  896 13:07:01.154430  PCI: 00:19.0 [8086/0000] bus ops
  897 13:07:01.157667  PCI: 00:19.0 [8086/02c5] enabled
  898 13:07:01.161129  PCI: 00:1d.0 [8086/0000] bus ops
  899 13:07:01.164295  PCI: 00:1d.0 [8086/02b0] enabled
  900 13:07:01.170912  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 13:07:01.174365  PCI: 00:1e.0 [8086/0000] ops
  902 13:07:01.178016  PCI: 00:1e.0 [8086/02a8] enabled
  903 13:07:01.180961  PCI: 00:1e.2 [8086/0000] bus ops
  904 13:07:01.184525  PCI: 00:1e.2 [8086/02aa] enabled
  905 13:07:01.187203  PCI: 00:1e.3 [8086/0000] bus ops
  906 13:07:01.190421  PCI: 00:1e.3 [8086/02ab] enabled
  907 13:07:01.193726  PCI: 00:1f.0 [8086/0000] bus ops
  908 13:07:01.196848  PCI: 00:1f.0 [8086/0284] enabled
  909 13:07:01.203349  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 13:07:01.210168  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 13:07:01.213023  PCI: 00:1f.3 [8086/0000] bus ops
  912 13:07:01.216669  PCI: 00:1f.3 [8086/02c8] enabled
  913 13:07:01.219876  PCI: 00:1f.4 [8086/0000] bus ops
  914 13:07:01.223217  PCI: 00:1f.4 [8086/02a3] enabled
  915 13:07:01.226420  PCI: 00:1f.5 [8086/0000] bus ops
  916 13:07:01.229942  PCI: 00:1f.5 [8086/02a4] enabled
  917 13:07:01.232937  PCI: Leftover static devices:
  918 13:07:01.233381  PCI: 00:05.0
  919 13:07:01.236499  PCI: 00:12.5
  920 13:07:01.237105  PCI: 00:12.6
  921 13:07:01.237467  PCI: 00:14.1
  922 13:07:01.239502  PCI: 00:14.5
  923 13:07:01.239939  PCI: 00:15.2
  924 13:07:01.242911  PCI: 00:15.3
  925 13:07:01.243462  PCI: 00:16.1
  926 13:07:01.246197  PCI: 00:16.2
  927 13:07:01.246762  PCI: 00:16.3
  928 13:07:01.247120  PCI: 00:16.4
  929 13:07:01.249543  PCI: 00:16.5
  930 13:07:01.249985  PCI: 00:19.1
  931 13:07:01.253012  PCI: 00:19.2
  932 13:07:01.253567  PCI: 00:1a.0
  933 13:07:01.253921  PCI: 00:1c.0
  934 13:07:01.256257  PCI: 00:1c.1
  935 13:07:01.256824  PCI: 00:1c.2
  936 13:07:01.259547  PCI: 00:1c.3
  937 13:07:01.260092  PCI: 00:1c.4
  938 13:07:01.261985  PCI: 00:1c.5
  939 13:07:01.262444  PCI: 00:1c.6
  940 13:07:01.262787  PCI: 00:1c.7
  941 13:07:01.265400  PCI: 00:1d.1
  942 13:07:01.265952  PCI: 00:1d.2
  943 13:07:01.268901  PCI: 00:1d.3
  944 13:07:01.269447  PCI: 00:1d.4
  945 13:07:01.269796  PCI: 00:1d.5
  946 13:07:01.272199  PCI: 00:1e.1
  947 13:07:01.272710  PCI: 00:1f.1
  948 13:07:01.275532  PCI: 00:1f.2
  949 13:07:01.276073  PCI: 00:1f.6
  950 13:07:01.278613  PCI: Check your devicetree.cb.
  951 13:07:01.281781  PCI: 00:02.0 scanning...
  952 13:07:01.285351  scan_generic_bus for PCI: 00:02.0
  953 13:07:01.288621  scan_generic_bus for PCI: 00:02.0 done
  954 13:07:01.294794  scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
  955 13:07:01.297963  PCI: 00:14.0 scanning...
  956 13:07:01.301241  scan_static_bus for PCI: 00:14.0
  957 13:07:01.301789  USB0 port 0 enabled
  958 13:07:01.304413  USB0 port 0 scanning...
  959 13:07:01.307604  scan_static_bus for USB0 port 0
  960 13:07:01.310827  USB2 port 0 enabled
  961 13:07:01.314471  USB2 port 1 enabled
  962 13:07:01.314909  USB2 port 2 disabled
  963 13:07:01.317575  USB2 port 3 disabled
  964 13:07:01.320753  USB2 port 5 disabled
  965 13:07:01.321244  USB2 port 6 enabled
  966 13:07:01.324342  USB2 port 9 enabled
  967 13:07:01.324859  USB3 port 0 enabled
  968 13:07:01.327503  USB3 port 1 enabled
  969 13:07:01.330163  USB3 port 2 enabled
  970 13:07:01.330603  USB3 port 3 enabled
  971 13:07:01.333495  USB3 port 4 disabled
  972 13:07:01.336675  USB2 port 0 scanning...
  973 13:07:01.340162  scan_static_bus for USB2 port 0
  974 13:07:01.343717  scan_static_bus for USB2 port 0 done
  975 13:07:01.350833  scan_bus: scanning of bus USB2 port 0 took 9700 usecs
  976 13:07:01.351386  USB2 port 1 scanning...
  977 13:07:01.353510  scan_static_bus for USB2 port 1
  978 13:07:01.356590  scan_static_bus for USB2 port 1 done
  979 13:07:01.363433  scan_bus: scanning of bus USB2 port 1 took 9707 usecs
  980 13:07:01.366870  USB2 port 6 scanning...
  981 13:07:01.369943  scan_static_bus for USB2 port 6
  982 13:07:01.373462  scan_static_bus for USB2 port 6 done
  983 13:07:01.379705  scan_bus: scanning of bus USB2 port 6 took 9707 usecs
  984 13:07:01.380305  USB2 port 9 scanning...
  985 13:07:01.383628  scan_static_bus for USB2 port 9
  986 13:07:01.389698  scan_static_bus for USB2 port 9 done
  987 13:07:01.393305  scan_bus: scanning of bus USB2 port 9 took 9701 usecs
  988 13:07:01.396291  USB3 port 0 scanning...
  989 13:07:01.399208  scan_static_bus for USB3 port 0
  990 13:07:01.402791  scan_static_bus for USB3 port 0 done
  991 13:07:01.409214  scan_bus: scanning of bus USB3 port 0 took 9708 usecs
  992 13:07:01.412144  USB3 port 1 scanning...
  993 13:07:01.415505  scan_static_bus for USB3 port 1
  994 13:07:01.418657  scan_static_bus for USB3 port 1 done
  995 13:07:01.421818  scan_bus: scanning of bus USB3 port 1 took 9701 usecs
  996 13:07:01.425278  USB3 port 2 scanning...
  997 13:07:01.428378  scan_static_bus for USB3 port 2
  998 13:07:01.431863  scan_static_bus for USB3 port 2 done
  999 13:07:01.438798  scan_bus: scanning of bus USB3 port 2 took 9707 usecs
 1000 13:07:01.441853  USB3 port 3 scanning...
 1001 13:07:01.444863  scan_static_bus for USB3 port 3
 1002 13:07:01.448591  scan_static_bus for USB3 port 3 done
 1003 13:07:01.454572  scan_bus: scanning of bus USB3 port 3 took 9698 usecs
 1004 13:07:01.458529  scan_static_bus for USB0 port 0 done
 1005 13:07:01.464667  scan_bus: scanning of bus USB0 port 0 took 155476 usecs
 1006 13:07:01.468138  scan_static_bus for PCI: 00:14.0 done
 1007 13:07:01.471186  scan_bus: scanning of bus PCI: 00:14.0 took 173099 usecs
 1008 13:07:01.474489  PCI: 00:15.0 scanning...
 1009 13:07:01.477665  scan_generic_bus for PCI: 00:15.0
 1010 13:07:01.483651  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 13:07:01.486894  scan_generic_bus for PCI: 00:15.0 done
 1012 13:07:01.490203  scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
 1013 13:07:01.494505  PCI: 00:15.1 scanning...
 1014 13:07:01.496908  scan_generic_bus for PCI: 00:15.1
 1015 13:07:01.503851  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 13:07:01.506880  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 13:07:01.510037  scan_generic_bus for PCI: 00:15.1 done
 1018 13:07:01.516586  scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
 1019 13:07:01.520061  PCI: 00:19.0 scanning...
 1020 13:07:01.523042  scan_generic_bus for PCI: 00:19.0
 1021 13:07:01.526430  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 13:07:01.529454  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 13:07:01.536471  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 13:07:01.539733  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 13:07:01.543254  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 13:07:01.546473  scan_generic_bus for PCI: 00:19.0 done
 1027 13:07:01.552148  scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
 1028 13:07:01.555522  PCI: 00:1d.0 scanning...
 1029 13:07:01.558822  do_pci_scan_bridge for PCI: 00:1d.0
 1030 13:07:01.562138  PCI: pci_scan_bus for bus 01
 1031 13:07:01.565397  PCI: 01:00.0 [1c5c/1327] enabled
 1032 13:07:01.568973  Enabling Common Clock Configuration
 1033 13:07:01.571827  L1 Sub-State supported from root port 29
 1034 13:07:01.575062  L1 Sub-State Support = 0xf
 1035 13:07:01.578685  CommonModeRestoreTime = 0x28
 1036 13:07:01.582287  Power On Value = 0x16, Power On Scale = 0x0
 1037 13:07:01.584943  ASPM: Enabled L1
 1038 13:07:01.591792  scan_bus: scanning of bus PCI: 00:1d.0 took 32781 usecs
 1039 13:07:01.592246  PCI: 00:1e.2 scanning...
 1040 13:07:01.595063  scan_generic_bus for PCI: 00:1e.2
 1041 13:07:01.601847  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 13:07:01.605166  scan_generic_bus for PCI: 00:1e.2 done
 1043 13:07:01.611695  scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
 1044 13:07:01.612130  PCI: 00:1e.3 scanning...
 1045 13:07:01.614913  scan_generic_bus for PCI: 00:1e.3
 1046 13:07:01.621287  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 13:07:01.624537  scan_generic_bus for PCI: 00:1e.3 done
 1048 13:07:01.627914  scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
 1049 13:07:01.630604  PCI: 00:1f.0 scanning...
 1050 13:07:01.634400  scan_static_bus for PCI: 00:1f.0
 1051 13:07:01.637826  PNP: 0c09.0 enabled
 1052 13:07:01.641103  scan_static_bus for PCI: 00:1f.0 done
 1053 13:07:01.647556  scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
 1054 13:07:01.650735  PCI: 00:1f.3 scanning...
 1055 13:07:01.654238  scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
 1056 13:07:01.657273  PCI: 00:1f.4 scanning...
 1057 13:07:01.660714  scan_generic_bus for PCI: 00:1f.4
 1058 13:07:01.663602  scan_generic_bus for PCI: 00:1f.4 done
 1059 13:07:01.670302  scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
 1060 13:07:01.673786  PCI: 00:1f.5 scanning...
 1061 13:07:01.677125  scan_generic_bus for PCI: 00:1f.5
 1062 13:07:01.680651  scan_generic_bus for PCI: 00:1f.5 done
 1063 13:07:01.686446  scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
 1064 13:07:01.693247  scan_bus: scanning of bus DOMAIN: 0000 took 605159 usecs
 1065 13:07:01.696497  scan_static_bus for Root Device done
 1066 13:07:01.703084  scan_bus: scanning of bus Root Device took 625021 usecs
 1067 13:07:01.703533  done
 1068 13:07:01.706806  Chrome EC: UHEPI supported
 1069 13:07:01.712450  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 13:07:01.715745  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 13:07:01.722278  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 13:07:01.729709  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 13:07:01.733098  SPI flash protection: WPSW=0 SRP0=0
 1074 13:07:01.739444  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 13:07:01.743070  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 13:07:01.746127  found VGA at PCI: 00:02.0
 1077 13:07:01.749660  Setting up VGA for PCI: 00:02.0
 1078 13:07:01.756195  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 13:07:01.759429  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 13:07:01.762626  Allocating resources...
 1081 13:07:01.765921  Reading resources...
 1082 13:07:01.769266  Root Device read_resources bus 0 link: 0
 1083 13:07:01.772357  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 13:07:01.778936  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 13:07:01.782616  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 13:07:01.789910  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 13:07:01.793534  USB0 port 0 read_resources bus 0 link: 0
 1088 13:07:01.801497  USB0 port 0 read_resources bus 0 link: 0 done
 1089 13:07:01.804703  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 13:07:01.812453  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 13:07:01.814938  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 13:07:01.821854  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 13:07:01.825283  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 13:07:01.833088  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 13:07:01.839563  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 13:07:01.843309  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 13:07:01.849164  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 13:07:01.852081  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 13:07:01.859132  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 13:07:01.862038  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 13:07:01.869111  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 13:07:01.872254  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 13:07:01.879258  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 13:07:01.884916  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 13:07:01.888331  Root Device read_resources bus 0 link: 0 done
 1106 13:07:01.891998  Done reading resources.
 1107 13:07:01.898530  Show resources in subtree (Root Device)...After reading.
 1108 13:07:01.901808   Root Device child on link 0 CPU_CLUSTER: 0
 1109 13:07:01.905317    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 13:07:01.907740     APIC: 00
 1111 13:07:01.908187     APIC: 01
 1112 13:07:01.911413     APIC: 03
 1113 13:07:01.911953     APIC: 02
 1114 13:07:01.912307     APIC: 04
 1115 13:07:01.961072     APIC: 05
 1116 13:07:01.961769     APIC: 07
 1117 13:07:01.962171     APIC: 06
 1118 13:07:01.962538    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 13:07:01.962896    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 13:07:01.963672    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 13:07:01.964065     PCI: 00:00.0
 1122 13:07:01.964411     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 13:07:01.964759     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 13:07:02.011019     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 13:07:02.011677     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 13:07:02.012535     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 13:07:02.013077     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 13:07:02.013866     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 13:07:02.060225     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 13:07:02.061020     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 13:07:02.061865     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 13:07:02.062294     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 13:07:02.062667     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 13:07:02.089423     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 13:07:02.090070     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 13:07:02.090949     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 13:07:02.093267     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 13:07:02.093764     PCI: 00:02.0
 1139 13:07:02.103673     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 13:07:02.112921     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 13:07:02.122252     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 13:07:02.122792     PCI: 00:04.0
 1143 13:07:02.126074     PCI: 00:08.0
 1144 13:07:02.135301     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 13:07:02.135744     PCI: 00:12.0
 1146 13:07:02.144996     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 13:07:02.152230     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 13:07:02.161574     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 13:07:02.164979      USB0 port 0 child on link 0 USB2 port 0
 1150 13:07:02.168370       USB2 port 0
 1151 13:07:02.168951       USB2 port 1
 1152 13:07:02.171346       USB2 port 2
 1153 13:07:02.171787       USB2 port 3
 1154 13:07:02.174772       USB2 port 5
 1155 13:07:02.175221       USB2 port 6
 1156 13:07:02.178332       USB2 port 9
 1157 13:07:02.178890       USB3 port 0
 1158 13:07:02.181740       USB3 port 1
 1159 13:07:02.182292       USB3 port 2
 1160 13:07:02.185095       USB3 port 3
 1161 13:07:02.188543       USB3 port 4
 1162 13:07:02.189132     PCI: 00:14.2
 1163 13:07:02.197837     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 13:07:02.207565     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 13:07:02.210850     PCI: 00:14.3
 1166 13:07:02.220891     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 13:07:02.224107     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 13:07:02.233822     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 13:07:02.234269      I2C: 01:15
 1170 13:07:02.240616     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 13:07:02.250230     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 13:07:02.250781      I2C: 02:5d
 1173 13:07:02.253332      GENERIC: 0.0
 1174 13:07:02.253791     PCI: 00:16.0
 1175 13:07:02.263249     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 13:07:02.266394     PCI: 00:17.0
 1177 13:07:02.276147     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 13:07:02.282789     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 13:07:02.292266     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 13:07:02.299051     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 13:07:02.308834     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 13:07:02.318899     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 13:07:02.321849     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 13:07:02.331317     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 13:07:02.334829      I2C: 03:1a
 1186 13:07:02.335268      I2C: 03:38
 1187 13:07:02.338219      I2C: 03:39
 1188 13:07:02.338659      I2C: 03:3a
 1189 13:07:02.341194      I2C: 03:3b
 1190 13:07:02.344686     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 13:07:02.354000     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 13:07:02.364708     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 13:07:02.370298     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 13:07:02.373751      PCI: 01:00.0
 1195 13:07:02.383958      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 13:07:02.384500     PCI: 00:1e.0
 1197 13:07:02.396579     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 13:07:02.406384     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 13:07:02.409634     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 13:07:02.419623     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 13:07:02.422901      SPI: 00
 1202 13:07:02.426104     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 13:07:02.435922     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 13:07:02.436471      SPI: 01
 1205 13:07:02.442528     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 13:07:02.448913     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 13:07:02.458868     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 13:07:02.459440      PNP: 0c09.0
 1209 13:07:02.468505      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 13:07:02.471886     PCI: 00:1f.3
 1211 13:07:02.481386     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 13:07:02.491421     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 13:07:02.491964     PCI: 00:1f.4
 1214 13:07:02.501314     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 13:07:02.510930     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 13:07:02.513745     PCI: 00:1f.5
 1217 13:07:02.520415     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 13:07:02.526923  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 13:07:02.533430  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 13:07:02.540409  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 13:07:02.543821  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 13:07:02.550050  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 13:07:02.552860  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 13:07:02.556519  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 13:07:02.563189  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 13:07:02.569861  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 13:07:02.575625  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 13:07:02.585666  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 13:07:02.592178  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 13:07:02.595713  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 13:07:02.605506  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 13:07:02.608645  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 13:07:02.615151  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 13:07:02.618468  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 13:07:02.621452  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 13:07:02.627914  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 13:07:02.631195  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 13:07:02.638208  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 13:07:02.641269  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 13:07:02.647934  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 13:07:02.650981  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 13:07:02.657351  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 13:07:02.660701  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 13:07:02.667303  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 13:07:02.670274  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 13:07:02.676944  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 13:07:02.680555  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 13:07:02.686879  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 13:07:02.689621  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 13:07:02.696678  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 13:07:02.699721  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 13:07:02.706202  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 13:07:02.709209  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 13:07:02.716072  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 13:07:02.725557  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 13:07:02.728901  avoid_fixed_resources: DOMAIN: 0000
 1257 13:07:02.732205  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 13:07:02.738664  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 13:07:02.748758  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 13:07:02.755165  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 13:07:02.761954  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 13:07:02.771768  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 13:07:02.777940  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 13:07:02.784633  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 13:07:02.794628  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 13:07:02.801118  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 13:07:02.807333  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 13:07:02.813743  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 13:07:02.817243  Setting resources...
 1270 13:07:02.824044  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 13:07:02.827326  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 13:07:02.830379  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 13:07:02.836855  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 13:07:02.840063  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 13:07:02.846390  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 13:07:02.853095  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 13:07:02.859690  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 13:07:02.866111  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 13:07:02.872908  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 13:07:02.876237  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 13:07:02.882748  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 13:07:02.885998  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 13:07:02.892246  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 13:07:02.896110  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 13:07:02.901823  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 13:07:02.905493  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 13:07:02.912020  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 13:07:02.915101  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 13:07:02.921951  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 13:07:02.924576  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 13:07:02.931786  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 13:07:02.934952  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 13:07:02.941140  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 13:07:02.944857  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 13:07:02.948153  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 13:07:02.953945  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 13:07:02.957078  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 13:07:02.963938  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 13:07:02.967569  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 13:07:02.973867  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 13:07:02.977243  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 13:07:02.986903  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 13:07:02.993412  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 13:07:02.999588  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 13:07:03.006533  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 13:07:03.012766  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 13:07:03.019832  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 13:07:03.025814  Root Device assign_resources, bus 0 link: 0
 1309 13:07:03.028964  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 13:07:03.038983  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 13:07:03.045474  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 13:07:03.055470  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 13:07:03.061775  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 13:07:03.071888  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 13:07:03.078243  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 13:07:03.084250  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 13:07:03.087810  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 13:07:03.097845  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 13:07:03.104296  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 13:07:03.113790  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 13:07:03.120535  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 13:07:03.126960  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 13:07:03.130175  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 13:07:03.139719  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 13:07:03.142864  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 13:07:03.146125  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 13:07:03.156456  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 13:07:03.162553  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 13:07:03.172601  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 13:07:03.179368  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 13:07:03.188879  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 13:07:03.195554  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 13:07:03.202052  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 13:07:03.211591  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 13:07:03.215190  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 13:07:03.221789  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 13:07:03.227987  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 13:07:03.238067  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 13:07:03.247817  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 13:07:03.251382  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 13:07:03.257238  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 13:07:03.264496  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 13:07:03.270473  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 13:07:03.280466  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 13:07:03.284098  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 13:07:03.290870  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 13:07:03.297355  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 13:07:03.303183  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 13:07:03.306650  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 13:07:03.313460  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 13:07:03.316482  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 13:07:03.322973  LPC: Trying to open IO window from 800 size 1ff
 1353 13:07:03.329884  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 13:07:03.339329  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 13:07:03.346002  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 13:07:03.355746  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 13:07:03.359150  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 13:07:03.364882  Root Device assign_resources, bus 0 link: 0
 1359 13:07:03.365315  Done setting resources.
 1360 13:07:03.371645  Show resources in subtree (Root Device)...After assigning values.
 1361 13:07:03.378321   Root Device child on link 0 CPU_CLUSTER: 0
 1362 13:07:03.381794    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 13:07:03.382337     APIC: 00
 1364 13:07:03.385334     APIC: 01
 1365 13:07:03.385862     APIC: 03
 1366 13:07:03.386199     APIC: 02
 1367 13:07:03.388252     APIC: 04
 1368 13:07:03.388777     APIC: 05
 1369 13:07:03.391659     APIC: 07
 1370 13:07:03.392094     APIC: 06
 1371 13:07:03.395131    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 13:07:03.404870    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 13:07:03.417954    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 13:07:03.418391     PCI: 00:00.0
 1375 13:07:03.427053     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 13:07:03.437279     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 13:07:03.447037     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 13:07:03.456842     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 13:07:03.466445     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 13:07:03.473145     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 13:07:03.483167     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 13:07:03.492889     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 13:07:03.502668     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 13:07:03.512639     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 13:07:03.522039     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 13:07:03.531508     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 13:07:03.541715     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 13:07:03.550995     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 13:07:03.557632     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 13:07:03.567253     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 13:07:03.570473     PCI: 00:02.0
 1392 13:07:03.580285     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 13:07:03.590711     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 13:07:03.599882     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 13:07:03.603355     PCI: 00:04.0
 1396 13:07:03.603897     PCI: 00:08.0
 1397 13:07:03.613381     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 13:07:03.616865     PCI: 00:12.0
 1399 13:07:03.626245     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 13:07:03.629866     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 13:07:03.639420     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 13:07:03.645730      USB0 port 0 child on link 0 USB2 port 0
 1403 13:07:03.646309       USB2 port 0
 1404 13:07:03.648996       USB2 port 1
 1405 13:07:03.649436       USB2 port 2
 1406 13:07:03.652376       USB2 port 3
 1407 13:07:03.652837       USB2 port 5
 1408 13:07:03.656272       USB2 port 6
 1409 13:07:03.656861       USB2 port 9
 1410 13:07:03.659291       USB3 port 0
 1411 13:07:03.662128       USB3 port 1
 1412 13:07:03.662572       USB3 port 2
 1413 13:07:03.665216       USB3 port 3
 1414 13:07:03.665657       USB3 port 4
 1415 13:07:03.668817     PCI: 00:14.2
 1416 13:07:03.678419     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 13:07:03.688452     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 13:07:03.691646     PCI: 00:14.3
 1419 13:07:03.701387     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 13:07:03.704680     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 13:07:03.714429     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 13:07:03.717753      I2C: 01:15
 1423 13:07:03.721032     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 13:07:03.730243     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 13:07:03.734161      I2C: 02:5d
 1426 13:07:03.734622      GENERIC: 0.0
 1427 13:07:03.736766     PCI: 00:16.0
 1428 13:07:03.747169     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 13:07:03.747720     PCI: 00:17.0
 1430 13:07:03.756945     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 13:07:03.769863     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 13:07:03.776381     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 13:07:03.785958     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 13:07:03.795543     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 13:07:03.805571     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 13:07:03.808628     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 13:07:03.818381     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 13:07:03.821748      I2C: 03:1a
 1439 13:07:03.822188      I2C: 03:38
 1440 13:07:03.825255      I2C: 03:39
 1441 13:07:03.825696      I2C: 03:3a
 1442 13:07:03.828683      I2C: 03:3b
 1443 13:07:03.831880     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 13:07:03.841344     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 13:07:03.851500     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 13:07:03.861442     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 13:07:03.864645      PCI: 01:00.0
 1448 13:07:03.874487      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 13:07:03.877564     PCI: 00:1e.0
 1450 13:07:03.887217     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 13:07:03.897742     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 13:07:03.900219     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 13:07:03.910025     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 13:07:03.913654      SPI: 00
 1455 13:07:03.916970     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 13:07:03.927095     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 13:07:03.929561      SPI: 01
 1458 13:07:03.932933     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 13:07:03.942710     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 13:07:03.949502     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 13:07:03.953020      PNP: 0c09.0
 1462 13:07:03.962245      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 13:07:03.962826     PCI: 00:1f.3
 1464 13:07:03.972290     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 13:07:03.981526     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 13:07:03.984837     PCI: 00:1f.4
 1467 13:07:03.994708     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 13:07:04.004700     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 13:07:04.005294     PCI: 00:1f.5
 1470 13:07:04.018187     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 13:07:04.018733  Done allocating resources.
 1472 13:07:04.024189  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 13:07:04.027240  Enabling resources...
 1474 13:07:04.030567  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 13:07:04.034037  PCI: 00:00.0 cmd <- 06
 1476 13:07:04.037369  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 13:07:04.040755  PCI: 00:02.0 cmd <- 03
 1478 13:07:04.043878  PCI: 00:08.0 cmd <- 06
 1479 13:07:04.046963  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 13:07:04.050554  PCI: 00:12.0 cmd <- 02
 1481 13:07:04.053802  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 13:07:04.056406  PCI: 00:14.0 cmd <- 02
 1483 13:07:04.056992  PCI: 00:14.2 cmd <- 02
 1484 13:07:04.063598  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 13:07:04.064137  PCI: 00:14.3 cmd <- 02
 1486 13:07:04.066271  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 13:07:04.069497  PCI: 00:15.0 cmd <- 02
 1488 13:07:04.073450  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 13:07:04.076896  PCI: 00:15.1 cmd <- 02
 1490 13:07:04.079312  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 13:07:04.083376  PCI: 00:16.0 cmd <- 02
 1492 13:07:04.085848  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 13:07:04.089336  PCI: 00:17.0 cmd <- 03
 1494 13:07:04.092396  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 13:07:04.095732  PCI: 00:19.0 cmd <- 02
 1496 13:07:04.099009  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 13:07:04.102277  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 13:07:04.105684  PCI: 00:1d.0 cmd <- 06
 1499 13:07:04.108972  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 13:07:04.112063  PCI: 00:1e.0 cmd <- 06
 1501 13:07:04.115548  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 13:07:04.119047  PCI: 00:1e.2 cmd <- 06
 1503 13:07:04.122424  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 13:07:04.125529  PCI: 00:1e.3 cmd <- 02
 1505 13:07:04.128769  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 13:07:04.129250  PCI: 00:1f.0 cmd <- 407
 1507 13:07:04.135566  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 13:07:04.136012  PCI: 00:1f.3 cmd <- 02
 1509 13:07:04.142163  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 13:07:04.142606  PCI: 00:1f.4 cmd <- 03
 1511 13:07:04.145120  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 13:07:04.148684  PCI: 00:1f.5 cmd <- 406
 1513 13:07:04.158139  PCI: 01:00.0 cmd <- 02
 1514 13:07:04.163413  done.
 1515 13:07:04.175233  ME: Version: 14.0.39.1367
 1516 13:07:04.182017  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
 1517 13:07:04.185267  Initializing devices...
 1518 13:07:04.185870  Root Device init ...
 1519 13:07:04.191758  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 13:07:04.194873  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 13:07:04.201522  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 13:07:04.208074  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 13:07:04.214582  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 13:07:04.218042  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 13:07:04.224842  Root Device init finished in 35130 usecs
 1526 13:07:04.225422  CPU_CLUSTER: 0 init ...
 1527 13:07:04.231172  CPU_CLUSTER: 0 init finished in 2447 usecs
 1528 13:07:04.235986  PCI: 00:00.0 init ...
 1529 13:07:04.239155  CPU TDP: 15 Watts
 1530 13:07:04.242279  CPU PL2 = 64 Watts
 1531 13:07:04.245850  PCI: 00:00.0 init finished in 7079 usecs
 1532 13:07:04.249115  PCI: 00:02.0 init ...
 1533 13:07:04.252561  PCI: 00:02.0 init finished in 2252 usecs
 1534 13:07:04.255490  PCI: 00:08.0 init ...
 1535 13:07:04.258302  PCI: 00:08.0 init finished in 2251 usecs
 1536 13:07:04.262294  PCI: 00:12.0 init ...
 1537 13:07:04.264919  PCI: 00:12.0 init finished in 2251 usecs
 1538 13:07:04.268375  PCI: 00:14.0 init ...
 1539 13:07:04.271966  PCI: 00:14.0 init finished in 2250 usecs
 1540 13:07:04.275532  PCI: 00:14.2 init ...
 1541 13:07:04.278260  PCI: 00:14.2 init finished in 2249 usecs
 1542 13:07:04.281740  PCI: 00:14.3 init ...
 1543 13:07:04.285062  PCI: 00:14.3 init finished in 2258 usecs
 1544 13:07:04.288171  PCI: 00:15.0 init ...
 1545 13:07:04.291843  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 13:07:04.298125  PCI: 00:15.0 init finished in 5972 usecs
 1547 13:07:04.298570  PCI: 00:15.1 init ...
 1548 13:07:04.304518  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 13:07:04.308131  PCI: 00:15.1 init finished in 5962 usecs
 1550 13:07:04.311282  PCI: 00:16.0 init ...
 1551 13:07:04.314390  PCI: 00:16.0 init finished in 2242 usecs
 1552 13:07:04.317466  PCI: 00:19.0 init ...
 1553 13:07:04.321065  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 13:07:04.324246  PCI: 00:19.0 init finished in 5972 usecs
 1555 13:07:04.327489  PCI: 00:1d.0 init ...
 1556 13:07:04.330897  Initializing PCH PCIe bridge.
 1557 13:07:04.333404  PCI: 00:1d.0 init finished in 5278 usecs
 1558 13:07:04.337488  PCI: 00:1f.0 init ...
 1559 13:07:04.340817  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 13:07:04.347159  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 13:07:04.347692  IOAPIC: ID = 0x02
 1562 13:07:04.350319  IOAPIC: Dumping registers
 1563 13:07:04.353660    reg 0x0000: 0x02000000
 1564 13:07:04.356964    reg 0x0001: 0x00770020
 1565 13:07:04.360522    reg 0x0002: 0x00000000
 1566 13:07:04.363867  PCI: 00:1f.0 init finished in 23523 usecs
 1567 13:07:04.366959  PCI: 00:1f.4 init ...
 1568 13:07:04.370570  PCI: 00:1f.4 init finished in 2259 usecs
 1569 13:07:04.381821  PCI: 01:00.0 init ...
 1570 13:07:04.385335  PCI: 01:00.0 init finished in 2243 usecs
 1571 13:07:04.389604  PNP: 0c09.0 init ...
 1572 13:07:04.396092  Google Chrome EC uptime: 11.152 seconds
 1573 13:07:04.399376  Google Chrome AP resets since EC boot: 0
 1574 13:07:04.402377  Google Chrome most recent AP reset causes:
 1575 13:07:04.408962  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 13:07:04.412179  PNP: 0c09.0 init finished in 20598 usecs
 1577 13:07:04.415483  Devices initialized
 1578 13:07:04.418808  Show all devs... After init.
 1579 13:07:04.419250  Root Device: enabled 1
 1580 13:07:04.421854  CPU_CLUSTER: 0: enabled 1
 1581 13:07:04.425412  DOMAIN: 0000: enabled 1
 1582 13:07:04.428413  APIC: 00: enabled 1
 1583 13:07:04.428887  PCI: 00:00.0: enabled 1
 1584 13:07:04.431693  PCI: 00:02.0: enabled 1
 1585 13:07:04.435175  PCI: 00:04.0: enabled 0
 1586 13:07:04.438584  PCI: 00:05.0: enabled 0
 1587 13:07:04.439058  PCI: 00:12.0: enabled 1
 1588 13:07:04.441475  PCI: 00:12.5: enabled 0
 1589 13:07:04.444573  PCI: 00:12.6: enabled 0
 1590 13:07:04.445060  PCI: 00:14.0: enabled 1
 1591 13:07:04.447822  PCI: 00:14.1: enabled 0
 1592 13:07:04.452019  PCI: 00:14.3: enabled 1
 1593 13:07:04.454759  PCI: 00:14.5: enabled 0
 1594 13:07:04.455315  PCI: 00:15.0: enabled 1
 1595 13:07:04.458060  PCI: 00:15.1: enabled 1
 1596 13:07:04.461123  PCI: 00:15.2: enabled 0
 1597 13:07:04.464508  PCI: 00:15.3: enabled 0
 1598 13:07:04.465012  PCI: 00:16.0: enabled 1
 1599 13:07:04.467595  PCI: 00:16.1: enabled 0
 1600 13:07:04.471206  PCI: 00:16.2: enabled 0
 1601 13:07:04.474433  PCI: 00:16.3: enabled 0
 1602 13:07:04.474983  PCI: 00:16.4: enabled 0
 1603 13:07:04.477389  PCI: 00:16.5: enabled 0
 1604 13:07:04.480762  PCI: 00:17.0: enabled 1
 1605 13:07:04.484161  PCI: 00:19.0: enabled 1
 1606 13:07:04.484733  PCI: 00:19.1: enabled 0
 1607 13:07:04.487440  PCI: 00:19.2: enabled 0
 1608 13:07:04.490813  PCI: 00:1a.0: enabled 0
 1609 13:07:04.493802  PCI: 00:1c.0: enabled 0
 1610 13:07:04.494251  PCI: 00:1c.1: enabled 0
 1611 13:07:04.496593  PCI: 00:1c.2: enabled 0
 1612 13:07:04.500629  PCI: 00:1c.3: enabled 0
 1613 13:07:04.503478  PCI: 00:1c.4: enabled 0
 1614 13:07:04.503984  PCI: 00:1c.5: enabled 0
 1615 13:07:04.506470  PCI: 00:1c.6: enabled 0
 1616 13:07:04.510432  PCI: 00:1c.7: enabled 0
 1617 13:07:04.513224  PCI: 00:1d.0: enabled 1
 1618 13:07:04.513669  PCI: 00:1d.1: enabled 0
 1619 13:07:04.516768  PCI: 00:1d.2: enabled 0
 1620 13:07:04.519834  PCI: 00:1d.3: enabled 0
 1621 13:07:04.523124  PCI: 00:1d.4: enabled 0
 1622 13:07:04.523643  PCI: 00:1d.5: enabled 0
 1623 13:07:04.526460  PCI: 00:1e.0: enabled 1
 1624 13:07:04.529528  PCI: 00:1e.1: enabled 0
 1625 13:07:04.532877  PCI: 00:1e.2: enabled 1
 1626 13:07:04.533362  PCI: 00:1e.3: enabled 1
 1627 13:07:04.536067  PCI: 00:1f.0: enabled 1
 1628 13:07:04.539389  PCI: 00:1f.1: enabled 0
 1629 13:07:04.542968  PCI: 00:1f.2: enabled 0
 1630 13:07:04.543521  PCI: 00:1f.3: enabled 1
 1631 13:07:04.546326  PCI: 00:1f.4: enabled 1
 1632 13:07:04.549227  PCI: 00:1f.5: enabled 1
 1633 13:07:04.552650  PCI: 00:1f.6: enabled 0
 1634 13:07:04.553250  USB0 port 0: enabled 1
 1635 13:07:04.555988  I2C: 01:15: enabled 1
 1636 13:07:04.559314  I2C: 02:5d: enabled 1
 1637 13:07:04.559867  GENERIC: 0.0: enabled 1
 1638 13:07:04.562361  I2C: 03:1a: enabled 1
 1639 13:07:04.565957  I2C: 03:38: enabled 1
 1640 13:07:04.566399  I2C: 03:39: enabled 1
 1641 13:07:04.568507  I2C: 03:3a: enabled 1
 1642 13:07:04.571704  I2C: 03:3b: enabled 1
 1643 13:07:04.575327  PCI: 00:00.0: enabled 1
 1644 13:07:04.575877  SPI: 00: enabled 1
 1645 13:07:04.578366  SPI: 01: enabled 1
 1646 13:07:04.578827  PNP: 0c09.0: enabled 1
 1647 13:07:04.581987  USB2 port 0: enabled 1
 1648 13:07:04.585079  USB2 port 1: enabled 1
 1649 13:07:04.588122  USB2 port 2: enabled 0
 1650 13:07:04.588569  USB2 port 3: enabled 0
 1651 13:07:04.591530  USB2 port 5: enabled 0
 1652 13:07:04.594639  USB2 port 6: enabled 1
 1653 13:07:04.595122  USB2 port 9: enabled 1
 1654 13:07:04.597849  USB3 port 0: enabled 1
 1655 13:07:04.601112  USB3 port 1: enabled 1
 1656 13:07:04.604465  USB3 port 2: enabled 1
 1657 13:07:04.605046  USB3 port 3: enabled 1
 1658 13:07:04.607603  USB3 port 4: enabled 0
 1659 13:07:04.611047  APIC: 01: enabled 1
 1660 13:07:04.611607  APIC: 03: enabled 1
 1661 13:07:04.614010  APIC: 02: enabled 1
 1662 13:07:04.617128  APIC: 04: enabled 1
 1663 13:07:04.617616  APIC: 05: enabled 1
 1664 13:07:04.620533  APIC: 07: enabled 1
 1665 13:07:04.621035  APIC: 06: enabled 1
 1666 13:07:04.623840  PCI: 00:08.0: enabled 1
 1667 13:07:04.627913  PCI: 00:14.2: enabled 1
 1668 13:07:04.630545  PCI: 01:00.0: enabled 1
 1669 13:07:04.634232  Disabling ACPI via APMC:
 1670 13:07:04.637615  done.
 1671 13:07:04.640560  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 13:07:04.643585  ELOG: NV offset 0xaf0000 size 0x4000
 1673 13:07:04.650412  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 13:07:04.657323  ELOG: Event(17) added with size 13 at 2022-08-31 13:07:03 UTC
 1675 13:07:04.663944  POST: Unexpected post code in previous boot: 0x73
 1676 13:07:04.670756  ELOG: Event(A3) added with size 11 at 2022-08-31 13:07:03 UTC
 1677 13:07:04.677117  ELOG: Event(92) added with size 9 at 2022-08-31 13:07:03 UTC
 1678 13:07:04.683718  ELOG: Event(93) added with size 9 at 2022-08-31 13:07:03 UTC
 1679 13:07:04.689919  ELOG: Event(9A) added with size 9 at 2022-08-31 13:07:03 UTC
 1680 13:07:04.696764  ELOG: Event(9E) added with size 10 at 2022-08-31 13:07:03 UTC
 1681 13:07:04.700358  ELOG: Event(9F) added with size 14 at 2022-08-31 13:07:03 UTC
 1682 13:07:04.706228  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1683 13:07:04.713388  ELOG: Event(A1) added with size 10 at 2022-08-31 13:07:03 UTC
 1684 13:07:04.723112  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1685 13:07:04.725849  ELOG: Event(A0) added with size 9 at 2022-08-31 13:07:03 UTC
 1686 13:07:04.732563  elog_add_boot_reason: Logged dev mode boot
 1687 13:07:04.733438  Finalize devices...
 1688 13:07:04.735616  PCI: 00:17.0 final
 1689 13:07:04.738911  Devices finalized
 1690 13:07:04.742098  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1691 13:07:04.748701  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1692 13:07:04.752596  ME: HFSTS1                  : 0x90000245
 1693 13:07:04.755104  ME: HFSTS2                  : 0x3B850126
 1694 13:07:04.761524  ME: HFSTS3                  : 0x00000020
 1695 13:07:04.764734  ME: HFSTS4                  : 0x00004800
 1696 13:07:04.768369  ME: HFSTS5                  : 0x00000000
 1697 13:07:04.771705  ME: HFSTS6                  : 0x40400006
 1698 13:07:04.775172  ME: Manufacturing Mode      : NO
 1699 13:07:04.778604  ME: FW Partition Table      : OK
 1700 13:07:04.781038  ME: Bringup Loader Failure  : NO
 1701 13:07:04.784409  ME: Firmware Init Complete  : YES
 1702 13:07:04.787886  ME: Boot Options Present    : NO
 1703 13:07:04.791570  ME: Update In Progress      : NO
 1704 13:07:04.797239  ME: D0i3 Support            : YES
 1705 13:07:04.800693  ME: Low Power State Enabled : NO
 1706 13:07:04.804569  ME: CPU Replaced            : NO
 1707 13:07:04.806984  ME: CPU Replacement Valid   : YES
 1708 13:07:04.810929  ME: Current Working State   : 5
 1709 13:07:04.814083  ME: Current Operation State : 1
 1710 13:07:04.817108  ME: Current Operation Mode  : 0
 1711 13:07:04.820644  ME: Error Code              : 0
 1712 13:07:04.823706  ME: CPU Debug Disabled      : YES
 1713 13:07:04.827089  ME: TXT Support             : NO
 1714 13:07:04.830325  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1715 13:07:04.836986  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1716 13:07:04.839649  CBFS @ c08000 size 3f8000
 1717 13:07:04.843337  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1718 13:07:04.849480  CBFS: Locating 'fallback/dsdt.aml'
 1719 13:07:04.853037  CBFS: Found @ offset 10bb80 size 3fa5
 1720 13:07:04.856036  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1721 13:07:04.859684  CBFS @ c08000 size 3f8000
 1722 13:07:04.865890  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1723 13:07:04.869042  CBFS: Locating 'fallback/slic'
 1724 13:07:04.876133  CBFS: 'fallback/slic' not found.
 1725 13:07:04.879610  ACPI: Writing ACPI tables at 99b3e000.
 1726 13:07:04.880205  ACPI:    * FACS
 1727 13:07:04.882797  ACPI:    * DSDT
 1728 13:07:04.885421  Ramoops buffer: 0x100000@0x99a3d000.
 1729 13:07:04.888754  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1730 13:07:04.895663  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1731 13:07:04.898411  Google Chrome EC: version:
 1732 13:07:04.901896  	ro: helios_v2.0.2659-56403530b
 1733 13:07:04.905153  	rw: helios_v2.0.2849-c41de27e7d
 1734 13:07:04.905648    running image: 1
 1735 13:07:04.909714  ACPI:    * FADT
 1736 13:07:04.910215  SCI is IRQ9
 1737 13:07:04.916875  ACPI: added table 1/32, length now 40
 1738 13:07:04.917448  ACPI:     * SSDT
 1739 13:07:04.920114  Found 1 CPU(s) with 8 core(s) each.
 1740 13:07:04.923328  Error: Could not locate 'wifi_sar' in VPD.
 1741 13:07:04.929419  Checking CBFS for default SAR values
 1742 13:07:04.932731  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1743 13:07:04.935906  CBFS @ c08000 size 3f8000
 1744 13:07:04.942258  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1745 13:07:04.945702  CBFS: Locating 'wifi_sar_defaults.hex'
 1746 13:07:04.949232  CBFS: Found @ offset 5fac0 size 77
 1747 13:07:04.952428  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1748 13:07:04.959062  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1749 13:07:04.962177  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1750 13:07:04.968862  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1751 13:07:04.972298  failed to find key in VPD: dsm_calib_r0_0
 1752 13:07:04.982267  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1753 13:07:04.985074  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1754 13:07:04.991664  failed to find key in VPD: dsm_calib_r0_1
 1755 13:07:04.998037  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1756 13:07:05.005167  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1757 13:07:05.008037  failed to find key in VPD: dsm_calib_r0_2
 1758 13:07:05.018186  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1759 13:07:05.024210  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1760 13:07:05.027682  failed to find key in VPD: dsm_calib_r0_3
 1761 13:07:05.037802  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1762 13:07:05.040952  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1763 13:07:05.047283  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1764 13:07:05.050319  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1765 13:07:05.053570  EC returned error result code 1
 1766 13:07:05.057961  EC returned error result code 1
 1767 13:07:05.061423  EC returned error result code 1
 1768 13:07:05.066978  PS2K: Bad resp from EC. Vivaldi disabled!
 1769 13:07:05.070667  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1770 13:07:05.077041  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1771 13:07:05.083777  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1772 13:07:05.087100  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1773 13:07:05.093579  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1774 13:07:05.099705  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1775 13:07:05.106440  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1776 13:07:05.109772  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1777 13:07:05.116678  ACPI: added table 2/32, length now 44
 1778 13:07:05.117300  ACPI:    * MCFG
 1779 13:07:05.119679  ACPI: added table 3/32, length now 48
 1780 13:07:05.122571  ACPI:    * TPM2
 1781 13:07:05.126141  TPM2 log created at 99a2d000
 1782 13:07:05.129491  ACPI: added table 4/32, length now 52
 1783 13:07:05.129971  ACPI:    * MADT
 1784 13:07:05.132681  SCI is IRQ9
 1785 13:07:05.135408  ACPI: added table 5/32, length now 56
 1786 13:07:05.135890  current = 99b43ac0
 1787 13:07:05.138642  ACPI:    * DMAR
 1788 13:07:05.142034  ACPI: added table 6/32, length now 60
 1789 13:07:05.145311  ACPI:    * IGD OpRegion
 1790 13:07:05.149175  GMA: Found VBT in CBFS
 1791 13:07:05.152329  GMA: Found valid VBT in CBFS
 1792 13:07:05.155410  ACPI: added table 7/32, length now 64
 1793 13:07:05.155848  ACPI:    * HPET
 1794 13:07:05.158294  ACPI: added table 8/32, length now 68
 1795 13:07:05.162018  ACPI: done.
 1796 13:07:05.164843  ACPI tables: 31744 bytes.
 1797 13:07:05.165380  smbios_write_tables: 99a2c000
 1798 13:07:05.169228  EC returned error result code 3
 1799 13:07:05.176154  Couldn't obtain OEM name from CBI
 1800 13:07:05.176705  Create SMBIOS type 17
 1801 13:07:05.178735  PCI: 00:00.0 (Intel Cannonlake)
 1802 13:07:05.181711  PCI: 00:14.3 (Intel WiFi)
 1803 13:07:05.185224  SMBIOS tables: 939 bytes.
 1804 13:07:05.188758  Writing table forward entry at 0x00000500
 1805 13:07:05.195254  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1806 13:07:05.198478  Writing coreboot table at 0x99b62000
 1807 13:07:05.205105   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1808 13:07:05.207880   1. 0000000000001000-000000000009ffff: RAM
 1809 13:07:05.214667   2. 00000000000a0000-00000000000fffff: RESERVED
 1810 13:07:05.217570   3. 0000000000100000-0000000099a2bfff: RAM
 1811 13:07:05.224367   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1812 13:07:05.228124   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1813 13:07:05.234533   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1814 13:07:05.240733   7. 000000009a000000-000000009f7fffff: RESERVED
 1815 13:07:05.244152   8. 00000000e0000000-00000000efffffff: RESERVED
 1816 13:07:05.251032   9. 00000000fc000000-00000000fc000fff: RESERVED
 1817 13:07:05.253838  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1818 13:07:05.260669  11. 00000000fed10000-00000000fed17fff: RESERVED
 1819 13:07:05.263969  12. 00000000fed80000-00000000fed83fff: RESERVED
 1820 13:07:05.266535  13. 00000000fed90000-00000000fed91fff: RESERVED
 1821 13:07:05.273413  14. 00000000feda0000-00000000feda1fff: RESERVED
 1822 13:07:05.276419  15. 0000000100000000-000000045e7fffff: RAM
 1823 13:07:05.282881  Graphics framebuffer located at 0xc0000000
 1824 13:07:05.283465  Passing 5 GPIOs to payload:
 1825 13:07:05.289614              NAME |       PORT | POLARITY |     VALUE
 1826 13:07:05.295852     write protect |  undefined |     high |       low
 1827 13:07:05.299463               lid |  undefined |     high |      high
 1828 13:07:05.306039             power |  undefined |     high |       low
 1829 13:07:05.308935             oprom |  undefined |     high |       low
 1830 13:07:05.315802          EC in RW | 0x000000cb |     high |       low
 1831 13:07:05.316348  Board ID: 4
 1832 13:07:05.322028  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1833 13:07:05.325021  CBFS @ c08000 size 3f8000
 1834 13:07:05.332085  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1835 13:07:05.335044  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
 1836 13:07:05.338817  coreboot table: 1492 bytes.
 1837 13:07:05.341594  IMD ROOT    0. 99fff000 00001000
 1838 13:07:05.344789  IMD SMALL   1. 99ffe000 00001000
 1839 13:07:05.348332  FSP MEMORY  2. 99c4e000 003b0000
 1840 13:07:05.351291  CONSOLE     3. 99c2e000 00020000
 1841 13:07:05.354974  FMAP        4. 99c2d000 0000054e
 1842 13:07:05.358158  TIME STAMP  5. 99c2c000 00000910
 1843 13:07:05.365043  VBOOT WORK  6. 99c18000 00014000
 1844 13:07:05.368212  MRC DATA    7. 99c16000 00001958
 1845 13:07:05.370850  ROMSTG STCK 8. 99c15000 00001000
 1846 13:07:05.374090  AFTER CAR   9. 99c0b000 0000a000
 1847 13:07:05.377479  RAMSTAGE   10. 99baf000 0005c000
 1848 13:07:05.380926  REFCODE    11. 99b7a000 00035000
 1849 13:07:05.384014  SMM BACKUP 12. 99b6a000 00010000
 1850 13:07:05.387123  COREBOOT   13. 99b62000 00008000
 1851 13:07:05.390647  ACPI       14. 99b3e000 00024000
 1852 13:07:05.393872  ACPI GNVS  15. 99b3d000 00001000
 1853 13:07:05.397070  RAMOOPS    16. 99a3d000 00100000
 1854 13:07:05.400484  TPM2 TCGLOG17. 99a2d000 00010000
 1855 13:07:05.403415  SMBIOS     18. 99a2c000 00000800
 1856 13:07:05.403870  IMD small region:
 1857 13:07:05.406838    IMD ROOT    0. 99ffec00 00000400
 1858 13:07:05.410014    FSP RUNTIME 1. 99ffebe0 00000004
 1859 13:07:05.416817    EC HOSTEVENT 2. 99ffebc0 00000008
 1860 13:07:05.419989    POWER STATE 3. 99ffeb80 00000040
 1861 13:07:05.423490    ROMSTAGE    4. 99ffeb60 00000004
 1862 13:07:05.426104    MEM INFO    5. 99ffe9a0 000001b9
 1863 13:07:05.429738    VPD         6. 99ffe920 0000006c
 1864 13:07:05.432952  MTRR: Physical address space:
 1865 13:07:05.439306  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1866 13:07:05.445719  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1867 13:07:05.452366  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1868 13:07:05.456129  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1869 13:07:05.462335  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1870 13:07:05.468943  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1871 13:07:05.475644  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1872 13:07:05.478963  MTRR: Fixed MSR 0x250 0x0606060606060606
 1873 13:07:05.484821  MTRR: Fixed MSR 0x258 0x0606060606060606
 1874 13:07:05.488637  MTRR: Fixed MSR 0x259 0x0000000000000000
 1875 13:07:05.492028  MTRR: Fixed MSR 0x268 0x0606060606060606
 1876 13:07:05.494729  MTRR: Fixed MSR 0x269 0x0606060606060606
 1877 13:07:05.501094  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1878 13:07:05.504192  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1879 13:07:05.507473  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1880 13:07:05.514083  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1881 13:07:05.517437  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1882 13:07:05.520665  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1883 13:07:05.523912  call enable_fixed_mtrr()
 1884 13:07:05.527451  CPU physical address size: 39 bits
 1885 13:07:05.530685  MTRR: default type WB/UC MTRR counts: 6/8.
 1886 13:07:05.537391  MTRR: WB selected as default type.
 1887 13:07:05.540049  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1888 13:07:05.547103  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1889 13:07:05.553466  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1890 13:07:05.560595  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1891 13:07:05.566539  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1892 13:07:05.572903  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1893 13:07:05.579621  MTRR: Fixed MSR 0x250 0x0606060606060606
 1894 13:07:05.582793  MTRR: Fixed MSR 0x258 0x0606060606060606
 1895 13:07:05.586437  MTRR: Fixed MSR 0x259 0x0000000000000000
 1896 13:07:05.589665  MTRR: Fixed MSR 0x268 0x0606060606060606
 1897 13:07:05.596148  MTRR: Fixed MSR 0x269 0x0606060606060606
 1898 13:07:05.599437  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1899 13:07:05.602915  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1900 13:07:05.605761  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1901 13:07:05.612301  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1902 13:07:05.615364  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1903 13:07:05.618710  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1904 13:07:05.622005  MTRR: Fixed MSR 0x250 0x0606060606060606
 1905 13:07:05.625142  call enable_fixed_mtrr()
 1906 13:07:05.628557  MTRR: Fixed MSR 0x258 0x0606060606060606
 1907 13:07:05.634907  MTRR: Fixed MSR 0x259 0x0000000000000000
 1908 13:07:05.638037  MTRR: Fixed MSR 0x268 0x0606060606060606
 1909 13:07:05.641354  MTRR: Fixed MSR 0x269 0x0606060606060606
 1910 13:07:05.644704  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1911 13:07:05.651383  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1912 13:07:05.654494  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1913 13:07:05.657785  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1914 13:07:05.661228  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1915 13:07:05.668124  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1916 13:07:05.670507  CPU physical address size: 39 bits
 1917 13:07:05.674650  call enable_fixed_mtrr()
 1918 13:07:05.677161  MTRR: Fixed MSR 0x250 0x0606060606060606
 1919 13:07:05.680856  MTRR: Fixed MSR 0x250 0x0606060606060606
 1920 13:07:05.687184  MTRR: Fixed MSR 0x258 0x0606060606060606
 1921 13:07:05.690150  MTRR: Fixed MSR 0x259 0x0000000000000000
 1922 13:07:05.693805  MTRR: Fixed MSR 0x268 0x0606060606060606
 1923 13:07:05.696869  MTRR: Fixed MSR 0x269 0x0606060606060606
 1924 13:07:05.703544  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1925 13:07:05.706864  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1926 13:07:05.710184  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1927 13:07:05.713261  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1928 13:07:05.720196  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1929 13:07:05.723200  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1930 13:07:05.726644  MTRR: Fixed MSR 0x258 0x0606060606060606
 1931 13:07:05.729772  call enable_fixed_mtrr()
 1932 13:07:05.733031  MTRR: Fixed MSR 0x259 0x0000000000000000
 1933 13:07:05.736005  MTRR: Fixed MSR 0x268 0x0606060606060606
 1934 13:07:05.742545  MTRR: Fixed MSR 0x269 0x0606060606060606
 1935 13:07:05.745654  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1936 13:07:05.748976  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1937 13:07:05.752288  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1938 13:07:05.758686  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1939 13:07:05.762656  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1940 13:07:05.765399  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1941 13:07:05.768972  CPU physical address size: 39 bits
 1942 13:07:05.772122  call enable_fixed_mtrr()
 1943 13:07:05.779045  MTRR: Fixed MSR 0x250 0x0606060606060606
 1944 13:07:05.781468  MTRR: Fixed MSR 0x250 0x0606060606060606
 1945 13:07:05.784963  MTRR: Fixed MSR 0x258 0x0606060606060606
 1946 13:07:05.788347  MTRR: Fixed MSR 0x259 0x0000000000000000
 1947 13:07:05.794888  MTRR: Fixed MSR 0x268 0x0606060606060606
 1948 13:07:05.797925  MTRR: Fixed MSR 0x269 0x0606060606060606
 1949 13:07:05.801631  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1950 13:07:05.804400  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1951 13:07:05.810988  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1952 13:07:05.814102  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1953 13:07:05.817676  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1954 13:07:05.821171  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1955 13:07:05.824349  CPU physical address size: 39 bits
 1956 13:07:05.830810  MTRR: Fixed MSR 0x258 0x0606060606060606
 1957 13:07:05.834171  MTRR: Fixed MSR 0x259 0x0000000000000000
 1958 13:07:05.837379  MTRR: Fixed MSR 0x268 0x0606060606060606
 1959 13:07:05.840630  MTRR: Fixed MSR 0x269 0x0606060606060606
 1960 13:07:05.846647  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1961 13:07:05.849902  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1962 13:07:05.853593  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1963 13:07:05.856901  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1964 13:07:05.863559  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1965 13:07:05.866951  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1966 13:07:05.869843  call enable_fixed_mtrr()
 1967 13:07:05.873254  call enable_fixed_mtrr()
 1968 13:07:05.876063  CPU physical address size: 39 bits
 1969 13:07:05.879631  CPU physical address size: 39 bits
 1970 13:07:05.880176  
 1971 13:07:05.880623  MTRR check
 1972 13:07:05.882745  Fixed MTRRs   : Enabled
 1973 13:07:05.886310  Variable MTRRs: Enabled
 1974 13:07:05.886859  
 1975 13:07:05.889697  MTRR: Fixed MSR 0x250 0x0606060606060606
 1976 13:07:05.896105  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1977 13:07:05.899486  MTRR: Fixed MSR 0x258 0x0606060606060606
 1978 13:07:05.902472  MTRR: Fixed MSR 0x259 0x0000000000000000
 1979 13:07:05.905891  MTRR: Fixed MSR 0x268 0x0606060606060606
 1980 13:07:05.912717  MTRR: Fixed MSR 0x269 0x0606060606060606
 1981 13:07:05.916176  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1982 13:07:05.919043  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1983 13:07:05.921617  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1984 13:07:05.928381  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1985 13:07:05.931834  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1986 13:07:05.935342  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1987 13:07:05.942066  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1988 13:07:05.944584  call enable_fixed_mtrr()
 1989 13:07:05.945108  CBFS @ c08000 size 3f8000
 1990 13:07:05.951061  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1991 13:07:05.954907  CPU physical address size: 39 bits
 1992 13:07:05.958108  CBFS: Locating 'fallback/payload'
 1993 13:07:05.961353  CPU physical address size: 39 bits
 1994 13:07:05.967497  CBFS: Found @ offset 1c96c0 size 3f798
 1995 13:07:05.970839  Checking segment from ROM address 0xffdd16f8
 1996 13:07:05.974471  Checking segment from ROM address 0xffdd1714
 1997 13:07:05.981312  Loading segment from ROM address 0xffdd16f8
 1998 13:07:05.981972    code (compression=0)
 1999 13:07:05.990372    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 2000 13:07:06.000526  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 2001 13:07:06.001140  it's not compressed!
 2002 13:07:06.093617  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2003 13:07:06.100607  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2004 13:07:06.103385  Loading segment from ROM address 0xffdd1714
 2005 13:07:06.106523    Entry Point 0x30000000
 2006 13:07:06.110079  Loaded segments
 2007 13:07:06.115762  Finalizing chipset.
 2008 13:07:06.119316  Finalizing SMM.
 2009 13:07:06.122007  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2010 13:07:06.125945  mp_park_aps done after 0 msecs.
 2011 13:07:06.132118  Jumping to boot code at 30000000(99b62000)
 2012 13:07:06.138660  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2013 13:07:06.139273  
 2014 13:07:06.141576  Starting depthcharge on Helios...
 2015 13:07:06.142872  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2016 13:07:06.143592  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2017 13:07:06.144174  Setting prompt string to ['hatch:']
 2018 13:07:06.144647  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2019 13:07:06.152031  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2020 13:07:06.157707  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2021 13:07:06.164689  board_setup: Info: eMMC controller not present; skipping
 2022 13:07:06.168096  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2023 13:07:06.175103  board_setup: Info: SDHCI controller not present; skipping
 2024 13:07:06.181752  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2025 13:07:06.182348  Wipe memory regions:
 2026 13:07:06.188159  	[0x00000000001000, 0x000000000a0000)
 2027 13:07:06.191151  	[0x00000000100000, 0x00000030000000)
 2028 13:07:06.255139  	[0x00000030657430, 0x00000099a2c000)
 2029 13:07:06.395376  	[0x00000100000000, 0x0000045e800000)
 2030 13:07:07.768514  R8152: Initializing
 2031 13:07:07.771866  Version 9 (ocp_data = 6010)
 2032 13:07:07.775840  R8152: Done initializing
 2033 13:07:07.779183  Adding net device
 2034 13:07:08.270660  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2035 13:07:08.271236  
 2036 13:07:08.272038  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2038 13:07:08.373824  hatch: tftpboot 192.168.201.1 7148220/tftp-deploy-mwxxguor/kernel/bzImage 7148220/tftp-deploy-mwxxguor/kernel/cmdline 7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
 2039 13:07:08.374501  Setting prompt string to 'Starting kernel'
 2040 13:07:08.374939  Setting prompt string to ['Starting kernel']
 2041 13:07:08.375485  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2042 13:07:08.375999  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 2043 13:07:08.379709  tftpboot 192.168.201.1 7148220/tftp-deploy-mwxxguor/kernel/bzImoy-mwxxguor/kernel/cmdline 7148220/tftp-deploy-mwxxguor/ramdisk/ramdisk.cpio.gz
 2044 13:07:08.380208  Waiting for link
 2045 13:07:08.580892  done.
 2046 13:07:08.581621  MAC: f4:f5:e8:50:e7:f3
 2047 13:07:08.583519  Sending DHCP discover... done.
 2048 13:07:08.587088  Waiting for reply... done.
 2049 13:07:08.590437  Sending DHCP request... done.
 2050 13:07:08.593253  Waiting for reply... done.
 2051 13:07:08.597044  My ip is 192.168.201.16
 2052 13:07:08.599817  The DHCP server ip is 192.168.201.1
 2053 13:07:08.603012  TFTP server IP predefined by user: 192.168.201.1
 2054 13:07:08.609689  Bootfile predefined by user: 7148220/tftp-deploy-mwxxguor/kernel/bzImage
 2055 13:07:08.616229  Sending tftp read request... done.
 2056 13:07:08.620928  Waiting for the transfer... 
 2057 13:07:08.912330  00000000 ################################################################
 2058 13:07:09.205004  00080000 ################################################################
 2059 13:07:09.502766  00100000 ################################################################
 2060 13:07:09.780572  00180000 ################################################################
 2061 13:07:10.066020  00200000 ################################################################
 2062 13:07:10.388489  00280000 ################################################################
 2063 13:07:10.701209  00300000 ################################################################
 2064 13:07:10.982284  00380000 ################################################################
 2065 13:07:11.263015  00400000 ################################################################
 2066 13:07:11.570331  00480000 ################################################################
 2067 13:07:11.892296  00500000 ################################################################
 2068 13:07:12.210729  00580000 ################################################################
 2069 13:07:12.490294  00600000 ################################################################
 2070 13:07:12.769360  00680000 ################################################################
 2071 13:07:13.049944  00700000 ################################################################
 2072 13:07:13.367202  00780000 ################################################################
 2073 13:07:13.687349  00800000 ################################################################
 2074 13:07:13.713166  00880000 ###### done.
 2075 13:07:13.716601  The bootfile was 8953856 bytes long.
 2076 13:07:13.719921  Sending tftp read request... done.
 2077 13:07:13.723383  Waiting for the transfer... 
 2078 13:07:14.007073  00000000 ################################################################
 2079 13:07:14.296967  00080000 ################################################################
 2080 13:07:14.587711  00100000 ################################################################
 2081 13:07:14.870350  00180000 ################################################################
 2082 13:07:15.163204  00200000 ################################################################
 2083 13:07:15.436600  00280000 ################################################################
 2084 13:07:15.695477  00300000 ################################################################
 2085 13:07:15.987902  00380000 ################################################################
 2086 13:07:16.280916  00400000 ################################################################
 2087 13:07:16.575735  00480000 ################################################################
 2088 13:07:16.724706  00500000 ################################ done.
 2089 13:07:16.727351  Sending tftp read request... done.
 2090 13:07:16.730716  Waiting for the transfer... 
 2091 13:07:16.730817  00000000 # done.
 2092 13:07:16.740695  Command line loaded dynamically from TFTP file: 7148220/tftp-deploy-mwxxguor/kernel/cmdline
 2093 13:07:16.763448  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7148220/extract-nfsrootfs-2y1rv_fc,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2094 13:07:16.769785  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2095 13:07:16.777908  Shutting down all USB controllers.
 2096 13:07:16.778344  Removing current net device
 2097 13:07:16.781714  Finalizing coreboot
 2098 13:07:16.788648  Exiting depthcharge with code 4 at timestamp: 17945263
 2099 13:07:16.789293  
 2100 13:07:16.789691  Starting kernel ...
 2101 13:07:16.790056  
 2102 13:07:16.790409  
 2103 13:07:16.791293  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 2104 13:07:16.791848  start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
 2105 13:07:16.792271  Setting prompt string to ['Linux version [0-9]']
 2106 13:07:16.792666  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2107 13:07:16.793102  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2109 13:11:46.792766  end: 2.2.5 auto-login-action (duration 00:04:30) [common]
 2111 13:11:46.793945  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
 2113 13:11:46.794837  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2116 13:11:46.796299  end: 2 depthcharge-action (duration 00:05:00) [common]
 2118 13:11:46.797458  Cleaning after the job
 2119 13:11:46.797974  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/ramdisk
 2120 13:11:46.800261  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/kernel
 2121 13:11:46.803719  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/nfsrootfs
 2122 13:11:46.874586  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148220/tftp-deploy-mwxxguor/modules
 2123 13:11:46.874895  start: 4.1 power-off (timeout 00:00:30) [common]
 2124 13:11:46.875067  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
 2125 13:11:46.894475  >> Command sent successfully.

 2126 13:11:46.896369  Returned 0 in 0 seconds
 2127 13:11:46.997513  end: 4.1 power-off (duration 00:00:00) [common]
 2129 13:11:46.999148  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2130 13:11:47.000367  Listened to connection for namespace 'common' for up to 1s
 2131 13:11:48.004904  Finalising connection for namespace 'common'
 2132 13:11:48.005226  Disconnecting from shell: Finalise
 2133 13:11:48.106068  end: 4.2 read-feedback (duration 00:00:01) [common]
 2134 13:11:48.106232  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148220
 2135 13:11:48.278544  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148220
 2136 13:11:48.278785  JobError: Your job cannot terminate cleanly.