Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Errors: 2
1 12:59:03.287073 lava-dispatcher, installed at version: 2022.06
2 12:59:03.287283 start: 0 validate
3 12:59:03.287429 Start time: 2022-08-31 12:59:03.287422+00:00 (UTC)
4 12:59:03.287583 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:59:03.287723 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 12:59:03.582285 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:59:03.582470 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:59:03.870424 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:59:03.870606 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:59:04.159737 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:59:04.159914 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.256-cip80%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:59:04.452363 validate duration: 1.16
14 12:59:04.452672 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:59:04.452799 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:59:04.452899 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:59:04.453008 Not decompressing ramdisk as can be used compressed.
18 12:59:04.453116 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 12:59:04.453193 saving as /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/ramdisk/initrd.cpio.gz
20 12:59:04.453266 total size: 5411075 (5MB)
21 12:59:04.454499 progress 0% (0MB)
22 12:59:04.456112 progress 5% (0MB)
23 12:59:04.457681 progress 10% (0MB)
24 12:59:04.459209 progress 15% (0MB)
25 12:59:04.460916 progress 20% (1MB)
26 12:59:04.462402 progress 25% (1MB)
27 12:59:04.463924 progress 30% (1MB)
28 12:59:04.465495 progress 35% (1MB)
29 12:59:04.467167 progress 40% (2MB)
30 12:59:04.468681 progress 45% (2MB)
31 12:59:04.470148 progress 50% (2MB)
32 12:59:04.471613 progress 55% (2MB)
33 12:59:04.473290 progress 60% (3MB)
34 12:59:04.474760 progress 65% (3MB)
35 12:59:04.476233 progress 70% (3MB)
36 12:59:04.477736 progress 75% (3MB)
37 12:59:04.479380 progress 80% (4MB)
38 12:59:04.480839 progress 85% (4MB)
39 12:59:04.482296 progress 90% (4MB)
40 12:59:04.483747 progress 95% (4MB)
41 12:59:04.485386 progress 100% (5MB)
42 12:59:04.485575 5MB downloaded in 0.03s (159.75MB/s)
43 12:59:04.485738 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:59:04.486017 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:59:04.486116 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:59:04.486211 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:59:04.486324 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:59:04.486403 saving as /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/kernel/bzImage
50 12:59:04.486474 total size: 8953856 (8MB)
51 12:59:04.486541 No compression specified
52 12:59:07.489071 progress 0% (0MB)
53 12:59:07.491642 progress 5% (0MB)
54 12:59:07.494175 progress 10% (0MB)
55 12:59:07.496566 progress 15% (1MB)
56 12:59:07.499097 progress 20% (1MB)
57 12:59:07.501620 progress 25% (2MB)
58 12:59:07.503994 progress 30% (2MB)
59 12:59:07.506498 progress 35% (3MB)
60 12:59:07.509003 progress 40% (3MB)
61 12:59:07.511398 progress 45% (3MB)
62 12:59:07.513944 progress 50% (4MB)
63 12:59:07.516421 progress 55% (4MB)
64 12:59:07.518799 progress 60% (5MB)
65 12:59:07.521279 progress 65% (5MB)
66 12:59:07.523732 progress 70% (6MB)
67 12:59:07.526048 progress 75% (6MB)
68 12:59:07.528560 progress 80% (6MB)
69 12:59:07.531085 progress 85% (7MB)
70 12:59:07.533414 progress 90% (7MB)
71 12:59:07.535916 progress 95% (8MB)
72 12:59:07.538419 progress 100% (8MB)
73 12:59:07.538625 8MB downloaded in 3.05s (2.80MB/s)
74 12:59:07.538795 end: 1.2.1 http-download (duration 00:00:03) [common]
76 12:59:07.539094 end: 1.2 download-retry (duration 00:00:03) [common]
77 12:59:07.539204 start: 1.3 download-retry (timeout 00:09:57) [common]
78 12:59:07.539306 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 12:59:07.539423 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 12:59:07.539497 saving as /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/nfsrootfs/full.rootfs.tar
81 12:59:07.539569 total size: 122682368 (116MB)
82 12:59:07.539638 Using unxz to decompress xz
83 12:59:07.543063 progress 0% (0MB)
84 12:59:08.041026 progress 5% (5MB)
85 12:59:08.555112 progress 10% (11MB)
86 12:59:09.073288 progress 15% (17MB)
87 12:59:09.605512 progress 20% (23MB)
88 12:59:09.976471 progress 25% (29MB)
89 12:59:10.371011 progress 30% (35MB)
90 12:59:10.638978 progress 35% (40MB)
91 12:59:10.885235 progress 40% (46MB)
92 12:59:11.291566 progress 45% (52MB)
93 12:59:11.707209 progress 50% (58MB)
94 12:59:12.099916 progress 55% (64MB)
95 12:59:12.506057 progress 60% (70MB)
96 12:59:12.890861 progress 65% (76MB)
97 12:59:13.330521 progress 70% (81MB)
98 12:59:13.807489 progress 75% (87MB)
99 12:59:14.287847 progress 80% (93MB)
100 12:59:14.414631 progress 85% (99MB)
101 12:59:14.605994 progress 90% (105MB)
102 12:59:14.982964 progress 95% (111MB)
103 12:59:15.401596 progress 100% (116MB)
104 12:59:15.408986 116MB downloaded in 7.87s (14.87MB/s)
105 12:59:15.409290 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:59:15.409643 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:59:15.409770 start: 1.4 download-retry (timeout 00:09:49) [common]
109 12:59:15.409871 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 12:59:15.410017 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.256-cip80/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:59:15.410133 saving as /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/modules/modules.tar
112 12:59:15.410207 total size: 64656 (0MB)
113 12:59:15.410286 Using unxz to decompress xz
114 12:59:15.696855 progress 50% (0MB)
115 12:59:15.697334 progress 100% (0MB)
116 12:59:15.702242 0MB downloaded in 0.29s (0.21MB/s)
117 12:59:15.702492 end: 1.4.1 http-download (duration 00:00:00) [common]
119 12:59:15.702796 end: 1.4 download-retry (duration 00:00:00) [common]
120 12:59:15.702904 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 12:59:15.703032 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 12:59:17.534064 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7148204/extract-nfsrootfs-79znunj9
123 12:59:17.534280 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 12:59:17.534394 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
125 12:59:17.534549 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw
126 12:59:17.534663 makedir: /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin
127 12:59:17.534761 makedir: /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/tests
128 12:59:17.534855 makedir: /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/results
129 12:59:17.534966 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-add-keys
130 12:59:17.535120 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-add-sources
131 12:59:17.535253 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-background-process-start
132 12:59:17.535382 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-background-process-stop
133 12:59:17.535511 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-common-functions
134 12:59:17.535647 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-echo-ipv4
135 12:59:17.535772 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-install-packages
136 12:59:17.535902 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-installed-packages
137 12:59:17.536027 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-os-build
138 12:59:17.536148 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-probe-channel
139 12:59:17.536273 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-probe-ip
140 12:59:17.536396 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-target-ip
141 12:59:17.536520 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-target-mac
142 12:59:17.536640 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-target-storage
143 12:59:17.536765 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-case
144 12:59:17.536895 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-event
145 12:59:17.537019 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-feedback
146 12:59:17.537152 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-raise
147 12:59:17.537282 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-reference
148 12:59:17.537403 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-runner
149 12:59:17.537528 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-set
150 12:59:17.537660 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-test-shell
151 12:59:17.537786 Updating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-install-packages (oe)
152 12:59:17.537922 Updating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/bin/lava-installed-packages (oe)
153 12:59:17.538031 Creating /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/environment
154 12:59:17.538130 LAVA metadata
155 12:59:17.538204 - LAVA_JOB_ID=7148204
156 12:59:17.538277 - LAVA_DISPATCHER_IP=192.168.201.1
157 12:59:17.538386 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
158 12:59:17.538462 skipped lava-vland-overlay
159 12:59:17.538549 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 12:59:17.538642 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
161 12:59:17.538712 skipped lava-multinode-overlay
162 12:59:17.538795 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 12:59:17.538888 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
164 12:59:17.538966 Loading test definitions
165 12:59:17.539069 start: 1.5.2.3.1 git-repo-action (timeout 00:09:47) [common]
166 12:59:17.539151 Using /lava-7148204 at stage 0
167 12:59:17.539261 Fetching tests from https://github.com/kernelci/test-definitions
168 12:59:17.539350 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/0/tests/0_ltp-ipc'
169 12:59:26.613096 Running '/usr/bin/git checkout kernelci.org
170 12:59:26.761157 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 12:59:26.761988 uuid=7148204_1.5.2.3.1 testdef=None
172 12:59:26.762189 end: 1.5.2.3.1 git-repo-action (duration 00:00:09) [common]
174 12:59:26.762496 start: 1.5.2.3.2 test-overlay (timeout 00:09:38) [common]
175 12:59:26.763390 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 12:59:26.763676 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:38) [common]
178 12:59:26.764816 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 12:59:26.765134 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:38) [common]
181 12:59:26.766202 runner path: /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/0/tests/0_ltp-ipc test_uuid 7148204_1.5.2.3.1
182 12:59:26.766309 SKIPFILE='skipfile-lkft.yaml'
183 12:59:26.766403 SKIP_INSTALL='true'
184 12:59:26.766475 TST_CMDFILES='ipc'
185 12:59:26.766630 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 12:59:26.766888 Creating lava-test-runner.conf files
188 12:59:26.766962 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7148204/lava-overlay-_iijppgw/lava-7148204/0 for stage 0
189 12:59:26.767061 - 0_ltp-ipc
190 12:59:26.767179 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
191 12:59:26.767280 start: 1.5.2.4 compress-overlay (timeout 00:09:38) [common]
192 12:59:34.809614 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 12:59:34.809818 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
194 12:59:34.809961 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 12:59:34.810080 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
196 12:59:34.810183 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
197 12:59:34.926100 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 12:59:34.926491 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
199 12:59:34.926620 extracting modules file /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148204/extract-nfsrootfs-79znunj9
200 12:59:34.931272 extracting modules file /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7148204/extract-overlay-ramdisk-pu4zx0cc/ramdisk
201 12:59:34.935450 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 12:59:34.935583 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
203 12:59:34.935681 [common] Applying overlay to NFS
204 12:59:34.935761 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7148204/compress-overlay-0a7kp26a/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7148204/extract-nfsrootfs-79znunj9
205 12:59:35.431569 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 12:59:35.431755 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
207 12:59:35.431861 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 12:59:35.431967 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
209 12:59:35.432061 Building ramdisk /var/lib/lava/dispatcher/tmp/7148204/extract-overlay-ramdisk-pu4zx0cc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7148204/extract-overlay-ramdisk-pu4zx0cc/ramdisk
210 12:59:35.468595 >> 24662 blocks
211 12:59:36.004955 rename /var/lib/lava/dispatcher/tmp/7148204/extract-overlay-ramdisk-pu4zx0cc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
212 12:59:36.005425 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 12:59:36.005576 start: 1.5.8 prepare-kernel (timeout 00:09:28) [common]
214 12:59:36.005703 start: 1.5.8.1 prepare-fit (timeout 00:09:28) [common]
215 12:59:36.005818 No mkimage arch provided, not using FIT.
216 12:59:36.005934 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 12:59:36.006033 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 12:59:36.006166 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
219 12:59:36.006298 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
220 12:59:36.006393 No LXC device requested
221 12:59:36.006494 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 12:59:36.006629 start: 1.7 deploy-device-env (timeout 00:09:28) [common]
223 12:59:36.006745 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 12:59:36.006825 Checking files for TFTP limit of 4294967296 bytes.
225 12:59:36.007303 end: 1 tftp-deploy (duration 00:00:32) [common]
226 12:59:36.007422 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 12:59:36.007532 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 12:59:36.007688 substitutions:
229 12:59:36.007771 - {DTB}: None
230 12:59:36.007861 - {INITRD}: 7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
231 12:59:36.007935 - {KERNEL}: 7148204/tftp-deploy-3pvs8l_u/kernel/bzImage
232 12:59:36.008005 - {LAVA_MAC}: None
233 12:59:36.008087 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7148204/extract-nfsrootfs-79znunj9
234 12:59:36.008155 - {NFS_SERVER_IP}: 192.168.201.1
235 12:59:36.008233 - {PRESEED_CONFIG}: None
236 12:59:36.008306 - {PRESEED_LOCAL}: None
237 12:59:36.008370 - {RAMDISK}: 7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
238 12:59:36.008458 - {ROOT_PART}: None
239 12:59:36.008525 - {ROOT}: None
240 12:59:36.008593 - {SERVER_IP}: 192.168.201.1
241 12:59:36.008674 - {TEE}: None
242 12:59:36.008739 Parsed boot commands:
243 12:59:36.008820 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 12:59:36.008999 Parsed boot commands: tftpboot 192.168.201.1 7148204/tftp-deploy-3pvs8l_u/kernel/bzImage 7148204/tftp-deploy-3pvs8l_u/kernel/cmdline 7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
245 12:59:36.009120 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 12:59:36.009244 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 12:59:36.009359 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 12:59:36.009478 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 12:59:36.009569 Not connected, no need to disconnect.
250 12:59:36.009674 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 12:59:36.009784 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 12:59:36.009868 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
253 12:59:36.012874 Setting prompt string to ['lava-test: # ']
254 12:59:36.013203 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 12:59:36.013318 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 12:59:36.013428 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 12:59:36.013531 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 12:59:36.013742 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
259 12:59:36.034354 >> Command sent successfully.
260 12:59:36.036348 Returned 0 in 0 seconds
261 12:59:36.137127 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 12:59:36.137495 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 12:59:36.137613 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 12:59:36.137722 Setting prompt string to 'Starting depthcharge on Voema...'
266 12:59:36.137801 Changing prompt to 'Starting depthcharge on Voema...'
267 12:59:36.137884 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 12:59:36.138179 [Enter `^Ec?' for help]
269 12:59:43.866894
270 12:59:43.867103
271 12:59:43.876897 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 12:59:43.880710 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 12:59:43.887001 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 12:59:43.890712 CPU: AES supported, TXT NOT supported, VT supported
275 12:59:43.896926 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 12:59:43.904198 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 12:59:43.907189 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 12:59:43.910387 VBOOT: Loading verstage.
279 12:59:43.913986 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
280 12:59:43.920785 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 12:59:43.923889 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 12:59:43.934030 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 12:59:43.940883 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 12:59:43.941238
285 12:59:43.941497
286 12:59:43.953698 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 12:59:43.967632 Probing TPM: . done!
288 12:59:43.970864 TPM ready after 0 ms
289 12:59:43.974533 Connected to device vid:did:rid of 1ae0:0028:00
290 12:59:43.985801 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 12:59:43.992038 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 12:59:43.995890 Initialized TPM device CR50 revision 0
293 12:59:44.047116 tlcl_send_startup: Startup return code is 0
294 12:59:44.047263 TPM: setup succeeded
295 12:59:44.063031 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 12:59:44.076581 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 12:59:44.089758 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 12:59:44.099258 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 12:59:44.102994 Chrome EC: UHEPI supported
300 12:59:44.106285 Phase 1
301 12:59:44.109441 FMAP: area GBB found @ 1805000 (458752 bytes)
302 12:59:44.119410 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 12:59:44.126306 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 12:59:44.133084 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 12:59:44.139971 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 12:59:44.143114 Recovery requested (1009000e)
307 12:59:44.146250 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 12:59:44.157719 tlcl_extend: response is 0
309 12:59:44.164089 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 12:59:44.174104 tlcl_extend: response is 0
311 12:59:44.181013 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 12:59:44.187389 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 12:59:44.194005 BS: verstage times (exec / console): total (unknown) / 142 ms
314 12:59:44.194112
315 12:59:44.194189
316 12:59:44.207593 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 12:59:44.213899 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 12:59:44.216938 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 12:59:44.220804 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 12:59:44.227503 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 12:59:44.230557 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 12:59:44.233822 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 12:59:44.236938 TCO_STS: 0000 0000
324 12:59:44.240589 GEN_PMCON: d0015038 00002200
325 12:59:44.243712 GBLRST_CAUSE: 00000000 00000000
326 12:59:44.243808 HPR_CAUSE0: 00000000
327 12:59:44.246886 prev_sleep_state 5
328 12:59:44.250696 Boot Count incremented to 9356
329 12:59:44.257167 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 12:59:44.263878 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 12:59:44.270196 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 12:59:44.276982 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 12:59:44.281439 Chrome EC: UHEPI supported
334 12:59:44.288382 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 12:59:44.300948 Probing TPM: done!
336 12:59:44.308009 Connected to device vid:did:rid of 1ae0:0028:00
337 12:59:44.318932 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 12:59:44.326260 Initialized TPM device CR50 revision 0
339 12:59:44.336437 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 12:59:44.342822 MRC: Hash idx 0x100b comparison successful.
341 12:59:44.346607 MRC cache found, size faa8
342 12:59:44.346696 bootmode is set to: 2
343 12:59:44.349688 SPD index = 0
344 12:59:44.356039 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 12:59:44.359359 SPD: module type is LPDDR4X
346 12:59:44.363216 SPD: module part number is MT53E512M64D4NW-046
347 12:59:44.369423 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 12:59:44.376349 SPD: device width 16 bits, bus width 16 bits
349 12:59:44.379320 SPD: module size is 1024 MB (per channel)
350 12:59:44.812220 CBMEM:
351 12:59:44.815699 IMD: root @ 0x76fff000 254 entries.
352 12:59:44.819036 IMD: root @ 0x76ffec00 62 entries.
353 12:59:44.821773 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 12:59:44.828619 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 12:59:44.832029 External stage cache:
356 12:59:44.835125 IMD: root @ 0x7b3ff000 254 entries.
357 12:59:44.838156 IMD: root @ 0x7b3fec00 62 entries.
358 12:59:44.853995 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 12:59:44.860393 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 12:59:44.866922 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 12:59:44.880948 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 12:59:44.884611 cse_lite: Skip switching to RW in the recovery path
363 12:59:44.887960 8 DIMMs found
364 12:59:44.888059 SMM Memory Map
365 12:59:44.891585 SMRAM : 0x7b000000 0x800000
366 12:59:44.894749 Subregion 0: 0x7b000000 0x200000
367 12:59:44.897966 Subregion 1: 0x7b200000 0x200000
368 12:59:44.901587 Subregion 2: 0x7b400000 0x400000
369 12:59:44.904891 top_of_ram = 0x77000000
370 12:59:44.911649 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 12:59:44.915011 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 12:59:44.921459 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 12:59:44.924596 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 12:59:44.935022 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 12:59:44.941517 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 12:59:44.951568 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 12:59:44.954691 Processing 211 relocs. Offset value of 0x74c0b000
378 12:59:44.963790 BS: romstage times (exec / console): total (unknown) / 277 ms
379 12:59:44.970069
380 12:59:44.970166
381 12:59:44.979429 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 12:59:44.982792 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 12:59:44.992887 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 12:59:44.999786 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 12:59:45.005902 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 12:59:45.012947 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 12:59:45.059400 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 12:59:45.066324 Processing 5008 relocs. Offset value of 0x75d98000
389 12:59:45.069465 BS: postcar times (exec / console): total (unknown) / 59 ms
390 12:59:45.073094
391 12:59:45.073191
392 12:59:45.083367 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 12:59:45.083468 Normal boot
394 12:59:45.087059 FW_CONFIG value is 0x804c02
395 12:59:45.090242 PCI: 00:07.0 disabled by fw_config
396 12:59:45.093305 PCI: 00:07.1 disabled by fw_config
397 12:59:45.097072 PCI: 00:0d.2 disabled by fw_config
398 12:59:45.100191 PCI: 00:1c.7 disabled by fw_config
399 12:59:45.106956 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 12:59:45.113365 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 12:59:45.116551 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 12:59:45.120324 GENERIC: 0.0 disabled by fw_config
403 12:59:45.123596 GENERIC: 1.0 disabled by fw_config
404 12:59:45.130109 fw_config match found: DB_USB=USB3_ACTIVE
405 12:59:45.133228 fw_config match found: DB_USB=USB3_ACTIVE
406 12:59:45.136333 fw_config match found: DB_USB=USB3_ACTIVE
407 12:59:45.140009 fw_config match found: DB_USB=USB3_ACTIVE
408 12:59:45.146749 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 12:59:45.152980 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 12:59:45.159908 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 12:59:45.170165 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 12:59:45.173151 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 12:59:45.179630 microcode: Update skipped, already up-to-date
414 12:59:45.186115 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 12:59:45.213081 Detected 4 core, 8 thread CPU.
416 12:59:45.216818 Setting up SMI for CPU
417 12:59:45.219938 IED base = 0x7b400000
418 12:59:45.220032 IED size = 0x00400000
419 12:59:45.223141 Will perform SMM setup.
420 12:59:45.230040 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 12:59:45.236397 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 12:59:45.243177 Processing 16 relocs. Offset value of 0x00030000
423 12:59:45.246121 Attempting to start 7 APs
424 12:59:45.249825 Waiting for 10ms after sending INIT.
425 12:59:45.265385 Waiting for 1st SIPI to complete...done.
426 12:59:45.265481 AP: slot 1 apic_id 1.
427 12:59:45.268464 AP: slot 5 apic_id 4.
428 12:59:45.271632 AP: slot 4 apic_id 5.
429 12:59:45.274928 Waiting for 2nd SIPI to complete...done.
430 12:59:45.278639 AP: slot 7 apic_id 6.
431 12:59:45.278733 AP: slot 3 apic_id 7.
432 12:59:45.281647 AP: slot 2 apic_id 3.
433 12:59:45.284943 AP: slot 6 apic_id 2.
434 12:59:45.291771 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 12:59:45.298654 Processing 13 relocs. Offset value of 0x00038000
436 12:59:45.298748 Unable to locate Global NVS
437 12:59:45.308604 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 12:59:45.311663 Installing permanent SMM handler to 0x7b000000
439 12:59:45.321827 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 12:59:45.325054 Processing 794 relocs. Offset value of 0x7b010000
441 12:59:45.335418 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 12:59:45.338461 Processing 13 relocs. Offset value of 0x7b008000
443 12:59:45.345344 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 12:59:45.351375 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 12:59:45.355021 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 12:59:45.361391 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 12:59:45.368192 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 12:59:45.375047 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 12:59:45.381322 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 12:59:45.381416 Unable to locate Global NVS
451 12:59:45.391403 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 12:59:45.394557 Clearing SMI status registers
453 12:59:45.394650 SMI_STS: PM1
454 12:59:45.398412 PM1_STS: PWRBTN
455 12:59:45.404690 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 12:59:45.407813 In relocation handler: CPU 0
457 12:59:45.411491 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 12:59:45.417803 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 12:59:45.417897 Relocation complete.
460 12:59:45.428017 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 12:59:45.428116 In relocation handler: CPU 1
462 12:59:45.434485 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 12:59:45.434577 Relocation complete.
464 12:59:45.441319 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 12:59:45.444432 In relocation handler: CPU 3
466 12:59:45.451297 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 12:59:45.451388 Relocation complete.
468 12:59:45.457923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
469 12:59:45.461131 In relocation handler: CPU 7
470 12:59:45.467790 New SMBASE=0x7affe400 IEDBASE=0x7b400000
471 12:59:45.470894 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:59:45.474636 Relocation complete.
473 12:59:45.481324 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
474 12:59:45.484460 In relocation handler: CPU 6
475 12:59:45.487729 New SMBASE=0x7affe800 IEDBASE=0x7b400000
476 12:59:45.491012 Writing SMRR. base = 0x7b000006, mask=0xff800c00
477 12:59:45.494709 Relocation complete.
478 12:59:45.501498 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 12:59:45.504571 In relocation handler: CPU 2
480 12:59:45.507757 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 12:59:45.511473 Relocation complete.
482 12:59:45.517804 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
483 12:59:45.520937 In relocation handler: CPU 5
484 12:59:45.524654 New SMBASE=0x7affec00 IEDBASE=0x7b400000
485 12:59:45.530999 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 12:59:45.531095 Relocation complete.
487 12:59:45.541197 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
488 12:59:45.544549 In relocation handler: CPU 4
489 12:59:45.548246 New SMBASE=0x7afff000 IEDBASE=0x7b400000
490 12:59:45.548342 Relocation complete.
491 12:59:45.551872 Initializing CPU #0
492 12:59:45.555596 CPU: vendor Intel device 806c1
493 12:59:45.559294 CPU: family 06, model 8c, stepping 01
494 12:59:45.562447 Clearing out pending MCEs
495 12:59:45.562542 Setting up local APIC...
496 12:59:45.566203 apic_id: 0x00 done.
497 12:59:45.569300 Turbo is available but hidden
498 12:59:45.572434 Turbo is available and visible
499 12:59:45.576297 microcode: Update skipped, already up-to-date
500 12:59:45.579401 CPU #0 initialized
501 12:59:45.582549 Initializing CPU #6
502 12:59:45.582648 Initializing CPU #2
503 12:59:45.585719 CPU: vendor Intel device 806c1
504 12:59:45.589443 CPU: family 06, model 8c, stepping 01
505 12:59:45.592644 CPU: vendor Intel device 806c1
506 12:59:45.595814 CPU: family 06, model 8c, stepping 01
507 12:59:45.599015 Clearing out pending MCEs
508 12:59:45.602769 Clearing out pending MCEs
509 12:59:45.606005 Setting up local APIC...
510 12:59:45.606101 Initializing CPU #5
511 12:59:45.609012 Initializing CPU #4
512 12:59:45.612124 apic_id: 0x02 done.
513 12:59:45.612219 Setting up local APIC...
514 12:59:45.615890 CPU: vendor Intel device 806c1
515 12:59:45.619012 CPU: family 06, model 8c, stepping 01
516 12:59:45.622219 CPU: vendor Intel device 806c1
517 12:59:45.629135 CPU: family 06, model 8c, stepping 01
518 12:59:45.629232 Clearing out pending MCEs
519 12:59:45.632222 Clearing out pending MCEs
520 12:59:45.635455 Setting up local APIC...
521 12:59:45.639334 microcode: Update skipped, already up-to-date
522 12:59:45.642621 apic_id: 0x03 done.
523 12:59:45.642716 CPU #6 initialized
524 12:59:45.648777 microcode: Update skipped, already up-to-date
525 12:59:45.648873 apic_id: 0x05 done.
526 12:59:45.652433 Setting up local APIC...
527 12:59:45.655633 CPU #2 initialized
528 12:59:45.658852 microcode: Update skipped, already up-to-date
529 12:59:45.662411 apic_id: 0x04 done.
530 12:59:45.662506 CPU #4 initialized
531 12:59:45.669020 microcode: Update skipped, already up-to-date
532 12:59:45.669121 Initializing CPU #7
533 12:59:45.672301 Initializing CPU #3
534 12:59:45.675314 CPU: vendor Intel device 806c1
535 12:59:45.679145 CPU: family 06, model 8c, stepping 01
536 12:59:45.682107 CPU: vendor Intel device 806c1
537 12:59:45.685268 CPU: family 06, model 8c, stepping 01
538 12:59:45.689159 Clearing out pending MCEs
539 12:59:45.692283 Initializing CPU #1
540 12:59:45.692378 CPU #5 initialized
541 12:59:45.695496 CPU: vendor Intel device 806c1
542 12:59:45.698497 CPU: family 06, model 8c, stepping 01
543 12:59:45.702338 Clearing out pending MCEs
544 12:59:45.705414 Setting up local APIC...
545 12:59:45.708659 Clearing out pending MCEs
546 12:59:45.708754 Setting up local APIC...
547 12:59:45.711796 Setting up local APIC...
548 12:59:45.715599 apic_id: 0x06 done.
549 12:59:45.718665 apic_id: 0x07 done.
550 12:59:45.722081 microcode: Update skipped, already up-to-date
551 12:59:45.725173 microcode: Update skipped, already up-to-date
552 12:59:45.728804 CPU #7 initialized
553 12:59:45.728900 CPU #3 initialized
554 12:59:45.731941 apic_id: 0x01 done.
555 12:59:45.735133 microcode: Update skipped, already up-to-date
556 12:59:45.738961 CPU #1 initialized
557 12:59:45.742287 bsp_do_flight_plan done after 464 msecs.
558 12:59:45.745359 CPU: frequency set to 4000 MHz
559 12:59:45.748679 Enabling SMIs.
560 12:59:45.755224 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
561 12:59:45.770238 SATAXPCIE1 indicates PCIe NVMe is present
562 12:59:45.773580 Probing TPM: done!
563 12:59:45.777053 Connected to device vid:did:rid of 1ae0:0028:00
564 12:59:45.787883 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
565 12:59:45.791202 Initialized TPM device CR50 revision 0
566 12:59:45.794322 Enabling S0i3.4
567 12:59:45.800718 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 12:59:45.804613 Found a VBT of 8704 bytes after decompression
569 12:59:45.810735 cse_lite: CSE RO boot. HybridStorageMode disabled
570 12:59:45.817569 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 12:59:45.892778 FSPS returned 0
572 12:59:45.896014 Executing Phase 1 of FspMultiPhaseSiInit
573 12:59:45.906192 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 12:59:45.909326 port C0 DISC req: usage 1 usb3 1 usb2 5
575 12:59:45.913049 Raw Buffer output 0 00000511
576 12:59:45.916226 Raw Buffer output 1 00000000
577 12:59:45.919881 pmc_send_ipc_cmd succeeded
578 12:59:45.926301 port C1 DISC req: usage 1 usb3 2 usb2 3
579 12:59:45.926406 Raw Buffer output 0 00000321
580 12:59:45.929591 Raw Buffer output 1 00000000
581 12:59:45.934023 pmc_send_ipc_cmd succeeded
582 12:59:45.939165 Detected 4 core, 8 thread CPU.
583 12:59:45.942554 Detected 4 core, 8 thread CPU.
584 12:59:46.176500 Display FSP Version Info HOB
585 12:59:46.179479 Reference Code - CPU = a.0.4c.31
586 12:59:46.183103 uCode Version = 0.0.0.86
587 12:59:46.186322 TXT ACM version = ff.ff.ff.ffff
588 12:59:46.189395 Reference Code - ME = a.0.4c.31
589 12:59:46.193367 MEBx version = 0.0.0.0
590 12:59:46.196418 ME Firmware Version = Consumer SKU
591 12:59:46.199576 Reference Code - PCH = a.0.4c.31
592 12:59:46.203386 PCH-CRID Status = Disabled
593 12:59:46.206425 PCH-CRID Original Value = ff.ff.ff.ffff
594 12:59:46.209680 PCH-CRID New Value = ff.ff.ff.ffff
595 12:59:46.212858 OPROM - RST - RAID = ff.ff.ff.ffff
596 12:59:46.216600 PCH Hsio Version = 4.0.0.0
597 12:59:46.219526 Reference Code - SA - System Agent = a.0.4c.31
598 12:59:46.222747 Reference Code - MRC = 2.0.0.1
599 12:59:46.226489 SA - PCIe Version = a.0.4c.31
600 12:59:46.229557 SA-CRID Status = Disabled
601 12:59:46.232595 SA-CRID Original Value = 0.0.0.1
602 12:59:46.236452 SA-CRID New Value = 0.0.0.1
603 12:59:46.239495 OPROM - VBIOS = ff.ff.ff.ffff
604 12:59:46.243218 IO Manageability Engine FW Version = 11.1.4.0
605 12:59:46.246341 PHY Build Version = 0.0.0.e0
606 12:59:46.249592 Thunderbolt(TM) FW Version = 0.0.0.0
607 12:59:46.256115 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 12:59:46.259194 ITSS IRQ Polarities Before:
609 12:59:46.259282 IPC0: 0xffffffff
610 12:59:46.263025 IPC1: 0xffffffff
611 12:59:46.263112 IPC2: 0xffffffff
612 12:59:46.266168 IPC3: 0xffffffff
613 12:59:46.269234 ITSS IRQ Polarities After:
614 12:59:46.269337 IPC0: 0xffffffff
615 12:59:46.272962 IPC1: 0xffffffff
616 12:59:46.273046 IPC2: 0xffffffff
617 12:59:46.276158 IPC3: 0xffffffff
618 12:59:46.279307 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 12:59:46.293350 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 12:59:46.302758 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 12:59:46.316302 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 12:59:46.322373 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
623 12:59:46.322468 Enumerating buses...
624 12:59:46.329140 Show all devs... Before device enumeration.
625 12:59:46.329241 Root Device: enabled 1
626 12:59:46.332181 DOMAIN: 0000: enabled 1
627 12:59:46.335976 CPU_CLUSTER: 0: enabled 1
628 12:59:46.339193 PCI: 00:00.0: enabled 1
629 12:59:46.339282 PCI: 00:02.0: enabled 1
630 12:59:46.342385 PCI: 00:04.0: enabled 1
631 12:59:46.345715 PCI: 00:05.0: enabled 1
632 12:59:46.348822 PCI: 00:06.0: enabled 0
633 12:59:46.348926 PCI: 00:07.0: enabled 0
634 12:59:46.352876 PCI: 00:07.1: enabled 0
635 12:59:46.355997 PCI: 00:07.2: enabled 0
636 12:59:46.359258 PCI: 00:07.3: enabled 0
637 12:59:46.359345 PCI: 00:08.0: enabled 1
638 12:59:46.362502 PCI: 00:09.0: enabled 0
639 12:59:46.365583 PCI: 00:0a.0: enabled 0
640 12:59:46.369440 PCI: 00:0d.0: enabled 1
641 12:59:46.369537 PCI: 00:0d.1: enabled 0
642 12:59:46.372480 PCI: 00:0d.2: enabled 0
643 12:59:46.375546 PCI: 00:0d.3: enabled 0
644 12:59:46.379543 PCI: 00:0e.0: enabled 0
645 12:59:46.379628 PCI: 00:10.2: enabled 1
646 12:59:46.382604 PCI: 00:10.6: enabled 0
647 12:59:46.385703 PCI: 00:10.7: enabled 0
648 12:59:46.385800 PCI: 00:12.0: enabled 0
649 12:59:46.389557 PCI: 00:12.6: enabled 0
650 12:59:46.392701 PCI: 00:13.0: enabled 0
651 12:59:46.395849 PCI: 00:14.0: enabled 1
652 12:59:46.395936 PCI: 00:14.1: enabled 0
653 12:59:46.398952 PCI: 00:14.2: enabled 1
654 12:59:46.402134 PCI: 00:14.3: enabled 1
655 12:59:46.405861 PCI: 00:15.0: enabled 1
656 12:59:46.405952 PCI: 00:15.1: enabled 1
657 12:59:46.409038 PCI: 00:15.2: enabled 1
658 12:59:46.412176 PCI: 00:15.3: enabled 1
659 12:59:46.415361 PCI: 00:16.0: enabled 1
660 12:59:46.415450 PCI: 00:16.1: enabled 0
661 12:59:46.419104 PCI: 00:16.2: enabled 0
662 12:59:46.422326 PCI: 00:16.3: enabled 0
663 12:59:46.422411 PCI: 00:16.4: enabled 0
664 12:59:46.425448 PCI: 00:16.5: enabled 0
665 12:59:46.429290 PCI: 00:17.0: enabled 1
666 12:59:46.432275 PCI: 00:19.0: enabled 0
667 12:59:46.432376 PCI: 00:19.1: enabled 1
668 12:59:46.435484 PCI: 00:19.2: enabled 0
669 12:59:46.439250 PCI: 00:1c.0: enabled 1
670 12:59:46.442393 PCI: 00:1c.1: enabled 0
671 12:59:46.442480 PCI: 00:1c.2: enabled 0
672 12:59:46.445512 PCI: 00:1c.3: enabled 0
673 12:59:46.448651 PCI: 00:1c.4: enabled 0
674 12:59:46.452433 PCI: 00:1c.5: enabled 0
675 12:59:46.452518 PCI: 00:1c.6: enabled 1
676 12:59:46.455689 PCI: 00:1c.7: enabled 0
677 12:59:46.458913 PCI: 00:1d.0: enabled 1
678 12:59:46.458999 PCI: 00:1d.1: enabled 0
679 12:59:46.462032 PCI: 00:1d.2: enabled 1
680 12:59:46.465197 PCI: 00:1d.3: enabled 0
681 12:59:46.468837 PCI: 00:1e.0: enabled 1
682 12:59:46.468921 PCI: 00:1e.1: enabled 0
683 12:59:46.471946 PCI: 00:1e.2: enabled 1
684 12:59:46.475084 PCI: 00:1e.3: enabled 1
685 12:59:46.478852 PCI: 00:1f.0: enabled 1
686 12:59:46.478939 PCI: 00:1f.1: enabled 0
687 12:59:46.482020 PCI: 00:1f.2: enabled 1
688 12:59:46.485487 PCI: 00:1f.3: enabled 1
689 12:59:46.488570 PCI: 00:1f.4: enabled 0
690 12:59:46.488657 PCI: 00:1f.5: enabled 1
691 12:59:46.492232 PCI: 00:1f.6: enabled 0
692 12:59:46.495368 PCI: 00:1f.7: enabled 0
693 12:59:46.495467 APIC: 00: enabled 1
694 12:59:46.498586 GENERIC: 0.0: enabled 1
695 12:59:46.502264 GENERIC: 0.0: enabled 1
696 12:59:46.505339 GENERIC: 1.0: enabled 1
697 12:59:46.505425 GENERIC: 0.0: enabled 1
698 12:59:46.508512 GENERIC: 1.0: enabled 1
699 12:59:46.511707 USB0 port 0: enabled 1
700 12:59:46.515432 GENERIC: 0.0: enabled 1
701 12:59:46.515528 USB0 port 0: enabled 1
702 12:59:46.518586 GENERIC: 0.0: enabled 1
703 12:59:46.521834 I2C: 00:1a: enabled 1
704 12:59:46.521929 I2C: 00:31: enabled 1
705 12:59:46.525585 I2C: 00:32: enabled 1
706 12:59:46.528693 I2C: 00:10: enabled 1
707 12:59:46.528785 I2C: 00:15: enabled 1
708 12:59:46.531812 GENERIC: 0.0: enabled 0
709 12:59:46.535046 GENERIC: 1.0: enabled 0
710 12:59:46.538741 GENERIC: 0.0: enabled 1
711 12:59:46.538845 SPI: 00: enabled 1
712 12:59:46.541846 SPI: 00: enabled 1
713 12:59:46.541944 PNP: 0c09.0: enabled 1
714 12:59:46.544962 GENERIC: 0.0: enabled 1
715 12:59:46.548801 USB3 port 0: enabled 1
716 12:59:46.551803 USB3 port 1: enabled 1
717 12:59:46.551889 USB3 port 2: enabled 0
718 12:59:46.555079 USB3 port 3: enabled 0
719 12:59:46.558305 USB2 port 0: enabled 0
720 12:59:46.558390 USB2 port 1: enabled 1
721 12:59:46.562167 USB2 port 2: enabled 1
722 12:59:46.565298 USB2 port 3: enabled 0
723 12:59:46.568340 USB2 port 4: enabled 1
724 12:59:46.568429 USB2 port 5: enabled 0
725 12:59:46.571968 USB2 port 6: enabled 0
726 12:59:46.575134 USB2 port 7: enabled 0
727 12:59:46.575227 USB2 port 8: enabled 0
728 12:59:46.578359 USB2 port 9: enabled 0
729 12:59:46.582018 USB3 port 0: enabled 0
730 12:59:46.582121 USB3 port 1: enabled 1
731 12:59:46.584755 USB3 port 2: enabled 0
732 12:59:46.588507 USB3 port 3: enabled 0
733 12:59:46.591661 GENERIC: 0.0: enabled 1
734 12:59:46.591756 GENERIC: 1.0: enabled 1
735 12:59:46.595527 APIC: 01: enabled 1
736 12:59:46.598680 APIC: 03: enabled 1
737 12:59:46.598775 APIC: 07: enabled 1
738 12:59:46.601756 APIC: 05: enabled 1
739 12:59:46.601852 APIC: 04: enabled 1
740 12:59:46.605422 APIC: 02: enabled 1
741 12:59:46.608637 APIC: 06: enabled 1
742 12:59:46.608733 Compare with tree...
743 12:59:46.611624 Root Device: enabled 1
744 12:59:46.614908 DOMAIN: 0000: enabled 1
745 12:59:46.618633 PCI: 00:00.0: enabled 1
746 12:59:46.618728 PCI: 00:02.0: enabled 1
747 12:59:46.621811 PCI: 00:04.0: enabled 1
748 12:59:46.624956 GENERIC: 0.0: enabled 1
749 12:59:46.628202 PCI: 00:05.0: enabled 1
750 12:59:46.631998 PCI: 00:06.0: enabled 0
751 12:59:46.632093 PCI: 00:07.0: enabled 0
752 12:59:46.634996 GENERIC: 0.0: enabled 1
753 12:59:46.638127 PCI: 00:07.1: enabled 0
754 12:59:46.641384 GENERIC: 1.0: enabled 1
755 12:59:46.645209 PCI: 00:07.2: enabled 0
756 12:59:46.645305 GENERIC: 0.0: enabled 1
757 12:59:46.648433 PCI: 00:07.3: enabled 0
758 12:59:46.651390 GENERIC: 1.0: enabled 1
759 12:59:46.655172 PCI: 00:08.0: enabled 1
760 12:59:46.658492 PCI: 00:09.0: enabled 0
761 12:59:46.658588 PCI: 00:0a.0: enabled 0
762 12:59:46.661560 PCI: 00:0d.0: enabled 1
763 12:59:46.664716 USB0 port 0: enabled 1
764 12:59:46.668626 USB3 port 0: enabled 1
765 12:59:46.671580 USB3 port 1: enabled 1
766 12:59:46.671675 USB3 port 2: enabled 0
767 12:59:46.674632 USB3 port 3: enabled 0
768 12:59:46.678367 PCI: 00:0d.1: enabled 0
769 12:59:46.681399 PCI: 00:0d.2: enabled 0
770 12:59:46.685191 GENERIC: 0.0: enabled 1
771 12:59:46.685297 PCI: 00:0d.3: enabled 0
772 12:59:46.688300 PCI: 00:0e.0: enabled 0
773 12:59:46.691409 PCI: 00:10.2: enabled 1
774 12:59:46.695044 PCI: 00:10.6: enabled 0
775 12:59:46.698250 PCI: 00:10.7: enabled 0
776 12:59:46.698334 PCI: 00:12.0: enabled 0
777 12:59:46.701206 PCI: 00:12.6: enabled 0
778 12:59:46.705021 PCI: 00:13.0: enabled 0
779 12:59:46.708193 PCI: 00:14.0: enabled 1
780 12:59:46.711389 USB0 port 0: enabled 1
781 12:59:46.711481 USB2 port 0: enabled 0
782 12:59:46.714527 USB2 port 1: enabled 1
783 12:59:46.718359 USB2 port 2: enabled 1
784 12:59:46.721387 USB2 port 3: enabled 0
785 12:59:46.724547 USB2 port 4: enabled 1
786 12:59:46.727752 USB2 port 5: enabled 0
787 12:59:46.727845 USB2 port 6: enabled 0
788 12:59:46.731507 USB2 port 7: enabled 0
789 12:59:46.734625 USB2 port 8: enabled 0
790 12:59:46.737717 USB2 port 9: enabled 0
791 12:59:46.741627 USB3 port 0: enabled 0
792 12:59:46.744805 USB3 port 1: enabled 1
793 12:59:46.744902 USB3 port 2: enabled 0
794 12:59:46.748063 USB3 port 3: enabled 0
795 12:59:46.751234 PCI: 00:14.1: enabled 0
796 12:59:46.754925 PCI: 00:14.2: enabled 1
797 12:59:46.758121 PCI: 00:14.3: enabled 1
798 12:59:46.758219 GENERIC: 0.0: enabled 1
799 12:59:46.761224 PCI: 00:15.0: enabled 1
800 12:59:46.765140 I2C: 00:1a: enabled 1
801 12:59:46.768315 I2C: 00:31: enabled 1
802 12:59:46.768416 I2C: 00:32: enabled 1
803 12:59:46.771451 PCI: 00:15.1: enabled 1
804 12:59:46.774469 I2C: 00:10: enabled 1
805 12:59:46.778288 PCI: 00:15.2: enabled 1
806 12:59:46.781315 PCI: 00:15.3: enabled 1
807 12:59:46.781396 PCI: 00:16.0: enabled 1
808 12:59:46.784399 PCI: 00:16.1: enabled 0
809 12:59:46.788368 PCI: 00:16.2: enabled 0
810 12:59:46.791363 PCI: 00:16.3: enabled 0
811 12:59:46.795216 PCI: 00:16.4: enabled 0
812 12:59:46.795324 PCI: 00:16.5: enabled 0
813 12:59:46.798796 PCI: 00:17.0: enabled 1
814 12:59:46.802491 PCI: 00:19.0: enabled 0
815 12:59:46.802599 PCI: 00:19.1: enabled 1
816 12:59:46.805644 I2C: 00:15: enabled 1
817 12:59:46.809434 PCI: 00:19.2: enabled 0
818 12:59:46.812665 PCI: 00:1d.0: enabled 1
819 12:59:46.812750 GENERIC: 0.0: enabled 1
820 12:59:46.815735 PCI: 00:1e.0: enabled 1
821 12:59:46.818976 PCI: 00:1e.1: enabled 0
822 12:59:46.822174 PCI: 00:1e.2: enabled 1
823 12:59:46.825949 SPI: 00: enabled 1
824 12:59:46.826063 PCI: 00:1e.3: enabled 1
825 12:59:46.829025 SPI: 00: enabled 1
826 12:59:46.832115 PCI: 00:1f.0: enabled 1
827 12:59:46.835908 PNP: 0c09.0: enabled 1
828 12:59:46.835997 PCI: 00:1f.1: enabled 0
829 12:59:46.887323 PCI: 00:1f.2: enabled 1
830 12:59:46.887426 GENERIC: 0.0: enabled 1
831 12:59:46.887695 GENERIC: 0.0: enabled 1
832 12:59:46.887779 GENERIC: 1.0: enabled 1
833 12:59:46.887850 PCI: 00:1f.3: enabled 1
834 12:59:46.887917 PCI: 00:1f.4: enabled 0
835 12:59:46.887990 PCI: 00:1f.5: enabled 1
836 12:59:46.888253 PCI: 00:1f.6: enabled 0
837 12:59:46.888324 PCI: 00:1f.7: enabled 0
838 12:59:46.888397 CPU_CLUSTER: 0: enabled 1
839 12:59:46.888462 APIC: 00: enabled 1
840 12:59:46.888524 APIC: 01: enabled 1
841 12:59:46.888596 APIC: 03: enabled 1
842 12:59:46.888659 APIC: 07: enabled 1
843 12:59:46.888721 APIC: 05: enabled 1
844 12:59:46.888790 APIC: 04: enabled 1
845 12:59:46.888851 APIC: 02: enabled 1
846 12:59:46.888912 APIC: 06: enabled 1
847 12:59:46.888982 Root Device scanning...
848 12:59:46.931895 scan_static_bus for Root Device
849 12:59:46.932017 DOMAIN: 0000 enabled
850 12:59:46.932092 CPU_CLUSTER: 0 enabled
851 12:59:46.932373 DOMAIN: 0000 scanning...
852 12:59:46.932447 PCI: pci_scan_bus for bus 00
853 12:59:46.932521 PCI: 00:00.0 [8086/0000] ops
854 12:59:46.932588 PCI: 00:00.0 [8086/9a12] enabled
855 12:59:46.932843 PCI: 00:02.0 [8086/0000] bus ops
856 12:59:46.932922 PCI: 00:02.0 [8086/9a40] enabled
857 12:59:46.933181 PCI: 00:04.0 [8086/0000] bus ops
858 12:59:46.933254 PCI: 00:04.0 [8086/9a03] enabled
859 12:59:46.933330 PCI: 00:05.0 [8086/9a19] enabled
860 12:59:46.933395 PCI: 00:07.0 [0000/0000] hidden
861 12:59:46.933649 PCI: 00:08.0 [8086/9a11] enabled
862 12:59:46.933732 PCI: 00:0a.0 [8086/9a0d] disabled
863 12:59:46.936794 PCI: 00:0d.0 [8086/0000] bus ops
864 12:59:46.939960 PCI: 00:0d.0 [8086/9a13] enabled
865 12:59:46.943665 PCI: 00:14.0 [8086/0000] bus ops
866 12:59:46.946740 PCI: 00:14.0 [8086/a0ed] enabled
867 12:59:46.950001 PCI: 00:14.2 [8086/a0ef] enabled
868 12:59:46.953247 PCI: 00:14.3 [8086/0000] bus ops
869 12:59:46.957159 PCI: 00:14.3 [8086/a0f0] enabled
870 12:59:46.960194 PCI: 00:15.0 [8086/0000] bus ops
871 12:59:46.963543 PCI: 00:15.0 [8086/a0e8] enabled
872 12:59:46.966812 PCI: 00:15.1 [8086/0000] bus ops
873 12:59:46.969980 PCI: 00:15.1 [8086/a0e9] enabled
874 12:59:46.973075 PCI: 00:15.2 [8086/0000] bus ops
875 12:59:46.976882 PCI: 00:15.2 [8086/a0ea] enabled
876 12:59:46.980032 PCI: 00:15.3 [8086/0000] bus ops
877 12:59:46.983324 PCI: 00:15.3 [8086/a0eb] enabled
878 12:59:46.987097 PCI: 00:16.0 [8086/0000] ops
879 12:59:46.990219 PCI: 00:16.0 [8086/a0e0] enabled
880 12:59:46.993285 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 12:59:46.997167 PCI: 00:19.0 [8086/0000] bus ops
882 12:59:47.000102 PCI: 00:19.0 [8086/a0c5] disabled
883 12:59:47.003255 PCI: 00:19.1 [8086/0000] bus ops
884 12:59:47.006524 PCI: 00:19.1 [8086/a0c6] enabled
885 12:59:47.010169 PCI: 00:1d.0 [8086/0000] bus ops
886 12:59:47.013286 PCI: 00:1d.0 [8086/a0b0] enabled
887 12:59:47.016352 PCI: 00:1e.0 [8086/0000] ops
888 12:59:47.020067 PCI: 00:1e.0 [8086/a0a8] enabled
889 12:59:47.024034 PCI: 00:1e.2 [8086/0000] bus ops
890 12:59:47.026443 PCI: 00:1e.2 [8086/a0aa] enabled
891 12:59:47.030181 PCI: 00:1e.3 [8086/0000] bus ops
892 12:59:47.033197 PCI: 00:1e.3 [8086/a0ab] enabled
893 12:59:47.036342 PCI: 00:1f.0 [8086/0000] bus ops
894 12:59:47.040178 PCI: 00:1f.0 [8086/a087] enabled
895 12:59:47.043114 RTC Init
896 12:59:47.046313 Set power on after power failure.
897 12:59:47.046408 Disabling Deep S3
898 12:59:47.050082 Disabling Deep S3
899 12:59:47.050176 Disabling Deep S4
900 12:59:47.053213 Disabling Deep S4
901 12:59:47.056500 Disabling Deep S5
902 12:59:47.056594 Disabling Deep S5
903 12:59:47.059644 PCI: 00:1f.2 [0000/0000] hidden
904 12:59:47.063440 PCI: 00:1f.3 [8086/0000] bus ops
905 12:59:47.066592 PCI: 00:1f.3 [8086/a0c8] enabled
906 12:59:47.069938 PCI: 00:1f.5 [8086/0000] bus ops
907 12:59:47.073053 PCI: 00:1f.5 [8086/a0a4] enabled
908 12:59:47.076212 PCI: Leftover static devices:
909 12:59:47.076310 PCI: 00:10.2
910 12:59:47.079848 PCI: 00:10.6
911 12:59:47.079942 PCI: 00:10.7
912 12:59:47.082938 PCI: 00:06.0
913 12:59:47.083036 PCI: 00:07.1
914 12:59:47.086623 PCI: 00:07.2
915 12:59:47.086715 PCI: 00:07.3
916 12:59:47.086786 PCI: 00:09.0
917 12:59:47.089759 PCI: 00:0d.1
918 12:59:47.089840 PCI: 00:0d.2
919 12:59:47.092923 PCI: 00:0d.3
920 12:59:47.093005 PCI: 00:0e.0
921 12:59:47.093087 PCI: 00:12.0
922 12:59:47.096659 PCI: 00:12.6
923 12:59:47.096746 PCI: 00:13.0
924 12:59:47.099845 PCI: 00:14.1
925 12:59:47.099925 PCI: 00:16.1
926 12:59:47.100001 PCI: 00:16.2
927 12:59:47.102926 PCI: 00:16.3
928 12:59:47.103007 PCI: 00:16.4
929 12:59:47.106797 PCI: 00:16.5
930 12:59:47.106885 PCI: 00:17.0
931 12:59:47.109872 PCI: 00:19.2
932 12:59:47.109966 PCI: 00:1e.1
933 12:59:47.110038 PCI: 00:1f.1
934 12:59:47.113530 PCI: 00:1f.4
935 12:59:47.113653 PCI: 00:1f.6
936 12:59:47.116677 PCI: 00:1f.7
937 12:59:47.119795 PCI: Check your devicetree.cb.
938 12:59:47.119889 PCI: 00:02.0 scanning...
939 12:59:47.122985 scan_generic_bus for PCI: 00:02.0
940 12:59:47.129856 scan_generic_bus for PCI: 00:02.0 done
941 12:59:47.132964 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 12:59:47.136203 PCI: 00:04.0 scanning...
943 12:59:47.139833 scan_generic_bus for PCI: 00:04.0
944 12:59:47.139927 GENERIC: 0.0 enabled
945 12:59:47.146146 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 12:59:47.153055 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 12:59:47.156223 PCI: 00:0d.0 scanning...
948 12:59:47.159329 scan_static_bus for PCI: 00:0d.0
949 12:59:47.159423 USB0 port 0 enabled
950 12:59:47.163114 USB0 port 0 scanning...
951 12:59:47.166281 scan_static_bus for USB0 port 0
952 12:59:47.169501 USB3 port 0 enabled
953 12:59:47.169596 USB3 port 1 enabled
954 12:59:47.173309 USB3 port 2 disabled
955 12:59:47.176565 USB3 port 3 disabled
956 12:59:47.176658 USB3 port 0 scanning...
957 12:59:47.179873 scan_static_bus for USB3 port 0
958 12:59:47.182833 scan_static_bus for USB3 port 0 done
959 12:59:47.189734 scan_bus: bus USB3 port 0 finished in 6 msecs
960 12:59:47.192946 USB3 port 1 scanning...
961 12:59:47.195982 scan_static_bus for USB3 port 1
962 12:59:47.199157 scan_static_bus for USB3 port 1 done
963 12:59:47.202893 scan_bus: bus USB3 port 1 finished in 6 msecs
964 12:59:47.205992 scan_static_bus for USB0 port 0 done
965 12:59:47.212847 scan_bus: bus USB0 port 0 finished in 43 msecs
966 12:59:47.215929 scan_static_bus for PCI: 00:0d.0 done
967 12:59:47.219652 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 12:59:47.222792 PCI: 00:14.0 scanning...
969 12:59:47.226092 scan_static_bus for PCI: 00:14.0
970 12:59:47.229261 USB0 port 0 enabled
971 12:59:47.229356 USB0 port 0 scanning...
972 12:59:47.232766 scan_static_bus for USB0 port 0
973 12:59:47.235839 USB2 port 0 disabled
974 12:59:47.239005 USB2 port 1 enabled
975 12:59:47.239108 USB2 port 2 enabled
976 12:59:47.242748 USB2 port 3 disabled
977 12:59:47.245850 USB2 port 4 enabled
978 12:59:47.245945 USB2 port 5 disabled
979 12:59:47.248945 USB2 port 6 disabled
980 12:59:47.252755 USB2 port 7 disabled
981 12:59:47.252850 USB2 port 8 disabled
982 12:59:47.255973 USB2 port 9 disabled
983 12:59:47.256067 USB3 port 0 disabled
984 12:59:47.259183 USB3 port 1 enabled
985 12:59:47.262248 USB3 port 2 disabled
986 12:59:47.262350 USB3 port 3 disabled
987 12:59:47.266217 USB2 port 1 scanning...
988 12:59:47.269724 scan_static_bus for USB2 port 1
989 12:59:47.272988 scan_static_bus for USB2 port 1 done
990 12:59:47.279303 scan_bus: bus USB2 port 1 finished in 6 msecs
991 12:59:47.279795 USB2 port 2 scanning...
992 12:59:47.283002 scan_static_bus for USB2 port 2
993 12:59:47.289197 scan_static_bus for USB2 port 2 done
994 12:59:47.292411 scan_bus: bus USB2 port 2 finished in 6 msecs
995 12:59:47.296082 USB2 port 4 scanning...
996 12:59:47.299373 scan_static_bus for USB2 port 4
997 12:59:47.302414 scan_static_bus for USB2 port 4 done
998 12:59:47.306281 scan_bus: bus USB2 port 4 finished in 6 msecs
999 12:59:47.309496 USB3 port 1 scanning...
1000 12:59:47.312725 scan_static_bus for USB3 port 1
1001 12:59:47.316571 scan_static_bus for USB3 port 1 done
1002 12:59:47.319718 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 12:59:47.326072 scan_static_bus for USB0 port 0 done
1004 12:59:47.329299 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 12:59:47.332397 scan_static_bus for PCI: 00:14.0 done
1006 12:59:47.339739 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1007 12:59:47.340287 PCI: 00:14.3 scanning...
1008 12:59:47.342490 scan_static_bus for PCI: 00:14.3
1009 12:59:47.346051 GENERIC: 0.0 enabled
1010 12:59:47.349026 scan_static_bus for PCI: 00:14.3 done
1011 12:59:47.356405 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 12:59:47.356980 PCI: 00:15.0 scanning...
1013 12:59:47.359326 scan_static_bus for PCI: 00:15.0
1014 12:59:47.362411 I2C: 00:1a enabled
1015 12:59:47.366617 I2C: 00:31 enabled
1016 12:59:47.367164 I2C: 00:32 enabled
1017 12:59:47.369428 scan_static_bus for PCI: 00:15.0 done
1018 12:59:47.376617 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 12:59:47.377239 PCI: 00:15.1 scanning...
1020 12:59:47.380502 scan_static_bus for PCI: 00:15.1
1021 12:59:47.383277 I2C: 00:10 enabled
1022 12:59:47.386388 scan_static_bus for PCI: 00:15.1 done
1023 12:59:47.393188 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 12:59:47.393674 PCI: 00:15.2 scanning...
1025 12:59:47.396641 scan_static_bus for PCI: 00:15.2
1026 12:59:47.402813 scan_static_bus for PCI: 00:15.2 done
1027 12:59:47.406574 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 12:59:47.409969 PCI: 00:15.3 scanning...
1029 12:59:47.413213 scan_static_bus for PCI: 00:15.3
1030 12:59:47.416320 scan_static_bus for PCI: 00:15.3 done
1031 12:59:47.420082 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 12:59:47.422999 PCI: 00:19.1 scanning...
1033 12:59:47.426779 scan_static_bus for PCI: 00:19.1
1034 12:59:47.429759 I2C: 00:15 enabled
1035 12:59:47.433034 scan_static_bus for PCI: 00:19.1 done
1036 12:59:47.436197 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 12:59:47.439469 PCI: 00:1d.0 scanning...
1038 12:59:47.442923 do_pci_scan_bridge for PCI: 00:1d.0
1039 12:59:47.446402 PCI: pci_scan_bus for bus 01
1040 12:59:47.449673 PCI: 01:00.0 [1c5c/174a] enabled
1041 12:59:47.452759 GENERIC: 0.0 enabled
1042 12:59:47.456508 Enabling Common Clock Configuration
1043 12:59:47.459813 L1 Sub-State supported from root port 29
1044 12:59:47.462698 L1 Sub-State Support = 0xf
1045 12:59:47.466137 CommonModeRestoreTime = 0x28
1046 12:59:47.469638 Power On Value = 0x16, Power On Scale = 0x0
1047 12:59:47.472521 ASPM: Enabled L1
1048 12:59:47.476384 PCIe: Max_Payload_Size adjusted to 128
1049 12:59:47.482420 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 12:59:47.482904 PCI: 00:1e.2 scanning...
1051 12:59:47.486030 scan_generic_bus for PCI: 00:1e.2
1052 12:59:47.489319 SPI: 00 enabled
1053 12:59:47.496107 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 12:59:47.499562 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 12:59:47.502788 PCI: 00:1e.3 scanning...
1056 12:59:47.505687 scan_generic_bus for PCI: 00:1e.3
1057 12:59:47.509011 SPI: 00 enabled
1058 12:59:47.512867 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 12:59:47.519086 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 12:59:47.522826 PCI: 00:1f.0 scanning...
1061 12:59:47.525801 scan_static_bus for PCI: 00:1f.0
1062 12:59:47.526275 PNP: 0c09.0 enabled
1063 12:59:47.528740 PNP: 0c09.0 scanning...
1064 12:59:47.531998 scan_static_bus for PNP: 0c09.0
1065 12:59:47.535834 scan_static_bus for PNP: 0c09.0 done
1066 12:59:47.542193 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 12:59:47.545252 scan_static_bus for PCI: 00:1f.0 done
1068 12:59:47.549242 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 12:59:47.552201 PCI: 00:1f.2 scanning...
1070 12:59:47.555464 scan_static_bus for PCI: 00:1f.2
1071 12:59:47.559102 GENERIC: 0.0 enabled
1072 12:59:47.559684 GENERIC: 0.0 scanning...
1073 12:59:47.562643 scan_static_bus for GENERIC: 0.0
1074 12:59:47.566046 GENERIC: 0.0 enabled
1075 12:59:47.568961 GENERIC: 1.0 enabled
1076 12:59:47.572054 scan_static_bus for GENERIC: 0.0 done
1077 12:59:47.575611 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 12:59:47.582570 scan_static_bus for PCI: 00:1f.2 done
1079 12:59:47.585596 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 12:59:47.588794 PCI: 00:1f.3 scanning...
1081 12:59:47.592194 scan_static_bus for PCI: 00:1f.3
1082 12:59:47.595225 scan_static_bus for PCI: 00:1f.3 done
1083 12:59:47.598386 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 12:59:47.602093 PCI: 00:1f.5 scanning...
1085 12:59:47.605419 scan_generic_bus for PCI: 00:1f.5
1086 12:59:47.608699 scan_generic_bus for PCI: 00:1f.5 done
1087 12:59:47.615260 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 12:59:47.618757 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 12:59:47.625108 scan_static_bus for Root Device done
1090 12:59:47.628256 scan_bus: bus Root Device finished in 737 msecs
1091 12:59:47.628830 done
1092 12:59:47.635247 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 12:59:47.638310 Chrome EC: UHEPI supported
1094 12:59:47.644776 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 12:59:47.651691 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 12:59:47.654731 SPI flash protection: WPSW=0 SRP0=0
1097 12:59:47.658505 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 12:59:47.665009 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 12:59:47.668720 found VGA at PCI: 00:02.0
1100 12:59:47.671319 Setting up VGA for PCI: 00:02.0
1101 12:59:47.675092 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 12:59:47.681779 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 12:59:47.684721 Allocating resources...
1104 12:59:47.685229 Reading resources...
1105 12:59:47.688357 Root Device read_resources bus 0 link: 0
1106 12:59:47.694905 DOMAIN: 0000 read_resources bus 0 link: 0
1107 12:59:47.698063 PCI: 00:04.0 read_resources bus 1 link: 0
1108 12:59:47.704716 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 12:59:47.708585 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 12:59:47.715159 USB0 port 0 read_resources bus 0 link: 0
1111 12:59:47.718050 USB0 port 0 read_resources bus 0 link: 0 done
1112 12:59:47.724464 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 12:59:47.728429 PCI: 00:14.0 read_resources bus 0 link: 0
1114 12:59:47.731152 USB0 port 0 read_resources bus 0 link: 0
1115 12:59:47.738908 USB0 port 0 read_resources bus 0 link: 0 done
1116 12:59:47.742299 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 12:59:47.749378 PCI: 00:14.3 read_resources bus 0 link: 0
1118 12:59:47.752584 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 12:59:47.758821 PCI: 00:15.0 read_resources bus 0 link: 0
1120 12:59:47.761799 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 12:59:47.769317 PCI: 00:15.1 read_resources bus 0 link: 0
1122 12:59:47.772367 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 12:59:47.779628 PCI: 00:19.1 read_resources bus 0 link: 0
1124 12:59:47.782593 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 12:59:47.789633 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 12:59:47.792594 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 12:59:47.799475 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 12:59:47.802914 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 12:59:47.809758 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 12:59:47.812519 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 12:59:47.819736 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 12:59:47.822712 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 12:59:47.825825 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 12:59:47.832607 GENERIC: 0.0 read_resources bus 0 link: 0
1135 12:59:47.836184 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 12:59:47.843025 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 12:59:47.849744 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 12:59:47.852834 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 12:59:47.858942 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 12:59:47.862661 Root Device read_resources bus 0 link: 0 done
1141 12:59:47.866029 Done reading resources.
1142 12:59:47.869329 Show resources in subtree (Root Device)...After reading.
1143 12:59:47.876344 Root Device child on link 0 DOMAIN: 0000
1144 12:59:47.879060 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 12:59:47.889278 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 12:59:47.899589 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 12:59:47.900148 PCI: 00:00.0
1148 12:59:47.909246 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 12:59:47.919463 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 12:59:47.928962 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 12:59:47.938720 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 12:59:47.948979 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 12:59:47.955755 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 12:59:47.965405 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 12:59:47.976069 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 12:59:47.985184 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 12:59:47.995405 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 12:59:48.001791 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 12:59:48.012401 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 12:59:48.021932 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 12:59:48.031740 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 12:59:48.041992 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 12:59:48.051624 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 12:59:48.061995 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 12:59:48.068529 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 12:59:48.078114 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 12:59:48.088060 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 12:59:48.091364 PCI: 00:02.0
1169 12:59:48.101438 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 12:59:48.111418 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 12:59:48.117912 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 12:59:48.124414 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 12:59:48.134482 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 12:59:48.134998 GENERIC: 0.0
1175 12:59:48.137788 PCI: 00:05.0
1176 12:59:48.148039 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 12:59:48.151153 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 12:59:48.154771 GENERIC: 0.0
1179 12:59:48.155317 PCI: 00:08.0
1180 12:59:48.164399 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:59:48.167766 PCI: 00:0a.0
1182 12:59:48.171259 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 12:59:48.181448 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 12:59:48.184617 USB0 port 0 child on link 0 USB3 port 0
1185 12:59:48.187452 USB3 port 0
1186 12:59:48.187931 USB3 port 1
1187 12:59:48.191492 USB3 port 2
1188 12:59:48.194463 USB3 port 3
1189 12:59:48.197558 PCI: 00:14.0 child on link 0 USB0 port 0
1190 12:59:48.207947 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 12:59:48.210855 USB0 port 0 child on link 0 USB2 port 0
1192 12:59:48.214644 USB2 port 0
1193 12:59:48.215081 USB2 port 1
1194 12:59:48.218006 USB2 port 2
1195 12:59:48.218551 USB2 port 3
1196 12:59:48.221367 USB2 port 4
1197 12:59:48.221910 USB2 port 5
1198 12:59:48.224224 USB2 port 6
1199 12:59:48.224660 USB2 port 7
1200 12:59:48.227885 USB2 port 8
1201 12:59:48.228468 USB2 port 9
1202 12:59:48.231051 USB3 port 0
1203 12:59:48.234523 USB3 port 1
1204 12:59:48.234985 USB3 port 2
1205 12:59:48.237833 USB3 port 3
1206 12:59:48.238266 PCI: 00:14.2
1207 12:59:48.247371 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 12:59:48.257971 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 12:59:48.261212 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 12:59:48.271224 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 12:59:48.274316 GENERIC: 0.0
1212 12:59:48.277366 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 12:59:48.287904 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:59:48.291263 I2C: 00:1a
1215 12:59:48.291863 I2C: 00:31
1216 12:59:48.294465 I2C: 00:32
1217 12:59:48.297469 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 12:59:48.307434 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 12:59:48.308012 I2C: 00:10
1220 12:59:48.311353 PCI: 00:15.2
1221 12:59:48.320842 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 12:59:48.321470 PCI: 00:15.3
1223 12:59:48.330956 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 12:59:48.333916 PCI: 00:16.0
1225 12:59:48.344113 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:59:48.344568 PCI: 00:19.0
1227 12:59:48.350478 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 12:59:48.360868 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 12:59:48.361445 I2C: 00:15
1230 12:59:48.367663 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 12:59:48.373673 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 12:59:48.384019 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 12:59:48.394040 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 12:59:48.394596 GENERIC: 0.0
1235 12:59:48.397294 PCI: 01:00.0
1236 12:59:48.407317 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 12:59:48.417419 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 12:59:48.427610 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 12:59:48.428196 PCI: 00:1e.0
1240 12:59:48.437216 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 12:59:48.443673 PCI: 00:1e.2 child on link 0 SPI: 00
1242 12:59:48.454030 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:59:48.454575 SPI: 00
1244 12:59:48.457027 PCI: 00:1e.3 child on link 0 SPI: 00
1245 12:59:48.467235 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:59:48.470477 SPI: 00
1247 12:59:48.473610 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 12:59:48.480260 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 12:59:48.483293 PNP: 0c09.0
1250 12:59:48.493555 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 12:59:48.496597 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 12:59:48.507004 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 12:59:48.516793 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 12:59:48.520013 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 12:59:48.523596 GENERIC: 0.0
1256 12:59:48.524033 GENERIC: 1.0
1257 12:59:48.527163 PCI: 00:1f.3
1258 12:59:48.536890 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 12:59:48.546315 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 12:59:48.546758 PCI: 00:1f.5
1261 12:59:48.556834 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 12:59:48.560140 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 12:59:48.563452 APIC: 00
1264 12:59:48.564001 APIC: 01
1265 12:59:48.564355 APIC: 03
1266 12:59:48.566944 APIC: 07
1267 12:59:48.567373 APIC: 05
1268 12:59:48.567734 APIC: 04
1269 12:59:48.570107 APIC: 02
1270 12:59:48.570683 APIC: 06
1271 12:59:48.580120 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 12:59:48.583062 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 12:59:48.590192 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 12:59:48.596636 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 12:59:48.599521 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 12:59:48.606217 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 12:59:48.609748 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 12:59:48.616240 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 12:59:48.623516 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 12:59:48.629897 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 12:59:48.639872 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 12:59:48.646237 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 12:59:48.652865 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 12:59:48.659554 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 12:59:48.665755 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 12:59:48.669762 DOMAIN: 0000: Resource ranges:
1287 12:59:48.673348 * Base: 1000, Size: 800, Tag: 100
1288 12:59:48.676452 * Base: 1900, Size: e700, Tag: 100
1289 12:59:48.682582 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 12:59:48.689725 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 12:59:48.695719 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 12:59:48.703174 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 12:59:48.712893 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 12:59:48.719453 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 12:59:48.725623 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 12:59:48.735592 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 12:59:48.742553 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 12:59:48.749096 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 12:59:48.759428 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 12:59:48.765671 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 12:59:48.772463 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 12:59:48.782307 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 12:59:48.789454 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 12:59:48.795754 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 12:59:48.805653 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 12:59:48.812731 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 12:59:48.819258 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 12:59:48.829131 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 12:59:48.835762 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 12:59:48.842116 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 12:59:48.852081 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 12:59:48.859213 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 12:59:48.865218 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 12:59:48.868288 DOMAIN: 0000: Resource ranges:
1315 12:59:48.875770 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 12:59:48.878766 * Base: d0000000, Size: 28000000, Tag: 200
1317 12:59:48.881970 * Base: fa000000, Size: 1000000, Tag: 200
1318 12:59:48.884941 * Base: fb001000, Size: 2fff000, Tag: 200
1319 12:59:48.891799 * Base: fe010000, Size: 2e000, Tag: 200
1320 12:59:48.895111 * Base: fe03f000, Size: d41000, Tag: 200
1321 12:59:48.898689 * Base: fed88000, Size: 8000, Tag: 200
1322 12:59:48.901993 * Base: fed93000, Size: d000, Tag: 200
1323 12:59:48.908420 * Base: feda2000, Size: 1e000, Tag: 200
1324 12:59:48.912307 * Base: fede0000, Size: 1220000, Tag: 200
1325 12:59:48.915324 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 12:59:48.925565 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 12:59:48.931705 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 12:59:48.938525 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 12:59:48.944846 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 12:59:48.952012 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 12:59:48.958353 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 12:59:48.965352 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 12:59:48.971686 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 12:59:48.978009 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 12:59:48.984656 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 12:59:48.991536 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 12:59:48.997686 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 12:59:49.004795 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 12:59:49.011742 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 12:59:49.017735 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 12:59:49.024946 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 12:59:49.031277 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 12:59:49.037925 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 12:59:49.044216 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 12:59:49.051104 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 12:59:49.057443 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 12:59:49.064583 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 12:59:49.071179 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 12:59:49.077673 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 12:59:49.081427 PCI: 00:1d.0: Resource ranges:
1351 12:59:49.084629 * Base: 7fc00000, Size: 100000, Tag: 200
1352 12:59:49.091057 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 12:59:49.097749 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 12:59:49.104036 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 12:59:49.114369 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 12:59:49.121110 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 12:59:49.124374 Root Device assign_resources, bus 0 link: 0
1358 12:59:49.130762 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 12:59:49.137146 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 12:59:49.147503 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 12:59:49.154421 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 12:59:49.163692 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 12:59:49.166767 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 12:59:49.170638 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 12:59:49.180794 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 12:59:49.187220 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 12:59:49.197184 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 12:59:49.200414 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 12:59:49.207680 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 12:59:49.213794 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 12:59:49.217090 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 12:59:49.224283 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 12:59:49.231065 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 12:59:49.241039 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 12:59:49.247365 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 12:59:49.254061 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 12:59:49.257450 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 12:59:49.266708 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 12:59:49.270015 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 12:59:49.273995 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 12:59:49.283979 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 12:59:49.287449 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 12:59:49.293253 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 12:59:49.300252 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 12:59:49.310397 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 12:59:49.316692 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 12:59:49.327000 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 12:59:49.329867 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 12:59:49.332872 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 12:59:49.343070 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 12:59:49.353234 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 12:59:49.363284 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 12:59:49.366313 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 12:59:49.373155 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 12:59:49.382710 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 12:59:49.389784 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 12:59:49.396650 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 12:59:49.402508 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 12:59:49.406693 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 12:59:49.413454 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 12:59:49.419774 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 12:59:49.426633 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 12:59:49.429892 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 12:59:49.436201 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 12:59:49.439730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 12:59:49.442791 LPC: Trying to open IO window from 800 size 1ff
1407 12:59:49.453180 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 12:59:49.459602 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 12:59:49.469649 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 12:59:49.472967 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 12:59:49.479843 Root Device assign_resources, bus 0 link: 0
1412 12:59:49.480379 Done setting resources.
1413 12:59:49.485854 Show resources in subtree (Root Device)...After assigning values.
1414 12:59:49.492825 Root Device child on link 0 DOMAIN: 0000
1415 12:59:49.496193 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 12:59:49.505906 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 12:59:49.516643 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 12:59:49.517217 PCI: 00:00.0
1419 12:59:49.526245 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 12:59:49.536177 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 12:59:49.546046 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 12:59:49.556504 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 12:59:49.562565 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 12:59:49.572702 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 12:59:49.582724 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 12:59:49.592594 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 12:59:49.602588 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 12:59:49.609140 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 12:59:49.619395 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 12:59:49.628693 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 12:59:49.638996 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 12:59:49.649003 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 12:59:49.655126 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 12:59:49.665483 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 12:59:49.675751 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 12:59:49.685488 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 12:59:49.695618 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 12:59:49.704982 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 12:59:49.705536 PCI: 00:02.0
1440 12:59:49.718955 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 12:59:49.728545 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 12:59:49.738501 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 12:59:49.741605 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 12:59:49.751871 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 12:59:49.754865 GENERIC: 0.0
1446 12:59:49.755298 PCI: 00:05.0
1447 12:59:49.765512 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 12:59:49.771457 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 12:59:49.771984 GENERIC: 0.0
1450 12:59:49.775120 PCI: 00:08.0
1451 12:59:49.784969 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 12:59:49.785548 PCI: 00:0a.0
1453 12:59:49.791955 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 12:59:49.801684 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 12:59:49.804754 USB0 port 0 child on link 0 USB3 port 0
1456 12:59:49.808674 USB3 port 0
1457 12:59:49.809263 USB3 port 1
1458 12:59:49.811552 USB3 port 2
1459 12:59:49.811996 USB3 port 3
1460 12:59:49.818553 PCI: 00:14.0 child on link 0 USB0 port 0
1461 12:59:49.827858 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 12:59:49.831049 USB0 port 0 child on link 0 USB2 port 0
1463 12:59:49.834443 USB2 port 0
1464 12:59:49.834872 USB2 port 1
1465 12:59:49.838343 USB2 port 2
1466 12:59:49.838774 USB2 port 3
1467 12:59:49.841385 USB2 port 4
1468 12:59:49.841815 USB2 port 5
1469 12:59:49.844485 USB2 port 6
1470 12:59:49.844923 USB2 port 7
1471 12:59:49.848221 USB2 port 8
1472 12:59:49.848657 USB2 port 9
1473 12:59:49.851422 USB3 port 0
1474 12:59:49.851858 USB3 port 1
1475 12:59:49.854596 USB3 port 2
1476 12:59:49.855032 USB3 port 3
1477 12:59:49.858128 PCI: 00:14.2
1478 12:59:49.868061 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 12:59:49.877620 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 12:59:49.884866 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 12:59:49.894254 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 12:59:49.894695 GENERIC: 0.0
1483 12:59:49.898015 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 12:59:49.911143 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 12:59:49.911587 I2C: 00:1a
1486 12:59:49.914754 I2C: 00:31
1487 12:59:49.915295 I2C: 00:32
1488 12:59:49.917863 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 12:59:49.927849 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 12:59:49.931067 I2C: 00:10
1491 12:59:49.931505 PCI: 00:15.2
1492 12:59:49.944331 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 12:59:49.944774 PCI: 00:15.3
1494 12:59:49.954140 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 12:59:49.957852 PCI: 00:16.0
1496 12:59:49.967680 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 12:59:49.968123 PCI: 00:19.0
1498 12:59:49.974076 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 12:59:49.984184 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 12:59:49.984623 I2C: 00:15
1501 12:59:49.987324 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 12:59:49.997229 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 12:59:50.010957 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 12:59:50.020465 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 12:59:50.020909 GENERIC: 0.0
1506 12:59:50.024346 PCI: 01:00.0
1507 12:59:50.033696 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 12:59:50.044212 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 12:59:50.053581 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 12:59:50.057232 PCI: 00:1e.0
1511 12:59:50.067006 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 12:59:50.073362 PCI: 00:1e.2 child on link 0 SPI: 00
1513 12:59:50.084022 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 12:59:50.084514 SPI: 00
1515 12:59:50.087122 PCI: 00:1e.3 child on link 0 SPI: 00
1516 12:59:50.096775 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 12:59:50.100594 SPI: 00
1518 12:59:50.103605 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 12:59:50.113596 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 12:59:50.114066 PNP: 0c09.0
1521 12:59:50.123826 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 12:59:50.126789 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 12:59:50.137011 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 12:59:50.146772 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 12:59:50.149993 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 12:59:50.153601 GENERIC: 0.0
1527 12:59:50.154075 GENERIC: 1.0
1528 12:59:50.156693 PCI: 00:1f.3
1529 12:59:50.166604 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 12:59:50.176753 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 12:59:50.179946 PCI: 00:1f.5
1532 12:59:50.190336 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 12:59:50.193382 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 12:59:50.193784 APIC: 00
1535 12:59:50.196665 APIC: 01
1536 12:59:50.197124 APIC: 03
1537 12:59:50.199670 APIC: 07
1538 12:59:50.200109 APIC: 05
1539 12:59:50.200460 APIC: 04
1540 12:59:50.202935 APIC: 02
1541 12:59:50.203371 APIC: 06
1542 12:59:50.206100 Done allocating resources.
1543 12:59:50.213045 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 12:59:50.219965 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 12:59:50.223106 Configure GPIOs for I2S audio on UP4.
1546 12:59:50.229535 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 12:59:50.232735 Enabling resources...
1548 12:59:50.236256 PCI: 00:00.0 subsystem <- 8086/9a12
1549 12:59:50.236798 PCI: 00:00.0 cmd <- 06
1550 12:59:50.242817 PCI: 00:02.0 subsystem <- 8086/9a40
1551 12:59:50.243339 PCI: 00:02.0 cmd <- 03
1552 12:59:50.246107 PCI: 00:04.0 subsystem <- 8086/9a03
1553 12:59:50.249814 PCI: 00:04.0 cmd <- 02
1554 12:59:50.252998 PCI: 00:05.0 subsystem <- 8086/9a19
1555 12:59:50.256248 PCI: 00:05.0 cmd <- 02
1556 12:59:50.259768 PCI: 00:08.0 subsystem <- 8086/9a11
1557 12:59:50.262599 PCI: 00:08.0 cmd <- 06
1558 12:59:50.266465 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 12:59:50.269616 PCI: 00:0d.0 cmd <- 02
1560 12:59:50.273469 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 12:59:50.276216 PCI: 00:14.0 cmd <- 02
1562 12:59:50.280116 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 12:59:50.283011 PCI: 00:14.2 cmd <- 02
1564 12:59:50.286277 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 12:59:50.286713 PCI: 00:14.3 cmd <- 02
1566 12:59:50.292885 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 12:59:50.293457 PCI: 00:15.0 cmd <- 02
1568 12:59:50.296516 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 12:59:50.299896 PCI: 00:15.1 cmd <- 02
1570 12:59:50.302886 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 12:59:50.305886 PCI: 00:15.2 cmd <- 02
1572 12:59:50.309184 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 12:59:50.312732 PCI: 00:15.3 cmd <- 02
1574 12:59:50.316090 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 12:59:50.318903 PCI: 00:16.0 cmd <- 02
1576 12:59:50.322923 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 12:59:50.326171 PCI: 00:19.1 cmd <- 02
1578 12:59:50.329344 PCI: 00:1d.0 bridge ctrl <- 0013
1579 12:59:50.332709 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 12:59:50.333284 PCI: 00:1d.0 cmd <- 06
1581 12:59:50.339447 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 12:59:50.340129 PCI: 00:1e.0 cmd <- 06
1583 12:59:50.342898 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 12:59:50.346215 PCI: 00:1e.2 cmd <- 06
1585 12:59:50.349196 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 12:59:50.352431 PCI: 00:1e.3 cmd <- 02
1587 12:59:50.355611 PCI: 00:1f.0 subsystem <- 8086/a087
1588 12:59:50.359388 PCI: 00:1f.0 cmd <- 407
1589 12:59:50.362730 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 12:59:50.365800 PCI: 00:1f.3 cmd <- 02
1591 12:59:50.369108 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 12:59:50.372096 PCI: 00:1f.5 cmd <- 406
1593 12:59:50.375826 PCI: 01:00.0 cmd <- 02
1594 12:59:50.380636 done.
1595 12:59:50.383851 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 12:59:50.387001 Initializing devices...
1597 12:59:50.390146 Root Device init
1598 12:59:50.393784 Chrome EC: Set SMI mask to 0x0000000000000000
1599 12:59:50.400581 Chrome EC: clear events_b mask to 0x0000000000000000
1600 12:59:50.406822 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 12:59:50.409898 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 12:59:50.416969 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 12:59:50.423890 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 12:59:50.429889 fw_config match found: DB_USB=USB3_ACTIVE
1605 12:59:50.433841 Configure Right Type-C port orientation for retimer
1606 12:59:50.437058 Root Device init finished in 44 msecs
1607 12:59:50.440141 PCI: 00:00.0 init
1608 12:59:50.443893 CPU TDP = 9 Watts
1609 12:59:50.444484 CPU PL1 = 9 Watts
1610 12:59:50.447033 CPU PL2 = 40 Watts
1611 12:59:50.450102 CPU PL4 = 83 Watts
1612 12:59:50.453832 PCI: 00:00.0 init finished in 8 msecs
1613 12:59:50.454260 PCI: 00:02.0 init
1614 12:59:50.457182 GMA: Found VBT in CBFS
1615 12:59:50.460135 GMA: Found valid VBT in CBFS
1616 12:59:50.467282 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 12:59:50.473327 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 12:59:50.476587 PCI: 00:02.0 init finished in 18 msecs
1619 12:59:50.480320 PCI: 00:05.0 init
1620 12:59:50.483561 PCI: 00:05.0 init finished in 0 msecs
1621 12:59:50.486753 PCI: 00:08.0 init
1622 12:59:50.489865 PCI: 00:08.0 init finished in 0 msecs
1623 12:59:50.493680 PCI: 00:14.0 init
1624 12:59:50.496734 PCI: 00:14.0 init finished in 0 msecs
1625 12:59:50.500040 PCI: 00:14.2 init
1626 12:59:50.503673 PCI: 00:14.2 init finished in 0 msecs
1627 12:59:50.506864 PCI: 00:15.0 init
1628 12:59:50.507298 I2C bus 0 version 0x3230302a
1629 12:59:50.513339 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 12:59:50.516545 PCI: 00:15.0 init finished in 6 msecs
1631 12:59:50.516981 PCI: 00:15.1 init
1632 12:59:50.520433 I2C bus 1 version 0x3230302a
1633 12:59:50.523206 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 12:59:50.526262 PCI: 00:15.1 init finished in 6 msecs
1635 12:59:50.529770 PCI: 00:15.2 init
1636 12:59:50.533490 I2C bus 2 version 0x3230302a
1637 12:59:50.536835 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 12:59:50.540015 PCI: 00:15.2 init finished in 6 msecs
1639 12:59:50.543149 PCI: 00:15.3 init
1640 12:59:50.546980 I2C bus 3 version 0x3230302a
1641 12:59:50.549997 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 12:59:50.553205 PCI: 00:15.3 init finished in 6 msecs
1643 12:59:50.556904 PCI: 00:16.0 init
1644 12:59:50.560091 PCI: 00:16.0 init finished in 0 msecs
1645 12:59:50.563299 PCI: 00:19.1 init
1646 12:59:50.563394 I2C bus 5 version 0x3230302a
1647 12:59:50.569805 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 12:59:50.573380 PCI: 00:19.1 init finished in 6 msecs
1649 12:59:50.573485 PCI: 00:1d.0 init
1650 12:59:50.576590 Initializing PCH PCIe bridge.
1651 12:59:50.579690 PCI: 00:1d.0 init finished in 3 msecs
1652 12:59:50.583985 PCI: 00:1f.0 init
1653 12:59:50.587279 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 12:59:50.594024 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 12:59:50.594144 IOAPIC: ID = 0x02
1656 12:59:50.597110 IOAPIC: Dumping registers
1657 12:59:50.600873 reg 0x0000: 0x02000000
1658 12:59:50.604042 reg 0x0001: 0x00770020
1659 12:59:50.604193 reg 0x0002: 0x00000000
1660 12:59:50.610762 PCI: 00:1f.0 init finished in 21 msecs
1661 12:59:50.610914 PCI: 00:1f.2 init
1662 12:59:50.613814 Disabling ACPI via APMC.
1663 12:59:50.617589 APMC done.
1664 12:59:50.620874 PCI: 00:1f.2 init finished in 5 msecs
1665 12:59:50.632371 PCI: 01:00.0 init
1666 12:59:50.635431 PCI: 01:00.0 init finished in 0 msecs
1667 12:59:50.639345 PNP: 0c09.0 init
1668 12:59:50.642557 Google Chrome EC uptime: 8.404 seconds
1669 12:59:50.648941 Google Chrome AP resets since EC boot: 1
1670 12:59:50.652672 Google Chrome most recent AP reset causes:
1671 12:59:50.655785 0.348: 32775 shutdown: entering G3
1672 12:59:50.662164 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 12:59:50.665356 PNP: 0c09.0 init finished in 22 msecs
1674 12:59:50.671141 Devices initialized
1675 12:59:50.674834 Show all devs... After init.
1676 12:59:50.677957 Root Device: enabled 1
1677 12:59:50.678052 DOMAIN: 0000: enabled 1
1678 12:59:50.681084 CPU_CLUSTER: 0: enabled 1
1679 12:59:50.684810 PCI: 00:00.0: enabled 1
1680 12:59:50.688272 PCI: 00:02.0: enabled 1
1681 12:59:50.688375 PCI: 00:04.0: enabled 1
1682 12:59:50.691293 PCI: 00:05.0: enabled 1
1683 12:59:50.694535 PCI: 00:06.0: enabled 0
1684 12:59:50.698263 PCI: 00:07.0: enabled 0
1685 12:59:50.698386 PCI: 00:07.1: enabled 0
1686 12:59:50.701445 PCI: 00:07.2: enabled 0
1687 12:59:50.704741 PCI: 00:07.3: enabled 0
1688 12:59:50.708070 PCI: 00:08.0: enabled 1
1689 12:59:50.708220 PCI: 00:09.0: enabled 0
1690 12:59:50.711279 PCI: 00:0a.0: enabled 0
1691 12:59:50.714492 PCI: 00:0d.0: enabled 1
1692 12:59:50.718164 PCI: 00:0d.1: enabled 0
1693 12:59:50.718363 PCI: 00:0d.2: enabled 0
1694 12:59:50.721377 PCI: 00:0d.3: enabled 0
1695 12:59:50.724354 PCI: 00:0e.0: enabled 0
1696 12:59:50.724641 PCI: 00:10.2: enabled 1
1697 12:59:50.728447 PCI: 00:10.6: enabled 0
1698 12:59:50.731723 PCI: 00:10.7: enabled 0
1699 12:59:50.734658 PCI: 00:12.0: enabled 0
1700 12:59:50.735059 PCI: 00:12.6: enabled 0
1701 12:59:50.738404 PCI: 00:13.0: enabled 0
1702 12:59:50.741626 PCI: 00:14.0: enabled 1
1703 12:59:50.744948 PCI: 00:14.1: enabled 0
1704 12:59:50.745440 PCI: 00:14.2: enabled 1
1705 12:59:50.748080 PCI: 00:14.3: enabled 1
1706 12:59:50.751128 PCI: 00:15.0: enabled 1
1707 12:59:50.754899 PCI: 00:15.1: enabled 1
1708 12:59:50.755337 PCI: 00:15.2: enabled 1
1709 12:59:50.758066 PCI: 00:15.3: enabled 1
1710 12:59:50.761412 PCI: 00:16.0: enabled 1
1711 12:59:50.761850 PCI: 00:16.1: enabled 0
1712 12:59:50.764383 PCI: 00:16.2: enabled 0
1713 12:59:50.768123 PCI: 00:16.3: enabled 0
1714 12:59:50.771199 PCI: 00:16.4: enabled 0
1715 12:59:50.771635 PCI: 00:16.5: enabled 0
1716 12:59:50.774469 PCI: 00:17.0: enabled 0
1717 12:59:50.778208 PCI: 00:19.0: enabled 0
1718 12:59:50.781231 PCI: 00:19.1: enabled 1
1719 12:59:50.781630 PCI: 00:19.2: enabled 0
1720 12:59:50.784515 PCI: 00:1c.0: enabled 1
1721 12:59:50.788216 PCI: 00:1c.1: enabled 0
1722 12:59:50.791288 PCI: 00:1c.2: enabled 0
1723 12:59:50.791712 PCI: 00:1c.3: enabled 0
1724 12:59:50.794384 PCI: 00:1c.4: enabled 0
1725 12:59:50.797558 PCI: 00:1c.5: enabled 0
1726 12:59:50.801245 PCI: 00:1c.6: enabled 1
1727 12:59:50.801645 PCI: 00:1c.7: enabled 0
1728 12:59:50.804330 PCI: 00:1d.0: enabled 1
1729 12:59:50.808090 PCI: 00:1d.1: enabled 0
1730 12:59:50.808488 PCI: 00:1d.2: enabled 1
1731 12:59:50.811313 PCI: 00:1d.3: enabled 0
1732 12:59:50.814501 PCI: 00:1e.0: enabled 1
1733 12:59:50.817585 PCI: 00:1e.1: enabled 0
1734 12:59:50.817984 PCI: 00:1e.2: enabled 1
1735 12:59:50.821439 PCI: 00:1e.3: enabled 1
1736 12:59:50.824614 PCI: 00:1f.0: enabled 1
1737 12:59:50.827661 PCI: 00:1f.1: enabled 0
1738 12:59:50.828060 PCI: 00:1f.2: enabled 1
1739 12:59:50.830946 PCI: 00:1f.3: enabled 1
1740 12:59:50.834558 PCI: 00:1f.4: enabled 0
1741 12:59:50.837661 PCI: 00:1f.5: enabled 1
1742 12:59:50.838062 PCI: 00:1f.6: enabled 0
1743 12:59:50.840819 PCI: 00:1f.7: enabled 0
1744 12:59:50.844076 APIC: 00: enabled 1
1745 12:59:50.844475 GENERIC: 0.0: enabled 1
1746 12:59:50.847889 GENERIC: 0.0: enabled 1
1747 12:59:50.851067 GENERIC: 1.0: enabled 1
1748 12:59:50.854425 GENERIC: 0.0: enabled 1
1749 12:59:50.854825 GENERIC: 1.0: enabled 1
1750 12:59:50.858129 USB0 port 0: enabled 1
1751 12:59:50.861350 GENERIC: 0.0: enabled 1
1752 12:59:50.861750 USB0 port 0: enabled 1
1753 12:59:50.864481 GENERIC: 0.0: enabled 1
1754 12:59:50.867541 I2C: 00:1a: enabled 1
1755 12:59:50.870816 I2C: 00:31: enabled 1
1756 12:59:50.871218 I2C: 00:32: enabled 1
1757 12:59:50.874751 I2C: 00:10: enabled 1
1758 12:59:50.877880 I2C: 00:15: enabled 1
1759 12:59:50.878303 GENERIC: 0.0: enabled 0
1760 12:59:50.880831 GENERIC: 1.0: enabled 0
1761 12:59:50.883918 GENERIC: 0.0: enabled 1
1762 12:59:50.884284 SPI: 00: enabled 1
1763 12:59:50.887746 SPI: 00: enabled 1
1764 12:59:50.891012 PNP: 0c09.0: enabled 1
1765 12:59:50.891462 GENERIC: 0.0: enabled 1
1766 12:59:50.894182 USB3 port 0: enabled 1
1767 12:59:50.897564 USB3 port 1: enabled 1
1768 12:59:50.898016 USB3 port 2: enabled 0
1769 12:59:50.900613 USB3 port 3: enabled 0
1770 12:59:50.904542 USB2 port 0: enabled 0
1771 12:59:50.907592 USB2 port 1: enabled 1
1772 12:59:50.908027 USB2 port 2: enabled 1
1773 12:59:50.910806 USB2 port 3: enabled 0
1774 12:59:50.914511 USB2 port 4: enabled 1
1775 12:59:50.915012 USB2 port 5: enabled 0
1776 12:59:50.917727 USB2 port 6: enabled 0
1777 12:59:50.920969 USB2 port 7: enabled 0
1778 12:59:50.924245 USB2 port 8: enabled 0
1779 12:59:50.924683 USB2 port 9: enabled 0
1780 12:59:50.927283 USB3 port 0: enabled 0
1781 12:59:50.931050 USB3 port 1: enabled 1
1782 12:59:50.931492 USB3 port 2: enabled 0
1783 12:59:50.934172 USB3 port 3: enabled 0
1784 12:59:50.937388 GENERIC: 0.0: enabled 1
1785 12:59:50.940952 GENERIC: 1.0: enabled 1
1786 12:59:50.941570 APIC: 01: enabled 1
1787 12:59:50.944079 APIC: 03: enabled 1
1788 12:59:50.944524 APIC: 07: enabled 1
1789 12:59:50.947298 APIC: 05: enabled 1
1790 12:59:50.951087 APIC: 04: enabled 1
1791 12:59:50.951700 APIC: 02: enabled 1
1792 12:59:50.954323 APIC: 06: enabled 1
1793 12:59:50.957476 PCI: 01:00.0: enabled 1
1794 12:59:50.960624 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1795 12:59:50.967553 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1796 12:59:50.970744 ELOG: NV offset 0xf30000 size 0x1000
1797 12:59:50.977557 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1798 12:59:50.983769 ELOG: Event(17) added with size 13 at 2022-08-31 12:53:11 UTC
1799 12:59:50.990552 ELOG: Event(92) added with size 9 at 2022-08-31 12:53:11 UTC
1800 12:59:50.997482 ELOG: Event(93) added with size 9 at 2022-08-31 12:53:11 UTC
1801 12:59:51.003763 ELOG: Event(9E) added with size 10 at 2022-08-31 12:53:11 UTC
1802 12:59:51.010793 ELOG: Event(9F) added with size 14 at 2022-08-31 12:53:11 UTC
1803 12:59:51.017043 ELOG: Event(16) added with size 11 at 2022-08-31 12:53:11 UTC
1804 12:59:51.020870 Erasing flash addr f30000 + 4 KiB
1805 12:59:51.079118 BS: BS_DEV_INIT exit times (exec / console): 32 / 55 ms
1806 12:59:51.085397 ELOG: Event(A1) added with size 10 at 2022-08-31 12:53:11 UTC
1807 12:59:51.092221 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1808 12:59:51.099011 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1809 12:59:51.099560 Finalize devices...
1810 12:59:51.102142 Devices finalized
1811 12:59:51.109118 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1812 12:59:51.112252 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1813 12:59:51.118715 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1814 12:59:51.121928 ME: HFSTS1 : 0x80030055
1815 12:59:51.128712 ME: HFSTS2 : 0x30280116
1816 12:59:51.131951 ME: HFSTS3 : 0x00000050
1817 12:59:51.135676 ME: HFSTS4 : 0x00004000
1818 12:59:51.141642 ME: HFSTS5 : 0x00000000
1819 12:59:51.145202 ME: HFSTS6 : 0x00400006
1820 12:59:51.148331 ME: Manufacturing Mode : YES
1821 12:59:51.151657 ME: SPI Protection Mode Enabled : NO
1822 12:59:51.154835 ME: FW Partition Table : OK
1823 12:59:51.161868 ME: Bringup Loader Failure : NO
1824 12:59:51.165044 ME: Firmware Init Complete : NO
1825 12:59:51.168286 ME: Boot Options Present : NO
1826 12:59:51.171471 ME: Update In Progress : NO
1827 12:59:51.174681 ME: D0i3 Support : YES
1828 12:59:51.178624 ME: Low Power State Enabled : NO
1829 12:59:51.181759 ME: CPU Replaced : YES
1830 12:59:51.184898 ME: CPU Replacement Valid : YES
1831 12:59:51.191699 ME: Current Working State : 5
1832 12:59:51.194713 ME: Current Operation State : 1
1833 12:59:51.198399 ME: Current Operation Mode : 3
1834 12:59:51.201611 ME: Error Code : 0
1835 12:59:51.204817 ME: Enhanced Debug Mode : NO
1836 12:59:51.208116 ME: CPU Debug Disabled : YES
1837 12:59:51.211282 ME: TXT Support : NO
1838 12:59:51.218163 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1839 12:59:51.224571 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1840 12:59:51.228174 CBFS: 'fallback/slic' not found.
1841 12:59:51.234630 ACPI: Writing ACPI tables at 76b01000.
1842 12:59:51.235066 ACPI: * FACS
1843 12:59:51.237739 ACPI: * DSDT
1844 12:59:51.241190 Ramoops buffer: 0x100000@0x76a00000.
1845 12:59:51.244236 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1846 12:59:51.247974 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1847 12:59:51.252518 Google Chrome EC: version:
1848 12:59:51.255612 ro: voema_v2.0.7540-147f8d37d1
1849 12:59:51.258773 rw: voema_v2.0.7540-147f8d37d1
1850 12:59:51.262721 running image: 2
1851 12:59:51.269089 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1852 12:59:51.272177 ACPI: * FADT
1853 12:59:51.272604 SCI is IRQ9
1854 12:59:51.275418 ACPI: added table 1/32, length now 40
1855 12:59:51.279229 ACPI: * SSDT
1856 12:59:51.282339 Found 1 CPU(s) with 8 core(s) each.
1857 12:59:51.285448 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1858 12:59:51.291980 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1859 12:59:51.295424 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1860 12:59:51.298570 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1861 12:59:51.305359 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1862 12:59:51.312331 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1863 12:59:51.315497 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1864 12:59:51.321952 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1865 12:59:51.328798 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1866 12:59:51.331949 \_SB.PCI0.RP09: Added StorageD3Enable property
1867 12:59:51.335144 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1868 12:59:51.342114 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1869 12:59:51.348844 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1870 12:59:51.351955 PS2K: Passing 80 keymaps to kernel
1871 12:59:51.358558 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1872 12:59:51.365748 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1873 12:59:51.372099 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1874 12:59:51.378887 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1875 12:59:51.385229 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1876 12:59:51.392245 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1877 12:59:51.399115 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1878 12:59:51.405780 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1879 12:59:51.408794 ACPI: added table 2/32, length now 44
1880 12:59:51.409293 ACPI: * MCFG
1881 12:59:51.412042 ACPI: added table 3/32, length now 48
1882 12:59:51.415612 ACPI: * TPM2
1883 12:59:51.418650 TPM2 log created at 0x769f0000
1884 12:59:51.421802 ACPI: added table 4/32, length now 52
1885 12:59:51.422238 ACPI: * MADT
1886 12:59:51.425693 SCI is IRQ9
1887 12:59:51.428900 ACPI: added table 5/32, length now 56
1888 12:59:51.432167 current = 76b09850
1889 12:59:51.432599 ACPI: * DMAR
1890 12:59:51.435358 ACPI: added table 6/32, length now 60
1891 12:59:51.438505 ACPI: added table 7/32, length now 64
1892 12:59:51.441726 ACPI: * HPET
1893 12:59:51.445513 ACPI: added table 8/32, length now 68
1894 12:59:51.446087 ACPI: done.
1895 12:59:51.448633 ACPI tables: 35216 bytes.
1896 12:59:51.451649 smbios_write_tables: 769ef000
1897 12:59:51.455505 EC returned error result code 3
1898 12:59:51.458781 Couldn't obtain OEM name from CBI
1899 12:59:51.462507 Create SMBIOS type 16
1900 12:59:51.465721 Create SMBIOS type 17
1901 12:59:51.469051 GENERIC: 0.0 (WIFI Device)
1902 12:59:51.469534 SMBIOS tables: 1750 bytes.
1903 12:59:51.475688 Writing table forward entry at 0x00000500
1904 12:59:51.482581 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1905 12:59:51.485638 Writing coreboot table at 0x76b25000
1906 12:59:51.492467 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1907 12:59:51.495484 1. 0000000000001000-000000000009ffff: RAM
1908 12:59:51.498701 2. 00000000000a0000-00000000000fffff: RESERVED
1909 12:59:51.505714 3. 0000000000100000-00000000769eefff: RAM
1910 12:59:51.509131 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1911 12:59:51.515552 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1912 12:59:51.522007 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1913 12:59:51.525311 7. 0000000077000000-000000007fbfffff: RESERVED
1914 12:59:51.528599 8. 00000000c0000000-00000000cfffffff: RESERVED
1915 12:59:51.535488 9. 00000000f8000000-00000000f9ffffff: RESERVED
1916 12:59:51.538682 10. 00000000fb000000-00000000fb000fff: RESERVED
1917 12:59:51.544823 11. 00000000fe000000-00000000fe00ffff: RESERVED
1918 12:59:51.548637 12. 00000000fed80000-00000000fed87fff: RESERVED
1919 12:59:51.554928 13. 00000000fed90000-00000000fed92fff: RESERVED
1920 12:59:51.558623 14. 00000000feda0000-00000000feda1fff: RESERVED
1921 12:59:51.565122 15. 00000000fedc0000-00000000feddffff: RESERVED
1922 12:59:51.568382 16. 0000000100000000-00000002803fffff: RAM
1923 12:59:51.571753 Passing 4 GPIOs to payload:
1924 12:59:51.575373 NAME | PORT | POLARITY | VALUE
1925 12:59:51.581870 lid | undefined | high | high
1926 12:59:51.584959 power | undefined | high | low
1927 12:59:51.592098 oprom | undefined | high | low
1928 12:59:51.598301 EC in RW | 0x000000e5 | high | high
1929 12:59:51.605039 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5aa9
1930 12:59:51.605521 coreboot table: 1576 bytes.
1931 12:59:51.611948 IMD ROOT 0. 0x76fff000 0x00001000
1932 12:59:51.615110 IMD SMALL 1. 0x76ffe000 0x00001000
1933 12:59:51.618111 FSP MEMORY 2. 0x76c4e000 0x003b0000
1934 12:59:51.621877 VPD 3. 0x76c4d000 0x00000367
1935 12:59:51.625034 RO MCACHE 4. 0x76c4c000 0x00000fdc
1936 12:59:51.628293 CONSOLE 5. 0x76c2c000 0x00020000
1937 12:59:51.631985 FMAP 6. 0x76c2b000 0x00000578
1938 12:59:51.635057 TIME STAMP 7. 0x76c2a000 0x00000910
1939 12:59:51.638328 VBOOT WORK 8. 0x76c16000 0x00014000
1940 12:59:51.645176 ROMSTG STCK 9. 0x76c15000 0x00001000
1941 12:59:51.648300 AFTER CAR 10. 0x76c0a000 0x0000b000
1942 12:59:51.652022 RAMSTAGE 11. 0x76b97000 0x00073000
1943 12:59:51.655174 REFCODE 12. 0x76b42000 0x00055000
1944 12:59:51.658259 SMM BACKUP 13. 0x76b32000 0x00010000
1945 12:59:51.661538 4f444749 14. 0x76b30000 0x00002000
1946 12:59:51.665289 EXT VBT15. 0x76b2d000 0x0000219f
1947 12:59:51.668453 COREBOOT 16. 0x76b25000 0x00008000
1948 12:59:51.671528 ACPI 17. 0x76b01000 0x00024000
1949 12:59:51.678530 ACPI GNVS 18. 0x76b00000 0x00001000
1950 12:59:51.681648 RAMOOPS 19. 0x76a00000 0x00100000
1951 12:59:51.684847 TPM2 TCGLOG20. 0x769f0000 0x00010000
1952 12:59:51.688528 SMBIOS 21. 0x769ef000 0x00000800
1953 12:59:51.688933 IMD small region:
1954 12:59:51.694835 IMD ROOT 0. 0x76ffec00 0x00000400
1955 12:59:51.698561 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1956 12:59:51.701612 POWER STATE 2. 0x76ffeb80 0x00000044
1957 12:59:51.704818 ROMSTAGE 3. 0x76ffeb60 0x00000004
1958 12:59:51.708441 MEM INFO 4. 0x76ffe980 0x000001e0
1959 12:59:51.715246 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1960 12:59:51.718400 MTRR: Physical address space:
1961 12:59:51.724775 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1962 12:59:51.731895 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1963 12:59:51.738339 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1964 12:59:51.745148 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1965 12:59:51.748337 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1966 12:59:51.755047 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1967 12:59:51.761355 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1968 12:59:51.765176 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 12:59:51.771554 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 12:59:51.775376 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 12:59:51.778479 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 12:59:51.781681 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 12:59:51.788031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 12:59:51.791843 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 12:59:51.794980 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 12:59:51.798013 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 12:59:51.804669 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 12:59:51.808041 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 12:59:51.811635 call enable_fixed_mtrr()
1980 12:59:51.814770 CPU physical address size: 39 bits
1981 12:59:51.817994 MTRR: default type WB/UC MTRR counts: 6/6.
1982 12:59:51.821301 MTRR: UC selected as default type.
1983 12:59:51.828221 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1984 12:59:51.834584 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1985 12:59:51.841443 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1986 12:59:51.848210 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1987 12:59:51.854478 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1988 12:59:51.861354 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1989 12:59:51.861819
1990 12:59:51.862199 MTRR check
1991 12:59:51.864376 Fixed MTRRs : Enabled
1992 12:59:51.868226 Variable MTRRs: Enabled
1993 12:59:51.868671
1994 12:59:51.871345 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 12:59:51.874767 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 12:59:51.881039 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 12:59:51.884833 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 12:59:51.888003 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 12:59:51.891282 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 12:59:51.897570 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 12:59:51.900828 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 12:59:51.904527 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 12:59:51.907716 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 12:59:51.914576 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 12:59:51.921185 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2006 12:59:51.921679 call enable_fixed_mtrr()
2007 12:59:51.924255 Checking cr50 for pending updates
2008 12:59:51.927522 CPU physical address size: 39 bits
2009 12:59:51.934380 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 12:59:51.937556 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 12:59:51.941547 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 12:59:51.944469 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 12:59:51.951334 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 12:59:51.954520 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 12:59:51.957723 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 12:59:51.960835 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 12:59:51.967618 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 12:59:51.970731 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 12:59:51.974084 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 12:59:51.977326 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 12:59:51.984929 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 12:59:51.988129 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 12:59:51.991337 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 12:59:51.994487 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 12:59:52.001622 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 12:59:52.004672 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 12:59:52.007730 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 12:59:52.010962 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 12:59:52.017824 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 12:59:52.021034 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 12:59:52.024158 call enable_fixed_mtrr()
2032 12:59:52.028001 call enable_fixed_mtrr()
2033 12:59:52.031112 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 12:59:52.034137 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 12:59:52.037420 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 12:59:52.044240 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 12:59:52.047480 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 12:59:52.050599 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 12:59:52.053771 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 12:59:52.060760 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 12:59:52.063919 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 12:59:52.067081 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 12:59:52.070853 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 12:59:52.077354 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 12:59:52.080309 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:59:52.083405 call enable_fixed_mtrr()
2047 12:59:52.086721 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 12:59:52.090644 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 12:59:52.097020 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 12:59:52.100063 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 12:59:52.103922 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 12:59:52.106905 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 12:59:52.113844 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 12:59:52.116984 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 12:59:52.120037 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 12:59:52.123337 CPU physical address size: 39 bits
2057 12:59:52.127722 call enable_fixed_mtrr()
2058 12:59:52.131296 CPU physical address size: 39 bits
2059 12:59:52.135136 CPU physical address size: 39 bits
2060 12:59:52.141440 MTRR: Fixed MSR 0x250 0x0606060606060606
2061 12:59:52.144648 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 12:59:52.148492 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 12:59:52.151436 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 12:59:52.158633 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 12:59:52.161619 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 12:59:52.164749 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 12:59:52.168513 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 12:59:52.174826 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 12:59:52.177965 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 12:59:52.181280 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 12:59:52.184858 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 12:59:52.191823 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 12:59:52.195733 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 12:59:52.198815 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 12:59:52.202012 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 12:59:52.208421 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 12:59:52.212108 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 12:59:52.215520 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 12:59:52.218766 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 12:59:52.225472 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 12:59:52.228758 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 12:59:52.231831 call enable_fixed_mtrr()
2083 12:59:52.234980 call enable_fixed_mtrr()
2084 12:59:52.239376 CPU physical address size: 39 bits
2085 12:59:52.239815 Reading cr50 TPM mode
2086 12:59:52.242287 CPU physical address size: 39 bits
2087 12:59:52.246245 CPU physical address size: 39 bits
2088 12:59:52.252645 BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms
2089 12:59:52.262883 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2090 12:59:52.266042 Checking segment from ROM address 0xffc02b38
2091 12:59:52.269001 Checking segment from ROM address 0xffc02b54
2092 12:59:52.275902 Loading segment from ROM address 0xffc02b38
2093 12:59:52.276337 code (compression=0)
2094 12:59:52.286061 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2095 12:59:52.295766 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2096 12:59:52.296205 it's not compressed!
2097 12:59:52.435686 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2098 12:59:52.442191 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2099 12:59:52.449093 Loading segment from ROM address 0xffc02b54
2100 12:59:52.449671 Entry Point 0x30000000
2101 12:59:52.452285 Loaded segments
2102 12:59:52.458494 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2103 12:59:52.501796 Finalizing chipset.
2104 12:59:52.504675 Finalizing SMM.
2105 12:59:52.505130 APMC done.
2106 12:59:52.511809 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2107 12:59:52.514969 mp_park_aps done after 0 msecs.
2108 12:59:52.518582 Jumping to boot code at 0x30000000(0x76b25000)
2109 12:59:52.528536 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2110 12:59:52.528964
2111 12:59:52.531685 Starting depthcharge on Voema...
2112 12:59:52.532733 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2113 12:59:52.533298 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2114 12:59:52.533773 Setting prompt string to ['volteer:']
2115 12:59:52.534198 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2116 12:59:52.541639 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2117 12:59:52.548163 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2118 12:59:52.551139 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2119 12:59:52.558278 Failed to find eMMC card reader
2120 12:59:52.558681 Wipe memory regions:
2121 12:59:52.564408 [0x00000000001000, 0x000000000a0000)
2122 12:59:52.568298 [0x00000000100000, 0x00000030000000)
2123 12:59:52.596177 [0x00000032662db0, 0x000000769ef000)
2124 12:59:52.635199 [0x00000100000000, 0x00000280400000)
2125 12:59:52.840918 ec_init: CrosEC protocol v3 supported (256, 256)
2126 12:59:52.847776 update_port_state: port C0 state: usb enable 1 mux conn 0
2127 12:59:52.854064 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2128 12:59:52.862276 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2129 12:59:52.865374 send_conn_disc_msg: pmc_send_cmd succeeded
2130 12:59:53.296445 R8152: Initializing
2131 12:59:53.300105 Version 6 (ocp_data = 5c30)
2132 12:59:53.303338 R8152: Done initializing
2133 12:59:53.306530 Adding net device
2134 12:59:53.611552 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2135 12:59:53.612046
2136 12:59:53.615057 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2138 12:59:53.716634 volteer: tftpboot 192.168.201.1 7148204/tftp-deploy-3pvs8l_u/kernel/bzImage 7148204/tftp-deploy-3pvs8l_u/kernel/cmdline 7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
2139 12:59:53.717209 Setting prompt string to 'Starting kernel'
2140 12:59:53.717609 Setting prompt string to ['Starting kernel']
2141 12:59:53.717961 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2142 12:59:53.718355 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2143 12:59:53.722132 tftpboot 192.168.201.1 7148204/tftp-deploy-3pvs8l_u/kernel/bzImoy-3pvs8l_u/kernel/cmdline 7148204/tftp-deploy-3pvs8l_u/ramdisk/ramdisk.cpio.gz
2144 12:59:53.722610 Waiting for link
2145 12:59:53.926771 done.
2146 12:59:53.927298 MAC: 00:24:32:30:7e:47
2147 12:59:53.929725 Sending DHCP discover... done.
2148 12:59:53.933132 Waiting for reply... done.
2149 12:59:53.936152 Sending DHCP request... done.
2150 12:59:53.939395 Waiting for reply... done.
2151 12:59:53.942679 My ip is 192.168.201.16
2152 12:59:53.946368 The DHCP server ip is 192.168.201.1
2153 12:59:53.949493 TFTP server IP predefined by user: 192.168.201.1
2154 12:59:53.956420 Bootfile predefined by user: 7148204/tftp-deploy-3pvs8l_u/kernel/bzImage
2155 12:59:53.959536 Sending tftp read request... done.
2156 12:59:53.966883 Waiting for the transfer...
2157 12:59:54.614797 00000000 ################################################################
2158 12:59:55.219574 00080000 ################################################################
2159 12:59:55.779913 00100000 ################################################################
2160 12:59:56.370662 00180000 ################################################################
2161 12:59:56.947440 00200000 ################################################################
2162 12:59:57.505915 00280000 ################################################################
2163 12:59:58.057394 00300000 ################################################################
2164 12:59:58.599621 00380000 ################################################################
2165 12:59:59.138360 00400000 ################################################################
2166 12:59:59.678054 00480000 ################################################################
2167 13:00:00.243233 00500000 ################################################################
2168 13:00:00.793651 00580000 ################################################################
2169 13:00:01.340693 00600000 ################################################################
2170 13:00:01.896849 00680000 ################################################################
2171 13:00:02.459410 00700000 ################################################################
2172 13:00:03.023775 00780000 ################################################################
2173 13:00:03.578282 00800000 ################################################################
2174 13:00:03.619490 00880000 ###### done.
2175 13:00:03.622686 The bootfile was 8953856 bytes long.
2176 13:00:03.626308 Sending tftp read request... done.
2177 13:00:03.629363 Waiting for the transfer...
2178 13:00:04.205703 00000000 ################################################################
2179 13:00:04.798816 00080000 ################################################################
2180 13:00:05.504409 00100000 ################################################################
2181 13:00:06.238199 00180000 ################################################################
2182 13:00:06.980818 00200000 ################################################################
2183 13:00:07.700022 00280000 ################################################################
2184 13:00:08.452009 00300000 ################################################################
2185 13:00:09.181295 00380000 ################################################################
2186 13:00:09.912808 00400000 ################################################################
2187 13:00:10.599017 00480000 ################################################################
2188 13:00:10.950778 00500000 ################################ done.
2189 13:00:10.954013 Sending tftp read request... done.
2190 13:00:10.956981 Waiting for the transfer...
2191 13:00:10.957516 00000000 # done.
2192 13:00:10.967233 Command line loaded dynamically from TFTP file: 7148204/tftp-deploy-3pvs8l_u/kernel/cmdline
2193 13:00:10.990361 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7148204/extract-nfsrootfs-79znunj9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 13:00:10.997155 Shutting down all USB controllers.
2195 13:00:10.997634 Removing current net device
2196 13:00:11.000232 Finalizing coreboot
2197 13:00:11.006499 Exiting depthcharge with code 4 at timestamp: 27178045
2198 13:00:11.006937
2199 13:00:11.007285 Starting kernel ...
2200 13:00:11.007605
2201 13:00:11.007935
2202 13:00:11.008737 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2203 13:00:11.009263 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2204 13:00:11.009649 Setting prompt string to ['Linux version [0-9]']
2205 13:00:11.010013 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2206 13:00:11.010371 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2208 13:04:36.010036 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2210 13:04:36.010984 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2212 13:04:36.011744 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2215 13:04:36.012995 end: 2 depthcharge-action (duration 00:05:00) [common]
2217 13:04:36.014066 Cleaning after the job
2218 13:04:36.014455 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/ramdisk
2219 13:04:36.014984 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/kernel
2220 13:04:36.015649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/nfsrootfs
2221 13:04:36.064224 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7148204/tftp-deploy-3pvs8l_u/modules
2222 13:04:36.064553 start: 4.1 power-off (timeout 00:00:30) [common]
2223 13:04:36.064730 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2224 13:04:36.086565 >> Command sent successfully.
2225 13:04:36.088606 Returned 0 in 0 seconds
2226 13:04:36.189633 end: 4.1 power-off (duration 00:00:00) [common]
2228 13:04:36.190916 start: 4.2 read-feedback (timeout 00:10:00) [common]
2229 13:04:36.191904 Listened to connection for namespace 'common' for up to 1s
2230 13:04:37.193376 Finalising connection for namespace 'common'
2231 13:04:37.194042 Disconnecting from shell: Finalise
2232 13:04:37.295414 end: 4.2 read-feedback (duration 00:00:01) [common]
2233 13:04:37.295991 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7148204
2234 13:04:37.492393 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7148204
2235 13:04:37.492590 JobError: Your job cannot terminate cleanly.