Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 09:02:23.761672 lava-dispatcher, installed at version: 2022.06
2 09:02:23.761873 start: 0 validate
3 09:02:23.762016 Start time: 2022-09-27 09:02:23.762009+00:00 (UTC)
4 09:02:23.762160 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:02:23.762293 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Finitrd.cpio.gz exists
6 09:02:23.765119 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:02:23.765308 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.259-cip82%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:02:27.266931 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:02:27.267094 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220923.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:02:27.268649 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:02:27.268763 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.259-cip82%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:02:27.275464 validate duration: 3.51
14 09:02:27.275765 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:02:27.275894 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:02:27.276004 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:02:27.276101 Not decompressing ramdisk as can be used compressed.
18 09:02:27.276223 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/initrd.cpio.gz
19 09:02:27.276289 saving as /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/ramdisk/initrd.cpio.gz
20 09:02:27.276350 total size: 5431599 (5MB)
21 09:02:27.278854 progress 0% (0MB)
22 09:02:27.285176 progress 5% (0MB)
23 09:02:27.289809 progress 10% (0MB)
24 09:02:27.294336 progress 15% (0MB)
25 09:02:27.300094 progress 20% (1MB)
26 09:02:27.304270 progress 25% (1MB)
27 09:02:27.309584 progress 30% (1MB)
28 09:02:27.314664 progress 35% (1MB)
29 09:02:27.319921 progress 40% (2MB)
30 09:02:27.324225 progress 45% (2MB)
31 09:02:27.328804 progress 50% (2MB)
32 09:02:27.334189 progress 55% (2MB)
33 09:02:27.338678 progress 60% (3MB)
34 09:02:27.344142 progress 65% (3MB)
35 09:02:27.348716 progress 70% (3MB)
36 09:02:27.355200 progress 75% (3MB)
37 09:02:27.362705 progress 80% (4MB)
38 09:02:27.369734 progress 85% (4MB)
39 09:02:27.375932 progress 90% (4MB)
40 09:02:27.382815 progress 95% (4MB)
41 09:02:27.389060 progress 100% (5MB)
42 09:02:27.389340 5MB downloaded in 0.11s (45.85MB/s)
43 09:02:27.389505 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:02:27.389758 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:02:27.389849 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:02:27.389938 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:02:27.390047 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.259-cip82/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:02:27.390116 saving as /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/kernel/bzImage
50 09:02:27.390177 total size: 9265152 (8MB)
51 09:02:27.390241 No compression specified
52 09:02:27.397792 progress 0% (0MB)
53 09:02:27.416752 progress 5% (0MB)
54 09:02:27.429265 progress 10% (0MB)
55 09:02:27.445339 progress 15% (1MB)
56 09:02:27.459475 progress 20% (1MB)
57 09:02:27.472143 progress 25% (2MB)
58 09:02:27.483373 progress 30% (2MB)
59 09:02:27.499273 progress 35% (3MB)
60 09:02:27.514068 progress 40% (3MB)
61 09:02:27.530363 progress 45% (4MB)
62 09:02:27.544791 progress 50% (4MB)
63 09:02:27.563409 progress 55% (4MB)
64 09:02:27.581573 progress 60% (5MB)
65 09:02:27.598710 progress 65% (5MB)
66 09:02:27.613846 progress 70% (6MB)
67 09:02:27.634045 progress 75% (6MB)
68 09:02:27.652566 progress 80% (7MB)
69 09:02:27.671407 progress 85% (7MB)
70 09:02:27.682279 progress 90% (7MB)
71 09:02:27.691870 progress 95% (8MB)
72 09:02:27.703034 progress 100% (8MB)
73 09:02:27.703303 8MB downloaded in 0.31s (28.22MB/s)
74 09:02:27.703458 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:02:27.703715 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:02:27.703815 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:02:27.703906 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:02:27.704017 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220923.1/amd64/full.rootfs.tar.xz
80 09:02:27.704089 saving as /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/nfsrootfs/full.rootfs.tar
81 09:02:27.704153 total size: 133274540 (127MB)
82 09:02:27.704216 Using unxz to decompress xz
83 09:02:27.712391 progress 0% (0MB)
84 09:02:28.089210 progress 5% (6MB)
85 09:02:28.481191 progress 10% (12MB)
86 09:02:28.795112 progress 15% (19MB)
87 09:02:28.995464 progress 20% (25MB)
88 09:02:29.253337 progress 25% (31MB)
89 09:02:29.607629 progress 30% (38MB)
90 09:02:29.972457 progress 35% (44MB)
91 09:02:30.374181 progress 40% (50MB)
92 09:02:30.765264 progress 45% (57MB)
93 09:02:31.131333 progress 50% (63MB)
94 09:02:31.509806 progress 55% (69MB)
95 09:02:31.879236 progress 60% (76MB)
96 09:02:32.251271 progress 65% (82MB)
97 09:02:32.619062 progress 70% (89MB)
98 09:02:32.983768 progress 75% (95MB)
99 09:02:33.428524 progress 80% (101MB)
100 09:02:33.873187 progress 85% (108MB)
101 09:02:34.141353 progress 90% (114MB)
102 09:02:34.496153 progress 95% (120MB)
103 09:02:34.901082 progress 100% (127MB)
104 09:02:34.906205 127MB downloaded in 7.20s (17.65MB/s)
105 09:02:34.906460 end: 1.3.1 http-download (duration 00:00:07) [common]
107 09:02:34.906722 end: 1.3 download-retry (duration 00:00:07) [common]
108 09:02:34.906817 start: 1.4 download-retry (timeout 00:09:52) [common]
109 09:02:34.906908 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 09:02:34.907025 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.259-cip82/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:02:34.907095 saving as /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/modules/modules.tar
112 09:02:34.907164 total size: 64736 (0MB)
113 09:02:34.907229 Using unxz to decompress xz
114 09:02:35.225383 progress 50% (0MB)
115 09:02:35.231863 progress 100% (0MB)
116 09:02:35.234238 0MB downloaded in 0.33s (0.19MB/s)
117 09:02:35.234467 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:02:35.234726 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:02:35.234824 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 09:02:35.234970 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 09:02:36.503915 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7420058/extract-nfsrootfs-8gekv046
123 09:02:36.504120 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 09:02:36.504227 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 09:02:36.504369 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3
126 09:02:36.504473 makedir: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin
127 09:02:36.504559 makedir: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/tests
128 09:02:36.504644 makedir: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/results
129 09:02:36.504743 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-add-keys
130 09:02:36.504873 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-add-sources
131 09:02:36.504990 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-background-process-start
132 09:02:36.505105 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-background-process-stop
133 09:02:36.505218 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-common-functions
134 09:02:36.505328 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-echo-ipv4
135 09:02:36.505444 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-install-packages
136 09:02:36.505557 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-installed-packages
137 09:02:36.505669 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-os-build
138 09:02:36.505781 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-probe-channel
139 09:02:36.505920 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-probe-ip
140 09:02:36.506085 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-target-ip
141 09:02:36.506227 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-target-mac
142 09:02:36.506376 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-target-storage
143 09:02:36.506488 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-case
144 09:02:36.506600 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-event
145 09:02:36.506708 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-feedback
146 09:02:36.506816 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-raise
147 09:02:36.506924 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-reference
148 09:02:36.507033 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-runner
149 09:02:36.507141 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-set
150 09:02:36.507248 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-test-shell
151 09:02:36.507358 Updating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-install-packages (oe)
152 09:02:36.507471 Updating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/bin/lava-installed-packages (oe)
153 09:02:36.507568 Creating /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/environment
154 09:02:36.507678 LAVA metadata
155 09:02:36.507767 - LAVA_JOB_ID=7420058
156 09:02:36.507831 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:02:36.507971 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 09:02:36.508038 skipped lava-vland-overlay
159 09:02:36.508116 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:02:36.508197 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 09:02:36.508260 skipped lava-multinode-overlay
162 09:02:36.508334 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:02:36.508416 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 09:02:36.508487 Loading test definitions
165 09:02:36.508580 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 09:02:36.508655 Using /lava-7420058 at stage 0
167 09:02:36.508904 uuid=7420058_1.5.2.3.1 testdef=None
168 09:02:36.508995 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 09:02:36.509083 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 09:02:36.509555 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 09:02:36.509786 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 09:02:36.510347 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 09:02:36.510588 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 09:02:36.511138 runner path: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/0/tests/0_dmesg test_uuid 7420058_1.5.2.3.1
177 09:02:36.511292 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 09:02:36.511528 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 09:02:36.511602 Using /lava-7420058 at stage 1
181 09:02:36.512095 uuid=7420058_1.5.2.3.5 testdef=None
182 09:02:36.512188 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 09:02:36.512277 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 09:02:36.512720 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 09:02:36.512969 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 09:02:36.513556 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 09:02:36.513795 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 09:02:36.514347 runner path: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/1/tests/1_bootrr test_uuid 7420058_1.5.2.3.5
191 09:02:36.514491 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 09:02:36.514704 Creating lava-test-runner.conf files
194 09:02:36.514769 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/0 for stage 0
195 09:02:36.514851 - 0_dmesg
196 09:02:36.514926 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7420058/lava-overlay-5tn8ull3/lava-7420058/1 for stage 1
197 09:02:36.515009 - 1_bootrr
198 09:02:36.515101 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 09:02:36.515187 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 09:02:36.520801 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 09:02:36.520908 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 09:02:36.520998 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 09:02:36.521090 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 09:02:36.521178 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 09:02:36.623879 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 09:02:36.624222 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 09:02:36.624341 extracting modules file /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7420058/extract-nfsrootfs-8gekv046
208 09:02:36.628460 extracting modules file /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7420058/extract-overlay-ramdisk-u2qhc23y/ramdisk
209 09:02:36.632260 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 09:02:36.632378 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 09:02:36.632470 [common] Applying overlay to NFS
212 09:02:36.632544 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7420058/compress-overlay-ht6wnd0a/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7420058/extract-nfsrootfs-8gekv046
213 09:02:36.636410 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 09:02:36.636519 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 09:02:36.636620 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 09:02:36.636715 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 09:02:36.636795 Building ramdisk /var/lib/lava/dispatcher/tmp/7420058/extract-overlay-ramdisk-u2qhc23y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7420058/extract-overlay-ramdisk-u2qhc23y/ramdisk
218 09:02:36.670241 >> 24775 blocks
219 09:02:37.149784 rename /var/lib/lava/dispatcher/tmp/7420058/extract-overlay-ramdisk-u2qhc23y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
220 09:02:37.150183 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 09:02:37.150304 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 09:02:37.150410 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 09:02:37.150529 No mkimage arch provided, not using FIT.
224 09:02:37.150618 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 09:02:37.150705 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 09:02:37.150804 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 09:02:37.150895 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 09:02:37.150973 No LXC device requested
229 09:02:37.151055 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 09:02:37.151142 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 09:02:37.151226 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 09:02:37.151294 Checking files for TFTP limit of 4294967296 bytes.
233 09:02:37.151666 end: 1 tftp-deploy (duration 00:00:10) [common]
234 09:02:37.151807 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 09:02:37.151905 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 09:02:37.152030 substitutions:
237 09:02:37.152099 - {DTB}: None
238 09:02:37.152162 - {INITRD}: 7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
239 09:02:37.152240 - {KERNEL}: 7420058/tftp-deploy-ne4uqpnr/kernel/bzImage
240 09:02:37.152300 - {LAVA_MAC}: None
241 09:02:37.152357 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7420058/extract-nfsrootfs-8gekv046
242 09:02:37.152415 - {NFS_SERVER_IP}: 192.168.201.1
243 09:02:37.152471 - {PRESEED_CONFIG}: None
244 09:02:37.152529 - {PRESEED_LOCAL}: None
245 09:02:37.152585 - {RAMDISK}: 7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
246 09:02:37.152641 - {ROOT_PART}: None
247 09:02:37.152696 - {ROOT}: None
248 09:02:37.152751 - {SERVER_IP}: 192.168.201.1
249 09:02:37.152805 - {TEE}: None
250 09:02:37.152860 Parsed boot commands:
251 09:02:37.152914 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 09:02:37.153066 Parsed boot commands: tftpboot 192.168.201.1 7420058/tftp-deploy-ne4uqpnr/kernel/bzImage 7420058/tftp-deploy-ne4uqpnr/kernel/cmdline 7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
253 09:02:37.153157 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 09:02:37.153246 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 09:02:37.153337 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 09:02:37.153424 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 09:02:37.153493 Not connected, no need to disconnect.
258 09:02:37.153570 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 09:02:37.153657 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 09:02:37.153724 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
261 09:02:37.156408 Setting prompt string to ['lava-test: # ']
262 09:02:37.156728 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 09:02:37.156850 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 09:02:37.156951 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 09:02:37.157075 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 09:02:37.157255 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
267 09:02:37.176579 >> Command sent successfully.
268 09:02:37.178428 Returned 0 in 0 seconds
269 09:02:37.279216 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 09:02:37.279551 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 09:02:37.279664 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 09:02:37.279809 Setting prompt string to 'Starting depthcharge on Voema...'
274 09:02:37.279943 Changing prompt to 'Starting depthcharge on Voema...'
275 09:02:37.280095 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 09:02:37.280370 [Enter `^Ec?' for help]
277 09:02:45.584872
278 09:02:45.585052
279 09:02:45.594716 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 09:02:45.601582 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 09:02:45.604392 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 09:02:45.607937 CPU: AES supported, TXT NOT supported, VT supported
283 09:02:45.615055 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 09:02:45.619072 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 09:02:45.625458 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 09:02:45.628423 VBOOT: Loading verstage.
287 09:02:45.631902 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 09:02:45.638933 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 09:02:45.641855 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 09:02:45.652258 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 09:02:45.658639 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 09:02:45.658958
293 09:02:45.659208
294 09:02:45.668883 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 09:02:45.685638 Probing TPM: . done!
296 09:02:45.688830 TPM ready after 0 ms
297 09:02:45.692417 Connected to device vid:did:rid of 1ae0:0028:00
298 09:02:45.703344 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 09:02:45.710349 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 09:02:45.713775 Initialized TPM device CR50 revision 0
301 09:02:45.769875 tlcl_send_startup: Startup return code is 0
302 09:02:45.770391 TPM: setup succeeded
303 09:02:45.785334 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 09:02:45.799179 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 09:02:45.812213 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 09:02:45.822101 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 09:02:45.825467 Chrome EC: UHEPI supported
308 09:02:45.828958 Phase 1
309 09:02:45.832400 FMAP: area GBB found @ 1805000 (458752 bytes)
310 09:02:45.842331 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 09:02:45.848739 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 09:02:45.855228 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 09:02:45.862375 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 09:02:45.865151 Recovery requested (1009000e)
315 09:02:45.868588 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 09:02:45.880437 tlcl_extend: response is 0
317 09:02:45.887412 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 09:02:45.897046 tlcl_extend: response is 0
319 09:02:45.903669 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 09:02:45.910148 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 09:02:45.916826 BS: verstage times (exec / console): total (unknown) / 142 ms
322 09:02:45.917285
323 09:02:45.917629
324 09:02:45.929779 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 09:02:45.936060 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 09:02:45.939617 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 09:02:45.942891 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 09:02:45.949441 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 09:02:45.952912 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 09:02:45.956406 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 09:02:45.959669 TCO_STS: 0000 0000
332 09:02:45.962866 GEN_PMCON: d0015038 00002200
333 09:02:45.966220 GBLRST_CAUSE: 00000000 00000000
334 09:02:45.969629 HPR_CAUSE0: 00000000
335 09:02:45.969714 prev_sleep_state 5
336 09:02:45.972907 Boot Count incremented to 8304
337 09:02:45.979556 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 09:02:45.986443 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 09:02:45.995840 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 09:02:46.002651 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 09:02:46.005514 Chrome EC: UHEPI supported
342 09:02:46.012259 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 09:02:46.023770 Probing TPM: done!
344 09:02:46.030723 Connected to device vid:did:rid of 1ae0:0028:00
345 09:02:46.040743 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 09:02:46.043758 Initialized TPM device CR50 revision 0
347 09:02:46.059413 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 09:02:46.065716 MRC: Hash idx 0x100b comparison successful.
349 09:02:46.068690 MRC cache found, size faa8
350 09:02:46.069152 bootmode is set to: 2
351 09:02:46.072053 SPD index = 2
352 09:02:46.078718 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 09:02:46.082284 SPD: module type is LPDDR4X
354 09:02:46.085631 SPD: module part number is MT53D1G64D4NW-046
355 09:02:46.092561 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 09:02:46.095282 SPD: device width 16 bits, bus width 16 bits
357 09:02:46.102084 SPD: module size is 2048 MB (per channel)
358 09:02:46.531689 CBMEM:
359 09:02:46.534815 IMD: root @ 0x76fff000 254 entries.
360 09:02:46.538126 IMD: root @ 0x76ffec00 62 entries.
361 09:02:46.541513 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 09:02:46.548041 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 09:02:46.551630 External stage cache:
364 09:02:46.554360 IMD: root @ 0x7b3ff000 254 entries.
365 09:02:46.557898 IMD: root @ 0x7b3fec00 62 entries.
366 09:02:46.572739 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 09:02:46.579017 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 09:02:46.585925 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 09:02:46.599457 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 09:02:46.606238 cse_lite: Skip switching to RW in the recovery path
371 09:02:46.606778 8 DIMMs found
372 09:02:46.607140 SMM Memory Map
373 09:02:46.612945 SMRAM : 0x7b000000 0x800000
374 09:02:46.615738 Subregion 0: 0x7b000000 0x200000
375 09:02:46.619289 Subregion 1: 0x7b200000 0x200000
376 09:02:46.622712 Subregion 2: 0x7b400000 0x400000
377 09:02:46.623152 top_of_ram = 0x77000000
378 09:02:46.629449 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 09:02:46.635738 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 09:02:46.639471 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 09:02:46.646408 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 09:02:46.652254 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 09:02:46.659043 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 09:02:46.669349 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 09:02:46.675699 Processing 211 relocs. Offset value of 0x74c0b000
386 09:02:46.682006 BS: romstage times (exec / console): total (unknown) / 276 ms
387 09:02:46.688471
388 09:02:46.688916
389 09:02:46.698832 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 09:02:46.702349 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 09:02:46.709085 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 09:02:46.719153 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 09:02:46.725300 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 09:02:46.732073 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 09:02:46.775180 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 09:02:46.781639 Processing 5008 relocs. Offset value of 0x75d98000
397 09:02:46.785364 BS: postcar times (exec / console): total (unknown) / 59 ms
398 09:02:46.788150
399 09:02:46.788679
400 09:02:46.798031 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 09:02:46.798476 Normal boot
402 09:02:46.801713 FW_CONFIG value is 0x804c02
403 09:02:46.805063 PCI: 00:07.0 disabled by fw_config
404 09:02:46.807962 PCI: 00:07.1 disabled by fw_config
405 09:02:46.811395 PCI: 00:0d.2 disabled by fw_config
406 09:02:46.818193 PCI: 00:1c.7 disabled by fw_config
407 09:02:46.821397 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 09:02:46.827780 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 09:02:46.831206 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 09:02:46.838184 GENERIC: 0.0 disabled by fw_config
411 09:02:46.841391 GENERIC: 1.0 disabled by fw_config
412 09:02:46.844382 fw_config match found: DB_USB=USB3_ACTIVE
413 09:02:46.847682 fw_config match found: DB_USB=USB3_ACTIVE
414 09:02:46.851062 fw_config match found: DB_USB=USB3_ACTIVE
415 09:02:46.857694 fw_config match found: DB_USB=USB3_ACTIVE
416 09:02:46.860853 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 09:02:46.867818 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 09:02:46.877442 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 09:02:46.884443 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 09:02:46.887930 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 09:02:46.894109 microcode: Update skipped, already up-to-date
422 09:02:46.900782 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 09:02:46.928521 Detected 4 core, 8 thread CPU.
424 09:02:46.931796 Setting up SMI for CPU
425 09:02:46.935094 IED base = 0x7b400000
426 09:02:46.938775 IED size = 0x00400000
427 09:02:46.939210 Will perform SMM setup.
428 09:02:46.945453 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
429 09:02:46.951585 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 09:02:46.958524 Processing 16 relocs. Offset value of 0x00030000
431 09:02:46.961899 Attempting to start 7 APs
432 09:02:46.965116 Waiting for 10ms after sending INIT.
433 09:02:46.980630 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 09:02:46.981072 done.
435 09:02:46.984198 AP: slot 7 apic_id 6.
436 09:02:46.986956 Waiting for 2nd SIPI to complete...done.
437 09:02:46.990443 AP: slot 2 apic_id 3.
438 09:02:46.993986 AP: slot 6 apic_id 2.
439 09:02:46.994467 AP: slot 5 apic_id 4.
440 09:02:46.997439 AP: slot 4 apic_id 5.
441 09:02:47.000385 AP: slot 3 apic_id 7.
442 09:02:47.007096 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 09:02:47.014066 Processing 13 relocs. Offset value of 0x00038000
444 09:02:47.017264 Unable to locate Global NVS
445 09:02:47.024100 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 09:02:47.027043 Installing permanent SMM handler to 0x7b000000
447 09:02:47.036902 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 09:02:47.040391 Processing 794 relocs. Offset value of 0x7b010000
449 09:02:47.050142 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 09:02:47.053573 Processing 13 relocs. Offset value of 0x7b008000
451 09:02:47.060010 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 09:02:47.067021 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 09:02:47.070514 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 09:02:47.076432 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 09:02:47.083279 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 09:02:47.089907 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 09:02:47.096727 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 09:02:47.097266 Unable to locate Global NVS
459 09:02:47.106314 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 09:02:47.109989 Clearing SMI status registers
461 09:02:47.110515 SMI_STS: PM1
462 09:02:47.113169 PM1_STS: PWRBTN
463 09:02:47.119807 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 09:02:47.122649 In relocation handler: CPU 0
465 09:02:47.125942 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 09:02:47.132618 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 09:02:47.133055 Relocation complete.
468 09:02:47.142861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 09:02:47.146232 In relocation handler: CPU 1
470 09:02:47.149711 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 09:02:47.150154 Relocation complete.
472 09:02:47.159340 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 09:02:47.162951 In relocation handler: CPU 6
474 09:02:47.166317 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 09:02:47.169122 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 09:02:47.172432 Relocation complete.
477 09:02:47.179400 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
478 09:02:47.182284 In relocation handler: CPU 3
479 09:02:47.185765 New SMBASE=0x7afff400 IEDBASE=0x7b400000
480 09:02:47.188988 Relocation complete.
481 09:02:47.195524 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
482 09:02:47.199219 In relocation handler: CPU 7
483 09:02:47.202249 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 09:02:47.209296 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 09:02:47.209731 Relocation complete.
486 09:02:47.219084 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 09:02:47.219541 In relocation handler: CPU 4
488 09:02:47.225744 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 09:02:47.226212 Relocation complete.
490 09:02:47.231861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 09:02:47.235153 In relocation handler: CPU 5
492 09:02:47.242555 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 09:02:47.245232 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 09:02:47.248757 Relocation complete.
495 09:02:47.255514 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
496 09:02:47.258551 In relocation handler: CPU 2
497 09:02:47.261981 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 09:02:47.265351 Relocation complete.
499 09:02:47.265778 Initializing CPU #0
500 09:02:47.268349 CPU: vendor Intel device 806c1
501 09:02:47.275096 CPU: family 06, model 8c, stepping 01
502 09:02:47.275569 Clearing out pending MCEs
503 09:02:47.278759 Setting up local APIC...
504 09:02:47.281836 apic_id: 0x00 done.
505 09:02:47.284989 Turbo is available but hidden
506 09:02:47.288439 Turbo is available and visible
507 09:02:47.291292 microcode: Update skipped, already up-to-date
508 09:02:47.294796 CPU #0 initialized
509 09:02:47.295234 Initializing CPU #1
510 09:02:47.298361 Initializing CPU #2
511 09:02:47.302054 Initializing CPU #6
512 09:02:47.304815 CPU: vendor Intel device 806c1
513 09:02:47.308064 CPU: family 06, model 8c, stepping 01
514 09:02:47.311480 CPU: vendor Intel device 806c1
515 09:02:47.315037 CPU: family 06, model 8c, stepping 01
516 09:02:47.318569 Clearing out pending MCEs
517 09:02:47.319014 Clearing out pending MCEs
518 09:02:47.321318 Setting up local APIC...
519 09:02:47.324652 Initializing CPU #3
520 09:02:47.325358 Initializing CPU #4
521 09:02:47.327942 Initializing CPU #5
522 09:02:47.331458 CPU: vendor Intel device 806c1
523 09:02:47.334854 CPU: family 06, model 8c, stepping 01
524 09:02:47.338168 CPU: vendor Intel device 806c1
525 09:02:47.341064 CPU: family 06, model 8c, stepping 01
526 09:02:47.344574 Clearing out pending MCEs
527 09:02:47.348054 Clearing out pending MCEs
528 09:02:47.351471 Setting up local APIC...
529 09:02:47.351975 apic_id: 0x03 done.
530 09:02:47.354260 Setting up local APIC...
531 09:02:47.358398 CPU: vendor Intel device 806c1
532 09:02:47.361437 CPU: family 06, model 8c, stepping 01
533 09:02:47.365722 microcode: Update skipped, already up-to-date
534 09:02:47.368541 apic_id: 0x02 done.
535 09:02:47.371959 Clearing out pending MCEs
536 09:02:47.372411 apic_id: 0x05 done.
537 09:02:47.375659 Setting up local APIC...
538 09:02:47.378628 microcode: Update skipped, already up-to-date
539 09:02:47.381996 CPU #2 initialized
540 09:02:47.385375 CPU #6 initialized
541 09:02:47.385834 apic_id: 0x04 done.
542 09:02:47.391932 microcode: Update skipped, already up-to-date
543 09:02:47.395614 microcode: Update skipped, already up-to-date
544 09:02:47.398561 CPU #4 initialized
545 09:02:47.398988 Setting up local APIC...
546 09:02:47.401975 Initializing CPU #7
547 09:02:47.405641 CPU: vendor Intel device 806c1
548 09:02:47.408381 CPU: family 06, model 8c, stepping 01
549 09:02:47.411813 CPU: vendor Intel device 806c1
550 09:02:47.415834 CPU: family 06, model 8c, stepping 01
551 09:02:47.418419 Clearing out pending MCEs
552 09:02:47.421737 apic_id: 0x01 done.
553 09:02:47.422188 CPU #5 initialized
554 09:02:47.428570 microcode: Update skipped, already up-to-date
555 09:02:47.429000 Clearing out pending MCEs
556 09:02:47.431671 Setting up local APIC...
557 09:02:47.434899 CPU #1 initialized
558 09:02:47.435378 Setting up local APIC...
559 09:02:47.438543 apic_id: 0x07 done.
560 09:02:47.441583 apic_id: 0x06 done.
561 09:02:47.445059 microcode: Update skipped, already up-to-date
562 09:02:47.448277 microcode: Update skipped, already up-to-date
563 09:02:47.451733 CPU #3 initialized
564 09:02:47.455273 CPU #7 initialized
565 09:02:47.458613 bsp_do_flight_plan done after 465 msecs.
566 09:02:47.461332 CPU: frequency set to 4400 MHz
567 09:02:47.461762 Enabling SMIs.
568 09:02:47.468196 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
569 09:02:47.485375 SATAXPCIE1 indicates PCIe NVMe is present
570 09:02:47.488252 Probing TPM: done!
571 09:02:47.491988 Connected to device vid:did:rid of 1ae0:0028:00
572 09:02:47.502182 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
573 09:02:47.505474 Initialized TPM device CR50 revision 0
574 09:02:47.508995 Enabling S0i3.4
575 09:02:47.515467 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 09:02:47.518930 Found a VBT of 8704 bytes after decompression
577 09:02:47.525884 cse_lite: CSE RO boot. HybridStorageMode disabled
578 09:02:47.531767 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 09:02:47.607699 FSPS returned 0
580 09:02:47.611123 Executing Phase 1 of FspMultiPhaseSiInit
581 09:02:47.620756 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 09:02:47.624439 port C0 DISC req: usage 1 usb3 1 usb2 5
583 09:02:47.627514 Raw Buffer output 0 00000511
584 09:02:47.630781 Raw Buffer output 1 00000000
585 09:02:47.634228 pmc_send_ipc_cmd succeeded
586 09:02:47.640920 port C1 DISC req: usage 1 usb3 2 usb2 3
587 09:02:47.641355 Raw Buffer output 0 00000321
588 09:02:47.644344 Raw Buffer output 1 00000000
589 09:02:47.648759 pmc_send_ipc_cmd succeeded
590 09:02:47.653318 Detected 4 core, 8 thread CPU.
591 09:02:47.656836 Detected 4 core, 8 thread CPU.
592 09:02:47.857312 Display FSP Version Info HOB
593 09:02:47.860681 Reference Code - CPU = a.0.4c.31
594 09:02:47.863589 uCode Version = 0.0.0.86
595 09:02:47.866925 TXT ACM version = ff.ff.ff.ffff
596 09:02:47.870311 Reference Code - ME = a.0.4c.31
597 09:02:47.873419 MEBx version = 0.0.0.0
598 09:02:47.877146 ME Firmware Version = Consumer SKU
599 09:02:47.880443 Reference Code - PCH = a.0.4c.31
600 09:02:47.883391 PCH-CRID Status = Disabled
601 09:02:47.886761 PCH-CRID Original Value = ff.ff.ff.ffff
602 09:02:47.890284 PCH-CRID New Value = ff.ff.ff.ffff
603 09:02:47.893710 OPROM - RST - RAID = ff.ff.ff.ffff
604 09:02:47.896736 PCH Hsio Version = 4.0.0.0
605 09:02:47.900022 Reference Code - SA - System Agent = a.0.4c.31
606 09:02:47.903648 Reference Code - MRC = 2.0.0.1
607 09:02:47.907181 SA - PCIe Version = a.0.4c.31
608 09:02:47.910045 SA-CRID Status = Disabled
609 09:02:47.913801 SA-CRID Original Value = 0.0.0.1
610 09:02:47.917120 SA-CRID New Value = 0.0.0.1
611 09:02:47.920018 OPROM - VBIOS = ff.ff.ff.ffff
612 09:02:47.923851 IO Manageability Engine FW Version = 11.1.4.0
613 09:02:47.926191 PHY Build Version = 0.0.0.e0
614 09:02:47.929565 Thunderbolt(TM) FW Version = 0.0.0.0
615 09:02:47.936579 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 09:02:47.940078 ITSS IRQ Polarities Before:
617 09:02:47.940579 IPC0: 0xffffffff
618 09:02:47.943666 IPC1: 0xffffffff
619 09:02:47.944185 IPC2: 0xffffffff
620 09:02:47.946949 IPC3: 0xffffffff
621 09:02:47.950689 ITSS IRQ Polarities After:
622 09:02:47.951234 IPC0: 0xffffffff
623 09:02:47.953597 IPC1: 0xffffffff
624 09:02:47.953992 IPC2: 0xffffffff
625 09:02:47.956869 IPC3: 0xffffffff
626 09:02:47.960321 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 09:02:47.973390 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 09:02:47.983240 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 09:02:47.996853 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 09:02:48.003402 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
631 09:02:48.003876 Enumerating buses...
632 09:02:48.009979 Show all devs... Before device enumeration.
633 09:02:48.010529 Root Device: enabled 1
634 09:02:48.013362 DOMAIN: 0000: enabled 1
635 09:02:48.016707 CPU_CLUSTER: 0: enabled 1
636 09:02:48.019621 PCI: 00:00.0: enabled 1
637 09:02:48.020089 PCI: 00:02.0: enabled 1
638 09:02:48.023273 PCI: 00:04.0: enabled 1
639 09:02:48.026548 PCI: 00:05.0: enabled 1
640 09:02:48.029852 PCI: 00:06.0: enabled 0
641 09:02:48.030292 PCI: 00:07.0: enabled 0
642 09:02:48.032695 PCI: 00:07.1: enabled 0
643 09:02:48.036309 PCI: 00:07.2: enabled 0
644 09:02:48.039605 PCI: 00:07.3: enabled 0
645 09:02:48.040078 PCI: 00:08.0: enabled 1
646 09:02:48.043231 PCI: 00:09.0: enabled 0
647 09:02:48.045905 PCI: 00:0a.0: enabled 0
648 09:02:48.049401 PCI: 00:0d.0: enabled 1
649 09:02:48.049841 PCI: 00:0d.1: enabled 0
650 09:02:48.052735 PCI: 00:0d.2: enabled 0
651 09:02:48.056017 PCI: 00:0d.3: enabled 0
652 09:02:48.059630 PCI: 00:0e.0: enabled 0
653 09:02:48.060102 PCI: 00:10.2: enabled 1
654 09:02:48.062858 PCI: 00:10.6: enabled 0
655 09:02:48.066005 PCI: 00:10.7: enabled 0
656 09:02:48.069147 PCI: 00:12.0: enabled 0
657 09:02:48.069586 PCI: 00:12.6: enabled 0
658 09:02:48.072606 PCI: 00:13.0: enabled 0
659 09:02:48.075822 PCI: 00:14.0: enabled 1
660 09:02:48.076265 PCI: 00:14.1: enabled 0
661 09:02:48.079316 PCI: 00:14.2: enabled 1
662 09:02:48.082626 PCI: 00:14.3: enabled 1
663 09:02:48.085571 PCI: 00:15.0: enabled 1
664 09:02:48.086007 PCI: 00:15.1: enabled 1
665 09:02:48.089159 PCI: 00:15.2: enabled 1
666 09:02:48.092619 PCI: 00:15.3: enabled 1
667 09:02:48.095507 PCI: 00:16.0: enabled 1
668 09:02:48.095983 PCI: 00:16.1: enabled 0
669 09:02:48.099128 PCI: 00:16.2: enabled 0
670 09:02:48.102592 PCI: 00:16.3: enabled 0
671 09:02:48.105868 PCI: 00:16.4: enabled 0
672 09:02:48.106299 PCI: 00:16.5: enabled 0
673 09:02:48.109140 PCI: 00:17.0: enabled 1
674 09:02:48.112428 PCI: 00:19.0: enabled 0
675 09:02:48.116005 PCI: 00:19.1: enabled 1
676 09:02:48.116434 PCI: 00:19.2: enabled 0
677 09:02:48.119316 PCI: 00:1c.0: enabled 1
678 09:02:48.122406 PCI: 00:1c.1: enabled 0
679 09:02:48.122836 PCI: 00:1c.2: enabled 0
680 09:02:48.125743 PCI: 00:1c.3: enabled 0
681 09:02:48.129384 PCI: 00:1c.4: enabled 0
682 09:02:48.132426 PCI: 00:1c.5: enabled 0
683 09:02:48.132856 PCI: 00:1c.6: enabled 1
684 09:02:48.135272 PCI: 00:1c.7: enabled 0
685 09:02:48.138583 PCI: 00:1d.0: enabled 1
686 09:02:48.142222 PCI: 00:1d.1: enabled 0
687 09:02:48.142652 PCI: 00:1d.2: enabled 1
688 09:02:48.145454 PCI: 00:1d.3: enabled 0
689 09:02:48.149074 PCI: 00:1e.0: enabled 1
690 09:02:48.151812 PCI: 00:1e.1: enabled 0
691 09:02:48.152252 PCI: 00:1e.2: enabled 1
692 09:02:48.155223 PCI: 00:1e.3: enabled 1
693 09:02:48.159027 PCI: 00:1f.0: enabled 1
694 09:02:48.162030 PCI: 00:1f.1: enabled 0
695 09:02:48.162466 PCI: 00:1f.2: enabled 1
696 09:02:48.165637 PCI: 00:1f.3: enabled 1
697 09:02:48.168940 PCI: 00:1f.4: enabled 0
698 09:02:48.169393 PCI: 00:1f.5: enabled 1
699 09:02:48.171823 PCI: 00:1f.6: enabled 0
700 09:02:48.175157 PCI: 00:1f.7: enabled 0
701 09:02:48.178668 APIC: 00: enabled 1
702 09:02:48.179141 GENERIC: 0.0: enabled 1
703 09:02:48.182096 GENERIC: 0.0: enabled 1
704 09:02:48.185256 GENERIC: 1.0: enabled 1
705 09:02:48.188366 GENERIC: 0.0: enabled 1
706 09:02:48.188828 GENERIC: 1.0: enabled 1
707 09:02:48.192211 USB0 port 0: enabled 1
708 09:02:48.195468 GENERIC: 0.0: enabled 1
709 09:02:48.195980 USB0 port 0: enabled 1
710 09:02:48.198305 GENERIC: 0.0: enabled 1
711 09:02:48.201759 I2C: 00:1a: enabled 1
712 09:02:48.205113 I2C: 00:31: enabled 1
713 09:02:48.205571 I2C: 00:32: enabled 1
714 09:02:48.208666 I2C: 00:10: enabled 1
715 09:02:48.212250 I2C: 00:15: enabled 1
716 09:02:48.212713 GENERIC: 0.0: enabled 0
717 09:02:48.214897 GENERIC: 1.0: enabled 0
718 09:02:48.218685 GENERIC: 0.0: enabled 1
719 09:02:48.219255 SPI: 00: enabled 1
720 09:02:48.221958 SPI: 00: enabled 1
721 09:02:48.225262 PNP: 0c09.0: enabled 1
722 09:02:48.225703 GENERIC: 0.0: enabled 1
723 09:02:48.228452 USB3 port 0: enabled 1
724 09:02:48.231911 USB3 port 1: enabled 1
725 09:02:48.232349 USB3 port 2: enabled 0
726 09:02:48.234902 USB3 port 3: enabled 0
727 09:02:48.238223 USB2 port 0: enabled 0
728 09:02:48.241636 USB2 port 1: enabled 1
729 09:02:48.242070 USB2 port 2: enabled 1
730 09:02:48.245242 USB2 port 3: enabled 0
731 09:02:48.248672 USB2 port 4: enabled 1
732 09:02:48.249105 USB2 port 5: enabled 0
733 09:02:48.251457 USB2 port 6: enabled 0
734 09:02:48.254965 USB2 port 7: enabled 0
735 09:02:48.258424 USB2 port 8: enabled 0
736 09:02:48.258857 USB2 port 9: enabled 0
737 09:02:48.261454 USB3 port 0: enabled 0
738 09:02:48.264662 USB3 port 1: enabled 1
739 09:02:48.265096 USB3 port 2: enabled 0
740 09:02:48.268114 USB3 port 3: enabled 0
741 09:02:48.271225 GENERIC: 0.0: enabled 1
742 09:02:48.274748 GENERIC: 1.0: enabled 1
743 09:02:48.275184 APIC: 01: enabled 1
744 09:02:48.278157 APIC: 03: enabled 1
745 09:02:48.278592 APIC: 07: enabled 1
746 09:02:48.281676 APIC: 05: enabled 1
747 09:02:48.284940 APIC: 04: enabled 1
748 09:02:48.285444 APIC: 02: enabled 1
749 09:02:48.287831 APIC: 06: enabled 1
750 09:02:48.291326 Compare with tree...
751 09:02:48.292027 Root Device: enabled 1
752 09:02:48.294918 DOMAIN: 0000: enabled 1
753 09:02:48.298152 PCI: 00:00.0: enabled 1
754 09:02:48.301871 PCI: 00:02.0: enabled 1
755 09:02:48.302301 PCI: 00:04.0: enabled 1
756 09:02:48.304892 GENERIC: 0.0: enabled 1
757 09:02:48.307827 PCI: 00:05.0: enabled 1
758 09:02:48.311416 PCI: 00:06.0: enabled 0
759 09:02:48.315034 PCI: 00:07.0: enabled 0
760 09:02:48.315590 GENERIC: 0.0: enabled 1
761 09:02:48.318057 PCI: 00:07.1: enabled 0
762 09:02:48.321458 GENERIC: 1.0: enabled 1
763 09:02:48.324211 PCI: 00:07.2: enabled 0
764 09:02:48.327786 GENERIC: 0.0: enabled 1
765 09:02:48.328379 PCI: 00:07.3: enabled 0
766 09:02:48.331392 GENERIC: 1.0: enabled 1
767 09:02:48.334532 PCI: 00:08.0: enabled 1
768 09:02:48.338182 PCI: 00:09.0: enabled 0
769 09:02:48.340977 PCI: 00:0a.0: enabled 0
770 09:02:48.341507 PCI: 00:0d.0: enabled 1
771 09:02:48.344262 USB0 port 0: enabled 1
772 09:02:48.347908 USB3 port 0: enabled 1
773 09:02:48.351374 USB3 port 1: enabled 1
774 09:02:48.354078 USB3 port 2: enabled 0
775 09:02:48.357830 USB3 port 3: enabled 0
776 09:02:48.358428 PCI: 00:0d.1: enabled 0
777 09:02:48.361000 PCI: 00:0d.2: enabled 0
778 09:02:48.364381 GENERIC: 0.0: enabled 1
779 09:02:48.368011 PCI: 00:0d.3: enabled 0
780 09:02:48.371060 PCI: 00:0e.0: enabled 0
781 09:02:48.371494 PCI: 00:10.2: enabled 1
782 09:02:48.374395 PCI: 00:10.6: enabled 0
783 09:02:48.377378 PCI: 00:10.7: enabled 0
784 09:02:48.381153 PCI: 00:12.0: enabled 0
785 09:02:48.384569 PCI: 00:12.6: enabled 0
786 09:02:48.385001 PCI: 00:13.0: enabled 0
787 09:02:48.387309 PCI: 00:14.0: enabled 1
788 09:02:48.390753 USB0 port 0: enabled 1
789 09:02:48.394143 USB2 port 0: enabled 0
790 09:02:48.397645 USB2 port 1: enabled 1
791 09:02:48.398078 USB2 port 2: enabled 1
792 09:02:48.401410 USB2 port 3: enabled 0
793 09:02:48.403901 USB2 port 4: enabled 1
794 09:02:48.407427 USB2 port 5: enabled 0
795 09:02:48.410862 USB2 port 6: enabled 0
796 09:02:48.413863 USB2 port 7: enabled 0
797 09:02:48.414297 USB2 port 8: enabled 0
798 09:02:48.417425 USB2 port 9: enabled 0
799 09:02:48.420946 USB3 port 0: enabled 0
800 09:02:48.424195 USB3 port 1: enabled 1
801 09:02:48.427315 USB3 port 2: enabled 0
802 09:02:48.427774 USB3 port 3: enabled 0
803 09:02:48.430558 PCI: 00:14.1: enabled 0
804 09:02:48.434068 PCI: 00:14.2: enabled 1
805 09:02:48.437541 PCI: 00:14.3: enabled 1
806 09:02:48.440849 GENERIC: 0.0: enabled 1
807 09:02:48.441281 PCI: 00:15.0: enabled 1
808 09:02:48.444138 I2C: 00:1a: enabled 1
809 09:02:48.447576 I2C: 00:31: enabled 1
810 09:02:48.450544 I2C: 00:32: enabled 1
811 09:02:48.453845 PCI: 00:15.1: enabled 1
812 09:02:48.454323 I2C: 00:10: enabled 1
813 09:02:48.457085 PCI: 00:15.2: enabled 1
814 09:02:48.460524 PCI: 00:15.3: enabled 1
815 09:02:48.463740 PCI: 00:16.0: enabled 1
816 09:02:48.464182 PCI: 00:16.1: enabled 0
817 09:02:48.467056 PCI: 00:16.2: enabled 0
818 09:02:48.470522 PCI: 00:16.3: enabled 0
819 09:02:48.473965 PCI: 00:16.4: enabled 0
820 09:02:48.477371 PCI: 00:16.5: enabled 0
821 09:02:48.477866 PCI: 00:17.0: enabled 1
822 09:02:48.480773 PCI: 00:19.0: enabled 0
823 09:02:48.483754 PCI: 00:19.1: enabled 1
824 09:02:48.486824 I2C: 00:15: enabled 1
825 09:02:48.490602 PCI: 00:19.2: enabled 0
826 09:02:48.491082 PCI: 00:1d.0: enabled 1
827 09:02:48.493780 GENERIC: 0.0: enabled 1
828 09:02:48.497332 PCI: 00:1e.0: enabled 1
829 09:02:48.500379 PCI: 00:1e.1: enabled 0
830 09:02:48.503555 PCI: 00:1e.2: enabled 1
831 09:02:48.504100 SPI: 00: enabled 1
832 09:02:48.506947 PCI: 00:1e.3: enabled 1
833 09:02:48.510671 SPI: 00: enabled 1
834 09:02:48.513386 PCI: 00:1f.0: enabled 1
835 09:02:48.513823 PNP: 0c09.0: enabled 1
836 09:02:48.516956 PCI: 00:1f.1: enabled 0
837 09:02:48.520185 PCI: 00:1f.2: enabled 1
838 09:02:48.523872 GENERIC: 0.0: enabled 1
839 09:02:48.526567 GENERIC: 0.0: enabled 1
840 09:02:48.526738 GENERIC: 1.0: enabled 1
841 09:02:48.530298 PCI: 00:1f.3: enabled 1
842 09:02:48.533546 PCI: 00:1f.4: enabled 0
843 09:02:48.536836 PCI: 00:1f.5: enabled 1
844 09:02:48.588117 PCI: 00:1f.6: enabled 0
845 09:02:48.588357 PCI: 00:1f.7: enabled 0
846 09:02:48.588541 CPU_CLUSTER: 0: enabled 1
847 09:02:48.589017 APIC: 00: enabled 1
848 09:02:48.589181 APIC: 01: enabled 1
849 09:02:48.589329 APIC: 03: enabled 1
850 09:02:48.589537 APIC: 07: enabled 1
851 09:02:48.589752 APIC: 05: enabled 1
852 09:02:48.589935 APIC: 04: enabled 1
853 09:02:48.590073 APIC: 02: enabled 1
854 09:02:48.590206 APIC: 06: enabled 1
855 09:02:48.590581 Root Device scanning...
856 09:02:48.590735 scan_static_bus for Root Device
857 09:02:48.590868 DOMAIN: 0000 enabled
858 09:02:48.590997 CPU_CLUSTER: 0 enabled
859 09:02:48.591124 DOMAIN: 0000 scanning...
860 09:02:48.591249 PCI: pci_scan_bus for bus 00
861 09:02:48.591373 PCI: 00:00.0 [8086/0000] ops
862 09:02:48.591496 PCI: 00:00.0 [8086/9a12] enabled
863 09:02:48.591619 PCI: 00:02.0 [8086/0000] bus ops
864 09:02:48.612688 PCI: 00:02.0 [8086/9a40] enabled
865 09:02:48.612913 PCI: 00:04.0 [8086/0000] bus ops
866 09:02:48.613334 PCI: 00:04.0 [8086/9a03] enabled
867 09:02:48.613513 PCI: 00:05.0 [8086/9a19] enabled
868 09:02:48.613676 PCI: 00:07.0 [0000/0000] hidden
869 09:02:48.616434 PCI: 00:08.0 [8086/9a11] enabled
870 09:02:48.616657 PCI: 00:0a.0 [8086/9a0d] disabled
871 09:02:48.620016 PCI: 00:0d.0 [8086/0000] bus ops
872 09:02:48.620237 PCI: 00:0d.0 [8086/9a13] enabled
873 09:02:48.623365 PCI: 00:14.0 [8086/0000] bus ops
874 09:02:48.626966 PCI: 00:14.0 [8086/a0ed] enabled
875 09:02:48.630010 PCI: 00:14.2 [8086/a0ef] enabled
876 09:02:48.633714 PCI: 00:14.3 [8086/0000] bus ops
877 09:02:48.636562 PCI: 00:14.3 [8086/a0f0] enabled
878 09:02:48.640409 PCI: 00:15.0 [8086/0000] bus ops
879 09:02:48.643124 PCI: 00:15.0 [8086/a0e8] enabled
880 09:02:48.646702 PCI: 00:15.1 [8086/0000] bus ops
881 09:02:48.650001 PCI: 00:15.1 [8086/a0e9] enabled
882 09:02:48.653521 PCI: 00:15.2 [8086/0000] bus ops
883 09:02:48.656356 PCI: 00:15.2 [8086/a0ea] enabled
884 09:02:48.659681 PCI: 00:15.3 [8086/0000] bus ops
885 09:02:48.663233 PCI: 00:15.3 [8086/a0eb] enabled
886 09:02:48.666612 PCI: 00:16.0 [8086/0000] ops
887 09:02:48.670238 PCI: 00:16.0 [8086/a0e0] enabled
888 09:02:48.673575 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 09:02:48.676784 PCI: 00:19.0 [8086/0000] bus ops
890 09:02:48.683104 PCI: 00:19.0 [8086/a0c5] disabled
891 09:02:48.686430 PCI: 00:19.1 [8086/0000] bus ops
892 09:02:48.689744 PCI: 00:19.1 [8086/a0c6] enabled
893 09:02:48.692621 PCI: 00:1d.0 [8086/0000] bus ops
894 09:02:48.696046 PCI: 00:1d.0 [8086/a0b0] enabled
895 09:02:48.696474 PCI: 00:1e.0 [8086/0000] ops
896 09:02:48.699513 PCI: 00:1e.0 [8086/a0a8] enabled
897 09:02:48.702449 PCI: 00:1e.2 [8086/0000] bus ops
898 09:02:48.705897 PCI: 00:1e.2 [8086/a0aa] enabled
899 09:02:48.709838 PCI: 00:1e.3 [8086/0000] bus ops
900 09:02:48.712918 PCI: 00:1e.3 [8086/a0ab] enabled
901 09:02:48.716388 PCI: 00:1f.0 [8086/0000] bus ops
902 09:02:48.719142 PCI: 00:1f.0 [8086/a087] enabled
903 09:02:48.722696 RTC Init
904 09:02:48.726131 Set power on after power failure.
905 09:02:48.726577 Disabling Deep S3
906 09:02:48.729567 Disabling Deep S3
907 09:02:48.732479 Disabling Deep S4
908 09:02:48.732923 Disabling Deep S4
909 09:02:48.735813 Disabling Deep S5
910 09:02:48.736305 Disabling Deep S5
911 09:02:48.739305 PCI: 00:1f.2 [0000/0000] hidden
912 09:02:48.742452 PCI: 00:1f.3 [8086/0000] bus ops
913 09:02:48.745924 PCI: 00:1f.3 [8086/a0c8] enabled
914 09:02:48.749038 PCI: 00:1f.5 [8086/0000] bus ops
915 09:02:48.752299 PCI: 00:1f.5 [8086/a0a4] enabled
916 09:02:48.755589 PCI: Leftover static devices:
917 09:02:48.759128 PCI: 00:10.2
918 09:02:48.759594 PCI: 00:10.6
919 09:02:48.760081 PCI: 00:10.7
920 09:02:48.762708 PCI: 00:06.0
921 09:02:48.763158 PCI: 00:07.1
922 09:02:48.766026 PCI: 00:07.2
923 09:02:48.766517 PCI: 00:07.3
924 09:02:48.768687 PCI: 00:09.0
925 09:02:48.769135 PCI: 00:0d.1
926 09:02:48.769573 PCI: 00:0d.2
927 09:02:48.772051 PCI: 00:0d.3
928 09:02:48.772486 PCI: 00:0e.0
929 09:02:48.775449 PCI: 00:12.0
930 09:02:48.775944 PCI: 00:12.6
931 09:02:48.776297 PCI: 00:13.0
932 09:02:48.778662 PCI: 00:14.1
933 09:02:48.779092 PCI: 00:16.1
934 09:02:48.782219 PCI: 00:16.2
935 09:02:48.782692 PCI: 00:16.3
936 09:02:48.785213 PCI: 00:16.4
937 09:02:48.785652 PCI: 00:16.5
938 09:02:48.785997 PCI: 00:17.0
939 09:02:48.788684 PCI: 00:19.2
940 09:02:48.789131 PCI: 00:1e.1
941 09:02:48.792107 PCI: 00:1f.1
942 09:02:48.792544 PCI: 00:1f.4
943 09:02:48.792887 PCI: 00:1f.6
944 09:02:48.795408 PCI: 00:1f.7
945 09:02:48.798332 PCI: Check your devicetree.cb.
946 09:02:48.801790 PCI: 00:02.0 scanning...
947 09:02:48.805309 scan_generic_bus for PCI: 00:02.0
948 09:02:48.808366 scan_generic_bus for PCI: 00:02.0 done
949 09:02:48.812023 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 09:02:48.815303 PCI: 00:04.0 scanning...
951 09:02:48.818574 scan_generic_bus for PCI: 00:04.0
952 09:02:48.821365 GENERIC: 0.0 enabled
953 09:02:48.828569 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 09:02:48.831312 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 09:02:48.834755 PCI: 00:0d.0 scanning...
956 09:02:48.838179 scan_static_bus for PCI: 00:0d.0
957 09:02:48.841299 USB0 port 0 enabled
958 09:02:48.841487 USB0 port 0 scanning...
959 09:02:48.844891 scan_static_bus for USB0 port 0
960 09:02:48.848301 USB3 port 0 enabled
961 09:02:48.851046 USB3 port 1 enabled
962 09:02:48.851234 USB3 port 2 disabled
963 09:02:48.854454 USB3 port 3 disabled
964 09:02:48.858040 USB3 port 0 scanning...
965 09:02:48.860859 scan_static_bus for USB3 port 0
966 09:02:48.864121 scan_static_bus for USB3 port 0 done
967 09:02:48.867571 scan_bus: bus USB3 port 0 finished in 6 msecs
968 09:02:48.871388 USB3 port 1 scanning...
969 09:02:48.874087 scan_static_bus for USB3 port 1
970 09:02:48.877458 scan_static_bus for USB3 port 1 done
971 09:02:48.884133 scan_bus: bus USB3 port 1 finished in 6 msecs
972 09:02:48.887491 scan_static_bus for USB0 port 0 done
973 09:02:48.890845 scan_bus: bus USB0 port 0 finished in 43 msecs
974 09:02:48.894474 scan_static_bus for PCI: 00:0d.0 done
975 09:02:48.900718 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 09:02:48.900908 PCI: 00:14.0 scanning...
977 09:02:48.904477 scan_static_bus for PCI: 00:14.0
978 09:02:48.907115 USB0 port 0 enabled
979 09:02:48.910558 USB0 port 0 scanning...
980 09:02:48.913945 scan_static_bus for USB0 port 0
981 09:02:48.917520 USB2 port 0 disabled
982 09:02:48.917707 USB2 port 1 enabled
983 09:02:48.920306 USB2 port 2 enabled
984 09:02:48.920495 USB2 port 3 disabled
985 09:02:48.923684 USB2 port 4 enabled
986 09:02:48.927210 USB2 port 5 disabled
987 09:02:48.927396 USB2 port 6 disabled
988 09:02:48.930799 USB2 port 7 disabled
989 09:02:48.933572 USB2 port 8 disabled
990 09:02:48.933760 USB2 port 9 disabled
991 09:02:48.937151 USB3 port 0 disabled
992 09:02:48.940575 USB3 port 1 enabled
993 09:02:48.940761 USB3 port 2 disabled
994 09:02:48.944087 USB3 port 3 disabled
995 09:02:48.947138 USB2 port 1 scanning...
996 09:02:48.950097 scan_static_bus for USB2 port 1
997 09:02:48.953564 scan_static_bus for USB2 port 1 done
998 09:02:48.956985 scan_bus: bus USB2 port 1 finished in 6 msecs
999 09:02:48.959969 USB2 port 2 scanning...
1000 09:02:48.963409 scan_static_bus for USB2 port 2
1001 09:02:48.966691 scan_static_bus for USB2 port 2 done
1002 09:02:48.970100 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 09:02:48.973647 USB2 port 4 scanning...
1004 09:02:48.976854 scan_static_bus for USB2 port 4
1005 09:02:48.980161 scan_static_bus for USB2 port 4 done
1006 09:02:48.986702 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 09:02:48.986792 USB3 port 1 scanning...
1008 09:02:48.989989 scan_static_bus for USB3 port 1
1009 09:02:48.996574 scan_static_bus for USB3 port 1 done
1010 09:02:48.999879 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 09:02:49.003382 scan_static_bus for USB0 port 0 done
1012 09:02:49.006903 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 09:02:49.013649 scan_static_bus for PCI: 00:14.0 done
1014 09:02:49.016816 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1015 09:02:49.020169 PCI: 00:14.3 scanning...
1016 09:02:49.023518 scan_static_bus for PCI: 00:14.3
1017 09:02:49.026444 GENERIC: 0.0 enabled
1018 09:02:49.029993 scan_static_bus for PCI: 00:14.3 done
1019 09:02:49.033492 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 09:02:49.036524 PCI: 00:15.0 scanning...
1021 09:02:49.040208 scan_static_bus for PCI: 00:15.0
1022 09:02:49.042956 I2C: 00:1a enabled
1023 09:02:49.043099 I2C: 00:31 enabled
1024 09:02:49.046283 I2C: 00:32 enabled
1025 09:02:49.049703 scan_static_bus for PCI: 00:15.0 done
1026 09:02:49.053183 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 09:02:49.056795 PCI: 00:15.1 scanning...
1028 09:02:49.059717 scan_static_bus for PCI: 00:15.1
1029 09:02:49.062968 I2C: 00:10 enabled
1030 09:02:49.066294 scan_static_bus for PCI: 00:15.1 done
1031 09:02:49.069609 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 09:02:49.072787 PCI: 00:15.2 scanning...
1033 09:02:49.076036 scan_static_bus for PCI: 00:15.2
1034 09:02:49.079471 scan_static_bus for PCI: 00:15.2 done
1035 09:02:49.086477 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 09:02:49.089402 PCI: 00:15.3 scanning...
1037 09:02:49.092820 scan_static_bus for PCI: 00:15.3
1038 09:02:49.096035 scan_static_bus for PCI: 00:15.3 done
1039 09:02:49.099662 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 09:02:49.102354 PCI: 00:19.1 scanning...
1041 09:02:49.106141 scan_static_bus for PCI: 00:19.1
1042 09:02:49.109484 I2C: 00:15 enabled
1043 09:02:49.112291 scan_static_bus for PCI: 00:19.1 done
1044 09:02:49.115942 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 09:02:49.119468 PCI: 00:1d.0 scanning...
1046 09:02:49.122029 do_pci_scan_bridge for PCI: 00:1d.0
1047 09:02:49.125510 PCI: pci_scan_bus for bus 01
1048 09:02:49.128912 PCI: 01:00.0 [15b7/5009] enabled
1049 09:02:49.132141 GENERIC: 0.0 enabled
1050 09:02:49.135567 Enabling Common Clock Configuration
1051 09:02:49.138899 L1 Sub-State supported from root port 29
1052 09:02:49.142627 L1 Sub-State Support = 0x5
1053 09:02:49.145947 CommonModeRestoreTime = 0x28
1054 09:02:49.148802 Power On Value = 0x16, Power On Scale = 0x0
1055 09:02:49.152208 ASPM: Enabled L1
1056 09:02:49.155736 PCIe: Max_Payload_Size adjusted to 128
1057 09:02:49.159049 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 09:02:49.161973 PCI: 00:1e.2 scanning...
1059 09:02:49.165330 scan_generic_bus for PCI: 00:1e.2
1060 09:02:49.168931 SPI: 00 enabled
1061 09:02:49.174934 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 09:02:49.178463 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 09:02:49.181857 PCI: 00:1e.3 scanning...
1064 09:02:49.185130 scan_generic_bus for PCI: 00:1e.3
1065 09:02:49.185221 SPI: 00 enabled
1066 09:02:49.191976 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 09:02:49.195479 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 09:02:49.198949 PCI: 00:1f.0 scanning...
1069 09:02:49.202287 scan_static_bus for PCI: 00:1f.0
1070 09:02:49.205596 PNP: 0c09.0 enabled
1071 09:02:49.208791 PNP: 0c09.0 scanning...
1072 09:02:49.212154 scan_static_bus for PNP: 0c09.0
1073 09:02:49.215486 scan_static_bus for PNP: 0c09.0 done
1074 09:02:49.218889 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 09:02:49.222045 scan_static_bus for PCI: 00:1f.0 done
1076 09:02:49.228776 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 09:02:49.231930 PCI: 00:1f.2 scanning...
1078 09:02:49.235299 scan_static_bus for PCI: 00:1f.2
1079 09:02:49.235387 GENERIC: 0.0 enabled
1080 09:02:49.238174 GENERIC: 0.0 scanning...
1081 09:02:49.241697 scan_static_bus for GENERIC: 0.0
1082 09:02:49.245145 GENERIC: 0.0 enabled
1083 09:02:49.245230 GENERIC: 1.0 enabled
1084 09:02:49.251797 scan_static_bus for GENERIC: 0.0 done
1085 09:02:49.254731 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 09:02:49.258363 scan_static_bus for PCI: 00:1f.2 done
1087 09:02:49.265084 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 09:02:49.265176 PCI: 00:1f.3 scanning...
1089 09:02:49.268371 scan_static_bus for PCI: 00:1f.3
1090 09:02:49.275164 scan_static_bus for PCI: 00:1f.3 done
1091 09:02:49.278673 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 09:02:49.281431 PCI: 00:1f.5 scanning...
1093 09:02:49.284872 scan_generic_bus for PCI: 00:1f.5
1094 09:02:49.288304 scan_generic_bus for PCI: 00:1f.5 done
1095 09:02:49.294777 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 09:02:49.298063 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1097 09:02:49.301666 scan_static_bus for Root Device done
1098 09:02:49.307970 scan_bus: bus Root Device finished in 735 msecs
1099 09:02:49.308064 done
1100 09:02:49.314778 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1101 09:02:49.318341 Chrome EC: UHEPI supported
1102 09:02:49.324510 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 09:02:49.331142 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 09:02:49.334671 SPI flash protection: WPSW=0 SRP0=1
1105 09:02:49.337652 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 09:02:49.344575 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1107 09:02:49.347653 found VGA at PCI: 00:02.0
1108 09:02:49.350701 Setting up VGA for PCI: 00:02.0
1109 09:02:49.354053 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 09:02:49.360807 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 09:02:49.364194 Allocating resources...
1112 09:02:49.364281 Reading resources...
1113 09:02:49.367793 Root Device read_resources bus 0 link: 0
1114 09:02:49.374508 DOMAIN: 0000 read_resources bus 0 link: 0
1115 09:02:49.377806 PCI: 00:04.0 read_resources bus 1 link: 0
1116 09:02:49.384067 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 09:02:49.387479 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 09:02:49.394274 USB0 port 0 read_resources bus 0 link: 0
1119 09:02:49.397215 USB0 port 0 read_resources bus 0 link: 0 done
1120 09:02:49.404010 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 09:02:49.406881 PCI: 00:14.0 read_resources bus 0 link: 0
1122 09:02:49.410471 USB0 port 0 read_resources bus 0 link: 0
1123 09:02:49.418147 USB0 port 0 read_resources bus 0 link: 0 done
1124 09:02:49.421257 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 09:02:49.428209 PCI: 00:14.3 read_resources bus 0 link: 0
1126 09:02:49.431453 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 09:02:49.438229 PCI: 00:15.0 read_resources bus 0 link: 0
1128 09:02:49.441168 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 09:02:49.448201 PCI: 00:15.1 read_resources bus 0 link: 0
1130 09:02:49.451194 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 09:02:49.458773 PCI: 00:19.1 read_resources bus 0 link: 0
1132 09:02:49.462072 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 09:02:49.468411 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 09:02:49.471852 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 09:02:49.478543 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 09:02:49.481908 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 09:02:49.488094 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 09:02:49.491427 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 09:02:49.498319 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 09:02:49.501655 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 09:02:49.508051 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 09:02:49.511161 GENERIC: 0.0 read_resources bus 0 link: 0
1143 09:02:49.514639 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 09:02:49.521820 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 09:02:49.528530 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 09:02:49.531271 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 09:02:49.538235 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 09:02:49.541229 Root Device read_resources bus 0 link: 0 done
1149 09:02:49.544759 Done reading resources.
1150 09:02:49.548054 Show resources in subtree (Root Device)...After reading.
1151 09:02:49.554417 Root Device child on link 0 DOMAIN: 0000
1152 09:02:49.558233 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 09:02:49.568045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 09:02:49.577643 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 09:02:49.577732 PCI: 00:00.0
1156 09:02:49.587446 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 09:02:49.597890 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 09:02:49.608123 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 09:02:49.617854 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 09:02:49.627518 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 09:02:49.633905 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 09:02:49.644199 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 09:02:49.654278 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 09:02:49.663930 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 09:02:49.674180 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 09:02:49.683676 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 09:02:49.690221 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 09:02:49.700726 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 09:02:49.710501 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 09:02:49.720009 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 09:02:49.730247 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 09:02:49.739967 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 09:02:49.746967 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 09:02:49.756896 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 09:02:49.766586 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 09:02:49.769745 PCI: 00:02.0
1177 09:02:49.779832 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 09:02:49.789631 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 09:02:49.796674 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 09:02:49.802802 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 09:02:49.813246 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 09:02:49.813357 GENERIC: 0.0
1183 09:02:49.816582 PCI: 00:05.0
1184 09:02:49.825983 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 09:02:49.829349 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 09:02:49.832902 GENERIC: 0.0
1187 09:02:49.833005 PCI: 00:08.0
1188 09:02:49.842674 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 09:02:49.846254 PCI: 00:0a.0
1190 09:02:49.848959 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 09:02:49.858936 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 09:02:49.865748 USB0 port 0 child on link 0 USB3 port 0
1193 09:02:49.865863 USB3 port 0
1194 09:02:49.869130 USB3 port 1
1195 09:02:49.869214 USB3 port 2
1196 09:02:49.872090 USB3 port 3
1197 09:02:49.875566 PCI: 00:14.0 child on link 0 USB0 port 0
1198 09:02:49.885370 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 09:02:49.888975 USB0 port 0 child on link 0 USB2 port 0
1200 09:02:49.892018 USB2 port 0
1201 09:02:49.895520 USB2 port 1
1202 09:02:49.895607 USB2 port 2
1203 09:02:49.899151 USB2 port 3
1204 09:02:49.899252 USB2 port 4
1205 09:02:49.901809 USB2 port 5
1206 09:02:49.901922 USB2 port 6
1207 09:02:49.905319 USB2 port 7
1208 09:02:49.905440 USB2 port 8
1209 09:02:49.908549 USB2 port 9
1210 09:02:49.908637 USB3 port 0
1211 09:02:49.912212 USB3 port 1
1212 09:02:49.912298 USB3 port 2
1213 09:02:49.915541 USB3 port 3
1214 09:02:49.915628 PCI: 00:14.2
1215 09:02:49.925524 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 09:02:49.934897 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 09:02:49.941708 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 09:02:49.951653 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 09:02:49.951777 GENERIC: 0.0
1220 09:02:49.958040 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 09:02:49.968341 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 09:02:49.968431 I2C: 00:1a
1223 09:02:49.972052 I2C: 00:31
1224 09:02:49.972138 I2C: 00:32
1225 09:02:49.974692 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 09:02:49.984689 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 09:02:49.987951 I2C: 00:10
1228 09:02:49.988041 PCI: 00:15.2
1229 09:02:49.997900 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 09:02:50.001343 PCI: 00:15.3
1231 09:02:50.011086 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 09:02:50.011175 PCI: 00:16.0
1233 09:02:50.021031 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 09:02:50.024716 PCI: 00:19.0
1235 09:02:50.027912 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 09:02:50.037763 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 09:02:50.040747 I2C: 00:15
1238 09:02:50.044115 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 09:02:50.054294 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 09:02:50.064311 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 09:02:50.070707 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 09:02:50.074184 GENERIC: 0.0
1243 09:02:50.074270 PCI: 01:00.0
1244 09:02:50.084241 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 09:02:50.094349 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1246 09:02:50.096942 PCI: 00:1e.0
1247 09:02:50.106804 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 09:02:50.113504 PCI: 00:1e.2 child on link 0 SPI: 00
1249 09:02:50.123283 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 09:02:50.123370 SPI: 00
1251 09:02:50.126779 PCI: 00:1e.3 child on link 0 SPI: 00
1252 09:02:50.136790 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 09:02:50.140251 SPI: 00
1254 09:02:50.143061 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1255 09:02:50.152936 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1256 09:02:50.153021 PNP: 0c09.0
1257 09:02:50.163451 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1258 09:02:50.166126 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1259 09:02:50.176420 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1260 09:02:50.186199 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1261 09:02:50.189703 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1262 09:02:50.192945 GENERIC: 0.0
1263 09:02:50.193031 GENERIC: 1.0
1264 09:02:50.196476 PCI: 00:1f.3
1265 09:02:50.206183 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1266 09:02:50.215988 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1267 09:02:50.216079 PCI: 00:1f.5
1268 09:02:50.226216 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1269 09:02:50.229246 CPU_CLUSTER: 0 child on link 0 APIC: 00
1270 09:02:50.232453 APIC: 00
1271 09:02:50.232538 APIC: 01
1272 09:02:50.232606 APIC: 03
1273 09:02:50.235837 APIC: 07
1274 09:02:50.235922 APIC: 05
1275 09:02:50.239398 APIC: 04
1276 09:02:50.239490 APIC: 02
1277 09:02:50.239559 APIC: 06
1278 09:02:50.249393 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1279 09:02:50.252781 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1280 09:02:50.259075 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1281 09:02:50.265665 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1282 09:02:50.268955 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1283 09:02:50.275795 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1284 09:02:50.282161 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1285 09:02:50.288964 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1286 09:02:50.295569 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1287 09:02:50.305254 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1288 09:02:50.308523 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1289 09:02:50.318766 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 09:02:50.324978 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1291 09:02:50.331840 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1292 09:02:50.335311 DOMAIN: 0000: Resource ranges:
1293 09:02:50.338180 * Base: 1000, Size: 800, Tag: 100
1294 09:02:50.341691 * Base: 1900, Size: e700, Tag: 100
1295 09:02:50.348668 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1296 09:02:50.354859 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1297 09:02:50.361770 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1298 09:02:50.371241 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1299 09:02:50.378321 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1300 09:02:50.384410 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1301 09:02:50.391382 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1302 09:02:50.401159 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1303 09:02:50.407563 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1304 09:02:50.414211 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1305 09:02:50.424056 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1306 09:02:50.430648 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1307 09:02:50.437738 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1308 09:02:50.447739 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1309 09:02:50.454009 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1310 09:02:50.460890 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1311 09:02:50.470705 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1312 09:02:50.477011 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1313 09:02:50.483964 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1314 09:02:50.493670 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1315 09:02:50.500651 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1316 09:02:50.507241 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1317 09:02:50.516847 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1318 09:02:50.523700 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1319 09:02:50.530119 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1320 09:02:50.533720 DOMAIN: 0000: Resource ranges:
1321 09:02:50.539875 * Base: 7fc00000, Size: 40400000, Tag: 200
1322 09:02:50.543427 * Base: d0000000, Size: 28000000, Tag: 200
1323 09:02:50.547000 * Base: fa000000, Size: 1000000, Tag: 200
1324 09:02:50.553259 * Base: fb001000, Size: 2fff000, Tag: 200
1325 09:02:50.556711 * Base: fe010000, Size: 2e000, Tag: 200
1326 09:02:50.560073 * Base: fe03f000, Size: d41000, Tag: 200
1327 09:02:50.562999 * Base: fed88000, Size: 8000, Tag: 200
1328 09:02:50.570110 * Base: fed93000, Size: d000, Tag: 200
1329 09:02:50.572867 * Base: feda2000, Size: 1e000, Tag: 200
1330 09:02:50.576251 * Base: fede0000, Size: 1220000, Tag: 200
1331 09:02:50.583098 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1332 09:02:50.589463 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1333 09:02:50.596236 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1334 09:02:50.603405 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1335 09:02:50.609572 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1336 09:02:50.615760 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1337 09:02:50.622672 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1338 09:02:50.629455 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1339 09:02:50.635661 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1340 09:02:50.642730 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1341 09:02:50.649021 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1342 09:02:50.655795 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1343 09:02:50.662284 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1344 09:02:50.669053 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1345 09:02:50.675365 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1346 09:02:50.682465 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1347 09:02:50.688908 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1348 09:02:50.695014 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1349 09:02:50.701936 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1350 09:02:50.708668 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1351 09:02:50.715274 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1352 09:02:50.721899 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1353 09:02:50.728248 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1354 09:02:50.735072 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1355 09:02:50.745044 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1356 09:02:50.748235 PCI: 00:1d.0: Resource ranges:
1357 09:02:50.751465 * Base: 7fc00000, Size: 100000, Tag: 200
1358 09:02:50.757940 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1359 09:02:50.764835 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1360 09:02:50.771135 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1361 09:02:50.781227 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1362 09:02:50.784471 Root Device assign_resources, bus 0 link: 0
1363 09:02:50.787986 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 09:02:50.797492 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1365 09:02:50.804539 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1366 09:02:50.814094 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1367 09:02:50.821203 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1368 09:02:50.827249 PCI: 00:04.0 assign_resources, bus 1 link: 0
1369 09:02:50.830571 PCI: 00:04.0 assign_resources, bus 1 link: 0
1370 09:02:50.840848 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1371 09:02:50.847394 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1372 09:02:50.857278 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1373 09:02:50.860492 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1374 09:02:50.863827 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1375 09:02:50.874087 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1376 09:02:50.876891 PCI: 00:14.0 assign_resources, bus 0 link: 0
1377 09:02:50.883980 PCI: 00:14.0 assign_resources, bus 0 link: 0
1378 09:02:50.890177 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1379 09:02:50.897142 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1380 09:02:50.906793 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1381 09:02:50.910352 PCI: 00:14.3 assign_resources, bus 0 link: 0
1382 09:02:50.917312 PCI: 00:14.3 assign_resources, bus 0 link: 0
1383 09:02:50.923308 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1384 09:02:50.929633 PCI: 00:15.0 assign_resources, bus 0 link: 0
1385 09:02:50.932997 PCI: 00:15.0 assign_resources, bus 0 link: 0
1386 09:02:50.943076 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1387 09:02:50.946401 PCI: 00:15.1 assign_resources, bus 0 link: 0
1388 09:02:50.949865 PCI: 00:15.1 assign_resources, bus 0 link: 0
1389 09:02:50.959638 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1390 09:02:50.966064 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1391 09:02:50.975677 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1392 09:02:50.982608 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1393 09:02:50.989502 PCI: 00:19.1 assign_resources, bus 0 link: 0
1394 09:02:50.992488 PCI: 00:19.1 assign_resources, bus 0 link: 0
1395 09:02:51.002671 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1396 09:02:51.012048 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1397 09:02:51.018855 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1398 09:02:51.025597 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1399 09:02:51.031911 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1400 09:02:51.042212 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1401 09:02:51.045083 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 09:02:51.055524 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1403 09:02:51.058535 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1404 09:02:51.061775 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1405 09:02:51.071617 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1406 09:02:51.075307 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1407 09:02:51.082025 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1408 09:02:51.085320 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1409 09:02:51.091568 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1410 09:02:51.095087 LPC: Trying to open IO window from 800 size 1ff
1411 09:02:51.104858 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1412 09:02:51.111589 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1413 09:02:51.117897 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1414 09:02:51.124623 DOMAIN: 0000 assign_resources, bus 0 link: 0
1415 09:02:51.128114 Root Device assign_resources, bus 0 link: 0
1416 09:02:51.131040 Done setting resources.
1417 09:02:51.138149 Show resources in subtree (Root Device)...After assigning values.
1418 09:02:51.141261 Root Device child on link 0 DOMAIN: 0000
1419 09:02:51.148068 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1420 09:02:51.154159 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1421 09:02:51.163926 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1422 09:02:51.167307 PCI: 00:00.0
1423 09:02:51.177777 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1424 09:02:51.187133 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1425 09:02:51.194070 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1426 09:02:51.203743 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1427 09:02:51.214098 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1428 09:02:51.223583 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1429 09:02:51.233744 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1430 09:02:51.243632 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1431 09:02:51.250566 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1432 09:02:51.260237 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1433 09:02:51.270197 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1434 09:02:51.280300 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1435 09:02:51.289917 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1436 09:02:51.297046 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1437 09:02:51.306504 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1438 09:02:51.316331 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1439 09:02:51.326671 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1440 09:02:51.336214 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1441 09:02:51.345915 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1442 09:02:51.356389 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1443 09:02:51.356480 PCI: 00:02.0
1444 09:02:51.366115 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1445 09:02:51.379279 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1446 09:02:51.386094 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1447 09:02:51.392381 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1448 09:02:51.402774 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1449 09:02:51.405988 GENERIC: 0.0
1450 09:02:51.406073 PCI: 00:05.0
1451 09:02:51.415731 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1452 09:02:51.422333 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1453 09:02:51.422418 GENERIC: 0.0
1454 09:02:51.425959 PCI: 00:08.0
1455 09:02:51.435579 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1456 09:02:51.435663 PCI: 00:0a.0
1457 09:02:51.442273 PCI: 00:0d.0 child on link 0 USB0 port 0
1458 09:02:51.452150 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1459 09:02:51.455710 USB0 port 0 child on link 0 USB3 port 0
1460 09:02:51.459039 USB3 port 0
1461 09:02:51.459122 USB3 port 1
1462 09:02:51.462538 USB3 port 2
1463 09:02:51.462622 USB3 port 3
1464 09:02:51.468899 PCI: 00:14.0 child on link 0 USB0 port 0
1465 09:02:51.478790 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1466 09:02:51.481596 USB0 port 0 child on link 0 USB2 port 0
1467 09:02:51.485477 USB2 port 0
1468 09:02:51.485560 USB2 port 1
1469 09:02:51.488080 USB2 port 2
1470 09:02:51.488164 USB2 port 3
1471 09:02:51.491385 USB2 port 4
1472 09:02:51.491469 USB2 port 5
1473 09:02:51.494675 USB2 port 6
1474 09:02:51.494758 USB2 port 7
1475 09:02:51.498226 USB2 port 8
1476 09:02:51.498310 USB2 port 9
1477 09:02:51.501535 USB3 port 0
1478 09:02:51.501618 USB3 port 1
1479 09:02:51.504928 USB3 port 2
1480 09:02:51.508000 USB3 port 3
1481 09:02:51.508084 PCI: 00:14.2
1482 09:02:51.517816 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1483 09:02:51.527742 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1484 09:02:51.534480 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1485 09:02:51.544619 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1486 09:02:51.544715 GENERIC: 0.0
1487 09:02:51.551035 PCI: 00:15.0 child on link 0 I2C: 00:1a
1488 09:02:51.561230 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1489 09:02:51.561316 I2C: 00:1a
1490 09:02:51.564694 I2C: 00:31
1491 09:02:51.564777 I2C: 00:32
1492 09:02:51.567607 PCI: 00:15.1 child on link 0 I2C: 00:10
1493 09:02:51.580837 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1494 09:02:51.580928 I2C: 00:10
1495 09:02:51.584338 PCI: 00:15.2
1496 09:02:51.594434 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1497 09:02:51.594520 PCI: 00:15.3
1498 09:02:51.603855 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1499 09:02:51.607243 PCI: 00:16.0
1500 09:02:51.617167 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1501 09:02:51.617251 PCI: 00:19.0
1502 09:02:51.624109 PCI: 00:19.1 child on link 0 I2C: 00:15
1503 09:02:51.634033 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1504 09:02:51.634117 I2C: 00:15
1505 09:02:51.640445 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1506 09:02:51.646714 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1507 09:02:51.660352 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1508 09:02:51.670407 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1509 09:02:51.673331 GENERIC: 0.0
1510 09:02:51.673414 PCI: 01:00.0
1511 09:02:51.683553 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1512 09:02:51.693091 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1513 09:02:51.696454 PCI: 00:1e.0
1514 09:02:51.706589 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1515 09:02:51.713129 PCI: 00:1e.2 child on link 0 SPI: 00
1516 09:02:51.723165 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1517 09:02:51.723250 SPI: 00
1518 09:02:51.726703 PCI: 00:1e.3 child on link 0 SPI: 00
1519 09:02:51.736133 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 09:02:51.739466 SPI: 00
1521 09:02:51.743187 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 09:02:51.752492 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 09:02:51.752577 PNP: 0c09.0
1524 09:02:51.763120 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 09:02:51.766527 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 09:02:51.776015 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 09:02:51.785646 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 09:02:51.788935 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 09:02:51.792252 GENERIC: 0.0
1530 09:02:51.792343 GENERIC: 1.0
1531 09:02:51.795820 PCI: 00:1f.3
1532 09:02:51.805921 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 09:02:51.815221 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 09:02:51.818587 PCI: 00:1f.5
1535 09:02:51.828658 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 09:02:51.832136 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 09:02:51.835323 APIC: 00
1538 09:02:51.835423 APIC: 01
1539 09:02:51.835488 APIC: 03
1540 09:02:51.838756 APIC: 07
1541 09:02:51.838843 APIC: 05
1542 09:02:51.838908 APIC: 04
1543 09:02:51.842408 APIC: 02
1544 09:02:51.842501 APIC: 06
1545 09:02:51.845561 Done allocating resources.
1546 09:02:51.852261 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1547 09:02:51.858758 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 09:02:51.861714 Configure GPIOs for I2S audio on UP4.
1549 09:02:51.868228 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 09:02:51.871626 Enabling resources...
1551 09:02:51.875223 PCI: 00:00.0 subsystem <- 8086/9a12
1552 09:02:51.878485 PCI: 00:00.0 cmd <- 06
1553 09:02:51.882101 PCI: 00:02.0 subsystem <- 8086/9a40
1554 09:02:51.882184 PCI: 00:02.0 cmd <- 03
1555 09:02:51.888331 PCI: 00:04.0 subsystem <- 8086/9a03
1556 09:02:51.888413 PCI: 00:04.0 cmd <- 02
1557 09:02:51.891849 PCI: 00:05.0 subsystem <- 8086/9a19
1558 09:02:51.895157 PCI: 00:05.0 cmd <- 02
1559 09:02:51.898566 PCI: 00:08.0 subsystem <- 8086/9a11
1560 09:02:51.901844 PCI: 00:08.0 cmd <- 06
1561 09:02:51.905269 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 09:02:51.908018 PCI: 00:0d.0 cmd <- 02
1563 09:02:51.911382 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 09:02:51.914642 PCI: 00:14.0 cmd <- 02
1565 09:02:51.918150 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 09:02:51.921332 PCI: 00:14.2 cmd <- 02
1567 09:02:51.924669 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 09:02:51.928275 PCI: 00:14.3 cmd <- 02
1569 09:02:51.931017 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 09:02:51.931099 PCI: 00:15.0 cmd <- 02
1571 09:02:51.937851 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 09:02:51.937934 PCI: 00:15.1 cmd <- 02
1573 09:02:51.941194 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 09:02:51.944531 PCI: 00:15.2 cmd <- 02
1575 09:02:51.947826 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 09:02:51.951007 PCI: 00:15.3 cmd <- 02
1577 09:02:51.954106 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 09:02:51.957583 PCI: 00:16.0 cmd <- 02
1579 09:02:51.961133 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 09:02:51.964062 PCI: 00:19.1 cmd <- 02
1581 09:02:51.967447 PCI: 00:1d.0 bridge ctrl <- 0013
1582 09:02:51.971044 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 09:02:51.974124 PCI: 00:1d.0 cmd <- 06
1584 09:02:51.977850 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 09:02:51.980896 PCI: 00:1e.0 cmd <- 06
1586 09:02:51.983748 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 09:02:51.987454 PCI: 00:1e.2 cmd <- 06
1588 09:02:51.990378 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 09:02:51.990462 PCI: 00:1e.3 cmd <- 02
1590 09:02:51.996943 PCI: 00:1f.0 subsystem <- 8086/a087
1591 09:02:51.997027 PCI: 00:1f.0 cmd <- 407
1592 09:02:52.000275 PCI: 00:1f.3 subsystem <- 8086/a0c8
1593 09:02:52.003899 PCI: 00:1f.3 cmd <- 02
1594 09:02:52.007270 PCI: 00:1f.5 subsystem <- 8086/a0a4
1595 09:02:52.010160 PCI: 00:1f.5 cmd <- 406
1596 09:02:52.015148 PCI: 01:00.0 cmd <- 02
1597 09:02:52.019413 done.
1598 09:02:52.022772 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1599 09:02:52.026071 Initializing devices...
1600 09:02:52.029571 Root Device init
1601 09:02:52.032299 Chrome EC: Set SMI mask to 0x0000000000000000
1602 09:02:52.039854 Chrome EC: clear events_b mask to 0x0000000000000000
1603 09:02:52.046102 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1604 09:02:52.053060 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1605 09:02:52.059476 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1606 09:02:52.062811 Chrome EC: Set WAKE mask to 0x0000000000000000
1607 09:02:52.070666 fw_config match found: DB_USB=USB3_ACTIVE
1608 09:02:52.073953 Configure Right Type-C port orientation for retimer
1609 09:02:52.077537 Root Device init finished in 46 msecs
1610 09:02:52.081280 PCI: 00:00.0 init
1611 09:02:52.084724 CPU TDP = 9 Watts
1612 09:02:52.084807 CPU PL1 = 9 Watts
1613 09:02:52.087963 CPU PL2 = 40 Watts
1614 09:02:52.091336 CPU PL4 = 83 Watts
1615 09:02:52.094661 PCI: 00:00.0 init finished in 8 msecs
1616 09:02:52.097970 PCI: 00:02.0 init
1617 09:02:52.098054 GMA: Found VBT in CBFS
1618 09:02:52.100964 GMA: Found valid VBT in CBFS
1619 09:02:52.107521 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1620 09:02:52.114570 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1621 09:02:52.117947 PCI: 00:02.0 init finished in 18 msecs
1622 09:02:52.120911 PCI: 00:05.0 init
1623 09:02:52.124160 PCI: 00:05.0 init finished in 0 msecs
1624 09:02:52.127322 PCI: 00:08.0 init
1625 09:02:52.130704 PCI: 00:08.0 init finished in 0 msecs
1626 09:02:52.134198 PCI: 00:14.0 init
1627 09:02:52.137460 PCI: 00:14.0 init finished in 0 msecs
1628 09:02:52.140647 PCI: 00:14.2 init
1629 09:02:52.144037 PCI: 00:14.2 init finished in 0 msecs
1630 09:02:52.147241 PCI: 00:15.0 init
1631 09:02:52.150915 I2C bus 0 version 0x3230302a
1632 09:02:52.153987 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 09:02:52.157457 PCI: 00:15.0 init finished in 6 msecs
1634 09:02:52.160640 PCI: 00:15.1 init
1635 09:02:52.160726 I2C bus 1 version 0x3230302a
1636 09:02:52.167109 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 09:02:52.170451 PCI: 00:15.1 init finished in 6 msecs
1638 09:02:52.170536 PCI: 00:15.2 init
1639 09:02:52.174016 I2C bus 2 version 0x3230302a
1640 09:02:52.177300 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1641 09:02:52.180084 PCI: 00:15.2 init finished in 6 msecs
1642 09:02:52.184014 PCI: 00:15.3 init
1643 09:02:52.187610 I2C bus 3 version 0x3230302a
1644 09:02:52.190595 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1645 09:02:52.194262 PCI: 00:15.3 init finished in 6 msecs
1646 09:02:52.197227 PCI: 00:16.0 init
1647 09:02:52.200755 PCI: 00:16.0 init finished in 0 msecs
1648 09:02:52.203509 PCI: 00:19.1 init
1649 09:02:52.207033 I2C bus 5 version 0x3230302a
1650 09:02:52.210210 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1651 09:02:52.213692 PCI: 00:19.1 init finished in 6 msecs
1652 09:02:52.217126 PCI: 00:1d.0 init
1653 09:02:52.220270 Initializing PCH PCIe bridge.
1654 09:02:52.223537 PCI: 00:1d.0 init finished in 3 msecs
1655 09:02:52.226894 PCI: 00:1f.0 init
1656 09:02:52.230295 IOAPIC: Initializing IOAPIC at 0xfec00000
1657 09:02:52.233596 IOAPIC: Bootstrap Processor Local APIC = 0x00
1658 09:02:52.237142 IOAPIC: ID = 0x02
1659 09:02:52.240015 IOAPIC: Dumping registers
1660 09:02:52.240101 reg 0x0000: 0x02000000
1661 09:02:52.243900 reg 0x0001: 0x00770020
1662 09:02:52.247165 reg 0x0002: 0x00000000
1663 09:02:52.250226 PCI: 00:1f.0 init finished in 21 msecs
1664 09:02:52.253788 PCI: 00:1f.2 init
1665 09:02:52.256623 Disabling ACPI via APMC.
1666 09:02:52.256708 APMC done.
1667 09:02:52.263084 PCI: 00:1f.2 init finished in 5 msecs
1668 09:02:52.273950 PCI: 01:00.0 init
1669 09:02:52.276640 PCI: 01:00.0 init finished in 0 msecs
1670 09:02:52.279969 PNP: 0c09.0 init
1671 09:02:52.283561 Google Chrome EC uptime: 8.237 seconds
1672 09:02:52.290207 Google Chrome AP resets since EC boot: 1
1673 09:02:52.293364 Google Chrome most recent AP reset causes:
1674 09:02:52.296773 0.452: 32775 shutdown: entering G3
1675 09:02:52.303630 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1676 09:02:52.306788 PNP: 0c09.0 init finished in 22 msecs
1677 09:02:52.312248 Devices initialized
1678 09:02:52.315615 Show all devs... After init.
1679 09:02:52.319040 Root Device: enabled 1
1680 09:02:52.319125 DOMAIN: 0000: enabled 1
1681 09:02:52.322427 CPU_CLUSTER: 0: enabled 1
1682 09:02:52.325363 PCI: 00:00.0: enabled 1
1683 09:02:52.329249 PCI: 00:02.0: enabled 1
1684 09:02:52.329332 PCI: 00:04.0: enabled 1
1685 09:02:52.332641 PCI: 00:05.0: enabled 1
1686 09:02:52.335588 PCI: 00:06.0: enabled 0
1687 09:02:52.339013 PCI: 00:07.0: enabled 0
1688 09:02:52.339097 PCI: 00:07.1: enabled 0
1689 09:02:52.342032 PCI: 00:07.2: enabled 0
1690 09:02:52.345437 PCI: 00:07.3: enabled 0
1691 09:02:52.348728 PCI: 00:08.0: enabled 1
1692 09:02:52.348812 PCI: 00:09.0: enabled 0
1693 09:02:52.352125 PCI: 00:0a.0: enabled 0
1694 09:02:52.355312 PCI: 00:0d.0: enabled 1
1695 09:02:52.358804 PCI: 00:0d.1: enabled 0
1696 09:02:52.358888 PCI: 00:0d.2: enabled 0
1697 09:02:52.362237 PCI: 00:0d.3: enabled 0
1698 09:02:52.365097 PCI: 00:0e.0: enabled 0
1699 09:02:52.365180 PCI: 00:10.2: enabled 1
1700 09:02:52.368884 PCI: 00:10.6: enabled 0
1701 09:02:52.371659 PCI: 00:10.7: enabled 0
1702 09:02:52.375010 PCI: 00:12.0: enabled 0
1703 09:02:52.375092 PCI: 00:12.6: enabled 0
1704 09:02:52.378528 PCI: 00:13.0: enabled 0
1705 09:02:52.381743 PCI: 00:14.0: enabled 1
1706 09:02:52.385556 PCI: 00:14.1: enabled 0
1707 09:02:52.385640 PCI: 00:14.2: enabled 1
1708 09:02:52.388938 PCI: 00:14.3: enabled 1
1709 09:02:52.392075 PCI: 00:15.0: enabled 1
1710 09:02:52.395422 PCI: 00:15.1: enabled 1
1711 09:02:52.395506 PCI: 00:15.2: enabled 1
1712 09:02:52.398790 PCI: 00:15.3: enabled 1
1713 09:02:52.402060 PCI: 00:16.0: enabled 1
1714 09:02:52.405062 PCI: 00:16.1: enabled 0
1715 09:02:52.405145 PCI: 00:16.2: enabled 0
1716 09:02:52.408264 PCI: 00:16.3: enabled 0
1717 09:02:52.411707 PCI: 00:16.4: enabled 0
1718 09:02:52.411807 PCI: 00:16.5: enabled 0
1719 09:02:52.415170 PCI: 00:17.0: enabled 0
1720 09:02:52.418680 PCI: 00:19.0: enabled 0
1721 09:02:52.421904 PCI: 00:19.1: enabled 1
1722 09:02:52.421989 PCI: 00:19.2: enabled 0
1723 09:02:52.425167 PCI: 00:1c.0: enabled 1
1724 09:02:52.428332 PCI: 00:1c.1: enabled 0
1725 09:02:52.431723 PCI: 00:1c.2: enabled 0
1726 09:02:52.431822 PCI: 00:1c.3: enabled 0
1727 09:02:52.435277 PCI: 00:1c.4: enabled 0
1728 09:02:52.438487 PCI: 00:1c.5: enabled 0
1729 09:02:52.441709 PCI: 00:1c.6: enabled 1
1730 09:02:52.441795 PCI: 00:1c.7: enabled 0
1731 09:02:52.445052 PCI: 00:1d.0: enabled 1
1732 09:02:52.448175 PCI: 00:1d.1: enabled 0
1733 09:02:52.451521 PCI: 00:1d.2: enabled 1
1734 09:02:52.451606 PCI: 00:1d.3: enabled 0
1735 09:02:52.454969 PCI: 00:1e.0: enabled 1
1736 09:02:52.458533 PCI: 00:1e.1: enabled 0
1737 09:02:52.458618 PCI: 00:1e.2: enabled 1
1738 09:02:52.461361 PCI: 00:1e.3: enabled 1
1739 09:02:52.464606 PCI: 00:1f.0: enabled 1
1740 09:02:52.467745 PCI: 00:1f.1: enabled 0
1741 09:02:52.467830 PCI: 00:1f.2: enabled 1
1742 09:02:52.471233 PCI: 00:1f.3: enabled 1
1743 09:02:52.474559 PCI: 00:1f.4: enabled 0
1744 09:02:52.477855 PCI: 00:1f.5: enabled 1
1745 09:02:52.477939 PCI: 00:1f.6: enabled 0
1746 09:02:52.481093 PCI: 00:1f.7: enabled 0
1747 09:02:52.484456 APIC: 00: enabled 1
1748 09:02:52.484541 GENERIC: 0.0: enabled 1
1749 09:02:52.487670 GENERIC: 0.0: enabled 1
1750 09:02:52.491116 GENERIC: 1.0: enabled 1
1751 09:02:52.494362 GENERIC: 0.0: enabled 1
1752 09:02:52.494447 GENERIC: 1.0: enabled 1
1753 09:02:52.498108 USB0 port 0: enabled 1
1754 09:02:52.500902 GENERIC: 0.0: enabled 1
1755 09:02:52.504433 USB0 port 0: enabled 1
1756 09:02:52.504518 GENERIC: 0.0: enabled 1
1757 09:02:52.507843 I2C: 00:1a: enabled 1
1758 09:02:52.511148 I2C: 00:31: enabled 1
1759 09:02:52.511233 I2C: 00:32: enabled 1
1760 09:02:52.514487 I2C: 00:10: enabled 1
1761 09:02:52.517838 I2C: 00:15: enabled 1
1762 09:02:52.517922 GENERIC: 0.0: enabled 0
1763 09:02:52.521189 GENERIC: 1.0: enabled 0
1764 09:02:52.524686 GENERIC: 0.0: enabled 1
1765 09:02:52.524771 SPI: 00: enabled 1
1766 09:02:52.527606 SPI: 00: enabled 1
1767 09:02:52.531062 PNP: 0c09.0: enabled 1
1768 09:02:52.531147 GENERIC: 0.0: enabled 1
1769 09:02:52.534425 USB3 port 0: enabled 1
1770 09:02:52.537807 USB3 port 1: enabled 1
1771 09:02:52.541223 USB3 port 2: enabled 0
1772 09:02:52.541308 USB3 port 3: enabled 0
1773 09:02:52.543939 USB2 port 0: enabled 0
1774 09:02:52.547405 USB2 port 1: enabled 1
1775 09:02:52.547491 USB2 port 2: enabled 1
1776 09:02:52.550866 USB2 port 3: enabled 0
1777 09:02:52.553875 USB2 port 4: enabled 1
1778 09:02:52.557752 USB2 port 5: enabled 0
1779 09:02:52.557837 USB2 port 6: enabled 0
1780 09:02:52.560629 USB2 port 7: enabled 0
1781 09:02:52.564119 USB2 port 8: enabled 0
1782 09:02:52.564204 USB2 port 9: enabled 0
1783 09:02:52.567454 USB3 port 0: enabled 0
1784 09:02:52.570711 USB3 port 1: enabled 1
1785 09:02:52.574082 USB3 port 2: enabled 0
1786 09:02:52.574190 USB3 port 3: enabled 0
1787 09:02:52.577463 GENERIC: 0.0: enabled 1
1788 09:02:52.580619 GENERIC: 1.0: enabled 1
1789 09:02:52.580705 APIC: 01: enabled 1
1790 09:02:52.583539 APIC: 03: enabled 1
1791 09:02:52.586858 APIC: 07: enabled 1
1792 09:02:52.586943 APIC: 05: enabled 1
1793 09:02:52.590152 APIC: 04: enabled 1
1794 09:02:52.593471 APIC: 02: enabled 1
1795 09:02:52.593557 APIC: 06: enabled 1
1796 09:02:52.596974 PCI: 01:00.0: enabled 1
1797 09:02:52.603761 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1798 09:02:52.606649 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1799 09:02:52.610195 ELOG: NV offset 0xf30000 size 0x1000
1800 09:02:52.617613 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1801 09:02:52.624316 ELOG: Event(17) added with size 13 at 2022-09-27 09:01:18 UTC
1802 09:02:52.630633 ELOG: Event(92) added with size 9 at 2022-09-27 09:01:18 UTC
1803 09:02:52.637175 ELOG: Event(93) added with size 9 at 2022-09-27 09:01:18 UTC
1804 09:02:52.643674 ELOG: Event(9E) added with size 10 at 2022-09-27 09:01:18 UTC
1805 09:02:52.650427 ELOG: Event(9F) added with size 14 at 2022-09-27 09:01:18 UTC
1806 09:02:52.657213 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1807 09:02:52.663986 ELOG: Event(A1) added with size 10 at 2022-09-27 09:01:18 UTC
1808 09:02:52.670299 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 09:02:52.676578 ELOG: Event(A0) added with size 9 at 2022-09-27 09:01:18 UTC
1810 09:02:52.680098 elog_add_boot_reason: Logged dev mode boot
1811 09:02:52.687177 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1812 09:02:52.687263 Finalize devices...
1813 09:02:52.690147 Devices finalized
1814 09:02:52.696408 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 09:02:52.699574 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 09:02:52.706098 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 09:02:52.709485 ME: HFSTS1 : 0x80030055
1818 09:02:52.716198 ME: HFSTS2 : 0x30280116
1819 09:02:52.719517 ME: HFSTS3 : 0x00000050
1820 09:02:52.726412 ME: HFSTS4 : 0x00004000
1821 09:02:52.729557 ME: HFSTS5 : 0x00000000
1822 09:02:52.732727 ME: HFSTS6 : 0x40400006
1823 09:02:52.736159 ME: Manufacturing Mode : YES
1824 09:02:52.742777 ME: SPI Protection Mode Enabled : NO
1825 09:02:52.745975 ME: FW Partition Table : OK
1826 09:02:52.749501 ME: Bringup Loader Failure : NO
1827 09:02:52.752886 ME: Firmware Init Complete : NO
1828 09:02:52.756176 ME: Boot Options Present : NO
1829 09:02:52.759103 ME: Update In Progress : NO
1830 09:02:52.762392 ME: D0i3 Support : YES
1831 09:02:52.765859 ME: Low Power State Enabled : NO
1832 09:02:52.771977 ME: CPU Replaced : YES
1833 09:02:52.775307 ME: CPU Replacement Valid : YES
1834 09:02:52.778907 ME: Current Working State : 5
1835 09:02:52.781995 ME: Current Operation State : 1
1836 09:02:52.785760 ME: Current Operation Mode : 3
1837 09:02:52.788553 ME: Error Code : 0
1838 09:02:52.792179 ME: Enhanced Debug Mode : NO
1839 09:02:52.795296 ME: CPU Debug Disabled : YES
1840 09:02:52.802149 ME: TXT Support : NO
1841 09:02:52.805237 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 09:02:52.815464 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 09:02:52.818866 CBFS: 'fallback/slic' not found.
1844 09:02:52.821889 ACPI: Writing ACPI tables at 76b01000.
1845 09:02:52.821975 ACPI: * FACS
1846 09:02:52.825064 ACPI: * DSDT
1847 09:02:52.828431 Ramoops buffer: 0x100000@0x76a00000.
1848 09:02:52.831697 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 09:02:52.838254 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 09:02:52.841703 Google Chrome EC: version:
1851 09:02:52.844977 ro: voema_v2.0.10114-a447f03e46
1852 09:02:52.848321 rw: voema_v2.0.10114-a447f03e46
1853 09:02:52.851971 running image: 2
1854 09:02:52.855000 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1855 09:02:52.860384 ACPI: * FADT
1856 09:02:52.860469 SCI is IRQ9
1857 09:02:52.866864 ACPI: added table 1/32, length now 40
1858 09:02:52.866950 ACPI: * SSDT
1859 09:02:52.870190 Found 1 CPU(s) with 8 core(s) each.
1860 09:02:52.876562 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1861 09:02:52.879880 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1862 09:02:52.883541 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1863 09:02:52.886712 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1864 09:02:52.893595 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1865 09:02:52.899763 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1866 09:02:52.903477 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1867 09:02:52.909758 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1868 09:02:52.916428 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1869 09:02:52.919810 \_SB.PCI0.RP09: Added StorageD3Enable property
1870 09:02:52.927056 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1871 09:02:52.929689 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1872 09:02:52.936493 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1873 09:02:52.939500 PS2K: Passing 80 keymaps to kernel
1874 09:02:52.946371 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1875 09:02:52.952870 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1876 09:02:52.959438 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1877 09:02:52.966142 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1878 09:02:52.972976 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1879 09:02:52.979241 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1880 09:02:52.986159 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1881 09:02:52.992727 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1882 09:02:52.995923 ACPI: added table 2/32, length now 44
1883 09:02:52.999462 ACPI: * MCFG
1884 09:02:53.002449 ACPI: added table 3/32, length now 48
1885 09:02:53.002534 ACPI: * TPM2
1886 09:02:53.005631 TPM2 log created at 0x769f0000
1887 09:02:53.008932 ACPI: added table 4/32, length now 52
1888 09:02:53.012283 ACPI: * MADT
1889 09:02:53.012368 SCI is IRQ9
1890 09:02:53.015665 ACPI: added table 5/32, length now 56
1891 09:02:53.019007 current = 76b09850
1892 09:02:53.019091 ACPI: * DMAR
1893 09:02:53.025850 ACPI: added table 6/32, length now 60
1894 09:02:53.029217 ACPI: added table 7/32, length now 64
1895 09:02:53.029300 ACPI: * HPET
1896 09:02:53.032344 ACPI: added table 8/32, length now 68
1897 09:02:53.035823 ACPI: done.
1898 09:02:53.038979 ACPI tables: 35216 bytes.
1899 09:02:53.042236 smbios_write_tables: 769ef000
1900 09:02:53.045801 EC returned error result code 3
1901 09:02:53.049079 Couldn't obtain OEM name from CBI
1902 09:02:53.052324 Create SMBIOS type 16
1903 09:02:53.055143 Create SMBIOS type 17
1904 09:02:53.055226 GENERIC: 0.0 (WIFI Device)
1905 09:02:53.058542 SMBIOS tables: 1734 bytes.
1906 09:02:53.061819 Writing table forward entry at 0x00000500
1907 09:02:53.068755 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1908 09:02:53.071818 Writing coreboot table at 0x76b25000
1909 09:02:53.078638 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1910 09:02:53.085123 1. 0000000000001000-000000000009ffff: RAM
1911 09:02:53.088494 2. 00000000000a0000-00000000000fffff: RESERVED
1912 09:02:53.091637 3. 0000000000100000-00000000769eefff: RAM
1913 09:02:53.098484 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1914 09:02:53.104694 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1915 09:02:53.108148 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1916 09:02:53.114841 7. 0000000077000000-000000007fbfffff: RESERVED
1917 09:02:53.118046 8. 00000000c0000000-00000000cfffffff: RESERVED
1918 09:02:53.124772 9. 00000000f8000000-00000000f9ffffff: RESERVED
1919 09:02:53.128283 10. 00000000fb000000-00000000fb000fff: RESERVED
1920 09:02:53.135218 11. 00000000fe000000-00000000fe00ffff: RESERVED
1921 09:02:53.138413 12. 00000000fed80000-00000000fed87fff: RESERVED
1922 09:02:53.141159 13. 00000000fed90000-00000000fed92fff: RESERVED
1923 09:02:53.147827 14. 00000000feda0000-00000000feda1fff: RESERVED
1924 09:02:53.151152 15. 00000000fedc0000-00000000feddffff: RESERVED
1925 09:02:53.157897 16. 0000000100000000-00000004803fffff: RAM
1926 09:02:53.161254 Passing 4 GPIOs to payload:
1927 09:02:53.164826 NAME | PORT | POLARITY | VALUE
1928 09:02:53.170938 lid | undefined | high | high
1929 09:02:53.174161 power | undefined | high | low
1930 09:02:53.181378 oprom | undefined | high | low
1931 09:02:53.187517 EC in RW | 0x000000e5 | high | high
1932 09:02:53.190856 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1933 09:02:53.194198 coreboot table: 1576 bytes.
1934 09:02:53.197601 IMD ROOT 0. 0x76fff000 0x00001000
1935 09:02:53.204140 IMD SMALL 1. 0x76ffe000 0x00001000
1936 09:02:53.207474 FSP MEMORY 2. 0x76c4e000 0x003b0000
1937 09:02:53.210649 VPD 3. 0x76c4d000 0x00000367
1938 09:02:53.213910 RO MCACHE 4. 0x76c4c000 0x00000fdc
1939 09:02:53.217501 CONSOLE 5. 0x76c2c000 0x00020000
1940 09:02:53.220758 FMAP 6. 0x76c2b000 0x00000578
1941 09:02:53.223671 TIME STAMP 7. 0x76c2a000 0x00000910
1942 09:02:53.227228 VBOOT WORK 8. 0x76c16000 0x00014000
1943 09:02:53.234005 ROMSTG STCK 9. 0x76c15000 0x00001000
1944 09:02:53.237177 AFTER CAR 10. 0x76c0a000 0x0000b000
1945 09:02:53.240200 RAMSTAGE 11. 0x76b97000 0x00073000
1946 09:02:53.243317 REFCODE 12. 0x76b42000 0x00055000
1947 09:02:53.246585 SMM BACKUP 13. 0x76b32000 0x00010000
1948 09:02:53.250045 4f444749 14. 0x76b30000 0x00002000
1949 09:02:53.253396 EXT VBT15. 0x76b2d000 0x0000219f
1950 09:02:53.256639 COREBOOT 16. 0x76b25000 0x00008000
1951 09:02:53.263375 ACPI 17. 0x76b01000 0x00024000
1952 09:02:53.266805 ACPI GNVS 18. 0x76b00000 0x00001000
1953 09:02:53.270262 RAMOOPS 19. 0x76a00000 0x00100000
1954 09:02:53.272936 TPM2 TCGLOG20. 0x769f0000 0x00010000
1955 09:02:53.276389 SMBIOS 21. 0x769ef000 0x00000800
1956 09:02:53.279954 IMD small region:
1957 09:02:53.283383 IMD ROOT 0. 0x76ffec00 0x00000400
1958 09:02:53.286128 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1959 09:02:53.289589 POWER STATE 2. 0x76ffeb80 0x00000044
1960 09:02:53.292837 ROMSTAGE 3. 0x76ffeb60 0x00000004
1961 09:02:53.299491 MEM INFO 4. 0x76ffe980 0x000001e0
1962 09:02:53.303033 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1963 09:02:53.306288 MTRR: Physical address space:
1964 09:02:53.312948 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1965 09:02:53.319539 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1966 09:02:53.326093 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1967 09:02:53.332343 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1968 09:02:53.339384 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1969 09:02:53.346533 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1970 09:02:53.349093 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1971 09:02:53.355713 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 09:02:53.358996 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 09:02:53.362531 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 09:02:53.365665 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 09:02:53.372374 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 09:02:53.375837 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 09:02:53.379264 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 09:02:53.382618 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 09:02:53.389327 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 09:02:53.392562 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 09:02:53.395615 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 09:02:53.399559 call enable_fixed_mtrr()
1983 09:02:53.403025 CPU physical address size: 39 bits
1984 09:02:53.409859 MTRR: default type WB/UC MTRR counts: 6/7.
1985 09:02:53.412924 MTRR: WB selected as default type.
1986 09:02:53.419777 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1987 09:02:53.423059 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1988 09:02:53.429324 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1989 09:02:53.436241 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1990 09:02:53.442676 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1991 09:02:53.449579 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1992 09:02:53.453093
1993 09:02:53.453180 MTRR check
1994 09:02:53.456284 Fixed MTRRs : Enabled
1995 09:02:53.456370 Variable MTRRs: Enabled
1996 09:02:53.456437
1997 09:02:53.463157 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 09:02:53.466436 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 09:02:53.469523 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 09:02:53.473100 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 09:02:53.479268 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 09:02:53.482697 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 09:02:53.486086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 09:02:53.489303 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 09:02:53.496093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 09:02:53.499305 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 09:02:53.502579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 09:02:53.505994 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 09:02:53.512608 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 09:02:53.515914 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 09:02:53.519325 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 09:02:53.522612 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 09:02:53.526145 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 09:02:53.532848 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 09:02:53.535754 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 09:02:53.539193 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 09:02:53.542265 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 09:02:53.549078 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 09:02:53.552528 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 09:02:53.559260 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 09:02:53.559346 call enable_fixed_mtrr()
2022 09:02:53.566075 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 09:02:53.569153 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 09:02:53.572089 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 09:02:53.575628 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 09:02:53.581953 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 09:02:53.585751 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 09:02:53.588740 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 09:02:53.592025 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 09:02:53.598846 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 09:02:53.601971 CPU physical address size: 39 bits
2032 09:02:53.605978 call enable_fixed_mtrr()
2033 09:02:53.612705 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2034 09:02:53.615654 call enable_fixed_mtrr()
2035 09:02:53.619410 Checking cr50 for pending updates
2036 09:02:53.622819 CPU physical address size: 39 bits
2037 09:02:53.626662 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 09:02:53.629453 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 09:02:53.632899 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 09:02:53.639655 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 09:02:53.643327 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 09:02:53.646249 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 09:02:53.649651 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 09:02:53.656272 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 09:02:53.659666 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 09:02:53.662382 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 09:02:53.665692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 09:02:53.672290 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 09:02:53.675538 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 09:02:53.678879 call enable_fixed_mtrr()
2051 09:02:53.682303 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 09:02:53.689115 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 09:02:53.692424 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 09:02:53.695529 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 09:02:53.698788 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 09:02:53.705572 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 09:02:53.709031 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 09:02:53.711893 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 09:02:53.715197 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 09:02:53.720270 CPU physical address size: 39 bits
2061 09:02:53.726790 call enable_fixed_mtrr()
2062 09:02:53.729714 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 09:02:53.733097 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 09:02:53.739878 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 09:02:53.743478 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 09:02:53.746555 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 09:02:53.749735 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 09:02:53.753212 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 09:02:53.759759 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 09:02:53.763287 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 09:02:53.766462 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 09:02:53.769731 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 09:02:53.776273 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 09:02:53.780062 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 09:02:53.782828 call enable_fixed_mtrr()
2076 09:02:53.786251 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 09:02:53.793058 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 09:02:53.796238 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 09:02:53.799630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 09:02:53.802545 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 09:02:53.809133 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 09:02:53.812724 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 09:02:53.815845 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 09:02:53.819428 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 09:02:53.824322 CPU physical address size: 39 bits
2086 09:02:53.830860 call enable_fixed_mtrr()
2087 09:02:53.833744 CPU physical address size: 39 bits
2088 09:02:53.837129 CPU physical address size: 39 bits
2089 09:02:53.840494 CPU physical address size: 39 bits
2090 09:02:53.843924 Reading cr50 TPM mode
2091 09:02:53.852835 BS: BS_PAYLOAD_LOAD entry times (exec / console): 229 / 6 ms
2092 09:02:53.862923 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2093 09:02:53.866177 Checking segment from ROM address 0xffc02b38
2094 09:02:53.869438 Checking segment from ROM address 0xffc02b54
2095 09:02:53.876248 Loading segment from ROM address 0xffc02b38
2096 09:02:53.876333 code (compression=0)
2097 09:02:53.886132 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2098 09:02:53.895693 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2099 09:02:53.895800 it's not compressed!
2100 09:02:54.037133 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2101 09:02:54.044012 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2102 09:02:54.050293 Loading segment from ROM address 0xffc02b54
2103 09:02:54.053635 Entry Point 0x30000000
2104 09:02:54.053720 Loaded segments
2105 09:02:54.060251 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2106 09:02:54.105553 Finalizing chipset.
2107 09:02:54.108730 Finalizing SMM.
2108 09:02:54.108816 APMC done.
2109 09:02:54.115486 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2110 09:02:54.118629 mp_park_aps done after 0 msecs.
2111 09:02:54.122159 Jumping to boot code at 0x30000000(0x76b25000)
2112 09:02:54.131816 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2113 09:02:54.131902
2114 09:02:54.135031 Starting depthcharge on Voema...
2115 09:02:54.135408 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2116 09:02:54.135511 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2117 09:02:54.135595 Setting prompt string to ['volteer:']
2118 09:02:54.135676 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2119 09:02:54.145503 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2120 09:02:54.152042 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2121 09:02:54.158466 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2122 09:02:54.161781 Failed to find eMMC card reader
2123 09:02:54.161866 Wipe memory regions:
2124 09:02:54.168518 [0x00000000001000, 0x000000000a0000)
2125 09:02:54.171847 [0x00000000100000, 0x00000030000000)
2126 09:02:54.208966 [0x00000032662db0, 0x000000769ef000)
2127 09:02:54.260566 [0x00000100000000, 0x00000480400000)
2128 09:02:54.891265 ec_init: CrosEC protocol v3 supported (256, 256)
2129 09:02:55.323114 R8152: Initializing
2130 09:02:55.326776 Version 6 (ocp_data = 5c30)
2131 09:02:55.330016 R8152: Done initializing
2132 09:02:55.333428 Adding net device
2133 09:02:55.638929 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2134 09:02:55.639069
2135 09:02:55.642396 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2137 09:02:55.743167 volteer: tftpboot 192.168.201.1 7420058/tftp-deploy-ne4uqpnr/kernel/bzImage 7420058/tftp-deploy-ne4uqpnr/kernel/cmdline 7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
2138 09:02:55.743298 Setting prompt string to 'Starting kernel'
2139 09:02:55.743373 Setting prompt string to ['Starting kernel']
2140 09:02:55.743440 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2141 09:02:55.743520 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2142 09:02:55.747443 tftpboot 192.168.201.1 7420058/tftp-deploy-ne4uqpnr/kernel/bzImoy-ne4uqpnr/kernel/cmdline 7420058/tftp-deploy-ne4uqpnr/ramdisk/ramdisk.cpio.gz
2143 09:02:55.747531 Waiting for link
2144 09:02:55.950415 done.
2145 09:02:55.950553 MAC: 00:24:32:30:78:e4
2146 09:02:55.953780 Sending DHCP discover... done.
2147 09:02:55.957349 Waiting for reply... done.
2148 09:02:55.960174 Sending DHCP request... done.
2149 09:02:55.966616 Waiting for reply... done.
2150 09:02:55.966703 My ip is 192.168.201.15
2151 09:02:55.970001 The DHCP server ip is 192.168.201.1
2152 09:02:55.976679 TFTP server IP predefined by user: 192.168.201.1
2153 09:02:55.983407 Bootfile predefined by user: 7420058/tftp-deploy-ne4uqpnr/kernel/bzImage
2154 09:02:55.986717 Sending tftp read request... done.
2155 09:02:55.989606 Waiting for the transfer...
2156 09:02:56.591472 00000000 ################################################################
2157 09:02:57.156248 00080000 ################################################################
2158 09:02:57.764580 00100000 ################################################################
2159 09:02:58.440522 00180000 ################################################################
2160 09:02:59.120275 00200000 ################################################################
2161 09:02:59.826920 00280000 ################################################################
2162 09:03:00.479834 00300000 ################################################################
2163 09:03:01.083095 00380000 ################################################################
2164 09:03:01.699196 00400000 ################################################################
2165 09:03:02.298488 00480000 ################################################################
2166 09:03:02.901858 00500000 ################################################################
2167 09:03:03.514130 00580000 ################################################################
2168 09:03:04.098956 00600000 ################################################################
2169 09:03:04.700094 00680000 ################################################################
2170 09:03:05.306221 00700000 ################################################################
2171 09:03:05.921608 00780000 ################################################################
2172 09:03:06.509635 00800000 ################################################################
2173 09:03:06.878651 00880000 ############################################ done.
2174 09:03:06.882091 The bootfile was 9265152 bytes long.
2175 09:03:06.885141 Sending tftp read request... done.
2176 09:03:06.888690 Waiting for the transfer...
2177 09:03:07.427685 00000000 ################################################################
2178 09:03:07.978403 00080000 ################################################################
2179 09:03:08.560700 00100000 ################################################################
2180 09:03:09.163734 00180000 ################################################################
2181 09:03:09.777875 00200000 ################################################################
2182 09:03:10.404508 00280000 ################################################################
2183 09:03:11.022469 00300000 ################################################################
2184 09:03:11.638022 00380000 ################################################################
2185 09:03:12.199623 00400000 ################################################################
2186 09:03:12.729012 00480000 ################################################################
2187 09:03:13.012612 00500000 ################################### done.
2188 09:03:13.016190 Sending tftp read request... done.
2189 09:03:13.019142 Waiting for the transfer...
2190 09:03:13.019233 00000000 # done.
2191 09:03:13.029434 Command line loaded dynamically from TFTP file: 7420058/tftp-deploy-ne4uqpnr/kernel/cmdline
2192 09:03:13.051985 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7420058/extract-nfsrootfs-8gekv046,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2193 09:03:13.060382 Shutting down all USB controllers.
2194 09:03:13.060473 Removing current net device
2195 09:03:13.063188 Finalizing coreboot
2196 09:03:13.070213 Exiting depthcharge with code 4 at timestamp: 27511886
2197 09:03:13.070299
2198 09:03:13.070366 Starting kernel ...
2199 09:03:13.070428
2200 09:03:13.070487
2201 09:03:13.070851 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2202 09:03:13.070951 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2203 09:03:13.071028 Setting prompt string to ['Linux version [0-9]']
2204 09:03:13.071096 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2205 09:03:13.071166 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2207 09:07:37.071224 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2209 09:07:37.071540 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2211 09:07:37.071712 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2214 09:07:37.071991 end: 2 depthcharge-action (duration 00:05:00) [common]
2216 09:07:37.072186 Cleaning after the job
2217 09:07:37.072271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/ramdisk
2218 09:07:37.072731 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/kernel
2219 09:07:37.073396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/nfsrootfs
2220 09:07:37.104848 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7420058/tftp-deploy-ne4uqpnr/modules
2221 09:07:37.105161 start: 5.1 power-off (timeout 00:00:30) [common]
2222 09:07:37.105329 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2223 09:07:37.124976 >> Command sent successfully.
2224 09:07:37.126935 Returned 0 in 0 seconds
2225 09:07:37.227760 end: 5.1 power-off (duration 00:00:00) [common]
2227 09:07:37.228090 start: 5.2 read-feedback (timeout 00:10:00) [common]
2228 09:07:37.228322 Listened to connection for namespace 'common' for up to 1s
2229 09:07:38.231789 Finalising connection for namespace 'common'
2230 09:07:38.231974 Disconnecting from shell: Finalise
2231 09:07:38.332690 end: 5.2 read-feedback (duration 00:00:01) [common]
2232 09:07:38.332856 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7420058
2233 09:07:38.424899 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7420058
2234 09:07:38.425108 JobError: Your job cannot terminate cleanly.