Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 11:08:51.439441 lava-dispatcher, installed at version: 2022.10
2 11:08:51.439670 start: 0 validate
3 11:08:51.439810 Start time: 2022-11-26 11:08:51.439801+00:00 (UTC)
4 11:08:51.439962 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:08:51.440153 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20221107.1%2Famd64%2Frootfs.cpio.gz exists
6 11:08:51.736166 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:08:51.736335 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:08:51.738180 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:08:51.738307 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:08:51.749308 validate duration: 0.31
12 11:08:51.749555 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:08:51.749664 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:08:51.749769 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:08:51.749869 Not decompressing ramdisk as can be used compressed.
16 11:08:51.749953 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20221107.1/amd64/rootfs.cpio.gz
17 11:08:51.750022 saving as /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/ramdisk/rootfs.cpio.gz
18 11:08:51.750085 total size: 35753913 (34MB)
19 11:08:51.773024 progress 0% (0MB)
20 11:08:51.832309 progress 5% (1MB)
21 11:08:51.858333 progress 10% (3MB)
22 11:08:51.884547 progress 15% (5MB)
23 11:08:51.913672 progress 20% (6MB)
24 11:08:51.939441 progress 25% (8MB)
25 11:08:51.965675 progress 30% (10MB)
26 11:08:51.994782 progress 35% (11MB)
27 11:08:52.029764 progress 40% (13MB)
28 11:08:52.067230 progress 45% (15MB)
29 11:08:52.101426 progress 50% (17MB)
30 11:08:52.128678 progress 55% (18MB)
31 11:08:52.154889 progress 60% (20MB)
32 11:08:52.178334 progress 65% (22MB)
33 11:08:52.200550 progress 70% (23MB)
34 11:08:52.222509 progress 75% (25MB)
35 11:08:52.242599 progress 80% (27MB)
36 11:08:52.264848 progress 85% (29MB)
37 11:08:52.287064 progress 90% (30MB)
38 11:08:52.308493 progress 95% (32MB)
39 11:08:52.330569 progress 100% (34MB)
40 11:08:52.330793 34MB downloaded in 0.58s (58.72MB/s)
41 11:08:52.330971 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:08:52.331259 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:08:52.331373 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:08:52.331478 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:08:52.331596 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:08:52.331672 saving as /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/kernel/bzImage
48 11:08:52.331757 total size: 9273344 (8MB)
49 11:08:52.331839 No compression specified
50 11:08:52.622001 progress 0% (0MB)
51 11:08:52.629882 progress 5% (0MB)
52 11:08:52.638694 progress 10% (0MB)
53 11:08:52.645401 progress 15% (1MB)
54 11:08:52.653390 progress 20% (1MB)
55 11:08:52.661287 progress 25% (2MB)
56 11:08:52.669620 progress 30% (2MB)
57 11:08:52.677237 progress 35% (3MB)
58 11:08:52.685343 progress 40% (3MB)
59 11:08:52.692980 progress 45% (4MB)
60 11:08:52.700714 progress 50% (4MB)
61 11:08:52.709535 progress 55% (4MB)
62 11:08:52.717414 progress 60% (5MB)
63 11:08:52.724490 progress 65% (5MB)
64 11:08:52.732566 progress 70% (6MB)
65 11:08:52.740390 progress 75% (6MB)
66 11:08:52.749049 progress 80% (7MB)
67 11:08:52.755962 progress 85% (7MB)
68 11:08:52.764451 progress 90% (7MB)
69 11:08:52.771703 progress 95% (8MB)
70 11:08:52.779456 progress 100% (8MB)
71 11:08:52.779797 8MB downloaded in 0.45s (19.74MB/s)
72 11:08:52.779969 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:08:52.780216 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:08:52.780308 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:08:52.780398 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:08:52.780504 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:08:52.780573 saving as /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/modules/modules.tar
79 11:08:52.780637 total size: 64696 (0MB)
80 11:08:52.780700 Using unxz to decompress xz
81 11:08:52.785220 progress 50% (0MB)
82 11:08:52.785823 progress 100% (0MB)
83 11:08:52.789971 0MB downloaded in 0.01s (6.62MB/s)
84 11:08:52.790241 end: 1.3.1 http-download (duration 00:00:00) [common]
86 11:08:52.790522 end: 1.3 download-retry (duration 00:00:00) [common]
87 11:08:52.790622 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 11:08:52.790721 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 11:08:52.790807 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 11:08:52.790895 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 11:08:52.791070 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7
92 11:08:52.791182 makedir: /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin
93 11:08:52.791269 makedir: /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/tests
94 11:08:52.791352 makedir: /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/results
95 11:08:52.791458 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-add-keys
96 11:08:52.791590 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-add-sources
97 11:08:52.791707 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-background-process-start
98 11:08:52.791820 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-background-process-stop
99 11:08:52.791948 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-common-functions
100 11:08:52.792066 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-echo-ipv4
101 11:08:52.792182 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-install-packages
102 11:08:52.792302 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-installed-packages
103 11:08:52.792411 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-os-build
104 11:08:52.792522 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-probe-channel
105 11:08:52.792635 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-probe-ip
106 11:08:52.792746 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-target-ip
107 11:08:52.792856 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-target-mac
108 11:08:52.792965 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-target-storage
109 11:08:52.793079 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-case
110 11:08:52.793190 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-event
111 11:08:52.793301 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-feedback
112 11:08:52.793411 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-raise
113 11:08:52.793526 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-reference
114 11:08:52.793637 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-runner
115 11:08:52.793746 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-set
116 11:08:52.793854 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-test-shell
117 11:08:52.793966 Updating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-install-packages (oe)
118 11:08:52.794083 Updating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/bin/lava-installed-packages (oe)
119 11:08:52.794184 Creating /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/environment
120 11:08:52.794282 LAVA metadata
121 11:08:52.794355 - LAVA_JOB_ID=8138809
122 11:08:52.794424 - LAVA_DISPATCHER_IP=192.168.201.1
123 11:08:52.794528 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 11:08:52.794597 skipped lava-vland-overlay
125 11:08:52.794676 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 11:08:52.794761 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 11:08:52.794828 skipped lava-multinode-overlay
128 11:08:52.794907 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 11:08:52.794994 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 11:08:52.795071 Loading test definitions
131 11:08:52.795173 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 11:08:52.795251 Using /lava-8138809 at stage 0
133 11:08:52.795512 uuid=8138809_1.4.2.3.1 testdef=None
134 11:08:52.795604 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 11:08:52.795696 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 11:08:52.796180 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 11:08:52.796448 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 11:08:52.797032 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 11:08:52.797308 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 11:08:52.797853 runner path: /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/0/tests/0_cros-ec test_uuid 8138809_1.4.2.3.1
143 11:08:52.798017 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 11:08:52.798262 Creating lava-test-runner.conf files
146 11:08:52.798350 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8138809/lava-overlay-cuh6sxp7/lava-8138809/0 for stage 0
147 11:08:52.798458 - 0_cros-ec
148 11:08:52.798569 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 11:08:52.798672 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
150 11:08:52.803867 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 11:08:52.804084 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
152 11:08:52.804190 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 11:08:52.804295 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 11:08:52.804404 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
155 11:08:53.574973 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 11:08:53.575322 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
157 11:08:53.575453 extracting modules file /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138809/extract-overlay-ramdisk-uggxk0ew/ramdisk
158 11:08:53.579633 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 11:08:53.579801 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
160 11:08:53.579895 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138809/compress-overlay-otmpr7k0/overlay-1.4.2.4.tar.gz to ramdisk
161 11:08:53.579972 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138809/compress-overlay-otmpr7k0/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8138809/extract-overlay-ramdisk-uggxk0ew/ramdisk
162 11:08:53.583026 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 11:08:53.583133 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
164 11:08:53.583224 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 11:08:53.583316 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
166 11:08:53.583394 Building ramdisk /var/lib/lava/dispatcher/tmp/8138809/extract-overlay-ramdisk-uggxk0ew/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8138809/extract-overlay-ramdisk-uggxk0ew/ramdisk
167 11:08:53.834666 >> 182691 blocks
168 11:08:57.029876 rename /var/lib/lava/dispatcher/tmp/8138809/extract-overlay-ramdisk-uggxk0ew/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
169 11:08:57.030316 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 11:08:57.030443 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
171 11:08:57.030549 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
172 11:08:57.030642 No mkimage arch provided, not using FIT.
173 11:08:57.030730 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 11:08:57.030816 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 11:08:57.030913 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 11:08:57.031006 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
177 11:08:57.031083 No LXC device requested
178 11:08:57.031164 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 11:08:57.031251 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
180 11:08:57.031333 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 11:08:57.031401 Checking files for TFTP limit of 4294967296 bytes.
182 11:08:57.031783 end: 1 tftp-deploy (duration 00:00:05) [common]
183 11:08:57.031915 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 11:08:57.032009 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 11:08:57.032143 substitutions:
186 11:08:57.032215 - {DTB}: None
187 11:08:57.032282 - {INITRD}: 8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
188 11:08:57.032389 - {KERNEL}: 8138809/tftp-deploy-wmij00c2/kernel/bzImage
189 11:08:57.032462 - {LAVA_MAC}: None
190 11:08:57.032519 - {PRESEED_CONFIG}: None
191 11:08:57.032574 - {PRESEED_LOCAL}: None
192 11:08:57.032629 - {RAMDISK}: 8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
193 11:08:57.032686 - {ROOT_PART}: None
194 11:08:57.032740 - {ROOT}: None
195 11:08:57.032795 - {SERVER_IP}: 192.168.201.1
196 11:08:57.032849 - {TEE}: None
197 11:08:57.032904 Parsed boot commands:
198 11:08:57.032964 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 11:08:57.033111 Parsed boot commands: tftpboot 192.168.201.1 8138809/tftp-deploy-wmij00c2/kernel/bzImage 8138809/tftp-deploy-wmij00c2/kernel/cmdline 8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
200 11:08:57.033201 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 11:08:57.033287 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 11:08:57.033377 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 11:08:57.033458 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 11:08:57.033526 Not connected, no need to disconnect.
205 11:08:57.033601 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 11:08:57.033681 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 11:08:57.033747 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
208 11:08:57.036542 Setting prompt string to ['lava-test: # ']
209 11:08:57.036824 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 11:08:57.036947 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 11:08:57.037076 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 11:08:57.037170 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 11:08:57.037348 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
214 11:08:57.056186 >> Command sent successfully.
215 11:08:57.058116 Returned 0 in 0 seconds
216 11:08:57.159171 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 11:08:57.160486 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 11:08:57.160949 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 11:08:57.161326 Setting prompt string to 'Starting depthcharge on Voema...'
221 11:08:57.161668 Changing prompt to 'Starting depthcharge on Voema...'
222 11:08:57.161982 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 11:08:57.163051 [Enter `^Ec?' for help]
224 11:09:05.041714
225 11:09:05.042497
226 11:09:05.051567 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 11:09:05.054745 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 11:09:05.061490 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 11:09:05.064631 CPU: AES supported, TXT NOT supported, VT supported
230 11:09:05.071078 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 11:09:05.077970 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 11:09:05.081212 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 11:09:05.084529 VBOOT: Loading verstage.
234 11:09:05.088026 FMAP: Found "FLASH" version 1.1 at 0x1804000.
235 11:09:05.094060 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 11:09:05.098052 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 11:09:05.108595 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 11:09:05.114959 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 11:09:05.115443
240 11:09:05.115819
241 11:09:05.128446 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 11:09:05.142206 Probing TPM: . done!
243 11:09:05.145510 TPM ready after 0 ms
244 11:09:05.148780 Connected to device vid:did:rid of 1ae0:0028:00
245 11:09:05.160110 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 11:09:05.166850 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 11:09:05.170153 Initialized TPM device CR50 revision 0
248 11:09:05.221773 tlcl_send_startup: Startup return code is 0
249 11:09:05.222346 TPM: setup succeeded
250 11:09:05.236990 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 11:09:05.251118 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 11:09:05.263785 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 11:09:05.273549 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 11:09:05.277618 Chrome EC: UHEPI supported
255 11:09:05.280580 Phase 1
256 11:09:05.284083 FMAP: area GBB found @ 1805000 (458752 bytes)
257 11:09:05.294048 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 11:09:05.300803 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 11:09:05.307241 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 11:09:05.313775 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 11:09:05.316915 Recovery requested (1009000e)
262 11:09:05.320669 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 11:09:05.332137 tlcl_extend: response is 0
264 11:09:05.338709 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 11:09:05.348721 tlcl_extend: response is 0
266 11:09:05.355301 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 11:09:05.361764 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 11:09:05.368324 BS: verstage times (exec / console): total (unknown) / 142 ms
269 11:09:05.368825
270 11:09:05.369181
271 11:09:05.381651 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 11:09:05.388157 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 11:09:05.391742 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 11:09:05.395030 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 11:09:05.401748 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 11:09:05.404947 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 11:09:05.408339 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 11:09:05.411610 TCO_STS: 0000 0000
279 11:09:05.414820 GEN_PMCON: d0015038 00002200
280 11:09:05.418012 GBLRST_CAUSE: 00000000 00000000
281 11:09:05.418513 HPR_CAUSE0: 00000000
282 11:09:05.421714
283 11:09:05.422159 prev_sleep_state 5
284 11:09:05.424635 Boot Count incremented to 13558
285 11:09:05.431504 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
286 11:09:05.438244 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 11:09:05.448752 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 11:09:05.454583 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
289 11:09:05.458162 Chrome EC: UHEPI supported
290 11:09:05.464159 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
291 11:09:05.475596 Probing TPM: done!
292 11:09:05.482266 Connected to device vid:did:rid of 1ae0:0028:00
293 11:09:05.492886 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
294 11:09:05.500914 Initialized TPM device CR50 revision 0
295 11:09:05.510919 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
296 11:09:05.517547 MRC: Hash idx 0x100b comparison successful.
297 11:09:05.520563 MRC cache found, size faa8
298 11:09:05.521073 bootmode is set to: 2
299 11:09:05.524223 SPD index = 0
300 11:09:05.530447 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
301 11:09:05.533998 SPD: module type is LPDDR4X
302 11:09:05.537310 SPD: module part number is MT53E512M64D4NW-046
303 11:09:05.543890 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
304 11:09:05.547485 SPD: device width 16 bits, bus width 16 bits
305 11:09:05.553886 SPD: module size is 1024 MB (per channel)
306 11:09:05.986322 CBMEM:
307 11:09:05.989408 IMD: root @ 0x76fff000 254 entries.
308 11:09:05.993372 IMD: root @ 0x76ffec00 62 entries.
309 11:09:05.996606 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
310 11:09:06.002778 FMAP: area RW_VPD found @ f35000 (8192 bytes)
311 11:09:06.006174 External stage cache:
312 11:09:06.009288 IMD: root @ 0x7b3ff000 254 entries.
313 11:09:06.013278 IMD: root @ 0x7b3fec00 62 entries.
314 11:09:06.027926 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
315 11:09:06.034728 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
316 11:09:06.041327 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
317 11:09:06.055155 MRC: 'RECOVERY_MRC_CACHE' does not need update.
318 11:09:06.062030 cse_lite: Skip switching to RW in the recovery path
319 11:09:06.062516 8 DIMMs found
320 11:09:06.062965 SMM Memory Map
321 11:09:06.065438
322 11:09:06.068541 SMRAM : 0x7b000000 0x800000
323 11:09:06.072347 Subregion 0: 0x7b000000 0x200000
324 11:09:06.072794 Subregion 1: 0x7b200000 0x200000
325 11:09:06.076436 Subregion 2: 0x7b400000 0x400000
326 11:09:06.079689 top_of_ram = 0x77000000
327 11:09:06.086021 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
328 11:09:06.089369 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
329 11:09:06.096250 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
330 11:09:06.099725 MTRR Range: Start=ff000000 End=0 (Size 1000000)
331 11:09:06.109088 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
332 11:09:06.115592 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
333 11:09:06.125562 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
334 11:09:06.128953 Processing 211 relocs. Offset value of 0x74c0b000
335 11:09:06.138056 BS: romstage times (exec / console): total (unknown) / 277 ms
336 11:09:06.144105
337 11:09:06.144547
338 11:09:06.154626 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
339 11:09:06.157703 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 11:09:06.167620 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 11:09:06.173786 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 11:09:06.180958 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
343 11:09:06.187504 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
344 11:09:06.234283 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
345 11:09:06.241191 Processing 5008 relocs. Offset value of 0x75d98000
346 11:09:06.244312 BS: postcar times (exec / console): total (unknown) / 59 ms
347 11:09:06.247525
348 11:09:06.247988
349 11:09:06.248410
350 11:09:06.257253 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
351 11:09:06.257723 Normal boot
352 11:09:06.260739 FW_CONFIG value is 0x804c02
353 11:09:06.264028 PCI: 00:07.0 disabled by fw_config
354 11:09:06.267777 PCI: 00:07.1 disabled by fw_config
355 11:09:06.270521 PCI: 00:0d.2 disabled by fw_config
356 11:09:06.277666 PCI: 00:1c.7 disabled by fw_config
357 11:09:06.280918 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
358 11:09:06.287234 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
359 11:09:06.290372 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
360 11:09:06.297232 GENERIC: 0.0 disabled by fw_config
361 11:09:06.300557 GENERIC: 1.0 disabled by fw_config
362 11:09:06.303827 fw_config match found: DB_USB=USB3_ACTIVE
363 11:09:06.307037 fw_config match found: DB_USB=USB3_ACTIVE
364 11:09:06.310612 fw_config match found: DB_USB=USB3_ACTIVE
365 11:09:06.317199 fw_config match found: DB_USB=USB3_ACTIVE
366 11:09:06.320474 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 11:09:06.327114 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 11:09:06.337187 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 11:09:06.343793 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
370 11:09:06.346715 microcode: sig=0x806c1 pf=0x80 revision=0x86
371 11:09:06.353585 microcode: Update skipped, already up-to-date
372 11:09:06.360334 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
373 11:09:06.388088 Detected 4 core, 8 thread CPU.
374 11:09:06.391479 Setting up SMI for CPU
375 11:09:06.394664 IED base = 0x7b400000
376 11:09:06.395109 IED size = 0x00400000
377 11:09:06.397854 Will perform SMM setup.
378 11:09:06.404606 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
379 11:09:06.411182 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
380 11:09:06.417740 Processing 16 relocs. Offset value of 0x00030000
381 11:09:06.420791 Attempting to start 7 APs
382 11:09:06.424729 Waiting for 10ms after sending INIT.
383 11:09:06.440232 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
384 11:09:06.440773 done.
385 11:09:06.443390 AP: slot 4 apic_id 5.
386 11:09:06.446694 AP: slot 5 apic_id 4.
387 11:09:06.447184 AP: slot 7 apic_id 7.
388 11:09:06.449983 AP: slot 3 apic_id 6.
389 11:09:06.453197 Waiting for 2nd SIPI to complete...done.
390 11:09:06.456609 AP: slot 6 apic_id 3.
391 11:09:06.460091 AP: slot 2 apic_id 2.
392 11:09:06.466740 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
393 11:09:06.473393 Processing 13 relocs. Offset value of 0x00038000
394 11:09:06.473923 Unable to locate Global NVS
395 11:09:06.483495 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
396 11:09:06.486459 Installing permanent SMM handler to 0x7b000000
397 11:09:06.496610 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
398 11:09:06.499782 Processing 794 relocs. Offset value of 0x7b010000
399 11:09:06.509987 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
400 11:09:06.513190 Processing 13 relocs. Offset value of 0x7b008000
401 11:09:06.519839 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
402 11:09:06.526360 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
403 11:09:06.529712 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
404 11:09:06.536406 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
405 11:09:06.543449 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
406 11:09:06.549372 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
407 11:09:06.556213 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
408 11:09:06.556737 Unable to locate Global NVS
409 11:09:06.565917 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
410 11:09:06.569666 Clearing SMI status registers
411 11:09:06.570163 SMI_STS: PM1
412 11:09:06.572540 PM1_STS: PWRBTN
413 11:09:06.579519 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
414 11:09:06.582714 In relocation handler: CPU 0
415 11:09:06.586111 New SMBASE=0x7b000000 IEDBASE=0x7b400000
416 11:09:06.592612 Writing SMRR. base = 0x7b000006, mask=0xff800c00
417 11:09:06.593200 Relocation complete.
418 11:09:06.602333 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
419 11:09:06.602847 In relocation handler: CPU 1
420 11:09:06.609486 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
421 11:09:06.609983 Relocation complete.
422 11:09:06.618996 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
423 11:09:06.619487 In relocation handler: CPU 6
424 11:09:06.625801 New SMBASE=0x7affe800 IEDBASE=0x7b400000
425 11:09:06.626286 Relocation complete.
426 11:09:06.635444 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
427 11:09:06.635888 In relocation handler: CPU 2
428 11:09:06.642031 New SMBASE=0x7afff800 IEDBASE=0x7b400000
429 11:09:06.645407 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 11:09:06.649184 Relocation complete.
431 11:09:06.655518 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
432 11:09:06.658966 In relocation handler: CPU 5
433 11:09:06.662142 New SMBASE=0x7affec00 IEDBASE=0x7b400000
434 11:09:06.669168 Writing SMRR. base = 0x7b000006, mask=0xff800c00
435 11:09:06.669671 Relocation complete.
436 11:09:06.675838 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
437 11:09:06.678821 In relocation handler: CPU 4
438 11:09:06.685430 New SMBASE=0x7afff000 IEDBASE=0x7b400000
439 11:09:06.685872 Relocation complete.
440 11:09:06.692029 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
441 11:09:06.695080 In relocation handler: CPU 7
442 11:09:06.698787 New SMBASE=0x7affe400 IEDBASE=0x7b400000
443 11:09:06.702329
444 11:09:06.702801 Relocation complete.
445 11:09:06.708620 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
446 11:09:06.712376 In relocation handler: CPU 3
447 11:09:06.715435 New SMBASE=0x7afff400 IEDBASE=0x7b400000
448 11:09:06.721871 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 11:09:06.724961 Relocation complete.
450 11:09:06.725404 Initializing CPU #0
451 11:09:06.728619 CPU: vendor Intel device 806c1
452 11:09:06.732069 CPU: family 06, model 8c, stepping 01
453 11:09:06.735384 Clearing out pending MCEs
454 11:09:06.739020 Setting up local APIC...
455 11:09:06.739453 apic_id: 0x00 done.
456 11:09:06.742927
457 11:09:06.743395 Turbo is available but hidden
458 11:09:06.746385 Turbo is available and visible
459 11:09:06.749671 microcode: Update skipped, already up-to-date
460 11:09:06.753511 CPU #0 initialized
461 11:09:06.756398 Initializing CPU #1
462 11:09:06.756837 Initializing CPU #4
463 11:09:06.759755 Initializing CPU #5
464 11:09:06.763500 CPU: vendor Intel device 806c1
465 11:09:06.766536 CPU: family 06, model 8c, stepping 01
466 11:09:06.770181 CPU: vendor Intel device 806c1
467 11:09:06.773306 CPU: family 06, model 8c, stepping 01
468 11:09:06.776343 Clearing out pending MCEs
469 11:09:06.779745 Clearing out pending MCEs
470 11:09:06.780186 Setting up local APIC...
471 11:09:06.783447 Initializing CPU #6
472 11:09:06.786504 Initializing CPU #2
473 11:09:06.789699 CPU: vendor Intel device 806c1
474 11:09:06.793012 CPU: family 06, model 8c, stepping 01
475 11:09:06.796388 CPU: vendor Intel device 806c1
476 11:09:06.799726 CPU: family 06, model 8c, stepping 01
477 11:09:06.802834 Clearing out pending MCEs
478 11:09:06.803278 Clearing out pending MCEs
479 11:09:06.806491 Setting up local APIC...
480 11:09:06.810189 Initializing CPU #7
481 11:09:06.810657 Initializing CPU #3
482 11:09:06.812963 CPU: vendor Intel device 806c1
483 11:09:06.819747 CPU: family 06, model 8c, stepping 01
484 11:09:06.820196 CPU: vendor Intel device 806c1
485 11:09:06.826320 CPU: family 06, model 8c, stepping 01
486 11:09:06.826901 Setting up local APIC...
487 11:09:06.829533 Clearing out pending MCEs
488 11:09:06.832901 Clearing out pending MCEs
489 11:09:06.836192 Setting up local APIC...
490 11:09:06.836748 apic_id: 0x05 done.
491 11:09:06.839629 Setting up local APIC...
492 11:09:06.842881 apic_id: 0x03 done.
493 11:09:06.843332 apic_id: 0x02 done.
494 11:09:06.849538 microcode: Update skipped, already up-to-date
495 11:09:06.852916 microcode: Update skipped, already up-to-date
496 11:09:06.856417 Setting up local APIC...
497 11:09:06.859401 apic_id: 0x04 done.
498 11:09:06.859850 apic_id: 0x07 done.
499 11:09:06.862734 apic_id: 0x06 done.
500 11:09:06.866408 microcode: Update skipped, already up-to-date
501 11:09:06.872745 microcode: Update skipped, already up-to-date
502 11:09:06.873245 CPU #7 initialized
503 11:09:06.876434 CPU #3 initialized
504 11:09:06.876870 CPU #6 initialized
505 11:09:06.879657 CPU #2 initialized
506 11:09:06.882852 CPU: vendor Intel device 806c1
507 11:09:06.886041 CPU: family 06, model 8c, stepping 01
508 11:09:06.889423 microcode: Update skipped, already up-to-date
509 11:09:06.892763
510 11:09:06.895969 microcode: Update skipped, already up-to-date
511 11:09:06.896423 CPU #5 initialized
512 11:09:06.899377 CPU #4 initialized
513 11:09:06.902546 Clearing out pending MCEs
514 11:09:06.905961 Setting up local APIC...
515 11:09:06.906451 apic_id: 0x01 done.
516 11:09:06.912419 microcode: Update skipped, already up-to-date
517 11:09:06.912868 CPU #1 initialized
518 11:09:06.919019 bsp_do_flight_plan done after 459 msecs.
519 11:09:06.922402 CPU: frequency set to 4000 MHz
520 11:09:06.922946 Enabling SMIs.
521 11:09:06.928722 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 11:09:06.945339 SATAXPCIE1 indicates PCIe NVMe is present
523 11:09:06.948289 Probing TPM: done!
524 11:09:06.952469 Connected to device vid:did:rid of 1ae0:0028:00
525 11:09:06.962765 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
526 11:09:06.965760 Initialized TPM device CR50 revision 0
527 11:09:06.969171 Enabling S0i3.4
528 11:09:06.975551 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 11:09:06.978882 Found a VBT of 8704 bytes after decompression
530 11:09:06.985622 cse_lite: CSE RO boot. HybridStorageMode disabled
531 11:09:06.992600 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 11:09:07.068358 FSPS returned 0
533 11:09:07.071359 Executing Phase 1 of FspMultiPhaseSiInit
534 11:09:07.081335 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 11:09:07.084623 port C0 DISC req: usage 1 usb3 1 usb2 5
536 11:09:07.087881 Raw Buffer output 0 00000511
537 11:09:07.091169 Raw Buffer output 1 00000000
538 11:09:07.094933 pmc_send_ipc_cmd succeeded
539 11:09:07.098353 port C1 DISC req: usage 1 usb3 2 usb2 3
540 11:09:07.101474
541 11:09:07.102067 Raw Buffer output 0 00000321
542 11:09:07.104786 Raw Buffer output 1 00000000
543 11:09:07.108811 pmc_send_ipc_cmd succeeded
544 11:09:07.114312 Detected 4 core, 8 thread CPU.
545 11:09:07.117352 Detected 4 core, 8 thread CPU.
546 11:09:07.351072 Display FSP Version Info HOB
547 11:09:07.354372 Reference Code - CPU = a.0.4c.31
548 11:09:07.358171 uCode Version = 0.0.0.86
549 11:09:07.361116 TXT ACM version = ff.ff.ff.ffff
550 11:09:07.364398 Reference Code - ME = a.0.4c.31
551 11:09:07.367745 MEBx version = 0.0.0.0
552 11:09:07.371068 ME Firmware Version = Consumer SKU
553 11:09:07.374554 Reference Code - PCH = a.0.4c.31
554 11:09:07.377779 PCH-CRID Status = Disabled
555 11:09:07.381331 PCH-CRID Original Value = ff.ff.ff.ffff
556 11:09:07.384336 PCH-CRID New Value = ff.ff.ff.ffff
557 11:09:07.387876 OPROM - RST - RAID = ff.ff.ff.ffff
558 11:09:07.391019 PCH Hsio Version = 4.0.0.0
559 11:09:07.394352 Reference Code - SA - System Agent = a.0.4c.31
560 11:09:07.397770 Reference Code - MRC = 2.0.0.1
561 11:09:07.400817 SA - PCIe Version = a.0.4c.31
562 11:09:07.404271 SA-CRID Status = Disabled
563 11:09:07.408022 SA-CRID Original Value = 0.0.0.1
564 11:09:07.411394 SA-CRID New Value = 0.0.0.1
565 11:09:07.414605 OPROM - VBIOS = ff.ff.ff.ffff
566 11:09:07.417859 IO Manageability Engine FW Version = 11.1.4.0
567 11:09:07.421094 PHY Build Version = 0.0.0.e0
568 11:09:07.424249 Thunderbolt(TM) FW Version = 0.0.0.0
569 11:09:07.431005 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
570 11:09:07.434296 ITSS IRQ Polarities Before:
571 11:09:07.434772 IPC0: 0xffffffff
572 11:09:07.437704 IPC1: 0xffffffff
573 11:09:07.438173 IPC2: 0xffffffff
574 11:09:07.440897 IPC3: 0xffffffff
575 11:09:07.444002 ITSS IRQ Polarities After:
576 11:09:07.444472 IPC0: 0xffffffff
577 11:09:07.447332 IPC1: 0xffffffff
578 11:09:07.447799 IPC2: 0xffffffff
579 11:09:07.450663 IPC3: 0xffffffff
580 11:09:07.453914 Found PCIe Root Port #9 at PCI: 00:1d.0.
581 11:09:07.467381 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
582 11:09:07.477614 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
583 11:09:07.490260 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
584 11:09:07.497294 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
585 11:09:07.500218 Enumerating buses...
586 11:09:07.503780 Show all devs... Before device enumeration.
587 11:09:07.507036 Root Device: enabled 1
588 11:09:07.507522 DOMAIN: 0000: enabled 1
589 11:09:07.510294 CPU_CLUSTER: 0: enabled 1
590 11:09:07.513509 PCI: 00:00.0: enabled 1
591 11:09:07.517002 PCI: 00:02.0: enabled 1
592 11:09:07.517500 PCI: 00:04.0: enabled 1
593 11:09:07.520153 PCI: 00:05.0: enabled 1
594 11:09:07.523401 PCI: 00:06.0: enabled 0
595 11:09:07.526753 PCI: 00:07.0: enabled 0
596 11:09:07.527237 PCI: 00:07.1: enabled 0
597 11:09:07.530047 PCI: 00:07.2: enabled 0
598 11:09:07.533384 PCI: 00:07.3: enabled 0
599 11:09:07.536957 PCI: 00:08.0: enabled 1
600 11:09:07.537438 PCI: 00:09.0: enabled 0
601 11:09:07.540082 PCI: 00:0a.0: enabled 0
602 11:09:07.543287 PCI: 00:0d.0: enabled 1
603 11:09:07.543833 PCI: 00:0d.1: enabled 0
604 11:09:07.547174
605 11:09:07.547742 PCI: 00:0d.2: enabled 0
606 11:09:07.549953 PCI: 00:0d.3: enabled 0
607 11:09:07.553292 PCI: 00:0e.0: enabled 0
608 11:09:07.553775 PCI: 00:10.2: enabled 1
609 11:09:07.556995 PCI: 00:10.6: enabled 0
610 11:09:07.559875 PCI: 00:10.7: enabled 0
611 11:09:07.563436 PCI: 00:12.0: enabled 0
612 11:09:07.564023 PCI: 00:12.6: enabled 0
613 11:09:07.566485 PCI: 00:13.0: enabled 0
614 11:09:07.569673 PCI: 00:14.0: enabled 1
615 11:09:07.573445 PCI: 00:14.1: enabled 0
616 11:09:07.574170 PCI: 00:14.2: enabled 1
617 11:09:07.576338 PCI: 00:14.3: enabled 1
618 11:09:07.579573 PCI: 00:15.0: enabled 1
619 11:09:07.583356 PCI: 00:15.1: enabled 1
620 11:09:07.583836 PCI: 00:15.2: enabled 1
621 11:09:07.586689 PCI: 00:15.3: enabled 1
622 11:09:07.589602 PCI: 00:16.0: enabled 1
623 11:09:07.593244 PCI: 00:16.1: enabled 0
624 11:09:07.593827 PCI: 00:16.2: enabled 0
625 11:09:07.596197 PCI: 00:16.3: enabled 0
626 11:09:07.599483 PCI: 00:16.4: enabled 0
627 11:09:07.600025 PCI: 00:16.5: enabled 0
628 11:09:07.603264 PCI: 00:17.0: enabled 1
629 11:09:07.606598 PCI: 00:19.0: enabled 0
630 11:09:07.609894 PCI: 00:19.1: enabled 1
631 11:09:07.610493 PCI: 00:19.2: enabled 0
632 11:09:07.613132 PCI: 00:1c.0: enabled 1
633 11:09:07.616489 PCI: 00:1c.1: enabled 0
634 11:09:07.619897 PCI: 00:1c.2: enabled 0
635 11:09:07.620447 PCI: 00:1c.3: enabled 0
636 11:09:07.623068 PCI: 00:1c.4: enabled 0
637 11:09:07.626354 PCI: 00:1c.5: enabled 0
638 11:09:07.629391 PCI: 00:1c.6: enabled 1
639 11:09:07.629873 PCI: 00:1c.7: enabled 0
640 11:09:07.633182 PCI: 00:1d.0: enabled 1
641 11:09:07.636600 PCI: 00:1d.1: enabled 0
642 11:09:07.639554 PCI: 00:1d.2: enabled 1
643 11:09:07.640032 PCI: 00:1d.3: enabled 0
644 11:09:07.642741 PCI: 00:1e.0: enabled 1
645 11:09:07.646547 PCI: 00:1e.1: enabled 0
646 11:09:07.647043 PCI: 00:1e.2: enabled 1
647 11:09:07.649368 PCI: 00:1e.3: enabled 1
648 11:09:07.652812 PCI: 00:1f.0: enabled 1
649 11:09:07.656111 PCI: 00:1f.1: enabled 0
650 11:09:07.656589 PCI: 00:1f.2: enabled 1
651 11:09:07.659255 PCI: 00:1f.3: enabled 1
652 11:09:07.662502 PCI: 00:1f.4: enabled 0
653 11:09:07.665733 PCI: 00:1f.5: enabled 1
654 11:09:07.666207 PCI: 00:1f.6: enabled 0
655 11:09:07.669203 PCI: 00:1f.7: enabled 0
656 11:09:07.672321 APIC: 00: enabled 1
657 11:09:07.672839 GENERIC: 0.0: enabled 1
658 11:09:07.676087
659 11:09:07.676573 GENERIC: 0.0: enabled 1
660 11:09:07.678891 GENERIC: 1.0: enabled 1
661 11:09:07.682829 GENERIC: 0.0: enabled 1
662 11:09:07.683307 GENERIC: 1.0: enabled 1
663 11:09:07.685610 USB0 port 0: enabled 1
664 11:09:07.688700 GENERIC: 0.0: enabled 1
665 11:09:07.692318 USB0 port 0: enabled 1
666 11:09:07.692798 GENERIC: 0.0: enabled 1
667 11:09:07.695494 I2C: 00:1a: enabled 1
668 11:09:07.698973 I2C: 00:31: enabled 1
669 11:09:07.699444 I2C: 00:32: enabled 1
670 11:09:07.702280 I2C: 00:10: enabled 1
671 11:09:07.705544 I2C: 00:15: enabled 1
672 11:09:07.706025 GENERIC: 0.0: enabled 0
673 11:09:07.708769
674 11:09:07.709316 GENERIC: 1.0: enabled 0
675 11:09:07.712059 GENERIC: 0.0: enabled 1
676 11:09:07.715340 SPI: 00: enabled 1
677 11:09:07.715925 SPI: 00: enabled 1
678 11:09:07.718553 PNP: 0c09.0: enabled 1
679 11:09:07.722413 GENERIC: 0.0: enabled 1
680 11:09:07.722891 USB3 port 0: enabled 1
681 11:09:07.725636 USB3 port 1: enabled 1
682 11:09:07.728690 USB3 port 2: enabled 0
683 11:09:07.729124 USB3 port 3: enabled 0
684 11:09:07.732013 USB2 port 0: enabled 0
685 11:09:07.735470 USB2 port 1: enabled 1
686 11:09:07.738789 USB2 port 2: enabled 1
687 11:09:07.739274 USB2 port 3: enabled 0
688 11:09:07.741743 USB2 port 4: enabled 1
689 11:09:07.744949 USB2 port 5: enabled 0
690 11:09:07.745429 USB2 port 6: enabled 0
691 11:09:07.748743 USB2 port 7: enabled 0
692 11:09:07.751838 USB2 port 8: enabled 0
693 11:09:07.755142 USB2 port 9: enabled 0
694 11:09:07.755625 USB3 port 0: enabled 0
695 11:09:07.758498 USB3 port 1: enabled 1
696 11:09:07.761698 USB3 port 2: enabled 0
697 11:09:07.762266 USB3 port 3: enabled 0
698 11:09:07.764891 GENERIC: 0.0: enabled 1
699 11:09:07.768341 GENERIC: 1.0: enabled 1
700 11:09:07.768772 APIC: 01: enabled 1
701 11:09:07.771698 APIC: 02: enabled 1
702 11:09:07.774986 APIC: 06: enabled 1
703 11:09:07.775422 APIC: 05: enabled 1
704 11:09:07.778119 APIC: 04: enabled 1
705 11:09:07.781850 APIC: 03: enabled 1
706 11:09:07.782377 APIC: 07: enabled 1
707 11:09:07.784950 Compare with tree...
708 11:09:07.788162 Root Device: enabled 1
709 11:09:07.788651 DOMAIN: 0000: enabled 1
710 11:09:07.791378 PCI: 00:00.0: enabled 1
711 11:09:07.794585 PCI: 00:02.0: enabled 1
712 11:09:07.798348 PCI: 00:04.0: enabled 1
713 11:09:07.801249 GENERIC: 0.0: enabled 1
714 11:09:07.801681 PCI: 00:05.0: enabled 1
715 11:09:07.804450 PCI: 00:06.0: enabled 0
716 11:09:07.807851 PCI: 00:07.0: enabled 0
717 11:09:07.811682 GENERIC: 0.0: enabled 1
718 11:09:07.814805 PCI: 00:07.1: enabled 0
719 11:09:07.815241 GENERIC: 1.0: enabled 1
720 11:09:07.818012 PCI: 00:07.2: enabled 0
721 11:09:07.821506 GENERIC: 0.0: enabled 1
722 11:09:07.824831 PCI: 00:07.3: enabled 0
723 11:09:07.828114 GENERIC: 1.0: enabled 1
724 11:09:07.828551 PCI: 00:08.0: enabled 1
725 11:09:07.831211 PCI: 00:09.0: enabled 0
726 11:09:07.834828 PCI: 00:0a.0: enabled 0
727 11:09:07.838119 PCI: 00:0d.0: enabled 1
728 11:09:07.841375 USB0 port 0: enabled 1
729 11:09:07.841881 USB3 port 0: enabled 1
730 11:09:07.844434 USB3 port 1: enabled 1
731 11:09:07.848018 USB3 port 2: enabled 0
732 11:09:07.851308 USB3 port 3: enabled 0
733 11:09:07.854775 PCI: 00:0d.1: enabled 0
734 11:09:07.855221 PCI: 00:0d.2: enabled 0
735 11:09:07.857558
736 11:09:07.858161 GENERIC: 0.0: enabled 1
737 11:09:07.860769 PCI: 00:0d.3: enabled 0
738 11:09:07.864706 PCI: 00:0e.0: enabled 0
739 11:09:07.867767 PCI: 00:10.2: enabled 1
740 11:09:07.868214 PCI: 00:10.6: enabled 0
741 11:09:07.871100
742 11:09:07.871540 PCI: 00:10.7: enabled 0
743 11:09:07.874387 PCI: 00:12.0: enabled 0
744 11:09:07.877788 PCI: 00:12.6: enabled 0
745 11:09:07.880941 PCI: 00:13.0: enabled 0
746 11:09:07.881428 PCI: 00:14.0: enabled 1
747 11:09:07.884192
748 11:09:07.884633 USB0 port 0: enabled 1
749 11:09:07.887506 USB2 port 0: enabled 0
750 11:09:07.890813 USB2 port 1: enabled 1
751 11:09:07.894299 USB2 port 2: enabled 1
752 11:09:07.897500 USB2 port 3: enabled 0
753 11:09:07.897940 USB2 port 4: enabled 1
754 11:09:07.900770 USB2 port 5: enabled 0
755 11:09:07.904009 USB2 port 6: enabled 0
756 11:09:07.907286 USB2 port 7: enabled 0
757 11:09:07.910432 USB2 port 8: enabled 0
758 11:09:07.914289 USB2 port 9: enabled 0
759 11:09:07.914742 USB3 port 0: enabled 0
760 11:09:07.917429 USB3 port 1: enabled 1
761 11:09:07.920811 USB3 port 2: enabled 0
762 11:09:07.923573 USB3 port 3: enabled 0
763 11:09:07.927449 PCI: 00:14.1: enabled 0
764 11:09:07.927887 PCI: 00:14.2: enabled 1
765 11:09:07.930665 PCI: 00:14.3: enabled 1
766 11:09:07.933824 GENERIC: 0.0: enabled 1
767 11:09:07.937354 PCI: 00:15.0: enabled 1
768 11:09:07.940195 I2C: 00:1a: enabled 1
769 11:09:07.940631 I2C: 00:31: enabled 1
770 11:09:07.943639 I2C: 00:32: enabled 1
771 11:09:07.947048 PCI: 00:15.1: enabled 1
772 11:09:07.950330 I2C: 00:10: enabled 1
773 11:09:07.953543 PCI: 00:15.2: enabled 1
774 11:09:07.954174 PCI: 00:15.3: enabled 1
775 11:09:07.957114 PCI: 00:16.0: enabled 1
776 11:09:07.960479 PCI: 00:16.1: enabled 0
777 11:09:07.963767 PCI: 00:16.2: enabled 0
778 11:09:07.966999 PCI: 00:16.3: enabled 0
779 11:09:07.967565 PCI: 00:16.4: enabled 0
780 11:09:07.970302 PCI: 00:16.5: enabled 0
781 11:09:07.973695 PCI: 00:17.0: enabled 1
782 11:09:07.976869 PCI: 00:19.0: enabled 0
783 11:09:07.977312 PCI: 00:19.1: enabled 1
784 11:09:07.979996
785 11:09:07.980440 I2C: 00:15: enabled 1
786 11:09:07.983601 PCI: 00:19.2: enabled 0
787 11:09:07.986730 PCI: 00:1d.0: enabled 1
788 11:09:07.990488 GENERIC: 0.0: enabled 1
789 11:09:07.990933 PCI: 00:1e.0: enabled 1
790 11:09:07.994091 PCI: 00:1e.1: enabled 0
791 11:09:08.044137 PCI: 00:1e.2: enabled 1
792 11:09:08.044858 SPI: 00: enabled 1
793 11:09:08.045427 PCI: 00:1e.3: enabled 1
794 11:09:08.046238
795 11:09:08.046652 SPI: 00: enabled 1
796 11:09:08.047011 PCI: 00:1f.0: enabled 1
797 11:09:08.047349 PNP: 0c09.0: enabled 1
798 11:09:08.047676 PCI: 00:1f.1: enabled 0
799 11:09:08.047999 PCI: 00:1f.2: enabled 1
800 11:09:08.048321 GENERIC: 0.0: enabled 1
801 11:09:08.048641 GENERIC: 0.0: enabled 1
802 11:09:08.048957 GENERIC: 1.0: enabled 1
803 11:09:08.049272 PCI: 00:1f.3: enabled 1
804 11:09:08.049586 PCI: 00:1f.4: enabled 0
805 11:09:08.049898 PCI: 00:1f.5: enabled 1
806 11:09:08.050208 PCI: 00:1f.6: enabled 0
807 11:09:08.050554 PCI: 00:1f.7: enabled 0
808 11:09:08.050862 CPU_CLUSTER: 0: enabled 1
809 11:09:08.051173 APIC: 00: enabled 1
810 11:09:08.051498 APIC: 01: enabled 1
811 11:09:08.072637 APIC: 02: enabled 1
812 11:09:08.073263 APIC: 06: enabled 1
813 11:09:08.073797 APIC: 05: enabled 1
814 11:09:08.074727 APIC: 04: enabled 1
815 11:09:08.075193 APIC: 03: enabled 1
816 11:09:08.075560 APIC: 07: enabled 1
817 11:09:08.075919 Root Device scanning...
818 11:09:08.076376 scan_static_bus for Root Device
819 11:09:08.076719 DOMAIN: 0000 enabled
820 11:09:08.077046 CPU_CLUSTER: 0 enabled
821 11:09:08.077367 DOMAIN: 0000 scanning...
822 11:09:08.078052 PCI: pci_scan_bus for bus 00
823 11:09:08.078474 PCI: 00:00.0 [8086/0000] ops
824 11:09:08.080221 PCI: 00:00.0 [8086/9a12] enabled
825 11:09:08.082965 PCI: 00:02.0 [8086/0000] bus ops
826 11:09:08.086680 PCI: 00:02.0 [8086/9a40] enabled
827 11:09:08.090007 PCI: 00:04.0 [8086/0000] bus ops
828 11:09:08.093374 PCI: 00:04.0 [8086/9a03] enabled
829 11:09:08.096527 PCI: 00:05.0 [8086/9a19] enabled
830 11:09:08.099735 PCI: 00:07.0 [0000/0000] hidden
831 11:09:08.103317 PCI: 00:08.0 [8086/9a11] enabled
832 11:09:08.106420 PCI: 00:0a.0 [8086/9a0d] disabled
833 11:09:08.109469 PCI: 00:0d.0 [8086/0000] bus ops
834 11:09:08.112726 PCI: 00:0d.0 [8086/9a13] enabled
835 11:09:08.116086 PCI: 00:14.0 [8086/0000] bus ops
836 11:09:08.119231 PCI: 00:14.0 [8086/a0ed] enabled
837 11:09:08.123099 PCI: 00:14.2 [8086/a0ef] enabled
838 11:09:08.126543 PCI: 00:14.3 [8086/0000] bus ops
839 11:09:08.129407 PCI: 00:14.3 [8086/a0f0] enabled
840 11:09:08.132649 PCI: 00:15.0 [8086/0000] bus ops
841 11:09:08.135993 PCI: 00:15.0 [8086/a0e8] enabled
842 11:09:08.139443 PCI: 00:15.1 [8086/0000] bus ops
843 11:09:08.142581
844 11:09:08.143092 PCI: 00:15.1 [8086/a0e9] enabled
845 11:09:08.145911
846 11:09:08.146422 PCI: 00:15.2 [8086/0000] bus ops
847 11:09:08.149051
848 11:09:08.149497 PCI: 00:15.2 [8086/a0ea] enabled
849 11:09:08.153039
850 11:09:08.153579 PCI: 00:15.3 [8086/0000] bus ops
851 11:09:08.156024
852 11:09:08.156472 PCI: 00:15.3 [8086/a0eb] enabled
853 11:09:08.159275
854 11:09:08.159764 PCI: 00:16.0 [8086/0000] ops
855 11:09:08.162454 PCI: 00:16.0 [8086/a0e0] enabled
856 11:09:08.169119 PCI: Static device PCI: 00:17.0 not found, disabling it.
857 11:09:08.172367 PCI: 00:19.0 [8086/0000] bus ops
858 11:09:08.176077 PCI: 00:19.0 [8086/a0c5] disabled
859 11:09:08.178996 PCI: 00:19.1 [8086/0000] bus ops
860 11:09:08.182297 PCI: 00:19.1 [8086/a0c6] enabled
861 11:09:08.185303 PCI: 00:1d.0 [8086/0000] bus ops
862 11:09:08.189237 PCI: 00:1d.0 [8086/a0b0] enabled
863 11:09:08.192423 PCI: 00:1e.0 [8086/0000] ops
864 11:09:08.195705 PCI: 00:1e.0 [8086/a0a8] enabled
865 11:09:08.198740 PCI: 00:1e.2 [8086/0000] bus ops
866 11:09:08.202448 PCI: 00:1e.2 [8086/a0aa] enabled
867 11:09:08.205669 PCI: 00:1e.3 [8086/0000] bus ops
868 11:09:08.208741 PCI: 00:1e.3 [8086/a0ab] enabled
869 11:09:08.212340 PCI: 00:1f.0 [8086/0000] bus ops
870 11:09:08.215828 PCI: 00:1f.0 [8086/a087] enabled
871 11:09:08.218998 RTC Init
872 11:09:08.222201 Set power on after power failure.
873 11:09:08.222858 Disabling Deep S3
874 11:09:08.225190 Disabling Deep S3
875 11:09:08.225711 Disabling Deep S4
876 11:09:08.228604 Disabling Deep S4
877 11:09:08.229083 Disabling Deep S5
878 11:09:08.231877 Disabling Deep S5
879 11:09:08.235208 PCI: 00:1f.2 [0000/0000] hidden
880 11:09:08.238404 PCI: 00:1f.3 [8086/0000] bus ops
881 11:09:08.241669 PCI: 00:1f.3 [8086/a0c8] enabled
882 11:09:08.245496 PCI: 00:1f.5 [8086/0000] bus ops
883 11:09:08.248482 PCI: 00:1f.5 [8086/a0a4] enabled
884 11:09:08.251720 PCI: Leftover static devices:
885 11:09:08.252201 PCI: 00:10.2
886 11:09:08.255082 PCI: 00:10.6
887 11:09:08.255568 PCI: 00:10.7
888 11:09:08.258902 PCI: 00:06.0
889 11:09:08.259391 PCI: 00:07.1
890 11:09:08.259773 PCI: 00:07.2
891 11:09:08.261778 PCI: 00:07.3
892 11:09:08.262296 PCI: 00:09.0
893 11:09:08.265467 PCI: 00:0d.1
894 11:09:08.266057 PCI: 00:0d.2
895 11:09:08.266494 PCI: 00:0d.3
896 11:09:08.268648
897 11:09:08.269283 PCI: 00:0e.0
898 11:09:08.269670 PCI: 00:12.0
899 11:09:08.271924 PCI: 00:12.6
900 11:09:08.272434 PCI: 00:13.0
901 11:09:08.274940 PCI: 00:14.1
902 11:09:08.275465 PCI: 00:16.1
903 11:09:08.275979 PCI: 00:16.2
904 11:09:08.277977 PCI: 00:16.3
905 11:09:08.278538 PCI: 00:16.4
906 11:09:08.281671 PCI: 00:16.5
907 11:09:08.282177 PCI: 00:17.0
908 11:09:08.282734 PCI: 00:19.2
909 11:09:08.284937
910 11:09:08.285426 PCI: 00:1e.1
911 11:09:08.285933 PCI: 00:1f.1
912 11:09:08.288231 PCI: 00:1f.4
913 11:09:08.288720 PCI: 00:1f.6
914 11:09:08.292008 PCI: 00:1f.7
915 11:09:08.292535 PCI: Check your devicetree.cb.
916 11:09:08.295274
917 11:09:08.295872 PCI: 00:02.0 scanning...
918 11:09:08.297994 scan_generic_bus for PCI: 00:02.0
919 11:09:08.304561 scan_generic_bus for PCI: 00:02.0 done
920 11:09:08.308209 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
921 11:09:08.311412 PCI: 00:04.0 scanning...
922 11:09:08.314894 scan_generic_bus for PCI: 00:04.0
923 11:09:08.315442 GENERIC: 0.0 enabled
924 11:09:08.317852
925 11:09:08.321200 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
926 11:09:08.327946 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
927 11:09:08.331319 PCI: 00:0d.0 scanning...
928 11:09:08.334687 scan_static_bus for PCI: 00:0d.0
929 11:09:08.335338 USB0 port 0 enabled
930 11:09:08.338039 USB0 port 0 scanning...
931 11:09:08.341318 scan_static_bus for USB0 port 0
932 11:09:08.344503 USB3 port 0 enabled
933 11:09:08.344935 USB3 port 1 enabled
934 11:09:08.347898 USB3 port 2 disabled
935 11:09:08.350879 USB3 port 3 disabled
936 11:09:08.351326 USB3 port 0 scanning...
937 11:09:08.354108 scan_static_bus for USB3 port 0
938 11:09:08.357584 scan_static_bus for USB3 port 0 done
939 11:09:08.364097 scan_bus: bus USB3 port 0 finished in 6 msecs
940 11:09:08.367733 USB3 port 1 scanning...
941 11:09:08.371111 scan_static_bus for USB3 port 1
942 11:09:08.374302 scan_static_bus for USB3 port 1 done
943 11:09:08.377517 scan_bus: bus USB3 port 1 finished in 6 msecs
944 11:09:08.380661 scan_static_bus for USB0 port 0 done
945 11:09:08.387707 scan_bus: bus USB0 port 0 finished in 43 msecs
946 11:09:08.390897 scan_static_bus for PCI: 00:0d.0 done
947 11:09:08.394037 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
948 11:09:08.397335 PCI: 00:14.0 scanning...
949 11:09:08.400564 scan_static_bus for PCI: 00:14.0
950 11:09:08.404335 USB0 port 0 enabled
951 11:09:08.404810 USB0 port 0 scanning...
952 11:09:08.407698
953 11:09:08.410633 scan_static_bus for USB0 port 0
954 11:09:08.411062 USB2 port 0 disabled
955 11:09:08.413796 USB2 port 1 enabled
956 11:09:08.414263 USB2 port 2 enabled
957 11:09:08.417368 USB2 port 3 disabled
958 11:09:08.420400 USB2 port 4 enabled
959 11:09:08.420835 USB2 port 5 disabled
960 11:09:08.423787 USB2 port 6 disabled
961 11:09:08.427142 USB2 port 7 disabled
962 11:09:08.427714 USB2 port 8 disabled
963 11:09:08.430533 USB2 port 9 disabled
964 11:09:08.433568 USB3 port 0 disabled
965 11:09:08.434001 USB3 port 1 enabled
966 11:09:08.436913 USB3 port 2 disabled
967 11:09:08.440306 USB3 port 3 disabled
968 11:09:08.440744 USB2 port 1 scanning...
969 11:09:08.443739 scan_static_bus for USB2 port 1
970 11:09:08.447014 scan_static_bus for USB2 port 1 done
971 11:09:08.453607 scan_bus: bus USB2 port 1 finished in 6 msecs
972 11:09:08.456856 USB2 port 2 scanning...
973 11:09:08.460049 scan_static_bus for USB2 port 2
974 11:09:08.463630 scan_static_bus for USB2 port 2 done
975 11:09:08.466886 scan_bus: bus USB2 port 2 finished in 6 msecs
976 11:09:08.470352 USB2 port 4 scanning...
977 11:09:08.473345 scan_static_bus for USB2 port 4
978 11:09:08.476519 scan_static_bus for USB2 port 4 done
979 11:09:08.479938 scan_bus: bus USB2 port 4 finished in 6 msecs
980 11:09:08.483511 USB3 port 1 scanning...
981 11:09:08.486685 scan_static_bus for USB3 port 1
982 11:09:08.489802 scan_static_bus for USB3 port 1 done
983 11:09:08.496555 scan_bus: bus USB3 port 1 finished in 6 msecs
984 11:09:08.499551 scan_static_bus for USB0 port 0 done
985 11:09:08.503304 scan_bus: bus USB0 port 0 finished in 93 msecs
986 11:09:08.506206 scan_static_bus for PCI: 00:14.0 done
987 11:09:08.512965 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
988 11:09:08.516628 PCI: 00:14.3 scanning...
989 11:09:08.519547 scan_static_bus for PCI: 00:14.3
990 11:09:08.519997 GENERIC: 0.0 enabled
991 11:09:08.522844 scan_static_bus for PCI: 00:14.3 done
992 11:09:08.526459
993 11:09:08.529527 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
994 11:09:08.533339 PCI: 00:15.0 scanning...
995 11:09:08.536440 scan_static_bus for PCI: 00:15.0
996 11:09:08.536880 I2C: 00:1a enabled
997 11:09:08.539768 I2C: 00:31 enabled
998 11:09:08.543105 I2C: 00:32 enabled
999 11:09:08.546056 scan_static_bus for PCI: 00:15.0 done
1000 11:09:08.549851 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1001 11:09:08.553309 PCI: 00:15.1 scanning...
1002 11:09:08.555949 scan_static_bus for PCI: 00:15.1
1003 11:09:08.559252 I2C: 00:10 enabled
1004 11:09:08.562689 scan_static_bus for PCI: 00:15.1 done
1005 11:09:08.566074 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1006 11:09:08.569179 PCI: 00:15.2 scanning...
1007 11:09:08.572649 scan_static_bus for PCI: 00:15.2
1008 11:09:08.576210 scan_static_bus for PCI: 00:15.2 done
1009 11:09:08.579440 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1010 11:09:08.582778 PCI: 00:15.3 scanning...
1011 11:09:08.585996 scan_static_bus for PCI: 00:15.3
1012 11:09:08.589182 scan_static_bus for PCI: 00:15.3 done
1013 11:09:08.595785 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1014 11:09:08.599129 PCI: 00:19.1 scanning...
1015 11:09:08.602243 scan_static_bus for PCI: 00:19.1
1016 11:09:08.602762 I2C: 00:15 enabled
1017 11:09:08.609486 scan_static_bus for PCI: 00:19.1 done
1018 11:09:08.612225 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1019 11:09:08.615425 PCI: 00:1d.0 scanning...
1020 11:09:08.618934 do_pci_scan_bridge for PCI: 00:1d.0
1021 11:09:08.622769 PCI: pci_scan_bus for bus 01
1022 11:09:08.625415 PCI: 01:00.0 [1c5c/174a] enabled
1023 11:09:08.625974 GENERIC: 0.0 enabled
1024 11:09:08.632601 Enabling Common Clock Configuration
1025 11:09:08.635599 L1 Sub-State supported from root port 29
1026 11:09:08.638870 L1 Sub-State Support = 0xf
1027 11:09:08.642263 CommonModeRestoreTime = 0x28
1028 11:09:08.645534 Power On Value = 0x16, Power On Scale = 0x0
1029 11:09:08.646088 ASPM: Enabled L1
1030 11:09:08.651991 PCIe: Max_Payload_Size adjusted to 128
1031 11:09:08.655621 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1032 11:09:08.658996 PCI: 00:1e.2 scanning...
1033 11:09:08.662279 scan_generic_bus for PCI: 00:1e.2
1034 11:09:08.662770 SPI: 00 enabled
1035 11:09:08.665447
1036 11:09:08.668545 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1037 11:09:08.675067 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1038 11:09:08.678563 PCI: 00:1e.3 scanning...
1039 11:09:08.682000 scan_generic_bus for PCI: 00:1e.3
1040 11:09:08.682561 SPI: 00 enabled
1041 11:09:08.688674 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1042 11:09:08.692119 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1043 11:09:08.694997 PCI: 00:1f.0 scanning...
1044 11:09:08.698371 scan_static_bus for PCI: 00:1f.0
1045 11:09:08.701987 PNP: 0c09.0 enabled
1046 11:09:08.705118 PNP: 0c09.0 scanning...
1047 11:09:08.708170 scan_static_bus for PNP: 0c09.0
1048 11:09:08.711734 scan_static_bus for PNP: 0c09.0 done
1049 11:09:08.715083 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1050 11:09:08.718298 scan_static_bus for PCI: 00:1f.0 done
1051 11:09:08.724782 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1052 11:09:08.727971 PCI: 00:1f.2 scanning...
1053 11:09:08.731245 scan_static_bus for PCI: 00:1f.2
1054 11:09:08.731683 GENERIC: 0.0 enabled
1055 11:09:08.734653 GENERIC: 0.0 scanning...
1056 11:09:08.737931 scan_static_bus for GENERIC: 0.0
1057 11:09:08.741560 GENERIC: 0.0 enabled
1058 11:09:08.742075 GENERIC: 1.0 enabled
1059 11:09:08.747880 scan_static_bus for GENERIC: 0.0 done
1060 11:09:08.751245 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1061 11:09:08.754969 scan_static_bus for PCI: 00:1f.2 done
1062 11:09:08.761538 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1063 11:09:08.762090 PCI: 00:1f.3 scanning...
1064 11:09:08.764607 scan_static_bus for PCI: 00:1f.3
1065 11:09:08.771442 scan_static_bus for PCI: 00:1f.3 done
1066 11:09:08.774584 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1067 11:09:08.778098 PCI: 00:1f.5 scanning...
1068 11:09:08.781638 scan_generic_bus for PCI: 00:1f.5
1069 11:09:08.784517 scan_generic_bus for PCI: 00:1f.5 done
1070 11:09:08.787812 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1071 11:09:08.794149 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1072 11:09:08.797980 scan_static_bus for Root Device done
1073 11:09:08.804179 scan_bus: bus Root Device finished in 737 msecs
1074 11:09:08.804521 done
1075 11:09:08.810944 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1076 11:09:08.814072 Chrome EC: UHEPI supported
1077 11:09:08.820677 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1078 11:09:08.827337 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1079 11:09:08.830760 SPI flash protection: WPSW=0 SRP0=0
1080 11:09:08.834183 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1081 11:09:08.840579 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1082 11:09:08.844834 found VGA at PCI: 00:02.0
1083 11:09:08.847575 Setting up VGA for PCI: 00:02.0
1084 11:09:08.850965 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1085 11:09:08.857617 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1086 11:09:08.858110 Allocating resources...
1087 11:09:08.860843
1088 11:09:08.861352 Reading resources...
1089 11:09:08.863949 Root Device read_resources bus 0 link: 0
1090 11:09:08.870356 DOMAIN: 0000 read_resources bus 0 link: 0
1091 11:09:08.873910 PCI: 00:04.0 read_resources bus 1 link: 0
1092 11:09:08.880325 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 11:09:08.883552 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 11:09:08.890017 USB0 port 0 read_resources bus 0 link: 0
1095 11:09:08.893349 USB0 port 0 read_resources bus 0 link: 0 done
1096 11:09:08.900082 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 11:09:08.903274 PCI: 00:14.0 read_resources bus 0 link: 0
1098 11:09:08.906551 USB0 port 0 read_resources bus 0 link: 0
1099 11:09:08.914684 USB0 port 0 read_resources bus 0 link: 0 done
1100 11:09:08.917587 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 11:09:08.924403 PCI: 00:14.3 read_resources bus 0 link: 0
1102 11:09:08.927659 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 11:09:08.934426 PCI: 00:15.0 read_resources bus 0 link: 0
1104 11:09:08.937950 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 11:09:08.944748 PCI: 00:15.1 read_resources bus 0 link: 0
1106 11:09:08.948007 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 11:09:08.955408 PCI: 00:19.1 read_resources bus 0 link: 0
1108 11:09:08.958486 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 11:09:08.965011 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 11:09:08.968167 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 11:09:08.975071 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 11:09:08.978370 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 11:09:08.985186 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 11:09:08.988408 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 11:09:08.994712 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 11:09:08.998094 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 11:09:09.001437 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 11:09:09.004674
1119 11:09:09.007875 GENERIC: 0.0 read_resources bus 0 link: 0
1120 11:09:09.011346 GENERIC: 0.0 read_resources bus 0 link: 0 done
1121 11:09:09.014757
1122 11:09:09.017868 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1123 11:09:09.024370 DOMAIN: 0000 read_resources bus 0 link: 0 done
1124 11:09:09.027979 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1125 11:09:09.034355 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1126 11:09:09.037750 Root Device read_resources bus 0 link: 0 done
1127 11:09:09.041135 Done reading resources.
1128 11:09:09.047676 Show resources in subtree (Root Device)...After reading.
1129 11:09:09.050885 Root Device child on link 0 DOMAIN: 0000
1130 11:09:09.054374 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1131 11:09:09.064572 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1132 11:09:09.074296 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1133 11:09:09.074887 PCI: 00:00.0
1134 11:09:09.084346 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1135 11:09:09.093925 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1136 11:09:09.103927 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1137 11:09:09.113944 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1138 11:09:09.123758 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1139 11:09:09.134141 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1140 11:09:09.140669 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1141 11:09:09.150602 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1142 11:09:09.160434 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1143 11:09:09.170148 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1144 11:09:09.180314 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1145 11:09:09.187204 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1146 11:09:09.196943 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1147 11:09:09.206742 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1148 11:09:09.216614 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1149 11:09:09.226621 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1150 11:09:09.236741 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1151 11:09:09.246563 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1152 11:09:09.252862 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1153 11:09:09.262960 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1154 11:09:09.265984 PCI: 00:02.0
1155 11:09:09.276194 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1156 11:09:09.286096 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1157 11:09:09.295884 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1158 11:09:09.299746 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1159 11:09:09.309284 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1160 11:09:09.309757 GENERIC: 0.0
1161 11:09:09.312598
1162 11:09:09.313077 PCI: 00:05.0
1163 11:09:09.322853 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1164 11:09:09.325822 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1165 11:09:09.328970 GENERIC: 0.0
1166 11:09:09.332255 PCI: 00:08.0
1167 11:09:09.342193 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 11:09:09.342694 PCI: 00:0a.0
1169 11:09:09.345383 PCI: 00:0d.0 child on link 0 USB0 port 0
1170 11:09:09.355759 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1171 11:09:09.362293 USB0 port 0 child on link 0 USB3 port 0
1172 11:09:09.362766 USB3 port 0
1173 11:09:09.365732 USB3 port 1
1174 11:09:09.366178 USB3 port 2
1175 11:09:09.369023 USB3 port 3
1176 11:09:09.371979 PCI: 00:14.0 child on link 0 USB0 port 0
1177 11:09:09.381879 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1178 11:09:09.388621 USB0 port 0 child on link 0 USB2 port 0
1179 11:09:09.389085 USB2 port 0
1180 11:09:09.392084 USB2 port 1
1181 11:09:09.392527 USB2 port 2
1182 11:09:09.395462 USB2 port 3
1183 11:09:09.395907 USB2 port 4
1184 11:09:09.398807 USB2 port 5
1185 11:09:09.399251 USB2 port 6
1186 11:09:09.402030 USB2 port 7
1187 11:09:09.402521 USB2 port 8
1188 11:09:09.405225 USB2 port 9
1189 11:09:09.405659 USB3 port 0
1190 11:09:09.408631 USB3 port 1
1191 11:09:09.409066 USB3 port 2
1192 11:09:09.412011 USB3 port 3
1193 11:09:09.412474 PCI: 00:14.2
1194 11:09:09.415195
1195 11:09:09.421690 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 11:09:09.424934
1197 11:09:09.431878 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1198 11:09:09.434932
1199 11:09:09.438285 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1200 11:09:09.448547 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1201 11:09:09.448986 GENERIC: 0.0
1202 11:09:09.455162 PCI: 00:15.0 child on link 0 I2C: 00:1a
1203 11:09:09.465033 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 11:09:09.465472 I2C: 00:1a
1205 11:09:09.468358 I2C: 00:31
1206 11:09:09.468794 I2C: 00:32
1207 11:09:09.471555 PCI: 00:15.1 child on link 0 I2C: 00:10
1208 11:09:09.481412 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 11:09:09.484499 I2C: 00:10
1210 11:09:09.484976 PCI: 00:15.2
1211 11:09:09.494539 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 11:09:09.497763 PCI: 00:15.3
1213 11:09:09.507630 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 11:09:09.507924 PCI: 00:16.0
1215 11:09:09.517933 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 11:09:09.520981 PCI: 00:19.0
1217 11:09:09.524040 PCI: 00:19.1 child on link 0 I2C: 00:15
1218 11:09:09.534281 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 11:09:09.537378 I2C: 00:15
1220 11:09:09.540876 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1221 11:09:09.550663 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1222 11:09:09.561057 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1223 11:09:09.567520 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1224 11:09:09.570976 GENERIC: 0.0
1225 11:09:09.571461 PCI: 01:00.0
1226 11:09:09.580769 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 11:09:09.584013
1228 11:09:09.590495 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1229 11:09:09.600470 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1230 11:09:09.603719 PCI: 00:1e.0
1231 11:09:09.613882 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1232 11:09:09.617084 PCI: 00:1e.2 child on link 0 SPI: 00
1233 11:09:09.627055 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 11:09:09.630282 SPI: 00
1235 11:09:09.633715 PCI: 00:1e.3 child on link 0 SPI: 00
1236 11:09:09.643481 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:09:09.643928 SPI: 00
1238 11:09:09.647051 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1239 11:09:09.650298
1240 11:09:09.656989 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1241 11:09:09.660269 PNP: 0c09.0
1242 11:09:09.666503 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1243 11:09:09.673124 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1244 11:09:09.680127 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1245 11:09:09.683275
1246 11:09:09.690199 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1247 11:09:09.696625 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1248 11:09:09.697071 GENERIC: 0.0
1249 11:09:09.700044 GENERIC: 1.0
1250 11:09:09.700482 PCI: 00:1f.3
1251 11:09:09.709873 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1252 11:09:09.719795 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1253 11:09:09.723390 PCI: 00:1f.5
1254 11:09:09.732999 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1255 11:09:09.736419 CPU_CLUSTER: 0 child on link 0 APIC: 00
1256 11:09:09.736859 APIC: 00
1257 11:09:09.739765 APIC: 01
1258 11:09:09.740202 APIC: 02
1259 11:09:09.740547 APIC: 06
1260 11:09:09.742780
1261 11:09:09.743272 APIC: 05
1262 11:09:09.743625 APIC: 04
1263 11:09:09.745993 APIC: 03
1264 11:09:09.746458 APIC: 07
1265 11:09:09.752624 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1266 11:09:09.759662 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1267 11:09:09.766069 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1268 11:09:09.772776 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1269 11:09:09.775982 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1270 11:09:09.779189 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1271 11:09:09.786159 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1272 11:09:09.792655 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1273 11:09:09.798978 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1274 11:09:09.806197 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1275 11:09:09.812432 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1276 11:09:09.818921 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1277 11:09:09.828756 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1278 11:09:09.835499 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1279 11:09:09.842209 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1280 11:09:09.845348 DOMAIN: 0000: Resource ranges:
1281 11:09:09.849066 * Base: 1000, Size: 800, Tag: 100
1282 11:09:09.852301 * Base: 1900, Size: e700, Tag: 100
1283 11:09:09.859010 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1284 11:09:09.865359 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1285 11:09:09.871853 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1286 11:09:09.879039 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1287 11:09:09.889084 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1288 11:09:09.894955 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1289 11:09:09.901940 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1290 11:09:09.911549 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1291 11:09:09.918620 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1292 11:09:09.924806 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1293 11:09:09.935213 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1294 11:09:09.941498 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1295 11:09:09.947973 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1296 11:09:09.958182 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1297 11:09:09.964784 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1298 11:09:09.971237 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1299 11:09:09.981561 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1300 11:09:09.987792 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1301 11:09:09.994561 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1302 11:09:10.004655 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1303 11:09:10.011067 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1304 11:09:10.017581 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1305 11:09:10.027930 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1306 11:09:10.034426 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1307 11:09:10.041320 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1308 11:09:10.044371 DOMAIN: 0000: Resource ranges:
1309 11:09:10.050850 * Base: 7fc00000, Size: 40400000, Tag: 200
1310 11:09:10.054082 * Base: d0000000, Size: 28000000, Tag: 200
1311 11:09:10.057773 * Base: fa000000, Size: 1000000, Tag: 200
1312 11:09:10.060596 * Base: fb001000, Size: 2fff000, Tag: 200
1313 11:09:10.067170 * Base: fe010000, Size: 2e000, Tag: 200
1314 11:09:10.070228 * Base: fe03f000, Size: d41000, Tag: 200
1315 11:09:10.073422 * Base: fed88000, Size: 8000, Tag: 200
1316 11:09:10.076744 * Base: fed93000, Size: d000, Tag: 200
1317 11:09:10.083618 * Base: feda2000, Size: 1e000, Tag: 200
1318 11:09:10.086910 * Base: fede0000, Size: 1220000, Tag: 200
1319 11:09:10.090068 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1320 11:09:10.100194 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1321 11:09:10.106898 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1322 11:09:10.113409 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1323 11:09:10.120343 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1324 11:09:10.126644 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1325 11:09:10.133083 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1326 11:09:10.139838 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1327 11:09:10.146369 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1328 11:09:10.153025 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1329 11:09:10.159425 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1330 11:09:10.165965 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1331 11:09:10.172616 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1332 11:09:10.179674 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1333 11:09:10.186312 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1334 11:09:10.192813 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1335 11:09:10.199415 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1336 11:09:10.206135 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1337 11:09:10.212472 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1338 11:09:10.219579 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1339 11:09:10.226110 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1340 11:09:10.232478 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1341 11:09:10.239094 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1342 11:09:10.245637 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1343 11:09:10.252409 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1344 11:09:10.255486 PCI: 00:1d.0: Resource ranges:
1345 11:09:10.262386 * Base: 7fc00000, Size: 100000, Tag: 200
1346 11:09:10.269275 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1347 11:09:10.275464 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1348 11:09:10.282037 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1349 11:09:10.288534 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1350 11:09:10.295442 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1351 11:09:10.301922 Root Device assign_resources, bus 0 link: 0
1352 11:09:10.305101 DOMAIN: 0000 assign_resources, bus 0 link: 0
1353 11:09:10.315294 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1354 11:09:10.321677 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1355 11:09:10.328160 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1356 11:09:10.338369 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1357 11:09:10.341584 PCI: 00:04.0 assign_resources, bus 1 link: 0
1358 11:09:10.348705 PCI: 00:04.0 assign_resources, bus 1 link: 0
1359 11:09:10.355167 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1360 11:09:10.364663 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1361 11:09:10.371349 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1362 11:09:10.378070 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1363 11:09:10.381476 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1364 11:09:10.388270 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1365 11:09:10.394801 PCI: 00:14.0 assign_resources, bus 0 link: 0
1366 11:09:10.397934 PCI: 00:14.0 assign_resources, bus 0 link: 0
1367 11:09:10.407812 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1368 11:09:10.414114 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1369 11:09:10.424369 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1370 11:09:10.427597 PCI: 00:14.3 assign_resources, bus 0 link: 0
1371 11:09:10.430672 PCI: 00:14.3 assign_resources, bus 0 link: 0
1372 11:09:10.441094 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1373 11:09:10.444290 PCI: 00:15.0 assign_resources, bus 0 link: 0
1374 11:09:10.450906 PCI: 00:15.0 assign_resources, bus 0 link: 0
1375 11:09:10.457694 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1376 11:09:10.460919 PCI: 00:15.1 assign_resources, bus 0 link: 0
1377 11:09:10.464044
1378 11:09:10.467819 PCI: 00:15.1 assign_resources, bus 0 link: 0
1379 11:09:10.474006 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1380 11:09:10.484342 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1381 11:09:10.490442 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1382 11:09:10.500874 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1383 11:09:10.504125 PCI: 00:19.1 assign_resources, bus 0 link: 0
1384 11:09:10.510368 PCI: 00:19.1 assign_resources, bus 0 link: 0
1385 11:09:10.517398 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1386 11:09:10.527555 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1387 11:09:10.537184 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1388 11:09:10.540310 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1389 11:09:10.550685 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1390 11:09:10.556961 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1391 11:09:10.563787 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1392 11:09:10.570384 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1393 11:09:10.577020 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1394 11:09:10.583376 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1395 11:09:10.586771 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1396 11:09:10.596735 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1397 11:09:10.600257 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1398 11:09:10.603547 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1399 11:09:10.610554 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1400 11:09:10.613772 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1401 11:09:10.620343 LPC: Trying to open IO window from 800 size 1ff
1402 11:09:10.626961 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1403 11:09:10.636946 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1404 11:09:10.643480 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1405 11:09:10.649998 DOMAIN: 0000 assign_resources, bus 0 link: 0
1406 11:09:10.653270 Root Device assign_resources, bus 0 link: 0
1407 11:09:10.656473 Done setting resources.
1408 11:09:10.663325 Show resources in subtree (Root Device)...After assigning values.
1409 11:09:10.666499 Root Device child on link 0 DOMAIN: 0000
1410 11:09:10.669986 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1411 11:09:10.679896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1412 11:09:10.689950 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1413 11:09:10.692752 PCI: 00:00.0
1414 11:09:10.702973 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1415 11:09:10.709797 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1416 11:09:10.719756 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1417 11:09:10.729579 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1418 11:09:10.739384 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1419 11:09:10.749450 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1420 11:09:10.759434 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1421 11:09:10.766242 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1422 11:09:10.775992 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1423 11:09:10.785802 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1424 11:09:10.796039 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1425 11:09:10.805909 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1426 11:09:10.812633 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1427 11:09:10.822340 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1428 11:09:10.832241 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1429 11:09:10.842113 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1430 11:09:10.852087 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1431 11:09:10.861959 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1432 11:09:10.868689 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1433 11:09:10.872357
1434 11:09:10.878940 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1435 11:09:10.882054 PCI: 00:02.0
1436 11:09:10.891812 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1437 11:09:10.901968 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1438 11:09:10.911741 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1439 11:09:10.914905 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1440 11:09:10.918643
1441 11:09:10.928354 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1442 11:09:10.928495 GENERIC: 0.0
1443 11:09:10.931686 PCI: 00:05.0
1444 11:09:10.941990 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1445 11:09:10.945167 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1446 11:09:10.948556 GENERIC: 0.0
1447 11:09:10.948665 PCI: 00:08.0
1448 11:09:10.958097 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1449 11:09:10.961806 PCI: 00:0a.0
1450 11:09:10.964793 PCI: 00:0d.0 child on link 0 USB0 port 0
1451 11:09:10.974767 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1452 11:09:10.981283 USB0 port 0 child on link 0 USB3 port 0
1453 11:09:10.981398 USB3 port 0
1454 11:09:10.985128 USB3 port 1
1455 11:09:10.985228 USB3 port 2
1456 11:09:10.988376 USB3 port 3
1457 11:09:10.991653 PCI: 00:14.0 child on link 0 USB0 port 0
1458 11:09:11.001758 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1459 11:09:11.008543 USB0 port 0 child on link 0 USB2 port 0
1460 11:09:11.008653 USB2 port 0
1461 11:09:11.011547 USB2 port 1
1462 11:09:11.011642 USB2 port 2
1463 11:09:11.014938 USB2 port 3
1464 11:09:11.015027 USB2 port 4
1465 11:09:11.018121 USB2 port 5
1466 11:09:11.018222 USB2 port 6
1467 11:09:11.021351 USB2 port 7
1468 11:09:11.021455 USB2 port 8
1469 11:09:11.024694 USB2 port 9
1470 11:09:11.024843 USB3 port 0
1471 11:09:11.028231 USB3 port 1
1472 11:09:11.031597 USB3 port 2
1473 11:09:11.031692 USB3 port 3
1474 11:09:11.034880 PCI: 00:14.2
1475 11:09:11.044236 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1476 11:09:11.054507 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1477 11:09:11.057710 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1478 11:09:11.067821 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1479 11:09:11.070981 GENERIC: 0.0
1480 11:09:11.074171 PCI: 00:15.0 child on link 0 I2C: 00:1a
1481 11:09:11.084363 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1482 11:09:11.087624 I2C: 00:1a
1483 11:09:11.087715 I2C: 00:31
1484 11:09:11.091087 I2C: 00:32
1485 11:09:11.094115 PCI: 00:15.1 child on link 0 I2C: 00:10
1486 11:09:11.104142 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1487 11:09:11.107519 I2C: 00:10
1488 11:09:11.107604 PCI: 00:15.2
1489 11:09:11.117307 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1490 11:09:11.120509 PCI: 00:15.3
1491 11:09:11.130486 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1492 11:09:11.130618 PCI: 00:16.0
1493 11:09:11.140953 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1494 11:09:11.143901 PCI: 00:19.0
1495 11:09:11.147192 PCI: 00:19.1 child on link 0 I2C: 00:15
1496 11:09:11.157353 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1497 11:09:11.160679 I2C: 00:15
1498 11:09:11.164150 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1499 11:09:11.173425 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1500 11:09:11.186728 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1501 11:09:11.196655 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1502 11:09:11.196745 GENERIC: 0.0
1503 11:09:11.199839 PCI: 01:00.0
1504 11:09:11.210157 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1505 11:09:11.219869 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1506 11:09:11.229854 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1507 11:09:11.233004 PCI: 00:1e.0
1508 11:09:11.243330 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1509 11:09:11.246440 PCI: 00:1e.2 child on link 0 SPI: 00
1510 11:09:11.256402 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1511 11:09:11.260096 SPI: 00
1512 11:09:11.263100 PCI: 00:1e.3 child on link 0 SPI: 00
1513 11:09:11.272993 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1514 11:09:11.273085 SPI: 00
1515 11:09:11.276176
1516 11:09:11.279408 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1517 11:09:11.286101 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1518 11:09:11.289390 PNP: 0c09.0
1519 11:09:11.299545 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1520 11:09:11.302744 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1521 11:09:11.312767 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1522 11:09:11.322378 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1523 11:09:11.326138 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1524 11:09:11.329320 GENERIC: 0.0
1525 11:09:11.329410 GENERIC: 1.0
1526 11:09:11.332493 PCI: 00:1f.3
1527 11:09:11.342793 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1528 11:09:11.352185 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1529 11:09:11.352284 PCI: 00:1f.5
1530 11:09:11.355395
1531 11:09:11.365287 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1532 11:09:11.369138 CPU_CLUSTER: 0 child on link 0 APIC: 00
1533 11:09:11.369226 APIC: 00
1534 11:09:11.372136 APIC: 01
1535 11:09:11.372222 APIC: 02
1536 11:09:11.372291 APIC: 06
1537 11:09:11.375353 APIC: 05
1538 11:09:11.375457 APIC: 04
1539 11:09:11.378642 APIC: 03
1540 11:09:11.378729 APIC: 07
1541 11:09:11.382163 Done allocating resources.
1542 11:09:11.388745 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1543 11:09:11.392129 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1544 11:09:11.398474 Configure GPIOs for I2S audio on UP4.
1545 11:09:11.405203 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1546 11:09:11.405292 Enabling resources...
1547 11:09:11.411813 PCI: 00:00.0 subsystem <- 8086/9a12
1548 11:09:11.411903 PCI: 00:00.0 cmd <- 06
1549 11:09:11.415136 PCI: 00:02.0 subsystem <- 8086/9a40
1550 11:09:11.418876 PCI: 00:02.0 cmd <- 03
1551 11:09:11.421953 PCI: 00:04.0 subsystem <- 8086/9a03
1552 11:09:11.425102 PCI: 00:04.0 cmd <- 02
1553 11:09:11.428357 PCI: 00:05.0 subsystem <- 8086/9a19
1554 11:09:11.431938 PCI: 00:05.0 cmd <- 02
1555 11:09:11.435285 PCI: 00:08.0 subsystem <- 8086/9a11
1556 11:09:11.438534 PCI: 00:08.0 cmd <- 06
1557 11:09:11.442296 PCI: 00:0d.0 subsystem <- 8086/9a13
1558 11:09:11.444945 PCI: 00:0d.0 cmd <- 02
1559 11:09:11.448161 PCI: 00:14.0 subsystem <- 8086/a0ed
1560 11:09:11.451982 PCI: 00:14.0 cmd <- 02
1561 11:09:11.454806 PCI: 00:14.2 subsystem <- 8086/a0ef
1562 11:09:11.454884 PCI: 00:14.2 cmd <- 02
1563 11:09:11.461734 PCI: 00:14.3 subsystem <- 8086/a0f0
1564 11:09:11.461816 PCI: 00:14.3 cmd <- 02
1565 11:09:11.464763 PCI: 00:15.0 subsystem <- 8086/a0e8
1566 11:09:11.468454 PCI: 00:15.0 cmd <- 02
1567 11:09:11.471517 PCI: 00:15.1 subsystem <- 8086/a0e9
1568 11:09:11.474769 PCI: 00:15.1 cmd <- 02
1569 11:09:11.478005 PCI: 00:15.2 subsystem <- 8086/a0ea
1570 11:09:11.481264 PCI: 00:15.2 cmd <- 02
1571 11:09:11.484786 PCI: 00:15.3 subsystem <- 8086/a0eb
1572 11:09:11.488053 PCI: 00:15.3 cmd <- 02
1573 11:09:11.491434 PCI: 00:16.0 subsystem <- 8086/a0e0
1574 11:09:11.494730 PCI: 00:16.0 cmd <- 02
1575 11:09:11.498023 PCI: 00:19.1 subsystem <- 8086/a0c6
1576 11:09:11.501061 PCI: 00:19.1 cmd <- 02
1577 11:09:11.504885 PCI: 00:1d.0 bridge ctrl <- 0013
1578 11:09:11.507798 PCI: 00:1d.0 subsystem <- 8086/a0b0
1579 11:09:11.507879 PCI: 00:1d.0 cmd <- 06
1580 11:09:11.514939 PCI: 00:1e.0 subsystem <- 8086/a0a8
1581 11:09:11.515021 PCI: 00:1e.0 cmd <- 06
1582 11:09:11.518177 PCI: 00:1e.2 subsystem <- 8086/a0aa
1583 11:09:11.521329 PCI: 00:1e.2 cmd <- 06
1584 11:09:11.524524 PCI: 00:1e.3 subsystem <- 8086/a0ab
1585 11:09:11.528142 PCI: 00:1e.3 cmd <- 02
1586 11:09:11.531325 PCI: 00:1f.0 subsystem <- 8086/a087
1587 11:09:11.534207 PCI: 00:1f.0 cmd <- 407
1588 11:09:11.537683 PCI: 00:1f.3 subsystem <- 8086/a0c8
1589 11:09:11.541442 PCI: 00:1f.3 cmd <- 02
1590 11:09:11.544046 PCI: 00:1f.5 subsystem <- 8086/a0a4
1591 11:09:11.547310 PCI: 00:1f.5 cmd <- 406
1592 11:09:11.551322 PCI: 01:00.0 cmd <- 02
1593 11:09:11.555811 done.
1594 11:09:11.559257 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1595 11:09:11.562321 Initializing devices...
1596 11:09:11.565983 Root Device init
1597 11:09:11.569153 Chrome EC: Set SMI mask to 0x0000000000000000
1598 11:09:11.575511 Chrome EC: clear events_b mask to 0x0000000000000000
1599 11:09:11.582081 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1600 11:09:11.585742 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1601 11:09:11.593834 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1602 11:09:11.600914 Chrome EC: Set WAKE mask to 0x0000000000000000
1603 11:09:11.607182 fw_config match found: DB_USB=USB3_ACTIVE
1604 11:09:11.610433 Configure Right Type-C port orientation for retimer
1605 11:09:11.613723 Root Device init finished in 46 msecs
1606 11:09:11.617491 PCI: 00:00.0 init
1607 11:09:11.620920 CPU TDP = 9 Watts
1608 11:09:11.621009 CPU PL1 = 9 Watts
1609 11:09:11.624220 CPU PL2 = 40 Watts
1610 11:09:11.627426 CPU PL4 = 83 Watts
1611 11:09:11.630551 PCI: 00:00.0 init finished in 8 msecs
1612 11:09:11.630634 PCI: 00:02.0 init
1613 11:09:11.634162 GMA: Found VBT in CBFS
1614 11:09:11.637364 GMA: Found valid VBT in CBFS
1615 11:09:11.644022 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1616 11:09:11.651178 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1617 11:09:11.653912 PCI: 00:02.0 init finished in 18 msecs
1618 11:09:11.657263 PCI: 00:05.0 init
1619 11:09:11.660704 PCI: 00:05.0 init finished in 0 msecs
1620 11:09:11.663828 PCI: 00:08.0 init
1621 11:09:11.667251 PCI: 00:08.0 init finished in 0 msecs
1622 11:09:11.670453 PCI: 00:14.0 init
1623 11:09:11.673666 PCI: 00:14.0 init finished in 0 msecs
1624 11:09:11.677392 PCI: 00:14.2 init
1625 11:09:11.680161 PCI: 00:14.2 init finished in 0 msecs
1626 11:09:11.683884 PCI: 00:15.0 init
1627 11:09:11.683962 I2C bus 0 version 0x3230302a
1628 11:09:11.686791
1629 11:09:11.690535 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 11:09:11.693898 PCI: 00:15.0 init finished in 6 msecs
1631 11:09:11.693985 PCI: 00:15.1 init
1632 11:09:11.697185 I2C bus 1 version 0x3230302a
1633 11:09:11.700468 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 11:09:11.707005 PCI: 00:15.1 init finished in 6 msecs
1635 11:09:11.707094 PCI: 00:15.2 init
1636 11:09:11.710127 I2C bus 2 version 0x3230302a
1637 11:09:11.713534 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 11:09:11.716749 PCI: 00:15.2 init finished in 6 msecs
1639 11:09:11.720021 PCI: 00:15.3 init
1640 11:09:11.724002 I2C bus 3 version 0x3230302a
1641 11:09:11.727190 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 11:09:11.730006 PCI: 00:15.3 init finished in 6 msecs
1643 11:09:11.733638 PCI: 00:16.0 init
1644 11:09:11.736677 PCI: 00:16.0 init finished in 0 msecs
1645 11:09:11.739850 PCI: 00:19.1 init
1646 11:09:11.743328 I2C bus 5 version 0x3230302a
1647 11:09:11.746540 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 11:09:11.749741 PCI: 00:19.1 init finished in 6 msecs
1649 11:09:11.753353 PCI: 00:1d.0 init
1650 11:09:11.753429 Initializing PCH PCIe bridge.
1651 11:09:11.759955 PCI: 00:1d.0 init finished in 3 msecs
1652 11:09:11.763262 PCI: 00:1f.0 init
1653 11:09:11.766449 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 11:09:11.769610 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 11:09:11.773154 IOAPIC: ID = 0x02
1656 11:09:11.776743 IOAPIC: Dumping registers
1657 11:09:11.776839 reg 0x0000: 0x02000000
1658 11:09:11.779626 reg 0x0001: 0x00770020
1659 11:09:11.783039 reg 0x0002: 0x00000000
1660 11:09:11.786252 PCI: 00:1f.0 init finished in 21 msecs
1661 11:09:11.789546 PCI: 00:1f.2 init
1662 11:09:11.793317 Disabling ACPI via APMC.
1663 11:09:11.793403 APMC done.
1664 11:09:11.796615 PCI: 00:1f.2 init finished in 5 msecs
1665 11:09:11.810090 PCI: 01:00.0 init
1666 11:09:11.813507 PCI: 01:00.0 init finished in 0 msecs
1667 11:09:11.816695 PNP: 0c09.0 init
1668 11:09:11.819983 Google Chrome EC uptime: 8.370 seconds
1669 11:09:11.826539 Google Chrome AP resets since EC boot: 1
1670 11:09:11.830344 Google Chrome most recent AP reset causes:
1671 11:09:11.833567 0.346: 32775 shutdown: entering G3
1672 11:09:11.839927 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 11:09:11.843163 PNP: 0c09.0 init finished in 22 msecs
1674 11:09:11.849005 Devices initialized
1675 11:09:11.852417 Show all devs... After init.
1676 11:09:11.855551 Root Device: enabled 1
1677 11:09:11.855634 DOMAIN: 0000: enabled 1
1678 11:09:11.858899 CPU_CLUSTER: 0: enabled 1
1679 11:09:11.862134 PCI: 00:00.0: enabled 1
1680 11:09:11.865479 PCI: 00:02.0: enabled 1
1681 11:09:11.865565 PCI: 00:04.0: enabled 1
1682 11:09:11.868762 PCI: 00:05.0: enabled 1
1683 11:09:11.872050 PCI: 00:06.0: enabled 0
1684 11:09:11.875617 PCI: 00:07.0: enabled 0
1685 11:09:11.875707 PCI: 00:07.1: enabled 0
1686 11:09:11.878954 PCI: 00:07.2: enabled 0
1687 11:09:11.881996 PCI: 00:07.3: enabled 0
1688 11:09:11.885173 PCI: 00:08.0: enabled 1
1689 11:09:11.885279 PCI: 00:09.0: enabled 0
1690 11:09:11.888909 PCI: 00:0a.0: enabled 0
1691 11:09:11.892007 PCI: 00:0d.0: enabled 1
1692 11:09:11.892090 PCI: 00:0d.1: enabled 0
1693 11:09:11.895173
1694 11:09:11.895264 PCI: 00:0d.2: enabled 0
1695 11:09:11.898999 PCI: 00:0d.3: enabled 0
1696 11:09:11.901747 PCI: 00:0e.0: enabled 0
1697 11:09:11.901841 PCI: 00:10.2: enabled 1
1698 11:09:11.905106 PCI: 00:10.6: enabled 0
1699 11:09:11.908371 PCI: 00:10.7: enabled 0
1700 11:09:11.912011 PCI: 00:12.0: enabled 0
1701 11:09:11.912119 PCI: 00:12.6: enabled 0
1702 11:09:11.915293 PCI: 00:13.0: enabled 0
1703 11:09:11.918494 PCI: 00:14.0: enabled 1
1704 11:09:11.921918 PCI: 00:14.1: enabled 0
1705 11:09:11.922023 PCI: 00:14.2: enabled 1
1706 11:09:11.925264 PCI: 00:14.3: enabled 1
1707 11:09:11.928365 PCI: 00:15.0: enabled 1
1708 11:09:11.931741 PCI: 00:15.1: enabled 1
1709 11:09:11.931840 PCI: 00:15.2: enabled 1
1710 11:09:11.934999 PCI: 00:15.3: enabled 1
1711 11:09:11.938166 PCI: 00:16.0: enabled 1
1712 11:09:11.938319 PCI: 00:16.1: enabled 0
1713 11:09:11.941767
1714 11:09:11.941868 PCI: 00:16.2: enabled 0
1715 11:09:11.944854 PCI: 00:16.3: enabled 0
1716 11:09:11.948461 PCI: 00:16.4: enabled 0
1717 11:09:11.948540 PCI: 00:16.5: enabled 0
1718 11:09:11.951725 PCI: 00:17.0: enabled 0
1719 11:09:11.954929 PCI: 00:19.0: enabled 0
1720 11:09:11.958262 PCI: 00:19.1: enabled 1
1721 11:09:11.958347 PCI: 00:19.2: enabled 0
1722 11:09:11.961992 PCI: 00:1c.0: enabled 1
1723 11:09:11.964966 PCI: 00:1c.1: enabled 0
1724 11:09:11.968585 PCI: 00:1c.2: enabled 0
1725 11:09:11.968671 PCI: 00:1c.3: enabled 0
1726 11:09:11.971651 PCI: 00:1c.4: enabled 0
1727 11:09:11.974681 PCI: 00:1c.5: enabled 0
1728 11:09:11.978065 PCI: 00:1c.6: enabled 1
1729 11:09:11.978151 PCI: 00:1c.7: enabled 0
1730 11:09:11.981489 PCI: 00:1d.0: enabled 1
1731 11:09:11.984700 PCI: 00:1d.1: enabled 0
1732 11:09:11.984786 PCI: 00:1d.2: enabled 1
1733 11:09:11.988419 PCI: 00:1d.3: enabled 0
1734 11:09:11.991323 PCI: 00:1e.0: enabled 1
1735 11:09:11.994888 PCI: 00:1e.1: enabled 0
1736 11:09:11.994989 PCI: 00:1e.2: enabled 1
1737 11:09:11.998374 PCI: 00:1e.3: enabled 1
1738 11:09:12.001332 PCI: 00:1f.0: enabled 1
1739 11:09:12.005072 PCI: 00:1f.1: enabled 0
1740 11:09:12.005157 PCI: 00:1f.2: enabled 1
1741 11:09:12.007944 PCI: 00:1f.3: enabled 1
1742 11:09:12.011672 PCI: 00:1f.4: enabled 0
1743 11:09:12.014819 PCI: 00:1f.5: enabled 1
1744 11:09:12.014906 PCI: 00:1f.6: enabled 0
1745 11:09:12.018187 PCI: 00:1f.7: enabled 0
1746 11:09:12.021702 APIC: 00: enabled 1
1747 11:09:12.021789 GENERIC: 0.0: enabled 1
1748 11:09:12.024770 GENERIC: 0.0: enabled 1
1749 11:09:12.027813 GENERIC: 1.0: enabled 1
1750 11:09:12.031203 GENERIC: 0.0: enabled 1
1751 11:09:12.031324 GENERIC: 1.0: enabled 1
1752 11:09:12.034483 USB0 port 0: enabled 1
1753 11:09:12.038086 GENERIC: 0.0: enabled 1
1754 11:09:12.038175 USB0 port 0: enabled 1
1755 11:09:12.041380 GENERIC: 0.0: enabled 1
1756 11:09:12.044524 I2C: 00:1a: enabled 1
1757 11:09:12.048134 I2C: 00:31: enabled 1
1758 11:09:12.048221 I2C: 00:32: enabled 1
1759 11:09:12.051522 I2C: 00:10: enabled 1
1760 11:09:12.054813 I2C: 00:15: enabled 1
1761 11:09:12.054900 GENERIC: 0.0: enabled 0
1762 11:09:12.057888 GENERIC: 1.0: enabled 0
1763 11:09:12.061417 GENERIC: 0.0: enabled 1
1764 11:09:12.061505 SPI: 00: enabled 1
1765 11:09:12.064712 SPI: 00: enabled 1
1766 11:09:12.068195 PNP: 0c09.0: enabled 1
1767 11:09:12.068281 GENERIC: 0.0: enabled 1
1768 11:09:12.071218 USB3 port 0: enabled 1
1769 11:09:12.075169 USB3 port 1: enabled 1
1770 11:09:12.077740 USB3 port 2: enabled 0
1771 11:09:12.077826 USB3 port 3: enabled 0
1772 11:09:12.081187 USB2 port 0: enabled 0
1773 11:09:12.084291 USB2 port 1: enabled 1
1774 11:09:12.084377 USB2 port 2: enabled 1
1775 11:09:12.088265 USB2 port 3: enabled 0
1776 11:09:12.091081 USB2 port 4: enabled 1
1777 11:09:12.091167 USB2 port 5: enabled 0
1778 11:09:12.094420 USB2 port 6: enabled 0
1779 11:09:12.097676 USB2 port 7: enabled 0
1780 11:09:12.101010 USB2 port 8: enabled 0
1781 11:09:12.101096 USB2 port 9: enabled 0
1782 11:09:12.104188 USB3 port 0: enabled 0
1783 11:09:12.107972 USB3 port 1: enabled 1
1784 11:09:12.108058 USB3 port 2: enabled 0
1785 11:09:12.111384 USB3 port 3: enabled 0
1786 11:09:12.114585 GENERIC: 0.0: enabled 1
1787 11:09:12.117731 GENERIC: 1.0: enabled 1
1788 11:09:12.117817 APIC: 01: enabled 1
1789 11:09:12.121159 APIC: 02: enabled 1
1790 11:09:12.121245 APIC: 06: enabled 1
1791 11:09:12.124360 APIC: 05: enabled 1
1792 11:09:12.127588 APIC: 04: enabled 1
1793 11:09:12.127674 APIC: 03: enabled 1
1794 11:09:12.130939 APIC: 07: enabled 1
1795 11:09:12.134155 PCI: 01:00.0: enabled 1
1796 11:09:12.137492 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1797 11:09:12.144286 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1798 11:09:12.147452 ELOG: NV offset 0xf30000 size 0x1000
1799 11:09:12.153892 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1800 11:09:12.161045 ELOG: Event(17) added with size 13 at 2022-11-26 11:09:12 UTC
1801 11:09:12.167412 ELOG: Event(92) added with size 9 at 2022-11-26 11:09:12 UTC
1802 11:09:12.173754 ELOG: Event(93) added with size 9 at 2022-11-26 11:09:12 UTC
1803 11:09:12.180439 ELOG: Event(9E) added with size 10 at 2022-11-26 11:09:12 UTC
1804 11:09:12.187265 ELOG: Event(9F) added with size 14 at 2022-11-26 11:09:12 UTC
1805 11:09:12.193629 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1806 11:09:12.196940 ELOG: Event(A1) added with size 10 at 2022-11-26 11:09:12 UTC
1807 11:09:12.200548
1808 11:09:12.207208 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 11:09:12.213446 ELOG: Event(A0) added with size 9 at 2022-11-26 11:09:12 UTC
1810 11:09:12.217232 elog_add_boot_reason: Logged dev mode boot
1811 11:09:12.223623 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1812 11:09:12.223711 Finalize devices...
1813 11:09:12.226977 Devices finalized
1814 11:09:12.233607 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 11:09:12.236885 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 11:09:12.243417 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 11:09:12.246583 ME: HFSTS1 : 0x80030055
1818 11:09:12.253328 ME: HFSTS2 : 0x30280116
1819 11:09:12.256771 ME: HFSTS3 : 0x00000050
1820 11:09:12.259983 ME: HFSTS4 : 0x00004000
1821 11:09:12.266761 ME: HFSTS5 : 0x00000000
1822 11:09:12.270444 ME: HFSTS6 : 0x00400006
1823 11:09:12.273775 ME: Manufacturing Mode : YES
1824 11:09:12.276426 ME: SPI Protection Mode Enabled : NO
1825 11:09:12.279813 ME: FW Partition Table : OK
1826 11:09:12.286460 ME: Bringup Loader Failure : NO
1827 11:09:12.290157 ME: Firmware Init Complete : NO
1828 11:09:12.293206 ME: Boot Options Present : NO
1829 11:09:12.296569 ME: Update In Progress : NO
1830 11:09:12.299742 ME: D0i3 Support : YES
1831 11:09:12.303096 ME: Low Power State Enabled : NO
1832 11:09:12.306373 ME: CPU Replaced : YES
1833 11:09:12.313140 ME: CPU Replacement Valid : YES
1834 11:09:12.316237 ME: Current Working State : 5
1835 11:09:12.319499 ME: Current Operation State : 1
1836 11:09:12.322743 ME: Current Operation Mode : 3
1837 11:09:12.325961 ME: Error Code : 0
1838 11:09:12.329800 ME: Enhanced Debug Mode : NO
1839 11:09:12.332577 ME: CPU Debug Disabled : YES
1840 11:09:12.336368 ME: TXT Support : NO
1841 11:09:12.342903 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1842 11:09:12.349287 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1843 11:09:12.352886 CBFS: 'fallback/slic' not found.
1844 11:09:12.358950 ACPI: Writing ACPI tables at 76b01000.
1845 11:09:12.359051 ACPI: * FACS
1846 11:09:12.362921 ACPI: * DSDT
1847 11:09:12.366051 Ramoops buffer: 0x100000@0x76a00000.
1848 11:09:12.369644 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1849 11:09:12.375544 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1850 11:09:12.379247 Google Chrome EC: version:
1851 11:09:12.382354 ro: voema_v2.0.7540-147f8d37d1
1852 11:09:12.385664 rw: voema_v2.0.7540-147f8d37d1
1853 11:09:12.385775 running image: 2
1854 11:09:12.392283 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1855 11:09:12.397108 ACPI: * FADT
1856 11:09:12.397203 SCI is IRQ9
1857 11:09:12.400139 ACPI: added table 1/32, length now 40
1858 11:09:12.403758
1859 11:09:12.403842 ACPI: * SSDT
1860 11:09:12.406930 Found 1 CPU(s) with 8 core(s) each.
1861 11:09:12.413574 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1862 11:09:12.416929 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1863 11:09:12.420266 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1864 11:09:12.423468 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1865 11:09:12.430056 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1866 11:09:12.436607 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1867 11:09:12.439912 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1868 11:09:12.446924 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1869 11:09:12.453281 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1870 11:09:12.456759 \_SB.PCI0.RP09: Added StorageD3Enable property
1871 11:09:12.460078 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1872 11:09:12.463491
1873 11:09:12.466869 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1874 11:09:12.473225 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1875 11:09:12.476529 PS2K: Passing 80 keymaps to kernel
1876 11:09:12.483150 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1877 11:09:12.490049 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1878 11:09:12.496380 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1879 11:09:12.502815 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1880 11:09:12.509810 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1881 11:09:12.516439 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1882 11:09:12.523034 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1883 11:09:12.529400 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1884 11:09:12.532809 ACPI: added table 2/32, length now 44
1885 11:09:12.532894 ACPI: * MCFG
1886 11:09:12.539549 ACPI: added table 3/32, length now 48
1887 11:09:12.539637 ACPI: * TPM2
1888 11:09:12.542888 TPM2 log created at 0x769f0000
1889 11:09:12.546132 ACPI: added table 4/32, length now 52
1890 11:09:12.549329 ACPI: * MADT
1891 11:09:12.549410 SCI is IRQ9
1892 11:09:12.553103 ACPI: added table 5/32, length now 56
1893 11:09:12.556187 current = 76b09850
1894 11:09:12.556267 ACPI: * DMAR
1895 11:09:12.559204 ACPI: added table 6/32, length now 60
1896 11:09:12.565900 ACPI: added table 7/32, length now 64
1897 11:09:12.565987 ACPI: * HPET
1898 11:09:12.569681 ACPI: added table 8/32, length now 68
1899 11:09:12.572978 ACPI: done.
1900 11:09:12.573060 ACPI tables: 35216 bytes.
1901 11:09:12.575892 smbios_write_tables: 769ef000
1902 11:09:12.579150 EC returned error result code 3
1903 11:09:12.582425 Couldn't obtain OEM name from CBI
1904 11:09:12.586574 Create SMBIOS type 16
1905 11:09:12.589856 Create SMBIOS type 17
1906 11:09:12.592972 GENERIC: 0.0 (WIFI Device)
1907 11:09:12.593057 SMBIOS tables: 1750 bytes.
1908 11:09:12.599715 Writing table forward entry at 0x00000500
1909 11:09:12.606392 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1910 11:09:12.609467 Writing coreboot table at 0x76b25000
1911 11:09:12.616456 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1912 11:09:12.619802 1. 0000000000001000-000000000009ffff: RAM
1913 11:09:12.622685 2. 00000000000a0000-00000000000fffff: RESERVED
1914 11:09:12.629849 3. 0000000000100000-00000000769eefff: RAM
1915 11:09:12.632855 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1916 11:09:12.639485 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1917 11:09:12.646013 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1918 11:09:12.649229 7. 0000000077000000-000000007fbfffff: RESERVED
1919 11:09:12.652919 8. 00000000c0000000-00000000cfffffff: RESERVED
1920 11:09:12.659168 9. 00000000f8000000-00000000f9ffffff: RESERVED
1921 11:09:12.662952 10. 00000000fb000000-00000000fb000fff: RESERVED
1922 11:09:12.669207 11. 00000000fe000000-00000000fe00ffff: RESERVED
1923 11:09:12.672973 12. 00000000fed80000-00000000fed87fff: RESERVED
1924 11:09:12.679491 13. 00000000fed90000-00000000fed92fff: RESERVED
1925 11:09:12.682715 14. 00000000feda0000-00000000feda1fff: RESERVED
1926 11:09:12.689072 15. 00000000fedc0000-00000000feddffff: RESERVED
1927 11:09:12.692761 16. 0000000100000000-00000002803fffff: RAM
1928 11:09:12.695904 Passing 4 GPIOs to payload:
1929 11:09:12.699140 NAME | PORT | POLARITY | VALUE
1930 11:09:12.705553 lid | undefined | high | high
1931 11:09:12.712492 power | undefined | high | low
1932 11:09:12.715635 oprom | undefined | high | low
1933 11:09:12.722319 EC in RW | 0x000000e5 | high | high
1934 11:09:12.728926 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9fda
1935 11:09:12.729027 coreboot table: 1576 bytes.
1936 11:09:12.735997 IMD ROOT 0. 0x76fff000 0x00001000
1937 11:09:12.738588 IMD SMALL 1. 0x76ffe000 0x00001000
1938 11:09:12.742401 FSP MEMORY 2. 0x76c4e000 0x003b0000
1939 11:09:12.745621 VPD 3. 0x76c4d000 0x00000367
1940 11:09:12.748980 RO MCACHE 4. 0x76c4c000 0x00000fdc
1941 11:09:12.752296 CONSOLE 5. 0x76c2c000 0x00020000
1942 11:09:12.755175 FMAP 6. 0x76c2b000 0x00000578
1943 11:09:12.758904 TIME STAMP 7. 0x76c2a000 0x00000910
1944 11:09:12.762280
1945 11:09:12.765391 VBOOT WORK 8. 0x76c16000 0x00014000
1946 11:09:12.768763 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 11:09:12.772076 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 11:09:12.775203 RAMSTAGE 11. 0x76b97000 0x00073000
1949 11:09:12.778772 REFCODE 12. 0x76b42000 0x00055000
1950 11:09:12.782029 SMM BACKUP 13. 0x76b32000 0x00010000
1951 11:09:12.785196 4f444749 14. 0x76b30000 0x00002000
1952 11:09:12.788414 EXT VBT15. 0x76b2d000 0x0000219f
1953 11:09:12.794998 COREBOOT 16. 0x76b25000 0x00008000
1954 11:09:12.798174 ACPI 17. 0x76b01000 0x00024000
1955 11:09:12.801913 ACPI GNVS 18. 0x76b00000 0x00001000
1956 11:09:12.805181 RAMOOPS 19. 0x76a00000 0x00100000
1957 11:09:12.808414 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 11:09:12.811437 SMBIOS 21. 0x769ef000 0x00000800
1959 11:09:12.814687 IMD small region:
1960 11:09:12.818059 IMD ROOT 0. 0x76ffec00 0x00000400
1961 11:09:12.821676 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 11:09:12.824990 POWER STATE 2. 0x76ffeb80 0x00000044
1963 11:09:12.828274 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 11:09:12.834651 MEM INFO 4. 0x76ffe980 0x000001e0
1965 11:09:12.838520 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 11:09:12.841686 MTRR: Physical address space:
1967 11:09:12.848177 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 11:09:12.854636 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 11:09:12.861549 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 11:09:12.867763 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 11:09:12.874305 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 11:09:12.880989 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 11:09:12.887713 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 11:09:12.890899 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 11:09:12.894584 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 11:09:12.897574 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 11:09:12.901167 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 11:09:12.904494
1979 11:09:12.907838 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 11:09:12.910988 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 11:09:12.914083 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 11:09:12.917417 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 11:09:12.924257 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 11:09:12.927584 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 11:09:12.930886 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 11:09:12.934166 call enable_fixed_mtrr()
1987 11:09:12.937977 CPU physical address size: 39 bits
1988 11:09:12.944486 MTRR: default type WB/UC MTRR counts: 6/6.
1989 11:09:12.947813 MTRR: UC selected as default type.
1990 11:09:12.954167 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1991 11:09:12.957894 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 11:09:12.964015 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 11:09:12.971106 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 11:09:12.977569 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1995 11:09:12.984023 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1996 11:09:12.990564 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 11:09:12.993824 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 11:09:12.997201 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 11:09:13.000761 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 11:09:13.007173 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 11:09:13.010510 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 11:09:13.013726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 11:09:13.016945 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 11:09:13.023925 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 11:09:13.027194 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 11:09:13.030530 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 11:09:13.030620
2008 11:09:13.033919 MTRR check
2009 11:09:13.037167 call enable_fixed_mtrr()
2010 11:09:13.037287 Fixed MTRRs : Enabled
2011 11:09:13.040248 Variable MTRRs: Enabled
2012 11:09:13.040363
2013 11:09:13.043576 CPU physical address size: 39 bits
2014 11:09:13.050033 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2015 11:09:13.053751 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 11:09:13.060034 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:09:13.063350 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 11:09:13.066650 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 11:09:13.069984 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 11:09:13.077020 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 11:09:13.080245 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 11:09:13.083266 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 11:09:13.086636 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 11:09:13.093328 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 11:09:13.096617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 11:09:13.099847 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 11:09:13.106684 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 11:09:13.106783 call enable_fixed_mtrr()
2029 11:09:13.113502 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 11:09:13.116799 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 11:09:13.119721 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 11:09:13.122992 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 11:09:13.130093 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 11:09:13.133417 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 11:09:13.136670 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 11:09:13.139881 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 11:09:13.143190 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 11:09:13.146604
2039 11:09:13.149745 CPU physical address size: 39 bits
2040 11:09:13.153182 call enable_fixed_mtrr()
2041 11:09:13.156169 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:09:13.159611 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 11:09:13.166336 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 11:09:13.169483 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:09:13.173006 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:09:13.176157 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:09:13.183074 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:09:13.186113 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:09:13.189543 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:09:13.192880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:09:13.199319 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:09:13.202607 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:09:13.206029 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 11:09:13.209725 call enable_fixed_mtrr()
2055 11:09:13.212943 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 11:09:13.219281 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 11:09:13.222877 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 11:09:13.226099 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 11:09:13.229438 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 11:09:13.235706 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 11:09:13.239033 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 11:09:13.242637 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 11:09:13.245819 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 11:09:13.249630 CPU physical address size: 39 bits
2065 11:09:13.256215 call enable_fixed_mtrr()
2066 11:09:13.259430 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 11:09:13.262697 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 11:09:13.265948 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 11:09:13.272601 MTRR: Fixed MSR 0x259 0x0000000000000000
2070 11:09:13.276189 MTRR: Fixed MSR 0x268 0x0606060606060606
2071 11:09:13.279071 MTRR: Fixed MSR 0x269 0x0606060606060606
2072 11:09:13.282386 MTRR: Fixed MSR 0x26a 0x0606060606060606
2073 11:09:13.289126 MTRR: Fixed MSR 0x26b 0x0606060606060606
2074 11:09:13.292437 MTRR: Fixed MSR 0x26c 0x0606060606060606
2075 11:09:13.295583 MTRR: Fixed MSR 0x26d 0x0606060606060606
2076 11:09:13.298989 MTRR: Fixed MSR 0x26e 0x0606060606060606
2077 11:09:13.302630 MTRR: Fixed MSR 0x26f 0x0606060606060606
2078 11:09:13.305756
2079 11:09:13.309048 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 11:09:13.312057 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 11:09:13.318640 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 11:09:13.322231 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 11:09:13.325412 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 11:09:13.328596 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 11:09:13.331880 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 11:09:13.335738
2087 11:09:13.338924 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 11:09:13.341837 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 11:09:13.345527 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 11:09:13.349302 call enable_fixed_mtrr()
2091 11:09:13.352594 call enable_fixed_mtrr()
2092 11:09:13.355775 CPU physical address size: 39 bits
2093 11:09:13.358976 CPU physical address size: 39 bits
2094 11:09:13.362850 Checking cr50 for pending updates
2095 11:09:13.366521 CPU physical address size: 39 bits
2096 11:09:13.370206 CPU physical address size: 39 bits
2097 11:09:13.373191 Reading cr50 TPM mode
2098 11:09:13.382787 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2099 11:09:13.392509 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2100 11:09:13.395783 Checking segment from ROM address 0xffc02b38
2101 11:09:13.399556 Checking segment from ROM address 0xffc02b54
2102 11:09:13.406039 Loading segment from ROM address 0xffc02b38
2103 11:09:13.406136 code (compression=0)
2104 11:09:13.416229 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2105 11:09:13.425894 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2106 11:09:13.426026 it's not compressed!
2107 11:09:13.565858 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2108 11:09:13.572133 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2109 11:09:13.578791 Loading segment from ROM address 0xffc02b54
2110 11:09:13.578888 Entry Point 0x30000000
2111 11:09:13.582307 Loaded segments
2112 11:09:13.588472 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2113 11:09:13.631453 Finalizing chipset.
2114 11:09:13.634855 Finalizing SMM.
2115 11:09:13.634947 APMC done.
2116 11:09:13.641390 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2117 11:09:13.644849 mp_park_aps done after 0 msecs.
2118 11:09:13.648064 Jumping to boot code at 0x30000000(0x76b25000)
2119 11:09:13.657956 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2120 11:09:13.658043
2121 11:09:13.658114
2122 11:09:13.661190
2123 11:09:13.661269
2124 11:09:13.661612 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2125 11:09:13.661716 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2126 11:09:13.661803 Setting prompt string to ['volteer:']
2127 11:09:13.661894 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2128 11:09:13.664471 Starting depthcharge on Voema...
2129 11:09:13.664554
2130 11:09:13.671028 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2131 11:09:13.671105
2132 11:09:13.677778 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2133 11:09:13.677861
2134 11:09:13.684184 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2135 11:09:13.684263
2136 11:09:13.687381 Failed to find eMMC card reader
2137 11:09:13.687461
2138 11:09:13.690746 Wipe memory regions:
2139 11:09:13.690828
2140 11:09:13.694505 [0x00000000001000, 0x000000000a0000)
2141 11:09:13.694591
2142 11:09:13.697375 [0x00000000100000, 0x00000030000000)
2143 11:09:13.697454
2144 11:09:13.725996 [0x00000032662db0, 0x000000769ef000)
2145 11:09:13.726096
2146 11:09:13.765455 [0x00000100000000, 0x00000280400000)
2147 11:09:13.765573
2148 11:09:13.969467 ec_init: CrosEC protocol v3 supported (256, 256)
2149 11:09:13.969618
2150 11:09:13.976457 update_port_state: port C0 state: usb enable 1 mux conn 0
2151 11:09:13.976538
2152 11:09:13.982790 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2153 11:09:13.982871
2154 11:09:13.990661 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2155 11:09:13.990750
2156 11:09:13.994131 send_conn_disc_msg: pmc_send_cmd succeeded
2157 11:09:13.994229
2158 11:09:14.426623 R8152: Initializing
2159 11:09:14.426776
2160 11:09:14.429779 Version 6 (ocp_data = 5c30)
2161 11:09:14.429870
2162 11:09:14.433010 R8152: Done initializing
2163 11:09:14.433088
2164 11:09:14.436153 Adding net device
2165 11:09:14.436228
2166 11:09:14.742916 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2167 11:09:14.743064
2168 11:09:14.743135
2169 11:09:14.743199
2170 11:09:14.746343 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 11:09:14.847061 volteer: tftpboot 192.168.201.1 8138809/tftp-deploy-wmij00c2/kernel/bzImage 8138809/tftp-deploy-wmij00c2/kernel/cmdline 8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
2173 11:09:14.847228 Setting prompt string to 'Starting kernel'
2174 11:09:14.847351 Setting prompt string to ['Starting kernel']
2175 11:09:14.847427 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 11:09:14.847511 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2177 11:09:14.851209 tftpboot 192.168.201.1 8138809/tftp-deploy-wmij00c2/kernel/bzImoy-wmij00c2/kernel/cmdline 8138809/tftp-deploy-wmij00c2/ramdisk/ramdisk.cpio.gz
2178 11:09:14.851297
2179 11:09:14.851365 Waiting for link
2180 11:09:14.851440
2181 11:09:15.055333 done.
2182 11:09:15.055481
2183 11:09:15.055551 MAC: 00:24:32:30:79:06
2184 11:09:15.055623
2185 11:09:15.058764 Sending DHCP discover... done.
2186 11:09:15.058854
2187 11:09:15.061954 Waiting for reply... done.
2188 11:09:15.062037
2189 11:09:15.065268 Sending DHCP request... done.
2190 11:09:15.065355
2191 11:09:15.068749 Waiting for reply... done.
2192 11:09:15.068832
2193 11:09:15.071812 My ip is 192.168.201.23
2194 11:09:15.071889
2195 11:09:15.075161 The DHCP server ip is 192.168.201.1
2196 11:09:15.075237
2197 11:09:15.078424 TFTP server IP predefined by user: 192.168.201.1
2198 11:09:15.078501
2199 11:09:15.085140 Bootfile predefined by user: 8138809/tftp-deploy-wmij00c2/kernel/bzImage
2200 11:09:15.085219
2201 11:09:15.088309 Sending tftp read request... done.
2202 11:09:15.088402
2203 11:09:15.095344 Waiting for the transfer...
2204 11:09:15.095434
2205 11:09:15.611435 00000000 ################################################################
2206 11:09:15.611584
2207 11:09:16.126619 00080000 ################################################################
2208 11:09:16.126777
2209 11:09:16.647677 00100000 ################################################################
2210 11:09:16.647822
2211 11:09:17.171430 00180000 ################################################################
2212 11:09:17.171575
2213 11:09:17.705020 00200000 ################################################################
2214 11:09:17.705179
2215 11:09:18.230247 00280000 ################################################################
2216 11:09:18.230424
2217 11:09:18.754503 00300000 ################################################################
2218 11:09:18.754650
2219 11:09:19.298599 00380000 ################################################################
2220 11:09:19.298753
2221 11:09:19.825350 00400000 ################################################################
2222 11:09:19.825503
2223 11:09:20.338361 00480000 ################################################################
2224 11:09:20.338514
2225 11:09:20.850743 00500000 ################################################################
2226 11:09:20.850890
2227 11:09:21.367940 00580000 ################################################################
2228 11:09:21.368077
2229 11:09:21.887025 00600000 ################################################################
2230 11:09:21.887167
2231 11:09:22.418320 00680000 ################################################################
2232 11:09:22.418467
2233 11:09:22.947542 00700000 ################################################################
2234 11:09:22.947682
2235 11:09:23.474108 00780000 ################################################################
2236 11:09:23.474330
2237 11:09:23.997213 00800000 ################################################################
2238 11:09:23.997361
2239 11:09:24.370851 00880000 ############################################# done.
2240 11:09:24.370985
2241 11:09:24.374230 The bootfile was 9273344 bytes long.
2242 11:09:24.374322
2243 11:09:24.377633 Sending tftp read request... done.
2244 11:09:24.377708
2245 11:09:24.380396 Waiting for the transfer...
2246 11:09:24.380470
2247 11:09:24.904369 00000000 ################################################################
2248 11:09:24.904519
2249 11:09:25.437270 00080000 ################################################################
2250 11:09:25.437422
2251 11:09:25.969093 00100000 ################################################################
2252 11:09:25.969242
2253 11:09:26.484358 00180000 ################################################################
2254 11:09:26.484510
2255 11:09:27.025925 00200000 ################################################################
2256 11:09:27.026081
2257 11:09:27.581645 00280000 ################################################################
2258 11:09:27.581785
2259 11:09:28.163910 00300000 ################################################################
2260 11:09:28.164059
2261 11:09:28.728163 00380000 ################################################################
2262 11:09:28.728314
2263 11:09:29.274663 00400000 ################################################################
2264 11:09:29.274811
2265 11:09:29.854404 00480000 ################################################################
2266 11:09:29.854544
2267 11:09:30.391888 00500000 ################################################################
2268 11:09:30.392030
2269 11:09:30.933422 00580000 ################################################################
2270 11:09:30.933565
2271 11:09:31.487810 00600000 ################################################################
2272 11:09:31.487955
2273 11:09:32.027006 00680000 ################################################################
2274 11:09:32.027155
2275 11:09:32.585965 00700000 ################################################################
2276 11:09:32.586106
2277 11:09:33.155794 00780000 ################################################################
2278 11:09:33.155975
2279 11:09:33.734017 00800000 ################################################################
2280 11:09:33.734197
2281 11:09:34.312331 00880000 ################################################################
2282 11:09:34.312498
2283 11:09:34.891046 00900000 ################################################################
2284 11:09:34.891227
2285 11:09:35.467495 00980000 ################################################################
2286 11:09:35.467644
2287 11:09:35.994411 00a00000 ################################################################
2288 11:09:35.994551
2289 11:09:36.537121 00a80000 ################################################################
2290 11:09:36.537307
2291 11:09:37.061816 00b00000 ################################################################
2292 11:09:37.061960
2293 11:09:37.613602 00b80000 ################################################################
2294 11:09:37.613755
2295 11:09:38.164272 00c00000 ################################################################
2296 11:09:38.164413
2297 11:09:38.722933 00c80000 ################################################################
2298 11:09:38.723075
2299 11:09:39.267848 00d00000 ################################################################
2300 11:09:39.268019
2301 11:09:39.789764 00d80000 ################################################################
2302 11:09:39.789917
2303 11:09:40.320667 00e00000 ################################################################
2304 11:09:40.320856
2305 11:09:40.840892 00e80000 ################################################################
2306 11:09:40.841043
2307 11:09:41.365910 00f00000 ################################################################
2308 11:09:41.366067
2309 11:09:41.888355 00f80000 ################################################################
2310 11:09:41.888503
2311 11:09:42.418453 01000000 ################################################################
2312 11:09:42.418612
2313 11:09:42.949609 01080000 ################################################################
2314 11:09:42.949776
2315 11:09:43.482905 01100000 ################################################################
2316 11:09:43.483061
2317 11:09:44.011127 01180000 ################################################################
2318 11:09:44.011282
2319 11:09:44.535726 01200000 ################################################################
2320 11:09:44.535888
2321 11:09:45.059987 01280000 ################################################################
2322 11:09:45.060147
2323 11:09:45.583683 01300000 ################################################################
2324 11:09:45.583836
2325 11:09:46.108953 01380000 ################################################################
2326 11:09:46.109104
2327 11:09:46.630617 01400000 ################################################################
2328 11:09:46.630765
2329 11:09:47.151418 01480000 ################################################################
2330 11:09:47.151563
2331 11:09:47.680071 01500000 ################################################################
2332 11:09:47.680224
2333 11:09:48.206268 01580000 ################################################################
2334 11:09:48.206410
2335 11:09:48.730033 01600000 ################################################################
2336 11:09:48.730177
2337 11:09:49.247425 01680000 ################################################################
2338 11:09:49.247568
2339 11:09:49.763759 01700000 ################################################################
2340 11:09:49.763903
2341 11:09:50.292733 01780000 ################################################################
2342 11:09:50.292875
2343 11:09:50.843855 01800000 ################################################################
2344 11:09:50.844007
2345 11:09:51.382665 01880000 ################################################################
2346 11:09:51.382827
2347 11:09:51.949712 01900000 ################################################################
2348 11:09:51.949858
2349 11:09:52.486712 01980000 ################################################################
2350 11:09:52.486864
2351 11:09:53.025511 01a00000 ################################################################
2352 11:09:53.025698
2353 11:09:53.542081 01a80000 ################################################################
2354 11:09:53.542248
2355 11:09:54.062888 01b00000 ################################################################
2356 11:09:54.063025
2357 11:09:54.584667 01b80000 ################################################################
2358 11:09:54.584806
2359 11:09:55.112633 01c00000 ################################################################
2360 11:09:55.112777
2361 11:09:55.633449 01c80000 ################################################################
2362 11:09:55.633597
2363 11:09:56.145448 01d00000 ################################################################
2364 11:09:56.145597
2365 11:09:56.660885 01d80000 ################################################################
2366 11:09:56.661035
2367 11:09:57.179230 01e00000 ################################################################
2368 11:09:57.179370
2369 11:09:57.692380 01e80000 ################################################################
2370 11:09:57.692519
2371 11:09:58.202291 01f00000 ################################################################
2372 11:09:58.202431
2373 11:09:58.715852 01f80000 ################################################################
2374 11:09:58.715991
2375 11:09:59.222802 02000000 ################################################################
2376 11:09:59.222953
2377 11:09:59.730264 02080000 ################################################################
2378 11:09:59.730454
2379 11:10:00.237912 02100000 ################################################################
2380 11:10:00.238053
2381 11:10:00.805046 02180000 ################################################################
2382 11:10:00.805591
2383 11:10:01.007452 02200000 ######################## done.
2384 11:10:01.007609
2385 11:10:01.010846 Sending tftp read request... done.
2386 11:10:01.010943
2387 11:10:01.013878 Waiting for the transfer...
2388 11:10:01.013966
2389 11:10:01.014035 00000000 # done.
2390 11:10:01.014099
2391 11:10:01.024382 Command line loaded dynamically from TFTP file: 8138809/tftp-deploy-wmij00c2/kernel/cmdline
2392 11:10:01.024474
2393 11:10:01.037309 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2394 11:10:01.037397
2395 11:10:01.047670 Shutting down all USB controllers.
2396 11:10:01.047756
2397 11:10:01.047823 Removing current net device
2398 11:10:01.047884
2399 11:10:01.050674 Finalizing coreboot
2400 11:10:01.050759
2401 11:10:01.057444 Exiting depthcharge with code 4 at timestamp: 56067652
2402 11:10:01.057529
2403 11:10:01.057595
2404 11:10:01.057656 Starting kernel ...
2405 11:10:01.057714
2406 11:10:01.057771
2407 11:10:01.057827
2408 11:10:01.058345 end: 2.2.4 bootloader-commands (duration 00:00:47) [common]
2409 11:10:01.058443 start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
2410 11:10:01.058520 Setting prompt string to ['Linux version [0-9]']
2411 11:10:01.058590 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2412 11:10:01.058660 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2414 11:13:57.058799 end: 2.2.5 auto-login-action (duration 00:03:56) [common]
2416 11:13:57.059252 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
2418 11:13:57.059429 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2421 11:13:57.059687 end: 2 depthcharge-action (duration 00:05:00) [common]
2423 11:13:57.059909 Cleaning after the job
2424 11:13:57.059993 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/ramdisk
2425 11:13:57.062288 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/kernel
2426 11:13:57.062964 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138809/tftp-deploy-wmij00c2/modules
2427 11:13:57.063158 start: 4.1 power-off (timeout 00:00:30) [common]
2428 11:13:57.063311 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2429 11:13:57.082842 >> Command sent successfully.
2430 11:13:57.084979 Returned 0 in 0 seconds
2431 11:13:57.186143 end: 4.1 power-off (duration 00:00:00) [common]
2433 11:13:57.187598 start: 4.2 read-feedback (timeout 00:10:00) [common]
2434 11:13:57.188696 Listened to connection for namespace 'common' for up to 1s
2435 11:13:58.190506 Finalising connection for namespace 'common'
2436 11:13:58.191166 Disconnecting from shell: Finalise
2437 11:13:58.292552 end: 4.2 read-feedback (duration 00:00:01) [common]
2438 11:13:58.293138 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8138809
2439 11:13:58.356027 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8138809
2440 11:13:58.356253 JobError: Your job cannot terminate cleanly.