Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 11:18:11.581266 lava-dispatcher, installed at version: 2022.10
2 11:18:11.581455 start: 0 validate
3 11:18:11.581588 Start time: 2022-11-26 11:18:11.581580+00:00 (UTC)
4 11:18:11.581712 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:18:11.581843 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 11:18:11.874745 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:18:11.874916 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:18:12.168240 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:18:12.168399 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:18:12.458281 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:18:12.458441 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:18:12.756236 validate duration: 1.17
14 11:18:12.756563 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:18:12.756664 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:18:12.756754 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:18:12.756853 Not decompressing ramdisk as can be used compressed.
18 11:18:12.756954 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/initrd.cpio.gz
19 11:18:12.757037 saving as /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/ramdisk/initrd.cpio.gz
20 11:18:12.757098 total size: 5431719 (5MB)
21 11:18:12.759630 progress 0% (0MB)
22 11:18:12.762727 progress 5% (0MB)
23 11:18:12.764804 progress 10% (0MB)
24 11:18:12.767198 progress 15% (0MB)
25 11:18:12.769838 progress 20% (1MB)
26 11:18:12.772872 progress 25% (1MB)
27 11:18:12.774848 progress 30% (1MB)
28 11:18:12.777534 progress 35% (1MB)
29 11:18:12.780059 progress 40% (2MB)
30 11:18:12.782515 progress 45% (2MB)
31 11:18:12.785303 progress 50% (2MB)
32 11:18:12.787667 progress 55% (2MB)
33 11:18:12.790183 progress 60% (3MB)
34 11:18:12.793012 progress 65% (3MB)
35 11:18:12.795500 progress 70% (3MB)
36 11:18:12.798133 progress 75% (3MB)
37 11:18:12.800357 progress 80% (4MB)
38 11:18:12.803198 progress 85% (4MB)
39 11:18:12.806150 progress 90% (4MB)
40 11:18:12.811336 progress 95% (4MB)
41 11:18:12.812666 progress 100% (5MB)
42 11:18:12.812923 5MB downloaded in 0.06s (92.80MB/s)
43 11:18:12.813081 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:18:12.813331 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:18:12.813443 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:18:12.813546 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:18:12.813652 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:18:12.813720 saving as /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/kernel/bzImage
50 11:18:12.813781 total size: 9273344 (8MB)
51 11:18:12.813841 No compression specified
52 11:18:12.816444 progress 0% (0MB)
53 11:18:12.820779 progress 5% (0MB)
54 11:18:12.825515 progress 10% (0MB)
55 11:18:12.829364 progress 15% (1MB)
56 11:18:12.834414 progress 20% (1MB)
57 11:18:12.838409 progress 25% (2MB)
58 11:18:12.842455 progress 30% (2MB)
59 11:18:12.847024 progress 35% (3MB)
60 11:18:12.851252 progress 40% (3MB)
61 11:18:12.855593 progress 45% (4MB)
62 11:18:12.860149 progress 50% (4MB)
63 11:18:12.868663 progress 55% (4MB)
64 11:18:12.870958 progress 60% (5MB)
65 11:18:12.873215 progress 65% (5MB)
66 11:18:12.877618 progress 70% (6MB)
67 11:18:12.882201 progress 75% (6MB)
68 11:18:12.886246 progress 80% (7MB)
69 11:18:12.891052 progress 85% (7MB)
70 11:18:12.895069 progress 90% (7MB)
71 11:18:12.899246 progress 95% (8MB)
72 11:18:12.903725 progress 100% (8MB)
73 11:18:12.904056 8MB downloaded in 0.09s (97.97MB/s)
74 11:18:12.904214 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:18:12.904462 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:18:12.904553 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:18:12.904642 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:18:12.904751 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20221107.1/amd64/full.rootfs.tar.xz
80 11:18:12.904823 saving as /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/nfsrootfs/full.rootfs.tar
81 11:18:12.904887 total size: 207113456 (197MB)
82 11:18:12.904951 Using unxz to decompress xz
83 11:18:12.909648 progress 0% (0MB)
84 11:18:13.481078 progress 5% (9MB)
85 11:18:14.025724 progress 10% (19MB)
86 11:18:14.637429 progress 15% (29MB)
87 11:18:15.012991 progress 20% (39MB)
88 11:18:15.384631 progress 25% (49MB)
89 11:18:15.984568 progress 30% (59MB)
90 11:18:16.544550 progress 35% (69MB)
91 11:18:17.152298 progress 40% (79MB)
92 11:18:17.713799 progress 45% (88MB)
93 11:18:18.298311 progress 50% (98MB)
94 11:18:18.939497 progress 55% (108MB)
95 11:18:19.634891 progress 60% (118MB)
96 11:18:19.775166 progress 65% (128MB)
97 11:18:19.918124 progress 70% (138MB)
98 11:18:20.014346 progress 75% (148MB)
99 11:18:20.084871 progress 80% (158MB)
100 11:18:20.157130 progress 85% (167MB)
101 11:18:20.264972 progress 90% (177MB)
102 11:18:20.533147 progress 95% (187MB)
103 11:18:21.132491 progress 100% (197MB)
104 11:18:21.138519 197MB downloaded in 8.23s (23.99MB/s)
105 11:18:21.138794 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:18:21.139081 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:18:21.139176 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:18:21.139273 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:18:21.139391 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:18:21.139469 saving as /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/modules/modules.tar
112 11:18:21.139532 total size: 64696 (0MB)
113 11:18:21.139604 Using unxz to decompress xz
114 11:18:21.144966 progress 50% (0MB)
115 11:18:21.145406 progress 100% (0MB)
116 11:18:21.149630 0MB downloaded in 0.01s (6.11MB/s)
117 11:18:21.149877 end: 1.4.1 http-download (duration 00:00:00) [common]
119 11:18:21.150157 end: 1.4 download-retry (duration 00:00:00) [common]
120 11:18:21.150290 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 11:18:21.150399 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 11:18:23.282136 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8138812/extract-nfsrootfs-6xl2w0_m
123 11:18:23.282398 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 11:18:23.282503 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 11:18:23.282652 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_
126 11:18:23.282761 makedir: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin
127 11:18:23.282847 makedir: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/tests
128 11:18:23.282940 makedir: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/results
129 11:18:23.283042 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-add-keys
130 11:18:23.283183 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-add-sources
131 11:18:23.283308 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-background-process-start
132 11:18:23.283421 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-background-process-stop
133 11:18:23.283545 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-common-functions
134 11:18:23.283656 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-echo-ipv4
135 11:18:23.283778 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-install-packages
136 11:18:23.283894 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-installed-packages
137 11:18:23.284006 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-os-build
138 11:18:23.284124 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-probe-channel
139 11:18:23.284232 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-probe-ip
140 11:18:23.284349 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-target-ip
141 11:18:23.284464 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-target-mac
142 11:18:23.284572 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-target-storage
143 11:18:23.284690 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-case
144 11:18:23.284800 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-event
145 11:18:23.284917 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-feedback
146 11:18:23.285033 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-raise
147 11:18:23.285141 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-reference
148 11:18:23.285259 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-runner
149 11:18:23.285368 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-set
150 11:18:23.285483 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-test-shell
151 11:18:23.285591 Updating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-add-keys (debian)
152 11:18:23.285713 Updating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-add-sources (debian)
153 11:18:23.285831 Updating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-install-packages (debian)
154 11:18:23.285942 Updating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-installed-packages (debian)
155 11:18:23.286061 Updating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/bin/lava-os-build (debian)
156 11:18:23.286157 Creating /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/environment
157 11:18:23.286287 LAVA metadata
158 11:18:23.286353 - LAVA_JOB_ID=8138812
159 11:18:23.286429 - LAVA_DISPATCHER_IP=192.168.201.1
160 11:18:23.286527 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
161 11:18:23.286601 skipped lava-vland-overlay
162 11:18:23.286677 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 11:18:23.286766 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
164 11:18:23.286829 skipped lava-multinode-overlay
165 11:18:23.286903 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 11:18:23.286992 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
167 11:18:23.287062 Loading test definitions
168 11:18:23.287157 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
169 11:18:23.287228 Using /lava-8138812 at stage 0
170 11:18:23.287473 uuid=8138812_1.5.2.3.1 testdef=None
171 11:18:23.287571 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 11:18:23.287658 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
173 11:18:23.288108 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 11:18:23.288354 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
176 11:18:23.288874 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 11:18:23.289125 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
179 11:18:23.289682 runner path: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/0/tests/0_timesync-off test_uuid 8138812_1.5.2.3.1
180 11:18:23.289838 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 11:18:23.290079 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
183 11:18:23.290153 Using /lava-8138812 at stage 0
184 11:18:23.290297 Fetching tests from https://github.com/kernelci/test-definitions.git
185 11:18:23.290379 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/0/tests/1_kselftest-futex'
186 11:18:27.244557 Running '/usr/bin/git checkout kernelci.org
187 11:18:27.389632 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
188 11:18:27.390368 uuid=8138812_1.5.2.3.5 testdef=None
189 11:18:27.390530 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
191 11:18:27.390783 start: 1.5.2.3.6 test-overlay (timeout 00:09:45) [common]
192 11:18:27.391510 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 11:18:27.391750 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:45) [common]
195 11:18:27.392661 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 11:18:27.392910 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
198 11:18:27.393859 runner path: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/0/tests/1_kselftest-futex test_uuid 8138812_1.5.2.3.5
199 11:18:27.393949 BOARD='asus-C436FA-Flip-hatch'
200 11:18:27.394016 BRANCH='cip'
201 11:18:27.394078 SKIPFILE='skipfile-lkft.yaml'
202 11:18:27.394138 TESTPROG_URL='None'
203 11:18:27.394196 TST_CASENAME=''
204 11:18:27.394290 TST_CMDFILES='futex'
205 11:18:27.394426 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 11:18:27.394639 Creating lava-test-runner.conf files
208 11:18:27.394704 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8138812/lava-overlay-x9i32xh_/lava-8138812/0 for stage 0
209 11:18:27.394793 - 0_timesync-off
210 11:18:27.394863 - 1_kselftest-futex
211 11:18:27.394958 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
212 11:18:27.395051 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
213 11:18:34.907899 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
214 11:18:34.908069 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
215 11:18:34.908167 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 11:18:34.908272 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
217 11:18:34.908364 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
218 11:18:35.012428 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 11:18:35.012768 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
220 11:18:35.012875 extracting modules file /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138812/extract-nfsrootfs-6xl2w0_m
221 11:18:35.016928 extracting modules file /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138812/extract-overlay-ramdisk-gbz0jc73/ramdisk
222 11:18:35.020747 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 11:18:35.020865 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
224 11:18:35.020956 [common] Applying overlay to NFS
225 11:18:35.021029 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138812/compress-overlay-9csw_d1e/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8138812/extract-nfsrootfs-6xl2w0_m
226 11:18:35.488446 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 11:18:35.488610 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
228 11:18:35.488714 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 11:18:35.488804 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
230 11:18:35.488886 Building ramdisk /var/lib/lava/dispatcher/tmp/8138812/extract-overlay-ramdisk-gbz0jc73/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8138812/extract-overlay-ramdisk-gbz0jc73/ramdisk
231 11:18:35.523250 >> 24775 blocks
232 11:18:36.013984 rename /var/lib/lava/dispatcher/tmp/8138812/extract-overlay-ramdisk-gbz0jc73/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
233 11:18:36.014423 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 11:18:36.014548 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
235 11:18:36.014657 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
236 11:18:36.014755 No mkimage arch provided, not using FIT.
237 11:18:36.014850 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 11:18:36.014941 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 11:18:36.015046 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
240 11:18:36.015146 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
241 11:18:36.015229 No LXC device requested
242 11:18:36.015313 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 11:18:36.015410 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
244 11:18:36.015491 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 11:18:36.015574 Checking files for TFTP limit of 4294967296 bytes.
246 11:18:36.015971 end: 1 tftp-deploy (duration 00:00:23) [common]
247 11:18:36.016075 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 11:18:36.016178 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 11:18:36.016314 substitutions:
250 11:18:36.016385 - {DTB}: None
251 11:18:36.016450 - {INITRD}: 8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
252 11:18:36.016519 - {KERNEL}: 8138812/tftp-deploy-dtstbrdz/kernel/bzImage
253 11:18:36.016579 - {LAVA_MAC}: None
254 11:18:36.016636 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8138812/extract-nfsrootfs-6xl2w0_m
255 11:18:36.016704 - {NFS_SERVER_IP}: 192.168.201.1
256 11:18:36.016762 - {PRESEED_CONFIG}: None
257 11:18:36.016821 - {PRESEED_LOCAL}: None
258 11:18:36.016881 - {RAMDISK}: 8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
259 11:18:36.016939 - {ROOT_PART}: None
260 11:18:36.016995 - {ROOT}: None
261 11:18:36.017052 - {SERVER_IP}: 192.168.201.1
262 11:18:36.017113 - {TEE}: None
263 11:18:36.017169 Parsed boot commands:
264 11:18:36.017224 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 11:18:36.017391 Parsed boot commands: tftpboot 192.168.201.1 8138812/tftp-deploy-dtstbrdz/kernel/bzImage 8138812/tftp-deploy-dtstbrdz/kernel/cmdline 8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
266 11:18:36.017494 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 11:18:36.017585 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 11:18:36.017693 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 11:18:36.017848 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 11:18:36.017937 Not connected, no need to disconnect.
271 11:18:36.018020 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 11:18:36.018107 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 11:18:36.018175 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
274 11:18:36.021180 Setting prompt string to ['lava-test: # ']
275 11:18:36.021530 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 11:18:36.021649 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 11:18:36.021754 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 11:18:36.021846 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 11:18:36.022028 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
280 11:18:36.042992 >> Command sent successfully.
281 11:18:36.045058 Returned 0 in 0 seconds
282 11:18:36.145709 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 11:18:36.146026 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 11:18:36.146134 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 11:18:36.146248 Setting prompt string to 'Starting depthcharge on Helios...'
287 11:18:36.146376 Changing prompt to 'Starting depthcharge on Helios...'
288 11:18:36.146448 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 11:18:36.146740 [Enter `^Ec?' for help]
290 11:18:43.345275
291 11:18:43.345436
292 11:18:43.355112 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 11:18:43.357978 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 11:18:43.364872 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 11:18:43.368133 CPU: AES supported, TXT NOT supported, VT supported
296 11:18:43.374753 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 11:18:43.378185 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 11:18:43.384448 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 11:18:43.388019 VBOOT: Loading verstage.
300 11:18:43.391357 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 11:18:43.398026 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 11:18:43.404418 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 11:18:43.404514 CBFS @ c08000 size 3f8000
304 11:18:43.410659 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 11:18:43.414114 CBFS: Locating 'fallback/verstage'
306 11:18:43.417558 CBFS: Found @ offset 10fb80 size 1072c
307 11:18:43.421896
308 11:18:43.421996
309 11:18:43.432094 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 11:18:43.446458 Probing TPM: . done!
311 11:18:43.449753 TPM ready after 0 ms
312 11:18:43.453094 Connected to device vid:did:rid of 1ae0:0028:00
313 11:18:43.463177 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
314 11:18:43.466439 Initialized TPM device CR50 revision 0
315 11:18:43.507483 tlcl_send_startup: Startup return code is 0
316 11:18:43.507609 TPM: setup succeeded
317 11:18:43.520428 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 11:18:43.523875 Chrome EC: UHEPI supported
319 11:18:43.527622 Phase 1
320 11:18:43.530615 FMAP: area GBB found @ c05000 (12288 bytes)
321 11:18:43.537274 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 11:18:43.540749 Phase 2
323 11:18:43.540851 Phase 3
324 11:18:43.544035 FMAP: area GBB found @ c05000 (12288 bytes)
325 11:18:43.550179 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 11:18:43.556854 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 11:18:43.560189 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 11:18:43.566604 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 11:18:43.583018 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 11:18:43.586208 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 11:18:43.592715 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 11:18:43.597021 Phase 4
333 11:18:43.600040 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 11:18:43.606868 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 11:18:43.610080
336 11:18:43.786703 VB2:vb2_rsa_verify_digest() Digest check failed!
337 11:18:43.792814 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 11:18:43.792902 Saving nvdata
339 11:18:43.796285 Reboot requested (10020007)
340 11:18:43.800085 board_reset() called!
341 11:18:43.800170 full_reset() called!
342 11:18:48.312490
343 11:18:48.312634
344 11:18:48.322002 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
345 11:18:48.325548 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
346 11:18:48.331964 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
347 11:18:48.335194 CPU: AES supported, TXT NOT supported, VT supported
348 11:18:48.342120 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
349 11:18:48.345209 PCH: device id 0284 (rev 00) is Cometlake-U Premium
350 11:18:48.348619
351 11:18:48.351865 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
352 11:18:48.355303 VBOOT: Loading verstage.
353 11:18:48.358595 FMAP: Found "FLASH" version 1.1 at 0xc04000.
354 11:18:48.361600
355 11:18:48.365110 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
356 11:18:48.371991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
357 11:18:48.372072 CBFS @ c08000 size 3f8000
358 11:18:48.378438 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
359 11:18:48.381719 CBFS: Locating 'fallback/verstage'
360 11:18:48.384923 CBFS: Found @ offset 10fb80 size 1072c
361 11:18:48.389454
362 11:18:48.389537
363 11:18:48.399292 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
364 11:18:48.413441 Probing TPM: . done!
365 11:18:48.417314 TPM ready after 0 ms
366 11:18:48.420069 Connected to device vid:did:rid of 1ae0:0028:00
367 11:18:48.430538 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
368 11:18:48.434250 Initialized TPM device CR50 revision 0
369 11:18:48.474868 tlcl_send_startup: Startup return code is 0
370 11:18:48.474977 TPM: setup succeeded
371 11:18:48.487683 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
372 11:18:48.491342 Chrome EC: UHEPI supported
373 11:18:48.494595 Phase 1
374 11:18:48.497872 FMAP: area GBB found @ c05000 (12288 bytes)
375 11:18:48.504671 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
376 11:18:48.511161 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
377 11:18:48.514594 Recovery requested (1009000e)
378 11:18:48.520169 Saving nvdata
379 11:18:48.526304 tlcl_extend: response is 0
380 11:18:48.535535 tlcl_extend: response is 0
381 11:18:48.542261 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 11:18:48.545378 CBFS @ c08000 size 3f8000
383 11:18:48.551917 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 11:18:48.555099 CBFS: Locating 'fallback/romstage'
385 11:18:48.558664 CBFS: Found @ offset 80 size 145fc
386 11:18:48.562112 Accumulated console time in verstage 98 ms
387 11:18:48.562200
388 11:18:48.562293
389 11:18:48.565224
390 11:18:48.574997 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
391 11:18:48.581585 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
392 11:18:48.585196 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
393 11:18:48.588185 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
394 11:18:48.594696 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
395 11:18:48.598541 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
396 11:18:48.601372 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
397 11:18:48.605125 TCO_STS: 0000 0000
398 11:18:48.608189 GEN_PMCON: e0015238 00000200
399 11:18:48.611257 GBLRST_CAUSE: 00000000 00000000
400 11:18:48.611346 prev_sleep_state 5
401 11:18:48.614565
402 11:18:48.617628 Boot Count incremented to 39063
403 11:18:48.621438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
404 11:18:48.624509 CBFS @ c08000 size 3f8000
405 11:18:48.630844 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
406 11:18:48.634095 CBFS: Locating 'fspm.bin'
407 11:18:48.637217 CBFS: Found @ offset 5ffc0 size 71000
408 11:18:48.640529 Chrome EC: UHEPI supported
409 11:18:48.647309 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
410 11:18:48.651893 Probing TPM: done!
411 11:18:48.658483 Connected to device vid:did:rid of 1ae0:0028:00
412 11:18:48.668428 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
413 11:18:48.674128 Initialized TPM device CR50 revision 0
414 11:18:48.683374 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 11:18:48.690072 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
416 11:18:48.693133
417 11:18:48.693273 MRC cache found, size 1948
418 11:18:48.696872 bootmode is set to: 2
419 11:18:48.699806 PRMRR disabled by config.
420 11:18:48.703462 SPD INDEX = 1
421 11:18:48.706149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
422 11:18:48.709577 CBFS @ c08000 size 3f8000
423 11:18:48.716676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
424 11:18:48.716777 CBFS: Locating 'spd.bin'
425 11:18:48.719800 CBFS: Found @ offset 5fb80 size 400
426 11:18:48.722926 SPD: module type is LPDDR3
427 11:18:48.726138 SPD: module part is
428 11:18:48.732739 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
429 11:18:48.736184 SPD: device width 4 bits, bus width 8 bits
430 11:18:48.739382 SPD: module size is 4096 MB (per channel)
431 11:18:48.742602 memory slot: 0 configuration done.
432 11:18:48.746360 memory slot: 2 configuration done.
433 11:18:48.798045 CBMEM:
434 11:18:48.801318 IMD: root @ 99fff000 254 entries.
435 11:18:48.804148 IMD: root @ 99ffec00 62 entries.
436 11:18:48.807862 External stage cache:
437 11:18:48.811070 IMD: root @ 9abff000 254 entries.
438 11:18:48.814616 IMD: root @ 9abfec00 62 entries.
439 11:18:48.820981 Chrome EC: clear events_b mask to 0x0000000020004000
440 11:18:48.833483 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
441 11:18:48.846762 tlcl_write: response is 0
442 11:18:48.855534 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
443 11:18:48.861985 MRC: TPM MRC hash updated successfully.
444 11:18:48.862095 2 DIMMs found
445 11:18:48.865662 SMM Memory Map
446 11:18:48.868638 SMRAM : 0x9a000000 0x1000000
447 11:18:48.871835 Subregion 0: 0x9a000000 0xa00000
448 11:18:48.875345 Subregion 1: 0x9aa00000 0x200000
449 11:18:48.878632 Subregion 2: 0x9ac00000 0x400000
450 11:18:48.882200 top_of_ram = 0x9a000000
451 11:18:48.885290 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
452 11:18:48.891609 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
453 11:18:48.895160 MTRR Range: Start=ff000000 End=0 (Size 1000000)
454 11:18:48.901650 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
455 11:18:48.904552 CBFS @ c08000 size 3f8000
456 11:18:48.911196 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
457 11:18:48.914480 CBFS: Locating 'fallback/postcar'
458 11:18:48.918188 CBFS: Found @ offset 107000 size 4b44
459 11:18:48.924428 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
460 11:18:48.934286 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
461 11:18:48.937816 Processing 180 relocs. Offset value of 0x97c0c000
462 11:18:48.945941 Accumulated console time in romstage 286 ms
463 11:18:48.946043
464 11:18:48.946112
465 11:18:48.955443 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
466 11:18:48.962201 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
467 11:18:48.965695 CBFS @ c08000 size 3f8000
468 11:18:48.968784 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
469 11:18:48.972652
470 11:18:48.975796 CBFS: Locating 'fallback/ramstage'
471 11:18:48.979008 CBFS: Found @ offset 43380 size 1b9e8
472 11:18:48.985111 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 11:18:49.017141 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 11:18:49.020881 Processing 3976 relocs. Offset value of 0x98db0000
475 11:18:49.023767
476 11:18:49.027222 Accumulated console time in postcar 52 ms
477 11:18:49.027315
478 11:18:49.027422
479 11:18:49.037022 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
480 11:18:49.043721 FMAP: area RO_VPD found @ c00000 (16384 bytes)
481 11:18:49.046998 WARNING: RO_VPD is uninitialized or empty.
482 11:18:49.050092 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 11:18:49.056763 FMAP: area RW_VPD found @ af8000 (8192 bytes)
484 11:18:49.056844 Normal boot.
485 11:18:49.063663 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
486 11:18:49.066741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
487 11:18:49.070055 CBFS @ c08000 size 3f8000
488 11:18:49.076532 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
489 11:18:49.080433 CBFS: Locating 'cpu_microcode_blob.bin'
490 11:18:49.083007 CBFS: Found @ offset 14700 size 2ec00
491 11:18:49.086810 microcode: sig=0x806ec pf=0x4 revision=0xc9
492 11:18:49.089669 Skip microcode update
493 11:18:49.096521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
494 11:18:49.096597 CBFS @ c08000 size 3f8000
495 11:18:49.099782
496 11:18:49.102732 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
497 11:18:49.106479 CBFS: Locating 'fsps.bin'
498 11:18:49.109218 CBFS: Found @ offset d1fc0 size 35000
499 11:18:49.136037 Detected 4 core, 8 thread CPU.
500 11:18:49.138917 Setting up SMI for CPU
501 11:18:49.142300 IED base = 0x9ac00000
502 11:18:49.142380 IED size = 0x00400000
503 11:18:49.145363 Will perform SMM setup.
504 11:18:49.151898 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
505 11:18:49.158473 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
506 11:18:49.162310 Processing 16 relocs. Offset value of 0x00030000
507 11:18:49.165136
508 11:18:49.165217 Attempting to start 7 APs
509 11:18:49.171661 Waiting for 10ms after sending INIT.
510 11:18:49.185390 Waiting for 1st SIPI to complete...done.
511 11:18:49.185475 AP: slot 2 apic_id 1.
512 11:18:49.191720 Waiting for 2nd SIPI to complete...done.
513 11:18:49.191810 AP: slot 6 apic_id 6.
514 11:18:49.195445 AP: slot 7 apic_id 7.
515 11:18:49.198859 AP: slot 5 apic_id 2.
516 11:18:49.198944 AP: slot 3 apic_id 3.
517 11:18:49.201551 AP: slot 1 apic_id 5.
518 11:18:49.204977 AP: slot 4 apic_id 4.
519 11:18:49.211580 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
520 11:18:49.218148 Processing 13 relocs. Offset value of 0x00038000
521 11:18:49.224812 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
522 11:18:49.227656 Installing SMM handler to 0x9a000000
523 11:18:49.234592 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
524 11:18:49.241036 Processing 658 relocs. Offset value of 0x9a010000
525 11:18:49.247529 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
526 11:18:49.250837 Processing 13 relocs. Offset value of 0x9a008000
527 11:18:49.254493
528 11:18:49.257517 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
529 11:18:49.264048 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
530 11:18:49.270444 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
531 11:18:49.273916 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
532 11:18:49.280624 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
533 11:18:49.286932 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
534 11:18:49.293752 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
535 11:18:49.300230 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
536 11:18:49.303718 Clearing SMI status registers
537 11:18:49.303800 SMI_STS: PM1
538 11:18:49.306670 PM1_STS: PWRBTN
539 11:18:49.306753 TCO_STS: SECOND_TO
540 11:18:49.310291 New SMBASE 0x9a000000
541 11:18:49.313303 In relocation handler: CPU 0
542 11:18:49.316412 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
543 11:18:49.323565 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 11:18:49.323659 Relocation complete.
545 11:18:49.326536 New SMBASE 0x99fff800
546 11:18:49.329833 In relocation handler: CPU 2
547 11:18:49.332926 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
548 11:18:49.339703 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 11:18:49.339807 Relocation complete.
550 11:18:49.342915 New SMBASE 0x99fff400
551 11:18:49.346418 In relocation handler: CPU 3
552 11:18:49.349399 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
553 11:18:49.355874 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 11:18:49.355976 Relocation complete.
555 11:18:49.359712 New SMBASE 0x99ffec00
556 11:18:49.363023 In relocation handler: CPU 5
557 11:18:49.365947 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
558 11:18:49.372332 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 11:18:49.372442 Relocation complete.
560 11:18:49.376070 New SMBASE 0x99fffc00
561 11:18:49.379301 In relocation handler: CPU 1
562 11:18:49.382545 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
563 11:18:49.388874 Writing SMRR. base = 0x9a000006, mask=0xff000800
564 11:18:49.388959 Relocation complete.
565 11:18:49.392058 New SMBASE 0x99fff000
566 11:18:49.395748 In relocation handler: CPU 4
567 11:18:49.398401 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
568 11:18:49.405152 Writing SMRR. base = 0x9a000006, mask=0xff000800
569 11:18:49.405237 Relocation complete.
570 11:18:49.408272 New SMBASE 0x99ffe800
571 11:18:49.411611 In relocation handler: CPU 6
572 11:18:49.415144 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
573 11:18:49.421599 Writing SMRR. base = 0x9a000006, mask=0xff000800
574 11:18:49.421711 Relocation complete.
575 11:18:49.424779 New SMBASE 0x99ffe400
576 11:18:49.428171 In relocation handler: CPU 7
577 11:18:49.431544 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
578 11:18:49.437919 Writing SMRR. base = 0x9a000006, mask=0xff000800
579 11:18:49.438034 Relocation complete.
580 11:18:49.441319 Initializing CPU #0
581 11:18:49.444691 CPU: vendor Intel device 806ec
582 11:18:49.447614 CPU: family 06, model 8e, stepping 0c
583 11:18:49.450991 Clearing out pending MCEs
584 11:18:49.454015 Setting up local APIC...
585 11:18:49.454154 apic_id: 0x00 done.
586 11:18:49.457774 Turbo is available but hidden
587 11:18:49.460782 Turbo is available and visible
588 11:18:49.464472 VMX status: enabled
589 11:18:49.467662 IA32_FEATURE_CONTROL status: locked
590 11:18:49.471127 Skip microcode update
591 11:18:49.471231 CPU #0 initialized
592 11:18:49.473859 Initializing CPU #2
593 11:18:49.474003 Initializing CPU #4
594 11:18:49.477471 Initializing CPU #1
595 11:18:49.480996 Initializing CPU #6
596 11:18:49.481115 Initializing CPU #7
597 11:18:49.483992 CPU: vendor Intel device 806ec
598 11:18:49.487107 CPU: family 06, model 8e, stepping 0c
599 11:18:49.490745 CPU: vendor Intel device 806ec
600 11:18:49.494022 CPU: family 06, model 8e, stepping 0c
601 11:18:49.497682
602 11:18:49.497784 Clearing out pending MCEs
603 11:18:49.500583 Clearing out pending MCEs
604 11:18:49.503659 CPU: vendor Intel device 806ec
605 11:18:49.507210 CPU: family 06, model 8e, stepping 0c
606 11:18:49.510268 CPU: vendor Intel device 806ec
607 11:18:49.513776 CPU: family 06, model 8e, stepping 0c
608 11:18:49.516893 Clearing out pending MCEs
609 11:18:49.520533 Clearing out pending MCEs
610 11:18:49.523553 CPU: vendor Intel device 806ec
611 11:18:49.526702 CPU: family 06, model 8e, stepping 0c
612 11:18:49.530287 Clearing out pending MCEs
613 11:18:49.530393 Initializing CPU #3
614 11:18:49.533703 Initializing CPU #5
615 11:18:49.536685 Setting up local APIC...
616 11:18:49.540199 CPU: vendor Intel device 806ec
617 11:18:49.543616 CPU: family 06, model 8e, stepping 0c
618 11:18:49.546725 CPU: vendor Intel device 806ec
619 11:18:49.550090 CPU: family 06, model 8e, stepping 0c
620 11:18:49.553558 Clearing out pending MCEs
621 11:18:49.553663 Clearing out pending MCEs
622 11:18:49.556567
623 11:18:49.556677 Setting up local APIC...
624 11:18:49.560344 Setting up local APIC...
625 11:18:49.563238 Setting up local APIC...
626 11:18:49.563349 apic_id: 0x04 done.
627 11:18:49.566703 Setting up local APIC...
628 11:18:49.570452 apic_id: 0x06 done.
629 11:18:49.573268 Setting up local APIC...
630 11:18:49.573380 apic_id: 0x01 done.
631 11:18:49.576381 apic_id: 0x07 done.
632 11:18:49.579940 VMX status: enabled
633 11:18:49.580048 VMX status: enabled
634 11:18:49.583076 IA32_FEATURE_CONTROL status: locked
635 11:18:49.586191 IA32_FEATURE_CONTROL status: locked
636 11:18:49.589752 Skip microcode update
637 11:18:49.592810 apic_id: 0x05 done.
638 11:18:49.592909 VMX status: enabled
639 11:18:49.596270 VMX status: enabled
640 11:18:49.599848 IA32_FEATURE_CONTROL status: locked
641 11:18:49.602560 IA32_FEATURE_CONTROL status: locked
642 11:18:49.606157 Skip microcode update
643 11:18:49.606285 Skip microcode update
644 11:18:49.609646 CPU #4 initialized
645 11:18:49.612576 CPU #1 initialized
646 11:18:49.612686 VMX status: enabled
647 11:18:49.616206 Setting up local APIC...
648 11:18:49.619173 IA32_FEATURE_CONTROL status: locked
649 11:18:49.623013 Skip microcode update
650 11:18:49.623125 CPU #6 initialized
651 11:18:49.626385 CPU #7 initialized
652 11:18:49.629047 apic_id: 0x03 done.
653 11:18:49.629156 apic_id: 0x02 done.
654 11:18:49.632282 VMX status: enabled
655 11:18:49.635532 VMX status: enabled
656 11:18:49.639197 IA32_FEATURE_CONTROL status: locked
657 11:18:49.642196 IA32_FEATURE_CONTROL status: locked
658 11:18:49.642341 Skip microcode update
659 11:18:49.645539 Skip microcode update
660 11:18:49.648934 CPU #3 initialized
661 11:18:49.649056 CPU #5 initialized
662 11:18:49.652221 Skip microcode update
663 11:18:49.655748 CPU #2 initialized
664 11:18:49.658991 bsp_do_flight_plan done after 466 msecs.
665 11:18:49.662369 CPU: frequency set to 4200 MHz
666 11:18:49.662476 Enabling SMIs.
667 11:18:49.665512 Locking SMM.
668 11:18:49.679608 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
669 11:18:49.682456 CBFS @ c08000 size 3f8000
670 11:18:49.689026 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
671 11:18:49.689114 CBFS: Locating 'vbt.bin'
672 11:18:49.692290 CBFS: Found @ offset 5f5c0 size 499
673 11:18:49.695635
674 11:18:49.698946 Found a VBT of 4608 bytes after decompression
675 11:18:49.881944 Display FSP Version Info HOB
676 11:18:49.885565 Reference Code - CPU = 9.0.1e.30
677 11:18:49.888540 uCode Version = 0.0.0.ca
678 11:18:49.892041 TXT ACM version = ff.ff.ff.ffff
679 11:18:49.895156 Display FSP Version Info HOB
680 11:18:49.898334 Reference Code - ME = 9.0.1e.30
681 11:18:49.901668 MEBx version = 0.0.0.0
682 11:18:49.904684 ME Firmware Version = Consumer SKU
683 11:18:49.907968 Display FSP Version Info HOB
684 11:18:49.911391 Reference Code - CML PCH = 9.0.1e.30
685 11:18:49.914756 PCH-CRID Status = Disabled
686 11:18:49.917801 PCH-CRID Original Value = ff.ff.ff.ffff
687 11:18:49.921633 PCH-CRID New Value = ff.ff.ff.ffff
688 11:18:49.924589 OPROM - RST - RAID = ff.ff.ff.ffff
689 11:18:49.928111 ChipsetInit Base Version = ff.ff.ff.ffff
690 11:18:49.934590 ChipsetInit Oem Version = ff.ff.ff.ffff
691 11:18:49.934679 Display FSP Version Info HOB
692 11:18:49.940982 Reference Code - SA - System Agent = 9.0.1e.30
693 11:18:49.944427 Reference Code - MRC = 0.7.1.6c
694 11:18:49.947549 SA - PCIe Version = 9.0.1e.30
695 11:18:49.950604 SA-CRID Status = Disabled
696 11:18:49.953978 SA-CRID Original Value = 0.0.0.c
697 11:18:49.954063 SA-CRID New Value = 0.0.0.c
698 11:18:49.957397 OPROM - VBIOS = ff.ff.ff.ffff
699 11:18:49.961159 RTC Init
700 11:18:49.964404 Set power on after power failure.
701 11:18:49.964486 Disabling Deep S3
702 11:18:49.967770 Disabling Deep S3
703 11:18:49.970991 Disabling Deep S4
704 11:18:49.971077 Disabling Deep S4
705 11:18:49.974170 Disabling Deep S5
706 11:18:49.974264 Disabling Deep S5
707 11:18:49.980461 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
708 11:18:49.984224 Enumerating buses...
709 11:18:49.986963 Show all devs... Before device enumeration.
710 11:18:49.990514 Root Device: enabled 1
711 11:18:49.993405 CPU_CLUSTER: 0: enabled 1
712 11:18:49.993479 DOMAIN: 0000: enabled 1
713 11:18:49.997012 APIC: 00: enabled 1
714 11:18:50.000417 PCI: 00:00.0: enabled 1
715 11:18:50.000494 PCI: 00:02.0: enabled 1
716 11:18:50.003841 PCI: 00:04.0: enabled 0
717 11:18:50.007065 PCI: 00:05.0: enabled 0
718 11:18:50.010003 PCI: 00:12.0: enabled 1
719 11:18:50.010080 PCI: 00:12.5: enabled 0
720 11:18:50.013323 PCI: 00:12.6: enabled 0
721 11:18:50.016404 PCI: 00:14.0: enabled 1
722 11:18:50.019656 PCI: 00:14.1: enabled 0
723 11:18:50.019732 PCI: 00:14.3: enabled 1
724 11:18:50.023014 PCI: 00:14.5: enabled 0
725 11:18:50.026093 PCI: 00:15.0: enabled 1
726 11:18:50.029694 PCI: 00:15.1: enabled 1
727 11:18:50.029768 PCI: 00:15.2: enabled 0
728 11:18:50.033095 PCI: 00:15.3: enabled 0
729 11:18:50.035922 PCI: 00:16.0: enabled 1
730 11:18:50.039678 PCI: 00:16.1: enabled 0
731 11:18:50.039752 PCI: 00:16.2: enabled 0
732 11:18:50.042753 PCI: 00:16.3: enabled 0
733 11:18:50.046418 PCI: 00:16.4: enabled 0
734 11:18:50.049004 PCI: 00:16.5: enabled 0
735 11:18:50.049074 PCI: 00:17.0: enabled 1
736 11:18:50.052458 PCI: 00:19.0: enabled 1
737 11:18:50.055741 PCI: 00:19.1: enabled 0
738 11:18:50.058970 PCI: 00:19.2: enabled 0
739 11:18:50.059042 PCI: 00:1a.0: enabled 0
740 11:18:50.062422 PCI: 00:1c.0: enabled 0
741 11:18:50.065306 PCI: 00:1c.1: enabled 0
742 11:18:50.068510 PCI: 00:1c.2: enabled 0
743 11:18:50.068583 PCI: 00:1c.3: enabled 0
744 11:18:50.072043 PCI: 00:1c.4: enabled 0
745 11:18:50.075499 PCI: 00:1c.5: enabled 0
746 11:18:50.078737 PCI: 00:1c.6: enabled 0
747 11:18:50.078811 PCI: 00:1c.7: enabled 0
748 11:18:50.081781 PCI: 00:1d.0: enabled 1
749 11:18:50.085159 PCI: 00:1d.1: enabled 0
750 11:18:50.085234 PCI: 00:1d.2: enabled 0
751 11:18:50.088677
752 11:18:50.088749 PCI: 00:1d.3: enabled 0
753 11:18:50.091892 PCI: 00:1d.4: enabled 0
754 11:18:50.095054 PCI: 00:1d.5: enabled 1
755 11:18:50.095131 PCI: 00:1e.0: enabled 1
756 11:18:50.098355
757 11:18:50.098427 PCI: 00:1e.1: enabled 0
758 11:18:50.101290 PCI: 00:1e.2: enabled 1
759 11:18:50.104840 PCI: 00:1e.3: enabled 1
760 11:18:50.104915 PCI: 00:1f.0: enabled 1
761 11:18:50.107845 PCI: 00:1f.1: enabled 1
762 11:18:50.111624 PCI: 00:1f.2: enabled 1
763 11:18:50.114660 PCI: 00:1f.3: enabled 1
764 11:18:50.114741 PCI: 00:1f.4: enabled 1
765 11:18:50.117909 PCI: 00:1f.5: enabled 1
766 11:18:50.120785 PCI: 00:1f.6: enabled 0
767 11:18:50.124386 USB0 port 0: enabled 1
768 11:18:50.124461 I2C: 00:15: enabled 1
769 11:18:50.127243 I2C: 00:5d: enabled 1
770 11:18:50.130932 GENERIC: 0.0: enabled 1
771 11:18:50.131011 I2C: 00:1a: enabled 1
772 11:18:50.134178
773 11:18:50.134271 I2C: 00:38: enabled 1
774 11:18:50.137130 I2C: 00:39: enabled 1
775 11:18:50.140998 I2C: 00:3a: enabled 1
776 11:18:50.141070 I2C: 00:3b: enabled 1
777 11:18:50.143739 PCI: 00:00.0: enabled 1
778 11:18:50.147222 SPI: 00: enabled 1
779 11:18:50.147296 SPI: 01: enabled 1
780 11:18:50.150274 PNP: 0c09.0: enabled 1
781 11:18:50.153793 USB2 port 0: enabled 1
782 11:18:50.153861 USB2 port 1: enabled 1
783 11:18:50.156892 USB2 port 2: enabled 0
784 11:18:50.160039 USB2 port 3: enabled 0
785 11:18:50.160112 USB2 port 5: enabled 0
786 11:18:50.163438 USB2 port 6: enabled 1
787 11:18:50.166601 USB2 port 9: enabled 1
788 11:18:50.169837 USB3 port 0: enabled 1
789 11:18:50.169920 USB3 port 1: enabled 1
790 11:18:50.173366 USB3 port 2: enabled 1
791 11:18:50.176252 USB3 port 3: enabled 1
792 11:18:50.176330 USB3 port 4: enabled 0
793 11:18:50.179889
794 11:18:50.179967 APIC: 05: enabled 1
795 11:18:50.182783 APIC: 01: enabled 1
796 11:18:50.182857 APIC: 03: enabled 1
797 11:18:50.186276 APIC: 04: enabled 1
798 11:18:50.189569 APIC: 02: enabled 1
799 11:18:50.189648 APIC: 06: enabled 1
800 11:18:50.192555 APIC: 07: enabled 1
801 11:18:50.196097 Compare with tree...
802 11:18:50.196184 Root Device: enabled 1
803 11:18:50.199024 CPU_CLUSTER: 0: enabled 1
804 11:18:50.202992 APIC: 00: enabled 1
805 11:18:50.203077 APIC: 05: enabled 1
806 11:18:50.205907 APIC: 01: enabled 1
807 11:18:50.208982 APIC: 03: enabled 1
808 11:18:50.212576 APIC: 04: enabled 1
809 11:18:50.212662 APIC: 02: enabled 1
810 11:18:50.215624 APIC: 06: enabled 1
811 11:18:50.218966 APIC: 07: enabled 1
812 11:18:50.219052 DOMAIN: 0000: enabled 1
813 11:18:50.221989 PCI: 00:00.0: enabled 1
814 11:18:50.224985 PCI: 00:02.0: enabled 1
815 11:18:50.228264 PCI: 00:04.0: enabled 0
816 11:18:50.231908 PCI: 00:05.0: enabled 0
817 11:18:50.232008 PCI: 00:12.0: enabled 1
818 11:18:50.234753 PCI: 00:12.5: enabled 0
819 11:18:50.238371 PCI: 00:12.6: enabled 0
820 11:18:50.241347 PCI: 00:14.0: enabled 1
821 11:18:50.245102 USB0 port 0: enabled 1
822 11:18:50.245188 USB2 port 0: enabled 1
823 11:18:50.247914 USB2 port 1: enabled 1
824 11:18:50.251477 USB2 port 2: enabled 0
825 11:18:50.254776 USB2 port 3: enabled 0
826 11:18:50.257841 USB2 port 5: enabled 0
827 11:18:50.261236 USB2 port 6: enabled 1
828 11:18:50.261322 USB2 port 9: enabled 1
829 11:18:50.264195 USB3 port 0: enabled 1
830 11:18:50.267734 USB3 port 1: enabled 1
831 11:18:50.270896 USB3 port 2: enabled 1
832 11:18:50.274152 USB3 port 3: enabled 1
833 11:18:50.277787 USB3 port 4: enabled 0
834 11:18:50.277874 PCI: 00:14.1: enabled 0
835 11:18:50.280499 PCI: 00:14.3: enabled 1
836 11:18:50.283871 PCI: 00:14.5: enabled 0
837 11:18:50.287415 PCI: 00:15.0: enabled 1
838 11:18:50.290472 I2C: 00:15: enabled 1
839 11:18:50.290557 PCI: 00:15.1: enabled 1
840 11:18:50.293888 I2C: 00:5d: enabled 1
841 11:18:50.297052 GENERIC: 0.0: enabled 1
842 11:18:50.300360 PCI: 00:15.2: enabled 0
843 11:18:50.303427 PCI: 00:15.3: enabled 0
844 11:18:50.303512 PCI: 00:16.0: enabled 1
845 11:18:50.306959 PCI: 00:16.1: enabled 0
846 11:18:50.310346 PCI: 00:16.2: enabled 0
847 11:18:50.313101 PCI: 00:16.3: enabled 0
848 11:18:50.316586 PCI: 00:16.4: enabled 0
849 11:18:50.319589 PCI: 00:16.5: enabled 0
850 11:18:50.319674 PCI: 00:17.0: enabled 1
851 11:18:50.323349 PCI: 00:19.0: enabled 1
852 11:18:50.326421 I2C: 00:1a: enabled 1
853 11:18:50.329505 I2C: 00:38: enabled 1
854 11:18:50.329590 I2C: 00:39: enabled 1
855 11:18:50.332603 I2C: 00:3a: enabled 1
856 11:18:50.336142 I2C: 00:3b: enabled 1
857 11:18:50.339291 PCI: 00:19.1: enabled 0
858 11:18:50.342612 PCI: 00:19.2: enabled 0
859 11:18:50.342691 PCI: 00:1a.0: enabled 0
860 11:18:50.345759 PCI: 00:1c.0: enabled 0
861 11:18:50.349216 PCI: 00:1c.1: enabled 0
862 11:18:50.352128 PCI: 00:1c.2: enabled 0
863 11:18:50.355658 PCI: 00:1c.3: enabled 0
864 11:18:50.355734 PCI: 00:1c.4: enabled 0
865 11:18:50.358724
866 11:18:50.358800 PCI: 00:1c.5: enabled 0
867 11:18:50.362513 PCI: 00:1c.6: enabled 0
868 11:18:50.365534 PCI: 00:1c.7: enabled 0
869 11:18:50.368556 PCI: 00:1d.0: enabled 1
870 11:18:50.368641 PCI: 00:1d.1: enabled 0
871 11:18:50.372140
872 11:18:50.372214 PCI: 00:1d.2: enabled 0
873 11:18:50.375537 PCI: 00:1d.3: enabled 0
874 11:18:50.378369 PCI: 00:1d.4: enabled 0
875 11:18:50.381928 PCI: 00:1d.5: enabled 1
876 11:18:50.382003 PCI: 00:00.0: enabled 1
877 11:18:50.384966
878 11:18:50.385038 PCI: 00:1e.0: enabled 1
879 11:18:50.388195 PCI: 00:1e.1: enabled 0
880 11:18:50.391383 PCI: 00:1e.2: enabled 1
881 11:18:50.394991 SPI: 00: enabled 1
882 11:18:50.395066 PCI: 00:1e.3: enabled 1
883 11:18:50.397934 SPI: 01: enabled 1
884 11:18:50.401176 PCI: 00:1f.0: enabled 1
885 11:18:50.404696 PNP: 0c09.0: enabled 1
886 11:18:50.408015 PCI: 00:1f.1: enabled 1
887 11:18:50.408090 PCI: 00:1f.2: enabled 1
888 11:18:50.410870 PCI: 00:1f.3: enabled 1
889 11:18:50.414201 PCI: 00:1f.4: enabled 1
890 11:18:50.417745 PCI: 00:1f.5: enabled 1
891 11:18:50.420761 PCI: 00:1f.6: enabled 0
892 11:18:50.420852 Root Device scanning...
893 11:18:50.424147 scan_static_bus for Root Device
894 11:18:50.427706 CPU_CLUSTER: 0 enabled
895 11:18:50.430661 DOMAIN: 0000 enabled
896 11:18:50.433838 DOMAIN: 0000 scanning...
897 11:18:50.437618 PCI: pci_scan_bus for bus 00
898 11:18:50.437693 PCI: 00:00.0 [8086/0000] ops
899 11:18:50.440326 PCI: 00:00.0 [8086/9b61] enabled
900 11:18:50.443818
901 11:18:50.443907 PCI: 00:02.0 [8086/0000] bus ops
902 11:18:50.446998
903 11:18:50.447072 PCI: 00:02.0 [8086/9b41] enabled
904 11:18:50.450053
905 11:18:50.453567 PCI: 00:04.0 [8086/1903] disabled
906 11:18:50.456953 PCI: 00:08.0 [8086/1911] enabled
907 11:18:50.460137 PCI: 00:12.0 [8086/02f9] enabled
908 11:18:50.463262 PCI: 00:14.0 [8086/0000] bus ops
909 11:18:50.466609 PCI: 00:14.0 [8086/02ed] enabled
910 11:18:50.469762 PCI: 00:14.2 [8086/02ef] enabled
911 11:18:50.472970 PCI: 00:14.3 [8086/02f0] enabled
912 11:18:50.476381 PCI: 00:15.0 [8086/0000] bus ops
913 11:18:50.479491 PCI: 00:15.0 [8086/02e8] enabled
914 11:18:50.482820 PCI: 00:15.1 [8086/0000] bus ops
915 11:18:50.486342 PCI: 00:15.1 [8086/02e9] enabled
916 11:18:50.489328 PCI: 00:16.0 [8086/0000] ops
917 11:18:50.492491 PCI: 00:16.0 [8086/02e0] enabled
918 11:18:50.496252 PCI: 00:17.0 [8086/0000] ops
919 11:18:50.499678 PCI: 00:17.0 [8086/02d3] enabled
920 11:18:50.502392 PCI: 00:19.0 [8086/0000] bus ops
921 11:18:50.505766 PCI: 00:19.0 [8086/02c5] enabled
922 11:18:50.509273 PCI: 00:1d.0 [8086/0000] bus ops
923 11:18:50.511973 PCI: 00:1d.0 [8086/02b0] enabled
924 11:18:50.515458 PCI: Static device PCI: 00:1d.5 not found, disabling it.
925 11:18:50.518568 PCI: 00:1e.0 [8086/0000] ops
926 11:18:50.521819 PCI: 00:1e.0 [8086/02a8] enabled
927 11:18:50.525285 PCI: 00:1e.2 [8086/0000] bus ops
928 11:18:50.528436 PCI: 00:1e.2 [8086/02aa] enabled
929 11:18:50.531824 PCI: 00:1e.3 [8086/0000] bus ops
930 11:18:50.534897 PCI: 00:1e.3 [8086/02ab] enabled
931 11:18:50.538475 PCI: 00:1f.0 [8086/0000] bus ops
932 11:18:50.542078 PCI: 00:1f.0 [8086/0284] enabled
933 11:18:50.548488 PCI: Static device PCI: 00:1f.1 not found, disabling it.
934 11:18:50.554492 PCI: Static device PCI: 00:1f.2 not found, disabling it.
935 11:18:50.557631 PCI: 00:1f.3 [8086/0000] bus ops
936 11:18:50.560997 PCI: 00:1f.3 [8086/02c8] enabled
937 11:18:50.564604 PCI: 00:1f.4 [8086/0000] bus ops
938 11:18:50.568088 PCI: 00:1f.4 [8086/02a3] enabled
939 11:18:50.571136 PCI: 00:1f.5 [8086/0000] bus ops
940 11:18:50.574022 PCI: 00:1f.5 [8086/02a4] enabled
941 11:18:50.577551 PCI: Leftover static devices:
942 11:18:50.577635 PCI: 00:05.0
943 11:18:50.580706 PCI: 00:12.5
944 11:18:50.580781 PCI: 00:12.6
945 11:18:50.584151 PCI: 00:14.1
946 11:18:50.584236 PCI: 00:14.5
947 11:18:50.584301 PCI: 00:15.2
948 11:18:50.587271 PCI: 00:15.3
949 11:18:50.587359 PCI: 00:16.1
950 11:18:50.590734 PCI: 00:16.2
951 11:18:50.590819 PCI: 00:16.3
952 11:18:50.593863 PCI: 00:16.4
953 11:18:50.593961 PCI: 00:16.5
954 11:18:50.594027 PCI: 00:19.1
955 11:18:50.596959 PCI: 00:19.2
956 11:18:50.597044 PCI: 00:1a.0
957 11:18:50.600065 PCI: 00:1c.0
958 11:18:50.600150 PCI: 00:1c.1
959 11:18:50.600219 PCI: 00:1c.2
960 11:18:50.603707 PCI: 00:1c.3
961 11:18:50.603791 PCI: 00:1c.4
962 11:18:50.606818 PCI: 00:1c.5
963 11:18:50.606902 PCI: 00:1c.6
964 11:18:50.610638 PCI: 00:1c.7
965 11:18:50.610723 PCI: 00:1d.1
966 11:18:50.610788 PCI: 00:1d.2
967 11:18:50.613903 PCI: 00:1d.3
968 11:18:50.613989 PCI: 00:1d.4
969 11:18:50.617056 PCI: 00:1d.5
970 11:18:50.617140 PCI: 00:1e.1
971 11:18:50.617205 PCI: 00:1f.1
972 11:18:50.620354 PCI: 00:1f.2
973 11:18:50.620440 PCI: 00:1f.6
974 11:18:50.623469 PCI: Check your devicetree.cb.
975 11:18:50.626337 PCI: 00:02.0 scanning...
976 11:18:50.629762 scan_generic_bus for PCI: 00:02.0
977 11:18:50.633053 scan_generic_bus for PCI: 00:02.0 done
978 11:18:50.639466 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
979 11:18:50.642931 PCI: 00:14.0 scanning...
980 11:18:50.645996 scan_static_bus for PCI: 00:14.0
981 11:18:50.649574 USB0 port 0 enabled
982 11:18:50.649659 USB0 port 0 scanning...
983 11:18:50.652596 scan_static_bus for USB0 port 0
984 11:18:50.656307 USB2 port 0 enabled
985 11:18:50.659212 USB2 port 1 enabled
986 11:18:50.659311 USB2 port 2 disabled
987 11:18:50.662445 USB2 port 3 disabled
988 11:18:50.665907 USB2 port 5 disabled
989 11:18:50.665991 USB2 port 6 enabled
990 11:18:50.669314 USB2 port 9 enabled
991 11:18:50.669398 USB3 port 0 enabled
992 11:18:50.672210 USB3 port 1 enabled
993 11:18:50.675591 USB3 port 2 enabled
994 11:18:50.675675 USB3 port 3 enabled
995 11:18:50.678742 USB3 port 4 disabled
996 11:18:50.682558 USB2 port 0 scanning...
997 11:18:50.685543 scan_static_bus for USB2 port 0
998 11:18:50.688475 scan_static_bus for USB2 port 0 done
999 11:18:50.695189 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
1000 11:18:50.695275 USB2 port 1 scanning...
1001 11:18:50.698421 scan_static_bus for USB2 port 1
1002 11:18:50.705263 scan_static_bus for USB2 port 1 done
1003 11:18:50.708053 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
1004 11:18:50.711610 USB2 port 6 scanning...
1005 11:18:50.714672 scan_static_bus for USB2 port 6
1006 11:18:50.717769 scan_static_bus for USB2 port 6 done
1007 11:18:50.724687 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
1008 11:18:50.728187 USB2 port 9 scanning...
1009 11:18:50.731285 scan_static_bus for USB2 port 9
1010 11:18:50.734017 scan_static_bus for USB2 port 9 done
1011 11:18:50.737820 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
1012 11:18:50.740715 USB3 port 0 scanning...
1013 11:18:50.744437 scan_static_bus for USB3 port 0
1014 11:18:50.747391 scan_static_bus for USB3 port 0 done
1015 11:18:50.753961 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
1016 11:18:50.757397 USB3 port 1 scanning...
1017 11:18:50.760612 scan_static_bus for USB3 port 1
1018 11:18:50.763972 scan_static_bus for USB3 port 1 done
1019 11:18:50.766983 scan_bus: scanning of bus USB3 port 1 took 9690 usecs
1020 11:18:50.770189
1021 11:18:50.770297 USB3 port 2 scanning...
1022 11:18:50.773921 scan_static_bus for USB3 port 2
1023 11:18:50.776888 scan_static_bus for USB3 port 2 done
1024 11:18:50.783579 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
1025 11:18:50.787293 USB3 port 3 scanning...
1026 11:18:50.790400 scan_static_bus for USB3 port 3
1027 11:18:50.793426 scan_static_bus for USB3 port 3 done
1028 11:18:50.800050 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
1029 11:18:50.803376 scan_static_bus for USB0 port 0 done
1030 11:18:50.806261 scan_bus: scanning of bus USB0 port 0 took 155317 usecs
1031 11:18:50.813309 scan_static_bus for PCI: 00:14.0 done
1032 11:18:50.815967 scan_bus: scanning of bus PCI: 00:14.0 took 172948 usecs
1033 11:18:50.819678 PCI: 00:15.0 scanning...
1034 11:18:50.822934 scan_generic_bus for PCI: 00:15.0
1035 11:18:50.829413 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1036 11:18:50.832372 scan_generic_bus for PCI: 00:15.0 done
1037 11:18:50.835886 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
1038 11:18:50.839109 PCI: 00:15.1 scanning...
1039 11:18:50.842360 scan_generic_bus for PCI: 00:15.1
1040 11:18:50.848762 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1041 11:18:50.851867 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1042 11:18:50.855399 scan_generic_bus for PCI: 00:15.1 done
1043 11:18:50.862010 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
1044 11:18:50.865152 PCI: 00:19.0 scanning...
1045 11:18:50.868560 scan_generic_bus for PCI: 00:19.0
1046 11:18:50.871574 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1047 11:18:50.874830 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1048 11:18:50.878452 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1049 11:18:50.884709 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1050 11:18:50.888271 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1051 11:18:50.891475 scan_generic_bus for PCI: 00:19.0 done
1052 11:18:50.897941 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1053 11:18:50.901397 PCI: 00:1d.0 scanning...
1054 11:18:50.904598 do_pci_scan_bridge for PCI: 00:1d.0
1055 11:18:50.907792 PCI: pci_scan_bus for bus 01
1056 11:18:50.911137 PCI: 01:00.0 [1c5c/1327] enabled
1057 11:18:50.914530 Enabling Common Clock Configuration
1058 11:18:50.917762 L1 Sub-State supported from root port 29
1059 11:18:50.921103 L1 Sub-State Support = 0xf
1060 11:18:50.924688 CommonModeRestoreTime = 0x28
1061 11:18:50.927257 Power On Value = 0x16, Power On Scale = 0x0
1062 11:18:50.930541 ASPM: Enabled L1
1063 11:18:50.933943 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1064 11:18:50.937253 PCI: 00:1e.2 scanning...
1065 11:18:50.940405 scan_generic_bus for PCI: 00:1e.2
1066 11:18:50.947004 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1067 11:18:50.950197 scan_generic_bus for PCI: 00:1e.2 done
1068 11:18:50.953879 scan_bus: scanning of bus PCI: 00:1e.2 took 13995 usecs
1069 11:18:50.956829 PCI: 00:1e.3 scanning...
1070 11:18:50.960337 scan_generic_bus for PCI: 00:1e.3
1071 11:18:50.963407 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1072 11:18:50.966464
1073 11:18:50.969869 scan_generic_bus for PCI: 00:1e.3 done
1074 11:18:50.973405 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1075 11:18:50.976590 PCI: 00:1f.0 scanning...
1076 11:18:50.979531 scan_static_bus for PCI: 00:1f.0
1077 11:18:50.983013 PNP: 0c09.0 enabled
1078 11:18:50.986104 scan_static_bus for PCI: 00:1f.0 done
1079 11:18:50.992743 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1080 11:18:50.996120 PCI: 00:1f.3 scanning...
1081 11:18:50.999340 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1082 11:18:51.002874 PCI: 00:1f.4 scanning...
1083 11:18:51.005870 scan_generic_bus for PCI: 00:1f.4
1084 11:18:51.008898 scan_generic_bus for PCI: 00:1f.4 done
1085 11:18:51.015485 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1086 11:18:51.018908 PCI: 00:1f.5 scanning...
1087 11:18:51.022197 scan_generic_bus for PCI: 00:1f.5
1088 11:18:51.025090 scan_generic_bus for PCI: 00:1f.5 done
1089 11:18:51.031761 scan_bus: scanning of bus PCI: 00:1f.5 took 10174 usecs
1090 11:18:51.038988 scan_bus: scanning of bus DOMAIN: 0000 took 604981 usecs
1091 11:18:51.042029 scan_static_bus for Root Device done
1092 11:18:51.044771 scan_bus: scanning of bus Root Device took 624844 usecs
1093 11:18:51.048436
1094 11:18:51.048516 done
1095 11:18:51.051310 Chrome EC: UHEPI supported
1096 11:18:51.057888 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1097 11:18:51.061559 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1098 11:18:51.067997 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1099 11:18:51.075447 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1100 11:18:51.078346 SPI flash protection: WPSW=0 SRP0=0
1101 11:18:51.085033 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1102 11:18:51.088083 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1103 11:18:51.091450 found VGA at PCI: 00:02.0
1104 11:18:51.094891 Setting up VGA for PCI: 00:02.0
1105 11:18:51.101285 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1106 11:18:51.104394 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1107 11:18:51.107751 Allocating resources...
1108 11:18:51.111138 Reading resources...
1109 11:18:51.114631 Root Device read_resources bus 0 link: 0
1110 11:18:51.117170 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1111 11:18:51.124407 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1112 11:18:51.127703 DOMAIN: 0000 read_resources bus 0 link: 0
1113 11:18:51.135194 PCI: 00:14.0 read_resources bus 0 link: 0
1114 11:18:51.138172 USB0 port 0 read_resources bus 0 link: 0
1115 11:18:51.146526 USB0 port 0 read_resources bus 0 link: 0 done
1116 11:18:51.149972 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 11:18:51.157196 PCI: 00:15.0 read_resources bus 1 link: 0
1118 11:18:51.160845 PCI: 00:15.0 read_resources bus 1 link: 0 done
1119 11:18:51.167224 PCI: 00:15.1 read_resources bus 2 link: 0
1120 11:18:51.170754 PCI: 00:15.1 read_resources bus 2 link: 0 done
1121 11:18:51.178247 PCI: 00:19.0 read_resources bus 3 link: 0
1122 11:18:51.184747 PCI: 00:19.0 read_resources bus 3 link: 0 done
1123 11:18:51.188052 PCI: 00:1d.0 read_resources bus 1 link: 0
1124 11:18:51.194639 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1125 11:18:51.198163 PCI: 00:1e.2 read_resources bus 4 link: 0
1126 11:18:51.204130 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1127 11:18:51.207288 PCI: 00:1e.3 read_resources bus 5 link: 0
1128 11:18:51.213956 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1129 11:18:51.217289 PCI: 00:1f.0 read_resources bus 0 link: 0
1130 11:18:51.224250 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1131 11:18:51.230567 DOMAIN: 0000 read_resources bus 0 link: 0 done
1132 11:18:51.233908 Root Device read_resources bus 0 link: 0 done
1133 11:18:51.237039 Done reading resources.
1134 11:18:51.243566 Show resources in subtree (Root Device)...After reading.
1135 11:18:51.246767 Root Device child on link 0 CPU_CLUSTER: 0
1136 11:18:51.249908 CPU_CLUSTER: 0 child on link 0 APIC: 00
1137 11:18:51.253262 APIC: 00
1138 11:18:51.253351 APIC: 05
1139 11:18:51.256899 APIC: 01
1140 11:18:51.256982 APIC: 03
1141 11:18:51.257048 APIC: 04
1142 11:18:51.260101 APIC: 02
1143 11:18:51.260185 APIC: 06
1144 11:18:51.260251 APIC: 07
1145 11:18:51.266435 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1146 11:18:51.319482 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1147 11:18:51.320344 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1148 11:18:51.320431 PCI: 00:00.0
1149 11:18:51.320748 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1150 11:18:51.321066 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1151 11:18:51.321336 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1152 11:18:51.345529 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1153 11:18:51.345836 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1154 11:18:51.345910 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1155 11:18:51.352529 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1156 11:18:51.362137 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1157 11:18:51.371922 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1158 11:18:51.378272 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1159 11:18:51.388134 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1160 11:18:51.398478 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1161 11:18:51.407848 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1162 11:18:51.418113 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1163 11:18:51.427653 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1164 11:18:51.437687 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1165 11:18:51.437776 PCI: 00:02.0
1166 11:18:51.447199 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1167 11:18:51.457305 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1168 11:18:51.466706 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1169 11:18:51.470216 PCI: 00:04.0
1170 11:18:51.470320 PCI: 00:08.0
1171 11:18:51.479630 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 11:18:51.482992 PCI: 00:12.0
1173 11:18:51.493448 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 11:18:51.496071 PCI: 00:14.0 child on link 0 USB0 port 0
1175 11:18:51.505935 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1176 11:18:51.509371 USB0 port 0 child on link 0 USB2 port 0
1177 11:18:51.512499 USB2 port 0
1178 11:18:51.512585 USB2 port 1
1179 11:18:51.515806 USB2 port 2
1180 11:18:51.515904 USB2 port 3
1181 11:18:51.519134 USB2 port 5
1182 11:18:51.522382 USB2 port 6
1183 11:18:51.522466 USB2 port 9
1184 11:18:51.525606 USB3 port 0
1185 11:18:51.525690 USB3 port 1
1186 11:18:51.528871 USB3 port 2
1187 11:18:51.528956 USB3 port 3
1188 11:18:51.532118 USB3 port 4
1189 11:18:51.532204 PCI: 00:14.2
1190 11:18:51.541952 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1191 11:18:51.551697 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 11:18:51.555213 PCI: 00:14.3
1193 11:18:51.564699 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 11:18:51.568205 PCI: 00:15.0 child on link 0 I2C: 01:15
1195 11:18:51.577872 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 11:18:51.581192 I2C: 01:15
1197 11:18:51.584560 PCI: 00:15.1 child on link 0 I2C: 02:5d
1198 11:18:51.593965 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 11:18:51.597336 I2C: 02:5d
1200 11:18:51.597423 GENERIC: 0.0
1201 11:18:51.600393 PCI: 00:16.0
1202 11:18:51.610714 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 11:18:51.610835 PCI: 00:17.0
1204 11:18:51.620383 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1205 11:18:51.629967 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1206 11:18:51.636956 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1207 11:18:51.646379 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1208 11:18:51.652994 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1209 11:18:51.662950 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1210 11:18:51.665812 PCI: 00:19.0 child on link 0 I2C: 03:1a
1211 11:18:51.676233 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 11:18:51.679058 I2C: 03:1a
1213 11:18:51.679148 I2C: 03:38
1214 11:18:51.682634 I2C: 03:39
1215 11:18:51.682720 I2C: 03:3a
1216 11:18:51.685662 I2C: 03:3b
1217 11:18:51.689303 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1218 11:18:51.698893 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1219 11:18:51.708587 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1220 11:18:51.718448 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1221 11:18:51.718558 PCI: 01:00.0
1222 11:18:51.727907 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 11:18:51.731525 PCI: 00:1e.0
1224 11:18:51.741315 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 11:18:51.751339 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1226 11:18:51.754149 PCI: 00:1e.2 child on link 0 SPI: 00
1227 11:18:51.764160 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 11:18:51.767326 SPI: 00
1229 11:18:51.770421 PCI: 00:1e.3 child on link 0 SPI: 01
1230 11:18:51.780259 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 11:18:51.780344 SPI: 01
1232 11:18:51.786623 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1233 11:18:51.793040 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1234 11:18:51.803070 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1235 11:18:51.806112 PNP: 0c09.0
1236 11:18:51.812653 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1237 11:18:51.816156 PCI: 00:1f.3
1238 11:18:51.825866 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 11:18:51.835403 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1240 11:18:51.838541 PCI: 00:1f.4
1241 11:18:51.845560 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1242 11:18:51.855285 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1243 11:18:51.858120 PCI: 00:1f.5
1244 11:18:51.868620 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1245 11:18:51.874849 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1246 11:18:51.881086 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1247 11:18:51.887948 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1248 11:18:51.890732 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1249 11:18:51.894314 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1250 11:18:51.897516 PCI: 00:17.0 18 * [0x60 - 0x67] io
1251 11:18:51.900882 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1252 11:18:51.907490 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1253 11:18:51.914000 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1254 11:18:51.923446 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1255 11:18:51.930087 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1256 11:18:51.937048 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1257 11:18:51.940215 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1258 11:18:51.949861 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1259 11:18:51.952900 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1260 11:18:51.959580 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1261 11:18:51.963039 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1262 11:18:51.969476 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1263 11:18:51.972510 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1264 11:18:51.979067 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1265 11:18:51.982121 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1266 11:18:51.988775 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1267 11:18:51.992291 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1268 11:18:51.998500 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1269 11:18:52.002134 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1270 11:18:52.008321 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1271 11:18:52.011961 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1272 11:18:52.017959 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1273 11:18:52.021658 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1274 11:18:52.027778 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1275 11:18:52.031548 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1276 11:18:52.038175 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1277 11:18:52.041204 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1278 11:18:52.047462 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1279 11:18:52.050760 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1280 11:18:52.053995 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1281 11:18:52.057746
1282 11:18:52.060695 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1283 11:18:52.070724 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1284 11:18:52.073952 avoid_fixed_resources: DOMAIN: 0000
1285 11:18:52.080567 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1286 11:18:52.083556 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1287 11:18:52.093561 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1288 11:18:52.099987 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1289 11:18:52.106263 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1290 11:18:52.116060 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1291 11:18:52.122845 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1292 11:18:52.129197 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1293 11:18:52.132189
1294 11:18:52.139057 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1295 11:18:52.145481 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1296 11:18:52.152034 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1297 11:18:52.161594 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1298 11:18:52.161678 Setting resources...
1299 11:18:52.168054 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1300 11:18:52.171761 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1301 11:18:52.178529 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1302 11:18:52.181175 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1303 11:18:52.184837 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1304 11:18:52.191537 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1305 11:18:52.197611 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1306 11:18:52.204049 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1307 11:18:52.210829 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1308 11:18:52.216998 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1309 11:18:52.220198 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1310 11:18:52.227193 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1311 11:18:52.230426 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1312 11:18:52.236730 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1313 11:18:52.239851 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1314 11:18:52.246966 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1315 11:18:52.249771 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1316 11:18:52.256403 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1317 11:18:52.259546 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1318 11:18:52.266082 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1319 11:18:52.269206 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1320 11:18:52.275951 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1321 11:18:52.279008 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1322 11:18:52.285537 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1323 11:18:52.288888 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1324 11:18:52.295546 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1325 11:18:52.298612 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1326 11:18:52.305691 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1327 11:18:52.308437 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1328 11:18:52.314818 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1329 11:18:52.318557 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1330 11:18:52.324824 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1331 11:18:52.331290 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1332 11:18:52.337983 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1333 11:18:52.344697 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1334 11:18:52.354419 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1335 11:18:52.357424 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1336 11:18:52.364239 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1337 11:18:52.370571 Root Device assign_resources, bus 0 link: 0
1338 11:18:52.374335 DOMAIN: 0000 assign_resources, bus 0 link: 0
1339 11:18:52.384148 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1340 11:18:52.390474 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1341 11:18:52.400268 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1342 11:18:52.406701 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1343 11:18:52.416586 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1344 11:18:52.422819 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1345 11:18:52.429616 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 11:18:52.432707 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 11:18:52.442764 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1348 11:18:52.449006 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1349 11:18:52.459007 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1350 11:18:52.465592 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1351 11:18:52.472189 PCI: 00:15.0 assign_resources, bus 1 link: 0
1352 11:18:52.475252 PCI: 00:15.0 assign_resources, bus 1 link: 0
1353 11:18:52.485231 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1354 11:18:52.488187 PCI: 00:15.1 assign_resources, bus 2 link: 0
1355 11:18:52.491824 PCI: 00:15.1 assign_resources, bus 2 link: 0
1356 11:18:52.501586 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1357 11:18:52.508113 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1358 11:18:52.518109 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1359 11:18:52.524890 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1360 11:18:52.531081 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1361 11:18:52.540836 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1362 11:18:52.547466 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1363 11:18:52.556817 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1364 11:18:52.560534 PCI: 00:19.0 assign_resources, bus 3 link: 0
1365 11:18:52.567174 PCI: 00:19.0 assign_resources, bus 3 link: 0
1366 11:18:52.573272 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1367 11:18:52.582973 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1368 11:18:52.589912 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1369 11:18:52.596204 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 11:18:52.602818 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1371 11:18:52.609705 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1372 11:18:52.615882 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1373 11:18:52.625919 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1374 11:18:52.629228 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1375 11:18:52.635502 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1376 11:18:52.642139 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1377 11:18:52.648719 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1378 11:18:52.651692 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1379 11:18:52.658556 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1380 11:18:52.661587 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1381 11:18:52.668552 LPC: Trying to open IO window from 800 size 1ff
1382 11:18:52.674515 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1383 11:18:52.684922 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1384 11:18:52.690921 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1385 11:18:52.701111 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1386 11:18:52.704448 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 11:18:52.707414 Root Device assign_resources, bus 0 link: 0
1388 11:18:52.711138
1389 11:18:52.711238 Done setting resources.
1390 11:18:52.717072 Show resources in subtree (Root Device)...After assigning values.
1391 11:18:52.723705 Root Device child on link 0 CPU_CLUSTER: 0
1392 11:18:52.726730 CPU_CLUSTER: 0 child on link 0 APIC: 00
1393 11:18:52.726821 APIC: 00
1394 11:18:52.730388 APIC: 05
1395 11:18:52.730473 APIC: 01
1396 11:18:52.730539 APIC: 03
1397 11:18:52.733322 APIC: 04
1398 11:18:52.733401 APIC: 02
1399 11:18:52.736784 APIC: 06
1400 11:18:52.736861 APIC: 07
1401 11:18:52.740081 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1402 11:18:52.749578 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1403 11:18:52.762910 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1404 11:18:52.762993 PCI: 00:00.0
1405 11:18:52.772944 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1406 11:18:52.782629 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1407 11:18:52.792471 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1408 11:18:52.802379 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1409 11:18:52.811727 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1410 11:18:52.818689 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1411 11:18:52.828164 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1412 11:18:52.838384 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1413 11:18:52.847811 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1414 11:18:52.857510 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1415 11:18:52.867260 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1416 11:18:52.873931 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1417 11:18:52.877221
1418 11:18:52.883883 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1419 11:18:52.896796 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1420 11:18:52.903108 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1421 11:18:52.913171 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1422 11:18:52.916291 PCI: 00:02.0
1423 11:18:52.925992 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1424 11:18:52.935865 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1425 11:18:52.945433 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1426 11:18:52.945521 PCI: 00:04.0
1427 11:18:52.948869 PCI: 00:08.0
1428 11:18:52.958681 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1429 11:18:52.962154 PCI: 00:12.0
1430 11:18:52.971694 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1431 11:18:52.975179 PCI: 00:14.0 child on link 0 USB0 port 0
1432 11:18:52.984817 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1433 11:18:52.991381 USB0 port 0 child on link 0 USB2 port 0
1434 11:18:52.991466 USB2 port 0
1435 11:18:52.994886 USB2 port 1
1436 11:18:52.994965 USB2 port 2
1437 11:18:52.997661 USB2 port 3
1438 11:18:52.997738 USB2 port 5
1439 11:18:53.001222 USB2 port 6
1440 11:18:53.001300 USB2 port 9
1441 11:18:53.004382 USB3 port 0
1442 11:18:53.007805 USB3 port 1
1443 11:18:53.007885 USB3 port 2
1444 11:18:53.010517 USB3 port 3
1445 11:18:53.010592 USB3 port 4
1446 11:18:53.013615 PCI: 00:14.2
1447 11:18:53.023574 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1448 11:18:53.033589 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1449 11:18:53.036502 PCI: 00:14.3
1450 11:18:53.046507 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1451 11:18:53.050087 PCI: 00:15.0 child on link 0 I2C: 01:15
1452 11:18:53.059641 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1453 11:18:53.062855 I2C: 01:15
1454 11:18:53.065959 PCI: 00:15.1 child on link 0 I2C: 02:5d
1455 11:18:53.075771 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1456 11:18:53.078980 I2C: 02:5d
1457 11:18:53.079059 GENERIC: 0.0
1458 11:18:53.082536 PCI: 00:16.0
1459 11:18:53.092281 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1460 11:18:53.092371 PCI: 00:17.0
1461 11:18:53.102224 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1462 11:18:53.112306 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1463 11:18:53.121572 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1464 11:18:53.131740 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1465 11:18:53.141032 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1466 11:18:53.151623 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1467 11:18:53.154095 PCI: 00:19.0 child on link 0 I2C: 03:1a
1468 11:18:53.164278 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1469 11:18:53.167440 I2C: 03:1a
1470 11:18:53.167542 I2C: 03:38
1471 11:18:53.170394 I2C: 03:39
1472 11:18:53.170479 I2C: 03:3a
1473 11:18:53.173903 I2C: 03:3b
1474 11:18:53.177054 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1475 11:18:53.187356 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1476 11:18:53.197017 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1477 11:18:53.206426 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1478 11:18:53.209939 PCI: 01:00.0
1479 11:18:53.219727 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1480 11:18:53.219821 PCI: 00:1e.0
1481 11:18:53.223034
1482 11:18:53.232981 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 11:18:53.242484 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1484 11:18:53.245747 PCI: 00:1e.2 child on link 0 SPI: 00
1485 11:18:53.255355 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1486 11:18:53.259088 SPI: 00
1487 11:18:53.261851 PCI: 00:1e.3 child on link 0 SPI: 01
1488 11:18:53.271839 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1489 11:18:53.275182 SPI: 01
1490 11:18:53.278111 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 11:18:53.288507 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 11:18:53.294501 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1493 11:18:53.298097 PNP: 0c09.0
1494 11:18:53.304341 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1495 11:18:53.307804
1496 11:18:53.307880 PCI: 00:1f.3
1497 11:18:53.317252 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1498 11:18:53.327057 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1499 11:18:53.330845 PCI: 00:1f.4
1500 11:18:53.340457 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1501 11:18:53.350236 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1502 11:18:53.350342 PCI: 00:1f.5
1503 11:18:53.360241 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1504 11:18:53.363184 Done allocating resources.
1505 11:18:53.370067 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1506 11:18:53.373187 Enabling resources...
1507 11:18:53.376114 PCI: 00:00.0 subsystem <- 8086/9b61
1508 11:18:53.379325 PCI: 00:00.0 cmd <- 06
1509 11:18:53.382989 PCI: 00:02.0 subsystem <- 8086/9b41
1510 11:18:53.386476 PCI: 00:02.0 cmd <- 03
1511 11:18:53.389473 PCI: 00:08.0 cmd <- 06
1512 11:18:53.392898 PCI: 00:12.0 subsystem <- 8086/02f9
1513 11:18:53.395878 PCI: 00:12.0 cmd <- 02
1514 11:18:53.398964 PCI: 00:14.0 subsystem <- 8086/02ed
1515 11:18:53.399039 PCI: 00:14.0 cmd <- 02
1516 11:18:53.402402 PCI: 00:14.2 cmd <- 02
1517 11:18:53.405850 PCI: 00:14.3 subsystem <- 8086/02f0
1518 11:18:53.409084 PCI: 00:14.3 cmd <- 02
1519 11:18:53.412143 PCI: 00:15.0 subsystem <- 8086/02e8
1520 11:18:53.415706 PCI: 00:15.0 cmd <- 02
1521 11:18:53.418766 PCI: 00:15.1 subsystem <- 8086/02e9
1522 11:18:53.422076 PCI: 00:15.1 cmd <- 02
1523 11:18:53.425204 PCI: 00:16.0 subsystem <- 8086/02e0
1524 11:18:53.428839 PCI: 00:16.0 cmd <- 02
1525 11:18:53.432233 PCI: 00:17.0 subsystem <- 8086/02d3
1526 11:18:53.435168 PCI: 00:17.0 cmd <- 03
1527 11:18:53.438947 PCI: 00:19.0 subsystem <- 8086/02c5
1528 11:18:53.441853 PCI: 00:19.0 cmd <- 02
1529 11:18:53.445027 PCI: 00:1d.0 bridge ctrl <- 0013
1530 11:18:53.448178 PCI: 00:1d.0 subsystem <- 8086/02b0
1531 11:18:53.451597 PCI: 00:1d.0 cmd <- 06
1532 11:18:53.454949 PCI: 00:1e.0 subsystem <- 8086/02a8
1533 11:18:53.458164 PCI: 00:1e.0 cmd <- 06
1534 11:18:53.461246 PCI: 00:1e.2 subsystem <- 8086/02aa
1535 11:18:53.461332 PCI: 00:1e.2 cmd <- 06
1536 11:18:53.468297 PCI: 00:1e.3 subsystem <- 8086/02ab
1537 11:18:53.468383 PCI: 00:1e.3 cmd <- 02
1538 11:18:53.471606 PCI: 00:1f.0 subsystem <- 8086/0284
1539 11:18:53.474522
1540 11:18:53.474623 PCI: 00:1f.0 cmd <- 407
1541 11:18:53.477761 PCI: 00:1f.3 subsystem <- 8086/02c8
1542 11:18:53.481323 PCI: 00:1f.3 cmd <- 02
1543 11:18:53.484401 PCI: 00:1f.4 subsystem <- 8086/02a3
1544 11:18:53.487508 PCI: 00:1f.4 cmd <- 03
1545 11:18:53.490855 PCI: 00:1f.5 subsystem <- 8086/02a4
1546 11:18:53.494373 PCI: 00:1f.5 cmd <- 406
1547 11:18:53.503729 PCI: 01:00.0 cmd <- 02
1548 11:18:53.508470 done.
1549 11:18:53.521677 ME: Version: 14.0.39.1367
1550 11:18:53.527962 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1551 11:18:53.530699 Initializing devices...
1552 11:18:53.530788 Root Device init ...
1553 11:18:53.537468 Chrome EC: Set SMI mask to 0x0000000000000000
1554 11:18:53.540984 Chrome EC: clear events_b mask to 0x0000000000000000
1555 11:18:53.547563 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 11:18:53.554209 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1557 11:18:53.560584 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1558 11:18:53.563559 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 11:18:53.570649 Root Device init finished in 35212 usecs
1560 11:18:53.570751 CPU_CLUSTER: 0 init ...
1561 11:18:53.576942 CPU_CLUSTER: 0 init finished in 2447 usecs
1562 11:18:53.581901 PCI: 00:00.0 init ...
1563 11:18:53.585079 CPU TDP: 15 Watts
1564 11:18:53.588438 CPU PL2 = 64 Watts
1565 11:18:53.591717 PCI: 00:00.0 init finished in 7069 usecs
1566 11:18:53.594810 PCI: 00:02.0 init ...
1567 11:18:53.598151 PCI: 00:02.0 init finished in 2252 usecs
1568 11:18:53.601618 PCI: 00:08.0 init ...
1569 11:18:53.604850 PCI: 00:08.0 init finished in 2252 usecs
1570 11:18:53.607524 PCI: 00:12.0 init ...
1571 11:18:53.611037 PCI: 00:12.0 init finished in 2253 usecs
1572 11:18:53.614831 PCI: 00:14.0 init ...
1573 11:18:53.617541 PCI: 00:14.0 init finished in 2243 usecs
1574 11:18:53.620901 PCI: 00:14.2 init ...
1575 11:18:53.624155 PCI: 00:14.2 init finished in 2251 usecs
1576 11:18:53.627904 PCI: 00:14.3 init ...
1577 11:18:53.630657 PCI: 00:14.3 init finished in 2270 usecs
1578 11:18:53.634255 PCI: 00:15.0 init ...
1579 11:18:53.637226 DW I2C bus 0 at 0xd121f000 (400 KHz)
1580 11:18:53.643769 PCI: 00:15.0 init finished in 5974 usecs
1581 11:18:53.643855 PCI: 00:15.1 init ...
1582 11:18:53.647365 DW I2C bus 1 at 0xd1220000 (400 KHz)
1583 11:18:53.653650 PCI: 00:15.1 init finished in 5974 usecs
1584 11:18:53.657182 PCI: 00:16.0 init ...
1585 11:18:53.660109 PCI: 00:16.0 init finished in 2243 usecs
1586 11:18:53.663481 PCI: 00:19.0 init ...
1587 11:18:53.666854 DW I2C bus 4 at 0xd1222000 (400 KHz)
1588 11:18:53.670062 PCI: 00:19.0 init finished in 5974 usecs
1589 11:18:53.673633 PCI: 00:1d.0 init ...
1590 11:18:53.676764 Initializing PCH PCIe bridge.
1591 11:18:53.679989 PCI: 00:1d.0 init finished in 5275 usecs
1592 11:18:53.683675 PCI: 00:1f.0 init ...
1593 11:18:53.686808 IOAPIC: Initializing IOAPIC at 0xfec00000
1594 11:18:53.693550 IOAPIC: Bootstrap Processor Local APIC = 0x00
1595 11:18:53.693636 IOAPIC: ID = 0x02
1596 11:18:53.696555 IOAPIC: Dumping registers
1597 11:18:53.699567 reg 0x0000: 0x02000000
1598 11:18:53.703119 reg 0x0001: 0x00770020
1599 11:18:53.706195 reg 0x0002: 0x00000000
1600 11:18:53.709793 PCI: 00:1f.0 init finished in 23517 usecs
1601 11:18:53.712685 PCI: 00:1f.4 init ...
1602 11:18:53.716122 PCI: 00:1f.4 init finished in 2261 usecs
1603 11:18:53.727670 PCI: 01:00.0 init ...
1604 11:18:53.731194 PCI: 01:00.0 init finished in 2244 usecs
1605 11:18:53.735216 PNP: 0c09.0 init ...
1606 11:18:53.738567 Google Chrome EC uptime: 11.048 seconds
1607 11:18:53.741933
1608 11:18:53.745206 Google Chrome AP resets since EC boot: 0
1609 11:18:53.748276 Google Chrome most recent AP reset causes:
1610 11:18:53.754738 Google Chrome EC reset flags at last EC boot: reset-pin
1611 11:18:53.757928 PNP: 0c09.0 init finished in 20574 usecs
1612 11:18:53.761029 Devices initialized
1613 11:18:53.764673 Show all devs... After init.
1614 11:18:53.764757 Root Device: enabled 1
1615 11:18:53.767630 CPU_CLUSTER: 0: enabled 1
1616 11:18:53.770834 DOMAIN: 0000: enabled 1
1617 11:18:53.774016 APIC: 00: enabled 1
1618 11:18:53.774094 PCI: 00:00.0: enabled 1
1619 11:18:53.777563 PCI: 00:02.0: enabled 1
1620 11:18:53.780764 PCI: 00:04.0: enabled 0
1621 11:18:53.783991 PCI: 00:05.0: enabled 0
1622 11:18:53.784070 PCI: 00:12.0: enabled 1
1623 11:18:53.787069 PCI: 00:12.5: enabled 0
1624 11:18:53.790541 PCI: 00:12.6: enabled 0
1625 11:18:53.793636 PCI: 00:14.0: enabled 1
1626 11:18:53.793709 PCI: 00:14.1: enabled 0
1627 11:18:53.797326 PCI: 00:14.3: enabled 1
1628 11:18:53.800162 PCI: 00:14.5: enabled 0
1629 11:18:53.803545 PCI: 00:15.0: enabled 1
1630 11:18:53.803613 PCI: 00:15.1: enabled 1
1631 11:18:53.806850 PCI: 00:15.2: enabled 0
1632 11:18:53.810016 PCI: 00:15.3: enabled 0
1633 11:18:53.810088 PCI: 00:16.0: enabled 1
1634 11:18:53.813780
1635 11:18:53.813857 PCI: 00:16.1: enabled 0
1636 11:18:53.816755 PCI: 00:16.2: enabled 0
1637 11:18:53.820022 PCI: 00:16.3: enabled 0
1638 11:18:53.820107 PCI: 00:16.4: enabled 0
1639 11:18:53.823252 PCI: 00:16.5: enabled 0
1640 11:18:53.826744 PCI: 00:17.0: enabled 1
1641 11:18:53.829534 PCI: 00:19.0: enabled 1
1642 11:18:53.829610 PCI: 00:19.1: enabled 0
1643 11:18:53.833184 PCI: 00:19.2: enabled 0
1644 11:18:53.836344 PCI: 00:1a.0: enabled 0
1645 11:18:53.839539 PCI: 00:1c.0: enabled 0
1646 11:18:53.839617 PCI: 00:1c.1: enabled 0
1647 11:18:53.842888 PCI: 00:1c.2: enabled 0
1648 11:18:53.846104 PCI: 00:1c.3: enabled 0
1649 11:18:53.849173 PCI: 00:1c.4: enabled 0
1650 11:18:53.849246 PCI: 00:1c.5: enabled 0
1651 11:18:53.852839 PCI: 00:1c.6: enabled 0
1652 11:18:53.855667 PCI: 00:1c.7: enabled 0
1653 11:18:53.859247 PCI: 00:1d.0: enabled 1
1654 11:18:53.859327 PCI: 00:1d.1: enabled 0
1655 11:18:53.862151 PCI: 00:1d.2: enabled 0
1656 11:18:53.865781 PCI: 00:1d.3: enabled 0
1657 11:18:53.869004 PCI: 00:1d.4: enabled 0
1658 11:18:53.869082 PCI: 00:1d.5: enabled 0
1659 11:18:53.871944 PCI: 00:1e.0: enabled 1
1660 11:18:53.875221 PCI: 00:1e.1: enabled 0
1661 11:18:53.879001 PCI: 00:1e.2: enabled 1
1662 11:18:53.879080 PCI: 00:1e.3: enabled 1
1663 11:18:53.882201 PCI: 00:1f.0: enabled 1
1664 11:18:53.885122 PCI: 00:1f.1: enabled 0
1665 11:18:53.888538 PCI: 00:1f.2: enabled 0
1666 11:18:53.888621 PCI: 00:1f.3: enabled 1
1667 11:18:53.891442 PCI: 00:1f.4: enabled 1
1668 11:18:53.894898 PCI: 00:1f.5: enabled 1
1669 11:18:53.898352 PCI: 00:1f.6: enabled 0
1670 11:18:53.898431 USB0 port 0: enabled 1
1671 11:18:53.901402 I2C: 01:15: enabled 1
1672 11:18:53.904636 I2C: 02:5d: enabled 1
1673 11:18:53.904730 GENERIC: 0.0: enabled 1
1674 11:18:53.908004 I2C: 03:1a: enabled 1
1675 11:18:53.910938 I2C: 03:38: enabled 1
1676 11:18:53.911018 I2C: 03:39: enabled 1
1677 11:18:53.914155
1678 11:18:53.914271 I2C: 03:3a: enabled 1
1679 11:18:53.917715 I2C: 03:3b: enabled 1
1680 11:18:53.920900 PCI: 00:00.0: enabled 1
1681 11:18:53.920981 SPI: 00: enabled 1
1682 11:18:53.924193 SPI: 01: enabled 1
1683 11:18:53.927826 PNP: 0c09.0: enabled 1
1684 11:18:53.927909 USB2 port 0: enabled 1
1685 11:18:53.930822 USB2 port 1: enabled 1
1686 11:18:53.933973 USB2 port 2: enabled 0
1687 11:18:53.934054 USB2 port 3: enabled 0
1688 11:18:53.937340 USB2 port 5: enabled 0
1689 11:18:53.940772 USB2 port 6: enabled 1
1690 11:18:53.943787 USB2 port 9: enabled 1
1691 11:18:53.943868 USB3 port 0: enabled 1
1692 11:18:53.947132 USB3 port 1: enabled 1
1693 11:18:53.950224 USB3 port 2: enabled 1
1694 11:18:53.950333 USB3 port 3: enabled 1
1695 11:18:53.953558 USB3 port 4: enabled 0
1696 11:18:53.957020 APIC: 05: enabled 1
1697 11:18:53.957096 APIC: 01: enabled 1
1698 11:18:53.960029 APIC: 03: enabled 1
1699 11:18:53.963660 APIC: 04: enabled 1
1700 11:18:53.963735 APIC: 02: enabled 1
1701 11:18:53.966834 APIC: 06: enabled 1
1702 11:18:53.966910 APIC: 07: enabled 1
1703 11:18:53.969827
1704 11:18:53.969897 PCI: 00:08.0: enabled 1
1705 11:18:53.972938 PCI: 00:14.2: enabled 1
1706 11:18:53.976834 PCI: 01:00.0: enabled 1
1707 11:18:53.980153 Disabling ACPI via APMC:
1708 11:18:53.983265 done.
1709 11:18:53.986369 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1710 11:18:53.989667 ELOG: NV offset 0xaf0000 size 0x4000
1711 11:18:53.996451 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1712 11:18:54.003329 ELOG: Event(17) added with size 13 at 2022-11-26 11:18:54 UTC
1713 11:18:54.009820 POST: Unexpected post code in previous boot: 0x25
1714 11:18:54.016572 ELOG: Event(A3) added with size 11 at 2022-11-26 11:18:54 UTC
1715 11:18:54.022838 ELOG: Event(A6) added with size 13 at 2022-11-26 11:18:54 UTC
1716 11:18:54.029717 ELOG: Event(92) added with size 9 at 2022-11-26 11:18:54 UTC
1717 11:18:54.036098 ELOG: Event(93) added with size 9 at 2022-11-26 11:18:54 UTC
1718 11:18:54.042716 ELOG: Event(9A) added with size 9 at 2022-11-26 11:18:54 UTC
1719 11:18:54.045613 ELOG: Event(9E) added with size 10 at 2022-11-26 11:18:54 UTC
1720 11:18:54.052524 ELOG: Event(9F) added with size 14 at 2022-11-26 11:18:54 UTC
1721 11:18:54.059105 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1722 11:18:54.065543 ELOG: Event(A1) added with size 10 at 2022-11-26 11:18:54 UTC
1723 11:18:54.072208 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1724 11:18:54.079205 ELOG: Event(A0) added with size 9 at 2022-11-26 11:18:54 UTC
1725 11:18:54.085510 elog_add_boot_reason: Logged dev mode boot
1726 11:18:54.085598 Finalize devices...
1727 11:18:54.088381 PCI: 00:17.0 final
1728 11:18:54.088461 Devices finalized
1729 11:18:54.095385 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1730 11:18:54.102053 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1731 11:18:54.105021 ME: HFSTS1 : 0x90000245
1732 11:18:54.108386 ME: HFSTS2 : 0x3B850126
1733 11:18:54.111771 ME: HFSTS3 : 0x00000020
1734 11:18:54.118294 ME: HFSTS4 : 0x00004800
1735 11:18:54.121640 ME: HFSTS5 : 0x00000000
1736 11:18:54.124819 ME: HFSTS6 : 0x40400006
1737 11:18:54.128031 ME: Manufacturing Mode : NO
1738 11:18:54.131289 ME: FW Partition Table : OK
1739 11:18:54.134341 ME: Bringup Loader Failure : NO
1740 11:18:54.137739 ME: Firmware Init Complete : YES
1741 11:18:54.141573 ME: Boot Options Present : NO
1742 11:18:54.144286 ME: Update In Progress : NO
1743 11:18:54.147837 ME: D0i3 Support : YES
1744 11:18:54.150622 ME: Low Power State Enabled : NO
1745 11:18:54.153974 ME: CPU Replaced : NO
1746 11:18:54.157185 ME: CPU Replacement Valid : YES
1747 11:18:54.160309 ME: Current Working State : 5
1748 11:18:54.163747 ME: Current Operation State : 1
1749 11:18:54.167598 ME: Current Operation Mode : 0
1750 11:18:54.170497 ME: Error Code : 0
1751 11:18:54.173611 ME: CPU Debug Disabled : YES
1752 11:18:54.176556 ME: TXT Support : NO
1753 11:18:54.183141 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1754 11:18:54.190022 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 11:18:54.190111 CBFS @ c08000 size 3f8000
1756 11:18:54.196340 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 11:18:54.199686 CBFS: Locating 'fallback/dsdt.aml'
1758 11:18:54.206074 CBFS: Found @ offset 10bb80 size 3fa5
1759 11:18:54.209466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1760 11:18:54.212866 CBFS @ c08000 size 3f8000
1761 11:18:54.219149 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1762 11:18:54.222430 CBFS: Locating 'fallback/slic'
1763 11:18:54.226194 CBFS: 'fallback/slic' not found.
1764 11:18:54.229070 ACPI: Writing ACPI tables at 99b3e000.
1765 11:18:54.232697
1766 11:18:54.232785 ACPI: * FACS
1767 11:18:54.235697 ACPI: * DSDT
1768 11:18:54.239254 Ramoops buffer: 0x100000@0x99a3d000.
1769 11:18:54.242004 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1770 11:18:54.248857 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1771 11:18:54.251930 Google Chrome EC: version:
1772 11:18:54.255352 ro: helios_v2.0.2659-56403530b
1773 11:18:54.258607 rw: helios_v2.0.2849-c41de27e7d
1774 11:18:54.258681 running image: 1
1775 11:18:54.262964 ACPI: * FADT
1776 11:18:54.263039 SCI is IRQ9
1777 11:18:54.269364 ACPI: added table 1/32, length now 40
1778 11:18:54.269452 ACPI: * SSDT
1779 11:18:54.272881 Found 1 CPU(s) with 8 core(s) each.
1780 11:18:54.276018 Error: Could not locate 'wifi_sar' in VPD.
1781 11:18:54.278859
1782 11:18:54.282592 Checking CBFS for default SAR values
1783 11:18:54.285771 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1784 11:18:54.288665 CBFS @ c08000 size 3f8000
1785 11:18:54.295582 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1786 11:18:54.298454 CBFS: Locating 'wifi_sar_defaults.hex'
1787 11:18:54.302149 CBFS: Found @ offset 5fac0 size 77
1788 11:18:54.305078 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1789 11:18:54.311649 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1790 11:18:54.314764 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1791 11:18:54.321143 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1792 11:18:54.324672 failed to find key in VPD: dsm_calib_r0_0
1793 11:18:54.334141 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1794 11:18:54.340603 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1795 11:18:54.343997 failed to find key in VPD: dsm_calib_r0_1
1796 11:18:54.353767 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1797 11:18:54.357242 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1798 11:18:54.360319 failed to find key in VPD: dsm_calib_r0_2
1799 11:18:54.364063
1800 11:18:54.369962 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1801 11:18:54.376547 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1802 11:18:54.379921 failed to find key in VPD: dsm_calib_r0_3
1803 11:18:54.389387 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1804 11:18:54.392880 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1805 11:18:54.396091
1806 11:18:54.399272 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1807 11:18:54.402838 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1808 11:18:54.406120 EC returned error result code 1
1809 11:18:54.409428 EC returned error result code 1
1810 11:18:54.413142 EC returned error result code 1
1811 11:18:54.419890 PS2K: Bad resp from EC. Vivaldi disabled!
1812 11:18:54.423098 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1813 11:18:54.426026
1814 11:18:54.429233 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1815 11:18:54.435872 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1816 11:18:54.439080 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1817 11:18:54.445699 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1818 11:18:54.452281 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1819 11:18:54.459122 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1820 11:18:54.462457 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1821 11:18:54.465690
1822 11:18:54.468919 ACPI: added table 2/32, length now 44
1823 11:18:54.468996 ACPI: * MCFG
1824 11:18:54.472640 ACPI: added table 3/32, length now 48
1825 11:18:54.475292 ACPI: * TPM2
1826 11:18:54.478678 TPM2 log created at 99a2d000
1827 11:18:54.481844 ACPI: added table 4/32, length now 52
1828 11:18:54.481923 ACPI: * MADT
1829 11:18:54.485012 SCI is IRQ9
1830 11:18:54.488522 ACPI: added table 5/32, length now 56
1831 11:18:54.491604 current = 99b43ac0
1832 11:18:54.491681 ACPI: * DMAR
1833 11:18:54.494793 ACPI: added table 6/32, length now 60
1834 11:18:54.498429 ACPI: * IGD OpRegion
1835 11:18:54.501408 GMA: Found VBT in CBFS
1836 11:18:54.504650 GMA: Found valid VBT in CBFS
1837 11:18:54.508085 ACPI: added table 7/32, length now 64
1838 11:18:54.508161 ACPI: * HPET
1839 11:18:54.511554 ACPI: added table 8/32, length now 68
1840 11:18:54.514483 ACPI: done.
1841 11:18:54.517697 ACPI tables: 31744 bytes.
1842 11:18:54.521150 smbios_write_tables: 99a2c000
1843 11:18:54.523940 EC returned error result code 3
1844 11:18:54.527344 Couldn't obtain OEM name from CBI
1845 11:18:54.530445 Create SMBIOS type 17
1846 11:18:54.534076 PCI: 00:00.0 (Intel Cannonlake)
1847 11:18:54.534163 PCI: 00:14.3 (Intel WiFi)
1848 11:18:54.537093 SMBIOS tables: 939 bytes.
1849 11:18:54.540506 Writing table forward entry at 0x00000500
1850 11:18:54.543751
1851 11:18:54.546777 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1852 11:18:54.550229 Writing coreboot table at 0x99b62000
1853 11:18:54.553372
1854 11:18:54.556598 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1855 11:18:54.563457 1. 0000000000001000-000000000009ffff: RAM
1856 11:18:54.566575 2. 00000000000a0000-00000000000fffff: RESERVED
1857 11:18:54.569568 3. 0000000000100000-0000000099a2bfff: RAM
1858 11:18:54.576384 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1859 11:18:54.582694 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1860 11:18:54.589359 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1861 11:18:54.592475 7. 000000009a000000-000000009f7fffff: RESERVED
1862 11:18:54.596172 8. 00000000e0000000-00000000efffffff: RESERVED
1863 11:18:54.602736 9. 00000000fc000000-00000000fc000fff: RESERVED
1864 11:18:54.605664 10. 00000000fe000000-00000000fe00ffff: RESERVED
1865 11:18:54.612172 11. 00000000fed10000-00000000fed17fff: RESERVED
1866 11:18:54.615793 12. 00000000fed80000-00000000fed83fff: RESERVED
1867 11:18:54.621875 13. 00000000fed90000-00000000fed91fff: RESERVED
1868 11:18:54.625253 14. 00000000feda0000-00000000feda1fff: RESERVED
1869 11:18:54.628537 15. 0000000100000000-000000045e7fffff: RAM
1870 11:18:54.631745
1871 11:18:54.634953 Graphics framebuffer located at 0xc0000000
1872 11:18:54.638302 Passing 5 GPIOs to payload:
1873 11:18:54.641579 NAME | PORT | POLARITY | VALUE
1874 11:18:54.647816 write protect | undefined | high | low
1875 11:18:54.654411 lid | undefined | high | high
1876 11:18:54.657651 power | undefined | high | low
1877 11:18:54.664431 oprom | undefined | high | low
1878 11:18:54.668078 EC in RW | 0x000000cb | high | low
1879 11:18:54.671257 Board ID: 4
1880 11:18:54.674351 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1881 11:18:54.677863 CBFS @ c08000 size 3f8000
1882 11:18:54.684044 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1883 11:18:54.690853 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1884 11:18:54.693781 coreboot table: 1492 bytes.
1885 11:18:54.697508 IMD ROOT 0. 99fff000 00001000
1886 11:18:54.700864 IMD SMALL 1. 99ffe000 00001000
1887 11:18:54.703607 FSP MEMORY 2. 99c4e000 003b0000
1888 11:18:54.707323 CONSOLE 3. 99c2e000 00020000
1889 11:18:54.710141 FMAP 4. 99c2d000 0000054e
1890 11:18:54.714114 TIME STAMP 5. 99c2c000 00000910
1891 11:18:54.717021 VBOOT WORK 6. 99c18000 00014000
1892 11:18:54.719858 MRC DATA 7. 99c16000 00001958
1893 11:18:54.722957 ROMSTG STCK 8. 99c15000 00001000
1894 11:18:54.726328 AFTER CAR 9. 99c0b000 0000a000
1895 11:18:54.729760 RAMSTAGE 10. 99baf000 0005c000
1896 11:18:54.732841 REFCODE 11. 99b7a000 00035000
1897 11:18:54.736512 SMM BACKUP 12. 99b6a000 00010000
1898 11:18:54.739234 COREBOOT 13. 99b62000 00008000
1899 11:18:54.743020 ACPI 14. 99b3e000 00024000
1900 11:18:54.745874 ACPI GNVS 15. 99b3d000 00001000
1901 11:18:54.749296 RAMOOPS 16. 99a3d000 00100000
1902 11:18:54.752265 TPM2 TCGLOG17. 99a2d000 00010000
1903 11:18:54.755815 SMBIOS 18. 99a2c000 00000800
1904 11:18:54.759235 IMD small region:
1905 11:18:54.762125 IMD ROOT 0. 99ffec00 00000400
1906 11:18:54.765294 FSP RUNTIME 1. 99ffebe0 00000004
1907 11:18:54.769168 EC HOSTEVENT 2. 99ffebc0 00000008
1908 11:18:54.772107 POWER STATE 3. 99ffeb80 00000040
1909 11:18:54.775298 ROMSTAGE 4. 99ffeb60 00000004
1910 11:18:54.778671 MEM INFO 5. 99ffe9a0 000001b9
1911 11:18:54.781837 VPD 6. 99ffe920 0000006c
1912 11:18:54.785393 MTRR: Physical address space:
1913 11:18:54.791810 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1914 11:18:54.797933 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1915 11:18:54.804849 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1916 11:18:54.811560 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1917 11:18:54.818009 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1918 11:18:54.823967 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1919 11:18:54.827568 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1920 11:18:54.830728
1921 11:18:54.833863 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 11:18:54.837383 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 11:18:54.840639 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 11:18:54.843956 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 11:18:54.850180 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 11:18:54.853528 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 11:18:54.856826 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 11:18:54.860335 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 11:18:54.863242
1930 11:18:54.866411 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 11:18:54.869751 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 11:18:54.873375 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 11:18:54.876461 call enable_fixed_mtrr()
1934 11:18:54.879984 CPU physical address size: 39 bits
1935 11:18:54.886403 MTRR: default type WB/UC MTRR counts: 6/8.
1936 11:18:54.889582 MTRR: WB selected as default type.
1937 11:18:54.896192 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1938 11:18:54.902673 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1939 11:18:54.905768 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1940 11:18:54.912178 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1941 11:18:54.919254 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1942 11:18:54.925565 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1943 11:18:54.932014 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 11:18:54.935750 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:18:54.938630 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:18:54.941551 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:18:54.948071 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:18:54.951835 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:18:54.954697 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:18:54.958226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:18:54.964780 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:18:54.967774 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:18:54.971183 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:18:54.971269
1955 11:18:54.974790 MTRR check
1956 11:18:54.974895 Fixed MTRRs : Enabled
1957 11:18:54.977745 Variable MTRRs: Enabled
1958 11:18:54.977830
1959 11:18:54.980969 call enable_fixed_mtrr()
1960 11:18:54.987619 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1961 11:18:54.991082 CPU physical address size: 39 bits
1962 11:18:54.994121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1963 11:18:55.001060 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 11:18:55.003968 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 11:18:55.007565 CBFS @ c08000 size 3f8000
1966 11:18:55.010406 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1967 11:18:55.013716 CBFS: Locating 'fallback/payload'
1968 11:18:55.017152
1969 11:18:55.020185 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 11:18:55.024104 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 11:18:55.027020 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 11:18:55.033306 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 11:18:55.036698 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 11:18:55.039926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 11:18:55.043234 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 11:18:55.049621 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 11:18:55.052639 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 11:18:55.055997 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 11:18:55.059263 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 11:18:55.065685 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 11:18:55.068967 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 11:18:55.072581 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 11:18:55.075771 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 11:18:55.082346 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 11:18:55.085359 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 11:18:55.088773 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 11:18:55.092153 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 11:18:55.098480 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 11:18:55.101583 call enable_fixed_mtrr()
1990 11:18:55.101689 call enable_fixed_mtrr()
1991 11:18:55.108258 MTRR: Fixed MSR 0x250 0x0606060606060606
1992 11:18:55.111597 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 11:18:55.114727 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 11:18:55.117779 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 11:18:55.124460 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 11:18:55.127597 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 11:18:55.131021 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 11:18:55.134158 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 11:18:55.140640 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 11:18:55.144154 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 11:18:55.147307 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 11:18:55.150760 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 11:18:55.157451 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 11:18:55.160894 call enable_fixed_mtrr()
2005 11:18:55.164052 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 11:18:55.167160 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 11:18:55.170516 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 11:18:55.177201 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 11:18:55.179997 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 11:18:55.183177 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 11:18:55.186600 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 11:18:55.192973 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 11:18:55.196506 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 11:18:55.199351 CPU physical address size: 39 bits
2015 11:18:55.202944 call enable_fixed_mtrr()
2016 11:18:55.206008 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:18:55.209296 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 11:18:55.215876 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 11:18:55.219095 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 11:18:55.222600 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 11:18:55.225893 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 11:18:55.232394 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 11:18:55.235419 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 11:18:55.239088 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 11:18:55.242171 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 11:18:55.248909 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 11:18:55.251806 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 11:18:55.255337 call enable_fixed_mtrr()
2029 11:18:55.258582 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 11:18:55.261653 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 11:18:55.267821 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 11:18:55.271535 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 11:18:55.274396 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 11:18:55.278057 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 11:18:55.284195 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 11:18:55.287819 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 11:18:55.291070 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 11:18:55.294299 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 11:18:55.297788 CPU physical address size: 39 bits
2040 11:18:55.300984 call enable_fixed_mtrr()
2041 11:18:55.304278 CPU physical address size: 39 bits
2042 11:18:55.310743 CPU physical address size: 39 bits
2043 11:18:55.314090 CPU physical address size: 39 bits
2044 11:18:55.317118 CPU physical address size: 39 bits
2045 11:18:55.320778 CBFS: Found @ offset 1c96c0 size 3f798
2046 11:18:55.323688 Checking segment from ROM address 0xffdd16f8
2047 11:18:55.330251 Checking segment from ROM address 0xffdd1714
2048 11:18:55.333844 Loading segment from ROM address 0xffdd16f8
2049 11:18:55.336877 code (compression=0)
2050 11:18:55.343263 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2051 11:18:55.353380 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2052 11:18:55.356164 it's not compressed!
2053 11:18:55.447271 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2054 11:18:55.454076 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2055 11:18:55.460144 Loading segment from ROM address 0xffdd1714
2056 11:18:55.460232 Entry Point 0x30000000
2057 11:18:55.463563 Loaded segments
2058 11:18:55.469787 Finalizing chipset.
2059 11:18:55.472951 Finalizing SMM.
2060 11:18:55.476494 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2061 11:18:55.479596 mp_park_aps done after 0 msecs.
2062 11:18:55.486358 Jumping to boot code at 30000000(99b62000)
2063 11:18:55.492628 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2064 11:18:55.492716
2065 11:18:55.492784
2066 11:18:55.492846
2067 11:18:55.496218 Starting depthcharge on Helios...
2068 11:18:55.496302
2069 11:18:55.496637 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2070 11:18:55.496742 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2071 11:18:55.496829 Setting prompt string to ['hatch:']
2072 11:18:55.496910 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2073 11:18:55.505610 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2074 11:18:55.505699
2075 11:18:55.512132 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2076 11:18:55.512218
2077 11:18:55.518975 board_setup: Info: eMMC controller not present; skipping
2078 11:18:55.519060
2079 11:18:55.522655 New NVMe Controller 0x30053ac0 @ 00:1d:00
2080 11:18:55.522742
2081 11:18:55.528617 board_setup: Info: SDHCI controller not present; skipping
2082 11:18:55.528704
2083 11:18:55.535370 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2084 11:18:55.535489
2085 11:18:55.535556 Wipe memory regions:
2086 11:18:55.535619
2087 11:18:55.541828 [0x00000000001000, 0x000000000a0000)
2088 11:18:55.541913
2089 11:18:55.544961 [0x00000000100000, 0x00000030000000)
2090 11:18:55.545048
2091 11:18:55.610603 [0x00000030657430, 0x00000099a2c000)
2092 11:18:55.610735
2093 11:18:55.750961 [0x00000100000000, 0x0000045e800000)
2094 11:18:55.751143
2095 11:18:57.133814 R8152: Initializing
2096 11:18:57.134012
2097 11:18:57.136962 Version 9 (ocp_data = 6010)
2098 11:18:57.137055
2099 11:18:57.141145 R8152: Done initializing
2100 11:18:57.141256
2101 11:18:57.144364 Adding net device
2102 11:18:57.144455
2103 11:18:57.748483 R8152: Initializing
2104 11:18:57.748628
2105 11:18:57.752003 Version 6 (ocp_data = 5c30)
2106 11:18:57.752102
2107 11:18:57.754974 R8152: Done initializing
2108 11:18:57.755110
2109 11:18:57.761737 net_add_device: Attemp to include the same device
2110 11:18:57.761878
2111 11:18:57.768467 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2112 11:18:57.768607
2113 11:18:57.768676
2114 11:18:57.768740
2115 11:18:57.769018 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2117 11:18:57.869815 hatch: tftpboot 192.168.201.1 8138812/tftp-deploy-dtstbrdz/kernel/bzImage 8138812/tftp-deploy-dtstbrdz/kernel/cmdline 8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
2118 11:18:57.869991 Setting prompt string to 'Starting kernel'
2119 11:18:57.870066 Setting prompt string to ['Starting kernel']
2120 11:18:57.870136 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 11:18:57.870223 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2122 11:18:57.873900 tftpboot 192.168.201.1 8138812/tftp-deploy-dtstbrdz/kernel/bzIoy-dtstbrdz/kernel/cmdline 8138812/tftp-deploy-dtstbrdz/ramdisk/ramdisk.cpio.gz
2123 11:18:57.873992
2124 11:18:57.874060 Waiting for link
2125 11:18:57.874123
2126 11:18:58.074951 done.
2127 11:18:58.075140
2128 11:18:58.075210 MAC: 00:24:32:30:7f:7f
2129 11:18:58.075274
2130 11:18:58.078111 Sending DHCP discover... done.
2131 11:18:58.078208
2132 11:18:58.081232 Waiting for reply... done.
2133 11:18:58.081328
2134 11:18:58.084361 Sending DHCP request... done.
2135 11:18:58.084472
2136 11:18:58.087819 Waiting for reply... done.
2137 11:18:58.087937
2138 11:18:58.091013 My ip is 192.168.201.15
2139 11:18:58.091105
2140 11:18:58.094187 The DHCP server ip is 192.168.201.1
2141 11:18:58.094299
2142 11:18:58.097349 TFTP server IP predefined by user: 192.168.201.1
2143 11:18:58.097455
2144 11:18:58.107081 Bootfile predefined by user: 8138812/tftp-deploy-dtstbrdz/kernel/bzImage
2145 11:18:58.107213
2146 11:18:58.110931 Sending tftp read request... done.
2147 11:18:58.111035
2148 11:18:58.114659 Waiting for the transfer...
2149 11:18:58.114763
2150 11:18:58.788494 00000000 ################################################################
2151 11:18:58.788650
2152 11:18:59.456587 00080000 ################################################################
2153 11:18:59.456749
2154 11:19:00.122115 00100000 ################################################################
2155 11:19:00.122299
2156 11:19:00.794138 00180000 ################################################################
2157 11:19:00.794326
2158 11:19:01.463201 00200000 ################################################################
2159 11:19:01.463345
2160 11:19:02.130952 00280000 ################################################################
2161 11:19:02.131115
2162 11:19:02.798996 00300000 ################################################################
2163 11:19:02.799143
2164 11:19:03.471639 00380000 ################################################################
2165 11:19:03.471803
2166 11:19:04.138324 00400000 ################################################################
2167 11:19:04.138466
2168 11:19:04.812397 00480000 ################################################################
2169 11:19:04.812538
2170 11:19:05.485770 00500000 ################################################################
2171 11:19:05.485904
2172 11:19:06.137155 00580000 ################################################################
2173 11:19:06.137746
2174 11:19:06.787294 00600000 ################################################################
2175 11:19:06.787821
2176 11:19:07.441402 00680000 ################################################################
2177 11:19:07.442007
2178 11:19:08.106191 00700000 ################################################################
2179 11:19:08.106717
2180 11:19:08.707515 00780000 ################################################################
2181 11:19:08.707656
2182 11:19:09.324345 00800000 ################################################################
2183 11:19:09.324898
2184 11:19:09.736521 00880000 ############################################# done.
2185 11:19:09.736659
2186 11:19:09.740080 The bootfile was 9273344 bytes long.
2187 11:19:09.740198
2188 11:19:09.742844 Sending tftp read request... done.
2189 11:19:09.742929
2190 11:19:09.746109 Waiting for the transfer...
2191 11:19:09.746199
2192 11:19:10.288582 00000000 ################################################################
2193 11:19:10.288723
2194 11:19:10.812084 00080000 ################################################################
2195 11:19:10.812222
2196 11:19:11.369521 00100000 ################################################################
2197 11:19:11.369661
2198 11:19:11.952915 00180000 ################################################################
2199 11:19:11.953388
2200 11:19:12.582669 00200000 ################################################################
2201 11:19:12.583309
2202 11:19:13.219985 00280000 ################################################################
2203 11:19:13.220471
2204 11:19:13.853553 00300000 ################################################################
2205 11:19:13.854076
2206 11:19:14.491640 00380000 ################################################################
2207 11:19:14.492163
2208 11:19:15.120572 00400000 ################################################################
2209 11:19:15.121098
2210 11:19:15.754900 00480000 ################################################################
2211 11:19:15.755454
2212 11:19:16.093399 00500000 ################################### done.
2213 11:19:16.093910
2214 11:19:16.096695 Sending tftp read request... done.
2215 11:19:16.097141
2216 11:19:16.099916 Waiting for the transfer...
2217 11:19:16.100360
2218 11:19:16.100848 00000000 # done.
2219 11:19:16.101214
2220 11:19:16.109508 Command line loaded dynamically from TFTP file: 8138812/tftp-deploy-dtstbrdz/kernel/cmdline
2221 11:19:16.109949
2222 11:19:16.135333 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8138812/extract-nfsrootfs-6xl2w0_m,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2223 11:19:16.135824
2224 11:19:16.141961 ec_init(0): CrosEC protocol v3 supported (256, 256)
2225 11:19:16.142440
2226 11:19:16.150280 Shutting down all USB controllers.
2227 11:19:16.150709
2228 11:19:16.151059 Removing current net device
2229 11:19:16.151403
2230 11:19:16.158352 Finalizing coreboot
2231 11:19:16.158888
2232 11:19:16.164828 Exiting depthcharge with code 4 at timestamp: 28024383
2233 11:19:16.165260
2234 11:19:16.165597
2235 11:19:16.165970 Starting kernel ...
2236 11:19:16.166301
2237 11:19:16.166604
2238 11:19:16.166902
2239 11:19:16.168093 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2240 11:19:16.168589 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2241 11:19:16.168966 Setting prompt string to ['Linux version [0-9]']
2242 11:19:16.169338 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2243 11:19:16.169707 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2245 11:23:36.169634 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2247 11:23:36.170808 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2249 11:23:36.171693 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2252 11:23:36.173145 end: 2 depthcharge-action (duration 00:05:00) [common]
2254 11:23:36.174407 Cleaning after the job
2255 11:23:36.174882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/ramdisk
2256 11:23:36.177213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/kernel
2257 11:23:36.180485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/nfsrootfs
2258 11:23:36.250438 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138812/tftp-deploy-dtstbrdz/modules
2259 11:23:36.250756 start: 4.1 power-off (timeout 00:00:30) [common]
2260 11:23:36.250915 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2261 11:23:36.270057 >> Command sent successfully.
2262 11:23:36.271911 Returned 0 in 0 seconds
2263 11:23:36.373168 end: 4.1 power-off (duration 00:00:00) [common]
2265 11:23:36.374762 start: 4.2 read-feedback (timeout 00:10:00) [common]
2266 11:23:36.375911 Listened to connection for namespace 'common' for up to 1s
2267 11:23:37.332957 Listened to connection for namespace 'common' for up to 1s
2268 11:23:37.335968 Listened to connection for namespace 'common' for up to 1s
2269 11:23:37.339503 Listened to connection for namespace 'common' for up to 1s
2270 11:23:37.343247 Listened to connection for namespace 'common' for up to 1s
2271 11:23:37.345868 Listened to connection for namespace 'common' for up to 1s
2272 11:23:37.349106 Listened to connection for namespace 'common' for up to 1s
2273 11:23:37.352811 Listened to connection for namespace 'common' for up to 1s
2274 11:23:37.355985 Listened to connection for namespace 'common' for up to 1s
2275 11:23:37.359165 Listened to connection for namespace 'common' for up to 1s
2276 11:23:37.362150 Listened to connection for namespace 'common' for up to 1s
2277 11:23:37.365949 Listened to connection for namespace 'common' for up to 1s
2278 11:23:37.369226 Listened to connection for namespace 'common' for up to 1s
2279 11:23:37.372251 Listened to connection for namespace 'common' for up to 1s
2280 11:23:37.375470 Finalising connection for namespace 'common'
2281 11:23:37.375769 Disconnecting from shell: Finalise
2282 11:23:37.375952
2283 11:23:37.477168 end: 4.2 read-feedback (duration 00:00:01) [common]
2284 11:23:37.477813 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8138812
2285 11:23:37.684518 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8138812
2286 11:23:37.684746 JobError: Your job cannot terminate cleanly.