Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 11:22:08.962268 lava-dispatcher, installed at version: 2022.10
2 11:22:08.962447 start: 0 validate
3 11:22:08.962579 Start time: 2022-11-26 11:22:08.962571+00:00 (UTC)
4 11:22:08.962701 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:22:08.962828 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 11:22:09.261075 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:22:09.261837 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:22:09.559703 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:22:09.560398 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:22:09.851299 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:22:09.852036 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 11:22:10.152752 validate duration: 1.19
14 11:22:10.154134 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:22:10.154750 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:22:10.155267 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:22:10.155805 Not decompressing ramdisk as can be used compressed.
18 11:22:10.156282 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/initrd.cpio.gz
19 11:22:10.156672 saving as /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/ramdisk/initrd.cpio.gz
20 11:22:10.157023 total size: 5431622 (5MB)
21 11:22:10.163451 progress 0% (0MB)
22 11:22:10.169353 progress 5% (0MB)
23 11:22:10.170816 progress 10% (0MB)
24 11:22:10.172272 progress 15% (0MB)
25 11:22:10.173829 progress 20% (1MB)
26 11:22:10.175245 progress 25% (1MB)
27 11:22:10.177526 progress 30% (1MB)
28 11:22:10.179598 progress 35% (1MB)
29 11:22:10.182102 progress 40% (2MB)
30 11:22:10.183992 progress 45% (2MB)
31 11:22:10.186325 progress 50% (2MB)
32 11:22:10.188784 progress 55% (2MB)
33 11:22:10.190892 progress 60% (3MB)
34 11:22:10.193198 progress 65% (3MB)
35 11:22:10.195727 progress 70% (3MB)
36 11:22:10.197994 progress 75% (3MB)
37 11:22:10.200156 progress 80% (4MB)
38 11:22:10.202422 progress 85% (4MB)
39 11:22:10.204909 progress 90% (4MB)
40 11:22:10.207254 progress 95% (4MB)
41 11:22:10.209384 progress 100% (5MB)
42 11:22:10.209652 5MB downloaded in 0.05s (98.42MB/s)
43 11:22:10.209802 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:22:10.210046 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:22:10.210133 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:22:10.210219 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:22:10.210322 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 11:22:10.210392 saving as /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/kernel/bzImage
50 11:22:10.210452 total size: 9273344 (8MB)
51 11:22:10.210512 No compression specified
52 11:22:10.212541 progress 0% (0MB)
53 11:22:10.217108 progress 5% (0MB)
54 11:22:10.220494 progress 10% (0MB)
55 11:22:10.224518 progress 15% (1MB)
56 11:22:10.228364 progress 20% (1MB)
57 11:22:10.232497 progress 25% (2MB)
58 11:22:10.236232 progress 30% (2MB)
59 11:22:10.240573 progress 35% (3MB)
60 11:22:10.244335 progress 40% (3MB)
61 11:22:10.248277 progress 45% (4MB)
62 11:22:10.252204 progress 50% (4MB)
63 11:22:10.256100 progress 55% (4MB)
64 11:22:10.260165 progress 60% (5MB)
65 11:22:10.264043 progress 65% (5MB)
66 11:22:10.268030 progress 70% (6MB)
67 11:22:10.271945 progress 75% (6MB)
68 11:22:10.275786 progress 80% (7MB)
69 11:22:10.279671 progress 85% (7MB)
70 11:22:10.283686 progress 90% (7MB)
71 11:22:10.287521 progress 95% (8MB)
72 11:22:10.291368 progress 100% (8MB)
73 11:22:10.291659 8MB downloaded in 0.08s (108.91MB/s)
74 11:22:10.291812 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:22:10.292052 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:22:10.292142 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:22:10.292230 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:22:10.292337 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20221107.1/amd64/full.rootfs.tar.xz
80 11:22:10.292403 saving as /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/nfsrootfs/full.rootfs.tar
81 11:22:10.292464 total size: 123211568 (117MB)
82 11:22:10.292524 Using unxz to decompress xz
83 11:22:10.296731 progress 0% (0MB)
84 11:22:10.735836 progress 5% (5MB)
85 11:22:11.187437 progress 10% (11MB)
86 11:22:11.635993 progress 15% (17MB)
87 11:22:12.086016 progress 20% (23MB)
88 11:22:12.401777 progress 25% (29MB)
89 11:22:12.729749 progress 30% (35MB)
90 11:22:12.974118 progress 35% (41MB)
91 11:22:13.163454 progress 40% (47MB)
92 11:22:13.506074 progress 45% (52MB)
93 11:22:13.852053 progress 50% (58MB)
94 11:22:14.172748 progress 55% (64MB)
95 11:22:14.512207 progress 60% (70MB)
96 11:22:14.830283 progress 65% (76MB)
97 11:22:15.195584 progress 70% (82MB)
98 11:22:15.588587 progress 75% (88MB)
99 11:22:15.986217 progress 80% (94MB)
100 11:22:16.096911 progress 85% (99MB)
101 11:22:16.257956 progress 90% (105MB)
102 11:22:16.577396 progress 95% (111MB)
103 11:22:16.932069 progress 100% (117MB)
104 11:22:16.936914 117MB downloaded in 6.64s (17.68MB/s)
105 11:22:16.937169 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:22:16.937431 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:22:16.937595 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:22:16.937687 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:22:16.937802 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 11:22:16.937872 saving as /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/modules/modules.tar
112 11:22:16.937934 total size: 64696 (0MB)
113 11:22:16.937997 Using unxz to decompress xz
114 11:22:16.943312 progress 50% (0MB)
115 11:22:16.943679 progress 100% (0MB)
116 11:22:16.947872 0MB downloaded in 0.01s (6.21MB/s)
117 11:22:16.948102 end: 1.4.1 http-download (duration 00:00:00) [common]
119 11:22:16.948392 end: 1.4 download-retry (duration 00:00:00) [common]
120 11:22:16.948491 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 11:22:16.948590 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 11:22:18.624652 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8138831/extract-nfsrootfs-65zlu5iu
123 11:22:18.624853 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 11:22:18.624959 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 11:22:18.625149 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1
126 11:22:18.625252 makedir: /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin
127 11:22:18.625338 makedir: /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/tests
128 11:22:18.625423 makedir: /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/results
129 11:22:18.625555 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-add-keys
130 11:22:18.625683 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-add-sources
131 11:22:18.625798 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-background-process-start
132 11:22:18.625908 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-background-process-stop
133 11:22:18.626018 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-common-functions
134 11:22:18.626126 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-echo-ipv4
135 11:22:18.626234 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-install-packages
136 11:22:18.626341 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-installed-packages
137 11:22:18.626447 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-os-build
138 11:22:18.626555 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-probe-channel
139 11:22:18.626661 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-probe-ip
140 11:22:18.626770 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-target-ip
141 11:22:18.626876 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-target-mac
142 11:22:18.626983 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-target-storage
143 11:22:18.627106 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-case
144 11:22:18.627216 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-event
145 11:22:18.627322 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-feedback
146 11:22:18.627452 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-raise
147 11:22:18.627590 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-reference
148 11:22:18.627746 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-runner
149 11:22:18.627859 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-set
150 11:22:18.627990 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-test-shell
151 11:22:18.628113 Updating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-install-packages (oe)
152 11:22:18.628225 Updating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/bin/lava-installed-packages (oe)
153 11:22:18.628319 Creating /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/environment
154 11:22:18.628402 LAVA metadata
155 11:22:18.628468 - LAVA_JOB_ID=8138831
156 11:22:18.628532 - LAVA_DISPATCHER_IP=192.168.201.1
157 11:22:18.628669 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 11:22:18.628737 skipped lava-vland-overlay
159 11:22:18.628820 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 11:22:18.628901 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 11:22:18.628963 skipped lava-multinode-overlay
162 11:22:18.629040 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 11:22:18.629192 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 11:22:18.629276 Loading test definitions
165 11:22:18.629367 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 11:22:18.629438 Using /lava-8138831 at stage 0
167 11:22:18.629837 Fetching tests from https://github.com/kernelci/test-definitions
168 11:22:18.629921 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/0/tests/0_ltp-timers'
169 11:22:27.055476 Running '/usr/bin/git checkout kernelci.org
170 11:22:27.128426 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 11:22:27.129094 uuid=8138831_1.5.2.3.1 testdef=None
172 11:22:27.129255 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
174 11:22:27.129569 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
175 11:22:27.130239 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 11:22:27.130474 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
178 11:22:27.131319 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 11:22:27.131565 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
181 11:22:27.132320 runner path: /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/0/tests/0_ltp-timers test_uuid 8138831_1.5.2.3.1
182 11:22:27.132410 GRP_TEST='TMR'
183 11:22:27.132476 SKIPFILE='skipfile-lkft.yaml'
184 11:22:27.132538 SKIP_INSTALL='true'
185 11:22:27.132597 TST_CMDFILES=''
186 11:22:27.132729 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 11:22:27.132957 Creating lava-test-runner.conf files
189 11:22:27.133027 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8138831/lava-overlay-ocd0xhs1/lava-8138831/0 for stage 0
190 11:22:27.133143 - 0_ltp-timers
191 11:22:27.133241 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
192 11:22:27.133330 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
193 11:22:34.412003 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 11:22:34.412175 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
195 11:22:34.412274 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 11:22:34.412377 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
197 11:22:34.412479 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
198 11:22:34.513024 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 11:22:34.513372 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
200 11:22:34.513511 extracting modules file /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138831/extract-nfsrootfs-65zlu5iu
201 11:22:34.517583 extracting modules file /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138831/extract-overlay-ramdisk-wfqkzkjb/ramdisk
202 11:22:34.521205 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 11:22:34.521314 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
204 11:22:34.521398 [common] Applying overlay to NFS
205 11:22:34.521470 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138831/compress-overlay-cdobykec/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8138831/extract-nfsrootfs-65zlu5iu
206 11:22:34.971080 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 11:22:34.971250 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
208 11:22:34.971349 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 11:22:34.971443 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
210 11:22:34.971527 Building ramdisk /var/lib/lava/dispatcher/tmp/8138831/extract-overlay-ramdisk-wfqkzkjb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8138831/extract-overlay-ramdisk-wfqkzkjb/ramdisk
211 11:22:35.005329 >> 24775 blocks
212 11:22:35.466618 rename /var/lib/lava/dispatcher/tmp/8138831/extract-overlay-ramdisk-wfqkzkjb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
213 11:22:35.467024 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
214 11:22:35.467143 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
215 11:22:35.467247 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
216 11:22:35.467343 No mkimage arch provided, not using FIT.
217 11:22:35.467433 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 11:22:35.467516 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 11:22:35.467611 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
220 11:22:35.467706 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
221 11:22:35.467787 No LXC device requested
222 11:22:35.467869 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 11:22:35.467959 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
224 11:22:35.468039 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 11:22:35.468112 Checking files for TFTP limit of 4294967296 bytes.
226 11:22:35.468498 end: 1 tftp-deploy (duration 00:00:25) [common]
227 11:22:35.468599 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 11:22:35.468694 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 11:22:35.468824 substitutions:
230 11:22:35.468892 - {DTB}: None
231 11:22:35.468957 - {INITRD}: 8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
232 11:22:35.469017 - {KERNEL}: 8138831/tftp-deploy-845o_du_/kernel/bzImage
233 11:22:35.469076 - {LAVA_MAC}: None
234 11:22:35.469133 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8138831/extract-nfsrootfs-65zlu5iu
235 11:22:35.469190 - {NFS_SERVER_IP}: 192.168.201.1
236 11:22:35.469246 - {PRESEED_CONFIG}: None
237 11:22:35.469303 - {PRESEED_LOCAL}: None
238 11:22:35.469358 - {RAMDISK}: 8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
239 11:22:35.469413 - {ROOT_PART}: None
240 11:22:35.469468 - {ROOT}: None
241 11:22:35.469566 - {SERVER_IP}: 192.168.201.1
242 11:22:35.469622 - {TEE}: None
243 11:22:35.469677 Parsed boot commands:
244 11:22:35.469732 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 11:22:35.469885 Parsed boot commands: tftpboot 192.168.201.1 8138831/tftp-deploy-845o_du_/kernel/bzImage 8138831/tftp-deploy-845o_du_/kernel/cmdline 8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
246 11:22:35.469974 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 11:22:35.470059 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 11:22:35.470156 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 11:22:35.470241 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 11:22:35.470312 Not connected, no need to disconnect.
251 11:22:35.470390 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 11:22:35.470471 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 11:22:35.470537 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 11:22:35.473228 Setting prompt string to ['lava-test: # ']
255 11:22:35.473537 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 11:22:35.473646 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 11:22:35.473746 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 11:22:35.473839 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 11:22:35.474012 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 11:22:35.493327 >> Command sent successfully.
261 11:22:35.495208 Returned 0 in 0 seconds
262 11:22:35.596329 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 11:22:35.597685 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 11:22:35.598158 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 11:22:35.598566 Setting prompt string to 'Starting depthcharge on Helios...'
267 11:22:35.598887 Changing prompt to 'Starting depthcharge on Helios...'
268 11:22:35.599210 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 11:22:35.600374 [Enter `^Ec?' for help]
270 11:22:41.950159
271 11:22:41.950814
272 11:22:41.960081 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 11:22:41.963819 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 11:22:41.970367 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 11:22:41.973433 CPU: AES supported, TXT NOT supported, VT supported
276 11:22:41.980515 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 11:22:41.983510 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 11:22:41.990311 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 11:22:41.993873 VBOOT: Loading verstage.
280 11:22:41.997129 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 11:22:42.003721 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 11:22:42.007197 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 11:22:42.009993 CBFS @ c08000 size 3f8000
284 11:22:42.017203 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 11:22:42.020562 CBFS: Locating 'fallback/verstage'
286 11:22:42.023558 CBFS: Found @ offset 10fb80 size 1072c
287 11:22:42.027766
288 11:22:42.028350
289 11:22:42.037567 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 11:22:42.051063 Probing TPM: . done!
291 11:22:42.054318 TPM ready after 0 ms
292 11:22:42.057852 Connected to device vid:did:rid of 1ae0:0028:00
293 11:22:42.068280 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 11:22:42.071895 Initialized TPM device CR50 revision 0
295 11:22:42.114181 tlcl_send_startup: Startup return code is 0
296 11:22:42.114760 TPM: setup succeeded
297 11:22:42.126799 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 11:22:42.130746 Chrome EC: UHEPI supported
299 11:22:42.134735 Phase 1
300 11:22:42.137100 FMAP: area GBB found @ c05000 (12288 bytes)
301 11:22:42.144146 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 11:22:42.144725 Phase 2
303 11:22:42.147600
304 11:22:42.148183 Phase 3
305 11:22:42.150701 FMAP: area GBB found @ c05000 (12288 bytes)
306 11:22:42.158012 VB2:vb2_report_dev_firmware() This is developer signed firmware
307 11:22:42.164160 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 11:22:42.167209 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 11:22:42.173742 VB2:vb2_verify_keyblock() Checking keyblock signature...
310 11:22:42.189809 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 11:22:42.192853 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
312 11:22:42.199401 VB2:vb2_verify_fw_preamble() Verifying preamble.
313 11:22:42.203724 Phase 4
314 11:22:42.206885 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
315 11:22:42.213419 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
316 11:22:42.393033 VB2:vb2_rsa_verify_digest() Digest check failed!
317 11:22:42.396679 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
318 11:22:42.399842
319 11:22:42.400412 Saving nvdata
320 11:22:42.403347 Reboot requested (10020007)
321 11:22:42.406205 board_reset() called!
322 11:22:42.406700 full_reset() called!
323 11:22:46.917389
324 11:22:46.918015
325 11:22:46.927324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
326 11:22:46.930923 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
327 11:22:46.937755 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
328 11:22:46.940300 CPU: AES supported, TXT NOT supported, VT supported
329 11:22:46.947107 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
330 11:22:46.950525 PCH: device id 0284 (rev 00) is Cometlake-U Premium
331 11:22:46.957311 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
332 11:22:46.960789 VBOOT: Loading verstage.
333 11:22:46.963575 FMAP: Found "FLASH" version 1.1 at 0xc04000.
334 11:22:46.970428 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
335 11:22:46.977452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 11:22:46.978063 CBFS @ c08000 size 3f8000
337 11:22:46.984322 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
338 11:22:46.986682 CBFS: Locating 'fallback/verstage'
339 11:22:46.990420 CBFS: Found @ offset 10fb80 size 1072c
340 11:22:46.994045
341 11:22:46.994531
342 11:22:47.004076 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
343 11:22:47.018523 Probing TPM: . done!
344 11:22:47.022463 TPM ready after 0 ms
345 11:22:47.025737 Connected to device vid:did:rid of 1ae0:0028:00
346 11:22:47.035470 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
347 11:22:47.038993 Initialized TPM device CR50 revision 0
348 11:22:47.081440 tlcl_send_startup: Startup return code is 0
349 11:22:47.082061 TPM: setup succeeded
350 11:22:47.093910 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 11:22:47.097796 Chrome EC: UHEPI supported
352 11:22:47.100995 Phase 1
353 11:22:47.104300 FMAP: area GBB found @ c05000 (12288 bytes)
354 11:22:47.111116 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
355 11:22:47.118066 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
356 11:22:47.121284 Recovery requested (1009000e)
357 11:22:47.121907 Saving nvdata
358 11:22:47.127255
359 11:22:47.132788 tlcl_extend: response is 0
360 11:22:47.141564 tlcl_extend: response is 0
361 11:22:47.148906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 11:22:47.152205 CBFS @ c08000 size 3f8000
363 11:22:47.158910 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 11:22:47.162783 CBFS: Locating 'fallback/romstage'
365 11:22:47.165458 CBFS: Found @ offset 80 size 145fc
366 11:22:47.168581 Accumulated console time in verstage 98 ms
367 11:22:47.169167
368 11:22:47.169586
369 11:22:47.181748 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
370 11:22:47.188212 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
371 11:22:47.191501 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
372 11:22:47.194881 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
373 11:22:47.201632 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
374 11:22:47.205028 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
375 11:22:47.208247 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
376 11:22:47.211769 TCO_STS: 0000 0000
377 11:22:47.214781 GEN_PMCON: e0015238 00000200
378 11:22:47.217948 GBLRST_CAUSE: 00000000 00000000
379 11:22:47.218425 prev_sleep_state 5
380 11:22:47.221616 Boot Count incremented to 46816
381 11:22:47.228328 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 11:22:47.231610 CBFS @ c08000 size 3f8000
383 11:22:47.238212 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
384 11:22:47.238799 CBFS: Locating 'fspm.bin'
385 11:22:47.241333 CBFS: Found @ offset 5ffc0 size 71000
386 11:22:47.245248
387 11:22:47.247873 Chrome EC: UHEPI supported
388 11:22:47.255133 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
389 11:22:47.258187 Probing TPM: done!
390 11:22:47.265316 Connected to device vid:did:rid of 1ae0:0028:00
391 11:22:47.274792 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
392 11:22:47.281636 Initialized TPM device CR50 revision 0
393 11:22:47.290106 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
394 11:22:47.296691 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
395 11:22:47.300130 MRC cache found, size 1948
396 11:22:47.303124 bootmode is set to: 2
397 11:22:47.306555 PRMRR disabled by config.
398 11:22:47.307047 SPD INDEX = 1
399 11:22:47.313179 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 11:22:47.316226 CBFS @ c08000 size 3f8000
401 11:22:47.322993 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 11:22:47.323592 CBFS: Locating 'spd.bin'
403 11:22:47.326771 CBFS: Found @ offset 5fb80 size 400
404 11:22:47.329834 SPD: module type is LPDDR3
405 11:22:47.333680 SPD: module part is
406 11:22:47.339788 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
407 11:22:47.342821 SPD: device width 4 bits, bus width 8 bits
408 11:22:47.345929 SPD: module size is 4096 MB (per channel)
409 11:22:47.349173 memory slot: 0 configuration done.
410 11:22:47.353348 memory slot: 2 configuration done.
411 11:22:47.404734 CBMEM:
412 11:22:47.407926 IMD: root @ 99fff000 254 entries.
413 11:22:47.411255 IMD: root @ 99ffec00 62 entries.
414 11:22:47.414233 External stage cache:
415 11:22:47.417933 IMD: root @ 9abff000 254 entries.
416 11:22:47.420927 IMD: root @ 9abfec00 62 entries.
417 11:22:47.424709 Chrome EC: clear events_b mask to 0x0000000020004000
418 11:22:47.440317 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 11:22:47.454049 tlcl_write: response is 0
420 11:22:47.462810 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 11:22:47.469569 MRC: TPM MRC hash updated successfully.
422 11:22:47.470171 2 DIMMs found
423 11:22:47.472982 SMM Memory Map
424 11:22:47.476462 SMRAM : 0x9a000000 0x1000000
425 11:22:47.479241 Subregion 0: 0x9a000000 0xa00000
426 11:22:47.483180 Subregion 1: 0x9aa00000 0x200000
427 11:22:47.486658 Subregion 2: 0x9ac00000 0x400000
428 11:22:47.489433 top_of_ram = 0x9a000000
429 11:22:47.493196 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 11:22:47.499799 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 11:22:47.502294 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 11:22:47.509651 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 11:22:47.512917 CBFS @ c08000 size 3f8000
434 11:22:47.516007 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 11:22:47.519747 CBFS: Locating 'fallback/postcar'
436 11:22:47.522860 CBFS: Found @ offset 107000 size 4b44
437 11:22:47.526075
438 11:22:47.529367 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 11:22:47.542016 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 11:22:47.545064 Processing 180 relocs. Offset value of 0x97c0c000
441 11:22:47.553844 Accumulated console time in romstage 286 ms
442 11:22:47.554424
443 11:22:47.554815
444 11:22:47.563940 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 11:22:47.570359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 11:22:47.573373 CBFS @ c08000 size 3f8000
447 11:22:47.577596 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 11:22:47.580083 CBFS: Locating 'fallback/ramstage'
449 11:22:47.583456
450 11:22:47.587130 CBFS: Found @ offset 43380 size 1b9e8
451 11:22:47.593700 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 11:22:47.625695 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 11:22:47.629069 Processing 3976 relocs. Offset value of 0x98db0000
454 11:22:47.635635 Accumulated console time in postcar 52 ms
455 11:22:47.636119
456 11:22:47.636499
457 11:22:47.645812 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 11:22:47.652122 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 11:22:47.655386 WARNING: RO_VPD is uninitialized or empty.
460 11:22:47.658669 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 11:22:47.666001 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 11:22:47.666579 Normal boot.
463 11:22:47.672203 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 11:22:47.675351 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 11:22:47.678209 CBFS @ c08000 size 3f8000
466 11:22:47.686051 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 11:22:47.688698 CBFS: Locating 'cpu_microcode_blob.bin'
468 11:22:47.692233 CBFS: Found @ offset 14700 size 2ec00
469 11:22:47.695479 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 11:22:47.698781 Skip microcode update
471 11:22:47.704762 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 11:22:47.705338 CBFS @ c08000 size 3f8000
473 11:22:47.711264 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 11:22:47.714651 CBFS: Locating 'fsps.bin'
475 11:22:47.718110 CBFS: Found @ offset d1fc0 size 35000
476 11:22:47.743583 Detected 4 core, 8 thread CPU.
477 11:22:47.747389 Setting up SMI for CPU
478 11:22:47.750844 IED base = 0x9ac00000
479 11:22:47.751487 IED size = 0x00400000
480 11:22:47.754090 Will perform SMM setup.
481 11:22:47.760379 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 11:22:47.766940 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 11:22:47.770374 Processing 16 relocs. Offset value of 0x00030000
484 11:22:47.774084 Attempting to start 7 APs
485 11:22:47.777146 Waiting for 10ms after sending INIT.
486 11:22:47.794036 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
487 11:22:47.794751 done.
488 11:22:47.796986 AP: slot 6 apic_id 4.
489 11:22:47.800336 AP: slot 7 apic_id 5.
490 11:22:47.803280 Waiting for 2nd SIPI to complete...done.
491 11:22:47.807223 AP: slot 5 apic_id 2.
492 11:22:47.807820 AP: slot 4 apic_id 3.
493 11:22:47.810018 AP: slot 3 apic_id 7.
494 11:22:47.813370 AP: slot 2 apic_id 6.
495 11:22:47.820669 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 11:22:47.823811 Processing 13 relocs. Offset value of 0x00038000
497 11:22:47.826560
498 11:22:47.830389 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 11:22:47.836806 Installing SMM handler to 0x9a000000
500 11:22:47.843255 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 11:22:47.846304 Processing 658 relocs. Offset value of 0x9a010000
502 11:22:47.849645
503 11:22:47.857071 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
504 11:22:47.860408 Processing 13 relocs. Offset value of 0x9a008000
505 11:22:47.866456 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
506 11:22:47.872984 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
507 11:22:47.880335 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
508 11:22:47.882873 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
509 11:22:47.890110 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
510 11:22:47.896199 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
511 11:22:47.899256 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
512 11:22:47.905949 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
513 11:22:47.910055 Clearing SMI status registers
514 11:22:47.912999 SMI_STS: PM1
515 11:22:47.913722 PM1_STS: PWRBTN
516 11:22:47.916942 TCO_STS: SECOND_TO
517 11:22:47.919777 New SMBASE 0x9a000000
518 11:22:47.923314 In relocation handler: CPU 0
519 11:22:47.926462 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
520 11:22:47.929614 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 11:22:47.933285 Relocation complete.
522 11:22:47.936143 New SMBASE 0x99fffc00
523 11:22:47.936635 In relocation handler: CPU 1
524 11:22:47.939851
525 11:22:47.943286 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
526 11:22:47.946235 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 11:22:47.949430 Relocation complete.
528 11:22:47.952861 New SMBASE 0x99fff000
529 11:22:47.953349 In relocation handler: CPU 4
530 11:22:47.959435 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
531 11:22:47.962733 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 11:22:47.966079 Relocation complete.
533 11:22:47.966676 New SMBASE 0x99ffec00
534 11:22:47.969352
535 11:22:47.969979 In relocation handler: CPU 5
536 11:22:47.976236 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 11:22:47.979238 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 11:22:47.982367 Relocation complete.
539 11:22:47.982958 New SMBASE 0x99ffe800
540 11:22:47.986139 In relocation handler: CPU 6
541 11:22:47.992701 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
542 11:22:47.996466 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 11:22:47.999271 Relocation complete.
544 11:22:47.999873 New SMBASE 0x99ffe400
545 11:22:48.002547 In relocation handler: CPU 7
546 11:22:48.005903 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
547 11:22:48.009097
548 11:22:48.012885 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 11:22:48.015710 Relocation complete.
550 11:22:48.016296 New SMBASE 0x99fff400
551 11:22:48.019632 In relocation handler: CPU 3
552 11:22:48.022363 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
553 11:22:48.029143 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 11:22:48.032195 Relocation complete.
555 11:22:48.032771 New SMBASE 0x99fff800
556 11:22:48.035972 In relocation handler: CPU 2
557 11:22:48.039125 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
558 11:22:48.045509 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 11:22:48.048537 Relocation complete.
560 11:22:48.049024 Initializing CPU #0
561 11:22:48.052134 CPU: vendor Intel device 806ec
562 11:22:48.055267 CPU: family 06, model 8e, stepping 0c
563 11:22:48.058705 Clearing out pending MCEs
564 11:22:48.062024 Setting up local APIC...
565 11:22:48.065919 apic_id: 0x00 done.
566 11:22:48.066480 Turbo is available but hidden
567 11:22:48.069056
568 11:22:48.069680 Turbo is available and visible
569 11:22:48.072075 VMX status: enabled
570 11:22:48.075668 IA32_FEATURE_CONTROL status: locked
571 11:22:48.078512 Skip microcode update
572 11:22:48.079085 CPU #0 initialized
573 11:22:48.081936 Initializing CPU #5
574 11:22:48.085203 Initializing CPU #4
575 11:22:48.088259 CPU: vendor Intel device 806ec
576 11:22:48.092087 CPU: family 06, model 8e, stepping 0c
577 11:22:48.095087 CPU: vendor Intel device 806ec
578 11:22:48.098227 CPU: family 06, model 8e, stepping 0c
579 11:22:48.101530 Clearing out pending MCEs
580 11:22:48.104777 Clearing out pending MCEs
581 11:22:48.105360 Setting up local APIC...
582 11:22:48.108249 Initializing CPU #1
583 11:22:48.111784 Initializing CPU #3
584 11:22:48.112359 Initializing CPU #6
585 11:22:48.114771 Initializing CPU #7
586 11:22:48.118082 CPU: vendor Intel device 806ec
587 11:22:48.121170 CPU: family 06, model 8e, stepping 0c
588 11:22:48.125031 Clearing out pending MCEs
589 11:22:48.125581 Initializing CPU #2
590 11:22:48.128787 Setting up local APIC...
591 11:22:48.131134 apic_id: 0x02 done.
592 11:22:48.131715 Setting up local APIC...
593 11:22:48.134475 apic_id: 0x01 done.
594 11:22:48.138186 apic_id: 0x03 done.
595 11:22:48.138766 VMX status: enabled
596 11:22:48.141923 VMX status: enabled
597 11:22:48.144732 IA32_FEATURE_CONTROL status: locked
598 11:22:48.148057 IA32_FEATURE_CONTROL status: locked
599 11:22:48.151434 Skip microcode update
600 11:22:48.151946 Skip microcode update
601 11:22:48.154686 CPU #5 initialized
602 11:22:48.158104 CPU #4 initialized
603 11:22:48.158724 VMX status: enabled
604 11:22:48.161156 CPU: vendor Intel device 806ec
605 11:22:48.164883 CPU: family 06, model 8e, stepping 0c
606 11:22:48.167869 IA32_FEATURE_CONTROL status: locked
607 11:22:48.171040 Clearing out pending MCEs
608 11:22:48.174757 CPU: vendor Intel device 806ec
609 11:22:48.177524 CPU: family 06, model 8e, stepping 0c
610 11:22:48.181303 Setting up local APIC...
611 11:22:48.184415 Skip microcode update
612 11:22:48.184988 apic_id: 0x06 done.
613 11:22:48.187630 Clearing out pending MCEs
614 11:22:48.190894 VMX status: enabled
615 11:22:48.194265 CPU: vendor Intel device 806ec
616 11:22:48.198378 CPU: family 06, model 8e, stepping 0c
617 11:22:48.201248 CPU: vendor Intel device 806ec
618 11:22:48.204199 CPU: family 06, model 8e, stepping 0c
619 11:22:48.207693 Clearing out pending MCEs
620 11:22:48.211272 Clearing out pending MCEs
621 11:22:48.211862 Setting up local APIC...
622 11:22:48.214154 IA32_FEATURE_CONTROL status: locked
623 11:22:48.217190 Setting up local APIC...
624 11:22:48.220758 Setting up local APIC...
625 11:22:48.223885 Skip microcode update
626 11:22:48.224369 CPU #1 initialized
627 11:22:48.227719 apic_id: 0x04 done.
628 11:22:48.228206 apic_id: 0x05 done.
629 11:22:48.231346
630 11:22:48.231939 VMX status: enabled
631 11:22:48.234360 VMX status: enabled
632 11:22:48.237604 IA32_FEATURE_CONTROL status: locked
633 11:22:48.240934 IA32_FEATURE_CONTROL status: locked
634 11:22:48.244489 Skip microcode update
635 11:22:48.245075 Skip microcode update
636 11:22:48.247368 CPU #6 initialized
637 11:22:48.247856 CPU #7 initialized
638 11:22:48.250573 CPU #2 initialized
639 11:22:48.253672 apic_id: 0x07 done.
640 11:22:48.254160 VMX status: enabled
641 11:22:48.257548 IA32_FEATURE_CONTROL status: locked
642 11:22:48.260678 Skip microcode update
643 11:22:48.264166 CPU #3 initialized
644 11:22:48.267562 bsp_do_flight_plan done after 462 msecs.
645 11:22:48.270785 CPU: frequency set to 4200 MHz
646 11:22:48.271374 Enabling SMIs.
647 11:22:48.274427 Locking SMM.
648 11:22:48.288649 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 11:22:48.291552 CBFS @ c08000 size 3f8000
650 11:22:48.294610 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 11:22:48.298147
652 11:22:48.298736 CBFS: Locating 'vbt.bin'
653 11:22:48.301345 CBFS: Found @ offset 5f5c0 size 499
654 11:22:48.308397 Found a VBT of 4608 bytes after decompression
655 11:22:48.493396 Display FSP Version Info HOB
656 11:22:48.496473 Reference Code - CPU = 9.0.1e.30
657 11:22:48.499707 uCode Version = 0.0.0.ca
658 11:22:48.502933 TXT ACM version = ff.ff.ff.ffff
659 11:22:48.506467 Display FSP Version Info HOB
660 11:22:48.510052 Reference Code - ME = 9.0.1e.30
661 11:22:48.513156 MEBx version = 0.0.0.0
662 11:22:48.516495 ME Firmware Version = Consumer SKU
663 11:22:48.520173 Display FSP Version Info HOB
664 11:22:48.523026 Reference Code - CML PCH = 9.0.1e.30
665 11:22:48.526394 PCH-CRID Status = Disabled
666 11:22:48.529508 PCH-CRID Original Value = ff.ff.ff.ffff
667 11:22:48.532903 PCH-CRID New Value = ff.ff.ff.ffff
668 11:22:48.536455 OPROM - RST - RAID = ff.ff.ff.ffff
669 11:22:48.539207 ChipsetInit Base Version = ff.ff.ff.ffff
670 11:22:48.542489 ChipsetInit Oem Version = ff.ff.ff.ffff
671 11:22:48.546326 Display FSP Version Info HOB
672 11:22:48.552961 Reference Code - SA - System Agent = 9.0.1e.30
673 11:22:48.556687 Reference Code - MRC = 0.7.1.6c
674 11:22:48.557290 SA - PCIe Version = 9.0.1e.30
675 11:22:48.559086 SA-CRID Status = Disabled
676 11:22:48.562658 SA-CRID Original Value = 0.0.0.c
677 11:22:48.566002 SA-CRID New Value = 0.0.0.c
678 11:22:48.568902 OPROM - VBIOS = ff.ff.ff.ffff
679 11:22:48.572559 RTC Init
680 11:22:48.575939 Set power on after power failure.
681 11:22:48.576530 Disabling Deep S3
682 11:22:48.578791 Disabling Deep S3
683 11:22:48.579316 Disabling Deep S4
684 11:22:48.582276 Disabling Deep S4
685 11:22:48.582761 Disabling Deep S5
686 11:22:48.585389 Disabling Deep S5
687 11:22:48.592653 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
688 11:22:48.593243 Enumerating buses...
689 11:22:48.598893 Show all devs... Before device enumeration.
690 11:22:48.599482 Root Device: enabled 1
691 11:22:48.602160 CPU_CLUSTER: 0: enabled 1
692 11:22:48.605699 DOMAIN: 0000: enabled 1
693 11:22:48.609022 APIC: 00: enabled 1
694 11:22:48.609634 PCI: 00:00.0: enabled 1
695 11:22:48.612220 PCI: 00:02.0: enabled 1
696 11:22:48.615672 PCI: 00:04.0: enabled 0
697 11:22:48.616245 PCI: 00:05.0: enabled 0
698 11:22:48.619109
699 11:22:48.619597 PCI: 00:12.0: enabled 1
700 11:22:48.622609 PCI: 00:12.5: enabled 0
701 11:22:48.625548 PCI: 00:12.6: enabled 0
702 11:22:48.626122 PCI: 00:14.0: enabled 1
703 11:22:48.629093 PCI: 00:14.1: enabled 0
704 11:22:48.632360 PCI: 00:14.3: enabled 1
705 11:22:48.635815 PCI: 00:14.5: enabled 0
706 11:22:48.636299 PCI: 00:15.0: enabled 1
707 11:22:48.638640 PCI: 00:15.1: enabled 1
708 11:22:48.642072 PCI: 00:15.2: enabled 0
709 11:22:48.645560 PCI: 00:15.3: enabled 0
710 11:22:48.646142 PCI: 00:16.0: enabled 1
711 11:22:48.648731 PCI: 00:16.1: enabled 0
712 11:22:48.652610 PCI: 00:16.2: enabled 0
713 11:22:48.653149 PCI: 00:16.3: enabled 0
714 11:22:48.655426 PCI: 00:16.4: enabled 0
715 11:22:48.658926 PCI: 00:16.5: enabled 0
716 11:22:48.661799 PCI: 00:17.0: enabled 1
717 11:22:48.662302 PCI: 00:19.0: enabled 1
718 11:22:48.665517 PCI: 00:19.1: enabled 0
719 11:22:48.668993 PCI: 00:19.2: enabled 0
720 11:22:48.672121 PCI: 00:1a.0: enabled 0
721 11:22:48.672690 PCI: 00:1c.0: enabled 0
722 11:22:48.676003 PCI: 00:1c.1: enabled 0
723 11:22:48.678529 PCI: 00:1c.2: enabled 0
724 11:22:48.682216 PCI: 00:1c.3: enabled 0
725 11:22:48.682744 PCI: 00:1c.4: enabled 0
726 11:22:48.685262 PCI: 00:1c.5: enabled 0
727 11:22:48.689471 PCI: 00:1c.6: enabled 0
728 11:22:48.690085 PCI: 00:1c.7: enabled 0
729 11:22:48.691789
730 11:22:48.692366 PCI: 00:1d.0: enabled 1
731 11:22:48.695182 PCI: 00:1d.1: enabled 0
732 11:22:48.698445 PCI: 00:1d.2: enabled 0
733 11:22:48.699023 PCI: 00:1d.3: enabled 0
734 11:22:48.702214 PCI: 00:1d.4: enabled 0
735 11:22:48.705443 PCI: 00:1d.5: enabled 1
736 11:22:48.708574 PCI: 00:1e.0: enabled 1
737 11:22:48.709152 PCI: 00:1e.1: enabled 0
738 11:22:48.711827 PCI: 00:1e.2: enabled 1
739 11:22:48.715604 PCI: 00:1e.3: enabled 1
740 11:22:48.718576 PCI: 00:1f.0: enabled 1
741 11:22:48.719293 PCI: 00:1f.1: enabled 1
742 11:22:48.721732 PCI: 00:1f.2: enabled 1
743 11:22:48.725381 PCI: 00:1f.3: enabled 1
744 11:22:48.725987 PCI: 00:1f.4: enabled 1
745 11:22:48.728298
746 11:22:48.728878 PCI: 00:1f.5: enabled 1
747 11:22:48.732024 PCI: 00:1f.6: enabled 0
748 11:22:48.736083 USB0 port 0: enabled 1
749 11:22:48.736666 I2C: 00:15: enabled 1
750 11:22:48.738300 I2C: 00:5d: enabled 1
751 11:22:48.741532 GENERIC: 0.0: enabled 1
752 11:22:48.742069 I2C: 00:1a: enabled 1
753 11:22:48.744943 I2C: 00:38: enabled 1
754 11:22:48.748220 I2C: 00:39: enabled 1
755 11:22:48.748820 I2C: 00:3a: enabled 1
756 11:22:48.751373 I2C: 00:3b: enabled 1
757 11:22:48.754722 PCI: 00:00.0: enabled 1
758 11:22:48.755200 SPI: 00: enabled 1
759 11:22:48.758185 SPI: 01: enabled 1
760 11:22:48.761536 PNP: 0c09.0: enabled 1
761 11:22:48.762128 USB2 port 0: enabled 1
762 11:22:48.764569 USB2 port 1: enabled 1
763 11:22:48.768161 USB2 port 2: enabled 0
764 11:22:48.771634 USB2 port 3: enabled 0
765 11:22:48.772251 USB2 port 5: enabled 0
766 11:22:48.774579 USB2 port 6: enabled 1
767 11:22:48.777906 USB2 port 9: enabled 1
768 11:22:48.778386 USB3 port 0: enabled 1
769 11:22:48.781067 USB3 port 1: enabled 1
770 11:22:48.784696 USB3 port 2: enabled 1
771 11:22:48.788219 USB3 port 3: enabled 1
772 11:22:48.788805 USB3 port 4: enabled 0
773 11:22:48.791321 APIC: 01: enabled 1
774 11:22:48.791807 APIC: 06: enabled 1
775 11:22:48.794537 APIC: 07: enabled 1
776 11:22:48.798160 APIC: 03: enabled 1
777 11:22:48.798743 APIC: 02: enabled 1
778 11:22:48.801515 APIC: 04: enabled 1
779 11:22:48.804807 APIC: 05: enabled 1
780 11:22:48.805392 Compare with tree...
781 11:22:48.808054 Root Device: enabled 1
782 11:22:48.811053 CPU_CLUSTER: 0: enabled 1
783 11:22:48.811639 APIC: 00: enabled 1
784 11:22:48.814789 APIC: 01: enabled 1
785 11:22:48.817854 APIC: 06: enabled 1
786 11:22:48.818443 APIC: 07: enabled 1
787 11:22:48.820998 APIC: 03: enabled 1
788 11:22:48.824293 APIC: 02: enabled 1
789 11:22:48.824870 APIC: 04: enabled 1
790 11:22:48.827735 APIC: 05: enabled 1
791 11:22:48.830952 DOMAIN: 0000: enabled 1
792 11:22:48.834585 PCI: 00:00.0: enabled 1
793 11:22:48.835176 PCI: 00:02.0: enabled 1
794 11:22:48.837909 PCI: 00:04.0: enabled 0
795 11:22:48.840963 PCI: 00:05.0: enabled 0
796 11:22:48.843983 PCI: 00:12.0: enabled 1
797 11:22:48.848066 PCI: 00:12.5: enabled 0
798 11:22:48.848587 PCI: 00:12.6: enabled 0
799 11:22:48.850577 PCI: 00:14.0: enabled 1
800 11:22:48.854198 USB0 port 0: enabled 1
801 11:22:48.857341 USB2 port 0: enabled 1
802 11:22:48.861006 USB2 port 1: enabled 1
803 11:22:48.861627 USB2 port 2: enabled 0
804 11:22:48.864426 USB2 port 3: enabled 0
805 11:22:48.867233 USB2 port 5: enabled 0
806 11:22:48.870838 USB2 port 6: enabled 1
807 11:22:48.874281 USB2 port 9: enabled 1
808 11:22:48.877238 USB3 port 0: enabled 1
809 11:22:48.877865 USB3 port 1: enabled 1
810 11:22:48.880741 USB3 port 2: enabled 1
811 11:22:48.884553 USB3 port 3: enabled 1
812 11:22:48.887373 USB3 port 4: enabled 0
813 11:22:48.890898 PCI: 00:14.1: enabled 0
814 11:22:48.891473 PCI: 00:14.3: enabled 1
815 11:22:48.894381 PCI: 00:14.5: enabled 0
816 11:22:48.897569 PCI: 00:15.0: enabled 1
817 11:22:48.900673 I2C: 00:15: enabled 1
818 11:22:48.904365 PCI: 00:15.1: enabled 1
819 11:22:48.904944 I2C: 00:5d: enabled 1
820 11:22:48.907004 GENERIC: 0.0: enabled 1
821 11:22:48.910454 PCI: 00:15.2: enabled 0
822 11:22:48.913816 PCI: 00:15.3: enabled 0
823 11:22:48.917318 PCI: 00:16.0: enabled 1
824 11:22:48.917857 PCI: 00:16.1: enabled 0
825 11:22:48.921001 PCI: 00:16.2: enabled 0
826 11:22:48.924019 PCI: 00:16.3: enabled 0
827 11:22:48.927343 PCI: 00:16.4: enabled 0
828 11:22:48.927921 PCI: 00:16.5: enabled 0
829 11:22:48.930654
830 11:22:48.931229 PCI: 00:17.0: enabled 1
831 11:22:48.933967 PCI: 00:19.0: enabled 1
832 11:22:48.937223 I2C: 00:1a: enabled 1
833 11:22:48.940794 I2C: 00:38: enabled 1
834 11:22:48.941401 I2C: 00:39: enabled 1
835 11:22:48.943677 I2C: 00:3a: enabled 1
836 11:22:48.947107 I2C: 00:3b: enabled 1
837 11:22:48.950052 PCI: 00:19.1: enabled 0
838 11:22:48.950575 PCI: 00:19.2: enabled 0
839 11:22:48.953793
840 11:22:48.954272 PCI: 00:1a.0: enabled 0
841 11:22:48.957252 PCI: 00:1c.0: enabled 0
842 11:22:48.960692 PCI: 00:1c.1: enabled 0
843 11:22:48.963904 PCI: 00:1c.2: enabled 0
844 11:22:48.964499 PCI: 00:1c.3: enabled 0
845 11:22:48.966875 PCI: 00:1c.4: enabled 0
846 11:22:48.970535 PCI: 00:1c.5: enabled 0
847 11:22:48.973587 PCI: 00:1c.6: enabled 0
848 11:22:48.977116 PCI: 00:1c.7: enabled 0
849 11:22:48.977737 PCI: 00:1d.0: enabled 1
850 11:22:48.979990 PCI: 00:1d.1: enabled 0
851 11:22:48.983847 PCI: 00:1d.2: enabled 0
852 11:22:48.986731 PCI: 00:1d.3: enabled 0
853 11:22:48.990187 PCI: 00:1d.4: enabled 0
854 11:22:48.990665 PCI: 00:1d.5: enabled 1
855 11:22:48.993447 PCI: 00:00.0: enabled 1
856 11:22:48.996942 PCI: 00:1e.0: enabled 1
857 11:22:49.000182 PCI: 00:1e.1: enabled 0
858 11:22:49.003664 PCI: 00:1e.2: enabled 1
859 11:22:49.004245 SPI: 00: enabled 1
860 11:22:49.006781 PCI: 00:1e.3: enabled 1
861 11:22:49.009875 SPI: 01: enabled 1
862 11:22:49.013528 PCI: 00:1f.0: enabled 1
863 11:22:49.014038 PNP: 0c09.0: enabled 1
864 11:22:49.017096 PCI: 00:1f.1: enabled 1
865 11:22:49.019939 PCI: 00:1f.2: enabled 1
866 11:22:49.023564 PCI: 00:1f.3: enabled 1
867 11:22:49.026332 PCI: 00:1f.4: enabled 1
868 11:22:49.026921 PCI: 00:1f.5: enabled 1
869 11:22:49.030058 PCI: 00:1f.6: enabled 0
870 11:22:49.033074 Root Device scanning...
871 11:22:49.036618 scan_static_bus for Root Device
872 11:22:49.039448 CPU_CLUSTER: 0 enabled
873 11:22:49.039935 DOMAIN: 0000 enabled
874 11:22:49.042780 DOMAIN: 0000 scanning...
875 11:22:49.046302 PCI: pci_scan_bus for bus 00
876 11:22:49.049429 PCI: 00:00.0 [8086/0000] ops
877 11:22:49.052918 PCI: 00:00.0 [8086/9b61] enabled
878 11:22:49.056202 PCI: 00:02.0 [8086/0000] bus ops
879 11:22:49.059778 PCI: 00:02.0 [8086/9b41] enabled
880 11:22:49.063444 PCI: 00:04.0 [8086/1903] disabled
881 11:22:49.065993 PCI: 00:08.0 [8086/1911] enabled
882 11:22:49.069503 PCI: 00:12.0 [8086/02f9] enabled
883 11:22:49.073051 PCI: 00:14.0 [8086/0000] bus ops
884 11:22:49.076261 PCI: 00:14.0 [8086/02ed] enabled
885 11:22:49.079487 PCI: 00:14.2 [8086/02ef] enabled
886 11:22:49.082597 PCI: 00:14.3 [8086/02f0] enabled
887 11:22:49.086619 PCI: 00:15.0 [8086/0000] bus ops
888 11:22:49.089436 PCI: 00:15.0 [8086/02e8] enabled
889 11:22:49.092895 PCI: 00:15.1 [8086/0000] bus ops
890 11:22:49.096298 PCI: 00:15.1 [8086/02e9] enabled
891 11:22:49.099662 PCI: 00:16.0 [8086/0000] ops
892 11:22:49.102802 PCI: 00:16.0 [8086/02e0] enabled
893 11:22:49.106324 PCI: 00:17.0 [8086/0000] ops
894 11:22:49.109381 PCI: 00:17.0 [8086/02d3] enabled
895 11:22:49.112906 PCI: 00:19.0 [8086/0000] bus ops
896 11:22:49.116343 PCI: 00:19.0 [8086/02c5] enabled
897 11:22:49.119973 PCI: 00:1d.0 [8086/0000] bus ops
898 11:22:49.122367 PCI: 00:1d.0 [8086/02b0] enabled
899 11:22:49.126339 PCI: Static device PCI: 00:1d.5 not found, disabling it.
900 11:22:49.129787 PCI: 00:1e.0 [8086/0000] ops
901 11:22:49.133106 PCI: 00:1e.0 [8086/02a8] enabled
902 11:22:49.135864 PCI: 00:1e.2 [8086/0000] bus ops
903 11:22:49.138980 PCI: 00:1e.2 [8086/02aa] enabled
904 11:22:49.142401 PCI: 00:1e.3 [8086/0000] bus ops
905 11:22:49.145839 PCI: 00:1e.3 [8086/02ab] enabled
906 11:22:49.149167 PCI: 00:1f.0 [8086/0000] bus ops
907 11:22:49.152529 PCI: 00:1f.0 [8086/0284] enabled
908 11:22:49.159193 PCI: Static device PCI: 00:1f.1 not found, disabling it.
909 11:22:49.165591 PCI: Static device PCI: 00:1f.2 not found, disabling it.
910 11:22:49.169155 PCI: 00:1f.3 [8086/0000] bus ops
911 11:22:49.172613 PCI: 00:1f.3 [8086/02c8] enabled
912 11:22:49.176447 PCI: 00:1f.4 [8086/0000] bus ops
913 11:22:49.179455 PCI: 00:1f.4 [8086/02a3] enabled
914 11:22:49.182395 PCI: 00:1f.5 [8086/0000] bus ops
915 11:22:49.185638 PCI: 00:1f.5 [8086/02a4] enabled
916 11:22:49.189323 PCI: Leftover static devices:
917 11:22:49.189937 PCI: 00:05.0
918 11:22:49.190323 PCI: 00:12.5
919 11:22:49.191980 PCI: 00:12.6
920 11:22:49.192452 PCI: 00:14.1
921 11:22:49.195719 PCI: 00:14.5
922 11:22:49.196294 PCI: 00:15.2
923 11:22:49.198886 PCI: 00:15.3
924 11:22:49.199462 PCI: 00:16.1
925 11:22:49.199843 PCI: 00:16.2
926 11:22:49.202429 PCI: 00:16.3
927 11:22:49.203009 PCI: 00:16.4
928 11:22:49.205469 PCI: 00:16.5
929 11:22:49.206077 PCI: 00:19.1
930 11:22:49.206454 PCI: 00:19.2
931 11:22:49.208750 PCI: 00:1a.0
932 11:22:49.209224 PCI: 00:1c.0
933 11:22:49.212570 PCI: 00:1c.1
934 11:22:49.213145 PCI: 00:1c.2
935 11:22:49.213567 PCI: 00:1c.3
936 11:22:49.215256 PCI: 00:1c.4
937 11:22:49.215732 PCI: 00:1c.5
938 11:22:49.218809 PCI: 00:1c.6
939 11:22:49.219387 PCI: 00:1c.7
940 11:22:49.222239 PCI: 00:1d.1
941 11:22:49.222823 PCI: 00:1d.2
942 11:22:49.223205 PCI: 00:1d.3
943 11:22:49.225413 PCI: 00:1d.4
944 11:22:49.226030 PCI: 00:1d.5
945 11:22:49.229300 PCI: 00:1e.1
946 11:22:49.229909 PCI: 00:1f.1
947 11:22:49.230291 PCI: 00:1f.2
948 11:22:49.232127 PCI: 00:1f.6
949 11:22:49.235588 PCI: Check your devicetree.cb.
950 11:22:49.238688 PCI: 00:02.0 scanning...
951 11:22:49.242109 scan_generic_bus for PCI: 00:02.0
952 11:22:49.245469 scan_generic_bus for PCI: 00:02.0 done
953 11:22:49.251761 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
954 11:22:49.252359 PCI: 00:14.0 scanning...
955 11:22:49.256395 scan_static_bus for PCI: 00:14.0
956 11:22:49.259127 USB0 port 0 enabled
957 11:22:49.261471 USB0 port 0 scanning...
958 11:22:49.265381 scan_static_bus for USB0 port 0
959 11:22:49.265925 USB2 port 0 enabled
960 11:22:49.268266 USB2 port 1 enabled
961 11:22:49.271886 USB2 port 2 disabled
962 11:22:49.272498 USB2 port 3 disabled
963 11:22:49.274982 USB2 port 5 disabled
964 11:22:49.278168 USB2 port 6 enabled
965 11:22:49.278655 USB2 port 9 enabled
966 11:22:49.281650 USB3 port 0 enabled
967 11:22:49.282226 USB3 port 1 enabled
968 11:22:49.284860 USB3 port 2 enabled
969 11:22:49.288412 USB3 port 3 enabled
970 11:22:49.288999 USB3 port 4 disabled
971 11:22:49.291465 USB2 port 0 scanning...
972 11:22:49.295335 scan_static_bus for USB2 port 0
973 11:22:49.297999 scan_static_bus for USB2 port 0 done
974 11:22:49.305209 scan_bus: scanning of bus USB2 port 0 took 9686 usecs
975 11:22:49.308135 USB2 port 1 scanning...
976 11:22:49.311482 scan_static_bus for USB2 port 1
977 11:22:49.314820 scan_static_bus for USB2 port 1 done
978 11:22:49.318404 scan_bus: scanning of bus USB2 port 1 took 9688 usecs
979 11:22:49.321314 USB2 port 6 scanning...
980 11:22:49.325446 scan_static_bus for USB2 port 6
981 11:22:49.328303 scan_static_bus for USB2 port 6 done
982 11:22:49.335560 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
983 11:22:49.337999 USB2 port 9 scanning...
984 11:22:49.341500 scan_static_bus for USB2 port 9
985 11:22:49.344614 scan_static_bus for USB2 port 9 done
986 11:22:49.348035 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
987 11:22:49.351396 USB3 port 0 scanning...
988 11:22:49.354815 scan_static_bus for USB3 port 0
989 11:22:49.357594 scan_static_bus for USB3 port 0 done
990 11:22:49.364532 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
991 11:22:49.367627 USB3 port 1 scanning...
992 11:22:49.371888 scan_static_bus for USB3 port 1
993 11:22:49.374785 scan_static_bus for USB3 port 1 done
994 11:22:49.377984 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
995 11:22:49.381069 USB3 port 2 scanning...
996 11:22:49.384528 scan_static_bus for USB3 port 2
997 11:22:49.388445 scan_static_bus for USB3 port 2 done
998 11:22:49.394447 scan_bus: scanning of bus USB3 port 2 took 9704 usecs
999 11:22:49.397721 USB3 port 3 scanning...
1000 11:22:49.400921 scan_static_bus for USB3 port 3
1001 11:22:49.404761 scan_static_bus for USB3 port 3 done
1002 11:22:49.407915 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
1003 11:22:49.414500 scan_static_bus for USB0 port 0 done
1004 11:22:49.417624 scan_bus: scanning of bus USB0 port 0 took 155324 usecs
1005 11:22:49.421115 scan_static_bus for PCI: 00:14.0 done
1006 11:22:49.428669 scan_bus: scanning of bus PCI: 00:14.0 took 172939 usecs
1007 11:22:49.430776 PCI: 00:15.0 scanning...
1008 11:22:49.434381 scan_generic_bus for PCI: 00:15.0
1009 11:22:49.437446 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1010 11:22:49.440810 scan_generic_bus for PCI: 00:15.0 done
1011 11:22:49.448010 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1012 11:22:49.450765 PCI: 00:15.1 scanning...
1013 11:22:49.453899 scan_generic_bus for PCI: 00:15.1
1014 11:22:49.457267 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1015 11:22:49.461277 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1016 11:22:49.467329 scan_generic_bus for PCI: 00:15.1 done
1017 11:22:49.470730 scan_bus: scanning of bus PCI: 00:15.1 took 18585 usecs
1018 11:22:49.474314 PCI: 00:19.0 scanning...
1019 11:22:49.477768 scan_generic_bus for PCI: 00:19.0
1020 11:22:49.480884 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1021 11:22:49.487704 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1022 11:22:49.490402 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1023 11:22:49.493566 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1024 11:22:49.496953 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1025 11:22:49.503671 scan_generic_bus for PCI: 00:19.0 done
1026 11:22:49.506877 scan_bus: scanning of bus PCI: 00:19.0 took 30717 usecs
1027 11:22:49.510190 PCI: 00:1d.0 scanning...
1028 11:22:49.513596 do_pci_scan_bridge for PCI: 00:1d.0
1029 11:22:49.517109 PCI: pci_scan_bus for bus 01
1030 11:22:49.520698 PCI: 01:00.0 [1c5c/1327] enabled
1031 11:22:49.523866 Enabling Common Clock Configuration
1032 11:22:49.530328 L1 Sub-State supported from root port 29
1033 11:22:49.530913 L1 Sub-State Support = 0xf
1034 11:22:49.533790 CommonModeRestoreTime = 0x28
1035 11:22:49.540558 Power On Value = 0x16, Power On Scale = 0x0
1036 11:22:49.541136 ASPM: Enabled L1
1037 11:22:49.547688 scan_bus: scanning of bus PCI: 00:1d.0 took 32777 usecs
1038 11:22:49.550405 PCI: 00:1e.2 scanning...
1039 11:22:49.553764 scan_generic_bus for PCI: 00:1e.2
1040 11:22:49.556852 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1041 11:22:49.560035 scan_generic_bus for PCI: 00:1e.2 done
1042 11:22:49.567305 scan_bus: scanning of bus PCI: 00:1e.2 took 13982 usecs
1043 11:22:49.567888 PCI: 00:1e.3 scanning...
1044 11:22:49.569748 scan_generic_bus for PCI: 00:1e.3
1045 11:22:49.573025
1046 11:22:49.576902 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 11:22:49.580026 scan_generic_bus for PCI: 00:1e.3 done
1048 11:22:49.583266 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1049 11:22:49.586672
1050 11:22:49.587157 PCI: 00:1f.0 scanning...
1051 11:22:49.590317 scan_static_bus for PCI: 00:1f.0
1052 11:22:49.592949 PNP: 0c09.0 enabled
1053 11:22:49.596625 scan_static_bus for PCI: 00:1f.0 done
1054 11:22:49.602956 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1055 11:22:49.606493 PCI: 00:1f.3 scanning...
1056 11:22:49.610177 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1057 11:22:49.613248 PCI: 00:1f.4 scanning...
1058 11:22:49.616407 scan_generic_bus for PCI: 00:1f.4
1059 11:22:49.619632 scan_generic_bus for PCI: 00:1f.4 done
1060 11:22:49.626421 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1061 11:22:49.629580 PCI: 00:1f.5 scanning...
1062 11:22:49.633620 scan_generic_bus for PCI: 00:1f.5
1063 11:22:49.636393 scan_generic_bus for PCI: 00:1f.5 done
1064 11:22:49.642815 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1065 11:22:49.649710 scan_bus: scanning of bus DOMAIN: 0000 took 604819 usecs
1066 11:22:49.652667 scan_static_bus for Root Device done
1067 11:22:49.656248 scan_bus: scanning of bus Root Device took 624689 usecs
1068 11:22:49.659813 done
1069 11:22:49.660309 Chrome EC: UHEPI supported
1070 11:22:49.662664
1071 11:22:49.665706 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1072 11:22:49.672657 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1073 11:22:49.678969 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1074 11:22:49.685638 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1075 11:22:49.689191 SPI flash protection: WPSW=0 SRP0=0
1076 11:22:49.695469 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1077 11:22:49.698808 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1078 11:22:49.701993 found VGA at PCI: 00:02.0
1079 11:22:49.705701 Setting up VGA for PCI: 00:02.0
1080 11:22:49.712708 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1081 11:22:49.715348 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1082 11:22:49.718780 Allocating resources...
1083 11:22:49.721835 Reading resources...
1084 11:22:49.725543 Root Device read_resources bus 0 link: 0
1085 11:22:49.728722 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1086 11:22:49.735373 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1087 11:22:49.738824 DOMAIN: 0000 read_resources bus 0 link: 0
1088 11:22:49.746348 PCI: 00:14.0 read_resources bus 0 link: 0
1089 11:22:49.748966 USB0 port 0 read_resources bus 0 link: 0
1090 11:22:49.756880 USB0 port 0 read_resources bus 0 link: 0 done
1091 11:22:49.760095 PCI: 00:14.0 read_resources bus 0 link: 0 done
1092 11:22:49.767557 PCI: 00:15.0 read_resources bus 1 link: 0
1093 11:22:49.770638 PCI: 00:15.0 read_resources bus 1 link: 0 done
1094 11:22:49.777613 PCI: 00:15.1 read_resources bus 2 link: 0
1095 11:22:49.780763 PCI: 00:15.1 read_resources bus 2 link: 0 done
1096 11:22:49.788528 PCI: 00:19.0 read_resources bus 3 link: 0
1097 11:22:49.794819 PCI: 00:19.0 read_resources bus 3 link: 0 done
1098 11:22:49.798294 PCI: 00:1d.0 read_resources bus 1 link: 0
1099 11:22:49.805309 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1100 11:22:49.808453 PCI: 00:1e.2 read_resources bus 4 link: 0
1101 11:22:49.814824 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1102 11:22:49.817931 PCI: 00:1e.3 read_resources bus 5 link: 0
1103 11:22:49.824916 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1104 11:22:49.827979 PCI: 00:1f.0 read_resources bus 0 link: 0
1105 11:22:49.834970 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1106 11:22:49.841871 DOMAIN: 0000 read_resources bus 0 link: 0 done
1107 11:22:49.845135 Root Device read_resources bus 0 link: 0 done
1108 11:22:49.848302 Done reading resources.
1109 11:22:49.851536 Show resources in subtree (Root Device)...After reading.
1110 11:22:49.857588 Root Device child on link 0 CPU_CLUSTER: 0
1111 11:22:49.861440 CPU_CLUSTER: 0 child on link 0 APIC: 00
1112 11:22:49.862065 APIC: 00
1113 11:22:49.864683 APIC: 01
1114 11:22:49.865275 APIC: 06
1115 11:22:49.868360 APIC: 07
1116 11:22:49.868948 APIC: 03
1117 11:22:49.869334 APIC: 02
1118 11:22:49.871096 APIC: 04
1119 11:22:49.871577 APIC: 05
1120 11:22:49.874302 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1121 11:22:49.885037 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1122 11:22:49.934353 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1123 11:22:49.935044 PCI: 00:00.0
1124 11:22:49.936024 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1125 11:22:49.936500 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1126 11:22:49.937254 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1127 11:22:49.937690 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1128 11:22:49.984153 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1129 11:22:49.985253 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1130 11:22:49.985767 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1131 11:22:49.986155 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1132 11:22:49.986901 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1133 11:22:50.034212 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1134 11:22:50.034844 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1135 11:22:50.035759 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1136 11:22:50.036257 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1137 11:22:50.037010 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1138 11:22:50.052284 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1139 11:22:50.052951 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1140 11:22:50.053754 PCI: 00:02.0
1141 11:22:50.058991 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 11:22:50.068921 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 11:22:50.075707 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 11:22:50.079053
1145 11:22:50.079649 PCI: 00:04.0
1146 11:22:50.080038 PCI: 00:08.0
1147 11:22:50.089106 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 11:22:50.092546 PCI: 00:12.0
1149 11:22:50.102151 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 11:22:50.105442 PCI: 00:14.0 child on link 0 USB0 port 0
1151 11:22:50.115154 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:22:50.122011 USB0 port 0 child on link 0 USB2 port 0
1153 11:22:50.122742 USB2 port 0
1154 11:22:50.125060 USB2 port 1
1155 11:22:50.125672 USB2 port 2
1156 11:22:50.129041 USB2 port 3
1157 11:22:50.129660 USB2 port 5
1158 11:22:50.132358 USB2 port 6
1159 11:22:50.132951 USB2 port 9
1160 11:22:50.135537 USB3 port 0
1161 11:22:50.136133 USB3 port 1
1162 11:22:50.138642 USB3 port 2
1163 11:22:50.139230 USB3 port 3
1164 11:22:50.141740 USB3 port 4
1165 11:22:50.142329 PCI: 00:14.2
1166 11:22:50.145945
1167 11:22:50.151729 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1168 11:22:50.155314
1169 11:22:50.161614 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 11:22:50.165133
1171 11:22:50.165761 PCI: 00:14.3
1172 11:22:50.174588 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1173 11:22:50.178222 PCI: 00:15.0 child on link 0 I2C: 01:15
1174 11:22:50.187814 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 11:22:50.191541 I2C: 01:15
1176 11:22:50.194368 PCI: 00:15.1 child on link 0 I2C: 02:5d
1177 11:22:50.205659 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 11:22:50.207796 I2C: 02:5d
1179 11:22:50.208384 GENERIC: 0.0
1180 11:22:50.211379 PCI: 00:16.0
1181 11:22:50.221634 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 11:22:50.222221 PCI: 00:17.0
1183 11:22:50.231304 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1184 11:22:50.238178 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1185 11:22:50.241453
1186 11:22:50.247758 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 11:22:50.254433 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 11:22:50.257183
1189 11:22:50.264197 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1190 11:22:50.274147 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1191 11:22:50.277299 PCI: 00:19.0 child on link 0 I2C: 03:1a
1192 11:22:50.287589 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 11:22:50.288190 I2C: 03:1a
1194 11:22:50.291034 I2C: 03:38
1195 11:22:50.291526 I2C: 03:39
1196 11:22:50.294028 I2C: 03:3a
1197 11:22:50.294519 I2C: 03:3b
1198 11:22:50.300681 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1199 11:22:50.307340 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 11:22:50.318118 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 11:22:50.327661 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 11:22:50.330848 PCI: 01:00.0
1203 11:22:50.340961 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 11:22:50.341604 PCI: 00:1e.0
1205 11:22:50.350576 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1206 11:22:50.360281 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1207 11:22:50.366946 PCI: 00:1e.2 child on link 0 SPI: 00
1208 11:22:50.376709 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 11:22:50.377308 SPI: 00
1210 11:22:50.380022 PCI: 00:1e.3 child on link 0 SPI: 01
1211 11:22:50.390852 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 11:22:50.393368 SPI: 01
1213 11:22:50.396848 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1214 11:22:50.404099 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1215 11:22:50.414202 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1216 11:22:50.416702 PNP: 0c09.0
1217 11:22:50.423119 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 11:22:50.426645 PCI: 00:1f.3
1219 11:22:50.436627 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 11:22:50.446932 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 11:22:50.447517 PCI: 00:1f.4
1222 11:22:50.456451 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1223 11:22:50.466546 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1224 11:22:50.467130 PCI: 00:1f.5
1225 11:22:50.476391 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1226 11:22:50.483446 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1227 11:22:50.490230 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1228 11:22:50.496739 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1229 11:22:50.499706 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1230 11:22:50.502939 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1231 11:22:50.506445 PCI: 00:17.0 18 * [0x60 - 0x67] io
1232 11:22:50.509862 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1233 11:22:50.512806
1234 11:22:50.519468 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1235 11:22:50.526458 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1236 11:22:50.532362 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1237 11:22:50.539461 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1238 11:22:50.542772
1239 11:22:50.549468 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1240 11:22:50.552602 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1241 11:22:50.558999 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1242 11:22:50.562618 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1243 11:22:50.566123
1244 11:22:50.569100 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1245 11:22:50.573053 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1246 11:22:50.579062 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1247 11:22:50.582250 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1248 11:22:50.589117 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1249 11:22:50.592516 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1250 11:22:50.599946 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1251 11:22:50.602162 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1252 11:22:50.609071 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1253 11:22:50.611814 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1254 11:22:50.618634 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1255 11:22:50.622284 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1256 11:22:50.629046 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1257 11:22:50.631954 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1258 11:22:50.638445 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1259 11:22:50.642357 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1260 11:22:50.645092 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1261 11:22:50.648928
1262 11:22:50.652341 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1263 11:22:50.655031 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1264 11:22:50.661531 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1265 11:22:50.665186 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1266 11:22:50.671705 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1267 11:22:50.678356 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1268 11:22:50.681562 avoid_fixed_resources: DOMAIN: 0000
1269 11:22:50.687923 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1270 11:22:50.694885 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1271 11:22:50.701594 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1272 11:22:50.711549 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1273 11:22:50.718260 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1274 11:22:50.724396 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1275 11:22:50.734654 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1276 11:22:50.741408 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1277 11:22:50.747808 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1278 11:22:50.757711 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1279 11:22:50.764596 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1280 11:22:50.771152 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1281 11:22:50.774060 Setting resources...
1282 11:22:50.777918 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1283 11:22:50.783976 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1284 11:22:50.787556 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1285 11:22:50.790795 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1286 11:22:50.793915 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1287 11:22:50.801202 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1288 11:22:50.807540 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1289 11:22:50.814354 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1290 11:22:50.820530 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1291 11:22:50.827201 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1292 11:22:50.830767 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1293 11:22:50.837313 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1294 11:22:50.840742 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1295 11:22:50.847385 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1296 11:22:50.850363 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1297 11:22:50.856794 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1298 11:22:50.860089 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1299 11:22:50.867155 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1300 11:22:50.869979 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1301 11:22:50.877270 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1302 11:22:50.880445 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1303 11:22:50.884240 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1304 11:22:50.890774 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1305 11:22:50.893571 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1306 11:22:50.901384 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1307 11:22:50.903565 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1308 11:22:50.910400 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1309 11:22:50.913435 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1310 11:22:50.920510 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1311 11:22:50.923485 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1312 11:22:50.929748 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1313 11:22:50.933439 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1314 11:22:50.939806 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1315 11:22:50.950437 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1316 11:22:50.956727 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1317 11:22:50.963230 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1318 11:22:50.970262 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1319 11:22:50.976389 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1320 11:22:50.979673 Root Device assign_resources, bus 0 link: 0
1321 11:22:50.986252 DOMAIN: 0000 assign_resources, bus 0 link: 0
1322 11:22:50.992564 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1323 11:22:51.003109 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1324 11:22:51.009064 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1325 11:22:51.019110 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1326 11:22:51.025987 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1327 11:22:51.035953 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1328 11:22:51.039208 PCI: 00:14.0 assign_resources, bus 0 link: 0
1329 11:22:51.041964 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 11:22:51.052340 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1331 11:22:51.058927 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1332 11:22:51.068705 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1333 11:22:51.075331 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1334 11:22:51.081552 PCI: 00:15.0 assign_resources, bus 1 link: 0
1335 11:22:51.085554 PCI: 00:15.0 assign_resources, bus 1 link: 0
1336 11:22:51.094717 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1337 11:22:51.098302 PCI: 00:15.1 assign_resources, bus 2 link: 0
1338 11:22:51.102210 PCI: 00:15.1 assign_resources, bus 2 link: 0
1339 11:22:51.112412 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1340 11:22:51.118576 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1341 11:22:51.128034 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1342 11:22:51.134972 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1343 11:22:51.141653 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1344 11:22:51.151128 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1345 11:22:51.157769 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1346 11:22:51.164612 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1347 11:22:51.168455
1348 11:22:51.171492 PCI: 00:19.0 assign_resources, bus 3 link: 0
1349 11:22:51.174670 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 11:22:51.184824 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1351 11:22:51.194487 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1352 11:22:51.201028 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1353 11:22:51.204725 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1354 11:22:51.207766
1355 11:22:51.213810 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 11:22:51.217616 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 11:22:51.227721 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 11:22:51.234426 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 11:22:51.241016 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 11:22:51.244472 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 11:22:51.254176 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 11:22:51.257403 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 11:22:51.263874 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 11:22:51.268120 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 11:22:51.274280 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 11:22:51.277414 LPC: Trying to open IO window from 800 size 1ff
1367 11:22:51.284024 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 11:22:51.287103
1369 11:22:51.293791 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1370 11:22:51.300278 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1371 11:22:51.310388 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1372 11:22:51.313840 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 11:22:51.320537 Root Device assign_resources, bus 0 link: 0
1374 11:22:51.321117 Done setting resources.
1375 11:22:51.327041 Show resources in subtree (Root Device)...After assigning values.
1376 11:22:51.333857 Root Device child on link 0 CPU_CLUSTER: 0
1377 11:22:51.336959 CPU_CLUSTER: 0 child on link 0 APIC: 00
1378 11:22:51.337589 APIC: 00
1379 11:22:51.340228 APIC: 01
1380 11:22:51.340802 APIC: 06
1381 11:22:51.343107 APIC: 07
1382 11:22:51.343589 APIC: 03
1383 11:22:51.343999 APIC: 02
1384 11:22:51.346598 APIC: 04
1385 11:22:51.347077 APIC: 05
1386 11:22:51.350351 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 11:22:51.360629 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1388 11:22:51.373859 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1389 11:22:51.374444 PCI: 00:00.0
1390 11:22:51.383121 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 11:22:51.393464 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 11:22:51.403136 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 11:22:51.413034 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 11:22:51.419571 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 11:22:51.429821 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 11:22:51.439022 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 11:22:51.449016 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 11:22:51.459206 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 11:22:51.465518 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1400 11:22:51.475445 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1401 11:22:51.485641 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1402 11:22:51.495199 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1403 11:22:51.505754 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1404 11:22:51.515518 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1405 11:22:51.525006 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1406 11:22:51.525636 PCI: 00:02.0
1407 11:22:51.535192 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1408 11:22:51.548103 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1409 11:22:51.554802 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1410 11:22:51.558062 PCI: 00:04.0
1411 11:22:51.558540 PCI: 00:08.0
1412 11:22:51.568431 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1413 11:22:51.571276 PCI: 00:12.0
1414 11:22:51.581444 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1415 11:22:51.584864 PCI: 00:14.0 child on link 0 USB0 port 0
1416 11:22:51.597604 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1417 11:22:51.601126 USB0 port 0 child on link 0 USB2 port 0
1418 11:22:51.601762 USB2 port 0
1419 11:22:51.604738 USB2 port 1
1420 11:22:51.605309 USB2 port 2
1421 11:22:51.607825 USB2 port 3
1422 11:22:51.608409 USB2 port 5
1423 11:22:51.611287
1424 11:22:51.611787 USB2 port 6
1425 11:22:51.614080 USB2 port 9
1426 11:22:51.614560 USB3 port 0
1427 11:22:51.618082 USB3 port 1
1428 11:22:51.618693 USB3 port 2
1429 11:22:51.620945 USB3 port 3
1430 11:22:51.621421 USB3 port 4
1431 11:22:51.624824 PCI: 00:14.2
1432 11:22:51.634564 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1433 11:22:51.643929 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1434 11:22:51.644516 PCI: 00:14.3
1435 11:22:51.657648 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1436 11:22:51.660495 PCI: 00:15.0 child on link 0 I2C: 01:15
1437 11:22:51.670517 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1438 11:22:51.671103 I2C: 01:15
1439 11:22:51.677151 PCI: 00:15.1 child on link 0 I2C: 02:5d
1440 11:22:51.686931 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1441 11:22:51.687513 I2C: 02:5d
1442 11:22:51.690193 GENERIC: 0.0
1443 11:22:51.690679 PCI: 00:16.0
1444 11:22:51.704130 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1445 11:22:51.704717 PCI: 00:17.0
1446 11:22:51.713237 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1447 11:22:51.723100 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1448 11:22:51.733640 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1449 11:22:51.742863 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1450 11:22:51.749638 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1451 11:22:51.762885 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1452 11:22:51.766240 PCI: 00:19.0 child on link 0 I2C: 03:1a
1453 11:22:51.776533 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1454 11:22:51.777123 I2C: 03:1a
1455 11:22:51.779466 I2C: 03:38
1456 11:22:51.779973 I2C: 03:39
1457 11:22:51.782972 I2C: 03:3a
1458 11:22:51.783553 I2C: 03:3b
1459 11:22:51.789348 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1460 11:22:51.795767 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1461 11:22:51.806371 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1462 11:22:51.818809 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1463 11:22:51.819434 PCI: 01:00.0
1464 11:22:51.828886 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1465 11:22:51.832755 PCI: 00:1e.0
1466 11:22:51.842215 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 11:22:51.852073 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1468 11:22:51.858930 PCI: 00:1e.2 child on link 0 SPI: 00
1469 11:22:51.868304 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1470 11:22:51.868881 SPI: 00
1471 11:22:51.871823 PCI: 00:1e.3 child on link 0 SPI: 01
1472 11:22:51.882402 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1473 11:22:51.885528 SPI: 01
1474 11:22:51.888567 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 11:22:51.898786 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 11:22:51.905842 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1477 11:22:51.908482 PNP: 0c09.0
1478 11:22:51.918725 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1479 11:22:51.919310 PCI: 00:1f.3
1480 11:22:51.927901 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1481 11:22:51.938452 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1482 11:22:51.942485 PCI: 00:1f.4
1483 11:22:51.951133 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1484 11:22:51.961226 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1485 11:22:51.961864 PCI: 00:1f.5
1486 11:22:51.971012 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1487 11:22:51.974293 Done allocating resources.
1488 11:22:51.980789 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1489 11:22:51.984445 Enabling resources...
1490 11:22:51.987719 PCI: 00:00.0 subsystem <- 8086/9b61
1491 11:22:51.990729 PCI: 00:00.0 cmd <- 06
1492 11:22:51.994156 PCI: 00:02.0 subsystem <- 8086/9b41
1493 11:22:51.997126 PCI: 00:02.0 cmd <- 03
1494 11:22:51.997627 PCI: 00:08.0 cmd <- 06
1495 11:22:52.004194 PCI: 00:12.0 subsystem <- 8086/02f9
1496 11:22:52.004774 PCI: 00:12.0 cmd <- 02
1497 11:22:52.007339 PCI: 00:14.0 subsystem <- 8086/02ed
1498 11:22:52.010497 PCI: 00:14.0 cmd <- 02
1499 11:22:52.013779 PCI: 00:14.2 cmd <- 02
1500 11:22:52.016898 PCI: 00:14.3 subsystem <- 8086/02f0
1501 11:22:52.020285 PCI: 00:14.3 cmd <- 02
1502 11:22:52.023601 PCI: 00:15.0 subsystem <- 8086/02e8
1503 11:22:52.027266 PCI: 00:15.0 cmd <- 02
1504 11:22:52.030673 PCI: 00:15.1 subsystem <- 8086/02e9
1505 11:22:52.033804 PCI: 00:15.1 cmd <- 02
1506 11:22:52.037074 PCI: 00:16.0 subsystem <- 8086/02e0
1507 11:22:52.040434 PCI: 00:16.0 cmd <- 02
1508 11:22:52.043699 PCI: 00:17.0 subsystem <- 8086/02d3
1509 11:22:52.044185 PCI: 00:17.0 cmd <- 03
1510 11:22:52.046740
1511 11:22:52.049745 PCI: 00:19.0 subsystem <- 8086/02c5
1512 11:22:52.050227 PCI: 00:19.0 cmd <- 02
1513 11:22:52.053941 PCI: 00:1d.0 bridge ctrl <- 0013
1514 11:22:52.060431 PCI: 00:1d.0 subsystem <- 8086/02b0
1515 11:22:52.060997 PCI: 00:1d.0 cmd <- 06
1516 11:22:52.063150 PCI: 00:1e.0 subsystem <- 8086/02a8
1517 11:22:52.066437 PCI: 00:1e.0 cmd <- 06
1518 11:22:52.069641 PCI: 00:1e.2 subsystem <- 8086/02aa
1519 11:22:52.073128 PCI: 00:1e.2 cmd <- 06
1520 11:22:52.076800 PCI: 00:1e.3 subsystem <- 8086/02ab
1521 11:22:52.079985 PCI: 00:1e.3 cmd <- 02
1522 11:22:52.083749 PCI: 00:1f.0 subsystem <- 8086/0284
1523 11:22:52.086922 PCI: 00:1f.0 cmd <- 407
1524 11:22:52.089640 PCI: 00:1f.3 subsystem <- 8086/02c8
1525 11:22:52.093086 PCI: 00:1f.3 cmd <- 02
1526 11:22:52.096640 PCI: 00:1f.4 subsystem <- 8086/02a3
1527 11:22:52.100323 PCI: 00:1f.4 cmd <- 03
1528 11:22:52.103449 PCI: 00:1f.5 subsystem <- 8086/02a4
1529 11:22:52.106363 PCI: 00:1f.5 cmd <- 406
1530 11:22:52.113912 PCI: 01:00.0 cmd <- 02
1531 11:22:52.119078 done.
1532 11:22:52.132788 ME: Version: 14.0.39.1367
1533 11:22:52.139300 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1534 11:22:52.142493 Initializing devices...
1535 11:22:52.143102 Root Device init ...
1536 11:22:52.149004 Chrome EC: Set SMI mask to 0x0000000000000000
1537 11:22:52.152683 Chrome EC: clear events_b mask to 0x0000000000000000
1538 11:22:52.158956 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1539 11:22:52.165615 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1540 11:22:52.172196 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1541 11:22:52.175261 Chrome EC: Set WAKE mask to 0x0000000000000000
1542 11:22:52.178872 Root Device init finished in 35211 usecs
1543 11:22:52.182191 CPU_CLUSTER: 0 init ...
1544 11:22:52.185724 CPU_CLUSTER: 0 init finished in 2449 usecs
1545 11:22:52.189081
1546 11:22:52.193799 PCI: 00:00.0 init ...
1547 11:22:52.196812 CPU TDP: 15 Watts
1548 11:22:52.199783 CPU PL2 = 64 Watts
1549 11:22:52.202974 PCI: 00:00.0 init finished in 7074 usecs
1550 11:22:52.207449 PCI: 00:02.0 init ...
1551 11:22:52.209824 PCI: 00:02.0 init finished in 2253 usecs
1552 11:22:52.213159 PCI: 00:08.0 init ...
1553 11:22:52.216066 PCI: 00:08.0 init finished in 2254 usecs
1554 11:22:52.219508 PCI: 00:12.0 init ...
1555 11:22:52.223146 PCI: 00:12.0 init finished in 2253 usecs
1556 11:22:52.226047 PCI: 00:14.0 init ...
1557 11:22:52.229594 PCI: 00:14.0 init finished in 2245 usecs
1558 11:22:52.233186 PCI: 00:14.2 init ...
1559 11:22:52.236049 PCI: 00:14.2 init finished in 2253 usecs
1560 11:22:52.239137 PCI: 00:14.3 init ...
1561 11:22:52.242847 PCI: 00:14.3 init finished in 2261 usecs
1562 11:22:52.245867 PCI: 00:15.0 init ...
1563 11:22:52.249802 DW I2C bus 0 at 0xd121f000 (400 KHz)
1564 11:22:52.252790 PCI: 00:15.0 init finished in 5981 usecs
1565 11:22:52.256389 PCI: 00:15.1 init ...
1566 11:22:52.259707 DW I2C bus 1 at 0xd1220000 (400 KHz)
1567 11:22:52.262731 PCI: 00:15.1 init finished in 5972 usecs
1568 11:22:52.266049
1569 11:22:52.266573 PCI: 00:16.0 init ...
1570 11:22:52.272722 PCI: 00:16.0 init finished in 2254 usecs
1571 11:22:52.275838 PCI: 00:19.0 init ...
1572 11:22:52.278973 DW I2C bus 4 at 0xd1222000 (400 KHz)
1573 11:22:52.282533 PCI: 00:19.0 init finished in 5981 usecs
1574 11:22:52.285873 PCI: 00:1d.0 init ...
1575 11:22:52.289081 Initializing PCH PCIe bridge.
1576 11:22:52.291904 PCI: 00:1d.0 init finished in 5288 usecs
1577 11:22:52.295426 PCI: 00:1f.0 init ...
1578 11:22:52.298784 IOAPIC: Initializing IOAPIC at 0xfec00000
1579 11:22:52.305603 IOAPIC: Bootstrap Processor Local APIC = 0x00
1580 11:22:52.306188 IOAPIC: ID = 0x02
1581 11:22:52.308486 IOAPIC: Dumping registers
1582 11:22:52.311833 reg 0x0000: 0x02000000
1583 11:22:52.315549 reg 0x0001: 0x00770020
1584 11:22:52.316136 reg 0x0002: 0x00000000
1585 11:22:52.322225 PCI: 00:1f.0 init finished in 23556 usecs
1586 11:22:52.325076 PCI: 00:1f.4 init ...
1587 11:22:52.328244 PCI: 00:1f.4 init finished in 2264 usecs
1588 11:22:52.339322 PCI: 01:00.0 init ...
1589 11:22:52.343061 PCI: 01:00.0 init finished in 2255 usecs
1590 11:22:52.346867 PNP: 0c09.0 init ...
1591 11:22:52.350432 Google Chrome EC uptime: 11.092 seconds
1592 11:22:52.357130 Google Chrome AP resets since EC boot: 0
1593 11:22:52.360214 Google Chrome most recent AP reset causes:
1594 11:22:52.366716 Google Chrome EC reset flags at last EC boot: reset-pin
1595 11:22:52.369789 PNP: 0c09.0 init finished in 20664 usecs
1596 11:22:52.374276 Devices initialized
1597 11:22:52.377186 Show all devs... After init.
1598 11:22:52.377800 Root Device: enabled 1
1599 11:22:52.380144 CPU_CLUSTER: 0: enabled 1
1600 11:22:52.383210 DOMAIN: 0000: enabled 1
1601 11:22:52.383693 APIC: 00: enabled 1
1602 11:22:52.386923 PCI: 00:00.0: enabled 1
1603 11:22:52.390459 PCI: 00:02.0: enabled 1
1604 11:22:52.393713 PCI: 00:04.0: enabled 0
1605 11:22:52.394291 PCI: 00:05.0: enabled 0
1606 11:22:52.396628 PCI: 00:12.0: enabled 1
1607 11:22:52.399653 PCI: 00:12.5: enabled 0
1608 11:22:52.403236 PCI: 00:12.6: enabled 0
1609 11:22:52.403812 PCI: 00:14.0: enabled 1
1610 11:22:52.406856 PCI: 00:14.1: enabled 0
1611 11:22:52.410125 PCI: 00:14.3: enabled 1
1612 11:22:52.410701 PCI: 00:14.5: enabled 0
1613 11:22:52.412954 PCI: 00:15.0: enabled 1
1614 11:22:52.416614 PCI: 00:15.1: enabled 1
1615 11:22:52.420456 PCI: 00:15.2: enabled 0
1616 11:22:52.421035 PCI: 00:15.3: enabled 0
1617 11:22:52.422875 PCI: 00:16.0: enabled 1
1618 11:22:52.426520 PCI: 00:16.1: enabled 0
1619 11:22:52.429384 PCI: 00:16.2: enabled 0
1620 11:22:52.429888 PCI: 00:16.3: enabled 0
1621 11:22:52.432477 PCI: 00:16.4: enabled 0
1622 11:22:52.436281 PCI: 00:16.5: enabled 0
1623 11:22:52.439358 PCI: 00:17.0: enabled 1
1624 11:22:52.439838 PCI: 00:19.0: enabled 1
1625 11:22:52.442736 PCI: 00:19.1: enabled 0
1626 11:22:52.445825 PCI: 00:19.2: enabled 0
1627 11:22:52.449398 PCI: 00:1a.0: enabled 0
1628 11:22:52.450003 PCI: 00:1c.0: enabled 0
1629 11:22:52.453074 PCI: 00:1c.1: enabled 0
1630 11:22:52.456019 PCI: 00:1c.2: enabled 0
1631 11:22:52.456594 PCI: 00:1c.3: enabled 0
1632 11:22:52.459492 PCI: 00:1c.4: enabled 0
1633 11:22:52.462754 PCI: 00:1c.5: enabled 0
1634 11:22:52.466079 PCI: 00:1c.6: enabled 0
1635 11:22:52.466566 PCI: 00:1c.7: enabled 0
1636 11:22:52.469177 PCI: 00:1d.0: enabled 1
1637 11:22:52.473117 PCI: 00:1d.1: enabled 0
1638 11:22:52.475728 PCI: 00:1d.2: enabled 0
1639 11:22:52.476211 PCI: 00:1d.3: enabled 0
1640 11:22:52.479430 PCI: 00:1d.4: enabled 0
1641 11:22:52.482682 PCI: 00:1d.5: enabled 0
1642 11:22:52.485686 PCI: 00:1e.0: enabled 1
1643 11:22:52.486168 PCI: 00:1e.1: enabled 0
1644 11:22:52.489383 PCI: 00:1e.2: enabled 1
1645 11:22:52.492709 PCI: 00:1e.3: enabled 1
1646 11:22:52.493287 PCI: 00:1f.0: enabled 1
1647 11:22:52.495977
1648 11:22:52.496551 PCI: 00:1f.1: enabled 0
1649 11:22:52.498992 PCI: 00:1f.2: enabled 0
1650 11:22:52.502410 PCI: 00:1f.3: enabled 1
1651 11:22:52.502984 PCI: 00:1f.4: enabled 1
1652 11:22:52.505551 PCI: 00:1f.5: enabled 1
1653 11:22:52.509554 PCI: 00:1f.6: enabled 0
1654 11:22:52.512567 USB0 port 0: enabled 1
1655 11:22:52.513145 I2C: 01:15: enabled 1
1656 11:22:52.515571 I2C: 02:5d: enabled 1
1657 11:22:52.518609 GENERIC: 0.0: enabled 1
1658 11:22:52.519088 I2C: 03:1a: enabled 1
1659 11:22:52.522044 I2C: 03:38: enabled 1
1660 11:22:52.525529 I2C: 03:39: enabled 1
1661 11:22:52.526111 I2C: 03:3a: enabled 1
1662 11:22:52.528871 I2C: 03:3b: enabled 1
1663 11:22:52.531910 PCI: 00:00.0: enabled 1
1664 11:22:52.532395 SPI: 00: enabled 1
1665 11:22:52.535193 SPI: 01: enabled 1
1666 11:22:52.538515 PNP: 0c09.0: enabled 1
1667 11:22:52.538996 USB2 port 0: enabled 1
1668 11:22:52.541863 USB2 port 1: enabled 1
1669 11:22:52.545421 USB2 port 2: enabled 0
1670 11:22:52.548554 USB2 port 3: enabled 0
1671 11:22:52.549040 USB2 port 5: enabled 0
1672 11:22:52.551679 USB2 port 6: enabled 1
1673 11:22:52.555587 USB2 port 9: enabled 1
1674 11:22:52.556165 USB3 port 0: enabled 1
1675 11:22:52.558622 USB3 port 1: enabled 1
1676 11:22:52.561646 USB3 port 2: enabled 1
1677 11:22:52.562133 USB3 port 3: enabled 1
1678 11:22:52.564892
1679 11:22:52.565379 USB3 port 4: enabled 0
1680 11:22:52.568642 APIC: 01: enabled 1
1681 11:22:52.569125 APIC: 06: enabled 1
1682 11:22:52.572261 APIC: 07: enabled 1
1683 11:22:52.574828 APIC: 03: enabled 1
1684 11:22:52.575440 APIC: 02: enabled 1
1685 11:22:52.578271 APIC: 04: enabled 1
1686 11:22:52.582068 APIC: 05: enabled 1
1687 11:22:52.582556 PCI: 00:08.0: enabled 1
1688 11:22:52.585311 PCI: 00:14.2: enabled 1
1689 11:22:52.588856 PCI: 01:00.0: enabled 1
1690 11:22:52.592307 Disabling ACPI via APMC:
1691 11:22:52.595412 done.
1692 11:22:52.598520 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1693 11:22:52.601832 ELOG: NV offset 0xaf0000 size 0x4000
1694 11:22:52.608703 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1695 11:22:52.615687 ELOG: Event(17) added with size 13 at 2022-11-26 11:22:51 UTC
1696 11:22:52.622413 ELOG: Event(92) added with size 9 at 2022-11-26 11:22:51 UTC
1697 11:22:52.628947 ELOG: Event(93) added with size 9 at 2022-11-26 11:22:51 UTC
1698 11:22:52.635251 ELOG: Event(9A) added with size 9 at 2022-11-26 11:22:51 UTC
1699 11:22:52.641627 ELOG: Event(9E) added with size 10 at 2022-11-26 11:22:51 UTC
1700 11:22:52.648838 ELOG: Event(9F) added with size 14 at 2022-11-26 11:22:51 UTC
1701 11:22:52.655692 ELOG: Event(16) added with size 11 at 2022-11-26 11:22:51 UTC
1702 11:22:52.658163 Erasing flash addr af0000 + 4 KiB
1703 11:22:52.728694 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 62
1704 11:22:52.735086 ELOG: Event(A1) added with size 10 at 2022-11-26 11:22:51 UTC
1705 11:22:52.745258 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1706 11:22:52.748436 ELOG: Event(A0) added with size 9 at 2022-11-26 11:22:51 UTC
1707 11:22:52.754944 elog_add_boot_reason: Logged dev mode boot
1708 11:22:52.755532 Finalize devices...
1709 11:22:52.758103 PCI: 00:17.0 final
1710 11:22:52.761375 Devices finalized
1711 11:22:52.764594 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1712 11:22:52.771118 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1713 11:22:52.774456 ME: HFSTS1 : 0x90000245
1714 11:22:52.777685 ME: HFSTS2 : 0x3B850126
1715 11:22:52.781548 ME: HFSTS3 : 0x00000020
1716 11:22:52.788126 ME: HFSTS4 : 0x00004800
1717 11:22:52.791610 ME: HFSTS5 : 0x00000000
1718 11:22:52.794860 ME: HFSTS6 : 0x40400006
1719 11:22:52.797996 ME: Manufacturing Mode : NO
1720 11:22:52.800834 ME: FW Partition Table : OK
1721 11:22:52.804696 ME: Bringup Loader Failure : NO
1722 11:22:52.807581 ME: Firmware Init Complete : YES
1723 11:22:52.811628 ME: Boot Options Present : NO
1724 11:22:52.814584 ME: Update In Progress : NO
1725 11:22:52.817655 ME: D0i3 Support : YES
1726 11:22:52.820976 ME: Low Power State Enabled : NO
1727 11:22:52.824597 ME: CPU Replaced : NO
1728 11:22:52.828463 ME: CPU Replacement Valid : YES
1729 11:22:52.830889 ME: Current Working State : 5
1730 11:22:52.834339 ME: Current Operation State : 1
1731 11:22:52.837519 ME: Current Operation Mode : 0
1732 11:22:52.840892 ME: Error Code : 0
1733 11:22:52.843874 ME: CPU Debug Disabled : YES
1734 11:22:52.847063 ME: TXT Support : NO
1735 11:22:52.854143 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1736 11:22:52.857248 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1737 11:22:52.860324 CBFS @ c08000 size 3f8000
1738 11:22:52.867109 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1739 11:22:52.870268 CBFS: Locating 'fallback/dsdt.aml'
1740 11:22:52.873817 CBFS: Found @ offset 10bb80 size 3fa5
1741 11:22:52.880730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1742 11:22:52.883524 CBFS @ c08000 size 3f8000
1743 11:22:52.887326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1744 11:22:52.890534 CBFS: Locating 'fallback/slic'
1745 11:22:52.895334 CBFS: 'fallback/slic' not found.
1746 11:22:52.902012 ACPI: Writing ACPI tables at 99b3e000.
1747 11:22:52.902589 ACPI: * FACS
1748 11:22:52.905422 ACPI: * DSDT
1749 11:22:52.909068 Ramoops buffer: 0x100000@0x99a3d000.
1750 11:22:52.911942 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1751 11:22:52.918436 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1752 11:22:52.922147 Google Chrome EC: version:
1753 11:22:52.924830 ro: helios_v2.0.2659-56403530b
1754 11:22:52.928018 rw: helios_v2.0.2849-c41de27e7d
1755 11:22:52.928445 running image: 1
1756 11:22:52.932374 ACPI: * FADT
1757 11:22:52.932887 SCI is IRQ9
1758 11:22:52.936214 ACPI: added table 1/32, length now 40
1759 11:22:52.939198
1760 11:22:52.939688 ACPI: * SSDT
1761 11:22:52.942398 Found 1 CPU(s) with 8 core(s) each.
1762 11:22:52.945769 Error: Could not locate 'wifi_sar' in VPD.
1763 11:22:52.952813 Checking CBFS for default SAR values
1764 11:22:52.955672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1765 11:22:52.958975 CBFS @ c08000 size 3f8000
1766 11:22:52.965305 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1767 11:22:52.968843 CBFS: Locating 'wifi_sar_defaults.hex'
1768 11:22:52.972029 CBFS: Found @ offset 5fac0 size 77
1769 11:22:52.975631 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1770 11:22:52.982097 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1771 11:22:52.985120 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1772 11:22:52.992061 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1773 11:22:52.995495 failed to find key in VPD: dsm_calib_r0_0
1774 11:22:53.005653 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1775 11:22:53.008570 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1776 11:22:53.015521 failed to find key in VPD: dsm_calib_r0_1
1777 11:22:53.022073 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1778 11:22:53.028793 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1779 11:22:53.031659 failed to find key in VPD: dsm_calib_r0_2
1780 11:22:53.041866 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1781 11:22:53.044942 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1782 11:22:53.052188 failed to find key in VPD: dsm_calib_r0_3
1783 11:22:53.058184 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1784 11:22:53.065504 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1785 11:22:53.067989 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1786 11:22:53.074733 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1787 11:22:53.078038 EC returned error result code 1
1788 11:22:53.081847 EC returned error result code 1
1789 11:22:53.085092 EC returned error result code 1
1790 11:22:53.088351 PS2K: Bad resp from EC. Vivaldi disabled!
1791 11:22:53.095505 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1792 11:22:53.101647 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1793 11:22:53.105423 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1794 11:22:53.111456 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1795 11:22:53.115170 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1796 11:22:53.121629 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1797 11:22:53.128165 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1798 11:22:53.135820 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1799 11:22:53.138119 ACPI: added table 2/32, length now 44
1800 11:22:53.138696 ACPI: * MCFG
1801 11:22:53.145578 ACPI: added table 3/32, length now 48
1802 11:22:53.146289 ACPI: * TPM2
1803 11:22:53.148782 TPM2 log created at 99a2d000
1804 11:22:53.151335 ACPI: added table 4/32, length now 52
1805 11:22:53.154274 ACPI: * MADT
1806 11:22:53.154779 SCI is IRQ9
1807 11:22:53.157858 ACPI: added table 5/32, length now 56
1808 11:22:53.161622 current = 99b43ac0
1809 11:22:53.162200 ACPI: * DMAR
1810 11:22:53.164727 ACPI: added table 6/32, length now 60
1811 11:22:53.168209 ACPI: * IGD OpRegion
1812 11:22:53.171191 GMA: Found VBT in CBFS
1813 11:22:53.174771 GMA: Found valid VBT in CBFS
1814 11:22:53.178039 ACPI: added table 7/32, length now 64
1815 11:22:53.178535 ACPI: * HPET
1816 11:22:53.181088 ACPI: added table 8/32, length now 68
1817 11:22:53.184975 ACPI: done.
1818 11:22:53.188221 ACPI tables: 31744 bytes.
1819 11:22:53.191420 smbios_write_tables: 99a2c000
1820 11:22:53.194268 EC returned error result code 3
1821 11:22:53.197944 Couldn't obtain OEM name from CBI
1822 11:22:53.201636 Create SMBIOS type 17
1823 11:22:53.202209 PCI: 00:00.0 (Intel Cannonlake)
1824 11:22:53.204832
1825 11:22:53.205408 PCI: 00:14.3 (Intel WiFi)
1826 11:22:53.207702 SMBIOS tables: 939 bytes.
1827 11:22:53.211330 Writing table forward entry at 0x00000500
1828 11:22:53.217796 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1829 11:22:53.221004 Writing coreboot table at 0x99b62000
1830 11:22:53.227623 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1831 11:22:53.230584 1. 0000000000001000-000000000009ffff: RAM
1832 11:22:53.237653 2. 00000000000a0000-00000000000fffff: RESERVED
1833 11:22:53.241132 3. 0000000000100000-0000000099a2bfff: RAM
1834 11:22:53.247389 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1835 11:22:53.250521 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1836 11:22:53.257279 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1837 11:22:53.264197 7. 000000009a000000-000000009f7fffff: RESERVED
1838 11:22:53.267244 8. 00000000e0000000-00000000efffffff: RESERVED
1839 11:22:53.270499 9. 00000000fc000000-00000000fc000fff: RESERVED
1840 11:22:53.277112 10. 00000000fe000000-00000000fe00ffff: RESERVED
1841 11:22:53.280897 11. 00000000fed10000-00000000fed17fff: RESERVED
1842 11:22:53.287358 12. 00000000fed80000-00000000fed83fff: RESERVED
1843 11:22:53.291011 13. 00000000fed90000-00000000fed91fff: RESERVED
1844 11:22:53.297240 14. 00000000feda0000-00000000feda1fff: RESERVED
1845 11:22:53.300477 15. 0000000100000000-000000045e7fffff: RAM
1846 11:22:53.303591 Graphics framebuffer located at 0xc0000000
1847 11:22:53.307148 Passing 5 GPIOs to payload:
1848 11:22:53.313637 NAME | PORT | POLARITY | VALUE
1849 11:22:53.317165 write protect | undefined | high | low
1850 11:22:53.323343 lid | undefined | high | high
1851 11:22:53.326976 power | undefined | high | low
1852 11:22:53.330477
1853 11:22:53.333703 oprom | undefined | high | low
1854 11:22:53.340306 EC in RW | 0x000000cb | high | low
1855 11:22:53.340897 Board ID: 4
1856 11:22:53.346662 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1857 11:22:53.347263 CBFS @ c08000 size 3f8000
1858 11:22:53.353570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1859 11:22:53.359449 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1860 11:22:53.363067 coreboot table: 1492 bytes.
1861 11:22:53.366827 IMD ROOT 0. 99fff000 00001000
1862 11:22:53.369710 IMD SMALL 1. 99ffe000 00001000
1863 11:22:53.373107 FSP MEMORY 2. 99c4e000 003b0000
1864 11:22:53.376303 CONSOLE 3. 99c2e000 00020000
1865 11:22:53.379582 FMAP 4. 99c2d000 0000054e
1866 11:22:53.383072 TIME STAMP 5. 99c2c000 00000910
1867 11:22:53.386252 VBOOT WORK 6. 99c18000 00014000
1868 11:22:53.390345 MRC DATA 7. 99c16000 00001958
1869 11:22:53.393095 ROMSTG STCK 8. 99c15000 00001000
1870 11:22:53.396235 AFTER CAR 9. 99c0b000 0000a000
1871 11:22:53.399335 RAMSTAGE 10. 99baf000 0005c000
1872 11:22:53.403409 REFCODE 11. 99b7a000 00035000
1873 11:22:53.406189 SMM BACKUP 12. 99b6a000 00010000
1874 11:22:53.409625 COREBOOT 13. 99b62000 00008000
1875 11:22:53.412888 ACPI 14. 99b3e000 00024000
1876 11:22:53.416265 ACPI GNVS 15. 99b3d000 00001000
1877 11:22:53.419603 RAMOOPS 16. 99a3d000 00100000
1878 11:22:53.422710 TPM2 TCGLOG17. 99a2d000 00010000
1879 11:22:53.425940 SMBIOS 18. 99a2c000 00000800
1880 11:22:53.426451 IMD small region:
1881 11:22:53.429130
1882 11:22:53.433067 IMD ROOT 0. 99ffec00 00000400
1883 11:22:53.435885 FSP RUNTIME 1. 99ffebe0 00000004
1884 11:22:53.440076 EC HOSTEVENT 2. 99ffebc0 00000008
1885 11:22:53.443018 POWER STATE 3. 99ffeb80 00000040
1886 11:22:53.445756 ROMSTAGE 4. 99ffeb60 00000004
1887 11:22:53.449328 MEM INFO 5. 99ffe9a0 000001b9
1888 11:22:53.452371 VPD 6. 99ffe920 0000006c
1889 11:22:53.456163 MTRR: Physical address space:
1890 11:22:53.462380 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1891 11:22:53.469360 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1892 11:22:53.475724 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1893 11:22:53.478865 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1894 11:22:53.485823 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1895 11:22:53.492377 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1896 11:22:53.498613 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1897 11:22:53.501896 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 11:22:53.508799 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 11:22:53.512383 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 11:22:53.515203 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 11:22:53.518412 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 11:22:53.525338 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 11:22:53.528833 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 11:22:53.531688 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 11:22:53.535050 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 11:22:53.538709 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 11:22:53.542272
1908 11:22:53.545241 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 11:22:53.548771 call enable_fixed_mtrr()
1910 11:22:53.552026 CPU physical address size: 39 bits
1911 11:22:53.554963 MTRR: default type WB/UC MTRR counts: 6/8.
1912 11:22:53.558119 MTRR: WB selected as default type.
1913 11:22:53.564845 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1914 11:22:53.571341 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1915 11:22:53.578657 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1916 11:22:53.585067 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1917 11:22:53.591517 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1918 11:22:53.595202 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1919 11:22:53.599087
1920 11:22:53.599685 MTRR check
1921 11:22:53.601982 Fixed MTRRs : Enabled
1922 11:22:53.602461 Variable MTRRs: Enabled
1923 11:22:53.602840
1924 11:22:53.609394 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 11:22:53.611944 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 11:22:53.615256 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 11:22:53.619047 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 11:22:53.625554 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 11:22:53.628700 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 11:22:53.632527 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 11:22:53.635363 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 11:22:53.641698 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 11:22:53.645248 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 11:22:53.648419 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 11:22:53.655037 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1936 11:22:53.655627 call enable_fixed_mtrr()
1937 11:22:53.658285
1938 11:22:53.661590 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1939 11:22:53.665014 CPU physical address size: 39 bits
1940 11:22:53.668021 CBFS @ c08000 size 3f8000
1941 11:22:53.675049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1942 11:22:53.677870 CBFS: Locating 'fallback/payload'
1943 11:22:53.681860 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 11:22:53.684900 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:22:53.688378 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:22:53.694901 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:22:53.698023 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:22:53.701751 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:22:53.704793 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:22:53.711234 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:22:53.714493 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:22:53.717789 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:22:53.721276 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:22:53.728226 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 11:22:53.728811 call enable_fixed_mtrr()
1956 11:22:53.734868 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 11:22:53.738327 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 11:22:53.741533 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 11:22:53.744779 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 11:22:53.748321 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 11:22:53.751387
1962 11:22:53.754667 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 11:22:53.758446 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 11:22:53.761606 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 11:22:53.764820 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 11:22:53.771646 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 11:22:53.774183 CPU physical address size: 39 bits
1968 11:22:53.777687 call enable_fixed_mtrr()
1969 11:22:53.780659 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 11:22:53.784485 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 11:22:53.787939 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 11:22:53.794427 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 11:22:53.797365 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 11:22:53.800617 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 11:22:53.804286 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 11:22:53.810863 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 11:22:53.814276 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 11:22:53.817072 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 11:22:53.820680 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 11:22:53.827837 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 11:22:53.830727 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 11:22:53.834179 call enable_fixed_mtrr()
1983 11:22:53.837228 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 11:22:53.841537 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 11:22:53.843810 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 11:22:53.850272 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 11:22:53.853733 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 11:22:53.857396 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 11:22:53.860341 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 11:22:53.867254 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 11:22:53.870039 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 11:22:53.874004 CPU physical address size: 39 bits
1993 11:22:53.876908 call enable_fixed_mtrr()
1994 11:22:53.880042 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 11:22:53.883628 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 11:22:53.890212 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 11:22:53.893433 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 11:22:53.896541 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 11:22:53.900033 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 11:22:53.903019 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 11:22:53.906770
2002 11:22:53.909780 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 11:22:53.913209 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 11:22:53.916795 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 11:22:53.919994 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 11:22:53.926300 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 11:22:53.929585 call enable_fixed_mtrr()
2008 11:22:53.933275 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 11:22:53.936113 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 11:22:53.940098 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 11:22:53.943268 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 11:22:53.950202 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 11:22:53.953372 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 11:22:53.956427 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 11:22:53.960166 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 11:22:53.965838 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 11:22:53.969445 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 11:22:53.972737 CPU physical address size: 39 bits
2019 11:22:53.976725 call enable_fixed_mtrr()
2020 11:22:53.979651 CPU physical address size: 39 bits
2021 11:22:53.982848 CPU physical address size: 39 bits
2022 11:22:53.986083 CBFS: Found @ offset 1c96c0 size 3f798
2023 11:22:53.989734 CPU physical address size: 39 bits
2024 11:22:53.995880 Checking segment from ROM address 0xffdd16f8
2025 11:22:53.999324 Checking segment from ROM address 0xffdd1714
2026 11:22:54.002363 Loading segment from ROM address 0xffdd16f8
2027 11:22:54.005914 code (compression=0)
2028 11:22:54.015530 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2029 11:22:54.022400 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2030 11:22:54.025972 it's not compressed!
2031 11:22:54.117188 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2032 11:22:54.124249 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2033 11:22:54.127678 Loading segment from ROM address 0xffdd1714
2034 11:22:54.130591 Entry Point 0x30000000
2035 11:22:54.133399 Loaded segments
2036 11:22:54.139437 Finalizing chipset.
2037 11:22:54.143060 Finalizing SMM.
2038 11:22:54.145838 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2039 11:22:54.149835 mp_park_aps done after 0 msecs.
2040 11:22:54.156496 Jumping to boot code at 30000000(99b62000)
2041 11:22:54.162674 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2042 11:22:54.163283
2043 11:22:54.163675
2044 11:22:54.164035
2045 11:22:54.165426 Starting depthcharge on Helios...
2046 11:22:54.165940
2047 11:22:54.167021 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2048 11:22:54.167614 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2049 11:22:54.168075 Setting prompt string to ['hatch:']
2050 11:22:54.168527 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2051 11:22:54.175607 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2052 11:22:54.176118
2053 11:22:54.182331 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2054 11:22:54.182953
2055 11:22:54.189026 board_setup: Info: eMMC controller not present; skipping
2056 11:22:54.189644
2057 11:22:54.192282 New NVMe Controller 0x30053ac0 @ 00:1d:00
2058 11:22:54.192869
2059 11:22:54.199264 board_setup: Info: SDHCI controller not present; skipping
2060 11:22:54.199848
2061 11:22:54.205627 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2062 11:22:54.206202
2063 11:22:54.206584 Wipe memory regions:
2064 11:22:54.206951
2065 11:22:54.209034 [0x00000000001000, 0x000000000a0000)
2066 11:22:54.209675
2067 11:22:54.212503 [0x00000000100000, 0x00000030000000)
2068 11:22:54.215816
2069 11:22:54.281124 [0x00000030657430, 0x00000099a2c000)
2070 11:22:54.281715
2071 11:22:54.422140 [0x00000100000000, 0x0000045e800000)
2072 11:22:54.422719
2073 11:22:55.804774 R8152: Initializing
2074 11:22:55.805355
2075 11:22:55.808630 Version 9 (ocp_data = 6010)
2076 11:22:55.809210
2077 11:22:55.812567 R8152: Done initializing
2078 11:22:55.813200
2079 11:22:55.815437 Adding net device
2080 11:22:55.815912
2081 11:22:56.425515 R8152: Initializing
2082 11:22:56.426097
2083 11:22:56.428084 Version 6 (ocp_data = 5c30)
2084 11:22:56.428580
2085 11:22:56.431455 R8152: Done initializing
2086 11:22:56.431911
2087 11:22:56.437797 net_add_device: Attemp to include the same device
2088 11:22:56.437962
2089 11:22:56.444591 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2090 11:22:56.444748
2091 11:22:56.444825
2092 11:22:56.444894
2093 11:22:56.445183 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2095 11:22:56.546372 hatch: tftpboot 192.168.201.1 8138831/tftp-deploy-845o_du_/kernel/bzImage 8138831/tftp-deploy-845o_du_/kernel/cmdline 8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
2096 11:22:56.547042 Setting prompt string to 'Starting kernel'
2097 11:22:56.547542 Setting prompt string to ['Starting kernel']
2098 11:22:56.547958 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2099 11:22:56.548368 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2100 11:22:56.551918 tftpboot 192.168.201.1 8138831/tftp-deploy-845o_du_/kernel/bzImoy-845o_du_/kernel/cmdline 8138831/tftp-deploy-845o_du_/ramdisk/ramdisk.cpio.gz
2101 11:22:56.552000
2102 11:22:56.552066 Waiting for link
2103 11:22:56.552127
2104 11:22:56.753205 done.
2105 11:22:56.753825
2106 11:22:56.754245 MAC: 00:24:32:50:1a:5f
2107 11:22:56.754701
2108 11:22:56.755808 Sending DHCP discover... done.
2109 11:22:56.756294
2110 11:22:56.759824 Waiting for reply... done.
2111 11:22:56.760405
2112 11:22:56.762704 Sending DHCP request... done.
2113 11:22:56.763191
2114 11:22:56.766150 Waiting for reply... done.
2115 11:22:56.766638
2116 11:22:56.769834 My ip is 192.168.201.21
2117 11:22:56.770411
2118 11:22:56.773158 The DHCP server ip is 192.168.201.1
2119 11:22:56.773774
2120 11:22:56.776035 TFTP server IP predefined by user: 192.168.201.1
2121 11:22:56.776621
2122 11:22:56.783177 Bootfile predefined by user: 8138831/tftp-deploy-845o_du_/kernel/bzImage
2123 11:22:56.783759
2124 11:22:56.785691 Sending tftp read request... done.
2125 11:22:56.786171
2126 11:22:56.793324 Waiting for the transfer...
2127 11:22:56.793977
2128 11:22:57.466839 00000000 ################################################################
2129 11:22:57.467382
2130 11:22:58.138099 00080000 ################################################################
2131 11:22:58.138638
2132 11:22:58.806232 00100000 ################################################################
2133 11:22:58.806809
2134 11:22:59.479234 00180000 ################################################################
2135 11:22:59.479812
2136 11:23:00.137516 00200000 ################################################################
2137 11:23:00.138100
2138 11:23:00.806830 00280000 ################################################################
2139 11:23:00.807409
2140 11:23:01.478835 00300000 ################################################################
2141 11:23:01.479385
2142 11:23:02.151821 00380000 ################################################################
2143 11:23:02.152468
2144 11:23:02.829116 00400000 ################################################################
2145 11:23:02.829681
2146 11:23:03.492130 00480000 ################################################################
2147 11:23:03.492666
2148 11:23:04.165986 00500000 ################################################################
2149 11:23:04.166525
2150 11:23:04.846511 00580000 ################################################################
2151 11:23:04.847101
2152 11:23:05.514164 00600000 ################################################################
2153 11:23:05.514749
2154 11:23:06.188821 00680000 ################################################################
2155 11:23:06.189349
2156 11:23:06.853829 00700000 ################################################################
2157 11:23:06.854353
2158 11:23:07.516627 00780000 ################################################################
2159 11:23:07.517148
2160 11:23:08.191094 00800000 ################################################################
2161 11:23:08.191616
2162 11:23:08.658935 00880000 ############################################# done.
2163 11:23:08.659455
2164 11:23:08.662263 The bootfile was 9273344 bytes long.
2165 11:23:08.662810
2166 11:23:08.665782 Sending tftp read request... done.
2167 11:23:08.666270
2168 11:23:08.669055 Waiting for the transfer...
2169 11:23:08.669626
2170 11:23:09.326990 00000000 ################################################################
2171 11:23:09.327560
2172 11:23:10.003723 00080000 ################################################################
2173 11:23:10.004246
2174 11:23:10.672152 00100000 ################################################################
2175 11:23:10.672731
2176 11:23:11.358040 00180000 ################################################################
2177 11:23:11.358761
2178 11:23:12.025539 00200000 ################################################################
2179 11:23:12.026067
2180 11:23:12.691817 00280000 ################################################################
2181 11:23:12.692352
2182 11:23:13.364445 00300000 ################################################################
2183 11:23:13.364983
2184 11:23:14.039114 00380000 ################################################################
2185 11:23:14.039668
2186 11:23:14.710666 00400000 ################################################################
2187 11:23:14.711187
2188 11:23:15.368185 00480000 ################################################################
2189 11:23:15.368706
2190 11:23:15.725586 00500000 ################################### done.
2191 11:23:15.726227
2192 11:23:15.728969 Sending tftp read request... done.
2193 11:23:15.729403
2194 11:23:15.732163 Waiting for the transfer...
2195 11:23:15.732594
2196 11:23:15.732938 00000000 # done.
2197 11:23:15.733266
2198 11:23:15.742541 Command line loaded dynamically from TFTP file: 8138831/tftp-deploy-845o_du_/kernel/cmdline
2199 11:23:15.743129
2200 11:23:15.768881 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8138831/extract-nfsrootfs-65zlu5iu,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2201 11:23:15.769516
2202 11:23:15.775419 ec_init(0): CrosEC protocol v3 supported (256, 256)
2203 11:23:15.775901
2204 11:23:15.782635 Shutting down all USB controllers.
2205 11:23:15.783121
2206 11:23:15.783505 Removing current net device
2207 11:23:15.783864
2208 11:23:15.790420 Finalizing coreboot
2209 11:23:15.791025
2210 11:23:15.796922 Exiting depthcharge with code 4 at timestamp: 29057971
2211 11:23:15.797410
2212 11:23:15.797859
2213 11:23:15.798294 Starting kernel ...
2214 11:23:15.798659
2215 11:23:15.799004
2216 11:23:15.800396 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2217 11:23:15.800984 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2218 11:23:15.801405 Setting prompt string to ['Linux version [0-9]']
2219 11:23:15.801862 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2220 11:23:15.802272 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2221 11:23:15.803225
2223 11:27:35.801298 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2225 11:27:35.801650 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2227 11:27:35.801904 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2230 11:27:35.802330 end: 2 depthcharge-action (duration 00:05:00) [common]
2232 11:27:35.802738 Cleaning after the job
2233 11:27:35.802878 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/ramdisk
2234 11:27:35.803575 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/kernel
2235 11:27:35.804537 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/nfsrootfs
2236 11:27:35.852937 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138831/tftp-deploy-845o_du_/modules
2237 11:27:35.853259 start: 4.1 power-off (timeout 00:00:30) [common]
2238 11:27:35.853426 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2239 11:27:35.872679 >> Command sent successfully.
2240 11:27:35.874546 Returned 0 in 0 seconds
2241 11:27:35.975384 end: 4.1 power-off (duration 00:00:00) [common]
2243 11:27:35.976145 start: 4.2 read-feedback (timeout 00:10:00) [common]
2244 11:27:35.976613 Listened to connection for namespace 'common' for up to 1s
2245 11:27:36.981550 Finalising connection for namespace 'common'
2246 11:27:36.981731 Disconnecting from shell: Finalise
2247 11:27:37.082563 end: 4.2 read-feedback (duration 00:00:01) [common]
2248 11:27:37.082799 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8138831
2249 11:27:37.239452 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8138831
2250 11:27:37.239650 JobError: Your job cannot terminate cleanly.