Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 11:16:09.054992 lava-dispatcher, installed at version: 2022.10
2 11:16:09.055175 start: 0 validate
3 11:16:09.055303 Start time: 2022-11-26 11:16:09.055295+00:00 (UTC)
4 11:16:09.055425 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:16:09.055554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 11:16:09.349712 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:16:09.350444 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:16:09.645943 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:16:09.646649 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.266-cip86%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 11:16:09.944173 validate duration: 0.89
12 11:16:09.945554 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:16:09.946145 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:16:09.946689 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:16:09.947275 Not decompressing ramdisk as can be used compressed.
16 11:16:09.947758 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 11:16:09.948147 saving as /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/ramdisk/rootfs.cpio.gz
18 11:16:09.948503 total size: 8415749 (8MB)
19 11:16:09.955361 progress 0% (0MB)
20 11:16:09.966782 progress 5% (0MB)
21 11:16:09.977002 progress 10% (0MB)
22 11:16:09.983243 progress 15% (1MB)
23 11:16:09.988006 progress 20% (1MB)
24 11:16:09.991987 progress 25% (2MB)
25 11:16:09.995530 progress 30% (2MB)
26 11:16:09.998599 progress 35% (2MB)
27 11:16:10.001558 progress 40% (3MB)
28 11:16:10.004331 progress 45% (3MB)
29 11:16:10.006981 progress 50% (4MB)
30 11:16:10.009495 progress 55% (4MB)
31 11:16:10.011865 progress 60% (4MB)
32 11:16:10.013965 progress 65% (5MB)
33 11:16:10.016093 progress 70% (5MB)
34 11:16:10.018230 progress 75% (6MB)
35 11:16:10.020274 progress 80% (6MB)
36 11:16:10.022362 progress 85% (6MB)
37 11:16:10.024411 progress 90% (7MB)
38 11:16:10.026341 progress 95% (7MB)
39 11:16:10.028384 progress 100% (8MB)
40 11:16:10.028652 8MB downloaded in 0.08s (100.13MB/s)
41 11:16:10.028804 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:16:10.029051 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:16:10.029141 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:16:10.029230 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:16:10.029337 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 11:16:10.029410 saving as /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/kernel/bzImage
48 11:16:10.029473 total size: 9273344 (8MB)
49 11:16:10.029580 No compression specified
50 11:16:10.031675 progress 0% (0MB)
51 11:16:10.035686 progress 5% (0MB)
52 11:16:10.039887 progress 10% (0MB)
53 11:16:10.043582 progress 15% (1MB)
54 11:16:10.047495 progress 20% (1MB)
55 11:16:10.051462 progress 25% (2MB)
56 11:16:10.055265 progress 30% (2MB)
57 11:16:10.059468 progress 35% (3MB)
58 11:16:10.063658 progress 40% (3MB)
59 11:16:10.067383 progress 45% (4MB)
60 11:16:10.071207 progress 50% (4MB)
61 11:16:10.075008 progress 55% (4MB)
62 11:16:10.079167 progress 60% (5MB)
63 11:16:10.082909 progress 65% (5MB)
64 11:16:10.087148 progress 70% (6MB)
65 11:16:10.090992 progress 75% (6MB)
66 11:16:10.095013 progress 80% (7MB)
67 11:16:10.098886 progress 85% (7MB)
68 11:16:10.102836 progress 90% (7MB)
69 11:16:10.106692 progress 95% (8MB)
70 11:16:10.110596 progress 100% (8MB)
71 11:16:10.110888 8MB downloaded in 0.08s (108.63MB/s)
72 11:16:10.111042 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:16:10.111283 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:16:10.111373 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:16:10.111461 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:16:10.111567 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.266-cip86/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 11:16:10.111635 saving as /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/modules/modules.tar
79 11:16:10.111697 total size: 64696 (0MB)
80 11:16:10.111759 Using unxz to decompress xz
81 11:16:10.115879 progress 50% (0MB)
82 11:16:10.116255 progress 100% (0MB)
83 11:16:10.120485 0MB downloaded in 0.01s (7.03MB/s)
84 11:16:10.120711 end: 1.3.1 http-download (duration 00:00:00) [common]
86 11:16:10.120973 end: 1.3 download-retry (duration 00:00:00) [common]
87 11:16:10.121071 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 11:16:10.121169 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 11:16:10.121254 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 11:16:10.121341 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 11:16:10.121552 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_
92 11:16:10.121665 makedir: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin
93 11:16:10.121754 makedir: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/tests
94 11:16:10.121838 makedir: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/results
95 11:16:10.121945 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-add-keys
96 11:16:10.122075 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-add-sources
97 11:16:10.122189 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-background-process-start
98 11:16:10.122303 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-background-process-stop
99 11:16:10.122417 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-common-functions
100 11:16:10.122539 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-echo-ipv4
101 11:16:10.122653 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-install-packages
102 11:16:10.122768 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-installed-packages
103 11:16:10.122877 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-os-build
104 11:16:10.122987 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-probe-channel
105 11:16:10.123100 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-probe-ip
106 11:16:10.123210 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-target-ip
107 11:16:10.123321 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-target-mac
108 11:16:10.123431 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-target-storage
109 11:16:10.123550 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-case
110 11:16:10.123661 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-event
111 11:16:10.123772 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-feedback
112 11:16:10.123885 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-raise
113 11:16:10.124000 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-reference
114 11:16:10.124110 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-runner
115 11:16:10.124220 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-set
116 11:16:10.124329 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-test-shell
117 11:16:10.124443 Updating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-install-packages (oe)
118 11:16:10.124559 Updating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/bin/lava-installed-packages (oe)
119 11:16:10.124661 Creating /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/environment
120 11:16:10.124753 LAVA metadata
121 11:16:10.124826 - LAVA_JOB_ID=8138777
122 11:16:10.124894 - LAVA_DISPATCHER_IP=192.168.201.1
123 11:16:10.125001 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 11:16:10.125069 skipped lava-vland-overlay
125 11:16:10.125147 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 11:16:10.125234 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 11:16:10.125301 skipped lava-multinode-overlay
128 11:16:10.125377 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 11:16:10.125463 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 11:16:10.125592 Loading test definitions
131 11:16:10.125692 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 11:16:10.125769 Using /lava-8138777 at stage 0
133 11:16:10.126035 uuid=8138777_1.4.2.3.1 testdef=None
134 11:16:10.126127 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 11:16:10.126220 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 11:16:10.126716 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 11:16:10.126949 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 11:16:10.127522 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 11:16:10.127762 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 11:16:10.128303 runner path: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/0/tests/0_dmesg test_uuid 8138777_1.4.2.3.1
143 11:16:10.128452 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 11:16:10.128690 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 11:16:10.128766 Using /lava-8138777 at stage 1
147 11:16:10.129021 uuid=8138777_1.4.2.3.5 testdef=None
148 11:16:10.129118 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 11:16:10.129212 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 11:16:10.129695 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 11:16:10.129924 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 11:16:10.130496 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 11:16:10.130738 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 11:16:10.131285 runner path: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/1/tests/1_bootrr test_uuid 8138777_1.4.2.3.5
157 11:16:10.131427 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 11:16:10.131642 Creating lava-test-runner.conf files
160 11:16:10.131709 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/0 for stage 0
161 11:16:10.131794 - 0_dmesg
162 11:16:10.131870 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8138777/lava-overlay-4lwl9nx_/lava-8138777/1 for stage 1
163 11:16:10.131953 - 1_bootrr
164 11:16:10.132046 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 11:16:10.132136 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 11:16:10.138408 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 11:16:10.138523 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 11:16:10.138619 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 11:16:10.138708 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 11:16:10.138796 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 11:16:10.321165 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 11:16:10.321534 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 11:16:10.321657 extracting modules file /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8138777/extract-overlay-ramdisk-xph2nt35/ramdisk
174 11:16:10.325841 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 11:16:10.325951 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 11:16:10.326035 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138777/compress-overlay-i42m6b5k/overlay-1.4.2.4.tar.gz to ramdisk
177 11:16:10.326109 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8138777/compress-overlay-i42m6b5k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8138777/extract-overlay-ramdisk-xph2nt35/ramdisk
178 11:16:10.329875 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 11:16:10.329984 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 11:16:10.330076 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 11:16:10.330169 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 11:16:10.330247 Building ramdisk /var/lib/lava/dispatcher/tmp/8138777/extract-overlay-ramdisk-xph2nt35/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8138777/extract-overlay-ramdisk-xph2nt35/ramdisk
183 11:16:10.393125 >> 48236 blocks
184 11:16:11.130101 rename /var/lib/lava/dispatcher/tmp/8138777/extract-overlay-ramdisk-xph2nt35/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
185 11:16:11.130511 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 11:16:11.130640 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 11:16:11.130740 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 11:16:11.130834 No mkimage arch provided, not using FIT.
189 11:16:11.130924 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 11:16:11.131008 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 11:16:11.131108 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 11:16:11.131201 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 11:16:11.131294 No LXC device requested
194 11:16:11.131380 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 11:16:11.131469 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 11:16:11.131550 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 11:16:11.131621 Checking files for TFTP limit of 4294967296 bytes.
198 11:16:11.132001 end: 1 tftp-deploy (duration 00:00:01) [common]
199 11:16:11.132109 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 11:16:11.132209 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 11:16:11.132338 substitutions:
202 11:16:11.132407 - {DTB}: None
203 11:16:11.132474 - {INITRD}: 8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
204 11:16:11.132535 - {KERNEL}: 8138777/tftp-deploy-9yo3fnds/kernel/bzImage
205 11:16:11.132595 - {LAVA_MAC}: None
206 11:16:11.132654 - {PRESEED_CONFIG}: None
207 11:16:11.132712 - {PRESEED_LOCAL}: None
208 11:16:11.132769 - {RAMDISK}: 8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
209 11:16:11.132828 - {ROOT_PART}: None
210 11:16:11.132884 - {ROOT}: None
211 11:16:11.132940 - {SERVER_IP}: 192.168.201.1
212 11:16:11.132997 - {TEE}: None
213 11:16:11.133054 Parsed boot commands:
214 11:16:11.133110 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 11:16:11.133258 Parsed boot commands: tftpboot 192.168.201.1 8138777/tftp-deploy-9yo3fnds/kernel/bzImage 8138777/tftp-deploy-9yo3fnds/kernel/cmdline 8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
216 11:16:11.133350 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 11:16:11.133441 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 11:16:11.133584 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 11:16:11.133679 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 11:16:11.133752 Not connected, no need to disconnect.
221 11:16:11.133828 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 11:16:11.133958 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 11:16:11.134050 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
224 11:16:11.136797 Setting prompt string to ['lava-test: # ']
225 11:16:11.137073 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 11:16:11.137177 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 11:16:11.137280 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 11:16:11.137371 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 11:16:11.137608 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
230 11:16:11.156677 >> Command sent successfully.
231 11:16:11.158622 Returned 0 in 0 seconds
232 11:16:11.259838 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 11:16:11.262561 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 11:16:11.263187 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 11:16:11.263670 Setting prompt string to 'Starting depthcharge on Helios...'
237 11:16:11.264040 Changing prompt to 'Starting depthcharge on Helios...'
238 11:16:11.264428 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 11:16:11.265753 [Enter `^Ec?' for help]
240 11:16:17.928496
241 11:16:17.929155
242 11:16:17.938335 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 11:16:17.942382 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 11:16:17.948173 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 11:16:17.951425 CPU: AES supported, TXT NOT supported, VT supported
246 11:16:17.958306 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 11:16:17.961607 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 11:16:17.968832 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 11:16:17.971838 VBOOT: Loading verstage.
250 11:16:17.974945 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 11:16:17.981965 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 11:16:17.985082 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 11:16:17.988788 CBFS @ c08000 size 3f8000
254 11:16:17.994940 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 11:16:17.998147 CBFS: Locating 'fallback/verstage'
256 11:16:18.001468 CBFS: Found @ offset 10fb80 size 1072c
257 11:16:18.005583
258 11:16:18.006164
259 11:16:18.014891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 11:16:18.029708 Probing TPM: . done!
261 11:16:18.033123 TPM ready after 0 ms
262 11:16:18.036410 Connected to device vid:did:rid of 1ae0:0028:00
263 11:16:18.046103 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 11:16:18.049875 Initialized TPM device CR50 revision 0
265 11:16:18.092435 tlcl_send_startup: Startup return code is 0
266 11:16:18.093038 TPM: setup succeeded
267 11:16:18.105383 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 11:16:18.109132 Chrome EC: UHEPI supported
269 11:16:18.112385 Phase 1
270 11:16:18.116539 FMAP: area GBB found @ c05000 (12288 bytes)
271 11:16:18.122416 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 11:16:18.123072 Phase 2
273 11:16:18.125725 Phase 3
274 11:16:18.129267 FMAP: area GBB found @ c05000 (12288 bytes)
275 11:16:18.135746 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 11:16:18.142210 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 11:16:18.145716 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 11:16:18.152154 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 11:16:18.167813 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 11:16:18.171351 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 11:16:18.178072 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 11:16:18.181964 Phase 4
283 11:16:18.185544 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 11:16:18.192067 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 11:16:18.371193 VB2:vb2_rsa_verify_digest() Digest check failed!
286 11:16:18.375037 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 11:16:18.377929
288 11:16:18.378416 Saving nvdata
289 11:16:18.381316 Reboot requested (10020007)
290 11:16:18.384545 board_reset() called!
291 11:16:18.385149 full_reset() called!
292 11:16:22.895857
293 11:16:22.896448
294 11:16:22.905521 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 11:16:22.908343 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 11:16:22.915181 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 11:16:22.918427 CPU: AES supported, TXT NOT supported, VT supported
298 11:16:22.925272 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 11:16:22.928937 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 11:16:22.935571 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 11:16:22.938438 VBOOT: Loading verstage.
302 11:16:22.941796 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 11:16:22.948877 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 11:16:22.954792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 11:16:22.955366 CBFS @ c08000 size 3f8000
306 11:16:22.961311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 11:16:22.964790 CBFS: Locating 'fallback/verstage'
308 11:16:22.968039 CBFS: Found @ offset 10fb80 size 1072c
309 11:16:22.972149
310 11:16:22.972803
311 11:16:22.982164 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 11:16:22.996427 Probing TPM: . done!
313 11:16:23.000167 TPM ready after 0 ms
314 11:16:23.003256 Connected to device vid:did:rid of 1ae0:0028:00
315 11:16:23.014029 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
316 11:16:23.017380 Initialized TPM device CR50 revision 0
317 11:16:23.059339 tlcl_send_startup: Startup return code is 0
318 11:16:23.059937 TPM: setup succeeded
319 11:16:23.072050 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 11:16:23.075806 Chrome EC: UHEPI supported
321 11:16:23.078743 Phase 1
322 11:16:23.082818 FMAP: area GBB found @ c05000 (12288 bytes)
323 11:16:23.089792 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 11:16:23.095994 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 11:16:23.099108 Recovery requested (1009000e)
326 11:16:23.099591 Saving nvdata
327 11:16:23.104897
328 11:16:23.110605 tlcl_extend: response is 0
329 11:16:23.120267 tlcl_extend: response is 0
330 11:16:23.126634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
331 11:16:23.129827 CBFS @ c08000 size 3f8000
332 11:16:23.137035 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
333 11:16:23.139983 CBFS: Locating 'fallback/romstage'
334 11:16:23.143296 CBFS: Found @ offset 80 size 145fc
335 11:16:23.146873 Accumulated console time in verstage 99 ms
336 11:16:23.147468
337 11:16:23.147897
338 11:16:23.159684 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
339 11:16:23.166364 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
340 11:16:23.169759 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
341 11:16:23.172927 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
342 11:16:23.179637 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
343 11:16:23.183160 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
344 11:16:23.186190 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
345 11:16:23.189864 TCO_STS: 0000 0000
346 11:16:23.193125 GEN_PMCON: e0015238 00000200
347 11:16:23.196178 GBLRST_CAUSE: 00000000 00000000
348 11:16:23.196764 prev_sleep_state 5
349 11:16:23.199695 Boot Count incremented to 46815
350 11:16:23.206622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
351 11:16:23.209591 CBFS @ c08000 size 3f8000
352 11:16:23.216275 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
353 11:16:23.216854 CBFS: Locating 'fspm.bin'
354 11:16:23.219681 CBFS: Found @ offset 5ffc0 size 71000
355 11:16:23.223887 Chrome EC: UHEPI supported
356 11:16:23.231292 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
357 11:16:23.236586 Probing TPM: done!
358 11:16:23.242968 Connected to device vid:did:rid of 1ae0:0028:00
359 11:16:23.253324 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
360 11:16:23.259232 Initialized TPM device CR50 revision 0
361 11:16:23.268211 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
362 11:16:23.274473 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
363 11:16:23.278053 MRC cache found, size 1948
364 11:16:23.281211 bootmode is set to: 2
365 11:16:23.284528 PRMRR disabled by config.
366 11:16:23.285042 SPD INDEX = 1
367 11:16:23.287845
368 11:16:23.291125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 11:16:23.294695 CBFS @ c08000 size 3f8000
370 11:16:23.300953 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
371 11:16:23.301616 CBFS: Locating 'spd.bin'
372 11:16:23.305146 CBFS: Found @ offset 5fb80 size 400
373 11:16:23.307740 SPD: module type is LPDDR3
374 11:16:23.310820 SPD: module part is
375 11:16:23.317697 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
376 11:16:23.321104 SPD: device width 4 bits, bus width 8 bits
377 11:16:23.324207 SPD: module size is 4096 MB (per channel)
378 11:16:23.327756 memory slot: 0 configuration done.
379 11:16:23.330711 memory slot: 2 configuration done.
380 11:16:23.383112 CBMEM:
381 11:16:23.385967 IMD: root @ 99fff000 254 entries.
382 11:16:23.389513 IMD: root @ 99ffec00 62 entries.
383 11:16:23.392801 External stage cache:
384 11:16:23.396041 IMD: root @ 9abff000 254 entries.
385 11:16:23.399532 IMD: root @ 9abfec00 62 entries.
386 11:16:23.402340 Chrome EC: clear events_b mask to 0x0000000020004000
387 11:16:23.419065 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
388 11:16:23.431983 tlcl_write: response is 0
389 11:16:23.441373 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 11:16:23.447789 MRC: TPM MRC hash updated successfully.
391 11:16:23.448416 2 DIMMs found
392 11:16:23.450821 SMM Memory Map
393 11:16:23.454446 SMRAM : 0x9a000000 0x1000000
394 11:16:23.457655 Subregion 0: 0x9a000000 0xa00000
395 11:16:23.461256 Subregion 1: 0x9aa00000 0x200000
396 11:16:23.463728 Subregion 2: 0x9ac00000 0x400000
397 11:16:23.467887 top_of_ram = 0x9a000000
398 11:16:23.470380 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
399 11:16:23.477376 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
400 11:16:23.480690 MTRR Range: Start=ff000000 End=0 (Size 1000000)
401 11:16:23.487291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 11:16:23.490742 CBFS @ c08000 size 3f8000
403 11:16:23.494555 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 11:16:23.497390 CBFS: Locating 'fallback/postcar'
405 11:16:23.503996 CBFS: Found @ offset 107000 size 4b44
406 11:16:23.507490 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
407 11:16:23.520116 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
408 11:16:23.523252 Processing 180 relocs. Offset value of 0x97c0c000
409 11:16:23.532091 Accumulated console time in romstage 286 ms
410 11:16:23.532673
411 11:16:23.533068
412 11:16:23.541726 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
413 11:16:23.548561 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
414 11:16:23.552375 CBFS @ c08000 size 3f8000
415 11:16:23.555387 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
416 11:16:23.561586 CBFS: Locating 'fallback/ramstage'
417 11:16:23.564902 CBFS: Found @ offset 43380 size 1b9e8
418 11:16:23.571621 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
419 11:16:23.603487 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
420 11:16:23.607020 Processing 3976 relocs. Offset value of 0x98db0000
421 11:16:23.613743 Accumulated console time in postcar 52 ms
422 11:16:23.614326
423 11:16:23.614712
424 11:16:23.624240 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
425 11:16:23.630652 FMAP: area RO_VPD found @ c00000 (16384 bytes)
426 11:16:23.633795 WARNING: RO_VPD is uninitialized or empty.
427 11:16:23.637157 FMAP: area RW_VPD found @ af8000 (8192 bytes)
428 11:16:23.643607 FMAP: area RW_VPD found @ af8000 (8192 bytes)
429 11:16:23.644190 Normal boot.
430 11:16:23.650600 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
431 11:16:23.653955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
432 11:16:23.656892 CBFS @ c08000 size 3f8000
433 11:16:23.663325 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
434 11:16:23.666789 CBFS: Locating 'cpu_microcode_blob.bin'
435 11:16:23.670390 CBFS: Found @ offset 14700 size 2ec00
436 11:16:23.673437 microcode: sig=0x806ec pf=0x4 revision=0xc9
437 11:16:23.677159 Skip microcode update
438 11:16:23.679911 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
439 11:16:23.683178 CBFS @ c08000 size 3f8000
440 11:16:23.689910 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
441 11:16:23.693050 CBFS: Locating 'fsps.bin'
442 11:16:23.696336 CBFS: Found @ offset d1fc0 size 35000
443 11:16:23.721992 Detected 4 core, 8 thread CPU.
444 11:16:23.725099 Setting up SMI for CPU
445 11:16:23.728416 IED base = 0x9ac00000
446 11:16:23.729030 IED size = 0x00400000
447 11:16:23.732351 Will perform SMM setup.
448 11:16:23.738338 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
449 11:16:23.744936 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
450 11:16:23.751824 Processing 16 relocs. Offset value of 0x00030000
451 11:16:23.752422 Attempting to start 7 APs
452 11:16:23.758362 Waiting for 10ms after sending INIT.
453 11:16:23.772286 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
454 11:16:23.772895 done.
455 11:16:23.775018 AP: slot 3 apic_id 2.
456 11:16:23.778062 AP: slot 1 apic_id 3.
457 11:16:23.778563 AP: slot 5 apic_id 4.
458 11:16:23.781828 AP: slot 4 apic_id 5.
459 11:16:23.785186 Waiting for 2nd SIPI to complete...done.
460 11:16:23.788207 AP: slot 6 apic_id 6.
461 11:16:23.791544 AP: slot 7 apic_id 7.
462 11:16:23.798411 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
463 11:16:23.801548 Processing 13 relocs. Offset value of 0x00038000
464 11:16:23.805068
465 11:16:23.808484 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
466 11:16:23.815409 Installing SMM handler to 0x9a000000
467 11:16:23.822166 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
468 11:16:23.827767 Processing 658 relocs. Offset value of 0x9a010000
469 11:16:23.834743 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
470 11:16:23.837631 Processing 13 relocs. Offset value of 0x9a008000
471 11:16:23.844521 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
472 11:16:23.850977 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
473 11:16:23.857926 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
474 11:16:23.861117 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
475 11:16:23.867933 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
476 11:16:23.874139 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
477 11:16:23.880379 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
478 11:16:23.887254 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
479 11:16:23.890077 Clearing SMI status registers
480 11:16:23.890566 SMI_STS: PM1
481 11:16:23.893355 PM1_STS: PWRBTN
482 11:16:23.893885 TCO_STS: SECOND_TO
483 11:16:23.896985 New SMBASE 0x9a000000
484 11:16:23.900098 In relocation handler: CPU 0
485 11:16:23.903344 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
486 11:16:23.910385 Writing SMRR. base = 0x9a000006, mask=0xff000800
487 11:16:23.910871 Relocation complete.
488 11:16:23.913966 New SMBASE 0x99fff800
489 11:16:23.916788 In relocation handler: CPU 2
490 11:16:23.920303 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
491 11:16:23.924185 Writing SMRR. base = 0x9a000006, mask=0xff000800
492 11:16:23.927337 Relocation complete.
493 11:16:23.930453 New SMBASE 0x99fffc00
494 11:16:23.933301 In relocation handler: CPU 1
495 11:16:23.936551 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
496 11:16:23.939932 Writing SMRR. base = 0x9a000006, mask=0xff000800
497 11:16:23.943259 Relocation complete.
498 11:16:23.946859 New SMBASE 0x99fff400
499 11:16:23.950071 In relocation handler: CPU 3
500 11:16:23.953573 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
501 11:16:23.957046 Writing SMRR. base = 0x9a000006, mask=0xff000800
502 11:16:23.960060 Relocation complete.
503 11:16:23.963203 New SMBASE 0x99ffec00
504 11:16:23.966355 In relocation handler: CPU 5
505 11:16:23.970080 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
506 11:16:23.973258 Writing SMRR. base = 0x9a000006, mask=0xff000800
507 11:16:23.976919 Relocation complete.
508 11:16:23.980235 New SMBASE 0x99fff000
509 11:16:23.980879 In relocation handler: CPU 4
510 11:16:23.983120
511 11:16:23.986611 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
512 11:16:23.990213 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 11:16:23.993129 Relocation complete.
514 11:16:23.996500 New SMBASE 0x99ffe400
515 11:16:23.996996 In relocation handler: CPU 7
516 11:16:24.003334 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
517 11:16:24.006369 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 11:16:24.010126 Relocation complete.
519 11:16:24.010734 New SMBASE 0x99ffe800
520 11:16:24.013026 In relocation handler: CPU 6
521 11:16:24.020122 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
522 11:16:24.023822 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 11:16:24.026577 Relocation complete.
524 11:16:24.027158 Initializing CPU #0
525 11:16:24.029911 CPU: vendor Intel device 806ec
526 11:16:24.033138 CPU: family 06, model 8e, stepping 0c
527 11:16:24.036974 Clearing out pending MCEs
528 11:16:24.039844 Setting up local APIC...
529 11:16:24.043250 apic_id: 0x00 done.
530 11:16:24.046630 Turbo is available but hidden
531 11:16:24.049551 Turbo is available and visible
532 11:16:24.050137 VMX status: enabled
533 11:16:24.052995 IA32_FEATURE_CONTROL status: locked
534 11:16:24.056924 Skip microcode update
535 11:16:24.059763 CPU #0 initialized
536 11:16:24.060344 Initializing CPU #2
537 11:16:24.063045 Initializing CPU #7
538 11:16:24.063554 Initializing CPU #6
539 11:16:24.066516 CPU: vendor Intel device 806ec
540 11:16:24.069543 CPU: family 06, model 8e, stepping 0c
541 11:16:24.073318 CPU: vendor Intel device 806ec
542 11:16:24.079811 CPU: family 06, model 8e, stepping 0c
543 11:16:24.080352 Clearing out pending MCEs
544 11:16:24.082820 Initializing CPU #4
545 11:16:24.085994 Initializing CPU #5
546 11:16:24.089608 CPU: vendor Intel device 806ec
547 11:16:24.093591 CPU: family 06, model 8e, stepping 0c
548 11:16:24.096384 CPU: vendor Intel device 806ec
549 11:16:24.099865 CPU: family 06, model 8e, stepping 0c
550 11:16:24.102609 Clearing out pending MCEs
551 11:16:24.103095 Clearing out pending MCEs
552 11:16:24.106041 Setting up local APIC...
553 11:16:24.109235 Initializing CPU #1
554 11:16:24.109760 Initializing CPU #3
555 11:16:24.113039 CPU: vendor Intel device 806ec
556 11:16:24.116181 CPU: family 06, model 8e, stepping 0c
557 11:16:24.119493 CPU: vendor Intel device 806ec
558 11:16:24.126099 CPU: family 06, model 8e, stepping 0c
559 11:16:24.126686 Clearing out pending MCEs
560 11:16:24.129257 Clearing out pending MCEs
561 11:16:24.132746 Setting up local APIC...
562 11:16:24.136085 CPU: vendor Intel device 806ec
563 11:16:24.139272 CPU: family 06, model 8e, stepping 0c
564 11:16:24.142644 Clearing out pending MCEs
565 11:16:24.143230 Setting up local APIC...
566 11:16:24.146407
567 11:16:24.146993 apic_id: 0x05 done.
568 11:16:24.149210 Setting up local APIC...
569 11:16:24.152900 Setting up local APIC...
570 11:16:24.153511 apic_id: 0x03 done.
571 11:16:24.155985 apic_id: 0x02 done.
572 11:16:24.159237 VMX status: enabled
573 11:16:24.159867 VMX status: enabled
574 11:16:24.162672 IA32_FEATURE_CONTROL status: locked
575 11:16:24.166004 IA32_FEATURE_CONTROL status: locked
576 11:16:24.169799 Skip microcode update
577 11:16:24.172228 Skip microcode update
578 11:16:24.172708 CPU #1 initialized
579 11:16:24.175722 CPU #3 initialized
580 11:16:24.178766 apic_id: 0x01 done.
581 11:16:24.179270 apic_id: 0x04 done.
582 11:16:24.182210 VMX status: enabled
583 11:16:24.182741 VMX status: enabled
584 11:16:24.185833 IA32_FEATURE_CONTROL status: locked
585 11:16:24.189458
586 11:16:24.192509 IA32_FEATURE_CONTROL status: locked
587 11:16:24.193289 Skip microcode update
588 11:16:24.195638 Skip microcode update
589 11:16:24.198767 VMX status: enabled
590 11:16:24.199253 Setting up local APIC...
591 11:16:24.202028 IA32_FEATURE_CONTROL status: locked
592 11:16:24.205528 Clearing out pending MCEs
593 11:16:24.208742 apic_id: 0x07 done.
594 11:16:24.212502 Setting up local APIC...
595 11:16:24.213046 CPU #4 initialized
596 11:16:24.215696 CPU #5 initialized
597 11:16:24.216284 Skip microcode update
598 11:16:24.218695 VMX status: enabled
599 11:16:24.222083 apic_id: 0x06 done.
600 11:16:24.225671 IA32_FEATURE_CONTROL status: locked
601 11:16:24.226246 VMX status: enabled
602 11:16:24.229147 Skip microcode update
603 11:16:24.232362 CPU #2 initialized
604 11:16:24.232938 CPU #7 initialized
605 11:16:24.235365 IA32_FEATURE_CONTROL status: locked
606 11:16:24.239178 Skip microcode update
607 11:16:24.242021 CPU #6 initialized
608 11:16:24.246094 bsp_do_flight_plan done after 457 msecs.
609 11:16:24.249021 CPU: frequency set to 4200 MHz
610 11:16:24.249643 Enabling SMIs.
611 11:16:24.252360 Locking SMM.
612 11:16:24.266199 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
613 11:16:24.269728 CBFS @ c08000 size 3f8000
614 11:16:24.276047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
615 11:16:24.276633 CBFS: Locating 'vbt.bin'
616 11:16:24.279307 CBFS: Found @ offset 5f5c0 size 499
617 11:16:24.286643 Found a VBT of 4608 bytes after decompression
618 11:16:24.471288 Display FSP Version Info HOB
619 11:16:24.474186 Reference Code - CPU = 9.0.1e.30
620 11:16:24.477722 uCode Version = 0.0.0.ca
621 11:16:24.481084 TXT ACM version = ff.ff.ff.ffff
622 11:16:24.484358 Display FSP Version Info HOB
623 11:16:24.487438 Reference Code - ME = 9.0.1e.30
624 11:16:24.490493 MEBx version = 0.0.0.0
625 11:16:24.493861 ME Firmware Version = Consumer SKU
626 11:16:24.497301 Display FSP Version Info HOB
627 11:16:24.500711 Reference Code - CML PCH = 9.0.1e.30
628 11:16:24.501337 PCH-CRID Status = Disabled
629 11:16:24.504781
630 11:16:24.507270 PCH-CRID Original Value = ff.ff.ff.ffff
631 11:16:24.510498 PCH-CRID New Value = ff.ff.ff.ffff
632 11:16:24.513840 OPROM - RST - RAID = ff.ff.ff.ffff
633 11:16:24.517293 ChipsetInit Base Version = ff.ff.ff.ffff
634 11:16:24.520554 ChipsetInit Oem Version = ff.ff.ff.ffff
635 11:16:24.523854 Display FSP Version Info HOB
636 11:16:24.530491 Reference Code - SA - System Agent = 9.0.1e.30
637 11:16:24.534061 Reference Code - MRC = 0.7.1.6c
638 11:16:24.534651 SA - PCIe Version = 9.0.1e.30
639 11:16:24.537997 SA-CRID Status = Disabled
640 11:16:24.540423 SA-CRID Original Value = 0.0.0.c
641 11:16:24.543952 SA-CRID New Value = 0.0.0.c
642 11:16:24.547406 OPROM - VBIOS = ff.ff.ff.ffff
643 11:16:24.548003 RTC Init
644 11:16:24.550548
645 11:16:24.553858 Set power on after power failure.
646 11:16:24.554452 Disabling Deep S3
647 11:16:24.557352 Disabling Deep S3
648 11:16:24.557985 Disabling Deep S4
649 11:16:24.560819 Disabling Deep S4
650 11:16:24.561411 Disabling Deep S5
651 11:16:24.563757 Disabling Deep S5
652 11:16:24.570401 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
653 11:16:24.571007 Enumerating buses...
654 11:16:24.577180 Show all devs... Before device enumeration.
655 11:16:24.577795 Root Device: enabled 1
656 11:16:24.580103 CPU_CLUSTER: 0: enabled 1
657 11:16:24.583431 DOMAIN: 0000: enabled 1
658 11:16:24.587014 APIC: 00: enabled 1
659 11:16:24.587607 PCI: 00:00.0: enabled 1
660 11:16:24.589955 PCI: 00:02.0: enabled 1
661 11:16:24.593135 PCI: 00:04.0: enabled 0
662 11:16:24.593651 PCI: 00:05.0: enabled 0
663 11:16:24.597268
664 11:16:24.597906 PCI: 00:12.0: enabled 1
665 11:16:24.600035 PCI: 00:12.5: enabled 0
666 11:16:24.603382 PCI: 00:12.6: enabled 0
667 11:16:24.603875 PCI: 00:14.0: enabled 1
668 11:16:24.607045 PCI: 00:14.1: enabled 0
669 11:16:24.610051 PCI: 00:14.3: enabled 1
670 11:16:24.613418 PCI: 00:14.5: enabled 0
671 11:16:24.614051 PCI: 00:15.0: enabled 1
672 11:16:24.617152 PCI: 00:15.1: enabled 1
673 11:16:24.620597 PCI: 00:15.2: enabled 0
674 11:16:24.623269 PCI: 00:15.3: enabled 0
675 11:16:24.623759 PCI: 00:16.0: enabled 1
676 11:16:24.626775 PCI: 00:16.1: enabled 0
677 11:16:24.630160 PCI: 00:16.2: enabled 0
678 11:16:24.630754 PCI: 00:16.3: enabled 0
679 11:16:24.633395
680 11:16:24.634019 PCI: 00:16.4: enabled 0
681 11:16:24.636779 PCI: 00:16.5: enabled 0
682 11:16:24.639923 PCI: 00:17.0: enabled 1
683 11:16:24.640525 PCI: 00:19.0: enabled 1
684 11:16:24.644055 PCI: 00:19.1: enabled 0
685 11:16:24.646379 PCI: 00:19.2: enabled 0
686 11:16:24.650198 PCI: 00:1a.0: enabled 0
687 11:16:24.650835 PCI: 00:1c.0: enabled 0
688 11:16:24.653178 PCI: 00:1c.1: enabled 0
689 11:16:24.656696 PCI: 00:1c.2: enabled 0
690 11:16:24.659718 PCI: 00:1c.3: enabled 0
691 11:16:24.660215 PCI: 00:1c.4: enabled 0
692 11:16:24.663158 PCI: 00:1c.5: enabled 0
693 11:16:24.666474 PCI: 00:1c.6: enabled 0
694 11:16:24.666965 PCI: 00:1c.7: enabled 0
695 11:16:24.670413
696 11:16:24.671011 PCI: 00:1d.0: enabled 1
697 11:16:24.673354 PCI: 00:1d.1: enabled 0
698 11:16:24.676273 PCI: 00:1d.2: enabled 0
699 11:16:24.676765 PCI: 00:1d.3: enabled 0
700 11:16:24.679647 PCI: 00:1d.4: enabled 0
701 11:16:24.683680 PCI: 00:1d.5: enabled 1
702 11:16:24.686573 PCI: 00:1e.0: enabled 1
703 11:16:24.687166 PCI: 00:1e.1: enabled 0
704 11:16:24.689658 PCI: 00:1e.2: enabled 1
705 11:16:24.692822 PCI: 00:1e.3: enabled 1
706 11:16:24.696384 PCI: 00:1f.0: enabled 1
707 11:16:24.696877 PCI: 00:1f.1: enabled 1
708 11:16:24.699603 PCI: 00:1f.2: enabled 1
709 11:16:24.702992 PCI: 00:1f.3: enabled 1
710 11:16:24.706530 PCI: 00:1f.4: enabled 1
711 11:16:24.707118 PCI: 00:1f.5: enabled 1
712 11:16:24.709715 PCI: 00:1f.6: enabled 0
713 11:16:24.713048 USB0 port 0: enabled 1
714 11:16:24.713566 I2C: 00:15: enabled 1
715 11:16:24.716128 I2C: 00:5d: enabled 1
716 11:16:24.720113 GENERIC: 0.0: enabled 1
717 11:16:24.720705 I2C: 00:1a: enabled 1
718 11:16:24.722775 I2C: 00:38: enabled 1
719 11:16:24.726182 I2C: 00:39: enabled 1
720 11:16:24.726666 I2C: 00:3a: enabled 1
721 11:16:24.729396 I2C: 00:3b: enabled 1
722 11:16:24.732984 PCI: 00:00.0: enabled 1
723 11:16:24.733615 SPI: 00: enabled 1
724 11:16:24.736296 SPI: 01: enabled 1
725 11:16:24.739317 PNP: 0c09.0: enabled 1
726 11:16:24.739906 USB2 port 0: enabled 1
727 11:16:24.742790 USB2 port 1: enabled 1
728 11:16:24.746177 USB2 port 2: enabled 0
729 11:16:24.749368 USB2 port 3: enabled 0
730 11:16:24.749980 USB2 port 5: enabled 0
731 11:16:24.752311 USB2 port 6: enabled 1
732 11:16:24.755790 USB2 port 9: enabled 1
733 11:16:24.756380 USB3 port 0: enabled 1
734 11:16:24.759326 USB3 port 1: enabled 1
735 11:16:24.762677 USB3 port 2: enabled 1
736 11:16:24.763270 USB3 port 3: enabled 1
737 11:16:24.765997
738 11:16:24.766485 USB3 port 4: enabled 0
739 11:16:24.769034 APIC: 03: enabled 1
740 11:16:24.769656 APIC: 01: enabled 1
741 11:16:24.772692 APIC: 02: enabled 1
742 11:16:24.775843 APIC: 05: enabled 1
743 11:16:24.776442 APIC: 04: enabled 1
744 11:16:24.779387 APIC: 06: enabled 1
745 11:16:24.782762 APIC: 07: enabled 1
746 11:16:24.783354 Compare with tree...
747 11:16:24.785949 Root Device: enabled 1
748 11:16:24.789453 CPU_CLUSTER: 0: enabled 1
749 11:16:24.790075 APIC: 00: enabled 1
750 11:16:24.792620 APIC: 03: enabled 1
751 11:16:24.795762 APIC: 01: enabled 1
752 11:16:24.796260 APIC: 02: enabled 1
753 11:16:24.798752 APIC: 05: enabled 1
754 11:16:24.802400 APIC: 04: enabled 1
755 11:16:24.802991 APIC: 06: enabled 1
756 11:16:24.805552 APIC: 07: enabled 1
757 11:16:24.809036 DOMAIN: 0000: enabled 1
758 11:16:24.812156 PCI: 00:00.0: enabled 1
759 11:16:24.812646 PCI: 00:02.0: enabled 1
760 11:16:24.815413 PCI: 00:04.0: enabled 0
761 11:16:24.819316 PCI: 00:05.0: enabled 0
762 11:16:24.821913 PCI: 00:12.0: enabled 1
763 11:16:24.825333 PCI: 00:12.5: enabled 0
764 11:16:24.825944 PCI: 00:12.6: enabled 0
765 11:16:24.829192 PCI: 00:14.0: enabled 1
766 11:16:24.832231 USB0 port 0: enabled 1
767 11:16:24.835567 USB2 port 0: enabled 1
768 11:16:24.839251 USB2 port 1: enabled 1
769 11:16:24.839832 USB2 port 2: enabled 0
770 11:16:24.842026 USB2 port 3: enabled 0
771 11:16:24.845471 USB2 port 5: enabled 0
772 11:16:24.849609 USB2 port 6: enabled 1
773 11:16:24.851678 USB2 port 9: enabled 1
774 11:16:24.855687 USB3 port 0: enabled 1
775 11:16:24.856265 USB3 port 1: enabled 1
776 11:16:24.858570 USB3 port 2: enabled 1
777 11:16:24.861855 USB3 port 3: enabled 1
778 11:16:24.865081 USB3 port 4: enabled 0
779 11:16:24.868530 PCI: 00:14.1: enabled 0
780 11:16:24.869103 PCI: 00:14.3: enabled 1
781 11:16:24.872010 PCI: 00:14.5: enabled 0
782 11:16:24.875710 PCI: 00:15.0: enabled 1
783 11:16:24.878415 I2C: 00:15: enabled 1
784 11:16:24.882250 PCI: 00:15.1: enabled 1
785 11:16:24.882830 I2C: 00:5d: enabled 1
786 11:16:24.885429 GENERIC: 0.0: enabled 1
787 11:16:24.888806 PCI: 00:15.2: enabled 0
788 11:16:24.892020 PCI: 00:15.3: enabled 0
789 11:16:24.894760 PCI: 00:16.0: enabled 1
790 11:16:24.895249 PCI: 00:16.1: enabled 0
791 11:16:24.898883 PCI: 00:16.2: enabled 0
792 11:16:24.902075 PCI: 00:16.3: enabled 0
793 11:16:24.905166 PCI: 00:16.4: enabled 0
794 11:16:24.905778 PCI: 00:16.5: enabled 0
795 11:16:24.908858 PCI: 00:17.0: enabled 1
796 11:16:24.912060 PCI: 00:19.0: enabled 1
797 11:16:24.914875 I2C: 00:1a: enabled 1
798 11:16:24.918131 I2C: 00:38: enabled 1
799 11:16:24.918641 I2C: 00:39: enabled 1
800 11:16:24.921744 I2C: 00:3a: enabled 1
801 11:16:24.924791 I2C: 00:3b: enabled 1
802 11:16:24.928273 PCI: 00:19.1: enabled 0
803 11:16:24.928854 PCI: 00:19.2: enabled 0
804 11:16:24.931599 PCI: 00:1a.0: enabled 0
805 11:16:24.935163 PCI: 00:1c.0: enabled 0
806 11:16:24.938177 PCI: 00:1c.1: enabled 0
807 11:16:24.941605 PCI: 00:1c.2: enabled 0
808 11:16:24.942136 PCI: 00:1c.3: enabled 0
809 11:16:24.944771 PCI: 00:1c.4: enabled 0
810 11:16:24.948082 PCI: 00:1c.5: enabled 0
811 11:16:24.951648 PCI: 00:1c.6: enabled 0
812 11:16:24.954767 PCI: 00:1c.7: enabled 0
813 11:16:24.955383 PCI: 00:1d.0: enabled 1
814 11:16:24.957880 PCI: 00:1d.1: enabled 0
815 11:16:24.961279 PCI: 00:1d.2: enabled 0
816 11:16:24.964599 PCI: 00:1d.3: enabled 0
817 11:16:24.968211 PCI: 00:1d.4: enabled 0
818 11:16:24.968794 PCI: 00:1d.5: enabled 1
819 11:16:24.971455 PCI: 00:00.0: enabled 1
820 11:16:24.974676 PCI: 00:1e.0: enabled 1
821 11:16:24.978270 PCI: 00:1e.1: enabled 0
822 11:16:24.981157 PCI: 00:1e.2: enabled 1
823 11:16:24.981675 SPI: 00: enabled 1
824 11:16:24.984892 PCI: 00:1e.3: enabled 1
825 11:16:24.988133 SPI: 01: enabled 1
826 11:16:24.991227 PCI: 00:1f.0: enabled 1
827 11:16:24.991807 PNP: 0c09.0: enabled 1
828 11:16:24.994241 PCI: 00:1f.1: enabled 1
829 11:16:24.997705 PCI: 00:1f.2: enabled 1
830 11:16:25.001292 PCI: 00:1f.3: enabled 1
831 11:16:25.001920 PCI: 00:1f.4: enabled 1
832 11:16:25.004383
833 11:16:25.004998 PCI: 00:1f.5: enabled 1
834 11:16:25.007951 PCI: 00:1f.6: enabled 0
835 11:16:25.011123 Root Device scanning...
836 11:16:25.014353 scan_static_bus for Root Device
837 11:16:25.017709 CPU_CLUSTER: 0 enabled
838 11:16:25.018290 DOMAIN: 0000 enabled
839 11:16:25.020968 DOMAIN: 0000 scanning...
840 11:16:25.024088 PCI: pci_scan_bus for bus 00
841 11:16:25.027600 PCI: 00:00.0 [8086/0000] ops
842 11:16:25.030893 PCI: 00:00.0 [8086/9b61] enabled
843 11:16:25.034067 PCI: 00:02.0 [8086/0000] bus ops
844 11:16:25.037353 PCI: 00:02.0 [8086/9b41] enabled
845 11:16:25.040992 PCI: 00:04.0 [8086/1903] disabled
846 11:16:25.044210 PCI: 00:08.0 [8086/1911] enabled
847 11:16:25.047778 PCI: 00:12.0 [8086/02f9] enabled
848 11:16:25.050723 PCI: 00:14.0 [8086/0000] bus ops
849 11:16:25.054240 PCI: 00:14.0 [8086/02ed] enabled
850 11:16:25.057756 PCI: 00:14.2 [8086/02ef] enabled
851 11:16:25.061094 PCI: 00:14.3 [8086/02f0] enabled
852 11:16:25.064081 PCI: 00:15.0 [8086/0000] bus ops
853 11:16:25.067624 PCI: 00:15.0 [8086/02e8] enabled
854 11:16:25.071258 PCI: 00:15.1 [8086/0000] bus ops
855 11:16:25.074392 PCI: 00:15.1 [8086/02e9] enabled
856 11:16:25.077421 PCI: 00:16.0 [8086/0000] ops
857 11:16:25.080571 PCI: 00:16.0 [8086/02e0] enabled
858 11:16:25.084061 PCI: 00:17.0 [8086/0000] ops
859 11:16:25.087200 PCI: 00:17.0 [8086/02d3] enabled
860 11:16:25.090685 PCI: 00:19.0 [8086/0000] bus ops
861 11:16:25.093548 PCI: 00:19.0 [8086/02c5] enabled
862 11:16:25.097200 PCI: 00:1d.0 [8086/0000] bus ops
863 11:16:25.100980 PCI: 00:1d.0 [8086/02b0] enabled
864 11:16:25.103870 PCI: Static device PCI: 00:1d.5 not found, disabling it.
865 11:16:25.106948 PCI: 00:1e.0 [8086/0000] ops
866 11:16:25.110270 PCI: 00:1e.0 [8086/02a8] enabled
867 11:16:25.113914 PCI: 00:1e.2 [8086/0000] bus ops
868 11:16:25.117275 PCI: 00:1e.2 [8086/02aa] enabled
869 11:16:25.120662 PCI: 00:1e.3 [8086/0000] bus ops
870 11:16:25.123958 PCI: 00:1e.3 [8086/02ab] enabled
871 11:16:25.127321 PCI: 00:1f.0 [8086/0000] bus ops
872 11:16:25.130248 PCI: 00:1f.0 [8086/0284] enabled
873 11:16:25.136798 PCI: Static device PCI: 00:1f.1 not found, disabling it.
874 11:16:25.143569 PCI: Static device PCI: 00:1f.2 not found, disabling it.
875 11:16:25.147299 PCI: 00:1f.3 [8086/0000] bus ops
876 11:16:25.150467 PCI: 00:1f.3 [8086/02c8] enabled
877 11:16:25.153389 PCI: 00:1f.4 [8086/0000] bus ops
878 11:16:25.157205 PCI: 00:1f.4 [8086/02a3] enabled
879 11:16:25.160035 PCI: 00:1f.5 [8086/0000] bus ops
880 11:16:25.163947 PCI: 00:1f.5 [8086/02a4] enabled
881 11:16:25.167186 PCI: Leftover static devices:
882 11:16:25.167349 PCI: 00:05.0
883 11:16:25.167461 PCI: 00:12.5
884 11:16:25.169413 PCI: 00:12.6
885 11:16:25.169537 PCI: 00:14.1
886 11:16:25.173238 PCI: 00:14.5
887 11:16:25.173324 PCI: 00:15.2
888 11:16:25.176569 PCI: 00:15.3
889 11:16:25.176731 PCI: 00:16.1
890 11:16:25.176807 PCI: 00:16.2
891 11:16:25.179712 PCI: 00:16.3
892 11:16:25.179882 PCI: 00:16.4
893 11:16:25.183098 PCI: 00:16.5
894 11:16:25.183243 PCI: 00:19.1
895 11:16:25.183321 PCI: 00:19.2
896 11:16:25.186800 PCI: 00:1a.0
897 11:16:25.186939 PCI: 00:1c.0
898 11:16:25.189867 PCI: 00:1c.1
899 11:16:25.190043 PCI: 00:1c.2
900 11:16:25.190129 PCI: 00:1c.3
901 11:16:25.193248 PCI: 00:1c.4
902 11:16:25.193428 PCI: 00:1c.5
903 11:16:25.196342 PCI: 00:1c.6
904 11:16:25.196503 PCI: 00:1c.7
905 11:16:25.199502 PCI: 00:1d.1
906 11:16:25.199671 PCI: 00:1d.2
907 11:16:25.199774 PCI: 00:1d.3
908 11:16:25.203005 PCI: 00:1d.4
909 11:16:25.203166 PCI: 00:1d.5
910 11:16:25.206118 PCI: 00:1e.1
911 11:16:25.206288 PCI: 00:1f.1
912 11:16:25.206400 PCI: 00:1f.2
913 11:16:25.209764 PCI: 00:1f.6
914 11:16:25.213066 PCI: Check your devicetree.cb.
915 11:16:25.216255 PCI: 00:02.0 scanning...
916 11:16:25.219437 scan_generic_bus for PCI: 00:02.0
917 11:16:25.222860 scan_generic_bus for PCI: 00:02.0 done
918 11:16:25.229359 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
919 11:16:25.229721 PCI: 00:14.0 scanning...
920 11:16:25.233168 scan_static_bus for PCI: 00:14.0
921 11:16:25.236120 USB0 port 0 enabled
922 11:16:25.239702 USB0 port 0 scanning...
923 11:16:25.243435 scan_static_bus for USB0 port 0
924 11:16:25.244114 USB2 port 0 enabled
925 11:16:25.246352 USB2 port 1 enabled
926 11:16:25.250439 USB2 port 2 disabled
927 11:16:25.251015 USB2 port 3 disabled
928 11:16:25.253635 USB2 port 5 disabled
929 11:16:25.257138 USB2 port 6 enabled
930 11:16:25.257685 USB2 port 9 enabled
931 11:16:25.259343 USB3 port 0 enabled
932 11:16:25.259823 USB3 port 1 enabled
933 11:16:25.262860 USB3 port 2 enabled
934 11:16:25.266107 USB3 port 3 enabled
935 11:16:25.266589 USB3 port 4 disabled
936 11:16:25.269293 USB2 port 0 scanning...
937 11:16:25.272988 scan_static_bus for USB2 port 0
938 11:16:25.276711 scan_static_bus for USB2 port 0 done
939 11:16:25.282748 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
940 11:16:25.285823 USB2 port 1 scanning...
941 11:16:25.289428 scan_static_bus for USB2 port 1
942 11:16:25.292853 scan_static_bus for USB2 port 1 done
943 11:16:25.296121 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
944 11:16:25.299307 USB2 port 6 scanning...
945 11:16:25.302765 scan_static_bus for USB2 port 6
946 11:16:25.305594 scan_static_bus for USB2 port 6 done
947 11:16:25.312573 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
948 11:16:25.316819 USB2 port 9 scanning...
949 11:16:25.318962 scan_static_bus for USB2 port 9
950 11:16:25.322659 scan_static_bus for USB2 port 9 done
951 11:16:25.325582 scan_bus: scanning of bus USB2 port 9 took 9686 usecs
952 11:16:25.329020 USB3 port 0 scanning...
953 11:16:25.332631 scan_static_bus for USB3 port 0
954 11:16:25.335443 scan_static_bus for USB3 port 0 done
955 11:16:25.342141 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
956 11:16:25.345548 USB3 port 1 scanning...
957 11:16:25.349705 scan_static_bus for USB3 port 1
958 11:16:25.352625 scan_static_bus for USB3 port 1 done
959 11:16:25.355852 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
960 11:16:25.359319 USB3 port 2 scanning...
961 11:16:25.362381 scan_static_bus for USB3 port 2
962 11:16:25.365363 scan_static_bus for USB3 port 2 done
963 11:16:25.372139 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
964 11:16:25.375394 USB3 port 3 scanning...
965 11:16:25.379041 scan_static_bus for USB3 port 3
966 11:16:25.382050 scan_static_bus for USB3 port 3 done
967 11:16:25.388993 scan_bus: scanning of bus USB3 port 3 took 9695 usecs
968 11:16:25.392080 scan_static_bus for USB0 port 0 done
969 11:16:25.395684 scan_bus: scanning of bus USB0 port 0 took 155289 usecs
970 11:16:25.398957 scan_static_bus for PCI: 00:14.0 done
971 11:16:25.405180 scan_bus: scanning of bus PCI: 00:14.0 took 172905 usecs
972 11:16:25.408485 PCI: 00:15.0 scanning...
973 11:16:25.411733 scan_generic_bus for PCI: 00:15.0
974 11:16:25.415147 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
975 11:16:25.418423 scan_generic_bus for PCI: 00:15.0 done
976 11:16:25.425027 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
977 11:16:25.429022 PCI: 00:15.1 scanning...
978 11:16:25.431734 scan_generic_bus for PCI: 00:15.1
979 11:16:25.435331 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
980 11:16:25.442389 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
981 11:16:25.445357 scan_generic_bus for PCI: 00:15.1 done
982 11:16:25.448799 scan_bus: scanning of bus PCI: 00:15.1 took 18588 usecs
983 11:16:25.451399 PCI: 00:19.0 scanning...
984 11:16:25.455484 scan_generic_bus for PCI: 00:19.0
985 11:16:25.461614 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
986 11:16:25.464562 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
987 11:16:25.468454 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
988 11:16:25.471582 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
989 11:16:25.475107 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
990 11:16:25.481248 scan_generic_bus for PCI: 00:19.0 done
991 11:16:25.484848 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
992 11:16:25.488057 PCI: 00:1d.0 scanning...
993 11:16:25.491940 do_pci_scan_bridge for PCI: 00:1d.0
994 11:16:25.494527 PCI: pci_scan_bus for bus 01
995 11:16:25.497904 PCI: 01:00.0 [1c5c/1327] enabled
996 11:16:25.501592 Enabling Common Clock Configuration
997 11:16:25.507870 L1 Sub-State supported from root port 29
998 11:16:25.508442 L1 Sub-State Support = 0xf
999 11:16:25.510926 CommonModeRestoreTime = 0x28
1000 11:16:25.517681 Power On Value = 0x16, Power On Scale = 0x0
1001 11:16:25.518169 ASPM: Enabled L1
1002 11:16:25.524401 scan_bus: scanning of bus PCI: 00:1d.0 took 32766 usecs
1003 11:16:25.527749 PCI: 00:1e.2 scanning...
1004 11:16:25.530883 scan_generic_bus for PCI: 00:1e.2
1005 11:16:25.534327 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1006 11:16:25.537679 scan_generic_bus for PCI: 00:1e.2 done
1007 11:16:25.544591 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1008 11:16:25.545203 PCI: 00:1e.3 scanning...
1009 11:16:25.547210
1010 11:16:25.550744 scan_generic_bus for PCI: 00:1e.3
1011 11:16:25.554806 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1012 11:16:25.557795 scan_generic_bus for PCI: 00:1e.3 done
1013 11:16:25.564253 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1014 11:16:25.564822 PCI: 00:1f.0 scanning...
1015 11:16:25.567641 scan_static_bus for PCI: 00:1f.0
1016 11:16:25.571403 PNP: 0c09.0 enabled
1017 11:16:25.574252 scan_static_bus for PCI: 00:1f.0 done
1018 11:16:25.580872 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1019 11:16:25.584238 PCI: 00:1f.3 scanning...
1020 11:16:25.587585 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1021 11:16:25.591273 PCI: 00:1f.4 scanning...
1022 11:16:25.593800 scan_generic_bus for PCI: 00:1f.4
1023 11:16:25.597517 scan_generic_bus for PCI: 00:1f.4 done
1024 11:16:25.604495 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1025 11:16:25.607762 PCI: 00:1f.5 scanning...
1026 11:16:25.610269 scan_generic_bus for PCI: 00:1f.5
1027 11:16:25.613952 scan_generic_bus for PCI: 00:1f.5 done
1028 11:16:25.620541 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1029 11:16:25.627308 scan_bus: scanning of bus DOMAIN: 0000 took 604859 usecs
1030 11:16:25.630255 scan_static_bus for Root Device done
1031 11:16:25.634049 scan_bus: scanning of bus Root Device took 624709 usecs
1032 11:16:25.637301 done
1033 11:16:25.640174 Chrome EC: UHEPI supported
1034 11:16:25.643701 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1035 11:16:25.650283 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1036 11:16:25.657294 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1037 11:16:25.663639 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1038 11:16:25.666957 SPI flash protection: WPSW=0 SRP0=0
1039 11:16:25.673324 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1040 11:16:25.676796 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1041 11:16:25.680536 found VGA at PCI: 00:02.0
1042 11:16:25.683627 Setting up VGA for PCI: 00:02.0
1043 11:16:25.690176 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1044 11:16:25.693239 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1045 11:16:25.696897 Allocating resources...
1046 11:16:25.700169 Reading resources...
1047 11:16:25.703604 Root Device read_resources bus 0 link: 0
1048 11:16:25.706307 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1049 11:16:25.713234 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1050 11:16:25.716854 DOMAIN: 0000 read_resources bus 0 link: 0
1051 11:16:25.723910 PCI: 00:14.0 read_resources bus 0 link: 0
1052 11:16:25.726866 USB0 port 0 read_resources bus 0 link: 0
1053 11:16:25.734918 USB0 port 0 read_resources bus 0 link: 0 done
1054 11:16:25.738285 PCI: 00:14.0 read_resources bus 0 link: 0 done
1055 11:16:25.745400 PCI: 00:15.0 read_resources bus 1 link: 0
1056 11:16:25.749373 PCI: 00:15.0 read_resources bus 1 link: 0 done
1057 11:16:25.755733 PCI: 00:15.1 read_resources bus 2 link: 0
1058 11:16:25.759164 PCI: 00:15.1 read_resources bus 2 link: 0 done
1059 11:16:25.766167 PCI: 00:19.0 read_resources bus 3 link: 0
1060 11:16:25.773314 PCI: 00:19.0 read_resources bus 3 link: 0 done
1061 11:16:25.776303 PCI: 00:1d.0 read_resources bus 1 link: 0
1062 11:16:25.783372 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1063 11:16:25.786227 PCI: 00:1e.2 read_resources bus 4 link: 0
1064 11:16:25.792837 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1065 11:16:25.796427 PCI: 00:1e.3 read_resources bus 5 link: 0
1066 11:16:25.803054 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1067 11:16:25.806212 PCI: 00:1f.0 read_resources bus 0 link: 0
1068 11:16:25.813010 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1069 11:16:25.819439 DOMAIN: 0000 read_resources bus 0 link: 0 done
1070 11:16:25.822490 Root Device read_resources bus 0 link: 0 done
1071 11:16:25.826280 Done reading resources.
1072 11:16:25.832247 Show resources in subtree (Root Device)...After reading.
1073 11:16:25.835563 Root Device child on link 0 CPU_CLUSTER: 0
1074 11:16:25.839147 CPU_CLUSTER: 0 child on link 0 APIC: 00
1075 11:16:25.841904 APIC: 00
1076 11:16:25.842395 APIC: 03
1077 11:16:25.842885 APIC: 01
1078 11:16:25.845585 APIC: 02
1079 11:16:25.846079 APIC: 05
1080 11:16:25.846567 APIC: 04
1081 11:16:25.848779 APIC: 06
1082 11:16:25.849273 APIC: 07
1083 11:16:25.855695 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1084 11:16:25.861951 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1085 11:16:25.912253 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1086 11:16:25.912881 PCI: 00:00.0
1087 11:16:25.913815 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1088 11:16:25.914251 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1089 11:16:25.914717 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1090 11:16:25.915584 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1091 11:16:25.961618 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1092 11:16:25.962230 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1093 11:16:25.963167 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1094 11:16:25.963598 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1095 11:16:25.964065 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1096 11:16:26.011681 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1097 11:16:26.012722 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1098 11:16:26.013169 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1099 11:16:26.014087 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1100 11:16:26.014500 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1101 11:16:26.027911 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1102 11:16:26.028902 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1103 11:16:26.031235 PCI: 00:02.0
1104 11:16:26.038102 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1105 11:16:26.047560 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1106 11:16:26.055478 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1107 11:16:26.057269 PCI: 00:04.0
1108 11:16:26.057791 PCI: 00:08.0
1109 11:16:26.067902 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 11:16:26.070502 PCI: 00:12.0
1111 11:16:26.080764 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1112 11:16:26.083807 PCI: 00:14.0 child on link 0 USB0 port 0
1113 11:16:26.093621 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1114 11:16:26.097211 USB0 port 0 child on link 0 USB2 port 0
1115 11:16:26.100436 USB2 port 0
1116 11:16:26.101031 USB2 port 1
1117 11:16:26.103918 USB2 port 2
1118 11:16:26.107481 USB2 port 3
1119 11:16:26.108078 USB2 port 5
1120 11:16:26.110208 USB2 port 6
1121 11:16:26.110702 USB2 port 9
1122 11:16:26.114253 USB3 port 0
1123 11:16:26.114850 USB3 port 1
1124 11:16:26.117093 USB3 port 2
1125 11:16:26.117615 USB3 port 3
1126 11:16:26.120855 USB3 port 4
1127 11:16:26.121443 PCI: 00:14.2
1128 11:16:26.130817 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1129 11:16:26.140416 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1130 11:16:26.144005 PCI: 00:14.3
1131 11:16:26.154257 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1132 11:16:26.156857 PCI: 00:15.0 child on link 0 I2C: 01:15
1133 11:16:26.167203 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 11:16:26.169677 I2C: 01:15
1135 11:16:26.172886 PCI: 00:15.1 child on link 0 I2C: 02:5d
1136 11:16:26.183307 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 11:16:26.183909 I2C: 02:5d
1138 11:16:26.186847 GENERIC: 0.0
1139 11:16:26.187375 PCI: 00:16.0
1140 11:16:26.196822 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 11:16:26.200072 PCI: 00:17.0
1142 11:16:26.210414 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1143 11:16:26.216527 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1144 11:16:26.226068 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1145 11:16:26.233453 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1146 11:16:26.242616 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1147 11:16:26.253028 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1148 11:16:26.256069 PCI: 00:19.0 child on link 0 I2C: 03:1a
1149 11:16:26.265527 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 11:16:26.266128 I2C: 03:1a
1151 11:16:26.269103 I2C: 03:38
1152 11:16:26.269636 I2C: 03:39
1153 11:16:26.272427 I2C: 03:3a
1154 11:16:26.272914 I2C: 03:3b
1155 11:16:26.279725 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1156 11:16:26.285896 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1157 11:16:26.296187 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1158 11:16:26.305831 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1159 11:16:26.306421 PCI: 01:00.0
1160 11:16:26.315657 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1161 11:16:26.319094 PCI: 00:1e.0
1162 11:16:26.329001 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1163 11:16:26.338774 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 11:16:26.342324 PCI: 00:1e.2 child on link 0 SPI: 00
1165 11:16:26.352086 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 11:16:26.355098 SPI: 00
1167 11:16:26.358425 PCI: 00:1e.3 child on link 0 SPI: 01
1168 11:16:26.368270 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 11:16:26.368846 SPI: 01
1170 11:16:26.375394 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1171 11:16:26.381838 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1172 11:16:26.391893 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1173 11:16:26.395333 PNP: 0c09.0
1174 11:16:26.401632 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1175 11:16:26.405561 PCI: 00:1f.3
1176 11:16:26.414992 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1177 11:16:26.425059 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1178 11:16:26.425690 PCI: 00:1f.4
1179 11:16:26.434919 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1180 11:16:26.444649 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1181 11:16:26.445251 PCI: 00:1f.5
1182 11:16:26.454681 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1183 11:16:26.461351 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1184 11:16:26.467860 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1185 11:16:26.474281 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1186 11:16:26.477697 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1187 11:16:26.481005 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1188 11:16:26.484532 PCI: 00:17.0 18 * [0x60 - 0x67] io
1189 11:16:26.487844 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1190 11:16:26.494015 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1191 11:16:26.497544
1192 11:16:26.500719 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1193 11:16:26.510609 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1194 11:16:26.517708 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1195 11:16:26.524407 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1196 11:16:26.527279
1197 11:16:26.530573 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1198 11:16:26.537109 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1199 11:16:26.541227 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1200 11:16:26.547416 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1201 11:16:26.550637 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1202 11:16:26.558296 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1203 11:16:26.560615 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1204 11:16:26.566996 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1205 11:16:26.570332 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1206 11:16:26.576938 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1207 11:16:26.580313 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1208 11:16:26.586885 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1209 11:16:26.590223 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1210 11:16:26.597294 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1211 11:16:26.600131 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1212 11:16:26.603417 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1213 11:16:26.607066
1214 11:16:26.610230 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1215 11:16:26.613972 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1216 11:16:26.619947 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1217 11:16:26.623772 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1218 11:16:26.630466 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1219 11:16:26.633410 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1220 11:16:26.640564 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1221 11:16:26.643250 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1222 11:16:26.649990 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1223 11:16:26.656459 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1224 11:16:26.659812 avoid_fixed_resources: DOMAIN: 0000
1225 11:16:26.666412 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1226 11:16:26.672861 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1227 11:16:26.679889 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1228 11:16:26.689979 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1229 11:16:26.696396 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1230 11:16:26.702776 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1231 11:16:26.713027 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1232 11:16:26.719172 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1233 11:16:26.726382 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1234 11:16:26.732902 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1235 11:16:26.742374 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1236 11:16:26.749148 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1237 11:16:26.749783 Setting resources...
1238 11:16:26.756326 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1239 11:16:26.762557 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1240 11:16:26.765713 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1241 11:16:26.769301 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1242 11:16:26.772587 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1243 11:16:26.779124 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1244 11:16:26.786116 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1245 11:16:26.792010 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1246 11:16:26.798658 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1247 11:16:26.805662 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1248 11:16:26.808832 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1249 11:16:26.815512 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1250 11:16:26.818471 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1251 11:16:26.825895 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1252 11:16:26.828649 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1253 11:16:26.835458 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1254 11:16:26.838612 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1255 11:16:26.842292 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1256 11:16:26.848452 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1257 11:16:26.851864 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1258 11:16:26.858608 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1259 11:16:26.861999 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1260 11:16:26.868163 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1261 11:16:26.871525 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1262 11:16:26.878360 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1263 11:16:26.882118 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1264 11:16:26.888637 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1265 11:16:26.891865 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1266 11:16:26.898122 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1267 11:16:26.901861 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1268 11:16:26.908618 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1269 11:16:26.911451 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1270 11:16:26.918190 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1271 11:16:26.925063 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1272 11:16:26.928286
1273 11:16:26.934760 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1274 11:16:26.941688 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1275 11:16:26.944855 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1276 11:16:26.954482 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1277 11:16:26.958089 Root Device assign_resources, bus 0 link: 0
1278 11:16:26.961099 DOMAIN: 0000 assign_resources, bus 0 link: 0
1279 11:16:26.971662 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1280 11:16:26.978391 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1281 11:16:26.988180 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1282 11:16:26.994668 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1283 11:16:27.004286 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1284 11:16:27.011140 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1285 11:16:27.017891 PCI: 00:14.0 assign_resources, bus 0 link: 0
1286 11:16:27.020953 PCI: 00:14.0 assign_resources, bus 0 link: 0
1287 11:16:27.030923 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1288 11:16:27.037726 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1289 11:16:27.044172 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1290 11:16:27.047992
1291 11:16:27.054742 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1292 11:16:27.057607 PCI: 00:15.0 assign_resources, bus 1 link: 0
1293 11:16:27.064011 PCI: 00:15.0 assign_resources, bus 1 link: 0
1294 11:16:27.071042 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1295 11:16:27.077317 PCI: 00:15.1 assign_resources, bus 2 link: 0
1296 11:16:27.080641 PCI: 00:15.1 assign_resources, bus 2 link: 0
1297 11:16:27.090363 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1298 11:16:27.096734 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1299 11:16:27.103878 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1300 11:16:27.113289 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1301 11:16:27.120180 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1302 11:16:27.127114 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1303 11:16:27.137518 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1304 11:16:27.143688 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1305 11:16:27.150259 PCI: 00:19.0 assign_resources, bus 3 link: 0
1306 11:16:27.153118 PCI: 00:19.0 assign_resources, bus 3 link: 0
1307 11:16:27.163392 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1308 11:16:27.170100 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1309 11:16:27.180033 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1310 11:16:27.183262 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1311 11:16:27.193221 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1312 11:16:27.196617 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1313 11:16:27.206194 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1314 11:16:27.212953 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1315 11:16:27.219353 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1316 11:16:27.222646 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1317 11:16:27.233417 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1318 11:16:27.236086 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1319 11:16:27.239663 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1320 11:16:27.245867 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1321 11:16:27.249025 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1322 11:16:27.255442 LPC: Trying to open IO window from 800 size 1ff
1323 11:16:27.262431 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1324 11:16:27.272027 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1325 11:16:27.278880 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1326 11:16:27.288533 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1327 11:16:27.292187 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 11:16:27.298699 Root Device assign_resources, bus 0 link: 0
1329 11:16:27.299187 Done setting resources.
1330 11:16:27.305309 Show resources in subtree (Root Device)...After assigning values.
1331 11:16:27.312102 Root Device child on link 0 CPU_CLUSTER: 0
1332 11:16:27.315460 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 11:16:27.315953 APIC: 00
1334 11:16:27.318402 APIC: 03
1335 11:16:27.318896 APIC: 01
1336 11:16:27.319381 APIC: 02
1337 11:16:27.321830 APIC: 05
1338 11:16:27.322320 APIC: 04
1339 11:16:27.325143 APIC: 06
1340 11:16:27.325775 APIC: 07
1341 11:16:27.328787 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 11:16:27.338261 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 11:16:27.348414 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 11:16:27.351746
1345 11:16:27.352339 PCI: 00:00.0
1346 11:16:27.361914 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1347 11:16:27.371432 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1348 11:16:27.381690 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1349 11:16:27.387843 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1350 11:16:27.397842 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1351 11:16:27.407466 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1352 11:16:27.417864 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1353 11:16:27.427780 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1354 11:16:27.437843 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1355 11:16:27.444041 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1356 11:16:27.454072 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1357 11:16:27.463819 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1358 11:16:27.474049 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1359 11:16:27.483946 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1360 11:16:27.493869 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1361 11:16:27.500134 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1362 11:16:27.503717 PCI: 00:02.0
1363 11:16:27.514361 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1364 11:16:27.523991 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1365 11:16:27.533455 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1366 11:16:27.537204 PCI: 00:04.0
1367 11:16:27.537832 PCI: 00:08.0
1368 11:16:27.546639 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1369 11:16:27.549893 PCI: 00:12.0
1370 11:16:27.559619 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1371 11:16:27.563348 PCI: 00:14.0 child on link 0 USB0 port 0
1372 11:16:27.572943 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1373 11:16:27.579978 USB0 port 0 child on link 0 USB2 port 0
1374 11:16:27.580567 USB2 port 0
1375 11:16:27.583684 USB2 port 1
1376 11:16:27.584273 USB2 port 2
1377 11:16:27.586138 USB2 port 3
1378 11:16:27.586646 USB2 port 5
1379 11:16:27.589424 USB2 port 6
1380 11:16:27.590039 USB2 port 9
1381 11:16:27.593089 USB3 port 0
1382 11:16:27.593615 USB3 port 1
1383 11:16:27.596329 USB3 port 2
1384 11:16:27.596809 USB3 port 3
1385 11:16:27.599813 USB3 port 4
1386 11:16:27.600458 PCI: 00:14.2
1387 11:16:27.613010 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1388 11:16:27.622578 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1389 11:16:27.623356 PCI: 00:14.3
1390 11:16:27.632905 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1391 11:16:27.639013 PCI: 00:15.0 child on link 0 I2C: 01:15
1392 11:16:27.649653 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1393 11:16:27.650248 I2C: 01:15
1394 11:16:27.655876 PCI: 00:15.1 child on link 0 I2C: 02:5d
1395 11:16:27.665346 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1396 11:16:27.665967 I2C: 02:5d
1397 11:16:27.668654 GENERIC: 0.0
1398 11:16:27.669149 PCI: 00:16.0
1399 11:16:27.678765 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1400 11:16:27.682159 PCI: 00:17.0
1401 11:16:27.691918 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1402 11:16:27.701645 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1403 11:16:27.711892 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1404 11:16:27.718402 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1405 11:16:27.728360 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1406 11:16:27.738398 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1407 11:16:27.745071 PCI: 00:19.0 child on link 0 I2C: 03:1a
1408 11:16:27.754617 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1409 11:16:27.755236 I2C: 03:1a
1410 11:16:27.757801 I2C: 03:38
1411 11:16:27.758283 I2C: 03:39
1412 11:16:27.761526 I2C: 03:3a
1413 11:16:27.762114 I2C: 03:3b
1414 11:16:27.764803 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1415 11:16:27.774528 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1416 11:16:27.784421 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1417 11:16:27.794079 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1418 11:16:27.797722 PCI: 01:00.0
1419 11:16:27.807767 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1420 11:16:27.810961 PCI: 00:1e.0
1421 11:16:27.820756 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1422 11:16:27.831055 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1423 11:16:27.834015 PCI: 00:1e.2 child on link 0 SPI: 00
1424 11:16:27.844110 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1425 11:16:27.847722 SPI: 00
1426 11:16:27.851179 PCI: 00:1e.3 child on link 0 SPI: 01
1427 11:16:27.860899 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1428 11:16:27.861535 SPI: 01
1429 11:16:27.867131 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1430 11:16:27.874365 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1431 11:16:27.883661 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1432 11:16:27.887096 PNP: 0c09.0
1433 11:16:27.893545 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1434 11:16:27.896539 PCI: 00:1f.3
1435 11:16:27.907097 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1436 11:16:27.916787 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1437 11:16:27.920055 PCI: 00:1f.4
1438 11:16:27.926348 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1439 11:16:27.936912 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1440 11:16:27.940577 PCI: 00:1f.5
1441 11:16:27.950134 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1442 11:16:27.953693 Done allocating resources.
1443 11:16:27.956364 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1444 11:16:27.960158 Enabling resources...
1445 11:16:27.966659 PCI: 00:00.0 subsystem <- 8086/9b61
1446 11:16:27.967251 PCI: 00:00.0 cmd <- 06
1447 11:16:27.969917 PCI: 00:02.0 subsystem <- 8086/9b41
1448 11:16:27.973052 PCI: 00:02.0 cmd <- 03
1449 11:16:27.976601 PCI: 00:08.0 cmd <- 06
1450 11:16:27.979810 PCI: 00:12.0 subsystem <- 8086/02f9
1451 11:16:27.983123 PCI: 00:12.0 cmd <- 02
1452 11:16:27.986381 PCI: 00:14.0 subsystem <- 8086/02ed
1453 11:16:27.989726 PCI: 00:14.0 cmd <- 02
1454 11:16:27.992921 PCI: 00:14.2 cmd <- 02
1455 11:16:27.996132 PCI: 00:14.3 subsystem <- 8086/02f0
1456 11:16:27.996698 PCI: 00:14.3 cmd <- 02
1457 11:16:28.003325 PCI: 00:15.0 subsystem <- 8086/02e8
1458 11:16:28.003816 PCI: 00:15.0 cmd <- 02
1459 11:16:28.006513 PCI: 00:15.1 subsystem <- 8086/02e9
1460 11:16:28.009575 PCI: 00:15.1 cmd <- 02
1461 11:16:28.012896 PCI: 00:16.0 subsystem <- 8086/02e0
1462 11:16:28.016637 PCI: 00:16.0 cmd <- 02
1463 11:16:28.020083 PCI: 00:17.0 subsystem <- 8086/02d3
1464 11:16:28.023510 PCI: 00:17.0 cmd <- 03
1465 11:16:28.027006 PCI: 00:19.0 subsystem <- 8086/02c5
1466 11:16:28.030035 PCI: 00:19.0 cmd <- 02
1467 11:16:28.033099 PCI: 00:1d.0 bridge ctrl <- 0013
1468 11:16:28.036648 PCI: 00:1d.0 subsystem <- 8086/02b0
1469 11:16:28.039606 PCI: 00:1d.0 cmd <- 06
1470 11:16:28.042963 PCI: 00:1e.0 subsystem <- 8086/02a8
1471 11:16:28.046087 PCI: 00:1e.0 cmd <- 06
1472 11:16:28.049724 PCI: 00:1e.2 subsystem <- 8086/02aa
1473 11:16:28.052797 PCI: 00:1e.2 cmd <- 06
1474 11:16:28.056060 PCI: 00:1e.3 subsystem <- 8086/02ab
1475 11:16:28.056650 PCI: 00:1e.3 cmd <- 02
1476 11:16:28.062895 PCI: 00:1f.0 subsystem <- 8086/0284
1477 11:16:28.063481 PCI: 00:1f.0 cmd <- 407
1478 11:16:28.066529 PCI: 00:1f.3 subsystem <- 8086/02c8
1479 11:16:28.069182 PCI: 00:1f.3 cmd <- 02
1480 11:16:28.072970 PCI: 00:1f.4 subsystem <- 8086/02a3
1481 11:16:28.076120 PCI: 00:1f.4 cmd <- 03
1482 11:16:28.079445 PCI: 00:1f.5 subsystem <- 8086/02a4
1483 11:16:28.083258 PCI: 00:1f.5 cmd <- 406
1484 11:16:28.091962 PCI: 01:00.0 cmd <- 02
1485 11:16:28.097066 done.
1486 11:16:28.111036 ME: Version: 14.0.39.1367
1487 11:16:28.117077 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1488 11:16:28.120597 Initializing devices...
1489 11:16:28.121185 Root Device init ...
1490 11:16:28.127385 Chrome EC: Set SMI mask to 0x0000000000000000
1491 11:16:28.130234 Chrome EC: clear events_b mask to 0x0000000000000000
1492 11:16:28.137125 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1493 11:16:28.143666 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1494 11:16:28.150479 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1495 11:16:28.153842 Chrome EC: Set WAKE mask to 0x0000000000000000
1496 11:16:28.157137 Root Device init finished in 35177 usecs
1497 11:16:28.160480 CPU_CLUSTER: 0 init ...
1498 11:16:28.163773 CPU_CLUSTER: 0 init finished in 2440 usecs
1499 11:16:28.166725
1500 11:16:28.171445 PCI: 00:00.0 init ...
1501 11:16:28.174372 CPU TDP: 15 Watts
1502 11:16:28.177846 CPU PL2 = 64 Watts
1503 11:16:28.182009 PCI: 00:00.0 init finished in 7082 usecs
1504 11:16:28.184563 PCI: 00:02.0 init ...
1505 11:16:28.187797 PCI: 00:02.0 init finished in 2255 usecs
1506 11:16:28.191036 PCI: 00:08.0 init ...
1507 11:16:28.194204 PCI: 00:08.0 init finished in 2253 usecs
1508 11:16:28.197616 PCI: 00:12.0 init ...
1509 11:16:28.201375 PCI: 00:12.0 init finished in 2252 usecs
1510 11:16:28.204683 PCI: 00:14.0 init ...
1511 11:16:28.207352 PCI: 00:14.0 init finished in 2254 usecs
1512 11:16:28.210874 PCI: 00:14.2 init ...
1513 11:16:28.214530 PCI: 00:14.2 init finished in 2251 usecs
1514 11:16:28.217508 PCI: 00:14.3 init ...
1515 11:16:28.221327 PCI: 00:14.3 init finished in 2269 usecs
1516 11:16:28.224153 PCI: 00:15.0 init ...
1517 11:16:28.227538 DW I2C bus 0 at 0xd121f000 (400 KHz)
1518 11:16:28.231182 PCI: 00:15.0 init finished in 5978 usecs
1519 11:16:28.234335 PCI: 00:15.1 init ...
1520 11:16:28.237638 DW I2C bus 1 at 0xd1220000 (400 KHz)
1521 11:16:28.240716 PCI: 00:15.1 init finished in 5977 usecs
1522 11:16:28.244025
1523 11:16:28.244617 PCI: 00:16.0 init ...
1524 11:16:28.250559 PCI: 00:16.0 init finished in 2242 usecs
1525 11:16:28.251146 PCI: 00:19.0 init ...
1526 11:16:28.253726
1527 11:16:28.257244 DW I2C bus 4 at 0xd1222000 (400 KHz)
1528 11:16:28.260830 PCI: 00:19.0 init finished in 5976 usecs
1529 11:16:28.263865 PCI: 00:1d.0 init ...
1530 11:16:28.267073 Initializing PCH PCIe bridge.
1531 11:16:28.270596 PCI: 00:1d.0 init finished in 5277 usecs
1532 11:16:28.273640 PCI: 00:1f.0 init ...
1533 11:16:28.276801 IOAPIC: Initializing IOAPIC at 0xfec00000
1534 11:16:28.283661 IOAPIC: Bootstrap Processor Local APIC = 0x00
1535 11:16:28.284256 IOAPIC: ID = 0x02
1536 11:16:28.287186 IOAPIC: Dumping registers
1537 11:16:28.290140 reg 0x0000: 0x02000000
1538 11:16:28.290633 reg 0x0001: 0x00770020
1539 11:16:28.293888
1540 11:16:28.294622 reg 0x0002: 0x00000000
1541 11:16:28.299927 PCI: 00:1f.0 init finished in 23545 usecs
1542 11:16:28.303361 PCI: 00:1f.4 init ...
1543 11:16:28.306592 PCI: 00:1f.4 init finished in 2264 usecs
1544 11:16:28.317434 PCI: 01:00.0 init ...
1545 11:16:28.320350 PCI: 01:00.0 init finished in 2252 usecs
1546 11:16:28.324920 PNP: 0c09.0 init ...
1547 11:16:28.328173 Google Chrome EC uptime: 11.092 seconds
1548 11:16:28.334655 Google Chrome AP resets since EC boot: 0
1549 11:16:28.338253 Google Chrome most recent AP reset causes:
1550 11:16:28.344769 Google Chrome EC reset flags at last EC boot: reset-pin
1551 11:16:28.347836 PNP: 0c09.0 init finished in 20573 usecs
1552 11:16:28.351404 Devices initialized
1553 11:16:28.355183 Show all devs... After init.
1554 11:16:28.355764 Root Device: enabled 1
1555 11:16:28.358144 CPU_CLUSTER: 0: enabled 1
1556 11:16:28.361057 DOMAIN: 0000: enabled 1
1557 11:16:28.361665 APIC: 00: enabled 1
1558 11:16:28.364737 PCI: 00:00.0: enabled 1
1559 11:16:28.367340 PCI: 00:02.0: enabled 1
1560 11:16:28.370655 PCI: 00:04.0: enabled 0
1561 11:16:28.371145 PCI: 00:05.0: enabled 0
1562 11:16:28.374549 PCI: 00:12.0: enabled 1
1563 11:16:28.377657 PCI: 00:12.5: enabled 0
1564 11:16:28.380652 PCI: 00:12.6: enabled 0
1565 11:16:28.381141 PCI: 00:14.0: enabled 1
1566 11:16:28.383962 PCI: 00:14.1: enabled 0
1567 11:16:28.387596 PCI: 00:14.3: enabled 1
1568 11:16:28.388174 PCI: 00:14.5: enabled 0
1569 11:16:28.390474
1570 11:16:28.390959 PCI: 00:15.0: enabled 1
1571 11:16:28.393752 PCI: 00:15.1: enabled 1
1572 11:16:28.397023 PCI: 00:15.2: enabled 0
1573 11:16:28.397535 PCI: 00:15.3: enabled 0
1574 11:16:28.400600 PCI: 00:16.0: enabled 1
1575 11:16:28.403997 PCI: 00:16.1: enabled 0
1576 11:16:28.407257 PCI: 00:16.2: enabled 0
1577 11:16:28.407744 PCI: 00:16.3: enabled 0
1578 11:16:28.410702 PCI: 00:16.4: enabled 0
1579 11:16:28.413743 PCI: 00:16.5: enabled 0
1580 11:16:28.417027 PCI: 00:17.0: enabled 1
1581 11:16:28.417541 PCI: 00:19.0: enabled 1
1582 11:16:28.420609 PCI: 00:19.1: enabled 0
1583 11:16:28.423987 PCI: 00:19.2: enabled 0
1584 11:16:28.426991 PCI: 00:1a.0: enabled 0
1585 11:16:28.427484 PCI: 00:1c.0: enabled 0
1586 11:16:28.430194 PCI: 00:1c.1: enabled 0
1587 11:16:28.433848 PCI: 00:1c.2: enabled 0
1588 11:16:28.434334 PCI: 00:1c.3: enabled 0
1589 11:16:28.437390 PCI: 00:1c.4: enabled 0
1590 11:16:28.440409 PCI: 00:1c.5: enabled 0
1591 11:16:28.443660 PCI: 00:1c.6: enabled 0
1592 11:16:28.444245 PCI: 00:1c.7: enabled 0
1593 11:16:28.447505 PCI: 00:1d.0: enabled 1
1594 11:16:28.450250 PCI: 00:1d.1: enabled 0
1595 11:16:28.454282 PCI: 00:1d.2: enabled 0
1596 11:16:28.454866 PCI: 00:1d.3: enabled 0
1597 11:16:28.456887 PCI: 00:1d.4: enabled 0
1598 11:16:28.459997 PCI: 00:1d.5: enabled 0
1599 11:16:28.463706 PCI: 00:1e.0: enabled 1
1600 11:16:28.464291 PCI: 00:1e.1: enabled 0
1601 11:16:28.466946 PCI: 00:1e.2: enabled 1
1602 11:16:28.470037 PCI: 00:1e.3: enabled 1
1603 11:16:28.470524 PCI: 00:1f.0: enabled 1
1604 11:16:28.473653
1605 11:16:28.474239 PCI: 00:1f.1: enabled 0
1606 11:16:28.477011 PCI: 00:1f.2: enabled 0
1607 11:16:28.480393 PCI: 00:1f.3: enabled 1
1608 11:16:28.480975 PCI: 00:1f.4: enabled 1
1609 11:16:28.484108 PCI: 00:1f.5: enabled 1
1610 11:16:28.486687 PCI: 00:1f.6: enabled 0
1611 11:16:28.490136 USB0 port 0: enabled 1
1612 11:16:28.490720 I2C: 01:15: enabled 1
1613 11:16:28.493089 I2C: 02:5d: enabled 1
1614 11:16:28.496674 GENERIC: 0.0: enabled 1
1615 11:16:28.497160 I2C: 03:1a: enabled 1
1616 11:16:28.499933 I2C: 03:38: enabled 1
1617 11:16:28.503072 I2C: 03:39: enabled 1
1618 11:16:28.503564 I2C: 03:3a: enabled 1
1619 11:16:28.506212 I2C: 03:3b: enabled 1
1620 11:16:28.509888 PCI: 00:00.0: enabled 1
1621 11:16:28.510380 SPI: 00: enabled 1
1622 11:16:28.513385 SPI: 01: enabled 1
1623 11:16:28.516592 PNP: 0c09.0: enabled 1
1624 11:16:28.517077 USB2 port 0: enabled 1
1625 11:16:28.520125 USB2 port 1: enabled 1
1626 11:16:28.523384 USB2 port 2: enabled 0
1627 11:16:28.526988 USB2 port 3: enabled 0
1628 11:16:28.527584 USB2 port 5: enabled 0
1629 11:16:28.530158 USB2 port 6: enabled 1
1630 11:16:28.533288 USB2 port 9: enabled 1
1631 11:16:28.533908 USB3 port 0: enabled 1
1632 11:16:28.537230 USB3 port 1: enabled 1
1633 11:16:28.539634 USB3 port 2: enabled 1
1634 11:16:28.540120 USB3 port 3: enabled 1
1635 11:16:28.542985 USB3 port 4: enabled 0
1636 11:16:28.546079 APIC: 03: enabled 1
1637 11:16:28.546566 APIC: 01: enabled 1
1638 11:16:28.549925 APIC: 02: enabled 1
1639 11:16:28.553242 APIC: 05: enabled 1
1640 11:16:28.553908 APIC: 04: enabled 1
1641 11:16:28.556341 APIC: 06: enabled 1
1642 11:16:28.556927 APIC: 07: enabled 1
1643 11:16:28.559532
1644 11:16:28.560020 PCI: 00:08.0: enabled 1
1645 11:16:28.563266 PCI: 00:14.2: enabled 1
1646 11:16:28.566257 PCI: 01:00.0: enabled 1
1647 11:16:28.570082 Disabling ACPI via APMC:
1648 11:16:28.570671 done.
1649 11:16:28.572908
1650 11:16:28.576096 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 11:16:28.579561 ELOG: NV offset 0xaf0000 size 0x4000
1652 11:16:28.586448 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 11:16:28.593527 ELOG: Event(17) added with size 13 at 2022-11-26 11:16:28 UTC
1654 11:16:28.599470 ELOG: Event(92) added with size 9 at 2022-11-26 11:16:28 UTC
1655 11:16:28.606326 ELOG: Event(93) added with size 9 at 2022-11-26 11:16:28 UTC
1656 11:16:28.613047 ELOG: Event(9A) added with size 9 at 2022-11-26 11:16:28 UTC
1657 11:16:28.619855 ELOG: Event(9E) added with size 10 at 2022-11-26 11:16:28 UTC
1658 11:16:28.626244 ELOG: Event(9F) added with size 14 at 2022-11-26 11:16:28 UTC
1659 11:16:28.629770 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1660 11:16:28.637184 ELOG: Event(A1) added with size 10 at 2022-11-26 11:16:28 UTC
1661 11:16:28.646679 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 11:16:28.653528 ELOG: Event(A0) added with size 9 at 2022-11-26 11:16:28 UTC
1663 11:16:28.656801 elog_add_boot_reason: Logged dev mode boot
1664 11:16:28.659601 Finalize devices...
1665 11:16:28.660091 PCI: 00:17.0 final
1666 11:16:28.663146 Devices finalized
1667 11:16:28.666991 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 11:16:28.673393 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 11:16:28.676323 ME: HFSTS1 : 0x90000245
1670 11:16:28.679480 ME: HFSTS2 : 0x3B850126
1671 11:16:28.686552 ME: HFSTS3 : 0x00000020
1672 11:16:28.689644 ME: HFSTS4 : 0x00004800
1673 11:16:28.693541 ME: HFSTS5 : 0x00000000
1674 11:16:28.696439 ME: HFSTS6 : 0x40400006
1675 11:16:28.699463 ME: Manufacturing Mode : NO
1676 11:16:28.702860 ME: FW Partition Table : OK
1677 11:16:28.706574 ME: Bringup Loader Failure : NO
1678 11:16:28.709199 ME: Firmware Init Complete : YES
1679 11:16:28.712826 ME: Boot Options Present : NO
1680 11:16:28.716096 ME: Update In Progress : NO
1681 11:16:28.719217 ME: D0i3 Support : YES
1682 11:16:28.722449 ME: Low Power State Enabled : NO
1683 11:16:28.726067 ME: CPU Replaced : NO
1684 11:16:28.729295 ME: CPU Replacement Valid : YES
1685 11:16:28.733053 ME: Current Working State : 5
1686 11:16:28.736339 ME: Current Operation State : 1
1687 11:16:28.739351 ME: Current Operation Mode : 0
1688 11:16:28.742821 ME: Error Code : 0
1689 11:16:28.746206 ME: CPU Debug Disabled : YES
1690 11:16:28.749297 ME: TXT Support : NO
1691 11:16:28.755649 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 11:16:28.762937 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 11:16:28.763535 CBFS @ c08000 size 3f8000
1694 11:16:28.769049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 11:16:28.772478 CBFS: Locating 'fallback/dsdt.aml'
1696 11:16:28.775363 CBFS: Found @ offset 10bb80 size 3fa5
1697 11:16:28.782442 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 11:16:28.785369 CBFS @ c08000 size 3f8000
1699 11:16:28.788872 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 11:16:28.792339
1701 11:16:28.792834 CBFS: Locating 'fallback/slic'
1702 11:16:28.797557 CBFS: 'fallback/slic' not found.
1703 11:16:28.804024 ACPI: Writing ACPI tables at 99b3e000.
1704 11:16:28.804551 ACPI: * FACS
1705 11:16:28.807204 ACPI: * DSDT
1706 11:16:28.811009 Ramoops buffer: 0x100000@0x99a3d000.
1707 11:16:28.813972 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 11:16:28.821104 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 11:16:28.823932 Google Chrome EC: version:
1710 11:16:28.827500 ro: helios_v2.0.2659-56403530b
1711 11:16:28.830385 rw: helios_v2.0.2849-c41de27e7d
1712 11:16:28.830882 running image: 1
1713 11:16:28.834746 ACPI: * FADT
1714 11:16:28.835336 SCI is IRQ9
1715 11:16:28.838018 ACPI: added table 1/32, length now 40
1716 11:16:28.841524
1717 11:16:28.842129 ACPI: * SSDT
1718 11:16:28.844615 Found 1 CPU(s) with 8 core(s) each.
1719 11:16:28.848102 Error: Could not locate 'wifi_sar' in VPD.
1720 11:16:28.854940 Checking CBFS for default SAR values
1721 11:16:28.857928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 11:16:28.861839 CBFS @ c08000 size 3f8000
1723 11:16:28.868163 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 11:16:28.872016 CBFS: Locating 'wifi_sar_defaults.hex'
1725 11:16:28.874292 CBFS: Found @ offset 5fac0 size 77
1726 11:16:28.877776 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1727 11:16:28.881090 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1728 11:16:28.884546
1729 11:16:28.888388 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 11:16:28.894431 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 11:16:28.897553 failed to find key in VPD: dsm_calib_r0_0
1732 11:16:28.908250 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 11:16:28.910673 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 11:16:28.914116 failed to find key in VPD: dsm_calib_r0_1
1735 11:16:28.924693 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 11:16:28.930523 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 11:16:28.934267 failed to find key in VPD: dsm_calib_r0_2
1738 11:16:28.944048 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 11:16:28.947390 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 11:16:28.954072 failed to find key in VPD: dsm_calib_r0_3
1741 11:16:28.960473 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 11:16:28.967208 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 11:16:28.970043 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 11:16:28.974091 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 11:16:28.978014 EC returned error result code 1
1746 11:16:28.981712 EC returned error result code 1
1747 11:16:28.985607 EC returned error result code 1
1748 11:16:28.991370 PS2K: Bad resp from EC. Vivaldi disabled!
1749 11:16:28.994719 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 11:16:29.002325 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 11:16:29.008399 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 11:16:29.011873 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 11:16:29.017941 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 11:16:29.024952 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 11:16:29.031355 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 11:16:29.034531 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 11:16:29.041196 ACPI: added table 2/32, length now 44
1758 11:16:29.041834 ACPI: * MCFG
1759 11:16:29.044939 ACPI: added table 3/32, length now 48
1760 11:16:29.048182 ACPI: * TPM2
1761 11:16:29.051395 TPM2 log created at 99a2d000
1762 11:16:29.054695 ACPI: added table 4/32, length now 52
1763 11:16:29.055296 ACPI: * MADT
1764 11:16:29.057739 SCI is IRQ9
1765 11:16:29.061018 ACPI: added table 5/32, length now 56
1766 11:16:29.061643 current = 99b43ac0
1767 11:16:29.064837 ACPI: * DMAR
1768 11:16:29.067770 ACPI: added table 6/32, length now 60
1769 11:16:29.071326 ACPI: * IGD OpRegion
1770 11:16:29.071823 GMA: Found VBT in CBFS
1771 11:16:29.074405 GMA: Found valid VBT in CBFS
1772 11:16:29.077772 ACPI: added table 7/32, length now 64
1773 11:16:29.081073 ACPI: * HPET
1774 11:16:29.084504 ACPI: added table 8/32, length now 68
1775 11:16:29.085099 ACPI: done.
1776 11:16:29.087686
1777 11:16:29.088285 ACPI tables: 31744 bytes.
1778 11:16:29.091578 smbios_write_tables: 99a2c000
1779 11:16:29.094341 EC returned error result code 3
1780 11:16:29.098004 Couldn't obtain OEM name from CBI
1781 11:16:29.101790 Create SMBIOS type 17
1782 11:16:29.104517 PCI: 00:00.0 (Intel Cannonlake)
1783 11:16:29.107651 PCI: 00:14.3 (Intel WiFi)
1784 11:16:29.111204 SMBIOS tables: 939 bytes.
1785 11:16:29.114128 Writing table forward entry at 0x00000500
1786 11:16:29.120836 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1787 11:16:29.125518 Writing coreboot table at 0x99b62000
1788 11:16:29.131094 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1789 11:16:29.134036 1. 0000000000001000-000000000009ffff: RAM
1790 11:16:29.137870 2. 00000000000a0000-00000000000fffff: RESERVED
1791 11:16:29.144110 3. 0000000000100000-0000000099a2bfff: RAM
1792 11:16:29.150656 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1793 11:16:29.154429 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1794 11:16:29.160739 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1795 11:16:29.164289 7. 000000009a000000-000000009f7fffff: RESERVED
1796 11:16:29.171095 8. 00000000e0000000-00000000efffffff: RESERVED
1797 11:16:29.173861 9. 00000000fc000000-00000000fc000fff: RESERVED
1798 11:16:29.180570 10. 00000000fe000000-00000000fe00ffff: RESERVED
1799 11:16:29.183747 11. 00000000fed10000-00000000fed17fff: RESERVED
1800 11:16:29.186953 12. 00000000fed80000-00000000fed83fff: RESERVED
1801 11:16:29.193850 13. 00000000fed90000-00000000fed91fff: RESERVED
1802 11:16:29.197131 14. 00000000feda0000-00000000feda1fff: RESERVED
1803 11:16:29.203666 15. 0000000100000000-000000045e7fffff: RAM
1804 11:16:29.206926 Graphics framebuffer located at 0xc0000000
1805 11:16:29.210076 Passing 5 GPIOs to payload:
1806 11:16:29.213682 NAME | PORT | POLARITY | VALUE
1807 11:16:29.219983 write protect | undefined | high | low
1808 11:16:29.226456 lid | undefined | high | high
1809 11:16:29.229736 power | undefined | high | low
1810 11:16:29.236760 oprom | undefined | high | low
1811 11:16:29.239851 EC in RW | 0x000000cb | high | low
1812 11:16:29.243289 Board ID: 4
1813 11:16:29.247019 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1814 11:16:29.250001 CBFS @ c08000 size 3f8000
1815 11:16:29.256629 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1816 11:16:29.263122 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1817 11:16:29.263720 coreboot table: 1492 bytes.
1818 11:16:29.266250 IMD ROOT 0. 99fff000 00001000
1819 11:16:29.269928 IMD SMALL 1. 99ffe000 00001000
1820 11:16:29.273034 FSP MEMORY 2. 99c4e000 003b0000
1821 11:16:29.276269 CONSOLE 3. 99c2e000 00020000
1822 11:16:29.279389 FMAP 4. 99c2d000 0000054e
1823 11:16:29.283377 TIME STAMP 5. 99c2c000 00000910
1824 11:16:29.286167 VBOOT WORK 6. 99c18000 00014000
1825 11:16:29.290021 MRC DATA 7. 99c16000 00001958
1826 11:16:29.293358 ROMSTG STCK 8. 99c15000 00001000
1827 11:16:29.296746 AFTER CAR 9. 99c0b000 0000a000
1828 11:16:29.299843 RAMSTAGE 10. 99baf000 0005c000
1829 11:16:29.303148 REFCODE 11. 99b7a000 00035000
1830 11:16:29.306162 SMM BACKUP 12. 99b6a000 00010000
1831 11:16:29.310128 COREBOOT 13. 99b62000 00008000
1832 11:16:29.313146 ACPI 14. 99b3e000 00024000
1833 11:16:29.316815 ACPI GNVS 15. 99b3d000 00001000
1834 11:16:29.319426 RAMOOPS 16. 99a3d000 00100000
1835 11:16:29.323054 TPM2 TCGLOG17. 99a2d000 00010000
1836 11:16:29.326264 SMBIOS 18. 99a2c000 00000800
1837 11:16:29.329621 IMD small region:
1838 11:16:29.333153 IMD ROOT 0. 99ffec00 00000400
1839 11:16:29.336394 FSP RUNTIME 1. 99ffebe0 00000004
1840 11:16:29.339853 EC HOSTEVENT 2. 99ffebc0 00000008
1841 11:16:29.342921 POWER STATE 3. 99ffeb80 00000040
1842 11:16:29.346842 ROMSTAGE 4. 99ffeb60 00000004
1843 11:16:29.349410 MEM INFO 5. 99ffe9a0 000001b9
1844 11:16:29.352933 VPD 6. 99ffe920 0000006c
1845 11:16:29.356562 MTRR: Physical address space:
1846 11:16:29.362711 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1847 11:16:29.369807 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1848 11:16:29.375773 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1849 11:16:29.383027 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1850 11:16:29.389502 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1851 11:16:29.396113 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1852 11:16:29.402121 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1853 11:16:29.405821 MTRR: Fixed MSR 0x250 0x0606060606060606
1854 11:16:29.408945 MTRR: Fixed MSR 0x258 0x0606060606060606
1855 11:16:29.412791 MTRR: Fixed MSR 0x259 0x0000000000000000
1856 11:16:29.419051 MTRR: Fixed MSR 0x268 0x0606060606060606
1857 11:16:29.422680 MTRR: Fixed MSR 0x269 0x0606060606060606
1858 11:16:29.425587 MTRR: Fixed MSR 0x26a 0x0606060606060606
1859 11:16:29.428812 MTRR: Fixed MSR 0x26b 0x0606060606060606
1860 11:16:29.432516 MTRR: Fixed MSR 0x26c 0x0606060606060606
1861 11:16:29.435902
1862 11:16:29.438571 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 11:16:29.442511 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 11:16:29.445584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 11:16:29.448540 call enable_fixed_mtrr()
1866 11:16:29.452651 CPU physical address size: 39 bits
1867 11:16:29.458579 MTRR: default type WB/UC MTRR counts: 6/8.
1868 11:16:29.462088 MTRR: WB selected as default type.
1869 11:16:29.468921 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1870 11:16:29.471810 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1871 11:16:29.478127 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1872 11:16:29.485511 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1873 11:16:29.491760 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1874 11:16:29.498819 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1875 11:16:29.501512 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 11:16:29.508163 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 11:16:29.511587 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 11:16:29.515095 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 11:16:29.518121 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 11:16:29.525115 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 11:16:29.528395 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 11:16:29.531656 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 11:16:29.534860 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 11:16:29.541703 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 11:16:29.544875 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 11:16:29.545468
1887 11:16:29.545912 MTRR check
1888 11:16:29.548119 Fixed MTRRs : Enabled
1889 11:16:29.551424 Variable MTRRs: Enabled
1890 11:16:29.552020
1891 11:16:29.554316 call enable_fixed_mtrr()
1892 11:16:29.557834 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1893 11:16:29.560781 CPU physical address size: 39 bits
1894 11:16:29.568016 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1895 11:16:29.571460 CBFS @ c08000 size 3f8000
1896 11:16:29.574461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1897 11:16:29.581684 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 11:16:29.585095 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 11:16:29.588650 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 11:16:29.591589 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 11:16:29.597909 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 11:16:29.601262 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 11:16:29.604592 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 11:16:29.607899 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 11:16:29.614152 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 11:16:29.618010 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 11:16:29.621075 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 11:16:29.623962 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 11:16:29.631025 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 11:16:29.631601 call enable_fixed_mtrr()
1911 11:16:29.637600 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 11:16:29.640868 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 11:16:29.644364 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 11:16:29.647327 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 11:16:29.651010 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 11:16:29.654373
1917 11:16:29.657609 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 11:16:29.661237 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 11:16:29.664665 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 11:16:29.667782 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 11:16:29.674313 CPU physical address size: 39 bits
1922 11:16:29.674894 call enable_fixed_mtrr()
1923 11:16:29.677011
1924 11:16:29.680919 CBFS: Locating 'fallback/payload'
1925 11:16:29.683797 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 11:16:29.687397 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 11:16:29.690842 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 11:16:29.693990 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 11:16:29.700608 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 11:16:29.703721 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 11:16:29.707084 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 11:16:29.710452 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 11:16:29.717024 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 11:16:29.720709 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 11:16:29.723604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 11:16:29.726538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 11:16:29.733313 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 11:16:29.733990 call enable_fixed_mtrr()
1939 11:16:29.736934
1940 11:16:29.740539 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 11:16:29.742986 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 11:16:29.746437 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 11:16:29.749926 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 11:16:29.756529 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 11:16:29.760083 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 11:16:29.763233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 11:16:29.766639 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 11:16:29.773137 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 11:16:29.776629 CPU physical address size: 39 bits
1950 11:16:29.779591 call enable_fixed_mtrr()
1951 11:16:29.783678 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 11:16:29.786080 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 11:16:29.789647 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 11:16:29.796591 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 11:16:29.800037 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 11:16:29.802768 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 11:16:29.805836 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 11:16:29.809405 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 11:16:29.813183
1960 11:16:29.816071 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 11:16:29.819194 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 11:16:29.823135 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 11:16:29.825654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 11:16:29.832932 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 11:16:29.835742 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 11:16:29.839379 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 11:16:29.845445 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 11:16:29.849051 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 11:16:29.852391 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 11:16:29.855530 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 11:16:29.859298 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 11:16:29.865939 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 11:16:29.868938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 11:16:29.871905 call enable_fixed_mtrr()
1975 11:16:29.875108 call enable_fixed_mtrr()
1976 11:16:29.878473 CPU physical address size: 39 bits
1977 11:16:29.882264 CPU physical address size: 39 bits
1978 11:16:29.885419 CPU physical address size: 39 bits
1979 11:16:29.888618 CPU physical address size: 39 bits
1980 11:16:29.891898 CBFS: Found @ offset 1c96c0 size 3f798
1981 11:16:29.895415 Checking segment from ROM address 0xffdd16f8
1982 11:16:29.902096 Checking segment from ROM address 0xffdd1714
1983 11:16:29.905181 Loading segment from ROM address 0xffdd16f8
1984 11:16:29.908378 code (compression=0)
1985 11:16:29.915296 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 11:16:29.925283 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 11:16:29.928520 it's not compressed!
1988 11:16:30.019349 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 11:16:30.026112 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 11:16:30.029360 Loading segment from ROM address 0xffdd1714
1991 11:16:30.032690
1992 11:16:30.033286 Entry Point 0x30000000
1993 11:16:30.035668 Loaded segments
1994 11:16:30.041851 Finalizing chipset.
1995 11:16:30.044972 Finalizing SMM.
1996 11:16:30.048199 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1997 11:16:30.051548 mp_park_aps done after 0 msecs.
1998 11:16:30.057928 Jumping to boot code at 30000000(99b62000)
1999 11:16:30.064592 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2000 11:16:30.065205
2001 11:16:30.065641
2002 11:16:30.066014
2003 11:16:30.067527 Starting depthcharge on Helios...
2004 11:16:30.068034
2005 11:16:30.069194 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2006 11:16:30.069811 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2007 11:16:30.070276 Setting prompt string to ['hatch:']
2008 11:16:30.070705 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2009 11:16:30.078093 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2010 11:16:30.078698
2011 11:16:30.084427 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2012 11:16:30.085029
2013 11:16:30.091517 board_setup: Info: eMMC controller not present; skipping
2014 11:16:30.092116
2015 11:16:30.094362 New NVMe Controller 0x30053ac0 @ 00:1d:00
2016 11:16:30.094860
2017 11:16:30.100936 board_setup: Info: SDHCI controller not present; skipping
2018 11:16:30.101570
2019 11:16:30.107833 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2020 11:16:30.108432
2021 11:16:30.108824 Wipe memory regions:
2022 11:16:30.109190
2023 11:16:30.111028 [0x00000000001000, 0x000000000a0000)
2024 11:16:30.111540
2025 11:16:30.117035 [0x00000000100000, 0x00000030000000)
2026 11:16:30.117564
2027 11:16:30.183406 [0x00000030657430, 0x00000099a2c000)
2028 11:16:30.184013
2029 11:16:30.324870 [0x00000100000000, 0x0000045e800000)
2030 11:16:30.325463
2031 11:16:31.707052 R8152: Initializing
2032 11:16:31.707660
2033 11:16:31.710083 Version 9 (ocp_data = 6010)
2034 11:16:31.710576
2035 11:16:31.714330 R8152: Done initializing
2036 11:16:31.714828
2037 11:16:31.717849 Adding net device
2038 11:16:31.718341
2039 11:16:32.326971 R8152: Initializing
2040 11:16:32.327565
2041 11:16:32.330244 Version 6 (ocp_data = 5c30)
2042 11:16:32.330729
2043 11:16:32.333123 R8152: Done initializing
2044 11:16:32.333207
2045 11:16:32.340547 net_add_device: Attemp to include the same device
2046 11:16:32.340710
2047 11:16:32.346834 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2048 11:16:32.347003
2049 11:16:32.347100
2050 11:16:32.347176
2051 11:16:32.347474 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2053 11:16:32.448394 hatch: tftpboot 192.168.201.1 8138777/tftp-deploy-9yo3fnds/kernel/bzImage 8138777/tftp-deploy-9yo3fnds/kernel/cmdline 8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
2054 11:16:32.449135 Setting prompt string to 'Starting kernel'
2055 11:16:32.449628 Setting prompt string to ['Starting kernel']
2056 11:16:32.450013 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 11:16:32.450421 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2058 11:16:32.454307 tftpboot 192.168.201.1 8138777/tftp-deploy-9yo3fnds/kernel/bzImoy-9yo3fnds/kernel/cmdline 8138777/tftp-deploy-9yo3fnds/ramdisk/ramdisk.cpio.gz
2059 11:16:32.454797
2060 11:16:32.455175 Waiting for link
2061 11:16:32.455526
2062 11:16:32.655269 done.
2063 11:16:32.655853
2064 11:16:32.656245 MAC: 00:24:32:50:1a:5f
2065 11:16:32.656613
2066 11:16:32.658261 Sending DHCP discover... done.
2067 11:16:32.658753
2068 11:16:32.661691 Waiting for reply... done.
2069 11:16:32.662186
2070 11:16:32.665246 Sending DHCP request... done.
2071 11:16:32.665871
2072 11:16:32.668484 Waiting for reply... done.
2073 11:16:32.669067
2074 11:16:32.672330 My ip is 192.168.201.21
2075 11:16:32.672919
2076 11:16:32.675071 The DHCP server ip is 192.168.201.1
2077 11:16:32.675661
2078 11:16:32.678436 TFTP server IP predefined by user: 192.168.201.1
2079 11:16:32.679024
2080 11:16:32.684643 Bootfile predefined by user: 8138777/tftp-deploy-9yo3fnds/kernel/bzImage
2081 11:16:32.685130
2082 11:16:32.688149 Sending tftp read request... done.
2083 11:16:32.688639
2084 11:16:32.696535 Waiting for the transfer...
2085 11:16:32.697125
2086 11:16:33.403940 00000000 ################################################################
2087 11:16:33.404578
2088 11:16:34.112921 00080000 ################################################################
2089 11:16:34.113534
2090 11:16:34.818761 00100000 ################################################################
2091 11:16:34.819313
2092 11:16:35.530241 00180000 ################################################################
2093 11:16:35.531046
2094 11:16:36.238380 00200000 ################################################################
2095 11:16:36.238968
2096 11:16:36.942374 00280000 ################################################################
2097 11:16:36.942971
2098 11:16:37.650548 00300000 ################################################################
2099 11:16:37.651130
2100 11:16:38.345453 00380000 ################################################################
2101 11:16:38.346060
2102 11:16:39.054154 00400000 ################################################################
2103 11:16:39.054736
2104 11:16:39.764205 00480000 ################################################################
2105 11:16:39.764823
2106 11:16:40.451164 00500000 ################################################################
2107 11:16:40.451815
2108 11:16:41.158155 00580000 ################################################################
2109 11:16:41.158786
2110 11:16:41.870389 00600000 ################################################################
2111 11:16:41.870944
2112 11:16:42.564071 00680000 ################################################################
2113 11:16:42.564668
2114 11:16:43.243191 00700000 ################################################################
2115 11:16:43.243801
2116 11:16:43.941440 00780000 ################################################################
2117 11:16:43.942045
2118 11:16:44.631368 00800000 ################################################################
2119 11:16:44.631910
2120 11:16:45.094888 00880000 ############################################# done.
2121 11:16:45.095409
2122 11:16:45.098377 The bootfile was 9273344 bytes long.
2123 11:16:45.098829
2124 11:16:45.101513 Sending tftp read request... done.
2125 11:16:45.101956
2126 11:16:45.105176 Waiting for the transfer...
2127 11:16:45.105638
2128 11:16:45.796897 00000000 ################################################################
2129 11:16:45.797445
2130 11:16:46.501293 00080000 ################################################################
2131 11:16:46.501930
2132 11:16:47.215229 00100000 ################################################################
2133 11:16:47.215801
2134 11:16:47.920988 00180000 ################################################################
2135 11:16:47.921619
2136 11:16:48.627077 00200000 ################################################################
2137 11:16:48.627668
2138 11:16:49.346069 00280000 ################################################################
2139 11:16:49.346676
2140 11:16:50.044831 00300000 ################################################################
2141 11:16:50.045468
2142 11:16:50.753590 00380000 ################################################################
2143 11:16:50.753913
2144 11:16:51.461887 00400000 ################################################################
2145 11:16:51.462476
2146 11:16:52.134822 00480000 ################################################################
2147 11:16:52.135392
2148 11:16:52.829025 00500000 ################################################################
2149 11:16:52.829692
2150 11:16:53.526836 00580000 ################################################################
2151 11:16:53.527430
2152 11:16:54.152900 00600000 ################################################################
2153 11:16:54.153052
2154 11:16:54.731360 00680000 ################################################################
2155 11:16:54.731501
2156 11:16:55.341635 00700000 ################################################################
2157 11:16:55.341802
2158 11:16:56.049018 00780000 ################################################################
2159 11:16:56.049654
2160 11:16:56.276438 00800000 ####################### done.
2161 11:16:56.276575
2162 11:16:56.279323 Sending tftp read request... done.
2163 11:16:56.279399
2164 11:16:56.279463 Waiting for the transfer...
2165 11:16:56.283482
2166 11:16:56.283555 00000000 # done.
2167 11:16:56.283618
2168 11:16:56.292600 Command line loaded dynamically from TFTP file: 8138777/tftp-deploy-9yo3fnds/kernel/cmdline
2169 11:16:56.292688
2170 11:16:56.309425 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2171 11:16:56.309552
2172 11:16:56.315996 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 11:16:56.316083
2174 11:16:56.323377 Shutting down all USB controllers.
2175 11:16:56.323464
2176 11:16:56.323531 Removing current net device
2177 11:16:56.323594
2178 11:16:56.330979 Finalizing coreboot
2179 11:16:56.331068
2180 11:16:56.337400 Exiting depthcharge with code 4 at timestamp: 33647114
2181 11:16:56.337485
2182 11:16:56.337582
2183 11:16:56.337643 Starting kernel ...
2184 11:16:56.337703
2185 11:16:56.337760
2186 11:16:56.338139 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2187 11:16:56.338246 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2188 11:16:56.338326 Setting prompt string to ['Linux version [0-9]']
2189 11:16:56.338398 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2190 11:16:56.338469 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2191 11:16:56.340822
2193 11:21:11.339223 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2195 11:21:11.340359 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2197 11:21:11.341208 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2200 11:21:11.342726 end: 2 depthcharge-action (duration 00:05:00) [common]
2202 11:21:11.343827 Cleaning after the job
2203 11:21:11.343913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/ramdisk
2204 11:21:11.344550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/kernel
2205 11:21:11.345193 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8138777/tftp-deploy-9yo3fnds/modules
2206 11:21:11.345383 start: 5.1 power-off (timeout 00:00:30) [common]
2207 11:21:11.345573 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2208 11:21:11.364369 >> Command sent successfully.
2209 11:21:11.366292 Returned 0 in 0 seconds
2210 11:21:11.467476 end: 5.1 power-off (duration 00:00:00) [common]
2212 11:21:11.469027 start: 5.2 read-feedback (timeout 00:10:00) [common]
2213 11:21:11.470228 Listened to connection for namespace 'common' for up to 1s
2214 11:21:12.473908 Finalising connection for namespace 'common'
2215 11:21:12.474641 Disconnecting from shell: Finalise
2216 11:21:12.576324 end: 5.2 read-feedback (duration 00:00:01) [common]
2217 11:21:12.576981 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8138777
2218 11:21:12.585148 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8138777
2219 11:21:12.585273 JobError: Your job cannot terminate cleanly.