Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 00:57:24.183434 lava-dispatcher, installed at version: 2022.11
2 00:57:24.183665 start: 0 validate
3 00:57:24.183816 Start time: 2022-12-10 00:57:24.183808+00:00 (UTC)
4 00:57:24.183964 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:57:24.184118 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221125.0%2Fx86%2Frootfs.cpio.gz exists
6 00:57:24.479748 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:57:24.479952 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.268-cip87%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:57:24.769157 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:57:24.769337 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.268-cip87%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 00:57:25.055491 validate duration: 0.87
12 00:57:25.055798 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 00:57:25.055958 start: 1.1 download-retry (timeout 00:10:00) [common]
14 00:57:25.056074 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 00:57:25.056190 Not decompressing ramdisk as can be used compressed.
16 00:57:25.056284 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221125.0/x86/rootfs.cpio.gz
17 00:57:25.056363 saving as /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/ramdisk/rootfs.cpio.gz
18 00:57:25.056434 total size: 8415491 (8MB)
19 00:57:25.057656 progress 0% (0MB)
20 00:57:25.059977 progress 5% (0MB)
21 00:57:25.062505 progress 10% (0MB)
22 00:57:25.064881 progress 15% (1MB)
23 00:57:25.067297 progress 20% (1MB)
24 00:57:25.069688 progress 25% (2MB)
25 00:57:25.072029 progress 30% (2MB)
26 00:57:25.074189 progress 35% (2MB)
27 00:57:25.076524 progress 40% (3MB)
28 00:57:25.078869 progress 45% (3MB)
29 00:57:25.081189 progress 50% (4MB)
30 00:57:25.083494 progress 55% (4MB)
31 00:57:25.085781 progress 60% (4MB)
32 00:57:25.087898 progress 65% (5MB)
33 00:57:25.090179 progress 70% (5MB)
34 00:57:25.092462 progress 75% (6MB)
35 00:57:25.094753 progress 80% (6MB)
36 00:57:25.097034 progress 85% (6MB)
37 00:57:25.099318 progress 90% (7MB)
38 00:57:25.101419 progress 95% (7MB)
39 00:57:25.103733 progress 100% (8MB)
40 00:57:25.104037 8MB downloaded in 0.05s (168.62MB/s)
41 00:57:25.104212 end: 1.1.1 http-download (duration 00:00:00) [common]
43 00:57:25.104496 end: 1.1 download-retry (duration 00:00:00) [common]
44 00:57:25.104598 start: 1.2 download-retry (timeout 00:10:00) [common]
45 00:57:25.104698 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 00:57:25.104817 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.268-cip87/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 00:57:25.104896 saving as /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/kernel/bzImage
48 00:57:25.104967 total size: 9330688 (8MB)
49 00:57:25.105035 No compression specified
50 00:57:25.106265 progress 0% (0MB)
51 00:57:25.109080 progress 5% (0MB)
52 00:57:25.111818 progress 10% (0MB)
53 00:57:25.114316 progress 15% (1MB)
54 00:57:25.116865 progress 20% (1MB)
55 00:57:25.119565 progress 25% (2MB)
56 00:57:25.122070 progress 30% (2MB)
57 00:57:25.124573 progress 35% (3MB)
58 00:57:25.127073 progress 40% (3MB)
59 00:57:25.129732 progress 45% (4MB)
60 00:57:25.132245 progress 50% (4MB)
61 00:57:25.134720 progress 55% (4MB)
62 00:57:25.137182 progress 60% (5MB)
63 00:57:25.139831 progress 65% (5MB)
64 00:57:25.142274 progress 70% (6MB)
65 00:57:25.144734 progress 75% (6MB)
66 00:57:25.147185 progress 80% (7MB)
67 00:57:25.149792 progress 85% (7MB)
68 00:57:25.152260 progress 90% (8MB)
69 00:57:25.154702 progress 95% (8MB)
70 00:57:25.157184 progress 100% (8MB)
71 00:57:25.157468 8MB downloaded in 0.05s (169.51MB/s)
72 00:57:25.157638 end: 1.2.1 http-download (duration 00:00:00) [common]
74 00:57:25.157910 end: 1.2 download-retry (duration 00:00:00) [common]
75 00:57:25.158049 start: 1.3 download-retry (timeout 00:10:00) [common]
76 00:57:25.158161 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 00:57:25.158281 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.268-cip87/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 00:57:25.158361 saving as /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/modules/modules.tar
79 00:57:25.158433 total size: 64772 (0MB)
80 00:57:25.158503 Using unxz to decompress xz
81 00:57:25.162125 progress 50% (0MB)
82 00:57:25.162535 progress 100% (0MB)
83 00:57:25.167231 0MB downloaded in 0.01s (7.03MB/s)
84 00:57:25.167489 end: 1.3.1 http-download (duration 00:00:00) [common]
86 00:57:25.167787 end: 1.3 download-retry (duration 00:00:00) [common]
87 00:57:25.167899 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 00:57:25.168009 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 00:57:25.168107 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 00:57:25.168205 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 00:57:25.168387 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp
92 00:57:25.168509 makedir: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin
93 00:57:25.168607 makedir: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/tests
94 00:57:25.168704 makedir: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/results
95 00:57:25.168862 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-add-keys
96 00:57:25.169023 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-add-sources
97 00:57:25.169173 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-background-process-start
98 00:57:25.169304 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-background-process-stop
99 00:57:25.169433 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-common-functions
100 00:57:25.169559 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-echo-ipv4
101 00:57:25.169688 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-install-packages
102 00:57:25.169815 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-installed-packages
103 00:57:25.169940 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-os-build
104 00:57:25.170064 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-probe-channel
105 00:57:25.170190 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-probe-ip
106 00:57:25.170320 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-target-ip
107 00:57:25.170445 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-target-mac
108 00:57:25.170569 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-target-storage
109 00:57:25.170699 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-case
110 00:57:25.170841 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-event
111 00:57:25.170971 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-feedback
112 00:57:25.171099 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-raise
113 00:57:25.171279 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-reference
114 00:57:25.171412 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-runner
115 00:57:25.171539 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-set
116 00:57:25.171664 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-test-shell
117 00:57:25.171793 Updating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-install-packages (oe)
118 00:57:25.171923 Updating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/bin/lava-installed-packages (oe)
119 00:57:25.172039 Creating /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/environment
120 00:57:25.172141 LAVA metadata
121 00:57:25.172235 - LAVA_JOB_ID=8314794
122 00:57:25.172317 - LAVA_DISPATCHER_IP=192.168.201.1
123 00:57:25.172438 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 00:57:25.172517 skipped lava-vland-overlay
125 00:57:25.172607 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 00:57:25.172706 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 00:57:25.172781 skipped lava-multinode-overlay
128 00:57:25.172867 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 00:57:25.172965 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 00:57:25.173055 Loading test definitions
131 00:57:25.173166 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 00:57:25.173251 Using /lava-8314794 at stage 0
133 00:57:25.173555 uuid=8314794_1.4.2.3.1 testdef=None
134 00:57:25.173659 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 00:57:25.173764 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 00:57:25.174325 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 00:57:25.174585 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 00:57:25.175256 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 00:57:25.175536 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 00:57:25.176157 runner path: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/0/tests/0_dmesg test_uuid 8314794_1.4.2.3.1
143 00:57:25.176327 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 00:57:25.176596 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 00:57:25.176680 Using /lava-8314794 at stage 1
147 00:57:25.176959 uuid=8314794_1.4.2.3.5 testdef=None
148 00:57:25.177061 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 00:57:25.177162 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 00:57:25.177671 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 00:57:25.177928 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 00:57:25.178582 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 00:57:25.178867 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 00:57:25.179512 runner path: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/1/tests/1_bootrr test_uuid 8314794_1.4.2.3.5
157 00:57:25.179680 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 00:57:25.179926 Creating lava-test-runner.conf files
160 00:57:25.180001 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/0 for stage 0
161 00:57:25.180095 - 0_dmesg
162 00:57:25.180180 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8314794/lava-overlay-5gvgthcp/lava-8314794/1 for stage 1
163 00:57:25.180275 - 1_bootrr
164 00:57:25.180379 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 00:57:25.180481 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 00:57:25.187303 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 00:57:25.187425 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 00:57:25.187528 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 00:57:25.187629 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 00:57:25.187727 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 00:57:25.394282 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 00:57:25.394661 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 00:57:25.394805 extracting modules file /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8314794/extract-overlay-ramdisk-_ojwauy5/ramdisk
174 00:57:25.399420 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 00:57:25.399545 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 00:57:25.399646 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8314794/compress-overlay-defsjlzj/overlay-1.4.2.4.tar.gz to ramdisk
177 00:57:25.399730 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8314794/compress-overlay-defsjlzj/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8314794/extract-overlay-ramdisk-_ojwauy5/ramdisk
178 00:57:25.403981 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 00:57:25.404103 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 00:57:25.404210 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 00:57:25.404318 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 00:57:25.404409 Building ramdisk /var/lib/lava/dispatcher/tmp/8314794/extract-overlay-ramdisk-_ojwauy5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8314794/extract-overlay-ramdisk-_ojwauy5/ramdisk
183 00:57:25.476815 >> 48236 blocks
184 00:57:26.315668 rename /var/lib/lava/dispatcher/tmp/8314794/extract-overlay-ramdisk-_ojwauy5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
185 00:57:26.316159 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 00:57:26.316339 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 00:57:26.316466 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 00:57:26.316574 No mkimage arch provided, not using FIT.
189 00:57:26.316685 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 00:57:26.316788 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 00:57:26.316902 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 00:57:26.317021 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 00:57:26.317114 No LXC device requested
194 00:57:26.317215 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 00:57:26.317323 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 00:57:26.317429 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 00:57:26.317517 Checking files for TFTP limit of 4294967296 bytes.
198 00:57:26.317969 end: 1 tftp-deploy (duration 00:00:01) [common]
199 00:57:26.318101 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 00:57:26.318218 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 00:57:26.318361 substitutions:
202 00:57:26.318444 - {DTB}: None
203 00:57:26.318523 - {INITRD}: 8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
204 00:57:26.318597 - {KERNEL}: 8314794/tftp-deploy-sxkxlygn/kernel/bzImage
205 00:57:26.318666 - {LAVA_MAC}: None
206 00:57:26.318759 - {PRESEED_CONFIG}: None
207 00:57:26.318870 - {PRESEED_LOCAL}: None
208 00:57:26.318971 - {RAMDISK}: 8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
209 00:57:26.319059 - {ROOT_PART}: None
210 00:57:26.319125 - {ROOT}: None
211 00:57:26.319194 - {SERVER_IP}: 192.168.201.1
212 00:57:26.319264 - {TEE}: None
213 00:57:26.319333 Parsed boot commands:
214 00:57:26.319399 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 00:57:26.319581 Parsed boot commands: tftpboot 192.168.201.1 8314794/tftp-deploy-sxkxlygn/kernel/bzImage 8314794/tftp-deploy-sxkxlygn/kernel/cmdline 8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
216 00:57:26.319696 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 00:57:26.319804 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 00:57:26.319916 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 00:57:26.320029 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 00:57:26.320119 Not connected, no need to disconnect.
221 00:57:26.320213 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 00:57:26.320314 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 00:57:26.320393 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
224 00:57:26.323462 Setting prompt string to ['lava-test: # ']
225 00:57:26.323796 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 00:57:26.323951 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 00:57:26.324109 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 00:57:26.324234 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 00:57:26.324441 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
230 00:57:26.345502 >> Command sent successfully.
231 00:57:26.347683 Returned 0 in 0 seconds
232 00:57:26.448473 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 00:57:26.449134 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 00:57:26.449261 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 00:57:26.449361 Setting prompt string to 'Starting depthcharge on Helios...'
237 00:57:26.449444 Changing prompt to 'Starting depthcharge on Helios...'
238 00:57:26.449527 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 00:57:26.449827 [Enter `^Ec?' for help]
240 00:57:33.034622
241 00:57:33.034830
242 00:57:33.044580 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 00:57:33.048070 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 00:57:33.054340 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 00:57:33.057743 CPU: AES supported, TXT NOT supported, VT supported
246 00:57:33.064774 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 00:57:33.068196 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 00:57:33.074964 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 00:57:33.077771 VBOOT: Loading verstage.
250 00:57:33.081683 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 00:57:33.087780 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 00:57:33.091273 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 00:57:33.094588 CBFS @ c08000 size 3f8000
254 00:57:33.101136 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 00:57:33.104289 CBFS: Locating 'fallback/verstage'
256 00:57:33.107575 CBFS: Found @ offset 10fb80 size 1072c
257 00:57:33.111422
258 00:57:33.111524
259 00:57:33.121191 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 00:57:33.135890 Probing TPM: . done!
261 00:57:33.139001 TPM ready after 0 ms
262 00:57:33.142267 Connected to device vid:did:rid of 1ae0:0028:00
263 00:57:33.152446 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 00:57:33.156132 Initialized TPM device CR50 revision 0
265 00:57:33.198407 tlcl_send_startup: Startup return code is 0
266 00:57:33.198559 TPM: setup succeeded
267 00:57:33.211263 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 00:57:33.215122 Chrome EC: UHEPI supported
269 00:57:33.218751 Phase 1
270 00:57:33.221590 FMAP: area GBB found @ c05000 (12288 bytes)
271 00:57:33.228515 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 00:57:33.231679 Phase 2
273 00:57:33.231782 Phase 3
274 00:57:33.235147 FMAP: area GBB found @ c05000 (12288 bytes)
275 00:57:33.241434 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 00:57:33.248093 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 00:57:33.251675 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 00:57:33.257992 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 00:57:33.274512 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 00:57:33.277132 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 00:57:33.283806 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 00:57:33.288237 Phase 4
283 00:57:33.291125 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 00:57:33.297677 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 00:57:33.477742 VB2:vb2_rsa_verify_digest() Digest check failed!
286 00:57:33.481179 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 00:57:33.484273
288 00:57:33.484387 Saving nvdata
289 00:57:33.487392 Reboot requested (10020007)
290 00:57:33.490449 board_reset() called!
291 00:57:33.490555 full_reset() called!
292 00:57:38.002126
293 00:57:38.002308
294 00:57:38.012180 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 00:57:38.015095 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 00:57:38.021863 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 00:57:38.025397 CPU: AES supported, TXT NOT supported, VT supported
298 00:57:38.031572 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 00:57:38.034889 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 00:57:38.041527 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 00:57:38.045023 VBOOT: Loading verstage.
302 00:57:38.047882 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 00:57:38.054466 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 00:57:38.061414 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 00:57:38.061567 CBFS @ c08000 size 3f8000
306 00:57:38.068311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 00:57:38.071100 CBFS: Locating 'fallback/verstage'
308 00:57:38.074671 CBFS: Found @ offset 10fb80 size 1072c
309 00:57:38.078600
310 00:57:38.078729
311 00:57:38.088706 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 00:57:38.102960 Probing TPM: . done!
313 00:57:38.106464 TPM ready after 0 ms
314 00:57:38.109961 Connected to device vid:did:rid of 1ae0:0028:00
315 00:57:38.119567 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
316 00:57:38.123533 Initialized TPM device CR50 revision 0
317 00:57:38.165842 tlcl_send_startup: Startup return code is 0
318 00:57:38.166043 TPM: setup succeeded
319 00:57:38.178398 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 00:57:38.182361 Chrome EC: UHEPI supported
321 00:57:38.185811 Phase 1
322 00:57:38.189187 FMAP: area GBB found @ c05000 (12288 bytes)
323 00:57:38.195419 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 00:57:38.201668 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 00:57:38.205027 Recovery requested (1009000e)
326 00:57:38.211160 Saving nvdata
327 00:57:38.217412 tlcl_extend: response is 0
328 00:57:38.225868 tlcl_extend: response is 0
329 00:57:38.233435 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
330 00:57:38.236643 CBFS @ c08000 size 3f8000
331 00:57:38.242750 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
332 00:57:38.246311 CBFS: Locating 'fallback/romstage'
333 00:57:38.249510 CBFS: Found @ offset 80 size 145fc
334 00:57:38.252887 Accumulated console time in verstage 98 ms
335 00:57:38.252987
336 00:57:38.253065
337 00:57:38.265891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
338 00:57:38.273237 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 00:57:38.276005 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 00:57:38.279472 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
341 00:57:38.285742 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
342 00:57:38.289077 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
343 00:57:38.292577 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
344 00:57:38.295843 TCO_STS: 0000 0000
345 00:57:38.299244 GEN_PMCON: e0015238 00000200
346 00:57:38.302174 GBLRST_CAUSE: 00000000 00000000
347 00:57:38.302271 prev_sleep_state 5
348 00:57:38.306195 Boot Count incremented to 38371
349 00:57:38.313077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 00:57:38.316368 CBFS @ c08000 size 3f8000
351 00:57:38.322724 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
352 00:57:38.322828 CBFS: Locating 'fspm.bin'
353 00:57:38.329020 CBFS: Found @ offset 5ffc0 size 71000
354 00:57:38.332427 Chrome EC: UHEPI supported
355 00:57:38.338997 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
356 00:57:38.342927 Probing TPM: done!
357 00:57:38.349688 Connected to device vid:did:rid of 1ae0:0028:00
358 00:57:38.359288 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
359 00:57:38.365452 Initialized TPM device CR50 revision 0
360 00:57:38.374520 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
361 00:57:38.381371 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
362 00:57:38.384188 MRC cache found, size 1948
363 00:57:38.387500 bootmode is set to: 2
364 00:57:38.390863 PRMRR disabled by config.
365 00:57:38.390973 SPD INDEX = 1
366 00:57:38.394331
367 00:57:38.397613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 00:57:38.401100 CBFS @ c08000 size 3f8000
369 00:57:38.407384 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 00:57:38.407501 CBFS: Locating 'spd.bin'
371 00:57:38.410647 CBFS: Found @ offset 5fb80 size 400
372 00:57:38.414219 SPD: module type is LPDDR3
373 00:57:38.417277 SPD: module part is
374 00:57:38.424192 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
375 00:57:38.427515 SPD: device width 4 bits, bus width 8 bits
376 00:57:38.431000 SPD: module size is 4096 MB (per channel)
377 00:57:38.434207 memory slot: 0 configuration done.
378 00:57:38.437151 memory slot: 2 configuration done.
379 00:57:38.489507 CBMEM:
380 00:57:38.492207 IMD: root @ 99fff000 254 entries.
381 00:57:38.495507 IMD: root @ 99ffec00 62 entries.
382 00:57:38.498885 External stage cache:
383 00:57:38.502328 IMD: root @ 9abff000 254 entries.
384 00:57:38.505811 IMD: root @ 9abfec00 62 entries.
385 00:57:38.509227 Chrome EC: clear events_b mask to 0x0000000020004000
386 00:57:38.524557 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 00:57:38.529636
388 00:57:38.538213 tlcl_write: response is 0
389 00:57:38.546963 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 00:57:38.553688 MRC: TPM MRC hash updated successfully.
391 00:57:38.553812 2 DIMMs found
392 00:57:38.557211 SMM Memory Map
393 00:57:38.560367 SMRAM : 0x9a000000 0x1000000
394 00:57:38.563748 Subregion 0: 0x9a000000 0xa00000
395 00:57:38.567138 Subregion 1: 0x9aa00000 0x200000
396 00:57:38.570296 Subregion 2: 0x9ac00000 0x400000
397 00:57:38.573676 top_of_ram = 0x9a000000
398 00:57:38.577202 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
399 00:57:38.583479 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
400 00:57:38.586946 MTRR Range: Start=ff000000 End=0 (Size 1000000)
401 00:57:38.593729 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 00:57:38.597034 CBFS @ c08000 size 3f8000
403 00:57:38.600768 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 00:57:38.603899 CBFS: Locating 'fallback/postcar'
405 00:57:38.606725 CBFS: Found @ offset 107000 size 4b44
406 00:57:38.610237
407 00:57:38.613479 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
408 00:57:38.625559 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
409 00:57:38.629143 Processing 180 relocs. Offset value of 0x97c0c000
410 00:57:38.637563 Accumulated console time in romstage 286 ms
411 00:57:38.637661
412 00:57:38.637739
413 00:57:38.647217 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
414 00:57:38.653896 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
415 00:57:38.657066 CBFS @ c08000 size 3f8000
416 00:57:38.660439 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
417 00:57:38.667256 CBFS: Locating 'fallback/ramstage'
418 00:57:38.670691 CBFS: Found @ offset 43380 size 1b9e8
419 00:57:38.676894 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
420 00:57:38.709160 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
421 00:57:38.712617 Processing 3976 relocs. Offset value of 0x98db0000
422 00:57:38.719411 Accumulated console time in postcar 52 ms
423 00:57:38.719509
424 00:57:38.719586
425 00:57:38.728911 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
426 00:57:38.735623 FMAP: area RO_VPD found @ c00000 (16384 bytes)
427 00:57:38.739190 WARNING: RO_VPD is uninitialized or empty.
428 00:57:38.742078 FMAP: area RW_VPD found @ af8000 (8192 bytes)
429 00:57:38.748753 FMAP: area RW_VPD found @ af8000 (8192 bytes)
430 00:57:38.748850 Normal boot.
431 00:57:38.755281 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
432 00:57:38.758736 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 00:57:38.762134 CBFS @ c08000 size 3f8000
434 00:57:38.768950 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 00:57:38.771921 CBFS: Locating 'cpu_microcode_blob.bin'
436 00:57:38.775088 CBFS: Found @ offset 14700 size 2ec00
437 00:57:38.778646 microcode: sig=0x806ec pf=0x4 revision=0xc9
438 00:57:38.782075 Skip microcode update
439 00:57:38.788333 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 00:57:38.788431 CBFS @ c08000 size 3f8000
441 00:57:38.795167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 00:57:38.798424 CBFS: Locating 'fsps.bin'
443 00:57:38.801981 CBFS: Found @ offset d1fc0 size 35000
444 00:57:38.827020 Detected 4 core, 8 thread CPU.
445 00:57:38.830512 Setting up SMI for CPU
446 00:57:38.833984 IED base = 0x9ac00000
447 00:57:38.834080 IED size = 0x00400000
448 00:57:38.837203 Will perform SMM setup.
449 00:57:38.843582 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
450 00:57:38.850371 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
451 00:57:38.853803 Processing 16 relocs. Offset value of 0x00030000
452 00:57:38.857531 Attempting to start 7 APs
453 00:57:38.860907 Waiting for 10ms after sending INIT.
454 00:57:38.876873 Waiting for 1st SIPI to complete...done.
455 00:57:38.876970 AP: slot 2 apic_id 1.
456 00:57:38.883893 Waiting for 2nd SIPI to complete...done.
457 00:57:38.883990 AP: slot 1 apic_id 3.
458 00:57:38.887119 AP: slot 3 apic_id 2.
459 00:57:38.890383 AP: slot 6 apic_id 6.
460 00:57:38.890479 AP: slot 5 apic_id 7.
461 00:57:38.893245 AP: slot 7 apic_id 5.
462 00:57:38.896712 AP: slot 4 apic_id 4.
463 00:57:38.903910 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
464 00:57:38.906680 Processing 13 relocs. Offset value of 0x00038000
465 00:57:38.913409 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
466 00:57:38.920322 Installing SMM handler to 0x9a000000
467 00:57:38.926529 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
468 00:57:38.930197 Processing 658 relocs. Offset value of 0x9a010000
469 00:57:38.939811 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
470 00:57:38.943202 Processing 13 relocs. Offset value of 0x9a008000
471 00:57:38.949792 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
472 00:57:38.956697 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
473 00:57:38.960112 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
474 00:57:38.966656 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
475 00:57:38.973307 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
476 00:57:38.979697 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
477 00:57:38.982963 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
478 00:57:38.989380 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
479 00:57:38.993337 Clearing SMI status registers
480 00:57:38.996308 SMI_STS: PM1
481 00:57:38.996402 PM1_STS: PWRBTN
482 00:57:38.999627 TCO_STS: SECOND_TO
483 00:57:39.003034 New SMBASE 0x9a000000
484 00:57:39.006291 In relocation handler: CPU 0
485 00:57:39.009829 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
486 00:57:39.012776 Writing SMRR. base = 0x9a000006, mask=0xff000800
487 00:57:39.016221 Relocation complete.
488 00:57:39.019555 New SMBASE 0x99fff800
489 00:57:39.019652 In relocation handler: CPU 2
490 00:57:39.022951
491 00:57:39.026227 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
492 00:57:39.029529 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 00:57:39.033016 Relocation complete.
494 00:57:39.036440 New SMBASE 0x99ffe800
495 00:57:39.036536 In relocation handler: CPU 6
496 00:57:39.042662 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
497 00:57:39.046201 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 00:57:39.049031 Relocation complete.
499 00:57:39.052948 New SMBASE 0x99ffec00
500 00:57:39.053045 In relocation handler: CPU 5
501 00:57:39.059170 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
502 00:57:39.062370 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 00:57:39.065670 Relocation complete.
504 00:57:39.065766 New SMBASE 0x99fff400
505 00:57:39.069068 In relocation handler: CPU 3
506 00:57:39.075788 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
507 00:57:39.079174 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 00:57:39.082584 Relocation complete.
509 00:57:39.082679 New SMBASE 0x99fffc00
510 00:57:39.085480 In relocation handler: CPU 1
511 00:57:39.089502 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
512 00:57:39.092349
513 00:57:39.095922 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 00:57:39.099281 Relocation complete.
515 00:57:39.099377 New SMBASE 0x99fff000
516 00:57:39.102616 In relocation handler: CPU 4
517 00:57:39.105953 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
518 00:57:39.112155 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 00:57:39.115484 Relocation complete.
520 00:57:39.115580 New SMBASE 0x99ffe400
521 00:57:39.118863 In relocation handler: CPU 7
522 00:57:39.122146 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
523 00:57:39.128744 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 00:57:39.128840 Relocation complete.
525 00:57:39.132650 Initializing CPU #0
526 00:57:39.135404 CPU: vendor Intel device 806ec
527 00:57:39.138878 CPU: family 06, model 8e, stepping 0c
528 00:57:39.142204 Clearing out pending MCEs
529 00:57:39.145681 Setting up local APIC...
530 00:57:39.145776 apic_id: 0x00 done.
531 00:57:39.149283 Turbo is available but hidden
532 00:57:39.152156 Turbo is available and visible
533 00:57:39.155434 VMX status: enabled
534 00:57:39.158705 IA32_FEATURE_CONTROL status: locked
535 00:57:39.162022 Skip microcode update
536 00:57:39.162116 CPU #0 initialized
537 00:57:39.165540 Initializing CPU #2
538 00:57:39.168974 Initializing CPU #4
539 00:57:39.169069 Initializing CPU #7
540 00:57:39.172291 Initializing CPU #1
541 00:57:39.172386 Initializing CPU #3
542 00:57:39.175682 Initializing CPU #6
543 00:57:39.178981 Initializing CPU #5
544 00:57:39.181839 CPU: vendor Intel device 806ec
545 00:57:39.185111 CPU: family 06, model 8e, stepping 0c
546 00:57:39.188569 CPU: vendor Intel device 806ec
547 00:57:39.191963 CPU: family 06, model 8e, stepping 0c
548 00:57:39.195441 Clearing out pending MCEs
549 00:57:39.195536 Clearing out pending MCEs
550 00:57:39.198290 Setting up local APIC...
551 00:57:39.201618 CPU: vendor Intel device 806ec
552 00:57:39.205150 CPU: family 06, model 8e, stepping 0c
553 00:57:39.208495 Clearing out pending MCEs
554 00:57:39.211854 CPU: vendor Intel device 806ec
555 00:57:39.215195 CPU: vendor Intel device 806ec
556 00:57:39.218551 CPU: family 06, model 8e, stepping 0c
557 00:57:39.221766 CPU: family 06, model 8e, stepping 0c
558 00:57:39.225217 Clearing out pending MCEs
559 00:57:39.228123 Clearing out pending MCEs
560 00:57:39.231551 Setting up local APIC...
561 00:57:39.231646 Setting up local APIC...
562 00:57:39.234657 Setting up local APIC...
563 00:57:39.238089 CPU: vendor Intel device 806ec
564 00:57:39.241560 CPU: family 06, model 8e, stepping 0c
565 00:57:39.244919 CPU: vendor Intel device 806ec
566 00:57:39.248503 CPU: family 06, model 8e, stepping 0c
567 00:57:39.251138 Clearing out pending MCEs
568 00:57:39.254514 Clearing out pending MCEs
569 00:57:39.257967 Setting up local APIC...
570 00:57:39.258062 apic_id: 0x04 done.
571 00:57:39.261343 apic_id: 0x05 done.
572 00:57:39.264699 VMX status: enabled
573 00:57:39.264795 VMX status: enabled
574 00:57:39.268168 IA32_FEATURE_CONTROL status: locked
575 00:57:39.271376 IA32_FEATURE_CONTROL status: locked
576 00:57:39.274864 Skip microcode update
577 00:57:39.278261 Skip microcode update
578 00:57:39.278355 CPU #4 initialized
579 00:57:39.281100 CPU #7 initialized
580 00:57:39.284429 apic_id: 0x02 done.
581 00:57:39.284524 Setting up local APIC...
582 00:57:39.287925 apic_id: 0x01 done.
583 00:57:39.291143 apic_id: 0x03 done.
584 00:57:39.291238 VMX status: enabled
585 00:57:39.294714 VMX status: enabled
586 00:57:39.297658 IA32_FEATURE_CONTROL status: locked
587 00:57:39.301030 IA32_FEATURE_CONTROL status: locked
588 00:57:39.304433 Skip microcode update
589 00:57:39.304528 Skip microcode update
590 00:57:39.307854 CPU #3 initialized
591 00:57:39.311124 CPU #1 initialized
592 00:57:39.311219 VMX status: enabled
593 00:57:39.314567 apic_id: 0x06 done.
594 00:57:39.317613 Setting up local APIC...
595 00:57:39.321028 IA32_FEATURE_CONTROL status: locked
596 00:57:39.321124 VMX status: enabled
597 00:57:39.324328 apic_id: 0x07 done.
598 00:57:39.327926 IA32_FEATURE_CONTROL status: locked
599 00:57:39.330664 VMX status: enabled
600 00:57:39.330754 Skip microcode update
601 00:57:39.334384 IA32_FEATURE_CONTROL status: locked
602 00:57:39.337571 CPU #6 initialized
603 00:57:39.341035 Skip microcode update
604 00:57:39.341129 Skip microcode update
605 00:57:39.344311 CPU #5 initialized
606 00:57:39.347184 CPU #2 initialized
607 00:57:39.350636 bsp_do_flight_plan done after 466 msecs.
608 00:57:39.354069 CPU: frequency set to 4200 MHz
609 00:57:39.354164 Enabling SMIs.
610 00:57:39.357615 Locking SMM.
611 00:57:39.371297 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 00:57:39.373974 CBFS @ c08000 size 3f8000
613 00:57:39.380677 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 00:57:39.380773 CBFS: Locating 'vbt.bin'
615 00:57:39.384085 CBFS: Found @ offset 5f5c0 size 499
616 00:57:39.390683 Found a VBT of 4608 bytes after decompression
617 00:57:39.573025 Display FSP Version Info HOB
618 00:57:39.576586 Reference Code - CPU = 9.0.1e.30
619 00:57:39.579532 uCode Version = 0.0.0.ca
620 00:57:39.582898 TXT ACM version = ff.ff.ff.ffff
621 00:57:39.586414 Display FSP Version Info HOB
622 00:57:39.589850 Reference Code - ME = 9.0.1e.30
623 00:57:39.593085 MEBx version = 0.0.0.0
624 00:57:39.595952 ME Firmware Version = Consumer SKU
625 00:57:39.599447 Display FSP Version Info HOB
626 00:57:39.602938 Reference Code - CML PCH = 9.0.1e.30
627 00:57:39.606404 PCH-CRID Status = Disabled
628 00:57:39.609527 PCH-CRID Original Value = ff.ff.ff.ffff
629 00:57:39.612502 PCH-CRID New Value = ff.ff.ff.ffff
630 00:57:39.616234 OPROM - RST - RAID = ff.ff.ff.ffff
631 00:57:39.619589 ChipsetInit Base Version = ff.ff.ff.ffff
632 00:57:39.622948 ChipsetInit Oem Version = ff.ff.ff.ffff
633 00:57:39.625858 Display FSP Version Info HOB
634 00:57:39.632626 Reference Code - SA - System Agent = 9.0.1e.30
635 00:57:39.635942 Reference Code - MRC = 0.7.1.6c
636 00:57:39.636035 SA - PCIe Version = 9.0.1e.30
637 00:57:39.639282
638 00:57:39.639375 SA-CRID Status = Disabled
639 00:57:39.642570 SA-CRID Original Value = 0.0.0.c
640 00:57:39.645870 SA-CRID New Value = 0.0.0.c
641 00:57:39.649397 OPROM - VBIOS = ff.ff.ff.ffff
642 00:57:39.652675 RTC Init
643 00:57:39.656139 Set power on after power failure.
644 00:57:39.656233 Disabling Deep S3
645 00:57:39.659001 Disabling Deep S3
646 00:57:39.659094 Disabling Deep S4
647 00:57:39.662326 Disabling Deep S4
648 00:57:39.662419 Disabling Deep S5
649 00:57:39.665589
650 00:57:39.665682 Disabling Deep S5
651 00:57:39.672415 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
652 00:57:39.672509 Enumerating buses...
653 00:57:39.679141 Show all devs... Before device enumeration.
654 00:57:39.679238 Root Device: enabled 1
655 00:57:39.682537
656 00:57:39.682631 CPU_CLUSTER: 0: enabled 1
657 00:57:39.685446 DOMAIN: 0000: enabled 1
658 00:57:39.688767 APIC: 00: enabled 1
659 00:57:39.688860 PCI: 00:00.0: enabled 1
660 00:57:39.692096 PCI: 00:02.0: enabled 1
661 00:57:39.695587 PCI: 00:04.0: enabled 0
662 00:57:39.698984 PCI: 00:05.0: enabled 0
663 00:57:39.699077 PCI: 00:12.0: enabled 1
664 00:57:39.702376 PCI: 00:12.5: enabled 0
665 00:57:39.705206 PCI: 00:12.6: enabled 0
666 00:57:39.708644 PCI: 00:14.0: enabled 1
667 00:57:39.708739 PCI: 00:14.1: enabled 0
668 00:57:39.712058 PCI: 00:14.3: enabled 1
669 00:57:39.715386 PCI: 00:14.5: enabled 0
670 00:57:39.718673 PCI: 00:15.0: enabled 1
671 00:57:39.718794 PCI: 00:15.1: enabled 1
672 00:57:39.722027 PCI: 00:15.2: enabled 0
673 00:57:39.725579 PCI: 00:15.3: enabled 0
674 00:57:39.725675 PCI: 00:16.0: enabled 1
675 00:57:39.728872 PCI: 00:16.1: enabled 0
676 00:57:39.732047 PCI: 00:16.2: enabled 0
677 00:57:39.735392 PCI: 00:16.3: enabled 0
678 00:57:39.735487 PCI: 00:16.4: enabled 0
679 00:57:39.738671 PCI: 00:16.5: enabled 0
680 00:57:39.741938 PCI: 00:17.0: enabled 1
681 00:57:39.745157 PCI: 00:19.0: enabled 1
682 00:57:39.745260 PCI: 00:19.1: enabled 0
683 00:57:39.748568 PCI: 00:19.2: enabled 0
684 00:57:39.751502 PCI: 00:1a.0: enabled 0
685 00:57:39.754859 PCI: 00:1c.0: enabled 0
686 00:57:39.754954 PCI: 00:1c.1: enabled 0
687 00:57:39.758398 PCI: 00:1c.2: enabled 0
688 00:57:39.761859 PCI: 00:1c.3: enabled 0
689 00:57:39.761954 PCI: 00:1c.4: enabled 0
690 00:57:39.765076 PCI: 00:1c.5: enabled 0
691 00:57:39.768411 PCI: 00:1c.6: enabled 0
692 00:57:39.771710 PCI: 00:1c.7: enabled 0
693 00:57:39.771804 PCI: 00:1d.0: enabled 1
694 00:57:39.774977 PCI: 00:1d.1: enabled 0
695 00:57:39.778415 PCI: 00:1d.2: enabled 0
696 00:57:39.781958 PCI: 00:1d.3: enabled 0
697 00:57:39.782054 PCI: 00:1d.4: enabled 0
698 00:57:39.784646 PCI: 00:1d.5: enabled 1
699 00:57:39.787876 PCI: 00:1e.0: enabled 1
700 00:57:39.791166 PCI: 00:1e.1: enabled 0
701 00:57:39.791261 PCI: 00:1e.2: enabled 1
702 00:57:39.794619 PCI: 00:1e.3: enabled 1
703 00:57:39.798048 PCI: 00:1f.0: enabled 1
704 00:57:39.798144 PCI: 00:1f.1: enabled 1
705 00:57:39.801543 PCI: 00:1f.2: enabled 1
706 00:57:39.804993 PCI: 00:1f.3: enabled 1
707 00:57:39.808384 PCI: 00:1f.4: enabled 1
708 00:57:39.808480 PCI: 00:1f.5: enabled 1
709 00:57:39.811327 PCI: 00:1f.6: enabled 0
710 00:57:39.814638 USB0 port 0: enabled 1
711 00:57:39.817901 I2C: 00:15: enabled 1
712 00:57:39.817996 I2C: 00:5d: enabled 1
713 00:57:39.821275 GENERIC: 0.0: enabled 1
714 00:57:39.824508 I2C: 00:1a: enabled 1
715 00:57:39.824603 I2C: 00:38: enabled 1
716 00:57:39.827854 I2C: 00:39: enabled 1
717 00:57:39.830854 I2C: 00:3a: enabled 1
718 00:57:39.830949 I2C: 00:3b: enabled 1
719 00:57:39.834340 PCI: 00:00.0: enabled 1
720 00:57:39.837646 SPI: 00: enabled 1
721 00:57:39.837742 SPI: 01: enabled 1
722 00:57:39.840903 PNP: 0c09.0: enabled 1
723 00:57:39.844311 USB2 port 0: enabled 1
724 00:57:39.844406 USB2 port 1: enabled 1
725 00:57:39.847669 USB2 port 2: enabled 0
726 00:57:39.851253 USB2 port 3: enabled 0
727 00:57:39.851348 USB2 port 5: enabled 0
728 00:57:39.854104 USB2 port 6: enabled 1
729 00:57:39.857368 USB2 port 9: enabled 1
730 00:57:39.860881 USB3 port 0: enabled 1
731 00:57:39.860977 USB3 port 1: enabled 1
732 00:57:39.864245 USB3 port 2: enabled 1
733 00:57:39.867694 USB3 port 3: enabled 1
734 00:57:39.867788 USB3 port 4: enabled 0
735 00:57:39.870948 APIC: 03: enabled 1
736 00:57:39.874196 APIC: 01: enabled 1
737 00:57:39.874291 APIC: 02: enabled 1
738 00:57:39.877692 APIC: 04: enabled 1
739 00:57:39.877787 APIC: 07: enabled 1
740 00:57:39.880982
741 00:57:39.881077 APIC: 06: enabled 1
742 00:57:39.884430 APIC: 05: enabled 1
743 00:57:39.884538 Compare with tree...
744 00:57:39.887267 Root Device: enabled 1
745 00:57:39.890502 CPU_CLUSTER: 0: enabled 1
746 00:57:39.893873 APIC: 00: enabled 1
747 00:57:39.893969 APIC: 03: enabled 1
748 00:57:39.897493 APIC: 01: enabled 1
749 00:57:39.900400 APIC: 02: enabled 1
750 00:57:39.900495 APIC: 04: enabled 1
751 00:57:39.903866 APIC: 07: enabled 1
752 00:57:39.907291 APIC: 06: enabled 1
753 00:57:39.907386 APIC: 05: enabled 1
754 00:57:39.910548 DOMAIN: 0000: enabled 1
755 00:57:39.913989 PCI: 00:00.0: enabled 1
756 00:57:39.917314 PCI: 00:02.0: enabled 1
757 00:57:39.917407 PCI: 00:04.0: enabled 0
758 00:57:39.920610 PCI: 00:05.0: enabled 0
759 00:57:39.923971 PCI: 00:12.0: enabled 1
760 00:57:39.926892 PCI: 00:12.5: enabled 0
761 00:57:39.930378 PCI: 00:12.6: enabled 0
762 00:57:39.930471 PCI: 00:14.0: enabled 1
763 00:57:39.933674 USB0 port 0: enabled 1
764 00:57:39.937092 USB2 port 0: enabled 1
765 00:57:39.940562 USB2 port 1: enabled 1
766 00:57:39.943716 USB2 port 2: enabled 0
767 00:57:39.943809 USB2 port 3: enabled 0
768 00:57:39.947000
769 00:57:39.947093 USB2 port 5: enabled 0
770 00:57:39.950243 USB2 port 6: enabled 1
771 00:57:39.953797 USB2 port 9: enabled 1
772 00:57:39.957166 USB3 port 0: enabled 1
773 00:57:39.960482 USB3 port 1: enabled 1
774 00:57:39.960575 USB3 port 2: enabled 1
775 00:57:39.963411 USB3 port 3: enabled 1
776 00:57:39.966952 USB3 port 4: enabled 0
777 00:57:39.970400 PCI: 00:14.1: enabled 0
778 00:57:39.973704 PCI: 00:14.3: enabled 1
779 00:57:39.973797 PCI: 00:14.5: enabled 0
780 00:57:39.976847 PCI: 00:15.0: enabled 1
781 00:57:39.980300 I2C: 00:15: enabled 1
782 00:57:39.984019 PCI: 00:15.1: enabled 1
783 00:57:39.986583 I2C: 00:5d: enabled 1
784 00:57:39.986684 GENERIC: 0.0: enabled 1
785 00:57:39.989952 PCI: 00:15.2: enabled 0
786 00:57:39.993485 PCI: 00:15.3: enabled 0
787 00:57:39.996876 PCI: 00:16.0: enabled 1
788 00:57:39.999886 PCI: 00:16.1: enabled 0
789 00:57:39.999979 PCI: 00:16.2: enabled 0
790 00:57:40.003415 PCI: 00:16.3: enabled 0
791 00:57:40.006735 PCI: 00:16.4: enabled 0
792 00:57:40.009710 PCI: 00:16.5: enabled 0
793 00:57:40.013236 PCI: 00:17.0: enabled 1
794 00:57:40.013332 PCI: 00:19.0: enabled 1
795 00:57:40.016688 I2C: 00:1a: enabled 1
796 00:57:40.020063 I2C: 00:38: enabled 1
797 00:57:40.022914 I2C: 00:39: enabled 1
798 00:57:40.023026 I2C: 00:3a: enabled 1
799 00:57:40.026291 I2C: 00:3b: enabled 1
800 00:57:40.029688 PCI: 00:19.1: enabled 0
801 00:57:40.033036 PCI: 00:19.2: enabled 0
802 00:57:40.036506 PCI: 00:1a.0: enabled 0
803 00:57:40.036601 PCI: 00:1c.0: enabled 0
804 00:57:40.039866 PCI: 00:1c.1: enabled 0
805 00:57:40.043221 PCI: 00:1c.2: enabled 0
806 00:57:40.046449 PCI: 00:1c.3: enabled 0
807 00:57:40.049820 PCI: 00:1c.4: enabled 0
808 00:57:40.049915 PCI: 00:1c.5: enabled 0
809 00:57:40.053027 PCI: 00:1c.6: enabled 0
810 00:57:40.056037 PCI: 00:1c.7: enabled 0
811 00:57:40.059356 PCI: 00:1d.0: enabled 1
812 00:57:40.059478 PCI: 00:1d.1: enabled 0
813 00:57:40.062728
814 00:57:40.062831 PCI: 00:1d.2: enabled 0
815 00:57:40.066195 PCI: 00:1d.3: enabled 0
816 00:57:40.069529 PCI: 00:1d.4: enabled 0
817 00:57:40.072630 PCI: 00:1d.5: enabled 1
818 00:57:40.072725 PCI: 00:00.0: enabled 1
819 00:57:40.076115
820 00:57:40.076211 PCI: 00:1e.0: enabled 1
821 00:57:40.079418 PCI: 00:1e.1: enabled 0
822 00:57:40.083032 PCI: 00:1e.2: enabled 1
823 00:57:40.086224 SPI: 00: enabled 1
824 00:57:40.086319 PCI: 00:1e.3: enabled 1
825 00:57:40.089529 SPI: 01: enabled 1
826 00:57:40.092903 PCI: 00:1f.0: enabled 1
827 00:57:40.095676 PNP: 0c09.0: enabled 1
828 00:57:40.095772 PCI: 00:1f.1: enabled 1
829 00:57:40.099572 PCI: 00:1f.2: enabled 1
830 00:57:40.102373 PCI: 00:1f.3: enabled 1
831 00:57:40.106105 PCI: 00:1f.4: enabled 1
832 00:57:40.109010 PCI: 00:1f.5: enabled 1
833 00:57:40.109105 PCI: 00:1f.6: enabled 0
834 00:57:40.112568 Root Device scanning...
835 00:57:40.115681 scan_static_bus for Root Device
836 00:57:40.119192 CPU_CLUSTER: 0 enabled
837 00:57:40.122623 DOMAIN: 0000 enabled
838 00:57:40.122717 DOMAIN: 0000 scanning...
839 00:57:40.125795 PCI: pci_scan_bus for bus 00
840 00:57:40.129015 PCI: 00:00.0 [8086/0000] ops
841 00:57:40.132578 PCI: 00:00.0 [8086/9b61] enabled
842 00:57:40.136039 PCI: 00:02.0 [8086/0000] bus ops
843 00:57:40.138698 PCI: 00:02.0 [8086/9b41] enabled
844 00:57:40.142056 PCI: 00:04.0 [8086/1903] disabled
845 00:57:40.145539 PCI: 00:08.0 [8086/1911] enabled
846 00:57:40.148742 PCI: 00:12.0 [8086/02f9] enabled
847 00:57:40.152497 PCI: 00:14.0 [8086/0000] bus ops
848 00:57:40.155373 PCI: 00:14.0 [8086/02ed] enabled
849 00:57:40.158775 PCI: 00:14.2 [8086/02ef] enabled
850 00:57:40.162175 PCI: 00:14.3 [8086/02f0] enabled
851 00:57:40.165409 PCI: 00:15.0 [8086/0000] bus ops
852 00:57:40.168798 PCI: 00:15.0 [8086/02e8] enabled
853 00:57:40.172321 PCI: 00:15.1 [8086/0000] bus ops
854 00:57:40.175747 PCI: 00:15.1 [8086/02e9] enabled
855 00:57:40.179015 PCI: 00:16.0 [8086/0000] ops
856 00:57:40.182348 PCI: 00:16.0 [8086/02e0] enabled
857 00:57:40.185596 PCI: 00:17.0 [8086/0000] ops
858 00:57:40.188850 PCI: 00:17.0 [8086/02d3] enabled
859 00:57:40.192209 PCI: 00:19.0 [8086/0000] bus ops
860 00:57:40.195587 PCI: 00:19.0 [8086/02c5] enabled
861 00:57:40.198953 PCI: 00:1d.0 [8086/0000] bus ops
862 00:57:40.202403 PCI: 00:1d.0 [8086/02b0] enabled
863 00:57:40.208566 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 00:57:40.212017 PCI: 00:1e.0 [8086/0000] ops
865 00:57:40.215421 PCI: 00:1e.0 [8086/02a8] enabled
866 00:57:40.218344 PCI: 00:1e.2 [8086/0000] bus ops
867 00:57:40.221838 PCI: 00:1e.2 [8086/02aa] enabled
868 00:57:40.225096 PCI: 00:1e.3 [8086/0000] bus ops
869 00:57:40.228355 PCI: 00:1e.3 [8086/02ab] enabled
870 00:57:40.231689 PCI: 00:1f.0 [8086/0000] bus ops
871 00:57:40.235061 PCI: 00:1f.0 [8086/0284] enabled
872 00:57:40.238584 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 00:57:40.244889 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 00:57:40.248786 PCI: 00:1f.3 [8086/0000] bus ops
875 00:57:40.251419 PCI: 00:1f.3 [8086/02c8] enabled
876 00:57:40.254835 PCI: 00:1f.4 [8086/0000] bus ops
877 00:57:40.258241 PCI: 00:1f.4 [8086/02a3] enabled
878 00:57:40.261650 PCI: 00:1f.5 [8086/0000] bus ops
879 00:57:40.264848 PCI: 00:1f.5 [8086/02a4] enabled
880 00:57:40.268246 PCI: Leftover static devices:
881 00:57:40.268341 PCI: 00:05.0
882 00:57:40.271725 PCI: 00:12.5
883 00:57:40.271820 PCI: 00:12.6
884 00:57:40.274585 PCI: 00:14.1
885 00:57:40.274682 PCI: 00:14.5
886 00:57:40.274765 PCI: 00:15.2
887 00:57:40.277995 PCI: 00:15.3
888 00:57:40.278090 PCI: 00:16.1
889 00:57:40.281392 PCI: 00:16.2
890 00:57:40.281487 PCI: 00:16.3
891 00:57:40.281562 PCI: 00:16.4
892 00:57:40.284687
893 00:57:40.284782 PCI: 00:16.5
894 00:57:40.284857 PCI: 00:19.1
895 00:57:40.288007 PCI: 00:19.2
896 00:57:40.288103 PCI: 00:1a.0
897 00:57:40.291291 PCI: 00:1c.0
898 00:57:40.291386 PCI: 00:1c.1
899 00:57:40.291461 PCI: 00:1c.2
900 00:57:40.294717 PCI: 00:1c.3
901 00:57:40.294820 PCI: 00:1c.4
902 00:57:40.298252 PCI: 00:1c.5
903 00:57:40.298347 PCI: 00:1c.6
904 00:57:40.298422 PCI: 00:1c.7
905 00:57:40.301074 PCI: 00:1d.1
906 00:57:40.301169 PCI: 00:1d.2
907 00:57:40.304837 PCI: 00:1d.3
908 00:57:40.304932 PCI: 00:1d.4
909 00:57:40.305006 PCI: 00:1d.5
910 00:57:40.308230
911 00:57:40.308325 PCI: 00:1e.1
912 00:57:40.308399 PCI: 00:1f.1
913 00:57:40.310973 PCI: 00:1f.2
914 00:57:40.311068 PCI: 00:1f.6
915 00:57:40.314373 PCI: Check your devicetree.cb.
916 00:57:40.317619 PCI: 00:02.0 scanning...
917 00:57:40.321139 scan_generic_bus for PCI: 00:02.0
918 00:57:40.324548 scan_generic_bus for PCI: 00:02.0 done
919 00:57:40.331221 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
920 00:57:40.334148 PCI: 00:14.0 scanning...
921 00:57:40.337571 scan_static_bus for PCI: 00:14.0
922 00:57:40.337667 USB0 port 0 enabled
923 00:57:40.341273 USB0 port 0 scanning...
924 00:57:40.344115 scan_static_bus for USB0 port 0
925 00:57:40.347530 USB2 port 0 enabled
926 00:57:40.347626 USB2 port 1 enabled
927 00:57:40.350836 USB2 port 2 disabled
928 00:57:40.353920 USB2 port 3 disabled
929 00:57:40.354029 USB2 port 5 disabled
930 00:57:40.357391 USB2 port 6 enabled
931 00:57:40.360649 USB2 port 9 enabled
932 00:57:40.360744 USB3 port 0 enabled
933 00:57:40.364124 USB3 port 1 enabled
934 00:57:40.364220 USB3 port 2 enabled
935 00:57:40.367408 USB3 port 3 enabled
936 00:57:40.370855 USB3 port 4 disabled
937 00:57:40.370950 USB2 port 0 scanning...
938 00:57:40.374383 scan_static_bus for USB2 port 0
939 00:57:40.380994 scan_static_bus for USB2 port 0 done
940 00:57:40.384342 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
941 00:57:40.387108 USB2 port 1 scanning...
942 00:57:40.390427 scan_static_bus for USB2 port 1
943 00:57:40.393996 scan_static_bus for USB2 port 1 done
944 00:57:40.400700 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
945 00:57:40.400797 USB2 port 6 scanning...
946 00:57:40.404271 scan_static_bus for USB2 port 6
947 00:57:40.410695 scan_static_bus for USB2 port 6 done
948 00:57:40.414111 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
949 00:57:40.417604 USB2 port 9 scanning...
950 00:57:40.420510 scan_static_bus for USB2 port 9
951 00:57:40.423916 scan_static_bus for USB2 port 9 done
952 00:57:40.430839 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
953 00:57:40.430936 USB3 port 0 scanning...
954 00:57:40.434005 scan_static_bus for USB3 port 0
955 00:57:40.440820 scan_static_bus for USB3 port 0 done
956 00:57:40.443672 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
957 00:57:40.447037 USB3 port 1 scanning...
958 00:57:40.450509 scan_static_bus for USB3 port 1
959 00:57:40.454048 scan_static_bus for USB3 port 1 done
960 00:57:40.460680 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
961 00:57:40.460776 USB3 port 2 scanning...
962 00:57:40.464213 scan_static_bus for USB3 port 2
963 00:57:40.470707 scan_static_bus for USB3 port 2 done
964 00:57:40.473612 scan_bus: scanning of bus USB3 port 2 took 9685 usecs
965 00:57:40.477064 USB3 port 3 scanning...
966 00:57:40.480319 scan_static_bus for USB3 port 3
967 00:57:40.483712 scan_static_bus for USB3 port 3 done
968 00:57:40.490447 scan_bus: scanning of bus USB3 port 3 took 9685 usecs
969 00:57:40.493944 scan_static_bus for USB0 port 0 done
970 00:57:40.497103 scan_bus: scanning of bus USB0 port 0 took 155270 usecs
971 00:57:40.500525
972 00:57:40.503841 scan_static_bus for PCI: 00:14.0 done
973 00:57:40.506705 scan_bus: scanning of bus PCI: 00:14.0 took 172891 usecs
974 00:57:40.510110 PCI: 00:15.0 scanning...
975 00:57:40.513612 scan_generic_bus for PCI: 00:15.0
976 00:57:40.517050 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
977 00:57:40.523362 scan_generic_bus for PCI: 00:15.0 done
978 00:57:40.526843 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
979 00:57:40.530361 PCI: 00:15.1 scanning...
980 00:57:40.533546 scan_generic_bus for PCI: 00:15.1
981 00:57:40.536839 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
982 00:57:40.543130 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
983 00:57:40.546615 scan_generic_bus for PCI: 00:15.1 done
984 00:57:40.553658 scan_bus: scanning of bus PCI: 00:15.1 took 18603 usecs
985 00:57:40.553754 PCI: 00:19.0 scanning...
986 00:57:40.556769 scan_generic_bus for PCI: 00:19.0
987 00:57:40.563401 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
988 00:57:40.566296 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
989 00:57:40.569746 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
990 00:57:40.573294 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
991 00:57:40.579608 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
992 00:57:40.583082 scan_generic_bus for PCI: 00:19.0 done
993 00:57:40.586521 scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs
994 00:57:40.589728 PCI: 00:1d.0 scanning...
995 00:57:40.593118 do_pci_scan_bridge for PCI: 00:1d.0
996 00:57:40.596735 PCI: pci_scan_bus for bus 01
997 00:57:40.599882 PCI: 01:00.0 [1c5c/1327] enabled
998 00:57:40.603411 Enabling Common Clock Configuration
999 00:57:40.609476 L1 Sub-State supported from root port 29
1000 00:57:40.613161 L1 Sub-State Support = 0xf
1001 00:57:40.613262 CommonModeRestoreTime = 0x28
1002 00:57:40.619513 Power On Value = 0x16, Power On Scale = 0x0
1003 00:57:40.619611 ASPM: Enabled L1
1004 00:57:40.626292 scan_bus: scanning of bus PCI: 00:1d.0 took 32827 usecs
1005 00:57:40.629767 PCI: 00:1e.2 scanning...
1006 00:57:40.633144 scan_generic_bus for PCI: 00:1e.2
1007 00:57:40.636036 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1008 00:57:40.639996 scan_generic_bus for PCI: 00:1e.2 done
1009 00:57:40.646048 scan_bus: scanning of bus PCI: 00:1e.2 took 13993 usecs
1010 00:57:40.649460 PCI: 00:1e.3 scanning...
1011 00:57:40.652936 scan_generic_bus for PCI: 00:1e.3
1012 00:57:40.656345 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1013 00:57:40.659162 scan_generic_bus for PCI: 00:1e.3 done
1014 00:57:40.665896 scan_bus: scanning of bus PCI: 00:1e.3 took 13987 usecs
1015 00:57:40.665993 PCI: 00:1f.0 scanning...
1016 00:57:40.669339
1017 00:57:40.672581 scan_static_bus for PCI: 00:1f.0
1018 00:57:40.672677 PNP: 0c09.0 enabled
1019 00:57:40.676038 scan_static_bus for PCI: 00:1f.0 done
1020 00:57:40.682347 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1021 00:57:40.685859 PCI: 00:1f.3 scanning...
1022 00:57:40.692439 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1023 00:57:40.692537 PCI: 00:1f.4 scanning...
1024 00:57:40.695842 scan_generic_bus for PCI: 00:1f.4
1025 00:57:40.702686 scan_generic_bus for PCI: 00:1f.4 done
1026 00:57:40.706106 scan_bus: scanning of bus PCI: 00:1f.4 took 10176 usecs
1027 00:57:40.709368 PCI: 00:1f.5 scanning...
1028 00:57:40.712875 scan_generic_bus for PCI: 00:1f.5
1029 00:57:40.715599 scan_generic_bus for PCI: 00:1f.5 done
1030 00:57:40.722203 scan_bus: scanning of bus PCI: 00:1f.5 took 10167 usecs
1031 00:57:40.729158 scan_bus: scanning of bus DOMAIN: 0000 took 604681 usecs
1032 00:57:40.731997 scan_static_bus for Root Device done
1033 00:57:40.738855 scan_bus: scanning of bus Root Device took 624546 usecs
1034 00:57:40.738951 done
1035 00:57:40.742150 Chrome EC: UHEPI supported
1036 00:57:40.749004 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1037 00:57:40.751715 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1038 00:57:40.758530 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1039 00:57:40.765666 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1040 00:57:40.769156 SPI flash protection: WPSW=0 SRP0=0
1041 00:57:40.775344 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1042 00:57:40.778807 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1043 00:57:40.782332 found VGA at PCI: 00:02.0
1044 00:57:40.785234 Setting up VGA for PCI: 00:02.0
1045 00:57:40.792010 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1046 00:57:40.795169 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1047 00:57:40.798544 Allocating resources...
1048 00:57:40.802053 Reading resources...
1049 00:57:40.804873 Root Device read_resources bus 0 link: 0
1050 00:57:40.808204 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1051 00:57:40.815062 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1052 00:57:40.818416 DOMAIN: 0000 read_resources bus 0 link: 0
1053 00:57:40.825968 PCI: 00:14.0 read_resources bus 0 link: 0
1054 00:57:40.829107 USB0 port 0 read_resources bus 0 link: 0
1055 00:57:40.837230 USB0 port 0 read_resources bus 0 link: 0 done
1056 00:57:40.840558 PCI: 00:14.0 read_resources bus 0 link: 0 done
1057 00:57:40.847846 PCI: 00:15.0 read_resources bus 1 link: 0
1058 00:57:40.851184 PCI: 00:15.0 read_resources bus 1 link: 0 done
1059 00:57:40.858007 PCI: 00:15.1 read_resources bus 2 link: 0
1060 00:57:40.861113 PCI: 00:15.1 read_resources bus 2 link: 0 done
1061 00:57:40.868664 PCI: 00:19.0 read_resources bus 3 link: 0
1062 00:57:40.874957 PCI: 00:19.0 read_resources bus 3 link: 0 done
1063 00:57:40.878325 PCI: 00:1d.0 read_resources bus 1 link: 0
1064 00:57:40.885172 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1065 00:57:40.888023 PCI: 00:1e.2 read_resources bus 4 link: 0
1066 00:57:40.894730 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1067 00:57:40.898156 PCI: 00:1e.3 read_resources bus 5 link: 0
1068 00:57:40.904771 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1069 00:57:40.908247 PCI: 00:1f.0 read_resources bus 0 link: 0
1070 00:57:40.914713 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1071 00:57:40.921573 DOMAIN: 0000 read_resources bus 0 link: 0 done
1072 00:57:40.924555 Root Device read_resources bus 0 link: 0 done
1073 00:57:40.927949 Done reading resources.
1074 00:57:40.934905 Show resources in subtree (Root Device)...After reading.
1075 00:57:40.937621 Root Device child on link 0 CPU_CLUSTER: 0
1076 00:57:40.941099 CPU_CLUSTER: 0 child on link 0 APIC: 00
1077 00:57:40.944559 APIC: 00
1078 00:57:40.944651 APIC: 03
1079 00:57:40.944767 APIC: 01
1080 00:57:40.948090 APIC: 02
1081 00:57:40.948183 APIC: 04
1082 00:57:40.948256 APIC: 07
1083 00:57:40.951281 APIC: 06
1084 00:57:40.951373 APIC: 05
1085 00:57:40.957952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1086 00:57:40.965015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1087 00:57:41.020736 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1088 00:57:41.020854 PCI: 00:00.0
1089 00:57:41.021174 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1090 00:57:41.021274 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1091 00:57:41.021593 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1092 00:57:41.021671 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1093 00:57:41.045402 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1094 00:57:41.045701 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1095 00:57:41.045983 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1096 00:57:41.052089 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1097 00:57:41.062191 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1098 00:57:41.069017 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1099 00:57:41.079117 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1100 00:57:41.088874 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1101 00:57:41.098722 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1102 00:57:41.108661 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1103 00:57:41.118420 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1104 00:57:41.128057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1105 00:57:41.128155 PCI: 00:02.0
1106 00:57:41.137910 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1107 00:57:41.148004 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1108 00:57:41.157765 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1109 00:57:41.157863 PCI: 00:04.0
1110 00:57:41.161126 PCI: 00:08.0
1111 00:57:41.170899 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1112 00:57:41.171036 PCI: 00:12.0
1113 00:57:41.181033 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1114 00:57:41.187947 PCI: 00:14.0 child on link 0 USB0 port 0
1115 00:57:41.197529 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1116 00:57:41.200815 USB0 port 0 child on link 0 USB2 port 0
1117 00:57:41.204055 USB2 port 0
1118 00:57:41.204150 USB2 port 1
1119 00:57:41.207355 USB2 port 2
1120 00:57:41.207449 USB2 port 3
1121 00:57:41.210742 USB2 port 5
1122 00:57:41.210844 USB2 port 6
1123 00:57:41.214090 USB2 port 9
1124 00:57:41.214185 USB3 port 0
1125 00:57:41.217603 USB3 port 1
1126 00:57:41.217698 USB3 port 2
1127 00:57:41.220880 USB3 port 3
1128 00:57:41.220976 USB3 port 4
1129 00:57:41.223886 PCI: 00:14.2
1130 00:57:41.234270 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1131 00:57:41.243967 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1132 00:57:41.244064 PCI: 00:14.3
1133 00:57:41.253825 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1134 00:57:41.260579 PCI: 00:15.0 child on link 0 I2C: 01:15
1135 00:57:41.270845 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 00:57:41.270941 I2C: 01:15
1137 00:57:41.274052 PCI: 00:15.1 child on link 0 I2C: 02:5d
1138 00:57:41.283657 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 00:57:41.287077 I2C: 02:5d
1140 00:57:41.287172 GENERIC: 0.0
1141 00:57:41.290594 PCI: 00:16.0
1142 00:57:41.300567 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1143 00:57:41.300665 PCI: 00:17.0
1144 00:57:41.310252 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1145 00:57:41.320441 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1146 00:57:41.327058 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1147 00:57:41.336704 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1148 00:57:41.343506 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1149 00:57:41.353128 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1150 00:57:41.356853 PCI: 00:19.0 child on link 0 I2C: 03:1a
1151 00:57:41.366514 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 00:57:41.369853 I2C: 03:1a
1153 00:57:41.369947 I2C: 03:38
1154 00:57:41.373075 I2C: 03:39
1155 00:57:41.373169 I2C: 03:3a
1156 00:57:41.376328 I2C: 03:3b
1157 00:57:41.379619 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1158 00:57:41.389840 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1159 00:57:41.399595 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1160 00:57:41.406378 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1161 00:57:41.409904 PCI: 01:00.0
1162 00:57:41.419398 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 00:57:41.419496 PCI: 00:1e.0
1164 00:57:41.432455 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1165 00:57:41.442627 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1166 00:57:41.445559 PCI: 00:1e.2 child on link 0 SPI: 00
1167 00:57:41.455723 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 00:57:41.455820 SPI: 00
1169 00:57:41.462512 PCI: 00:1e.3 child on link 0 SPI: 01
1170 00:57:41.472427 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 00:57:41.472524 SPI: 01
1172 00:57:41.475744 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1173 00:57:41.485337 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1174 00:57:41.495725 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1175 00:57:41.495821 PNP: 0c09.0
1176 00:57:41.505409 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1177 00:57:41.505506 PCI: 00:1f.3
1178 00:57:41.515615 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 00:57:41.525595 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1180 00:57:41.528929 PCI: 00:1f.4
1181 00:57:41.538618 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1182 00:57:41.545031 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1183 00:57:41.548540
1184 00:57:41.548635 PCI: 00:1f.5
1185 00:57:41.558678 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1186 00:57:41.565406 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1187 00:57:41.571616 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1188 00:57:41.578198 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1189 00:57:41.581621 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1190 00:57:41.584920 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1191 00:57:41.588566 PCI: 00:17.0 18 * [0x60 - 0x67] io
1192 00:57:41.591368 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1193 00:57:41.598089 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1194 00:57:41.604962 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1195 00:57:41.611099 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1196 00:57:41.621056 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1197 00:57:41.628280 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1198 00:57:41.630941 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1199 00:57:41.641253 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1200 00:57:41.644568 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1201 00:57:41.647525 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1202 00:57:41.650974
1203 00:57:41.654321 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1204 00:57:41.657650 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1205 00:57:41.664394 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1206 00:57:41.667275 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1207 00:57:41.674657 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1208 00:57:41.677328 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1209 00:57:41.684244 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1210 00:57:41.687664 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1211 00:57:41.693913 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1212 00:57:41.697395 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1213 00:57:41.704075 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1214 00:57:41.707399 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1215 00:57:41.713643 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1216 00:57:41.716933 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1217 00:57:41.723724 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1218 00:57:41.727060 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1219 00:57:41.730399 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1220 00:57:41.733742
1221 00:57:41.736881 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1222 00:57:41.740100 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1223 00:57:41.747058 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1224 00:57:41.749900 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1225 00:57:41.760153 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1226 00:57:41.763356 avoid_fixed_resources: DOMAIN: 0000
1227 00:57:41.769986 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1228 00:57:41.776768 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1229 00:57:41.783525 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1230 00:57:41.790219 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1231 00:57:41.800032 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1232 00:57:41.806364 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1233 00:57:41.813308 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1234 00:57:41.819654 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1235 00:57:41.823153
1236 00:57:41.829928 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1237 00:57:41.836774 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1238 00:57:41.842986 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1239 00:57:41.849395 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1240 00:57:41.852818
1241 00:57:41.852912 Setting resources...
1242 00:57:41.859655 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1243 00:57:41.862552 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1244 00:57:41.866429 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1245 00:57:41.872570 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1246 00:57:41.876016 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1247 00:57:41.882741 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1248 00:57:41.889496 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1249 00:57:41.895854 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1250 00:57:41.902178 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1251 00:57:41.905523 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1252 00:57:41.912241 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1253 00:57:41.915631 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1254 00:57:41.922515 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1255 00:57:41.925631 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1256 00:57:41.932330 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1257 00:57:41.935727 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1258 00:57:41.942049 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1259 00:57:41.945344 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1260 00:57:41.951849 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1261 00:57:41.955217 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1262 00:57:41.962132 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1263 00:57:41.965698 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1264 00:57:41.972370 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1265 00:57:41.975679 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1266 00:57:41.978432 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1267 00:57:41.985268 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1268 00:57:41.988785 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1269 00:57:41.995367 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1270 00:57:41.998881 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1271 00:57:42.005226 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1272 00:57:42.008463 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1273 00:57:42.014760 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1274 00:57:42.021956 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1275 00:57:42.028696 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1276 00:57:42.034880 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1277 00:57:42.044988 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1278 00:57:42.048425 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1279 00:57:42.054731 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1280 00:57:42.061156 Root Device assign_resources, bus 0 link: 0
1281 00:57:42.064428 DOMAIN: 0000 assign_resources, bus 0 link: 0
1282 00:57:42.074568 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1283 00:57:42.081265 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1284 00:57:42.091121 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1285 00:57:42.097639 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1286 00:57:42.107391 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1287 00:57:42.114109 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1288 00:57:42.120940 PCI: 00:14.0 assign_resources, bus 0 link: 0
1289 00:57:42.124276 PCI: 00:14.0 assign_resources, bus 0 link: 0
1290 00:57:42.131011 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1291 00:57:42.133805
1292 00:57:42.140613 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1293 00:57:42.147650 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1294 00:57:42.157272 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1295 00:57:42.160725 PCI: 00:15.0 assign_resources, bus 1 link: 0
1296 00:57:42.167431 PCI: 00:15.0 assign_resources, bus 1 link: 0
1297 00:57:42.174023 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1298 00:57:42.180302 PCI: 00:15.1 assign_resources, bus 2 link: 0
1299 00:57:42.183770 PCI: 00:15.1 assign_resources, bus 2 link: 0
1300 00:57:42.190409 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1301 00:57:42.193892
1302 00:57:42.200560 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1303 00:57:42.206678 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1304 00:57:42.216951 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1305 00:57:42.223673 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1306 00:57:42.229982 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1307 00:57:42.240144 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1308 00:57:42.246320 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1309 00:57:42.253185 PCI: 00:19.0 assign_resources, bus 3 link: 0
1310 00:57:42.256092 PCI: 00:19.0 assign_resources, bus 3 link: 0
1311 00:57:42.266476 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1312 00:57:42.273174 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1313 00:57:42.282642 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1314 00:57:42.286346 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1315 00:57:42.296193 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1316 00:57:42.298968 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1317 00:57:42.309178 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1318 00:57:42.315551 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1319 00:57:42.322281 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1320 00:57:42.325702 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1321 00:57:42.335396 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1322 00:57:42.338877 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1323 00:57:42.342193 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1324 00:57:42.348374 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1325 00:57:42.351829 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1326 00:57:42.358711 LPC: Trying to open IO window from 800 size 1ff
1327 00:57:42.365038 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1328 00:57:42.375196 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1329 00:57:42.381827 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1330 00:57:42.391516 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1331 00:57:42.394787 DOMAIN: 0000 assign_resources, bus 0 link: 0
1332 00:57:42.401288 Root Device assign_resources, bus 0 link: 0
1333 00:57:42.401387 Done setting resources.
1334 00:57:42.408142 Show resources in subtree (Root Device)...After assigning values.
1335 00:57:42.414475 Root Device child on link 0 CPU_CLUSTER: 0
1336 00:57:42.417814 CPU_CLUSTER: 0 child on link 0 APIC: 00
1337 00:57:42.417908 APIC: 00
1338 00:57:42.421667 APIC: 03
1339 00:57:42.421760 APIC: 01
1340 00:57:42.421834 APIC: 02
1341 00:57:42.425057 APIC: 04
1342 00:57:42.425150 APIC: 07
1343 00:57:42.427716 APIC: 06
1344 00:57:42.427810 APIC: 05
1345 00:57:42.431196 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1346 00:57:42.441329 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1347 00:57:42.454445 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1348 00:57:42.454541 PCI: 00:00.0
1349 00:57:42.464288 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1350 00:57:42.474014 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1351 00:57:42.484196 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1352 00:57:42.491012 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1353 00:57:42.500422 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1354 00:57:42.510678 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1355 00:57:42.520485 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1356 00:57:42.530140 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1357 00:57:42.540219 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1358 00:57:42.546895 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1359 00:57:42.556728 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1360 00:57:42.567053 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1361 00:57:42.576807 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1362 00:57:42.586539 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1363 00:57:42.596203 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1364 00:57:42.602861 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1365 00:57:42.606338
1366 00:57:42.606435 PCI: 00:02.0
1367 00:57:42.616179 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1368 00:57:42.626398 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1369 00:57:42.635900 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1370 00:57:42.639026 PCI: 00:04.0
1371 00:57:42.639123 PCI: 00:08.0
1372 00:57:42.649144 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1373 00:57:42.652514 PCI: 00:12.0
1374 00:57:42.662324 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1375 00:57:42.665808 PCI: 00:14.0 child on link 0 USB0 port 0
1376 00:57:42.675468 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1377 00:57:42.682281 USB0 port 0 child on link 0 USB2 port 0
1378 00:57:42.682377 USB2 port 0
1379 00:57:42.685347 USB2 port 1
1380 00:57:42.685443 USB2 port 2
1381 00:57:42.688755 USB2 port 3
1382 00:57:42.688851 USB2 port 5
1383 00:57:42.692251 USB2 port 6
1384 00:57:42.695537 USB2 port 9
1385 00:57:42.695633 USB3 port 0
1386 00:57:42.698760 USB3 port 1
1387 00:57:42.698856 USB3 port 2
1388 00:57:42.701906 USB3 port 3
1389 00:57:42.702002 USB3 port 4
1390 00:57:42.705415 PCI: 00:14.2
1391 00:57:42.714932 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1392 00:57:42.725397 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1393 00:57:42.725493 PCI: 00:14.3
1394 00:57:42.738099 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1395 00:57:42.742025 PCI: 00:15.0 child on link 0 I2C: 01:15
1396 00:57:42.751497 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1397 00:57:42.751598 I2C: 01:15
1398 00:57:42.758263 PCI: 00:15.1 child on link 0 I2C: 02:5d
1399 00:57:42.768085 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1400 00:57:42.768181 I2C: 02:5d
1401 00:57:42.771760 GENERIC: 0.0
1402 00:57:42.771855 PCI: 00:16.0
1403 00:57:42.781113 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1404 00:57:42.784387 PCI: 00:17.0
1405 00:57:42.794557 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1406 00:57:42.804150 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1407 00:57:42.814136 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1408 00:57:42.824332 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1409 00:57:42.830525 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1410 00:57:42.840294 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1411 00:57:42.844111
1412 00:57:42.847521 PCI: 00:19.0 child on link 0 I2C: 03:1a
1413 00:57:42.857016 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1414 00:57:42.857113 I2C: 03:1a
1415 00:57:42.860350 I2C: 03:38
1416 00:57:42.860446 I2C: 03:39
1417 00:57:42.863842 I2C: 03:3a
1418 00:57:42.863937 I2C: 03:3b
1419 00:57:42.870626 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1420 00:57:42.876846 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1421 00:57:42.886974 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1422 00:57:42.900281 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1423 00:57:42.900383 PCI: 01:00.0
1424 00:57:42.910243 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1425 00:57:42.913833 PCI: 00:1e.0
1426 00:57:42.923341 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1427 00:57:42.933109 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1428 00:57:42.936387 PCI: 00:1e.2 child on link 0 SPI: 00
1429 00:57:42.939945
1430 00:57:42.949438 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1431 00:57:42.949539 SPI: 00
1432 00:57:42.952826 PCI: 00:1e.3 child on link 0 SPI: 01
1433 00:57:42.962974 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1434 00:57:42.966364 SPI: 01
1435 00:57:42.969925 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1436 00:57:42.979619 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1437 00:57:42.985887 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1438 00:57:42.989156 PNP: 0c09.0
1439 00:57:42.999247 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1440 00:57:42.999344 PCI: 00:1f.3
1441 00:57:43.009127 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1442 00:57:43.019008 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1443 00:57:43.022422 PCI: 00:1f.4
1444 00:57:43.031958 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1445 00:57:43.042042 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1446 00:57:43.042139 PCI: 00:1f.5
1447 00:57:43.052261 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1448 00:57:43.055146 Done allocating resources.
1449 00:57:43.061958 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1450 00:57:43.065311 Enabling resources...
1451 00:57:43.068616 PCI: 00:00.0 subsystem <- 8086/9b61
1452 00:57:43.072107 PCI: 00:00.0 cmd <- 06
1453 00:57:43.074755 PCI: 00:02.0 subsystem <- 8086/9b41
1454 00:57:43.078517 PCI: 00:02.0 cmd <- 03
1455 00:57:43.078612 PCI: 00:08.0 cmd <- 06
1456 00:57:43.084813 PCI: 00:12.0 subsystem <- 8086/02f9
1457 00:57:43.084909 PCI: 00:12.0 cmd <- 02
1458 00:57:43.088720 PCI: 00:14.0 subsystem <- 8086/02ed
1459 00:57:43.091695 PCI: 00:14.0 cmd <- 02
1460 00:57:43.095179 PCI: 00:14.2 cmd <- 02
1461 00:57:43.098518 PCI: 00:14.3 subsystem <- 8086/02f0
1462 00:57:43.101332 PCI: 00:14.3 cmd <- 02
1463 00:57:43.104794 PCI: 00:15.0 subsystem <- 8086/02e8
1464 00:57:43.108076 PCI: 00:15.0 cmd <- 02
1465 00:57:43.111678 PCI: 00:15.1 subsystem <- 8086/02e9
1466 00:57:43.114978 PCI: 00:15.1 cmd <- 02
1467 00:57:43.117868 PCI: 00:16.0 subsystem <- 8086/02e0
1468 00:57:43.121362 PCI: 00:16.0 cmd <- 02
1469 00:57:43.124761 PCI: 00:17.0 subsystem <- 8086/02d3
1470 00:57:43.124857 PCI: 00:17.0 cmd <- 03
1471 00:57:43.131577 PCI: 00:19.0 subsystem <- 8086/02c5
1472 00:57:43.131673 PCI: 00:19.0 cmd <- 02
1473 00:57:43.134609 PCI: 00:1d.0 bridge ctrl <- 0013
1474 00:57:43.137831 PCI: 00:1d.0 subsystem <- 8086/02b0
1475 00:57:43.141396 PCI: 00:1d.0 cmd <- 06
1476 00:57:43.144533 PCI: 00:1e.0 subsystem <- 8086/02a8
1477 00:57:43.147891 PCI: 00:1e.0 cmd <- 06
1478 00:57:43.151236 PCI: 00:1e.2 subsystem <- 8086/02aa
1479 00:57:43.154676 PCI: 00:1e.2 cmd <- 06
1480 00:57:43.157884 PCI: 00:1e.3 subsystem <- 8086/02ab
1481 00:57:43.161344 PCI: 00:1e.3 cmd <- 02
1482 00:57:43.164771 PCI: 00:1f.0 subsystem <- 8086/0284
1483 00:57:43.168111 PCI: 00:1f.0 cmd <- 407
1484 00:57:43.171558 PCI: 00:1f.3 subsystem <- 8086/02c8
1485 00:57:43.174611 PCI: 00:1f.3 cmd <- 02
1486 00:57:43.177963 PCI: 00:1f.4 subsystem <- 8086/02a3
1487 00:57:43.181462 PCI: 00:1f.4 cmd <- 03
1488 00:57:43.184381 PCI: 00:1f.5 subsystem <- 8086/02a4
1489 00:57:43.184476 PCI: 00:1f.5 cmd <- 406
1490 00:57:43.195037 PCI: 01:00.0 cmd <- 02
1491 00:57:43.199887 done.
1492 00:57:43.212743 ME: Version: 14.0.39.1367
1493 00:57:43.219475 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1494 00:57:43.222888 Initializing devices...
1495 00:57:43.222981 Root Device init ...
1496 00:57:43.229130 Chrome EC: Set SMI mask to 0x0000000000000000
1497 00:57:43.232575 Chrome EC: clear events_b mask to 0x0000000000000000
1498 00:57:43.239374 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1499 00:57:43.245910 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1500 00:57:43.252689 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1501 00:57:43.255530 Chrome EC: Set WAKE mask to 0x0000000000000000
1502 00:57:43.258885 Root Device init finished in 35167 usecs
1503 00:57:43.262737 CPU_CLUSTER: 0 init ...
1504 00:57:43.266158 CPU_CLUSTER: 0 init finished in 2447 usecs
1505 00:57:43.268992
1506 00:57:43.273703 PCI: 00:00.0 init ...
1507 00:57:43.277124 CPU TDP: 15 Watts
1508 00:57:43.280214 CPU PL2 = 64 Watts
1509 00:57:43.283566 PCI: 00:00.0 init finished in 7080 usecs
1510 00:57:43.286914 PCI: 00:02.0 init ...
1511 00:57:43.290284 PCI: 00:02.0 init finished in 2253 usecs
1512 00:57:43.293745 PCI: 00:08.0 init ...
1513 00:57:43.296638 PCI: 00:08.0 init finished in 2253 usecs
1514 00:57:43.300126 PCI: 00:12.0 init ...
1515 00:57:43.302977 PCI: 00:12.0 init finished in 2251 usecs
1516 00:57:43.306333 PCI: 00:14.0 init ...
1517 00:57:43.309679 PCI: 00:14.0 init finished in 2251 usecs
1518 00:57:43.312719 PCI: 00:14.2 init ...
1519 00:57:43.316438 PCI: 00:14.2 init finished in 2243 usecs
1520 00:57:43.319578 PCI: 00:14.3 init ...
1521 00:57:43.323039 PCI: 00:14.3 init finished in 2272 usecs
1522 00:57:43.326469 PCI: 00:15.0 init ...
1523 00:57:43.329731 DW I2C bus 0 at 0xd121f000 (400 KHz)
1524 00:57:43.332653 PCI: 00:15.0 init finished in 5977 usecs
1525 00:57:43.336170 PCI: 00:15.1 init ...
1526 00:57:43.339513 DW I2C bus 1 at 0xd1220000 (400 KHz)
1527 00:57:43.342855 PCI: 00:15.1 init finished in 5977 usecs
1528 00:57:43.346251
1529 00:57:43.346347 PCI: 00:16.0 init ...
1530 00:57:43.352972 PCI: 00:16.0 init finished in 2252 usecs
1531 00:57:43.353067 PCI: 00:19.0 init ...
1532 00:57:43.356342
1533 00:57:43.359682 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 00:57:43.362942 PCI: 00:19.0 init finished in 5977 usecs
1535 00:57:43.365856 PCI: 00:1d.0 init ...
1536 00:57:43.369358 Initializing PCH PCIe bridge.
1537 00:57:43.372827 PCI: 00:1d.0 init finished in 5283 usecs
1538 00:57:43.375650 PCI: 00:1f.0 init ...
1539 00:57:43.379209 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 00:57:43.385531 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 00:57:43.385626 IOAPIC: ID = 0x02
1542 00:57:43.389455 IOAPIC: Dumping registers
1543 00:57:43.392279 reg 0x0000: 0x02000000
1544 00:57:43.395767 reg 0x0001: 0x00770020
1545 00:57:43.395862 reg 0x0002: 0x00000000
1546 00:57:43.402247 PCI: 00:1f.0 init finished in 23538 usecs
1547 00:57:43.405571 PCI: 00:1f.4 init ...
1548 00:57:43.408908 PCI: 00:1f.4 init finished in 2261 usecs
1549 00:57:43.419573 PCI: 01:00.0 init ...
1550 00:57:43.422864 PCI: 01:00.0 init finished in 2244 usecs
1551 00:57:43.426888 PNP: 0c09.0 init ...
1552 00:57:43.430860 Google Chrome EC uptime: 11.068 seconds
1553 00:57:43.436954 Google Chrome AP resets since EC boot: 0
1554 00:57:43.440370 Google Chrome most recent AP reset causes:
1555 00:57:43.447142 Google Chrome EC reset flags at last EC boot: reset-pin
1556 00:57:43.450327 PNP: 0c09.0 init finished in 20567 usecs
1557 00:57:43.453787 Devices initialized
1558 00:57:43.453882 Show all devs... After init.
1559 00:57:43.456896
1560 00:57:43.456991 Root Device: enabled 1
1561 00:57:43.460224 CPU_CLUSTER: 0: enabled 1
1562 00:57:43.463653 DOMAIN: 0000: enabled 1
1563 00:57:43.463748 APIC: 00: enabled 1
1564 00:57:43.467103 PCI: 00:00.0: enabled 1
1565 00:57:43.469961 PCI: 00:02.0: enabled 1
1566 00:57:43.473553 PCI: 00:04.0: enabled 0
1567 00:57:43.473648 PCI: 00:05.0: enabled 0
1568 00:57:43.476900 PCI: 00:12.0: enabled 1
1569 00:57:43.479943 PCI: 00:12.5: enabled 0
1570 00:57:43.483229 PCI: 00:12.6: enabled 0
1571 00:57:43.483324 PCI: 00:14.0: enabled 1
1572 00:57:43.486660 PCI: 00:14.1: enabled 0
1573 00:57:43.489547 PCI: 00:14.3: enabled 1
1574 00:57:43.489642 PCI: 00:14.5: enabled 0
1575 00:57:43.493370 PCI: 00:15.0: enabled 1
1576 00:57:43.496438 PCI: 00:15.1: enabled 1
1577 00:57:43.500087 PCI: 00:15.2: enabled 0
1578 00:57:43.500183 PCI: 00:15.3: enabled 0
1579 00:57:43.502838 PCI: 00:16.0: enabled 1
1580 00:57:43.506356 PCI: 00:16.1: enabled 0
1581 00:57:43.509675 PCI: 00:16.2: enabled 0
1582 00:57:43.509772 PCI: 00:16.3: enabled 0
1583 00:57:43.512988 PCI: 00:16.4: enabled 0
1584 00:57:43.516514 PCI: 00:16.5: enabled 0
1585 00:57:43.519591 PCI: 00:17.0: enabled 1
1586 00:57:43.519686 PCI: 00:19.0: enabled 1
1587 00:57:43.522882 PCI: 00:19.1: enabled 0
1588 00:57:43.526332 PCI: 00:19.2: enabled 0
1589 00:57:43.526427 PCI: 00:1a.0: enabled 0
1590 00:57:43.529960
1591 00:57:43.530057 PCI: 00:1c.0: enabled 0
1592 00:57:43.532712 PCI: 00:1c.1: enabled 0
1593 00:57:43.536199 PCI: 00:1c.2: enabled 0
1594 00:57:43.536294 PCI: 00:1c.3: enabled 0
1595 00:57:43.539529 PCI: 00:1c.4: enabled 0
1596 00:57:43.542991 PCI: 00:1c.5: enabled 0
1597 00:57:43.546305 PCI: 00:1c.6: enabled 0
1598 00:57:43.546401 PCI: 00:1c.7: enabled 0
1599 00:57:43.549227 PCI: 00:1d.0: enabled 1
1600 00:57:43.552951 PCI: 00:1d.1: enabled 0
1601 00:57:43.555884 PCI: 00:1d.2: enabled 0
1602 00:57:43.555979 PCI: 00:1d.3: enabled 0
1603 00:57:43.559263 PCI: 00:1d.4: enabled 0
1604 00:57:43.562713 PCI: 00:1d.5: enabled 0
1605 00:57:43.562816 PCI: 00:1e.0: enabled 1
1606 00:57:43.565997
1607 00:57:43.566094 PCI: 00:1e.1: enabled 0
1608 00:57:43.569311 PCI: 00:1e.2: enabled 1
1609 00:57:43.572736 PCI: 00:1e.3: enabled 1
1610 00:57:43.572833 PCI: 00:1f.0: enabled 1
1611 00:57:43.576094 PCI: 00:1f.1: enabled 0
1612 00:57:43.579006 PCI: 00:1f.2: enabled 0
1613 00:57:43.582573 PCI: 00:1f.3: enabled 1
1614 00:57:43.582669 PCI: 00:1f.4: enabled 1
1615 00:57:43.585949 PCI: 00:1f.5: enabled 1
1616 00:57:43.589391 PCI: 00:1f.6: enabled 0
1617 00:57:43.592268 USB0 port 0: enabled 1
1618 00:57:43.592363 I2C: 01:15: enabled 1
1619 00:57:43.595618 I2C: 02:5d: enabled 1
1620 00:57:43.599002 GENERIC: 0.0: enabled 1
1621 00:57:43.599099 I2C: 03:1a: enabled 1
1622 00:57:43.602206 I2C: 03:38: enabled 1
1623 00:57:43.605758 I2C: 03:39: enabled 1
1624 00:57:43.605854 I2C: 03:3a: enabled 1
1625 00:57:43.609050 I2C: 03:3b: enabled 1
1626 00:57:43.611896 PCI: 00:00.0: enabled 1
1627 00:57:43.612004 SPI: 00: enabled 1
1628 00:57:43.615395 SPI: 01: enabled 1
1629 00:57:43.618675 PNP: 0c09.0: enabled 1
1630 00:57:43.618779 USB2 port 0: enabled 1
1631 00:57:43.622215 USB2 port 1: enabled 1
1632 00:57:43.625415 USB2 port 2: enabled 0
1633 00:57:43.628834 USB2 port 3: enabled 0
1634 00:57:43.628931 USB2 port 5: enabled 0
1635 00:57:43.632273 USB2 port 6: enabled 1
1636 00:57:43.635639 USB2 port 9: enabled 1
1637 00:57:43.635734 USB3 port 0: enabled 1
1638 00:57:43.638342 USB3 port 1: enabled 1
1639 00:57:43.641729 USB3 port 2: enabled 1
1640 00:57:43.641825 USB3 port 3: enabled 1
1641 00:57:43.645200 USB3 port 4: enabled 0
1642 00:57:43.648642 APIC: 03: enabled 1
1643 00:57:43.648747 APIC: 01: enabled 1
1644 00:57:43.652133 APIC: 02: enabled 1
1645 00:57:43.655422 APIC: 04: enabled 1
1646 00:57:43.655518 APIC: 07: enabled 1
1647 00:57:43.658671 APIC: 06: enabled 1
1648 00:57:43.658775 APIC: 05: enabled 1
1649 00:57:43.662133
1650 00:57:43.662230 PCI: 00:08.0: enabled 1
1651 00:57:43.665014 PCI: 00:14.2: enabled 1
1652 00:57:43.668365 PCI: 01:00.0: enabled 1
1653 00:57:43.671896 Disabling ACPI via APMC:
1654 00:57:43.671992 done.
1655 00:57:43.675313
1656 00:57:43.678588 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 00:57:43.682068 ELOG: NV offset 0xaf0000 size 0x4000
1658 00:57:43.688380 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 00:57:43.695613 ELOG: Event(17) added with size 13 at 2022-12-10 00:57:43 UTC
1660 00:57:43.702199 ELOG: Event(92) added with size 9 at 2022-12-10 00:57:43 UTC
1661 00:57:43.708538 ELOG: Event(93) added with size 9 at 2022-12-10 00:57:43 UTC
1662 00:57:43.715257 ELOG: Event(9A) added with size 9 at 2022-12-10 00:57:43 UTC
1663 00:57:43.721922 ELOG: Event(9E) added with size 10 at 2022-12-10 00:57:43 UTC
1664 00:57:43.728082 ELOG: Event(9F) added with size 14 at 2022-12-10 00:57:43 UTC
1665 00:57:43.731435 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1666 00:57:43.738959 ELOG: Event(A1) added with size 10 at 2022-12-10 00:57:43 UTC
1667 00:57:43.748805 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 00:57:43.755429 ELOG: Event(A0) added with size 9 at 2022-12-10 00:57:43 UTC
1669 00:57:43.758878 elog_add_boot_reason: Logged dev mode boot
1670 00:57:43.762209 Finalize devices...
1671 00:57:43.762305 PCI: 00:17.0 final
1672 00:57:43.765544 Devices finalized
1673 00:57:43.768546 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 00:57:43.775494 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 00:57:43.778676 ME: HFSTS1 : 0x90000245
1676 00:57:43.781648 ME: HFSTS2 : 0x3B850126
1677 00:57:43.788496 ME: HFSTS3 : 0x00000020
1678 00:57:43.791884 ME: HFSTS4 : 0x00004800
1679 00:57:43.795345 ME: HFSTS5 : 0x00000000
1680 00:57:43.798658 ME: HFSTS6 : 0x40400006
1681 00:57:43.801503 ME: Manufacturing Mode : NO
1682 00:57:43.804825 ME: FW Partition Table : OK
1683 00:57:43.808651 ME: Bringup Loader Failure : NO
1684 00:57:43.811413 ME: Firmware Init Complete : YES
1685 00:57:43.814707 ME: Boot Options Present : NO
1686 00:57:43.818194 ME: Update In Progress : NO
1687 00:57:43.821685 ME: D0i3 Support : YES
1688 00:57:43.825471 ME: Low Power State Enabled : NO
1689 00:57:43.828200 ME: CPU Replaced : NO
1690 00:57:43.831706 ME: CPU Replacement Valid : YES
1691 00:57:43.834494 ME: Current Working State : 5
1692 00:57:43.838101 ME: Current Operation State : 1
1693 00:57:43.841156 ME: Current Operation Mode : 0
1694 00:57:43.844727 ME: Error Code : 0
1695 00:57:43.848136 ME: CPU Debug Disabled : YES
1696 00:57:43.851303 ME: TXT Support : NO
1697 00:57:43.858088 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 00:57:43.864763 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 00:57:43.864860 CBFS @ c08000 size 3f8000
1700 00:57:43.870966 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 00:57:43.874421 CBFS: Locating 'fallback/dsdt.aml'
1702 00:57:43.877720 CBFS: Found @ offset 10bb80 size 3fa5
1703 00:57:43.884210 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 00:57:43.887586 CBFS @ c08000 size 3f8000
1705 00:57:43.894027 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 00:57:43.894125 CBFS: Locating 'fallback/slic'
1707 00:57:43.899615 CBFS: 'fallback/slic' not found.
1708 00:57:43.906283 ACPI: Writing ACPI tables at 99b3e000.
1709 00:57:43.906380 ACPI: * FACS
1710 00:57:43.909591 ACPI: * DSDT
1711 00:57:43.912939 Ramoops buffer: 0x100000@0x99a3d000.
1712 00:57:43.916213 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 00:57:43.923078 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 00:57:43.926014 Google Chrome EC: version:
1715 00:57:43.929222 ro: helios_v2.0.2659-56403530b
1716 00:57:43.932727 rw: helios_v2.0.2849-c41de27e7d
1717 00:57:43.932824 running image: 1
1718 00:57:43.936699 ACPI: * FADT
1719 00:57:43.936796 SCI is IRQ9
1720 00:57:43.940042 ACPI: added table 1/32, length now 40
1721 00:57:43.943258
1722 00:57:43.943355 ACPI: * SSDT
1723 00:57:43.946904 Found 1 CPU(s) with 8 core(s) each.
1724 00:57:43.950273 Error: Could not locate 'wifi_sar' in VPD.
1725 00:57:43.956915 Checking CBFS for default SAR values
1726 00:57:43.960295 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 00:57:43.963119 CBFS @ c08000 size 3f8000
1728 00:57:43.969893 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 00:57:43.973339 CBFS: Locating 'wifi_sar_defaults.hex'
1730 00:57:43.976631 CBFS: Found @ offset 5fac0 size 77
1731 00:57:43.980194 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1732 00:57:43.983616 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1733 00:57:43.986682
1734 00:57:43.989707 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1735 00:57:43.996574 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1736 00:57:44.000061 failed to find key in VPD: dsm_calib_r0_0
1737 00:57:44.009441 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1738 00:57:44.012804 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1739 00:57:44.016209 failed to find key in VPD: dsm_calib_r0_1
1740 00:57:44.026174 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1741 00:57:44.033024 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1742 00:57:44.035917 failed to find key in VPD: dsm_calib_r0_2
1743 00:57:44.046146 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1744 00:57:44.049586 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1745 00:57:44.055893 failed to find key in VPD: dsm_calib_r0_3
1746 00:57:44.062283 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1747 00:57:44.069120 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1748 00:57:44.072841 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1749 00:57:44.075613 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1750 00:57:44.079520 EC returned error result code 1
1751 00:57:44.082884
1752 00:57:44.086391 EC returned error result code 1
1753 00:57:44.089824 EC returned error result code 1
1754 00:57:44.092732 PS2K: Bad resp from EC. Vivaldi disabled!
1755 00:57:44.099437 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1756 00:57:44.106226 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1757 00:57:44.109159 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1758 00:57:44.115862 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1759 00:57:44.119340 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1760 00:57:44.125834 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1761 00:57:44.132445 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1762 00:57:44.138788 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1763 00:57:44.142187 ACPI: added table 2/32, length now 44
1764 00:57:44.142283 ACPI: * MCFG
1765 00:57:44.145569 ACPI: added table 3/32, length now 48
1766 00:57:44.148946
1767 00:57:44.149041 ACPI: * TPM2
1768 00:57:44.152488 TPM2 log created at 99a2d000
1769 00:57:44.155300 ACPI: added table 4/32, length now 52
1770 00:57:44.158722 ACPI: * MADT
1771 00:57:44.158822 SCI is IRQ9
1772 00:57:44.161941 ACPI: added table 5/32, length now 56
1773 00:57:44.165433 current = 99b43ac0
1774 00:57:44.165527 ACPI: * DMAR
1775 00:57:44.168750 ACPI: added table 6/32, length now 60
1776 00:57:44.172383 ACPI: * IGD OpRegion
1777 00:57:44.175142 GMA: Found VBT in CBFS
1778 00:57:44.178536 GMA: Found valid VBT in CBFS
1779 00:57:44.181914 ACPI: added table 7/32, length now 64
1780 00:57:44.182010 ACPI: * HPET
1781 00:57:44.185312 ACPI: added table 8/32, length now 68
1782 00:57:44.188205 ACPI: done.
1783 00:57:44.191823 ACPI tables: 31744 bytes.
1784 00:57:44.195165 smbios_write_tables: 99a2c000
1785 00:57:44.198542 EC returned error result code 3
1786 00:57:44.201478 Couldn't obtain OEM name from CBI
1787 00:57:44.204702 Create SMBIOS type 17
1788 00:57:44.208226 PCI: 00:00.0 (Intel Cannonlake)
1789 00:57:44.208328 PCI: 00:14.3 (Intel WiFi)
1790 00:57:44.211606 SMBIOS tables: 939 bytes.
1791 00:57:44.215113 Writing table forward entry at 0x00000500
1792 00:57:44.221385 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 00:57:44.224856 Writing coreboot table at 0x99b62000
1794 00:57:44.231658 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 00:57:44.234877 1. 0000000000001000-000000000009ffff: RAM
1796 00:57:44.241128 2. 00000000000a0000-00000000000fffff: RESERVED
1797 00:57:44.244579 3. 0000000000100000-0000000099a2bfff: RAM
1798 00:57:44.251378 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 00:57:44.254892 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 00:57:44.260919 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 00:57:44.267765 7. 000000009a000000-000000009f7fffff: RESERVED
1802 00:57:44.270971 8. 00000000e0000000-00000000efffffff: RESERVED
1803 00:57:44.274410 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 00:57:44.277392
1805 00:57:44.280811 10. 00000000fe000000-00000000fe00ffff: RESERVED
1806 00:57:44.284616 11. 00000000fed10000-00000000fed17fff: RESERVED
1807 00:57:44.290928 12. 00000000fed80000-00000000fed83fff: RESERVED
1808 00:57:44.294406 13. 00000000fed90000-00000000fed91fff: RESERVED
1809 00:57:44.301168 14. 00000000feda0000-00000000feda1fff: RESERVED
1810 00:57:44.304011 15. 0000000100000000-000000045e7fffff: RAM
1811 00:57:44.307468 Graphics framebuffer located at 0xc0000000
1812 00:57:44.310966 Passing 5 GPIOs to payload:
1813 00:57:44.317219 NAME | PORT | POLARITY | VALUE
1814 00:57:44.320734 write protect | undefined | high | low
1815 00:57:44.327459 lid | undefined | high | high
1816 00:57:44.333632 power | undefined | high | low
1817 00:57:44.337409 oprom | undefined | high | low
1818 00:57:44.343601 EC in RW | 0x000000cb | high | low
1819 00:57:44.343697 Board ID: 4
1820 00:57:44.350311 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1821 00:57:44.350405 CBFS @ c08000 size 3f8000
1822 00:57:44.356894 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1823 00:57:44.363419 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1824 00:57:44.367250 coreboot table: 1492 bytes.
1825 00:57:44.370116 IMD ROOT 0. 99fff000 00001000
1826 00:57:44.373611 IMD SMALL 1. 99ffe000 00001000
1827 00:57:44.376862 FSP MEMORY 2. 99c4e000 003b0000
1828 00:57:44.380210 CONSOLE 3. 99c2e000 00020000
1829 00:57:44.383581 FMAP 4. 99c2d000 0000054e
1830 00:57:44.387056 TIME STAMP 5. 99c2c000 00000910
1831 00:57:44.390063 VBOOT WORK 6. 99c18000 00014000
1832 00:57:44.393303 MRC DATA 7. 99c16000 00001958
1833 00:57:44.396703 ROMSTG STCK 8. 99c15000 00001000
1834 00:57:44.399927 AFTER CAR 9. 99c0b000 0000a000
1835 00:57:44.403382 RAMSTAGE 10. 99baf000 0005c000
1836 00:57:44.406796 REFCODE 11. 99b7a000 00035000
1837 00:57:44.410161 SMM BACKUP 12. 99b6a000 00010000
1838 00:57:44.413533 COREBOOT 13. 99b62000 00008000
1839 00:57:44.416929 ACPI 14. 99b3e000 00024000
1840 00:57:44.419998 ACPI GNVS 15. 99b3d000 00001000
1841 00:57:44.423472 RAMOOPS 16. 99a3d000 00100000
1842 00:57:44.426427 TPM2 TCGLOG17. 99a2d000 00010000
1843 00:57:44.429783 SMBIOS 18. 99a2c000 00000800
1844 00:57:44.429878 IMD small region:
1845 00:57:44.433119
1846 00:57:44.436417 IMD ROOT 0. 99ffec00 00000400
1847 00:57:44.439669 FSP RUNTIME 1. 99ffebe0 00000004
1848 00:57:44.443086 EC HOSTEVENT 2. 99ffebc0 00000008
1849 00:57:44.446411 POWER STATE 3. 99ffeb80 00000040
1850 00:57:44.450007 ROMSTAGE 4. 99ffeb60 00000004
1851 00:57:44.452756 MEM INFO 5. 99ffe9a0 000001b9
1852 00:57:44.456482 VPD 6. 99ffe920 0000006c
1853 00:57:44.459497 MTRR: Physical address space:
1854 00:57:44.466223 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1855 00:57:44.472814 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1856 00:57:44.479555 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1857 00:57:44.483017 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1858 00:57:44.489719 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1859 00:57:44.496076 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1860 00:57:44.502392 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1861 00:57:44.506237 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 00:57:44.512246 MTRR: Fixed MSR 0x258 0x0606060606060606
1863 00:57:44.515724 MTRR: Fixed MSR 0x259 0x0000000000000000
1864 00:57:44.519162 MTRR: Fixed MSR 0x268 0x0606060606060606
1865 00:57:44.522385 MTRR: Fixed MSR 0x269 0x0606060606060606
1866 00:57:44.525570 MTRR: Fixed MSR 0x26a 0x0606060606060606
1867 00:57:44.528978
1868 00:57:44.532327 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 00:57:44.535658 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 00:57:44.539093 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 00:57:44.542435 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 00:57:44.548602 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 00:57:44.552076 call enable_fixed_mtrr()
1874 00:57:44.555378 CPU physical address size: 39 bits
1875 00:57:44.558942 MTRR: default type WB/UC MTRR counts: 6/8.
1876 00:57:44.561839 MTRR: WB selected as default type.
1877 00:57:44.568473 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 00:57:44.575258 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 00:57:44.581961 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 00:57:44.588652 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 00:57:44.594849 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 00:57:44.598411 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 00:57:44.605843 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 00:57:44.609329 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 00:57:44.612093 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 00:57:44.615613 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 00:57:44.622166 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 00:57:44.625538 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 00:57:44.628699 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 00:57:44.632160 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 00:57:44.638953 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 00:57:44.641770 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 00:57:44.645074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 00:57:44.645168
1895 00:57:44.648691 MTRR check
1896 00:57:44.648785 Fixed MTRRs : Enabled
1897 00:57:44.651905 Variable MTRRs: Enabled
1898 00:57:44.651999
1899 00:57:44.655363 call enable_fixed_mtrr()
1900 00:57:44.661777 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 00:57:44.664979 CPU physical address size: 39 bits
1902 00:57:44.668488 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 00:57:44.671262 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 00:57:44.675149
1905 00:57:44.677972 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 00:57:44.681296 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 00:57:44.684762 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 00:57:44.688206 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 00:57:44.694852 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 00:57:44.697790 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 00:57:44.701260 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 00:57:44.704637 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 00:57:44.711434 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 00:57:44.714383 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 00:57:44.717709 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 00:57:44.721129 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 00:57:44.724369 call enable_fixed_mtrr()
1918 00:57:44.727448 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 00:57:44.734353 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 00:57:44.737550 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 00:57:44.740985 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 00:57:44.743862 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 00:57:44.750696 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 00:57:44.754282 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 00:57:44.757085 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 00:57:44.760500 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 00:57:44.763912 CPU physical address size: 39 bits
1928 00:57:44.767351
1929 00:57:44.767448 call enable_fixed_mtrr()
1930 00:57:44.774132 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 00:57:44.776960 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 00:57:44.780269 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 00:57:44.783567 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 00:57:44.790195 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 00:57:44.793457 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 00:57:44.797461 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 00:57:44.800114 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 00:57:44.806900 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 00:57:44.809963 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 00:57:44.813143 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 00:57:44.816727 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 00:57:44.820161 call enable_fixed_mtrr()
1943 00:57:44.823653 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 00:57:44.830231 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 00:57:44.833447 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 00:57:44.836830 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 00:57:44.840142 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 00:57:44.843025 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 00:57:44.846354
1950 00:57:44.849694 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 00:57:44.853293 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 00:57:44.856529 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 00:57:44.859810 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 00:57:44.866221 CPU physical address size: 39 bits
1955 00:57:44.866319 call enable_fixed_mtrr()
1956 00:57:44.869626
1957 00:57:44.872876 CPU physical address size: 39 bits
1958 00:57:44.876132 CPU physical address size: 39 bits
1959 00:57:44.879505 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 00:57:44.882948 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 00:57:44.886106 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 00:57:44.892451 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 00:57:44.895717 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 00:57:44.899041 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 00:57:44.902654 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 00:57:44.905968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 00:57:44.909410
1968 00:57:44.912355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 00:57:44.915952 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 00:57:44.919340 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 00:57:44.922158 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 00:57:44.928835 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 00:57:44.932155 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 00:57:44.935636 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 00:57:44.939038 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 00:57:44.945348 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 00:57:44.948866 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 00:57:44.952008 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 00:57:44.955439 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 00:57:44.962301 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 00:57:44.965109 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 00:57:44.968488 call enable_fixed_mtrr()
1983 00:57:44.971835 call enable_fixed_mtrr()
1984 00:57:44.975214 CPU physical address size: 39 bits
1985 00:57:44.978644 CPU physical address size: 39 bits
1986 00:57:44.982097 CBFS @ c08000 size 3f8000
1987 00:57:44.985345 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1988 00:57:44.988634 CBFS: Locating 'fallback/payload'
1989 00:57:44.995362 CBFS: Found @ offset 1c96c0 size 3f798
1990 00:57:44.998682 Checking segment from ROM address 0xffdd16f8
1991 00:57:45.002230 Checking segment from ROM address 0xffdd1714
1992 00:57:45.008978 Loading segment from ROM address 0xffdd16f8
1993 00:57:45.009077 code (compression=0)
1994 00:57:45.018560 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1995 00:57:45.028395 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1996 00:57:45.028491 it's not compressed!
1997 00:57:45.121435 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1998 00:57:45.128221 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1999 00:57:45.131354 Loading segment from ROM address 0xffdd1714
2000 00:57:45.135112 Entry Point 0x30000000
2001 00:57:45.137966 Loaded segments
2002 00:57:45.143616 Finalizing chipset.
2003 00:57:45.146979 Finalizing SMM.
2004 00:57:45.150303 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2005 00:57:45.153655 mp_park_aps done after 0 msecs.
2006 00:57:45.159887 Jumping to boot code at 30000000(99b62000)
2007 00:57:45.166683 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2008 00:57:45.166812
2009 00:57:45.166888
2010 00:57:45.166957
2011 00:57:45.170251 Starting depthcharge on Helios...
2012 00:57:45.170344
2013 00:57:45.170719 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2014 00:57:45.170870 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2015 00:57:45.170965 Setting prompt string to ['hatch:']
2016 00:57:45.171050 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2017 00:57:45.179822 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2018 00:57:45.179917
2019 00:57:45.186447 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2020 00:57:45.186541
2021 00:57:45.193123 board_setup: Info: eMMC controller not present; skipping
2022 00:57:45.193217
2023 00:57:45.196713 New NVMe Controller 0x30053ac0 @ 00:1d:00
2024 00:57:45.196808
2025 00:57:45.202707 board_setup: Info: SDHCI controller not present; skipping
2026 00:57:45.202824
2027 00:57:45.209587 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2028 00:57:45.209684
2029 00:57:45.209759 Wipe memory regions:
2030 00:57:45.209829
2031 00:57:45.212947 [0x00000000001000, 0x000000000a0000)
2032 00:57:45.213043
2033 00:57:45.219527 [0x00000000100000, 0x00000030000000)
2034 00:57:45.219624
2035 00:57:45.285950 [0x00000030657430, 0x00000099a2c000)
2036 00:57:45.286054
2037 00:57:45.435892 [0x00000100000000, 0x0000045e800000)
2038 00:57:45.436019
2039 00:57:46.891569 R8152: Initializing
2040 00:57:46.891732
2041 00:57:46.894292 Version 9 (ocp_data = 6010)
2042 00:57:46.894378
2043 00:57:46.899028 R8152: Done initializing
2044 00:57:46.899123
2045 00:57:46.902369 Adding net device
2046 00:57:46.902463
2047 00:57:47.384693 R8152: Initializing
2048 00:57:47.384891
2049 00:57:47.388029 Version 6 (ocp_data = 5c30)
2050 00:57:47.388122
2051 00:57:47.391431 R8152: Done initializing
2052 00:57:47.391524
2053 00:57:47.398136 net_add_device: Attemp to include the same device
2054 00:57:47.398230
2055 00:57:47.404991 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2056 00:57:47.405087
2057 00:57:47.405159
2058 00:57:47.405227
2059 00:57:47.405520 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2061 00:57:47.506306 hatch: tftpboot 192.168.201.1 8314794/tftp-deploy-sxkxlygn/kernel/bzImage 8314794/tftp-deploy-sxkxlygn/kernel/cmdline 8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
2062 00:57:47.506456 Setting prompt string to 'Starting kernel'
2063 00:57:47.506594 Setting prompt string to ['Starting kernel']
2064 00:57:47.506668 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2065 00:57:47.506791 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2066 00:57:47.511085 tftpboot 192.168.201.1 8314794/tftp-deploy-sxkxlygn/kernel/bzImagoy-sxkxlygn/kernel/cmdline 8314794/tftp-deploy-sxkxlygn/ramdisk/ramdisk.cpio.gz
2067 00:57:47.511185
2068 00:57:47.511260 Waiting for link
2069 00:57:47.511327
2070 00:57:47.711771 done.
2071 00:57:47.711920
2072 00:57:47.711995 MAC: 00:24:32:50:1a:59
2073 00:57:47.712065
2074 00:57:47.715202 Sending DHCP discover... done.
2075 00:57:47.715296
2076 00:57:47.718075 Waiting for reply... done.
2077 00:57:47.718185
2078 00:57:47.721244 Sending DHCP request... done.
2079 00:57:47.721337
2080 00:57:47.727730 Waiting for reply... done.
2081 00:57:47.727823
2082 00:57:47.727897 My ip is 192.168.201.14
2083 00:57:47.727965
2084 00:57:47.731163 The DHCP server ip is 192.168.201.1
2085 00:57:47.731256
2086 00:57:47.737873 TFTP server IP predefined by user: 192.168.201.1
2087 00:57:47.737967
2088 00:57:47.744733 Bootfile predefined by user: 8314794/tftp-deploy-sxkxlygn/kernel/bzImage
2089 00:57:47.744843
2090 00:57:47.747654 Sending tftp read request... done.
2091 00:57:47.747778
2092 00:57:47.750731 Waiting for the transfer...
2093 00:57:47.750877
2094 00:57:48.414054 00000000 ################################################################
2095 00:57:48.414349
2096 00:57:49.037521 00080000 ################################################################
2097 00:57:49.037683
2098 00:57:49.651740 00100000 ################################################################
2099 00:57:49.651928
2100 00:57:50.334528 00180000 ################################################################
2101 00:57:50.335143
2102 00:57:51.023771 00200000 ################################################################
2103 00:57:51.024306
2104 00:57:51.709048 00280000 ################################################################
2105 00:57:51.709590
2106 00:57:52.406538 00300000 ################################################################
2107 00:57:52.407138
2108 00:57:53.115270 00380000 ################################################################
2109 00:57:53.115817
2110 00:57:53.787254 00400000 ################################################################
2111 00:57:53.787805
2112 00:57:54.502315 00480000 ################################################################
2113 00:57:54.503061
2114 00:57:55.213438 00500000 ################################################################
2115 00:57:55.214033
2116 00:57:55.914430 00580000 ################################################################
2117 00:57:55.915034
2118 00:57:56.638211 00600000 ################################################################
2119 00:57:56.638897
2120 00:57:57.333708 00680000 ################################################################
2121 00:57:57.334271
2122 00:57:58.043417 00700000 ################################################################
2123 00:57:58.044101
2124 00:57:58.757269 00780000 ################################################################
2125 00:57:58.757826
2126 00:57:59.454098 00800000 ################################################################
2127 00:57:59.454674
2128 00:58:00.007714 00880000 #################################################### done.
2129 00:58:00.008277
2130 00:58:00.010962 The bootfile was 9330688 bytes long.
2131 00:58:00.011454
2132 00:58:00.014389 Sending tftp read request... done.
2133 00:58:00.014833
2134 00:58:00.017774 Waiting for the transfer...
2135 00:58:00.018216
2136 00:58:00.631715 00000000 ################################################################
2137 00:58:00.631877
2138 00:58:01.220282 00080000 ################################################################
2139 00:58:01.220444
2140 00:58:01.802216 00100000 ################################################################
2141 00:58:01.802366
2142 00:58:02.425119 00180000 ################################################################
2143 00:58:02.425635
2144 00:58:03.062866 00200000 ################################################################
2145 00:58:03.063020
2146 00:58:03.647677 00280000 ################################################################
2147 00:58:03.647831
2148 00:58:04.228230 00300000 ################################################################
2149 00:58:04.228377
2150 00:58:04.780085 00380000 ################################################################
2151 00:58:04.780236
2152 00:58:05.356997 00400000 ################################################################
2153 00:58:05.357144
2154 00:58:05.956842 00480000 ################################################################
2155 00:58:05.956997
2156 00:58:06.554814 00500000 ################################################################
2157 00:58:06.554977
2158 00:58:07.133060 00580000 ################################################################
2159 00:58:07.133211
2160 00:58:07.733724 00600000 ################################################################
2161 00:58:07.733886
2162 00:58:08.340550 00680000 ################################################################
2163 00:58:08.340738
2164 00:58:08.914764 00700000 ################################################################
2165 00:58:08.914928
2166 00:58:09.491977 00780000 ################################################################
2167 00:58:09.492132
2168 00:58:09.690607 00800000 ####################### done.
2169 00:58:09.693813
2170 00:58:09.696591 Sending tftp read request... done.
2171 00:58:09.696690
2172 00:58:09.696766 Waiting for the transfer...
2173 00:58:09.696839
2174 00:58:09.699931 00000000 # done.
2175 00:58:09.700030
2176 00:58:09.710234 Command line loaded dynamically from TFTP file: 8314794/tftp-deploy-sxkxlygn/kernel/cmdline
2177 00:58:09.710332
2178 00:58:09.726565 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2179 00:58:09.726666
2180 00:58:09.733532 ec_init(0): CrosEC protocol v3 supported (256, 256)
2181 00:58:09.733631
2182 00:58:09.740583 Shutting down all USB controllers.
2183 00:58:09.740681
2184 00:58:09.740757 Removing current net device
2185 00:58:09.740827
2186 00:58:09.744708 Finalizing coreboot
2187 00:58:09.744817
2188 00:58:09.751107 Exiting depthcharge with code 4 at timestamp: 31943342
2189 00:58:09.751205
2190 00:58:09.751282
2191 00:58:09.751352 Starting kernel ...
2192 00:58:09.751420
2193 00:58:09.751486
2194 00:58:09.751551
2195 00:58:09.751954 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2196 00:58:09.752063 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2197 00:58:09.752151 Setting prompt string to ['Linux version [0-9]']
2198 00:58:09.752231 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2199 00:58:09.752310 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2201 01:02:26.753091 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2203 01:02:26.754234 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2205 01:02:26.755162 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2208 01:02:26.756670 end: 2 depthcharge-action (duration 00:05:00) [common]
2210 01:02:26.757929 Cleaning after the job
2211 01:02:26.758389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/ramdisk
2212 01:02:26.761618 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/kernel
2213 01:02:26.765169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8314794/tftp-deploy-sxkxlygn/modules
2214 01:02:26.766444 start: 5.1 power-off (timeout 00:00:30) [common]
2215 01:02:26.767406 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2216 01:02:26.795056 >> Command sent successfully.
2217 01:02:26.797288 Returned 0 in 0 seconds
2218 01:02:26.898443 end: 5.1 power-off (duration 00:00:00) [common]
2220 01:02:26.900249 start: 5.2 read-feedback (timeout 00:10:00) [common]
2221 01:02:26.901477 Listened to connection for namespace 'common' for up to 1s
2222 01:02:27.902837 Finalising connection for namespace 'common'
2223 01:02:27.903044 Disconnecting from shell: Finalise
2224 01:02:28.003901 end: 5.2 read-feedback (duration 00:00:01) [common]
2225 01:02:28.004188 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8314794
2226 01:02:28.011854 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8314794
2227 01:02:28.012007 JobError: Your job cannot terminate cleanly.