[SOL Session operational. Use ~? for help]
[serdes_cs_hw_calibration_optionV2_exec]:Macro1 CS1 LC Vco Cal done!(LCVCOCALDONE) in 0ms
[SerdesCsCalib]:Macro1 CS1 PLL lock success!(0 ms)
[serdes_init]:SerDes1 init success!
Continue to dreset PCS
Continue to dreset HLLC
Continue to open PCS RX
Wait for HLLC Training........OK
Wait for HLLC1 Training........OK
Wait for S1 HLLC Training........OK
Wait for S1 HLLC1 Training........OK
Open Secondary socket Window
Djtag secondary 0x4004001d818 and 0x400d000d818 init
Macro 0 Download Firmware Success!!
Macro 1 Download Firmware Success!!
Macro 0 Download Firmware Success!!
Macro 1 Download Firmware Success!!
[serdes_hilink0_init]:hilink0_mode hccs1 8 lane 16 bit
Halt Macro 0 MCU!!
Release Macro 0 MCU!!
Temperature: 27 (0x1B)
[serdes_init]:SerDes0 init success!
[serdes_hilink1_init]:hilink1_mode hccs0 8 lane 16 bit
Halt Macro 1 MCU!!
Release Macro 1 MCU!!
Temperature: 28 (0x1C)
[serdes_init]:SerDes1 init success!
[serdes_hilink0_init]:hilink0_mode hccs1 8 lane 16 bit
Halt Macro 0 MCU!!
Release Macro 0 MCU!!
Temperature: 27 (0x1B)
[serdes_init]:SerDes0 init success!
[serdes_hilink1_init]:hilink1_mode hccs0 8 lane 16 bit
Halt Macro 1 MCU!!
Release Macro 1 MCU!!
Temperature: 27 (0x1B)
[serdes_init]:SerDes1 init success!
Continue to dreset PCS
Continue to dreset HLLC
Continue to Enable CTLE
Continue to open PCS RX
Wait for HLLC Training........OK
Wait for HLLC1 Training........OK
Wait for S1 HLLC Training........OK
Wait for S1 HLLC1 Training........OK
S0 HLLC0 Interrupt status(0x4) = 0x0
S0 HLLC1 Interrupt status(0x4) = 0x0
S1 HLLC0 Interrupt status(0x4) = 0x0
S1 HLLC1 Interrupt status(0x4) = 0x0
Config Secondary socket
Open Secondary socket Window
close NB CS2 to PA
Config socket0 NA PA
Enable socket0 PA 2+2 Mode
Config Secondary socket PA
clean S0 remap for PA....Done
clean remap for PA....Done
Enable socket1 PA 2+2 Mode
Djtag Secondary 0x4006001d818 Init
S1 Preinit
S1 Preinit End
Config Secondary socket AA&LLC
close S1 NB CS2 to PA
OK1OK2OK3Djtag Secondary 0x408d000d818 Init
Visit S1 NB
Visit S1 NB DONE
S1 NA PCIE clean remap.........Done
S1 NA PCIE MEM CONFIG.........Done
S1 NB PCIE clean remap.........Done
S1 NB PCIE MEM CcONFIG.........Done
NB/TB PLL Init
TB PLL init....OK
NB PLL init....OK
[LPC] S1 MBIGEN CONFIG Done
add-symbol-file /home/s00296804/Edk2/Build/D05Source/RELEASE_GCC49/AARCH64/HwPkg/Override/ArmPlatformPkg/Sec/Sec/DEBUG/ArmPlatformSec.dll 0xA4801800
Trust Zone Configuration is disabled
�
Boot firmware (version Hisilicon D05 UEFI 16.12 Release built at 05/15/2017 07:53)
init BMC.
TempVer:0x20
GetDeviceId return Success
GetVariable Not Found!
Get Default Setup Configration
&&&Now config iBMC BIOS WDT [action:0 countdown:3928 timeruse 2!
Memory Init PEIM Loaded
GetVariable Not Found!
Get Default Setup Configration
-------------------
Start RegisterTest:
RegisterTest OK!
-------------------
socket[0] Totem B I2C0 init ok.
socket[0] Totem B I2C1 init ok.
socket[1] Totem B I2C0 init ok.
socket[1] Totem B I2C1 init ok.
socket[0] channel[0] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x54
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[0][0].Dimm[0].DramWidth : X4
pGblData->Channel[0][0].Dimm[0].RankNum : 2
pGblData->Channel[0][0].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[0][0].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[0] channel[0] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x55
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[0] Channel[0] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[0][0].RankPresent : 0x3
socket[0] channel[1] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x54
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[0][1].Dimm[0].DramWidth : X4
pGblData->Channel[0][1].Dimm[0].RankNum : 2
pGblData->Channel[0][1].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[0][1].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[0] channel[1] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x55
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[0] Channel[1] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[0][1].RankPresent : 0x3
socket[0] channel[2] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x50
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[0][2].Dimm[0].DramWidth : X4
pGblData->Channel[0][2].Dimm[0].RankNum : 2
pGblData->Channel[0][2].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[0][2].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[0] channel[2] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x51
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[0] Channel[2] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[0][2].RankPresent : 0x3
socket[0] channel[3] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x50
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[0][3].Dimm[0].DramWidth : X4
pGblData->Channel[0][3].Dimm[0].RankNum : 2
pGblData->Channel[0][3].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[0][3].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[0] channel[3] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x51
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[0] Channel[3] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[0][3].RankPresent : 0x3
socket[1] channel[0] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x54
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[1][0].Dimm[0].DramWidth : X4
pGblData->Channel[1][0].Dimm[0].RankNum : 2
pGblData->Channel[1][0].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[1][0].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[1] channel[0] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x55
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[1] Channel[0] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[1][0].RankPresent : 0x3
socket[1] channel[1] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x54
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[1][1].Dimm[0].DramWidth : X4
pGblData->Channel[1][1].Dimm[0].RankNum : 2
pGblData->Channel[1][1].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[1][1].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[1] channel[1] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x55
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[1] Channel[1] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[1][1].RankPresent : 0x3
socket[1] channel[2] dimm[0] read from SPD, I2C Port:1 SlaveAddr:0x50
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[1][2].Dimm[0].DramWidth : X4
pGblData->Channel[1][2].Dimm[0].RankNum : 2
pGblData->Channel[1][2].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[1][2].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[1] channel[2] dimm[1] read from SPD, I2C Port:1 SlaveAddr:0x51
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[1] Channel[2] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[1][2].RankPresent : 0x3
socket[1] channel[3] dimm[0] read from SPD, I2C Port:0 SlaveAddr:0x50
---------------------------------------------------------------------
SPD_KEY_BYTE : DDR4
SPD_KEY_BYTE2 : RDIMM
SPD_MODULE_ORG_DDR4 : 0x8
SPD_MIN_TCK_DDR4 : 0x7
SPD_MAX_TCK_DDR4 : 0xD
SPD_FTB_MIN_TCK_DDR4 : 0xD6
DimmMaxFreq : 2401Mbps
pGblData->Channel[1][3].Dimm[0].DramWidth : X4
pGblData->Channel[1][3].Dimm[0].RankNum : 2
pGblData->Channel[1][3].Dimm[0].ddrFreq : 2400Mbps
pGblData->Channel[1][3].Dimm[0].minTck : 8330
---------------------------------------------------------------------
socket[1] channel[3] dimm[1] read from SPD, I2C Port:0 SlaveAddr:0x51
---------------------------------------------------------------------
SPD_KEY_BYTE : Empty
Socket[1] Channel[3] Dimm[1] is empty.
---------------------------------------------------------------------
pGblData->Channel[1][3].RankPresent : 0x3
DimmMaxFreq : 2401Mbps
GblData->Freq : 2400
GblData->Tck : 8333
GblData->DdrFreqIdx : 13
Check dimm status ok!
pGblData->MaxSPCNum = 2
skt[0] ch[0] maxPORFreqIdx = 13
skt[0] ch[1] maxPORFreqIdx = 13
skt[0] ch[2] maxPORFreqIdx = 13
skt[0] ch[3] maxPORFreqIdx = 13
skt[1] ch[0] maxPORFreqIdx = 13
skt[1] ch[1] maxPORFreqIdx = 13
skt[1] ch[2] maxPORFreqIdx = 13
skt[1] ch[3] maxPORFreqIdx = 13
---------------------------------------------------------------------
---------------------------------------------------------------------
PORFreqTable result(max system ddr frequency):
pGblData->DdrFreqIdx = 13
pGblData->DevParaFreqIdx = 13
pGblData->Tck = 8333
pGblData->Freq = 2400
---------------------------------------------------------------------
---------------------------------------------------------------------
Set ddr frequency ok!
Get dimm spd information
socket[0] channel[0] dimm[0] i2c port[1] slaveAddr[0x54] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 0 0 0 0x5
BGNum 0 0 0 4
BankNum 0 0 0 16
ColBits 0 0 0 10
RowBits 0 0 0 17
SpdMirror 0 0 0 1
SpdVdd 0 0 0 3
PrimaryBusWidth 0 0 0 64
ExtensionBusWidth 0 0 0 8
RankSize 0 0 0 16384
SpdRMId 0 0 0 0x3206
SpdMMfgId 0 0 0 0xCE00
SpdMMDate 0 0 0 0x2817
SpdSerialNum 0 0 0 0x4F82936
SpdMinTRCD 0 0 0 0x6E
SpdMinTRCDFtb 0 0 0 0x0
nRCD 0 0 0 0x35B6
SpdMinTRRDL 0 0 0 0x28
SpdMinTRRD 0 0 0 0x1B
SpdMinTRAS 0 0 0 0x100
SpdMinTRC 0 0 0 0x16E
SpdMinTRCFtb 0 0 0 0x0
SpdMinTRFC 0 0 0 0xAF0
SpdMinTAA 0 0 0 0x6E
SpdMinTAAFtb 0 0 0 0x0
SpdMinTFAW 0 0 0 0x68
SpdMinTRP 0 0 0 0x6E
SpdMinTRPFtb 0 0 0 0x0
nRP 0 0 0 0x35B6
SpdMinTCCDL 0 0 0 0x28
SpdMinTCCDLFtb 0 0 0 0x0
SpdModuleAttr 0 0 0 0x0
SpdAddrMap 0 0 0 0x1
---------------------------------------------------------------------
socket[0] channel[0] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 0 0 0ps
nRCD 0 0 13750ps
nRRDL 0 0 4900ps
nRRD 0 0 3300ps
nRAS 0 0 32000ps
nRC 0 0 45750ps
nRFC 0 0 350000ps
nWTR 0 0 0ps
nRTP 0 0 0ps
nAA 0 0 13750ps
nFAW 0 0 13000ps
nRP 0 0 13750ps
nCCDL 0 0 5000ps
---------------------------------------------------------------------
socket[0] channel[1] dimm[0] i2c port[0] slaveAddr[0x54] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 0 1 0 0x5
BGNum 0 1 0 4
BankNum 0 1 0 16
ColBits 0 1 0 10
RowBits 0 1 0 17
SpdMirror 0 1 0 1
SpdVdd 0 1 0 3
PrimaryBusWidth 0 1 0 64
ExtensionBusWidth 0 1 0 8
RankSize 0 1 0 16384
SpdRMId 0 1 0 0x3206
SpdMMfgId 0 1 0 0xCE00
SpdMMDate 0 1 0 0x2817
SpdSerialNum 0 1 0 0xE3F82936
SpdMinTRCD 0 1 0 0x6E
SpdMinTRCDFtb 0 1 0 0x0
nRCD 0 1 0 0x35B6
SpdMinTRRDL 0 1 0 0x28
SpdMinTRRD 0 1 0 0x1B
SpdMinTRAS 0 1 0 0x100
SpdMinTRC 0 1 0 0x16E
SpdMinTRCFtb 0 1 0 0x0
SpdMinTRFC 0 1 0 0xAF0
SpdMinTAA 0 1 0 0x6E
SpdMinTAAFtb 0 1 0 0x0
SpdMinTFAW 0 1 0 0x68
SpdMinTRP 0 1 0 0x6E
SpdMinTRPFtb 0 1 0 0x0
nRP 0 1 0 0x35B6
SpdMinTCCDL 0 1 0 0x28
SpdMinTCCDLFtb 0 1 0 0x0
SpdModuleAttr 0 1 0 0x0
SpdAddrMap 0 1 0 0x1
---------------------------------------------------------------------
socket[0] channel[1] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 0 1 0ps
nRCD 0 1 13750ps
nRRDL 0 1 4900ps
nRRD 0 1 3300ps
nRAS 0 1 32000ps
nRC 0 1 45750ps
nRFC 0 1 350000ps
nWTR 0 1 0ps
nRTP 0 1 0ps
nAA 0 1 13750ps
nFAW 0 1 13000ps
nRP 0 1 13750ps
nCCDL 0 1 5000ps
---------------------------------------------------------------------
socket[0] channel[2] dimm[0] i2c port[1] slaveAddr[0x50] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 0 2 0 0x5
BGNum 0 2 0 4
BankNum 0 2 0 16
ColBits 0 2 0 10
RowBits 0 2 0 17
SpdMirror 0 2 0 1
SpdVdd 0 2 0 3
PrimaryBusWidth 0 2 0 64
ExtensionBusWidth 0 2 0 8
RankSize 0 2 0 16384
SpdRMId 0 2 0 0x3206
SpdMMfgId 0 2 0 0xCE00
SpdMMDate 0 2 0 0x2817
SpdSerialNum 0 2 0 0xDFF32936
SpdMinTRCD 0 2 0 0x6E
SpdMinTRCDFtb 0 2 0 0x0
nRCD 0 2 0 0x35B6
SpdMinTRRDL 0 2 0 0x28
SpdMinTRRD 0 2 0 0x1B
SpdMinTRAS 0 2 0 0x100
SpdMinTRC 0 2 0 0x16E
SpdMinTRCFtb 0 2 0 0x0
SpdMinTRFC 0 2 0 0xAF0
SpdMinTAA 0 2 0 0x6E
SpdMinTAAFtb 0 2 0 0x0
SpdMinTFAW 0 2 0 0x68
SpdMinTRP 0 2 0 0x6E
SpdMinTRPFtb 0 2 0 0x0
nRP 0 2 0 0x35B6
SpdMinTCCDL 0 2 0 0x28
SpdMinTCCDLFtb 0 2 0 0x0
SpdModuleAttr 0 2 0 0x0
SpdAddrMap 0 2 0 0x1
---------------------------------------------------------------------
socket[0] channel[2] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 0 2 0ps
nRCD 0 2 13750ps
nRRDL 0 2 4900ps
nRRD 0 2 3300ps
nRAS 0 2 32000ps
nRC 0 2 45750ps
nRFC 0 2 350000ps
nWTR 0 2 0ps
nRTP 0 2 0ps
nAA 0 2 13750ps
nFAW 0 2 13000ps
nRP 0 2 13750ps
nCCDL 0 2 5000ps
---------------------------------------------------------------------
socket[0] channel[3] dimm[0] i2c port[0] slaveAddr[0x50] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 0 3 0 0x5
BGNum 0 3 0 4
BankNum 0 3 0 16
ColBits 0 3 0 10
RowBits 0 3 0 17
SpdMirror 0 3 0 1
SpdVdd 0 3 0 3
PrimaryBusWidth 0 3 0 64
ExtensionBusWidth 0 3 0 8
RankSize 0 3 0 16384
SpdRMId 0 3 0 0x3206
SpdMMfgId 0 3 0 0xCE00
SpdMMDate 0 3 0 0x2817
SpdSerialNum 0 3 0 0xF5F02936
SpdMinTRCD 0 3 0 0x6E
SpdMinTRCDFtb 0 3 0 0x0
nRCD 0 3 0 0x35B6
SpdMinTRRDL 0 3 0 0x28
SpdMinTRRD 0 3 0 0x1B
SpdMinTRAS 0 3 0 0x100
SpdMinTRC 0 3 0 0x16E
SpdMinTRCFtb 0 3 0 0x0
SpdMinTRFC 0 3 0 0xAF0
SpdMinTAA 0 3 0 0x6E
SpdMinTAAFtb 0 3 0 0x0
SpdMinTFAW 0 3 0 0x68
SpdMinTRP 0 3 0 0x6E
SpdMinTRPFtb 0 3 0 0x0
nRP 0 3 0 0x35B6
SpdMinTCCDL 0 3 0 0x28
SpdMinTCCDLFtb 0 3 0 0x0
SpdModuleAttr 0 3 0 0x0
SpdAddrMap 0 3 0 0x1
---------------------------------------------------------------------
socket[0] channel[3] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 0 3 0ps
nRCD 0 3 13750ps
nRRDL 0 3 4900ps
nRRD 0 3 3300ps
nRAS 0 3 32000ps
nRC 0 3 45750ps
nRFC 0 3 350000ps
nWTR 0 3 0ps
nRTP 0 3 0ps
nAA 0 3 13750ps
nFAW 0 3 13000ps
nRP 0 3 13750ps
nCCDL 0 3 5000ps
---------------------------------------------------------------------
socket[1] channel[0] dimm[0] i2c port[1] slaveAddr[0x54] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 1 0 0 0x5
BGNum 1 0 0 4
BankNum 1 0 0 16
ColBits 1 0 0 10
RowBits 1 0 0 17
SpdMirror 1 0 0 1
SpdVdd 1 0 0 3
PrimaryBusWidth 1 0 0 64
ExtensionBusWidth 1 0 0 8
RankSize 1 0 0 16384
SpdRMId 1 0 0 0x3206
SpdMMfgId 1 0 0 0xCE00
SpdMMDate 1 0 0 0x2817
SpdSerialNum 1 0 0 0xE2F32936
SpdMinTRCD 1 0 0 0x6E
SpdMinTRCDFtb 1 0 0 0x0
nRCD 1 0 0 0x35B6
SpdMinTRRDL 1 0 0 0x28
SpdMinTRRD 1 0 0 0x1B
SpdMinTRAS 1 0 0 0x100
SpdMinTRC 1 0 0 0x16E
SpdMinTRCFtb 1 0 0 0x0
SpdMinTRFC 1 0 0 0xAF0
SpdMinTAA 1 0 0 0x6E
SpdMinTAAFtb 1 0 0 0x0
SpdMinTFAW 1 0 0 0x68
SpdMinTRP 1 0 0 0x6E
SpdMinTRPFtb 1 0 0 0x0
nRP 1 0 0 0x35B6
SpdMinTCCDL 1 0 0 0x28
SpdMinTCCDLFtb 1 0 0 0x0
SpdModuleAttr 1 0 0 0x0
SpdAddrMap 1 0 0 0x1
---------------------------------------------------------------------
socket[1] channel[0] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 1 0 0ps
nRCD 1 0 13750ps
nRRDL 1 0 4900ps
nRRD 1 0 3300ps
nRAS 1 0 32000ps
nRC 1 0 45750ps
nRFC 1 0 350000ps
nWTR 1 0 0ps
nRTP 1 0 0ps
nAA 1 0 13750ps
nFAW 1 0 13000ps
nRP 1 0 13750ps
nCCDL 1 0 5000ps
---------------------------------------------------------------------
socket[1] channel[1] dimm[0] i2c port[0] slaveAddr[0x54] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 1 1 0 0x5
BGNum 1 1 0 4
BankNum 1 1 0 16
ColBits 1 1 0 10
RowBits 1 1 0 17
SpdMirror 1 1 0 1
SpdVdd 1 1 0 3
PrimaryBusWidth 1 1 0 64
ExtensionBusWidth 1 1 0 8
RankSize 1 1 0 16384
SpdRMId 1 1 0 0x3206
SpdMMfgId 1 1 0 0xCE00
SpdMMDate 1 1 0 0x2817
SpdSerialNum 1 1 0 0x9AF22936
SpdMinTRCD 1 1 0 0x6E
SpdMinTRCDFtb 1 1 0 0x0
nRCD 1 1 0 0x35B6
SpdMinTRRDL 1 1 0 0x28
SpdMinTRRD 1 1 0 0x1B
SpdMinTRAS 1 1 0 0x100
SpdMinTRC 1 1 0 0x16E
SpdMinTRCFtb 1 1 0 0x0
SpdMinTRFC 1 1 0 0xAF0
SpdMinTAA 1 1 0 0x6E
SpdMinTAAFtb 1 1 0 0x0
SpdMinTFAW 1 1 0 0x68
SpdMinTRP 1 1 0 0x6E
SpdMinTRPFtb 1 1 0 0x0
nRP 1 1 0 0x35B6
SpdMinTCCDL 1 1 0 0x28
SpdMinTCCDLFtb 1 1 0 0x0
SpdModuleAttr 1 1 0 0x0
SpdAddrMap 1 1 0 0x1
---------------------------------------------------------------------
socket[1] channel[1] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 1 1 0ps
nRCD 1 1 13750ps
nRRDL 1 1 4900ps
nRRD 1 1 3300ps
nRAS 1 1 32000ps
nRC 1 1 45750ps
nRFC 1 1 350000ps
nWTR 1 1 0ps
nRTP 1 1 0ps
nAA 1 1 13750ps
nFAW 1 1 13000ps
nRP 1 1 13750ps
nCCDL 1 1 5000ps
---------------------------------------------------------------------
socket[1] channel[2] dimm[0] i2c port[1] slaveAddr[0x50] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 1 2 0 0x5
BGNum 1 2 0 4
BankNum 1 2 0 16
ColBits 1 2 0 10
RowBits 1 2 0 17
SpdMirror 1 2 0 1
SpdVdd 1 2 0 3
PrimaryBusWidth 1 2 0 64
ExtensionBusWidth 1 2 0 8
RankSize 1 2 0 16384
SpdRMId 1 2 0 0x3206
SpdMMfgId 1 2 0 0xCE00
SpdMMDate 1 2 0 0x2817
SpdSerialNum 1 2 0 0x9BF22936
SpdMinTRCD 1 2 0 0x6E
SpdMinTRCDFtb 1 2 0 0x0
nRCD 1 2 0 0x35B6
SpdMinTRRDL 1 2 0 0x28
SpdMinTRRD 1 2 0 0x1B
SpdMinTRAS 1 2 0 0x100
SpdMinTRC 1 2 0 0x16E
SpdMinTRCFtb 1 2 0 0x0
SpdMinTRFC 1 2 0 0xAF0
SpdMinTAA 1 2 0 0x6E
SpdMinTAAFtb 1 2 0 0x0
SpdMinTFAW 1 2 0 0x68
SpdMinTRP 1 2 0 0x6E
SpdMinTRPFtb 1 2 0 0x0
nRP 1 2 0 0x35B6
SpdMinTCCDL 1 2 0 0x28
SpdMinTCCDLFtb 1 2 0 0x0
SpdModuleAttr 1 2 0 0x0
SpdAddrMap 1 2 0 0x1
---------------------------------------------------------------------
socket[1] channel[2] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 1 2 0ps
nRCD 1 2 13750ps
nRRDL 1 2 4900ps
nRRD 1 2 3300ps
nRAS 1 2 32000ps
nRC 1 2 45750ps
nRFC 1 2 350000ps
nWTR 1 2 0ps
nRTP 1 2 0ps
nAA 1 2 13750ps
nFAW 1 2 13000ps
nRP 1 2 13750ps
nCCDL 1 2 5000ps
---------------------------------------------------------------------
socket[1] channel[3] dimm[0] i2c port[0] slaveAddr[0x50] SPD information:
SPD_MIN_TRCD_DDR4: 0x6E
SPD_FTB_TRCD_DDR4: 0x0
SPD_MIN_TRRDL_DDR4: 0x28
SPD_FTB_TRRDL_DDR4: 0x9C
SPD_MIN_TRRDS_DDR4: 0x1B
SPD_FTB_TRRDS_DDR4: 0xB5
SPD_EXT_TRC_TRAS_DDR4: 0x11
SPD_MIN_TRAS_DDR4: 0x0
SPD_MIN_TRC_DDR4: 0x6E
SPD_FTB_TRC_DDR4: 0x0
SPD_MIN_TRFC1_MSB_DDR4: 0xA
SPD_MIN_TRFC1_LSB_DDR4: 0xF0
tRFC: 0xAF0
tempCkNum: 0x55730
SPD_MIN_TAA_DDR4: 0x6E
SPD_FTB_TAA: 0x0
SPD_TFAW_UPPER_DDR4: 0x0
SPD_MIN_TFAW_DDR4: 0x68
SPD_MIN_TRP_DDR4: 0x6E
SPD_FTB_TRP_DDR4: 0x0
SPD_MIN_TCCDL_DDR4: 0x28
SPD_FTB_TCCDL_DDR4: 0x0
---------------------------------------------------------------------
pGblData item skt ch dimm value
---------------------------------------------------------------------
SDRAMCapacity 1 3 0 0x5
BGNum 1 3 0 4
BankNum 1 3 0 16
ColBits 1 3 0 10
RowBits 1 3 0 17
SpdMirror 1 3 0 1
SpdVdd 1 3 0 3
PrimaryBusWidth 1 3 0 64
ExtensionBusWidth 1 3 0 8
RankSize 1 3 0 16384
SpdRMId 1 3 0 0x3206
SpdMMfgId 1 3 0 0xCE00
SpdMMDate 1 3 0 0x2817
SpdSerialNum 1 3 0 0x84E82936
SpdMinTRCD 1 3 0 0x6E
SpdMinTRCDFtb 1 3 0 0x0
nRCD 1 3 0 0x35B6
SpdMinTRRDL 1 3 0 0x28
SpdMinTRRD 1 3 0 0x1B
SpdMinTRAS 1 3 0 0x100
SpdMinTRC 1 3 0 0x16E
SpdMinTRCFtb 1 3 0 0x0
SpdMinTRFC 1 3 0 0xAF0
SpdMinTAA 1 3 0 0x6E
SpdMinTAAFtb 1 3 0 0x0
SpdMinTFAW 1 3 0 0x68
SpdMinTRP 1 3 0 0x6E
SpdMinTRPFtb 1 3 0 0x0
nRP 1 3 0 0x35B6
SpdMinTCCDL 1 3 0 0x28
SpdMinTCCDLFtb 1 3 0 0x0
SpdModuleAttr 1 3 0 0x0
SpdAddrMap 1 3 0 0x1
---------------------------------------------------------------------
socket[1] channel[3] SPD information:
---------------------------------------------------------------------
item skt ch value
---------------------------------------------------------------------
nWR 1 3 0ps
nRCD 1 3 13750ps
nRRDL 1 3 4900ps
nRRD 1 3 3300ps
nRAS 1 3 32000ps
nRC 1 3 45750ps
nRFC 1 3 350000ps
nWTR 1 3 0ps
nRTP 1 3 0ps
nAA 1 3 13750ps
nFAW 1 3 13000ps
nRP 1 3 13750ps
nCCDL 1 3 5000ps
---------------------------------------------------------------------
---------------------------------------------------------------------
Socket Channel Dimm Present Rank0 Rank1 Rank2 Rank3
0 0 0 YES YES YES NOT NOT
0 0 1 NOT NOT NOT NOT NOT
0 0 2 NOT NOT NOT NOT NOT
0 1 0 YES YES YES NOT NOT
0 1 1 NOT NOT NOT NOT NOT
0 1 2 NOT NOT NOT NOT NOT
0 2 0 YES YES YES NOT NOT
0 2 1 NOT NOT NOT NOT NOT
0 2 2 NOT NOT NOT NOT NOT
0 3 0 YES YES YES NOT NOT
0 3 1 NOT NOT NOT NOT NOT
0 3 2 NOT NOT NOT NOT NOT
1 0 0 YES YES YES NOT NOT
1 0 1 NOT NOT NOT NOT NOT
1 0 2 NOT NOT NOT NOT NOT
1 1 0 YES YES YES NOT NOT
1 1 1 NOT NOT NOT NOT NOT
1 1 2 NOT NOT NOT NOT NOT
1 2 0 YES YES YES NOT NOT
1 2 1 NOT NOT NOT NOT NOT
1 2 2 NOT NOT NOT NOT NOT
1 3 0 YES YES YES NOT NOT
1 3 1 NOT NOT NOT NOT NOT
1 3 2 NOT NOT NOT NOT NOT
---------------------------------------------------------------------
**********************************************************************
Socket[0] Channel[0] Base:[0x60340000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[0] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x603480A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x603480A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1C; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[0] channel[0] rank[0] Phy gate leveling.....OK
socket[0] channel[0] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[0] channel[0] rank[0] Phy write leveling.....OK
socket[0] channel[0] rank[1] Phy write leveling.....OK
socket[0] channel[0] rank[0] Phy write leveling 2...OK
socket[0] channel[0] rank[1] Phy write leveling 2...OK
socket[0] channel[0] rank[0] Read data eye training start:
socket[0] channel[0] rank[0] Read data eye training end
socket[0] channel[0] rank[1] Read data eye training start:
socket[0] channel[0] rank[1] Read data eye training end
socket[0] channel[0] rank[0] Write data eye training start:
socket[0] channel[0] rank[0] Write data eye training end
socket[0] channel[0] rank[1] Write data eye training start:
socket[0] channel[0] rank[1] Write data eye training end
socket[0] channel[0] Rx vref training start
socket[0] channel[0] Rx vref training end
socket[0] channel[0] rank[0] Read data eye training start:
socket[0] channel[0] rank[0] Read data eye training end
socket[0] channel[0] rank[1] Read data eye training start:
socket[0] channel[0] rank[1] Read data eye training end
socket[0] channel[0] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[0] rank[0] RxPerBitTrainingExmbistOptimize end
socket[0] channel[0] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[0] rank[1] RxPerBitTrainingExmbistOptimize end
socket[0] channel[0] Tx vref training start
socket[0] channel[0] Tx vref training end
socket[0] channel[0] rank[0] Write data eye training start:
socket[0] channel[0] rank[0] Write data eye training end
socket[0] channel[0] rank[1] Write data eye training start:
socket[0] channel[0] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[0] Channel[0] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[0] Channel[1] Base:[0x60350000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[1] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x603580A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x603580A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[0] channel[1] rank[0] Phy gate leveling.....OK
socket[0] channel[1] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[0] channel[1] rank[0] Phy write leveling.....OK
socket[0] channel[1] rank[1] Phy write leveling.....OK
socket[0] channel[1] rank[0] Phy write leveling 2...OK
socket[0] channel[1] rank[1] Phy write leveling 2...OK
socket[0] channel[1] rank[0] Read data eye training start:
socket[0] channel[1] rank[0] Read data eye training end
socket[0] channel[1] rank[1] Read data eye training start:
socket[0] channel[1] rank[1] Read data eye training end
socket[0] channel[1] rank[0] Write data eye training start:
socket[0] channel[1] rank[0] Write data eye training end
socket[0] channel[1] rank[1] Write data eye training start:
socket[0] channel[1] rank[1] Write data eye training end
socket[0] channel[1] Rx vref training start
socket[0] channel[1] Rx vref training end
socket[0] channel[1] rank[0] Read data eye training start:
socket[0] channel[1] rank[0] Read data eye training end
socket[0] channel[1] rank[1] Read data eye training start:
socket[0] channel[1] rank[1] Read data eye training end
socket[0] channel[1] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[1] rank[0] RxPerBitTrainingExmbistOptimize end
socket[0] channel[1] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[1] rank[1] RxPerBitTrainingExmbistOptimize end
socket[0] channel[1] Tx vref training start
socket[0] channel[1] Tx vref training end
socket[0] channel[1] rank[0] Write data eye training start:
socket[0] channel[1] rank[0] Write data eye training end
socket[0] channel[1] rank[1] Write data eye training start:
socket[0] channel[1] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[0] Channel[1] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[0] Channel[2] Base:[0x40340000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[2] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x403480A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x403480A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[0] channel[2] rank[0] Phy gate leveling.....OK
socket[0] channel[2] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 2 is set to 0x00000001
lat_adj_start of rank 1 byte 3 is set to 0x00000001
lat_adj_start of rank 1 byte 4 is set to 0x00000001
lat_adj_start of rank 1 byte 5 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[0] channel[2] rank[0] Phy write leveling.....OK
socket[0] channel[2] rank[1] Phy write leveling.....OK
socket[0] channel[2] rank[0] Phy write leveling 2...OK
socket[0] channel[2] rank[1] Phy write leveling 2...OK
socket[0] channel[2] rank[0] Read data eye training start:
socket[0] channel[2] rank[0] Read data eye training end
socket[0] channel[2] rank[1] Read data eye training start:
socket[0] channel[2] rank[1] Read data eye training end
socket[0] channel[2] rank[0] Write data eye training start:
socket[0] channel[2] rank[0] Write data eye training end
socket[0] channel[2] rank[1] Write data eye training start:
socket[0] channel[2] rank[1] Write data eye training end
socket[0] channel[2] Rx vref training start
socket[0] channel[2] Rx vref training end
socket[0] channel[2] rank[0] Read data eye training start:
socket[0] channel[2] rank[0] Read data eye training end
socket[0] channel[2] rank[1] Read data eye training start:
socket[0] channel[2] rank[1] Read data eye training end
socket[0] channel[2] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[2] rank[0] RxPerBitTrainingExmbistOptimize end
socket[0] channel[2] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[2] rank[1] RxPerBitTrainingExmbistOptimize end
socket[0] channel[2] Tx vref training start
socket[0] channel[2] Tx vref training end
socket[0] channel[2] rank[0] Write data eye training start:
socket[0] channel[2] rank[0] Write data eye training end
socket[0] channel[2] rank[1] Write data eye training start:
socket[0] channel[2] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[0] Channel[2] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[0] Channel[3] Base:[0x40350000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[3] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x403580A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x403580A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1C; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[0] channel[3] rank[0] Phy gate leveling.....OK
socket[0] channel[3] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 2 is set to 0x00000001
lat_adj_start of rank 1 byte 3 is set to 0x00000001
lat_adj_start of rank 1 byte 4 is set to 0x00000001
lat_adj_start of rank 1 byte 5 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[0] channel[3] rank[0] Phy write leveling.....OK
socket[0] channel[3] rank[1] Phy write leveling.....OK
socket[0] channel[3] rank[0] Phy write leveling 2...OK
socket[0] channel[3] rank[1] Phy write leveling 2...OK
socket[0] channel[3] rank[0] Read data eye training start:
socket[0] channel[3] rank[0] Read data eye training end
socket[0] channel[3] rank[1] Read data eye training start:
socket[0] channel[3] rank[1] Read data eye training end
socket[0] channel[3] rank[0] Write data eye training start:
socket[0] channel[3] rank[0] Write data eye training end
socket[0] channel[3] rank[1] Write data eye training start:
socket[0] channel[3] rank[1] Write data eye training end
socket[0] channel[3] Rx vref training start
socket[0] channel[3] Rx vref training end
socket[0] channel[3] rank[0] Read data eye training start:
socket[0] channel[3] rank[0] Read data eye training end
socket[0] channel[3] rank[1] Read data eye training start:
socket[0] channel[3] rank[1] Read data eye training end
socket[0] channel[3] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[3] rank[0] RxPerBitTrainingExmbistOptimize end
socket[0] channel[3] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[0] channel[3] rank[1] RxPerBitTrainingExmbistOptimize end
socket[0] channel[3] Tx vref training start
socket[0] channel[3] Tx vref training end
socket[0] channel[3] rank[0] Write data eye training start:
socket[0] channel[3] rank[0] Write data eye training end
socket[0] channel[3] rank[1] Write data eye training start:
socket[0] channel[3] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[0] Channel[3] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[1] Channel[0] Base:[0x40060340000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[0] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x603480A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x603480A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x19; pvtp=0xB
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[1] channel[0] rank[0] Phy gate leveling.....OK
socket[1] channel[0] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[1] channel[0] rank[0] Phy write leveling.....OK
socket[1] channel[0] rank[1] Phy write leveling.....OK
socket[1] channel[0] rank[0] Phy write leveling 2...OK
socket[1] channel[0] rank[1] Phy write leveling 2...OK
socket[1] channel[0] rank[0] Read data eye training start:
socket[1] channel[0] rank[0] Read data eye training end
socket[1] channel[0] rank[1] Read data eye training start:
socket[1] channel[0] rank[1] Read data eye training end
socket[1] channel[0] rank[0] Write data eye training start:
socket[1] channel[0] rank[0] Write data eye training end
socket[1] channel[0] rank[1] Write data eye training start:
socket[1] channel[0] rank[1] Write data eye training end
socket[1] channel[0] Rx vref training start
socket[1] channel[0] Rx vref training end
socket[1] channel[0] rank[0] Read data eye training start:
socket[1] channel[0] rank[0] Read data eye training end
socket[1] channel[0] rank[1] Read data eye training start:
socket[1] channel[0] rank[1] Read data eye training end
socket[1] channel[0] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[0] rank[0] RxPerBitTrainingExmbistOptimize end
socket[1] channel[0] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[0] rank[1] RxPerBitTrainingExmbistOptimize end
socket[1] channel[0] Tx vref training start
socket[1] channel[0] Tx vref training end
socket[1] channel[0] rank[0] Write data eye training start:
socket[1] channel[0] rank[0] Write data eye training end
socket[1] channel[0] rank[1] Write data eye training start:
socket[1] channel[0] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[1] Channel[0] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[1] Channel[1] Base:[0x40060350000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[1] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x603580A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x603580A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1A; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[1] channel[1] rank[0] Phy gate leveling.....OK
socket[1] channel[1] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[1] channel[1] rank[0] Phy write leveling.....OK
socket[1] channel[1] rank[1] Phy write leveling.....OK
socket[1] channel[1] rank[0] Phy write leveling 2...OK
socket[1] channel[1] rank[1] Phy write leveling 2...OK
socket[1] channel[1] rank[0] Read data eye training start:
socket[1] channel[1] rank[0] Read data eye training end
socket[1] channel[1] rank[1] Read data eye training start:
socket[1] channel[1] rank[1] Read data eye training end
socket[1] channel[1] rank[0] Write data eye training start:
socket[1] channel[1] rank[0] Write data eye training end
socket[1] channel[1] rank[1] Write data eye training start:
socket[1] channel[1] rank[1] Write data eye training end
socket[1] channel[1] Rx vref training start
socket[1] channel[1] Rx vref training end
socket[1] channel[1] rank[0] Read data eye training start:
socket[1] channel[1] rank[0] Read data eye training end
socket[1] channel[1] rank[1] Read data eye training start:
socket[1] channel[1] rank[1] Read data eye training end
socket[1] channel[1] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[1] rank[0] RxPerBitTrainingExmbistOptimize end
socket[1] channel[1] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[1] rank[1] RxPerBitTrainingExmbistOptimize end
socket[1] channel[1] Tx vref training start
socket[1] channel[1] Tx vref training end
socket[1] channel[1] rank[0] Write data eye training start:
socket[1] channel[1] rank[0] Write data eye training end
socket[1] channel[1] rank[1] Write data eye training start:
socket[1] channel[1] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[1] Channel[1] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[1] Channel[2] Base:[0x40040340000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[2] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x403480A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x403480A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1C; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[1] channel[2] rank[0] Phy gate leveling.....OK
socket[1] channel[2] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 2 is set to 0x00000001
lat_adj_start of rank 1 byte 3 is set to 0x00000001
lat_adj_start of rank 1 byte 4 is set to 0x00000001
lat_adj_start of rank 1 byte 5 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[1] channel[2] rank[0] Phy write leveling.....OK
socket[1] channel[2] rank[1] Phy write leveling.....OK
socket[1] channel[2] rank[0] Phy write leveling 2...OK
socket[1] channel[2] rank[1] Phy write leveling 2...OK
socket[1] channel[2] rank[0] Read data eye training start:
socket[1] channel[2] rank[0] Read data eye training end
socket[1] channel[2] rank[1] Read data eye training start:
socket[1] channel[2] rank[1] Read data eye training end
socket[1] channel[2] rank[0] Write data eye training start:
socket[1] channel[2] rank[0] Write data eye training end
socket[1] channel[2] rank[1] Write data eye training start:
socket[1] channel[2] rank[1] Write data eye training end
socket[1] channel[2] Rx vref training start
socket[1] channel[2] Rx vref training end
socket[1] channel[2] rank[0] Read data eye training start:
socket[1] channel[2] rank[0] Read data eye training end
socket[1] channel[2] rank[1] Read data eye training start:
socket[1] channel[2] rank[1] Read data eye training end
socket[1] channel[2] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[2] rank[0] RxPerBitTrainingExmbistOptimize end
socket[1] channel[2] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[2] rank[1] RxPerBitTrainingExmbistOptimize end
socket[1] channel[2] Tx vref training start
socket[1] channel[2] Tx vref training end
socket[1] channel[2] rank[0] Write data eye training start:
socket[1] channel[2] rank[0] Write data eye training end
socket[1] channel[2] rank[1] Write data eye training start:
socket[1] channel[2] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[1] Channel[2] DDR Init Finished!
**********************************************************************
**********************************************************************
Socket[1] Channel[3] Base:[0x40040350000] Speed:[2400]
**********************************************************************
==========================
config parameters from SPD
==========================
DDR PHY PLL config.....................................OK!
Top module cfg.........................................OK
ch[3] : phy_rdata_en_dly:14;wden:15;wdcs:11;wdda:8
rank[0]: dmc_odt_config [0x403580A0]:wodt:0x1;rodt:0x2
rank[1]: dmc_odt_config [0x403580A4]:wodt:0x2;rodt:0x1
Dmc init static........................................OK
Phy init dynamic.......................................OK
[software pad_cal_0]: pvtr=0x1F; pvtn=0x1B; pvtp=0xC
[software pad_cal_1]: pvtr=0x1F; pvtn=0x1B; pvtp=0xD
dimm[0] rcd init finished!
rank[0] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[0] sdram init finished!
rank[1] RTT_WR:2; RTT_PARK:1; RTT_NOM:4;
rank[1] sdram init finished!
-----------------------------------------------------
Rank MR0 MR1 MR2 MR3 MR4 MR5 MR6
rank0 0X0964,0X0401,0X0498,0X0000,0X0008,0X0040,0X0810
-----------------------------------------------------
Dram init..............................................OK
socket[1] channel[3] rank[0] Phy gate leveling.....OK
socket[1] channel[3] rank[1] Phy gate leveling.....lat_adj_start of rank 1 byte 0 is set to 0x00000001
lat_adj_start of rank 1 byte 1 is set to 0x00000001
lat_adj_start of rank 1 byte 2 is set to 0x00000001
lat_adj_start of rank 1 byte 3 is set to 0x00000001
lat_adj_start of rank 1 byte 4 is set to 0x00000001
lat_adj_start of rank 1 byte 5 is set to 0x00000001
lat_adj_start of rank 1 byte 6 is set to 0x00000001
lat_adj_start of rank 1 byte 7 is set to 0x00000001
OK
socket[1] channel[3] rank[0] Phy write leveling.....OK
socket[1] channel[3] rank[1] Phy write leveling.....OK
socket[1] channel[3] rank[0] Phy write leveling 2...OK
socket[1] channel[3] rank[1] Phy write leveling 2...OK
socket[1] channel[3] rank[0] Read data eye training start:
socket[1] channel[3] rank[0] Read data eye training end
socket[1] channel[3] rank[1] Read data eye training start:
socket[1] channel[3] rank[1] Read data eye training end
socket[1] channel[3] rank[0] Write data eye training start:
socket[1] channel[3] rank[0] Write data eye training end
socket[1] channel[3] rank[1] Write data eye training start:
socket[1] channel[3] rank[1] Write data eye training end
socket[1] channel[3] Rx vref training start
socket[1] channel[3] Rx vref training end
socket[1] channel[3] rank[0] Read data eye training start:
socket[1] channel[3] rank[0] Read data eye training end
socket[1] channel[3] rank[1] Read data eye training start:
socket[1] channel[3] rank[1] Read data eye training end
socket[1] channel[3] rank[0] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[3] rank[0] RxPerBitTrainingExmbistOptimize end
socket[1] channel[3] rank[1] RxPerBitTrainingExmbistOptimize start:
socket[1] channel[3] rank[1] RxPerBitTrainingExmbistOptimize end
socket[1] channel[3] Tx vref training start
socket[1] channel[3] Tx vref training end
socket[1] channel[3] rank[0] Write data eye training start:
socket[1] channel[3] rank[0] Write data eye training end
socket[1] channel[3] rank[1] Write data eye training start:
socket[1] channel[3] rank[1] Write data eye training end
//----------------------------------
sfc test rank0
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
sfc test rank1
[0]wdata: 0x11111111 - 0x11111111 rdata
[1]wdata: 0x11111111 - 0x11111111 rdata
[2]wdata: 0x22222222 - 0x22222222 rdata
[3]wdata: 0x22222222 - 0x22222222 rdata
[4]wdata: 0x33333333 - 0x33333333 rdata
[5]wdata: 0x33333333 - 0x33333333 rdata
[6]wdata: 0x44444444 - 0x44444444 rdata
[7]wdata: 0x44444444 - 0x44444444 rdata
[8]wdata: 0x55555555 - 0x55555555 rdata
[9]wdata: 0x55555555 - 0x55555555 rdata
[10]wdata: 0x66666666 - 0x66666666 rdata
[11]wdata: 0x66666666 - 0x66666666 rdata
[12]wdata: 0x77777777 - 0x77777777 rdata
[13]wdata: 0x77777777 - 0x77777777 rdata
[14]wdata: 0x88888888 - 0x88888888 rdata
[15]wdata: 0x88888888 - 0x88888888 rdata
[16]wdata: 0x44332211 - 0x44332211 rdata
[17]wdata: 0x88776655 - 0x88776655 rdata
//----------------------------------
**********************************************************************
Socket[1] Channel[3] DDR Init Finished!
**********************************************************************
========================================================================================
| socekt 0 |
========================================================================================
| Slot | Channel 0 | Channel 1 | Channel 2 | Channel 3 |
========================================================================================
| 0 | Samsung | Samsung | Samsung | Samsung |
| | Montage | Montage | Montage | Montage |
| | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) |
| | 2400 | 2400 | 2400 | 2400 |
| | ww282017 | ww282017 | ww282017 | ww282017 |
| | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC |
| | | | | |
----------------------------------------------------------------------------------------
| 1 | NO DIMM | NO DIMM | NO DIMM | NO DIMM |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
----------------------------------------------------------------------------------------
| 2 | NO DIMM | NO DIMM | NO DIMM | NO DIMM |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
----------------------------------------------------------------------------------------
========================================================================================
| socekt 1 |
========================================================================================
| Slot | Channel 0 | Channel 1 | Channel 2 | Channel 3 |
========================================================================================
| 0 | Samsung | Samsung | Samsung | Samsung |
| | Montage | Montage | Montage | Montage |
| | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) | 32GB(2RX4) |
| | 2400 | 2400 | 2400 | 2400 |
| | ww282017 | ww282017 | ww282017 | ww282017 |
| | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC | M393A4K40BB1-CRC |
| | | | | |
----------------------------------------------------------------------------------------
| 1 | NO DIMM | NO DIMM | NO DIMM | NO DIMM |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
----------------------------------------------------------------------------------------
| 2 | NO DIMM | NO DIMM | NO DIMM | NO DIMM |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
----------------------------------------------------------------------------------------
socket[0] channel[0] rank[0] memory clean start.
socket[0] channel[1] rank[0] memory clean start.
socket[0] channel[2] rank[0] memory clean start.
socket[0] channel[3] rank[0] memory clean start.
socket[1] channel[0] rank[0] memory clean start.
socket[1] channel[1] rank[0] memory clean start.
socket[1] channel[2] rank[0] memory clean start.
socket[1] channel[3] rank[0] memory clean start.
all rank[0] memory clean ok!
socket[0] channel[0] rank[0] memory clean read start.
socket[0] channel[1] rank[0] memory clean read start.
socket[0] channel[2] rank[0] memory clean read start.
socket[0] channel[3] rank[0] memory clean read start.
socket[1] channel[0] rank[0] memory clean read start.
socket[1] channel[1] rank[0] memory clean read start.
socket[1] channel[2] rank[0] memory clean read start.
socket[1] channel[3] rank[0] memory clean read start.
all rank[0] memory clean read ok!
socket[0] channel[0] rank[1] memory clean start.
socket[0] channel[1] rank[1] memory clean start.
socket[0] channel[2] rank[1] memory clean start.
socket[0] channel[3] rank[1] memory clean start.
socket[1] channel[0] rank[1] memory clean start.
socket[1] channel[1] rank[1] memory clean start.
socket[1] channel[2] rank[1] memory clean start.
socket[1] channel[3] rank[1] memory clean start.
all rank[1] memory clean ok!
socket[0] channel[0] rank[1] memory clean read start.
socket[0] channel[1] rank[1] memory clean read start.
socket[0] channel[2] rank[1] memory clean read start.
socket[0] channel[3] rank[1] memory clean read start.
socket[1] channel[0] rank[1] memory clean read start.
socket[1] channel[1] rank[1] memory clean read start.
socket[1] channel[2] rank[1] memory clean read start.
socket[1] channel[3] rank[1] memory clean read start.
all rank[1] memory clean read ok!
RAM Diagnose or not ?
(Press 'Ctrl+t' or 'Ctrl+T' to Begin Memory Diagnose)
Now wait for 3 seconds...
Not Press 'Ctrl+t' or 'Ctrl+T', The RAM Diagnose Exit
Start config DAW.
Record Interrupts
Interrupt Status:[SocketId: 0] [DieId: 1] [DDRC0] = 0xB0111168
Interrupt Status:[SocketId: 0] [DieId: 1] [DDRC1] = 0xA0311168
Interrupt Status:[SocketId: 0] [DieId: 3] [DDRC0] = 0x10601051
Interrupt Status:[SocketId: 0] [DieId: 3] [DDRC1] = 0x80301164
Interrupt Status:[SocketId: 0] [DieId: 1] [RASC0] = 0x16223
Interrupt Status:[SocketId: 0] [DieId: 1] [RASC1] = 0x403102
Interrupt Status:[SocketId: 0] [DieId: 3] [RASC0] = 0x613010
Interrupt Status:[SocketId: 0] [DieId: 3] [RASC1] = 0xB03112
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS0_INT0] = 0x8A
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS1_INT0] = 0x30
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS2_INT0] = 0x220
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS3_INT0] = 0x608
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS4_INT0] = 0x42
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS5_INT0] = 0x68
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS6_INT0] = 0x4
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS0_INT1] = 0x8089
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS1_INT1] = 0x1980
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS2_INT1] = 0xCA00C0
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS3_INT1] = 0x42AC0C
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS5_INT1] = 0x1404
Interrupt Status:[SocketId: 0] [DieId: 1] [T_CS6_INT1] = 0x5960
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS0_INT0] = 0x6
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS1_INT0] = 0x36
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS2_INT0] = 0x30
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS3_INT0] = 0x18
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS4_INT0] = 0x2
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS5_INT0] = 0x40
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS0_INT1] = 0x1500
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS1_INT1] = 0x22C4
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS2_INT1] = 0xC044
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS3_INT1] = 0x80820
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS4_INT1] = 0x904A
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS5_INT1] = 0x906
Interrupt Status:[SocketId: 0] [DieId: 3] [T_CS6_INT1] = 0x101
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS0_INT0] = 0x68
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS1_INT0] = 0xF4
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS2_INT0] = 0x7C
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS0_INT1] = 0x3CBC
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS1_INT1] = 0x2010
Interrupt Status:[SocketId: 0] [DieId: 0] [I_CS2_INT1] = 0x40
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS0_INT0] = 0xEC
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS1_INT0] = 0x3B
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS2_INT0] = 0xF8
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS0_INT1] = 0xB144
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS1_INT1] = 0x346D
Interrupt Status:[SocketId: 0] [DieId: 2] [I_CS2_INT1] = 0xE8B1
Interrupt Status:[SocketId: 0] [DieId: 1] [HHA0] = 0x88030
Interrupt Status:[SocketId: 0] [DieId: 1] [HHA1] = 0x400
Interrupt Status:[SocketId: 0] [DieId: 3] [HHA0] = 0x9121
Interrupt Status:[SocketId: 0] [DieId: 3] [HHA1] = 0x88200
Interrupt Status:[SocketId: 0] [DieId: 1] [LLC0] = 0x2A0
Interrupt Status:[SocketId: 0] [DieId: 1] [LLC1] = 0xA80
Interrupt Status:[SocketId: 0] [DieId: 1] [LLC3] = 0x20000
Interrupt Status:[SocketId: 0] [DieId: 3] [LLC0] = 0x400
Interrupt Status:[SocketId: 0] [DieId: 3] [LLC1] = 0x4020
Interrupt Status:[SocketId: 0] [DieId: 3] [LLC2] = 0x10001
Interrupt Status:[SocketId: 0] [DieId: 3] [LLC3] = 0x280
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER0] = 0x3
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER1] = 0x4
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER2] = 0x2
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_CLUSTER3] = 0x2
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_POE] = 0x7
Interrupt Status:[SocketId: 0] [DieId: 3] [AA_CLUSTER2] = 0x4
Interrupt Status:[SocketId: 0] [DieId: 3] [AA_CLUSTER3] = 0x2
Interrupt Status:[SocketId: 0] [DieId: 3] [AA_POE] = 0x7
Interrupt Status:[SocketId: 0] [DieId: 0] [AA_SAS] = 0x1
Interrupt Status:[SocketId: 0] [DieId: 2] [AA_ALG] = 0x3
Interrupt Status:[SocketId: 0] [DieId: 2] [AA_PCIE] = 0x2
Interrupt Status:[SocketId: 0] [DieId: 1] [AA_SRAM] = 0x8
Interrupt Status:[SocketId: 0] [DieId: 3] [AA_SRAM] = 0xEB
Interrupt Status:[SocketId: 1] [DieId: 1] [DDRC0] = 0x9111115C
Interrupt Status:[SocketId: 1] [DieId: 1] [DDRC1] = 0xE1501004
Interrupt Status:[SocketId: 1] [DieId: 3] [DDRC0] = 0xC1001178
Interrupt Status:[SocketId: 1] [DieId: 3] [DDRC1] = 0xA0311050
Interrupt Status:[SocketId: 1] [DieId: 1] [RASC0] = 0xA10321
Interrupt Status:[SocketId: 1] [DieId: 1] [RASC1] = 0x206222
Interrupt Status:[SocketId: 1] [DieId: 3] [RASC0] = 0x31A023
Interrupt Status:[SocketId: 1] [DieId: 3] [RASC1] = 0x6110
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS0_INT0] = 0x68
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS1_INT0] = 0x20
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS2_INT0] = 0xA
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS3_INT0] = 0x413
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS4_INT0] = 0x10
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS0_INT1] = 0x7E0
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS1_INT1] = 0x305
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS2_INT1] = 0x524800
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS3_INT1] = 0x823061
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS4_INT1] = 0x201
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS5_INT1] = 0xB5E
Interrupt Status:[SocketId: 1] [DieId: 1] [T_CS6_INT1] = 0x1D55
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS0_INT0] = 0x2
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS2_INT0] = 0x800
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS4_INT0] = 0x86
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS5_INT0] = 0x20
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS6_INT0] = 0x8C
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS0_INT1] = 0x100
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS1_INT1] = 0x5CCD
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS2_INT1] = 0x3CA4C
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS3_INT1] = 0x58388
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS4_INT1] = 0x4180
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS5_INT1] = 0x8882
Interrupt Status:[SocketId: 1] [DieId: 3] [T_CS6_INT1] = 0xB104
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS0_INT0] = 0x60
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS1_INT0] = 0x3C
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS2_INT0] = 0xE9
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS0_INT1] = 0x810
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS1_INT1] = 0x3063
Interrupt Status:[SocketId: 1] [DieId: 0] [I_CS2_INT1] = 0x400D
Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS0_INT0] = 0x8
Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS2_INT0] = 0xE
Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS0_INT1] = 0xA07C
Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS1_INT1] = 0x4940
Interrupt Status:[SocketId: 1] [DieId: 2] [I_CS2_INT1] = 0x2D0C
Interrupt Status:[SocketId: 1] [DieId: 1] [HHA0] = 0xC019
Interrupt Status:[SocketId: 1] [DieId: 1] [HHA1] = 0x8A041
Interrupt Status:[SocketId: 1] [DieId: 3] [HHA0] = 0x20
Interrupt Status:[SocketId: 1] [DieId: 3] [HHA1] = 0x48000
Interrupt Status:[SocketId: 1] [DieId: 1] [LLC0] = 0x8200
Interrupt Status:[SocketId: 1] [DieId: 1] [LLC3] = 0x20
Interrupt Status:[SocketId: 1] [DieId: 3] [LLC0] = 0x5000
Interrupt Status:[SocketId: 1] [DieId: 3] [LLC1] = 0x1
Interrupt Status:[SocketId: 1] [DieId: 3] [LLC2] = 0x20
Interrupt Status:[SocketId: 1] [DieId: 1] [AA_CLUSTER2] = 0x4
Interrupt Status:[SocketId: 1] [DieId: 1] [AA_CLUSTER3] = 0x2
Interrupt Status:[SocketId: 1] [DieId: 1] [AA_POE] = 0x6
Interrupt Status:[SocketId: 1] [DieId: 3] [AA_CLUSTER1] = 0x2
Interrupt Status:[SocketId: 1] [DieId: 3] [AA_CLUSTER3] = 0x1
Interrupt Status:[SocketId: 1] [DieId: 3] [AA_POE] = 0x2
Interrupt Status:[SocketId: 1] [DieId: 0] [AA_ALG] = 0x1
Interrupt Status:[SocketId: 1] [DieId: 0] [AA_PCIE] = 0x2
Interrupt Status:[SocketId: 1] [DieId: 2] [AA_ALG] = 0x1
Interrupt Status:[SocketId: 1] [DieId: 2] [AA_SAS] = 0x1
Interrupt Status:[SocketId: 1] [DieId: 1] [AA_SRAM] = 0xED
Interrupt Status:[SocketId: 1] [DieId: 3] [AA_SRAM] = 0xFB
Clear Interrupts
Clear DDRC
Clear RASC
Clear CS
Clear SLLC
Clear HHA
Clear LLC
Clear AA
Clear SRAM
Clear DDRC
Clear RASC
Clear CS
Clear SLLC
Clear HHA
Clear LLC
Clear AA
Clear SRAM
Clear Interrupt End
Enable Channel Interleave for socket[0]
Enable Channel Interleave for socket[0]
Daw Cinfig :Skt 0 Ch: 3 , Base = 0x0, Size = 0x40000000, DieInterLeaveEn = 0
ColBits = 0xA
RowBits = 0x11
Banknum = 0x10
RankSize = 0x400000000
Ranknum = 0x2
DramWidth = 0x4
Size = 0x1000000000
Daw Config: Skt 0 Ch: 3 , Base = 0x1000000000, Size = 0x1000000000, DieInterLeaveEn = 0
LowMemory(<4G):Base=0x0, Size=0x40000000
HighMemory(>4G):Base=0x1040000000, Size=0x7C0000000
HighMemory(>4G):Base=0x1040000000, Size=0x7C0000000
HighMemory(>4G):Base=0x1800000000, Size=0x7FC000000
ColBits = 0xA
RowBits = 0x11
Banknum = 0x10
RankSize = 0x400000000
Ranknum = 0x2
DramWidth = 0x4
Size = 0x1000000000
Daw Config: Skt 0 Ch: 1 , Base = 0x2000000000, Size = 0x1000000000, DieInterLeaveEn = 0
HighMemory(>4G):Base=0x2000000000, Size=0xFFC000000
Enable Channel Interleave for socket[1]
Enable Channel Interleave for socket[1]
Daw Cinfig :Skt 1 Ch: 3 , Base = 0x0, Size = 0x40000000, DieInterLeaveEn = 0
ColBits = 0xA
RowBits = 0x11
Banknum = 0x10
RankSize = 0x400000000
Ranknum = 0x2
DramWidth = 0x4
Size = 0x1000000000
Daw Config: Skt 1 Ch: 3 , Base = 0x1000000000, Size = 0x1000000000, DieInterLeaveEn = 0
HighMemory(>4G):Base=0x41000000000, Size=0xFFC000000
ColBits = 0xA
RowBits = 0x11
Banknum = 0x10
RankSize = 0x400000000
Ranknum = 0x2
DramWidth = 0x4
Size = 0x1000000000
Daw Config: Skt 1 Ch: 1 , Base = 0x2000000000, Size = 0x1000000000, DieInterLeaveEn = 0
HighMemory(>4G):Base=0x42000000000, Size=0xFFC000000
Finish Config DAW.
Start config RAS or ECC.
pGblData->mem.rascBypass = 1
pGblData->mem.demandScrubMode = 0
pGblData->mem.patrolScrubMode = 0
skt[0] ch[0] ecc enable.
skt[0] ch[1] ecc enable.
skt[0] ch[2] ecc enable.
skt[0] ch[3] ecc enable.
skt[1] ch[0] ecc enable.
skt[1] ch[1] ecc enable.
skt[1] ch[2] ecc enable.
skt[1] ch[3] ecc enable.
Finish config RAS or ECC.
Clean ddrc or rasc interrupt OK
NOTICE: PL011_UART_BASE: 0x602b0000
NOTICE: BL1: 0x3fc8a000 - 0x3fc8b000 [size = 4096]
NOTICE: Booting Trusted Firmware
NOTICE: BL1: v1.1(release):50e18f8
NOTICE: BL1: Built : 08:50:23, Feb 25 2017
NOTICE: BL1: Booting BL2
NOTICE: BL2: v1.1(release):50e18f8
NOTICE: BL2: Built : 08:50:24, Feb 25 2017
NOTICE: BL1: Booting BL3-1
NOTICE: Before BL31 EL3 MMU
NOTICE: After BL31 EL3 MMU
NOTICE: BL3-1: v1.1(release):50e18f8
NOTICE: BL3-1: Built : 08:50:27, Feb 25 2017
NOTICE: [runtime_svc_init]:[94L] rt_svc_descs_num=0x1
NOTICE: [runtime_svc_init]:[109L] start_oen=4 end_oen=4 call_type=1 std_svc
NOTICE: [psci_init_aff_map]:[296L] mpidr = 0
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 0
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 1
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 2
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 3
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 4
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 5
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 6
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 2
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 7
NOTICE: [psci_init_aff_map]:[296L] mpidr = 0
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 8
NOTICE: [psci_init_aff_map]:[296L] mpidr = 100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 9
NOTICE: [psci_init_aff_map]:[296L] mpidr = 200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 10
NOTICE: [psci_init_aff_map]:[296L] mpidr = 300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 11
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 12
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 13
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 14
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 15
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 16
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 17
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 18
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 19
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 20
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 21
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 22
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 23
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 24
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 25
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 26
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 27
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 28
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 29
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 30
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 31
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 32
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 33
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 34
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 35
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 36
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 37
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 38
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 1
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 39
NOTICE: [psci_init_aff_map]:[296L] mpidr = 0
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 40
NOTICE: [psci_init_aff_map]:[296L] mpidr = 1
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 41
NOTICE: [psci_init_aff_map]:[296L] mpidr = 2
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 42
NOTICE: [psci_init_aff_map]:[296L] mpidr = 3
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 43
NOTICE: [psci_init_aff_map]:[296L] mpidr = 100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 44
NOTICE: [psci_init_aff_map]:[296L] mpidr = 101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 45
NOTICE: [psci_init_aff_map]:[296L] mpidr = 102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 46
NOTICE: [psci_init_aff_map]:[296L] mpidr = 103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 47
NOTICE: [psci_init_aff_map]:[296L] mpidr = 200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 48
NOTICE: [psci_init_aff_map]:[296L] mpidr = 201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 49
NOTICE: [psci_init_aff_map]:[296L] mpidr = 202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 50
NOTICE: [psci_init_aff_map]:[296L] mpidr = 203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 51
NOTICE: [psci_init_aff_map]:[296L] mpidr = 300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 52
NOTICE: [psci_init_aff_map]:[296L] mpidr = 301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 53
NOTICE: [psci_init_aff_map]:[296L] mpidr = 302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 54
NOTICE: [psci_init_aff_map]:[296L] mpidr = 303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 55
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 56
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 57
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 58
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 59
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 60
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 61
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 62
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 63
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 64
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 65
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 66
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 67
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 68
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 69
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 70
NOTICE: [psci_init_aff_map]:[296L] mpidr = 10303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 71
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 72
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 73
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 74
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 75
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 76
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 77
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 78
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 79
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 80
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 81
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 82
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 83
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 84
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 85
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 86
NOTICE: [psci_init_aff_map]:[296L] mpidr = 20303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 87
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 88
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 89
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 90
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 91
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 92
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 93
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 94
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 95
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 96
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 97
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 98
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 99
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 100
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 101
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 102
NOTICE: [psci_init_aff_map]:[296L] mpidr = 30303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 103
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 104
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 105
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 106
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 107
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 108
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 109
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 110
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 111
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 112
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 113
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 114
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 115
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 116
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 117
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 118
NOTICE: [psci_init_aff_map]:[296L] mpidr = 40303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 119
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 120
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 121
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 122
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 123
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 124
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 125
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 126
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 127
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 128
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 129
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 130
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 131
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 132
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 133
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 134
NOTICE: [psci_init_aff_map]:[296L] mpidr = 50303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 135
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 136
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 137
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 138
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 139
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 140
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 141
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 142
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 143
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 144
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 145
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 146
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 147
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 148
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 149
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 150
NOTICE: [psci_init_aff_map]:[296L] mpidr = 60303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 151
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70000
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 152
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70001
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 153
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70002
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 154
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70003
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 155
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70100
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 156
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70101
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 157
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70102
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 158
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70103
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 159
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70200
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 160
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70201
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 161
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70202
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 162
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70203
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 163
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70300
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 164
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70301
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 165
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70302
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 166
NOTICE: [psci_init_aff_map]:[296L] mpidr = 70303
NOTICE: [psci_init_aff_map]:[297L] cur_afflvl = 0
NOTICE: [psci_init_aff_map]:[298L] affmap_idx = 167
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e800
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7ef80
:486=170
[serdes_hilink2_init]:hilink2_mode pcie2 8 lane
Halt Macro 2 MCU!!
Macro 2 Download Firmware Success!!
Release Macro 2 MCU!!
Temperature: 29 (0x1D)
Temperature: 29 (0x1D)
[serdes_init]:SerDes2 init success!
Halt Macro 3 MCU!!
Macro 3 Download Firmware Success!!
Release Macro 3 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes3 init success!
Halt Macro 4 MCU!!
Macro 4 Download Firmware Success!!
Release Macro 4 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes4 init success!
[serdes_hilink5_init]:hilink5_mode sas1 4 lane
Halt Macro 5 MCU!!
Macro 5 Download Firmware Success!!
Release Macro 5 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes5 init success!
[serdes_hilink6_init] lane 0 =>sas1 lane 0
[serdes_hilink6_init] lane 1 =>sas1 lane 1
[serdes_hilink6_init] lane 2 =>sas1 lane 2
[serdes_hilink6_init] lane 3 =>sas1 lane 3
Halt Macro 6 MCU!!
Macro 6 Download Firmware Success!!
Release Macro 6 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes6 init success!
[serdes_hilink0_init]:hilink0_mode pcie5 8 lane
Halt Macro 0 MCU!!
Macro 0 Download Firmware Success!!
Release Macro 0 MCU!!
Temperature: 27 (0x1B)
Temperature: 27 (0x1B)
[serdes_init]:SerDes0 init success!
[serdes_hilink1_init]:hilink1_mode pcie4 8 lane
Halt Macro 1 MCU!!
Macro 1 Download Firmware Success!!
Release Macro 1 MCU!!
Temperature: 27 (0x1B)
Temperature: 28 (0x1C)
[serdes_init]:SerDes1 init success!
[serdes_hilink5_init]:hilink5_mode pcie6 1 lane and pcie7 1 lane
Halt Macro 5 MCU!!
Macro 5 Download Firmware Success!!
Release Macro 5 MCU!!
Temperature: 28 (0x1C)
Temperature: 28 (0x1C)
[serdes_init]:SerDes5 init success!
[serdes_hilink6_init] lane 0 =>sas5 lane 0
[serdes_hilink6_init] lane 1 =>sas5 lane 1
Halt Macro 6 MCU!!
Macro 6 Download Firmware Success!!
Release Macro 6 MCU!!
Temperature: 28 (0x1C)
Temperature: 28 (0x1C)
[serdes_init]:SerDes6 init success!
[serdes_hilink2_init]:hilink2_mode pcie2 8 lane
Halt Macro 2 MCU!!
Macro 2 Download Firmware Success!!
Release Macro 2 MCU!!
Temperature: 28 (0x1C)
Temperature: 28 (0x1C)
[serdes_init]:SerDes2 init success!
Halt Macro 3 MCU!!
Macro 3 Download Firmware Success!!
Release Macro 3 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes3 init success!
Halt Macro 4 MCU!!
Macro 4 Download Firmware Success!!
Release Macro 4 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes4 init success!
[serdes_hilink5_init]:hilink5_mode sas1 4 lane
Halt Macro 5 MCU!!
Macro 5 Download Firmware Success!!
Release Macro 5 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes5 init success!
[serdes_hilink6_init] lane 0 =>sas1 lane 0
[serdes_hilink6_init] lane 1 =>sas1 lane 1
[serdes_hilink6_init] lane 2 =>sas1 lane 2
[serdes_hilink6_init] lane 3 =>sas1 lane 3
Halt Macro 6 MCU!!
Macro 6 Download Firmware Success!!
Release Macro 6 MCU!!
Temperature: 30 (0x1E)
Temperature: 30 (0x1E)
[serdes_init]:SerDes6 init success!
[serdes_hilink0_init]:hilink0_mode pcie5 8 lane
Halt Macro 0 MCU!!
Macro 0 Download Firmware Success!!
Release Macro 0 MCU!!
Temperature: 27 (0x1B)
Temperature: 27 (0x1B)
[serdes_init]:SerDes0 init success!
[serdes_hilink1_init]:hilink1_mode pcie4 8 lane
Halt Macro 1 MCU!!
Macro 1 Download Firmware Success!!
Release Macro 1 MCU!!
Temperature: 27 (0x1B)
Temperature: 27 (0x1B)
[serdes_init]:SerDes1 init success!
[serdes_hilink5_init]:hilink5_mode pcie6 1 lane and pcie7 1 lane
Halt Macro 5 MCU!!
Macro 5 Download Firmware Success!!
Release Macro 5 MCU!!
Temperature: 27 (0x1B)
Temperature: 27 (0x1B)
[serdes_init]:SerDes5 init success!
[serdes_hilink6_init] lane 0 =>sas5 lane 0
[serdes_hilink6_init] lane 1 =>sas5 lane 1
Halt Macro 6 MCU!!
Macro 6 Download Firmware Success!!
Release Macro 6 MCU!!
Temperature: 27 (0x1B)
Temperature: 27 (0x1B)
[serdes_init]:SerDes6 init success!
InfoFromBmc.ProductName TaiShan 2280
InfoFromBmc.SerialNum 2102311TBJ10H8000087
InfoFromBmc.ManufactureType02 Huawei
InfoFromBmc.AssetTag
InfoFromBmc.SrNumType02 024APL10H8000090
InfoFromBmc.AssetTagType03
InfoFromBmc.SrNumType03 To be filled by O.E.M.
InfoFromBmc.VersionType03
InfoFromBmc.ChassisType03
InfoFromBmc.ManufacturerType03 Huawei
Create event for smbios table transfer success.
VerStr:1.12
Create event for miscellaneous ipmi operation success.
Locate gEfiPciIoProtocol Failed.
DawNum[0] = 2,DawNum[1] = 1,DawNum[2] =2,DawNum[3] =1
0 Base = 0x0, Size = 0x40000000
0 Base = 0x1000000000, Size = 0x1000000000
1 Base = 0x2000000000, Size = 0x1000000000
2 Base = 0x40000000000, Size = 0x40000000
2 Base = 0x41000000000, Size = 0x1000000000
3 Base = 0x42000000000, Size = 0x1000000000
[gmac_initialize]:[3650L] GpriData=0x3E8DE018
pPriv->ulMacSpeed:9
pPriv->ulMacDuplex:1
pPriv->ulPort:0
pPriv->ulGEBase:0xC7040000
pPriv->ulPpeCommonBase:0xC5070000
pPriv->ulPpeTNLBase:0xC5000000
pPriv->ulRCBCommonBase:0xC5080000
pPriv->ulRCBCommonEntryBase:0xC5080000
pPriv->ulRCBSramEntryBase:0xC5090000
pPriv->ulRingNum:0
pPriv->ulRingAddr:0
pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE8
DSAF_init
tbl_tcam_data
0x3F196CA0:0xA0A33BC1 0x40E80000 0x00000000 0x00000001
0x3F196CB0:0x00000000
tbl_tcam_ucast
0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001
0x3F196CB8:0x0000007F 0x00000000 0x0000007F 0x82000820
0x3F196CC8:0x00800000
----ok
LocateProtocol mOemXgeStatusProtocol success.
RXRING = 0x3E8D9000
TXRING = 0x3E8D4000
pPriv->ulTxMask = 512
RXBUFF = 0x3E6D3000
TXBUFF = 0x3E4D2000
[gmac_initialize]:[3650L] GpriData=0x3E44C018
pPriv->ulMacSpeed:9
pPriv->ulMacDuplex:1
pPriv->ulPort:1
pPriv->ulGEBase:0xC7044000
pPriv->ulPpeCommonBase:0xC5070000
pPriv->ulPpeTNLBase:0xC5010000
pPriv->ulRCBCommonBase:0xC5080000
pPriv->ulRCBCommonEntryBase:0xC5080000
pPriv->ulRCBSramEntryBase:0xC5090000
pPriv->ulRingNum:16
pPriv->ulRingAddr:1048576
pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE9
DSAF_init
tbl_tcam_data
0x3F196CA0:0xA0A33BC1 0x40E90001 0x00000000 0x00000001
0x3F196CB0:0x00000000
tbl_tcam_ucast
0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001
0x3F196CB8:0x0000008F 0x00000000 0x0000008F 0xC13BA3A0
0x3F196CC8:0x0000E940
----ok
LocateProtocol mOemXgeStatusProtocol success.
RXRING = 0x3E447000
TXRING = 0x3E442000
pPriv->ulTxMask = 512
RXBUFF = 0x3E241000
TXBUFF = 0x3E040000
[gmac_initialize]:[3650L] GpriData=0x3DFB8018
pPriv->ulMacSpeed:8
pPriv->ulMacDuplex:1
pPriv->ulPort:4
pPriv->ulGEBase:0xC7050000
pPriv->ulPpeCommonBase:0xC5070000
pPriv->ulPpeTNLBase:0xC5040000
pPriv->ulRCBCommonBase:0xC5080000
pPriv->ulRCBCommonEntryBase:0xC5080000
pPriv->ulRCBSramEntryBase:0xC5090000
pPriv->ulRingNum:64
pPriv->ulRingAddr:4194304
pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE6
PhyID : 0x1410DD0
PhyAddr: 0x0
ETH_PhyInit 1928; Marvell 88E1512 detect!
MII_CTRL_REG = 0x3100
MII_STAT_REG = 0x7949
page 18, reg20:0x1
page 0, reg17:0x4000
Phy Init OK
DSAF_init
tbl_tcam_data
0x3F196CA0:0xA0A33BC1 0x40E60004 0x00000000 0x00000001
0x3F196CB0:0x00000000
tbl_tcam_ucast
0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001
0x3F196CB8:0x000000BF 0x00000000 0x000000BF 0xAFAFAFAF
0x3F196CC8:0xAFAFAFAF
----ok
RXRING = 0x3DFB3000
TXRING = 0x3DFAD000
pPriv->ulTxMask = 512
RXBUFF = 0x3DDAB000
TXBUFF = 0x3DBA9000
[gmac_initialize]:[3650L] GpriData=0x3DB21018
pPriv->ulMacSpeed:8
pPriv->ulMacDuplex:1
pPriv->ulPort:5
pPriv->ulGEBase:0xC7054000
pPriv->ulPpeCommonBase:0xC5070000
pPriv->ulPpeTNLBase:0xC5050000
pPriv->ulRCBCommonBase:0xC5080000
pPriv->ulRCBCommonEntryBase:0xC5080000
pPriv->ulRCBSramEntryBase:0xC5090000
pPriv->ulRingNum:80
pPriv->ulRingAddr:5242880
pPriv->ulMacAddr:0xA0 0xA3 0x3B 0xC1 0x40 0xE7
PhyID : 0x1410DD0
PhyAddr: 0x1
ETH_PhyInit 1928; Marvell 88E1512 detect!
MII_CTRL_REG = 0x3100
MII_STAT_REG = 0x7949
page 18, reg20:0x1
page 0, reg17:0x4000
Phy Init OK
DSAF_init
tbl_tcam_data
0x3F196CA0:0xA0A33BC1 0x40E70005 0x00000000 0x00000001
0x3F196CB0:0x00000000
tbl_tcam_ucast
0x3F196CA8:0x00000000 0x00000001 0x00000000 0x00000001
0x3F196CB8:0x000000CF 0x00000000 0x000000CF 0xAFAFAFAF
0x3F196CC8:0xAFAFAFAF
----ok
RXRING = 0x3DB1C000
TXRING = 0x3DB17000
pPriv->ulTxMask = 512
RXBUFF = 0x3D916000
TXBUFF = 0x3D714000
SasDriverInitialize Ok!!!
[sas_init,2173]Card:1 init ok
[Higgs_StartPhy,185]Card:1 no cable on phy:0, default as electric cable
[Higgs_IntrInquiryOperation,219]Identify info:0x20010202,DevType:2--2,uiPhyContext:0x0
[Higgs_PhyCtrlUpDown,332]Higgs_PhyCtrlUpDown at uiPhyId = 0x0
[Higgs_PhyCtrlUpDown,346]uiPhyId:0x0, uiIrqVal:0x26
[Higgs_PhyUp,503]phyid:0,Rate is 11
[SAINI_ClearPortRsc,449]Card:1 port:0 clr port rsc,remove all device from device list of Disc
[SAINI_ExpanderBufferSwitch,1306]EXPANDER Buffer function is 2 !
[SAL_AbortSataDevIo,175]Now let's start AbortSataDev reset Io Card:1 msg:3D5CC9F0(uni id:0x0) to dev addr:0x500E004AAAAAAA00(sal dev:3D5D42D8) done func is NULL,v_pstMsg->stStatus.enDrvResp803
[SAL_AbortSataDevIo,175]Now let's start AbortSataDev reset Io Card:1 msg:3D5CCFD8(uni id:0x0) to dev addr:0x500E004AAAAAAA01(sal dev:3D5D4598) done func is NULL,v_pstMsg->stStatus.enDrvResp803
[SAL_AbortTaskSet,646]Now let's start abort SAS dev Io Card:1 msg:3D5CD5C0 to dev addr:0x500E004AAAAAAA1E(sal dev:3D5D4858),v_pstMsg->stStatus.enDrvResp803,pstMsg->pfnDone:31B85BF8
[SasScanDisk,838]Open Card:1 Phy:0 success!
Success to register SasDevice:Port 0 SasAddr 0x500E004AAAAAAA00, status = Success
Success to register SasDevice:Port 0 SasAddr 0x500E004AAAAAAA01, status = Success
SasDriverStart Ok!!!
SmiControllerDriverSupported - Status:Success
Install GopDevicePath Handle 0
Install GopDevicePath Handle 3D54D898
Install GopDevicePath Status Success
SmiGraphicsOutputSetMode +
Resetting Memory
setModeEx +
programModeRegisters +
[LPC] CRT_PLL1_750HS = 0x1D40A02
[LPC] CRT_PLL2_750HS = 0x206B851E
[LPC] SECONDARY_DISPLAY_CTRL = 0x2087106
setModeEx -
SmiGraphicsOutputSetMode x=640 y=480
SmiGraphicsOutputSetMode -
SmiGraphicsOutputConstructor -
[2J[01;01H[=3h[2J[01;01H[2J[01;01H[=3h[2J[01;01H[2J[01;01H[=3h[2J[01;01H[2J[01;01H[=3h[2J[01;01H[2J[01;01H[=3h[2J[01;01H[2J[01;01H[=3h[2J[01;01H[0m[35m[40mSmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
SmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
SmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
SmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
[2J[01;01H[=3h[2J[01;01H[0m[37m[40mSmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
[2J[01;01H[=3h[2J[01;01H[0m[35m[40mSmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
SmiControllerDriverSupported - Status:Unsupported
[0m[37m[40mPress Enter to boot OS immediately.
Press any other key in 10 seconds to stop automatical booting...
[2J[01;01HSmiGraphicsOutputQueryMode +
SmiGraphicsOutputQueryMode -
..[0m[30m[47mWelcome to GRUB!
[0m[37m[40m[0m[30m[40m[2J[01;01H[0m[37m[40m[02;27HGNU GRUB version 2.02~beta3
Minimal BASH-like line editing is supported. For the first word, TAB
lists possible command completions. Anywhere else TAB lists possible
device or file completions.
grub> linux (tftp,192.168.101.1)/8454828/tftp-deploy-9kk_79sy/kernel/Image pcie_aspm=off pci=pcie_bus_perf root=/dev/ram0 ip=:::::eth0:dhcp
[09;07Hl[09;08H[09;08Hi[09;09H[09;09Hn[09;10H[09;10Hu[09;11H[09;11Hx[09;12H[09;12H [09;13H[09;13H([09;14H[09;14Ht[09;15H[09;15Hf[09;16H[09;16Ht[09;17H[09;17Hp[09;18H[09;18H,[09;19H[09;19H1[09;20H[09;20H9[09;21H[09;21H2[09;22H[09;22H.[09;23H[09;23H1[09;24H[09;24H6[09;25H[09;25H8[09;26H[09;26H.[09;27H[09;27H1[09;28H[09;28H0[09;29H[09;29H1[09;30H[09;30H.[09;31H[09;31H1[09;32H[09;32H)[09;33H[09;33H/[09;34H[09;34H8[09;35H[09;35H4[09;36H[09;36H5[09;37H[09;37H4[09;38H[09;38H8[09;39H[09;39H2[09;40H[09;40H8[09;41H[09;41H/[09;42H[09;42Ht[09;43H[09;43Hf[09;44H[09;44Ht[09;45H[09;45Hp[09;46H[09;46H-[09;47H[09;47Hd[09;48H[09;48He[09;49H[09;49Hp[09;50H[09;50Hl[09;51H[09;51Ho[09;52H[09;52Hy[09;53H[09;53H-[09;54H[09;54H9[09;55H[09;55Hk[09;56H[09;56Hk[09;57H[09;57H_[09;58H[09;58H7[09;59H[09;59H9[09;60H[09;60Hs[09;61H[09;61Hy[09;62H[09;62H/[09;63H[09;63Hk[09;64H[09;64He[09;65H[09;65Hr[09;66H[09;66Hn[09;67H[09;67He[09;68H[09;68Hl[09;69H[09;69H/[09;70H[09;70HI[09;71H[09;71Hm[09;72H[09;72Ha[09;73H[09;73Hg[09;74H[09;74He[09;75H[09;75H [09;76H[09;76Hp[09;77H[09;77Hc[09;78H[09;78Hi[09;79H[09;79He
[09;80H[09;80H_
[10;01H[10;01Ha[10;02H[10;02Hs[10;03H[10;03Hp[10;04H[10;04Hm[10;05H[10;05H=[10;06H[10;06Ho[10;07H[10;07Hf[10;08H[10;08Hf[10;09H[10;09H [10;10H[10;10Hp[10;11H[10;11Hc[10;12H[10;12Hi[10;13H[10;13H=[10;14H[10;14Hp[10;15H[10;15Hc[10;16H[10;16Hi[10;17H[10;17He[10;18H[10;18H_[10;19H[10;19Hb[10;20H[10;20Hu[10;21H[10;21Hs[10;22H[10;22H_[10;23H[10;23Hp[10;24H[10;24He[10;25H[10;25Hr[10;26H[10;26Hf[10;27H[10;27H [10;28H[10;28Hr[10;29H[10;29Ho[10;30H[10;30Ho[10;31H[10;31Ht[10;32H[10;32H=[10;33H[10;33H/[10;34H[10;34Hd[10;35H[10;35He[10;36H[10;36Hv[10;37H[10;37H/[10;38H[10;38Hr[10;39H[10;39Ha[10;40H[10;40Hm[10;41H[10;41H0[10;42H[10;42H [10;43H[10;43Hi[10;44H[10;44Hp[10;45H[10;45H=[10;46H[10;46H:[10;47H[10;47H:[10;48H[10;48H:[10;49H[10;49H:[10;50H[10;50H:[10;51H[10;51He[10;52H[10;52Ht[10;53H[10;53Hh[10;54H[10;54H0[10;55H[10;55H:[10;56H[10;56Hd[10;57H[10;57Hh[10;58H[10;58Hc[10;59H[10;59Hp[10;60H
grub> devicetree (tftp,192.168.101.1)/8454828/tftp-deploy-9kk_79sy/dtb/hip07-d05.dtb
[11;07Hd[11;08H[11;08He[11;09H[11;09Hv[11;10H[11;10Hi[11;11H[11;11Hc[11;12H[11;12He[11;13H[11;13Ht[11;14H[11;14Hr[11;15H[11;15He[11;16H[11;16He[11;17H[11;17H [11;18H[11;18H([11;19H[11;19Ht[11;20H[11;20Hf[11;21H[11;21Ht[11;22H[11;22Hp[11;23H[11;23H,[11;24H[11;24H1[11;25H[11;25H9[11;26H[11;26H2[11;27H[11;27H.[11;28H[11;28H1[11;29H[11;29H6[11;30H[11;30H8[11;31H[11;31H.[11;32H[11;32H1[11;33H[11;33H0[11;34H[11;34H1[11;35H[11;35H.[11;36H[11;36H1[11;37H[11;37H)[11;38H[11;38H/[11;39H[11;39H8[11;40H[11;40H4[11;41H[11;41H5[11;42H[11;42H4[11;43H[11;43H8[11;44H[11;44H2[11;45H[11;45H8[11;46H[11;46H/[11;47H[11;47Ht[11;48H[11;48Hf[11;49H[11;49Ht[11;50H[11;50Hp[11;51H[11;51H-[11;52H[11;52Hd[11;53H[11;53He[11;54H[11;54Hp[11;55H[11;55Hl[11;56H[11;56Ho[11;57H[11;57Hy[11;58H[11;58H-[11;59H[11;59H9[11;60H[11;60Hk[11;61H[11;61Hk[11;62H[11;62H_[11;63H[11;63H7[11;64H[11;64H9[11;65H[11;65Hs[11;66H[11;66Hy[11;67H[11;67H/[11;68H[11;68Hd[11;69H[11;69Ht[11;70H[11;70Hb[11;71H[11;71H/[11;72H[11;72Hh[11;73H[11;73Hi[11;74H[11;74Hp[11;75H[11;75H0[11;76H[11;76H7[11;77H[11;77H-[11;78H[11;78Hd[11;79H[11;79H0
[11;80H[11;80H5
[12;01H[12;01H.[12;02H[12;02Hd[12;03H[12;03Ht[12;04H[12;04Hb[12;05H
grub> initrd (tftp,192.168.101.1)/8454828/tftp-deploy-9kk_79sy/ramdisk/ramdisk.cpio.gz
[13;07Hi[13;08H[13;08Hn[13;09H[13;09Hi[13;10H[13;10Ht[13;11H[13;11Hr[13;12H[13;12Hd[13;13H[13;13H [13;14H[13;14H([13;15H[13;15Ht[13;16H[13;16Hf[13;17H[13;17Ht[13;18H[13;18Hp[13;19H[13;19H,[13;20H[13;20H1[13;21H[13;21H9[13;22H[13;22H2[13;23H[13;23H.[13;24H[13;24H1[13;25H[13;25H6[13;26H[13;26H8[13;27H[13;27H.[13;28H[13;28H1[13;29H[13;29H0[13;30H[13;30H1[13;31H[13;31H.[13;32H[13;32H1[13;33H[13;33H)[13;34H[13;34H/[13;35H[13;35H8[13;36H[13;36H4[13;37H[13;37H5[13;38H[13;38H4[13;39H[13;39H8[13;40H[13;40H2[13;41H[13;41H8[13;42H[13;42H/[13;43H[13;43Ht[13;44H[13;44Hf[13;45H[13;45Ht[13;46H[13;46Hp[13;47H[13;47H-[13;48H[13;48Hd[13;49H[13;49He[13;50H[13;50Hp[13;51H[13;51Hl[13;52H[13;52Ho[13;53H[13;53Hy[13;54H[13;54H-[13;55H[13;55H9[13;56H[13;56Hk[13;57H[13;57Hk[13;58H[13;58H_[13;59H[13;59H7[13;60H[13;60H9[13;61H[13;61Hs[13;62H[13;62Hy[13;63H[13;63H/[13;64H[13;64Hr[13;65H[13;65Ha[13;66H[13;66Hm[13;67H[13;67Hd[13;68H[13;68Hi[13;69H[13;69Hs[13;70H[13;70Hk[13;71H[13;71H/[13;72H[13;72Hr[13;73H[13;73Ha[13;74H[13;74Hm[13;75H[13;75Hd[13;76H[13;76Hi[13;77H[13;77Hs[13;78H[13;78Hk[13;79H[13;79H.
[13;80H[13;80Hc
[14;01H[14;01Hp[14;02H[14;02Hi[14;03H[14;03Ho[14;04H[14;04H.[14;05H[14;05Hg[14;06H[14;06Hz[14;07H
grub> boot
[15;07Hb[15;08H[15;08Ho[15;09H[15;09Ho[15;10H[15;10Ht[15;11H
EFI stub: Booting Linux Kernel...
EFI stub: Using DTB from configuration table
EFI stub: Exiting boot services and installing virtual address map...
[SAL_ClearAffiliationSMP,325]it is going to hard reset dev:0x500E004AAAAAAA1F
[SAL_ClearAffiliationSMP,325]it is going to hard reset dev:0x500E004AAAAAAA1F
SAS ExitBootServicesEvent
GMAC ExitBootServicesEvent
GMAC ExitBootServicesEvent
GMAC ExitBootServicesEvent
GMAC ExitBootServicesEvent
OHCI ExitBootServicesEvent
IPMI ExitBootService Event
TransferSmbiosToBMC EVENT.
Transfer Smbios Table To iBMC Success.
GetVariable Status : Not Found.
NOTICE: [psci_smc_handler]:[347L] PSCI_VERSION CALL
NOTICE: [psci_version]:[99L] PSCI_MAJOR_VER: 10000: PSCI_MINOR_VER: 0
08096;04
08096;04
08096;04
08096;04
08096;04
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10001 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e880
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f190
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10002 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e900
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f3a0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10003 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5e980
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f5b0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10100 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ea00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f7c0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10101 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ea80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7f9d0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10102 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5eb00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7fbe0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10103 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5eb80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc7fdf0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10200 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ec00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80000
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10201 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ec80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80210
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10202 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ed00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80420
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10203 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ed80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80630
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10300 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ee00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80840
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10301 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ee80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80a50
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10302 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ef00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80c60
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x10303 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ef80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc80e70
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30000 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f800
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83180
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30001 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f880
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83390
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30002 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f900
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc835a0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30003 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5f980
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc837b0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30100 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fa00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc839c0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30101 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fa80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83bd0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30102 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fb00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83de0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30103 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fb80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc83ff0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30200 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fc00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84200
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30201 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fc80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84410
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30202 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fd00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84620
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30203 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fd80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84830
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30300 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fe00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84a40
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30301 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5fe80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84c50
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30302 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ff00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc84e60
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x30303 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc5ff80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc85070
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50000 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60800
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87380
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50001 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60880
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87590
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50002 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60900
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc877a0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50003 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60980
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc879b0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50100 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60a00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87bc0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50101 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60a80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87dd0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50102 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60b00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc87fe0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50103 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60b80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc881f0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50200 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60c00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88400
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50201 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60c80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88610
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50202 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60d00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88820
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50203 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60d80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88a30
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50300 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60e00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88c40
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50301 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60e80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc88e50
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50302 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60f00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc89060
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x50303 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc60f80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc89270
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70000 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x0
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61800
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b580
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70001 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61880
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b790
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70002 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61900
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8b9a0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70003 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x10000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61980
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bbb0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70100 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x10000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61a00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bdc0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70101 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61a80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8bfd0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70102 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61b00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c1e0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70103 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x30000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61b80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c3f0
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70200 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x30000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61c00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c600
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70201 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61c80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8c810
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70202 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61d00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8ca20
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70203 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0x70000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61d80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8cc30
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70300 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0x70000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61e00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8ce40
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70301 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61e80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d050
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70302 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61f00
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d260
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
NOTICE: [psci_smc_handler]:[408L] PSCI_CPU_ON_AARCH64 CALL
NOTICE: [psci_smc_handler]:[409L] x1=0x70303 x2=0xb531e0 x3=0x0
NOTICE: [P660_affinst_on]:[147L] P660_affinst_suspend PRIMARYCORE_CPUON_FLAG_ADDR e101a020
NOTICE: [scpi_set_css_power_state]:[120L] domain_cluster=0xf0000
NOTICE: [scpi_set_css_power_state]:[143L] domain_cluster=0xf0000
08096;04
NOTICE: [psci_afflvl_power_on_finish]:[504L]
NOTICE: [cm_prepare_el3_exit]:[262L] read_tpidr_el3 = 3fc61f80
NOTICE: [cm_prepare_el3_exit]:[319L] ctx add = 3fc8d470
NOTICE: [psci_afflvl_power_on_finish]:[562L]
00;531>0
[ 0.000000] Booting Linux on physical CPU 0x0000010000 [0x410fd082]
[ 0.000000] Linux version 4.19.269-cip88 (KernelCI@build-j740628-arm64-gcc-10-defconfig-hmg87) (gcc version 10.2.1 20210110 (Debian 10.2.1-6)) #1 SMP PREEMPT Fri Dec 23 23:06:09 UTC 2022
[ 0.000000] Machine model: Hisilicon Hip07 D05 Development Board
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: EFI v2.60 by EDK II
[ 0.000000] efi: SMBIOS=0x3f130000 SMBIOS 3.0=0x39d00000 ACPI=0x39dd0000 ACPI 2.0=0x39dd0014 MEMATTR=0x3cdf1018
[ 0.000000] cma: Reserved 32 MiB at 0x000000003d000000
[ 0.000000] OF: NUMA: parsing numa-distance-map-v1
[ 0.000000] NUMA: Warning: invalid memblk node 4 [mem 0x1040000000-0x1ffbffffff]
[ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x0000042ffbffffff]
[ 0.000000] NUMA: NODE_DATA [mem 0x42ffbfc2680-0x42ffbfc3e3f]
[ 0.000000] Zone ranges:
[ 0.000000] DMA32 [mem 0x0000000000000000-0x00000000ffffffff]
[ 0.000000] Normal [mem 0x0000000100000000-0x0000042ffbffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000031b4ffff]
[ 0.000000] node 0: [mem 0x0000000031b50000-0x0000000031b6ffff]
[ 0.000000] node 0: [mem 0x0000000031b70000-0x0000000031b7afff]
[ 0.000000] node 0: [mem 0x0000000031b7b000-0x0000000031b7efff]
[ 0.000000] node 0: [mem 0x0000000031b7f000-0x0000000039bfffff]
[ 0.000000] node 0: [mem 0x0000000039c00000-0x0000000039c4ffff]
[ 0.000000] node 0: [mem 0x0000000039c50000-0x0000000039c9ffff]
[ 0.000000] node 0: [mem 0x0000000039ca0000-0x0000000039caffff]
[ 0.000000] node 0: [mem 0x0000000039cb0000-0x0000000039ceffff]
[ 0.000000] node 0: [mem 0x0000000039cf0000-0x0000000039dbffff]
[ 0.000000] node 0: [mem 0x0000000039dc0000-0x0000000039ddffff]
[ 0.000000] node 0: [mem 0x0000000039de0000-0x000000003a13ffff]
[ 0.000000] node 0: [mem 0x000000003a140000-0x000000003f12ffff]
[ 0.000000] node 0: [mem 0x000000003f130000-0x000000003f15ffff]
[ 0.000000] node 0: [mem 0x000000003f160000-0x000000003fbfffff]
[ 0.000000] node 0: [mem 0x0000001040000000-0x0000001ffbffffff]
[ 0.000000] node 0: [mem 0x0000002000000000-0x0000002ffbffffff]
[ 0.000000] node 0: [mem 0x0000041000000000-0x0000041ffbffffff]
[ 0.000000] node 0: [mem 0x0000042000000000-0x0000042ffbffffff]
[ 0.000000] Zeroed struct page in unavailable ranges: 84 pages
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000042ffbffffff]
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.0 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] psci: SMC Calling Convention v1.0
[ 0.000000] percpu: Embedded 22 pages/cpu s52760 r8192 d29160 u90112
[ 0.000000] Detected PIPT I-cache on CPU0
[ 0.000000] ARM_SMCCC_ARCH_WORKAROUND_1 missing from firmware
[ 0.000000] CPU features: enabling workaround for EL2 vector hardening
[ 0.000000] CPU features: enabling workaround for Spectre-BHB
[ 0.000000] CPU features: enabling workaround for ARM erratum 1742098
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 65994768
[ 0.000000] Policy zone: Normal
[ 0.000000] Kernel command line: BOOT_IMAGE=(tftp,192.168.101.1)/8454828/tftp-deploy-9kk_79sy/kernel/Image pcie_aspm=off pci=pcie_bus_perf root=/dev/ram0 ip=:::::eth0:dhcp
[ 0.000000] log_buf_len individual max cpu contribution: 4096 bytes
[ 0.000000] log_buf_len total cpu_extra contributions: 258048 bytes
[ 0.000000] log_buf_len min size: 131072 bytes
[ 0.000000] log_buf_len: 524288 bytes
[ 0.000000] early log buf free: 126144(96%)
[ 0.000000] software IO TLB: mapped [mem 0x35c00000-0x39c00000] (64MB)
[ 0.000000] Memory: 263829872K/268169216K available (11132K kernel code, 1382K rwdata, 4960K rodata, 1280K init, 377K bss, 4306576K reserved, 32768K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=64, Nodes=1
[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[ 0.000000] GICv3: Distributor has no Range Selector support
[ 0.000000] GICv3: VLPI support, direct LPI support
[ 0.000000] ITS [mem 0x4c000000-0x4c03ffff]
[ 0.000000] ITS@0x000000004c000000: Using ITS number 0
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x000000004c000000: allocated 524288 Devices @42efa800000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x000000004c000000: allocated 65536 Virtual CPUs @42efb180000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x000000004c000000: allocated 512 Interrupt Collections @42efb129000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x6c000000-0x6c03ffff]
[ 0.000000] ITS@0x000000006c000000: Using ITS number 1
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x000000006c000000: allocated 524288 Devices @42efa400000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x000000006c000000: allocated 65536 Virtual CPUs @42efb200000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x000000006c000000: allocated 512 Interrupt Collections @42efb12a000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0xc6000000-0xc603ffff]
[ 0.000000] ITS@0x00000000c6000000: Using ITS number 2
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x00000000c6000000: allocated 524288 Devices @42efa000000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x00000000c6000000: allocated 65536 Virtual CPUs @42efb280000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x00000000c6000000: allocated 512 Interrupt Collections @42efb12d000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x8c6000000-0x8c603ffff]
[ 0.000000] ITS@0x00000008c6000000: Using ITS number 3
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x00000008c6000000: allocated 524288 Devices @42ef9c00000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x00000008c6000000: allocated 65536 Virtual CPUs @42efb300000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x00000008c6000000: allocated 512 Interrupt Collections @42efb12e000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x4004c000000-0x4004c03ffff]
[ 0.000000] ITS@0x000004004c000000: Using ITS number 4
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x000004004c000000: allocated 524288 Devices @42ef9800000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x000004004c000000: allocated 65536 Virtual CPUs @42efb380000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x000004004c000000: allocated 512 Interrupt Collections @42efb12f000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x4006c000000-0x4006c03ffff]
[ 0.000000] ITS@0x000004006c000000: Using ITS number 5
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x000004006c000000: allocated 524288 Devices @42ef9000000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x000004006c000000: allocated 65536 Virtual CPUs @42ef9480000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x000004006c000000: allocated 512 Interrupt Collections @42ef9410000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x400c6000000-0x400c603ffff]
[ 0.000000] ITS@0x00000400c6000000: Using ITS number 6
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x00000400c6000000: allocated 524288 Devices @42ef8c00000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x00000400c6000000: allocated 65536 Virtual CPUs @42ef9500000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x00000400c6000000: allocated 512 Interrupt Collections @42ef9412000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS [mem 0x408c6000000-0x408c603ffff]
[ 0.000000] ITS@0x00000408c6000000: Using ITS number 7
[ 0.000000] GIC: enabling workaround for ITS: Hip07 erratum 161600802
[ 0.000000] ITS@0x00000408c6000000: allocated 524288 Devices @42ef8800000 (flat, esz 8, psz 16K, shr 1)
[ 0.000000] ITS@0x00000408c6000000: allocated 65536 Virtual CPUs @42ef9580000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] ITS@0x00000408c6000000: allocated 512 Interrupt Collections @42ef9413000 (flat, esz 8, psz 4K, shr 1)
[ 0.000000] GIC: using LPI property table @0x0000042ef9440000
[ 0.000000] ITS: Using DirectLPI for VPE invalidation
[ 0.000000] ITS: Enabling GICv4 support
[ 0.000000] GICv3: CPU0: found redistributor 10000 region 0:0x000000004d100000
[ 0.000000] CPU0: using LPI pending table @0x0000042ef9450000
[ 0.000000] arch_timer: cp15 timer(s) running at 50.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0xb8812736b, max_idle_ns: 440795202655 ns
[ 0.000001] sched_clock: 56 bits at 50MHz, resolution 20ns, wraps every 4398046511100ns
[ 0.000155] Console: colour dummy device 80x25
[ 0.000425] console [tty0] enabled
[ 0.000474] Calibrating delay loop (skipped), value calculated using timer frequency.. 100.00 BogoMIPS (lpj=200000)
[ 0.000481] pid_max: default: 65536 minimum: 512
[ 0.000540] Security Framework initialized
[ 0.061826] Dentry cache hash table entries: 16777216 (order: 15, 134217728 bytes)
[ 0.092425] Inode-cache hash table entries: 8388608 (order: 14, 67108864 bytes)
[ 0.093453] Mount-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[ 0.094459] Mountpoint-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[ 0.112527] ASID allocator initialised with 32768 entries
[ 0.112575] rcu: Hierarchical SRCU implementation.
[ 0.112745] Platform MSI: interrupt-controller@4c000000 domain created
[ 0.112757] Platform MSI: interrupt-controller@6c000000 domain created
[ 0.112765] Platform MSI: interrupt-controller@c6000000 domain created
[ 0.112774] Platform MSI: interrupt-controller@8,c6000000 domain created
[ 0.112781] Platform MSI: interrupt-controller@400,4c000000 domain created
[ 0.112789] Platform MSI: interrupt-controller@400,6c000000 domain created
[ 0.112797] Platform MSI: interrupt-controller@400,c6000000 domain created
[ 0.112806] Platform MSI: interrupt-controller@408,c6000000 domain created
[ 0.112855] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@4c000000 domain created
[ 0.112863] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@6c000000 domain created
[ 0.112871] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@c6000000 domain created
[ 0.112879] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@8,c6000000 domain created
[ 0.112887] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,4c000000 domain created
[ 0.112895] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,6c000000 domain created
[ 0.112907] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@400,c6000000 domain created
[ 0.112915] PCI/MSI: /interrupt-controller@4d000000/interrupt-controller@408,c6000000 domain created
[ 0.113337] Remapping and enabling EFI services.
[ 0.115850] smp: Bringing up secondary CPUs ...
[ 0.166634] Detected PIPT I-cache on CPU1
[ 0.166646] GICv3: CPU1: found redistributor 10001 region 0:0x000000004d140000
[ 0.166714] CPU1: using LPI pending table @0x0000042eec100000
[ 0.166893] CPU1: Booted secondary processor 0x0000010001 [0x410fd082]
[ 0.218968] Detected PIPT I-cache on CPU2
[ 0.218974] GICv3: CPU2: found redistributor 10002 region 0:0x000000004d180000
[ 0.219040] CPU2: using LPI pending table @0x0000042eec110000
[ 0.219186] CPU2: Booted secondary processor 0x0000010002 [0x410fd082]
[ 0.271308] Detected PIPT I-cache on CPU3
[ 0.271314] GICv3: CPU3: found redistributor 10003 region 0:0x000000004d1c0000
[ 0.271382] CPU3: using LPI pending table @0x0000042eec140000
[ 0.271527] CPU3: Booted secondary processor 0x0000010003 [0x410fd082]
[ 0.323650] Detected PIPT I-cache on CPU4
[ 0.323658] GICv3: CPU4: found redistributor 10100 region 0:0x000000004d200000
[ 0.323724] CPU4: using LPI pending table @0x0000042eec190000
[ 0.323870] CPU4: Booted secondary processor 0x0000010100 [0x410fd082]
[ 0.375988] Detected PIPT I-cache on CPU5
[ 0.375995] GICv3: CPU5: found redistributor 10101 region 0:0x000000004d240000
[ 0.376062] CPU5: using LPI pending table @0x0000042eec1a0000
[ 0.376206] CPU5: Booted secondary processor 0x0000010101 [0x410fd082]
[ 0.428329] Detected PIPT I-cache on CPU6
[ 0.428336] GICv3: CPU6: found redistributor 10102 region 0:0x000000004d280000
[ 0.428402] CPU6: using LPI pending table @0x0000042eec1c0000
[ 0.428546] CPU6: Booted secondary processor 0x0000010102 [0x410fd082]
[ 0.480669] Detected PIPT I-cache on CPU7
[ 0.480676] GICv3: CPU7: found redistributor 10103 region 0:0x000000004d2c0000
[ 0.480742] CPU7: using LPI pending table @0x0000042eec210000
[ 0.480888] CPU7: Booted secondary processor 0x0000010103 [0x410fd082]
[ 0.533011] Detected PIPT I-cache on CPU8
[ 0.533019] GICv3: CPU8: found redistributor 10200 region 0:0x000000004d300000
[ 0.533086] CPU8: using LPI pending table @0x0000042eec220000
[ 0.533232] CPU8: Booted secondary processor 0x0000010200 [0x410fd082]
[ 0.585351] Detected PIPT I-cache on CPU9
[ 0.585358] GICv3: CPU9: found redistributor 10201 region 0:0x000000004d340000
[ 0.585422] CPU9: using LPI pending table @0x0000042eec250000
[ 0.585566] CPU9: Booted secondary processor 0x0000010201 [0x410fd082]
[ 0.637691] Detected PIPT I-cache on CPU10
[ 0.637698] GICv3: CPU10: found redistributor 10202 region 0:0x000000004d380000
[ 0.637764] CPU10: using LPI pending table @0x0000042eec2a0000
[ 0.637909] CPU10: Booted secondary processor 0x0000010202 [0x410fd082]
[ 0.690031] Detected PIPT I-cache on CPU11
[ 0.690039] GICv3: CPU11: found redistributor 10203 region 0:0x000000004d3c0000
[ 0.690105] CPU11: using LPI pending table @0x0000042eec2b0000
[ 0.690249] CPU11: Booted secondary processor 0x0000010203 [0x410fd082]
[ 0.742373] Detected PIPT I-cache on CPU12
[ 0.742382] GICv3: CPU12: found redistributor 10300 region 0:0x000000004d400000
[ 0.742449] CPU12: using LPI pending table @0x0000042eec2d0000
[ 0.742595] CPU12: Booted secondary processor 0x0000010300 [0x410fd082]
[ 0.794712] Detected PIPT I-cache on CPU13
[ 0.794720] GICv3: CPU13: found redistributor 10301 region 0:0x000000004d440000
[ 0.794786] CPU13: using LPI pending table @0x0000042eec320000
[ 0.794930] CPU13: Booted secondary processor 0x0000010301 [0x410fd082]
[ 0.847053] Detected PIPT I-cache on CPU14
[ 0.847061] GICv3: CPU14: found redistributor 10302 region 0:0x000000004d480000
[ 0.847128] CPU14: using LPI pending table @0x0000042eec340000
[ 0.847274] CPU14: Booted secondary processor 0x0000010302 [0x410fd082]
[ 0.899393] Detected PIPT I-cache on CPU15
[ 0.899400] GICv3: CPU15: found redistributor 10303 region 0:0x000000004d4c0000
[ 0.899467] CPU15: using LPI pending table @0x0000042eec360000
[ 0.899612] CPU15: Booted secondary processor 0x0000010303 [0x410fd082]
[ 0.951391] Detected PIPT I-cache on CPU16
[ 0.951403] GICv3: CPU16: found redistributor 30000 region 1:0x000000006d100000
[ 0.951475] CPU16: using LPI pending table @0x0000042eec3b0000
[ 0.951669] CPU16: Booted secondary processor 0x0000030000 [0x410fd082]
[ 1.003728] Detected PIPT I-cache on CPU17
[ 1.003738] GICv3: CPU17: found redistributor 30001 region 1:0x000000006d140000
[ 1.003808] CPU17: using LPI pending table @0x0000042eec3c0000
[ 1.003998] CPU17: Booted secondary processor 0x0000030001 [0x410fd082]
[ 1.056069] Detected PIPT I-cache on CPU18
[ 1.056078] GICv3: CPU18: found redistributor 30002 region 1:0x000000006d180000
[ 1.056150] CPU18: using LPI pending table @0x0000042eec3e0000
[ 1.056337] CPU18: Booted secondary processor 0x0000030002 [0x410fd082]
[ 1.108410] Detected PIPT I-cache on CPU19
[ 1.108419] GICv3: CPU19: found redistributor 30003 region 1:0x000000006d1c0000
[ 1.108491] CPU19: using LPI pending table @0x0000042eebc40000
[ 1.108681] CPU19: Booted secondary processor 0x0000030003 [0x410fd082]
[ 1.160753] Detected PIPT I-cache on CPU20
[ 1.160766] GICv3: CPU20: found redistributor 30100 region 1:0x000000006d200000
[ 1.160838] CPU20: using LPI pending table @0x0000042eebc50000
[ 1.161031] CPU20: Booted secondary processor 0x0000030100 [0x410fd082]
[ 1.213090] Detected PIPT I-cache on CPU21
[ 1.213100] GICv3: CPU21: found redistributor 30101 region 1:0x000000006d240000
[ 1.213171] CPU21: using LPI pending table @0x0000042eebc70000
[ 1.213361] CPU21: Booted secondary processor 0x0000030101 [0x410fd082]
[ 1.265431] Detected PIPT I-cache on CPU22
[ 1.265441] GICv3: CPU22: found redistributor 30102 region 1:0x000000006d280000
[ 1.265515] CPU22: using LPI pending table @0x0000042eebcc0000
[ 1.265703] CPU22: Booted secondary processor 0x0000030102 [0x410fd082]
[ 1.317771] Detected PIPT I-cache on CPU23
[ 1.317781] GICv3: CPU23: found redistributor 30103 region 1:0x000000006d2c0000
[ 1.317850] CPU23: using LPI pending table @0x0000042eebce0000
[ 1.318039] CPU23: Booted secondary processor 0x0000030103 [0x410fd082]
[ 1.370115] Detected PIPT I-cache on CPU24
[ 1.370128] GICv3: CPU24: found redistributor 30200 region 1:0x000000006d300000
[ 1.370199] CPU24: using LPI pending table @0x0000042eebcf0000
[ 1.370395] CPU24: Booted secondary processor 0x0000030200 [0x410fd082]
[ 1.422452] Detected PIPT I-cache on CPU25
[ 1.422462] GICv3: CPU25: found redistributor 30201 region 1:0x000000006d340000
[ 1.422533] CPU25: using LPI pending table @0x0000042eebd50000
[ 1.422723] CPU25: Booted secondary processor 0x0000030201 [0x410fd082]
[ 1.474793] Detected PIPT I-cache on CPU26
[ 1.474803] GICv3: CPU26: found redistributor 30202 region 1:0x000000006d380000
[ 1.474875] CPU26: using LPI pending table @0x0000042eebd60000
[ 1.475066] CPU26: Booted secondary processor 0x0000030202 [0x410fd082]
[ 1.527133] Detected PIPT I-cache on CPU27
[ 1.527143] GICv3: CPU27: found redistributor 30203 region 1:0x000000006d3c0000
[ 1.527216] CPU27: using LPI pending table @0x0000042eebd80000
[ 1.527406] CPU27: Booted secondary processor 0x0000030203 [0x410fd082]
[ 1.579477] Detected PIPT I-cache on CPU28
[ 1.579490] GICv3: CPU28: found redistributor 30300 region 1:0x000000006d400000
[ 1.579561] CPU28: using LPI pending table @0x0000042eebde0000
[ 1.579758] CPU28: Booted secondary processor 0x0000030300 [0x410fd082]
[ 1.631815] Detected PIPT I-cache on CPU29
[ 1.631825] GICv3: CPU29: found redistributor 30301 region 1:0x000000006d440000
[ 1.631897] CPU29: using LPI pending table @0x0000042eebdf0000
[ 1.632089] CPU29: Booted secondary processor 0x0000030301 [0x410fd082]
[ 1.684154] Detected PIPT I-cache on CPU30
[ 1.684164] GICv3: CPU30: found redistributor 30302 region 1:0x000000006d480000
[ 1.684234] CPU30: using LPI pending table @0x0000042eebe10000
[ 1.684425] CPU30: Booted secondary processor 0x0000030302 [0x410fd082]
[ 1.736495] Detected PIPT I-cache on CPU31
[ 1.736505] GICv3: CPU31: found redistributor 30303 region 1:0x000000006d4c0000
[ 1.736578] CPU31: using LPI pending table @0x0000042eebe60000
[ 1.736769] CPU31: Booted secondary processor 0x0000030303 [0x410fd082]
[ 1.788523] Detected PIPT I-cache on CPU32
[ 1.788565] GICv3: CPU32: found redistributor 50000 region 2:0x000004004d100000
[ 1.788608] CPU32: using LPI pending table @0x0000042eebe70000
[ 1.788849] CPU32: Booted secondary processor 0x0000050000 [0x410fd082]
[ 1.840842] Detected PIPT I-cache on CPU33
[ 1.840866] GICv3: CPU33: found redistributor 50001 region 2:0x000004004d140000
[ 1.840903] CPU33: using LPI pending table @0x0000042eebe90000
[ 1.841083] CPU33: Booted secondary processor 0x0000050001 [0x410fd082]
[ 1.893182] Detected PIPT I-cache on CPU34
[ 1.893206] GICv3: CPU34: found redistributor 50002 region 2:0x000004004d180000
[ 1.893243] CPU34: using LPI pending table @0x0000042eebef0000
[ 1.893423] CPU34: Booted secondary processor 0x0000050002 [0x410fd082]
[ 1.945523] Detected PIPT I-cache on CPU35
[ 1.945547] GICv3: CPU35: found redistributor 50003 region 2:0x000004004d1c0000
[ 1.945584] CPU35: using LPI pending table @0x0000042eebf00000
[ 1.945765] CPU35: Booted secondary processor 0x0000050003 [0x410fd082]
[ 1.997864] Detected PIPT I-cache on CPU36
[ 1.997889] GICv3: CPU36: found redistributor 50100 region 2:0x000004004d200000
[ 1.997927] CPU36: using LPI pending table @0x0000042eebf20000
[ 1.998112] CPU36: Booted secondary processor 0x0000050100 [0x410fd082]
[ 2.050205] Detected PIPT I-cache on CPU37
[ 2.050229] GICv3: CPU37: found redistributor 50101 region 2:0x000004004d240000
[ 2.050266] CPU37: using LPI pending table @0x0000042eebf70000
[ 2.050447] CPU37: Booted secondary processor 0x0000050101 [0x410fd082]
[ 2.102545] Detected PIPT I-cache on CPU38
[ 2.102569] GICv3: CPU38: found redistributor 50102 region 2:0x000004004d280000
[ 2.102605] CPU38: using LPI pending table @0x0000042eebf80000
[ 2.102787] CPU38: Booted secondary processor 0x0000050102 [0x410fd082]
[ 2.154884] Detected PIPT I-cache on CPU39
[ 2.154908] GICv3: CPU39: found redistributor 50103 region 2:0x000004004d2c0000
[ 2.154945] CPU39: using LPI pending table @0x0000042eebfb0000
[ 2.155125] CPU39: Booted secondary processor 0x0000050103 [0x410fd082]
[ 2.207227] Detected PIPT I-cache on CPU40
[ 2.207253] GICv3: CPU40: found redistributor 50200 region 2:0x000004004d300000
[ 2.207292] CPU40: using LPI pending table @0x0000042eeb800000
[ 2.207477] CPU40: Booted secondary processor 0x0000050200 [0x410fd082]
[ 2.259565] Detected PIPT I-cache on CPU41
[ 2.259590] GICv3: CPU41: found redistributor 50201 region 2:0x000004004d340000
[ 2.259626] CPU41: using LPI pending table @0x0000042eeb810000
[ 2.259810] CPU41: Booted secondary processor 0x0000050201 [0x410fd082]
[ 2.311905] Detected PIPT I-cache on CPU42
[ 2.311929] GICv3: CPU42: found redistributor 50202 region 2:0x000004004d380000
[ 2.311967] CPU42: using LPI pending table @0x0000042eeb830000
[ 2.312151] CPU42: Booted secondary processor 0x0000050202 [0x410fd082]
[ 2.364247] Detected PIPT I-cache on CPU43
[ 2.364271] GICv3: CPU43: found redistributor 50203 region 2:0x000004004d3c0000
[ 2.364309] CPU43: using LPI pending table @0x0000042eeb880000
[ 2.364493] CPU43: Booted secondary processor 0x0000050203 [0x410fd082]
[ 2.416588] Detected PIPT I-cache on CPU44
[ 2.416614] GICv3: CPU44: found redistributor 50300 region 2:0x000004004d400000
[ 2.416651] CPU44: using LPI pending table @0x0000042eeb890000
[ 2.416838] CPU44: Booted secondary processor 0x0000050300 [0x410fd082]
[ 2.468927] Detected PIPT I-cache on CPU45
[ 2.468951] GICv3: CPU45: found redistributor 50301 region 2:0x000004004d440000
[ 2.468989] CPU45: using LPI pending table @0x0000042eeb8c0000
[ 2.469172] CPU45: Booted secondary processor 0x0000050301 [0x410fd082]
[ 2.521267] Detected PIPT I-cache on CPU46
[ 2.521292] GICv3: CPU46: found redistributor 50302 region 2:0x000004004d480000
[ 2.521329] CPU46: using LPI pending table @0x0000042eeb910000
[ 2.521515] CPU46: Booted secondary processor 0x0000050302 [0x410fd082]
[ 2.573607] Detected PIPT I-cache on CPU47
[ 2.573632] GICv3: CPU47: found redistributor 50303 region 2:0x000004004d4c0000
[ 2.573668] CPU47: using LPI pending table @0x0000042eeb920000
[ 2.573853] CPU47: Booted secondary processor 0x0000050303 [0x410fd082]
[ 2.625606] Detected PIPT I-cache on CPU48
[ 2.625636] GICv3: CPU48: found redistributor 70000 region 3:0x000004006d100000
[ 2.625664] CPU48: using LPI pending table @0x0000042eeb940000
[ 2.625812] CPU48: Booted secondary processor 0x0000070000 [0x410fd082]
[ 2.677944] Detected PIPT I-cache on CPU49
[ 2.677972] GICv3: CPU49: found redistributor 70001 region 3:0x000004006d140000
[ 2.677998] CPU49: using LPI pending table @0x0000042eeb990000
[ 2.678142] CPU49: Booted secondary processor 0x0000070001 [0x410fd082]
[ 2.730284] Detected PIPT I-cache on CPU50
[ 2.730311] GICv3: CPU50: found redistributor 70002 region 3:0x000004006d180000
[ 2.730338] CPU50: using LPI pending table @0x0000042eeb9b0000
[ 2.730481] CPU50: Booted secondary processor 0x0000070002 [0x410fd082]
[ 2.782625] Detected PIPT I-cache on CPU51
[ 2.782653] GICv3: CPU51: found redistributor 70003 region 3:0x000004006d1c0000
[ 2.782680] CPU51: using LPI pending table @0x0000042eeb9d0000
[ 2.782824] CPU51: Booted secondary processor 0x0000070003 [0x410fd082]
[ 2.834967] Detected PIPT I-cache on CPU52
[ 2.834997] GICv3: CPU52: found redistributor 70100 region 3:0x000004006d200000
[ 2.835025] CPU52: using LPI pending table @0x0000042eeba20000
[ 2.835174] CPU52: Booted secondary processor 0x0000070100 [0x410fd082]
[ 2.887305] Detected PIPT I-cache on CPU53
[ 2.887333] GICv3: CPU53: found redistributor 70101 region 3:0x000004006d240000
[ 2.887359] CPU53: using LPI pending table @0x0000042eeba30000
[ 2.887501] CPU53: Booted secondary processor 0x0000070101 [0x410fd082]
[ 2.939646] Detected PIPT I-cache on CPU54
[ 2.939673] GICv3: CPU54: found redistributor 70102 region 3:0x000004006d280000
[ 2.939700] CPU54: using LPI pending table @0x0000042eeba50000
[ 2.939845] CPU54: Booted secondary processor 0x0000070102 [0x410fd082]
[ 2.991986] Detected PIPT I-cache on CPU55
[ 2.992014] GICv3: CPU55: found redistributor 70103 region 3:0x000004006d2c0000
[ 2.992041] CPU55: using LPI pending table @0x0000042eebab0000
[ 2.992184] CPU55: Booted secondary processor 0x0000070103 [0x410fd082]
[ 3.044329] Detected PIPT I-cache on CPU56
[ 3.044359] GICv3: CPU56: found redistributor 70200 region 3:0x000004006d300000
[ 3.044385] CPU56: using LPI pending table @0x0000042eebac0000
[ 3.044535] CPU56: Booted secondary processor 0x0000070200 [0x410fd082]
[ 3.096666] Detected PIPT I-cache on CPU57
[ 3.096694] GICv3: CPU57: found redistributor 70201 region 3:0x000004006d340000
[ 3.096722] CPU57: using LPI pending table @0x0000042eebae0000
[ 3.096867] CPU57: Booted secondary processor 0x0000070201 [0x410fd082]
[ 3.149007] Detected PIPT I-cache on CPU58
[ 3.149036] GICv3: CPU58: found redistributor 70202 region 3:0x000004006d380000
[ 3.149063] CPU58: using LPI pending table @0x0000042eebb30000
[ 3.149205] CPU58: Booted secondary processor 0x0000070202 [0x410fd082]
[ 3.201348] Detected PIPT I-cache on CPU59
[ 3.201376] GICv3: CPU59: found redistributor 70203 region 3:0x000004006d3c0000
[ 3.201404] CPU59: using LPI pending table @0x0000042eebb50000
[ 3.201546] CPU59: Booted secondary processor 0x0000070203 [0x410fd082]
[ 3.253691] Detected PIPT I-cache on CPU60
[ 3.253722] GICv3: CPU60: found redistributor 70300 region 3:0x000004006d400000
[ 3.253749] CPU60: using LPI pending table @0x0000042eebb60000
[ 3.253898] CPU60: Booted secondary processor 0x0000070300 [0x410fd082]
[ 3.306028] Detected PIPT I-cache on CPU61
[ 3.306056] GICv3: CPU61: found redistributor 70301 region 3:0x000004006d440000
[ 3.306083] CPU61: using LPI pending table @0x0000042eebbc0000
[ 3.306225] CPU61: Booted secondary processor 0x0000070301 [0x410fd082]
[ 3.358368] Detected PIPT I-cache on CPU62
[ 3.358397] GICv3: CPU62: found redistributor 70302 region 3:0x000004006d480000
[ 3.358423] CPU62: using LPI pending table @0x0000042eebbd0000
[ 3.358566] CPU62: Booted secondary processor 0x0000070302 [0x410fd082]
[ 3.410709] Detected PIPT I-cache on CPU63
[ 3.410738] GICv3: CPU63: found redistributor 70303 region 3:0x000004006d4c0000
[ 3.410764] CPU63: using LPI pending table @0x0000042eebbf0000
[ 3.410907] CPU63: Booted secondary processor 0x0000070303 [0x410fd082]
[ 3.410980] smp: Brought up 1 node, 64 CPUs
[ 3.411524] SMP: Total of 64 processors activated.
[ 3.411529] CPU features: detected: GIC system register CPU interface
[ 3.411533] CPU features: detected: 32-bit EL0 Support
[ 3.413028] CPU: All CPU(s) started at EL2
[ 3.413157] alternatives: patching kernel code
[ 3.414338] devtmpfs: initialized
[ 3.416727] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 3.416905] futex hash table entries: 16384 (order: 8, 1048576 bytes)
[ 3.418225] pinctrl core: initialized pinctrl subsystem
[ 3.418834] SMBIOS 3.0.0 present.
[ 3.418843] DMI: Huawei TaiShan 2280 /D05, BIOS Hisilicon D05 UEFI 16.12 Release 05/15/2017
[ 3.419098] NET: Registered protocol family 16
[ 3.420014] audit: initializing netlink subsys (disabled)
[ 3.420092] audit: type=2000 audit(1.632:1): state=initialized audit_enabled=0 res=1
[ 3.420774] cpuidle: using governor menu
[ 3.420985] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 3.422138] DMA: preallocated 256 KiB pool for atomic allocations
[ 3.422530] Serial: AMBA PL011 UART driver
[ 3.432963] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 3.433205] cryptd: max_cpu_qlen set to 1000
[ 3.433603] ACPI: Interpreter disabled.
[ 3.433915] vgaarb: loaded
[ 3.434089] SCSI subsystem initialized
[ 3.434274] usbcore: registered new interface driver usbfs
[ 3.434295] usbcore: registered new interface driver hub
[ 3.434332] usbcore: registered new device driver usb
[ 3.434566] pps_core: LinuxPPS API ver. 1 registered
[ 3.434570] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 3.434582] PTP clock support registered
[ 3.434625] EDAC MC: Ver: 3.0.0
[ 3.434814] Registered efivars operations
[ 3.435083] Advanced Linux Sound Architecture Driver Initialized.
[ 3.435506] clocksource: Switched to clocksource arch_sys_counter
[ 3.435577] VFS: Disk quotas dquot_6.6.0
[ 3.435601] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 3.435671] pnp: PnP ACPI: disabled
[ 3.438247] NET: Registered protocol family 2
[ 3.439646] IP idents hash table entries: 262144 (order: 9, 2097152 bytes)
[ 3.442179] tcp_listen_portaddr_hash hash table entries: 65536 (order: 8, 1048576 bytes)
[ 3.442952] TCP established hash table entries: 524288 (order: 10, 4194304 bytes)
[ 3.444301] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
[ 3.445047] TCP: Hash tables configured (established 524288 bind 65536)
[ 3.445488] UDP hash table entries: 65536 (order: 9, 2097152 bytes)
[ 3.446306] UDP-Lite hash table entries: 65536 (order: 9, 2097152 bytes)
[ 3.447055] NET: Registered protocol family 1
[ 3.447325] RPC: Registered named UNIX socket transport module.
[ 3.447330] RPC: Registered udp transport module.
[ 3.447333] RPC: Registered tcp transport module.
[ 3.447336] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 3.447384] Unpacking initramfs...
[ 3.737971] Freeing initrd memory: 14804K
[ 3.741180] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[ 3.741492] kvm [1]: 8-bit VMID
[ 3.742092] kvm [1]: GICv4 support disabled
[ 3.742096] kvm [1]: vgic-v2@fe020000
[ 3.742124] kvm [1]: GIC system register CPU interface enabled
[ 3.742923] kvm [1]: vgic interrupt IRQ1
[ 3.743682] kvm [1]: Hyp mode initialized successfully
[ 3.747220] Initialise system trusted keyrings
[ 3.747306] workingset: timestamp_bits=44 max_order=26 bucket_order=0
[ 3.749952] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 3.750255] NFS: Registering the id_resolver key type
[ 3.750266] Key type id_resolver registered
[ 3.750270] Key type id_legacy registered
[ 3.750276] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 3.750280] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
[ 3.750336] 9p: Installing v9fs 9p2000 file system support
[ 3.752157] Key type asymmetric registered
[ 3.752162] Asymmetric key parser 'x509' registered
[ 3.752183] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
[ 3.752188] io scheduler noop registered
[ 3.752192] io scheduler deadline registered
[ 3.752239] io scheduler cfq registered (default)
[ 3.752243] io scheduler mq-deadline registered
[ 3.752246] io scheduler kyber registered
[ 3.754833] hisi-lpc a01b0000.isa: registered range [0x0000000000ffbfff - 0x0000000000ffffff]
[ 3.757393] hisi-pcie-almost-ecam af800000.pcie: host bridge /soc/pcie@a00a0000 ranges:
[ 3.757403] hisi-pcie-almost-ecam af800000.pcie: MEM 0xa8000000..0xaf7effff -> 0xa8000000
[ 3.757411] hisi-pcie-almost-ecam af800000.pcie: IO 0xaf7f0000..0xaf7fffff -> 0x00000000
[ 3.757485] hisi-pcie-almost-ecam af800000.pcie: ECAM at [mem 0xaf800000-0xafffffff] for [bus f8-ff]
[ 3.757533] hisi-pcie-almost-ecam af800000.pcie: PCI host bridge to bus 0000:f8
[ 3.757539] pci_bus 0000:f8: root bus resource [bus f8-ff]
[ 3.757544] pci_bus 0000:f8: root bus resource [mem 0xa8000000-0xaf7effff]
[ 3.757548] pci_bus 0000:f8: root bus resource [io 0x0000-0xffff]
[ 3.757570] pci_bus 0000:f8: 2-byte config write to 0000:f8:00.0 offset 0x4 may corrupt adjacent RW1C bits
[ 3.758311] pci 0000:f8:00.0: bridge configuration invalid ([bus 81-81]), reconfiguring
[ 3.810040] pci 0000:f8:00.0: BAR 0: assigned [mem 0xa8000000-0xa800ffff]
[ 3.810047] pci 0000:f8:00.0: PCI bridge to [bus f9]
[ 3.810060] pci 0000:f8:00.0: Max Payload Size set to 512/ 512 (was 128), Max Read Rq 512
[ 3.810402] EINJ: ACPI disabled.
[ 3.813777] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[ 3.814474] SuperH (H)SCI(F) driver initialized
[ 3.814603] msm_serial: driver initialized
[ 3.814771] arm-smmu-v3 d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd
[ 3.814883] arm-smmu-v3 d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d)
[ 3.818422] arm-smmu-v3 8d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd
[ 3.818513] arm-smmu-v3 8d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d)
[ 3.821924] arm-smmu-v3 400d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd
[ 3.822012] arm-smmu-v3 400d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d)
[ 3.825453] arm-smmu-v3 408d0040000.smmu_alg: option hisilicon,broken-prefetch-cmd
[ 3.825548] arm-smmu-v3 408d0040000.smmu_alg: ias 44-bit, oas 44-bit (features 0x00000f0d)
[ 3.846094] loop: module loaded
[ 3.863128] scsi host0: hisi_sas_v2_hw
[ 4.492186] hisi_sas_v2_hw a2000000.sas: phyup: phy0 link_rate=11
[ 4.492205] hisi_sas_v2_hw a2000000.sas: phyup: phy1 link_rate=11
[ 4.492435] hisi_sas_v2_hw a2000000.sas: dev[0:2] found
[ 4.495733] hisi_sas_v2_hw a2000000.sas: dev[2:5] found
[ 4.497184] hisi_sas_v2_hw a2000000.sas: phyup: phy2 link_rate=11
[ 4.497195] hisi_sas_v2_hw a2000000.sas: phyup: phy3 link_rate=11
[ 4.497206] hisi_sas_v2_hw a2000000.sas: phyup: phy4 link_rate=11
[ 4.497218] hisi_sas_v2_hw a2000000.sas: phyup: phy5 link_rate=11
[ 4.497229] hisi_sas_v2_hw a2000000.sas: phyup: phy6 link_rate=11
[ 4.497240] hisi_sas_v2_hw a2000000.sas: phyup: phy7 link_rate=11
[ 4.498016] hisi_sas_v2_hw a2000000.sas: dev[4:5] found
[ 4.500474] hisi_sas_v2_hw a2000000.sas: dev[1:1] found
[ 4.776790] ata1.00: ATA-8: MG04ACA400N, FJ3J, max UDMA/100
[ 4.776805] ata1.00: 7814037168 sectors, multi 16: LBA48 NCQ (depth 32)
[ 4.779445] ata1.00: configured for UDMA/100
[ 4.795347] ata2.00: ATA-8: MG04ACA400N, FJ3J, max UDMA/100
[ 4.795354] ata2.00: 7814037168 sectors, multi 16: LBA48 NCQ (depth 32)
[ 4.797993] ata2.00: configured for UDMA/100
[ 4.800505] scsi 0:0:0:0: Direct-Access ATA MG04ACA400N FJ3J PQ: 0 ANSI: 5
[ 4.800736] sd 0:0:0:0: [sda] 7814037168 512-byte logical blocks: (4.00 TB/3.64 TiB)
[ 4.800755] sd 0:0:0:0: [sda] Write Protect is off
[ 4.800773] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 4.801679] scsi 0:0:1:0: Direct-Access ATA MG04ACA400N FJ3J PQ: 0 ANSI: 5
[ 4.801879] sd 0:0:1:0: [sdb] 7814037168 512-byte logical blocks: (4.00 TB/3.64 TiB)
[ 4.801897] sd 0:0:1:0: [sdb] Write Protect is off
[ 4.801913] sd 0:0:1:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[ 4.803472] scsi 0:0:2:0: Enclosure 12G SAS Expander RevB PQ: 0 ANSI: 6
[ 4.803588] scsi 0:0:2:0: Power-on or device reset occurred
[ 4.819403] sd 0:0:1:0: [sdb] Attached SCSI disk
[ 4.842337] sda: sda1 sda2 sda3
[ 4.843356] sd 0:0:0:0: [sda] Attached SCSI disk
[ 5.005133] tun: Universal TUN/TAP device driver, 1.6
[ 5.005416] thunder_xcv, ver 1.0
[ 5.005437] thunder_bgx, ver 1.0
[ 5.005458] nicpf, ver 1.0
[ 5.364067] mdio_bus Mii-603c0000.mdio: MDIO reset fail
[ 6.171803] hns-nic soc:ethernet@4: No valid mac, use random mac 5e:21:05:8b:a2:b7
[ 6.248561] hns-nic soc:ethernet@5: No valid mac, use random mac d6:2d:b0:8b:b1:68
[ 6.324498] hns-nic soc:ethernet@0: No valid mac, use random mac ce:71:1c:ba:4f:9d
[ 6.330740] hns-nic soc:ethernet@1: No valid mac, use random mac 16:64:fe:2c:ac:01
[ 6.336941] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 6.336948] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 6.336982] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
[ 6.336986] igb: Copyright (c) 2007-2014 Intel Corporation.
[ 6.337006] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
[ 6.337011] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[ 6.337191] sky2: driver version 1.30
[ 6.337466] VFIO - User Level meta-driver version: 0.3
[ 6.337961] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 6.337966] ehci-pci: EHCI PCI platform driver
[ 6.337980] ehci-platform: EHCI generic platform driver
[ 6.338071] ehci-platform a7020000.ehci: EHCI Host Controller
[ 6.338081] ehci-platform a7020000.ehci: new USB bus registered, assigned bus number 1
[ 6.338292] ehci-platform a7020000.ehci: irq 339, io mem 0xa7020000
[ 6.351495] ehci-platform a7020000.ehci: USB 2.0 started, EHCI 1.00
[ 6.351695] hub 1-0:1.0: USB hub found
[ 6.351706] hub 1-0:1.0: 2 ports detected
[ 6.351865] ehci-orion: EHCI orion driver
[ 6.351906] ehci-exynos: EHCI EXYNOS driver
[ 6.351938] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 6.351952] ohci-pci: OHCI PCI platform driver
[ 6.351971] ohci-platform: OHCI generic platform driver
[ 6.352041] ohci-platform a7030000.ohci: Generic Platform OHCI controller
[ 6.352050] ohci-platform a7030000.ohci: new USB bus registered, assigned bus number 2
[ 6.352142] ohci-platform a7030000.ohci: irq 340, io mem 0xa7030000
[ 6.415681] hub 2-0:1.0: USB hub found
[ 6.415694] hub 2-0:1.0: 2 ports detected
[ 6.415843] ohci-exynos: OHCI EXYNOS driver
[ 6.416019] usbcore: registered new interface driver usb-storage
[ 6.480011] i2c /dev entries driver
[ 6.481415] sdhci: Secure Digital Host Controller Interface driver
[ 6.481420] sdhci: Copyright(c) Pierre Ossman
[ 6.481522] Synopsys Designware Multimedia Card Interface Driver
[ 6.481814] sdhci-pltfm: SDHCI platform and OF driver helper
[ 6.483233] ledtrig-cpu: registered to indicate activity on CPUs
[ 6.483691] usbcore: registered new interface driver usbhid
[ 6.483696] usbhid: USB HID core driver
[ 6.484677] NET: Registered protocol family 17
[ 6.484749] 9pnet: Installing 9P2000 support
[ 6.484777] Key type dns_resolver registered
[ 6.484978] registered taskstats version 1
[ 6.484983] Loading compiled-in X.509 certificates
[ 6.485172] 602b0000.uart: ttyAMA0 at MMIO 0x602b0000 (irq = 341, base_baud = 0) is a SBSA
[ 6.607493] usb 1-1: new high-speed USB device number 2 using ehci-platform
[ 6.610803] console [ttyAMA0] enabled
[ 6.772094] hub 1-1:1.0: USB hub found
[ 6.776405] hctosys: unable to open rtc device (rtc0)
[ 6.786298] hub 1-1:1.0: 4 ports detected
[ 10.207490] usb 1-2: new high-speed USB device number 3 using ehci-platform
[ 10.257509] hns-nic soc:ethernet@4 eth0: link up
[ 10.279488] Sending DHCP requests .
[ 10.367962] hub 1-2:1.0: USB hub found
[ 10.375308] hub 1-2:1.0: 4 ports detected
[ 10.447489] usb 1-1.1: new low-speed USB device number 4 using ehci-platform
[ 10.535488] usb 1-1.1: device descriptor read/64, error -32
[ 10.727488] usb 1-1.1: device descriptor read/64, error -32
[ 10.919487] usb 1-1.1: new low-speed USB device number 5 using ehci-platform
[ 11.007487] usb 1-1.1: device descriptor read/64, error -32
[ 11.199487] usb 1-1.1: device descriptor read/64, error -32
[ 11.311557] usb 1-1-port1: attempt power cycle
[ 11.391490] usb 1-2.1: new full-speed USB device number 6 using ehci-platform
[ 11.507873] input: Keyboard/Mouse KVM 1.1.0 as /devices/platform/soc/a7020000.ehci/usb1/1-2/1-2.1/1-2.1:1.0/0003:12D1:0003.0001/input/input0
[ 11.579696] hid-generic 0003:12D1:0003.0001: input: USB HID v1.10 Keyboard [Keyboard/Mouse KVM 1.1.0] on usb-a7020000.ehci-2.1/input0
[ 11.592631] input: Keyboard/Mouse KVM 1.1.0 as /devices/platform/soc/a7020000.ehci/usb1/1-2/1-2.1/1-2.1:1.1/0003:12D1:0003.0002/input/input1
[ 11.605274] hid-generic 0003:12D1:0003.0002: input: USB HID v1.10 Mouse [Keyboard/Mouse KVM 1.1.0] on usb-a7020000.ehci-2.1/input1
[ 11.919488] usb 1-1.1: new low-speed USB device number 7 using ehci-platform
[ 12.339488] usb 1-1.1: device not accepting address 7, error -32
[ 12.423487] usb 1-1.1: new low-speed USB device number 8 using ehci-platform
[ 12.431486] .
[ 12.843488] usb 1-1.1: device not accepting address 8, error -32
[ 12.851182] usb 1-1-port1: unable to enumerate USB device
[ 13.335487] , OK
[ 13.481347] IP-Config: Got DHCP answer from 192.168.101.1, my address is 192.168.101.224
[ 13.489433] IP-Config: Complete:
[ 13.492654] device=eth0, hwaddr=5e:21:05:8b:a2:b7, ipaddr=192.168.101.224, mask=255.255.255.0, gw=192.168.101.1
[ 13.503167] host=192.168.101.224, domain=lava.cbg.collabora.co.uk, nis-domain=(none)
[ 13.511337] bootserver=192.168.101.1, rootserver=192.168.101.1, rootpath=
[ 13.511338] nameserver0=192.168.101.1
[ 13.522695] ALSA device list:
[ 13.525657] No soundcards found.
[ 13.529623] Freeing unused kernel memory: 1280K
[ 13.534378] Run /init as init process
Starting syslogd: OK
Starting klogd: OK
Running sysctl: OK
Populating /dev using udev: [ 13.575347] udevd[2232]: starting version 3.2.9
[ 13.580183] random: udevd: uninitialized urandom read (16 bytes read)
[ 13.586699] random: udevd: uninitialized urandom read (16 bytes read)
[ 13.593152] random: udevd: uninitialized urandom read (16 bytes read)
[ 13.601158] udevd[2232]: specified user 'tss' unknown
[ 13.606232] udevd[2232]: specified group 'tss' unknown
[ 13.612156] udevd[2233]: starting eudev-3.2.9
done
Saving random seed: OK
Starting network: ip: RTNETLINK answers: File exists
FAIL
Starting dropbear sshd: [ 14.046650] NET: Registered protocol family 10
[ 14.052336] Segment Routing with IPv6
OK
/bin/sh: can't access tty; job control turned off
/ #
/ # #
#
/ # export SHELL=/bin/sh
export SHELL=/bin/sh
/ # . /lava-8454828/environment
. /lava-8454828/environment
/ # /lava-8454828/bin/lava-test-runner /lava-8454828/0
/lava-8454828/bin/lava-test-runner /lava-8454828/0
+ export 'TESTRUN_ID=0_dmesg'
+ cd /lava-84[ 14.793289] <LAVA_SIGNAL_STARTRUN 0_dmesg 8454828_1.5.2.3.1>
54828/0/tests/0_dmesg
+ cat uuid
+ UUID=8454828_1.5.2.3.1
+ set +x
+ KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
[ 14.810730] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
[ 14.828435] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
[ 14.844480] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
+ set +x
[ 14.853209] <LAVA_SIGNAL_ENDRUN 0_dmesg 8454828_1.5.2.3.1>
<LAVA_TEST_RUNNER EXIT>
#
/ # #export SHELL=/bin/sh
/ # . /lava-8454828/environment
export SHELL=/bin/sh
/ # /lava-8454828/bin/lava-test-runner /lava-8454828/1
. /lava-8454828/environment
/ # /lava-8454828/bin/lava-test-runner /lava-8454828/1
+ export 'TESTRUN_ID=1_bootrr'
+ cd /lava-84[ 15.434123] <LAVA_SIGNAL_STARTRUN 1_bootrr 8454828_1.5.2.3.5>
54828/1/tests/1_bootrr
+ cat uuid[ 15.442831] <LAVA_SIGNAL_ENDRUN 1_bootrr 8454828_1.5.2.3.5>
+ UUID=8454828_1.5.2.3.5
+ set +x
+ export 'PATH=/opt/bootrr/libexec/bootrr/helpers:/lava-8454828/1/../bin:/sbin:/usr/sbin:/bin:/usr/bin'
+ cd /opt/bootrr/libexec/bootrr
/lava-8454828/1/tests/1_bootrr/run.sh: cd: line 15: can't cd to /opt/bootrr/libexec/bootrr: No such file or directory
+ set +x
<LAVA_TEST_RUNNER EXIT>
/ # ����� �H �<���0������� �������