Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 18:57:30.100701 lava-dispatcher, installed at version: 2022.11
2 18:57:30.100895 start: 0 validate
3 18:57:30.101034 Start time: 2023-01-21 18:57:30.101026+00:00 (UTC)
4 18:57:30.101169 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:57:30.101305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 18:57:30.398573 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:57:30.398749 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:57:30.697176 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:57:30.697331 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:57:30.714853 validate duration: 0.61
12 18:57:30.715119 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:57:30.715226 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:57:30.715319 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:57:30.715430 Not decompressing ramdisk as can be used compressed.
16 18:57:30.715517 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 18:57:30.715584 saving as /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/ramdisk/rootfs.cpio.gz
18 18:57:30.715647 total size: 8423555 (8MB)
19 18:57:30.762764 progress 0% (0MB)
20 18:57:30.848690 progress 5% (0MB)
21 18:57:30.913665 progress 10% (0MB)
22 18:57:30.987867 progress 15% (1MB)
23 18:57:31.053970 progress 20% (1MB)
24 18:57:31.110552 progress 25% (2MB)
25 18:57:31.179022 progress 30% (2MB)
26 18:57:31.235342 progress 35% (2MB)
27 18:57:31.285736 progress 40% (3MB)
28 18:57:31.331237 progress 45% (3MB)
29 18:57:31.385232 progress 50% (4MB)
30 18:57:31.427019 progress 55% (4MB)
31 18:57:31.466419 progress 60% (4MB)
32 18:57:31.511284 progress 65% (5MB)
33 18:57:31.557651 progress 70% (5MB)
34 18:57:31.592746 progress 75% (6MB)
35 18:57:31.644461 progress 80% (6MB)
36 18:57:31.684211 progress 85% (6MB)
37 18:57:31.731348 progress 90% (7MB)
38 18:57:31.772888 progress 95% (7MB)
39 18:57:31.810748 progress 100% (8MB)
40 18:57:31.811001 8MB downloaded in 1.10s (7.33MB/s)
41 18:57:31.811185 end: 1.1.1 http-download (duration 00:00:01) [common]
43 18:57:31.811465 end: 1.1 download-retry (duration 00:00:01) [common]
44 18:57:31.811572 start: 1.2 download-retry (timeout 00:09:59) [common]
45 18:57:31.811675 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 18:57:31.811797 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:57:31.811878 saving as /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/kernel/bzImage
48 18:57:31.811962 total size: 9711616 (9MB)
49 18:57:31.812042 No compression specified
50 18:57:31.839678 progress 0% (0MB)
51 18:57:31.916633 progress 5% (0MB)
52 18:57:31.966855 progress 10% (0MB)
53 18:57:32.019512 progress 15% (1MB)
54 18:57:32.075821 progress 20% (1MB)
55 18:57:32.134105 progress 25% (2MB)
56 18:57:32.192515 progress 30% (2MB)
57 18:57:32.245386 progress 35% (3MB)
58 18:57:32.292175 progress 40% (3MB)
59 18:57:32.335131 progress 45% (4MB)
60 18:57:32.368849 progress 50% (4MB)
61 18:57:32.400414 progress 55% (5MB)
62 18:57:32.431335 progress 60% (5MB)
63 18:57:32.463305 progress 65% (6MB)
64 18:57:32.494856 progress 70% (6MB)
65 18:57:32.531282 progress 75% (6MB)
66 18:57:32.555955 progress 80% (7MB)
67 18:57:32.586795 progress 85% (7MB)
68 18:57:32.616894 progress 90% (8MB)
69 18:57:32.654058 progress 95% (8MB)
70 18:57:32.680182 progress 100% (9MB)
71 18:57:32.680459 9MB downloaded in 0.87s (10.66MB/s)
72 18:57:32.680638 end: 1.2.1 http-download (duration 00:00:01) [common]
74 18:57:32.680903 end: 1.2 download-retry (duration 00:00:01) [common]
75 18:57:32.680998 start: 1.3 download-retry (timeout 00:09:58) [common]
76 18:57:32.681102 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 18:57:32.681217 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:57:32.681296 saving as /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/modules/modules.tar
79 18:57:32.681365 total size: 64624 (0MB)
80 18:57:32.681440 Using unxz to decompress xz
81 18:57:32.749338 progress 50% (0MB)
82 18:57:32.749817 progress 100% (0MB)
83 18:57:32.754145 0MB downloaded in 0.07s (0.85MB/s)
84 18:57:32.754444 end: 1.3.1 http-download (duration 00:00:00) [common]
86 18:57:32.754768 end: 1.3 download-retry (duration 00:00:00) [common]
87 18:57:32.754870 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
88 18:57:32.754969 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
89 18:57:32.755061 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 18:57:32.755152 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
91 18:57:32.755337 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_
92 18:57:32.755450 makedir: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin
93 18:57:32.755542 makedir: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/tests
94 18:57:32.755633 makedir: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/results
95 18:57:32.755744 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-add-keys
96 18:57:32.755888 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-add-sources
97 18:57:32.756005 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-background-process-start
98 18:57:32.756125 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-background-process-stop
99 18:57:32.756239 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-common-functions
100 18:57:32.756376 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-echo-ipv4
101 18:57:32.756548 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-install-packages
102 18:57:32.756677 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-installed-packages
103 18:57:32.756812 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-os-build
104 18:57:32.756926 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-probe-channel
105 18:57:32.757044 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-probe-ip
106 18:57:32.757157 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-target-ip
107 18:57:32.757277 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-target-mac
108 18:57:32.757405 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-target-storage
109 18:57:32.757534 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-case
110 18:57:32.757651 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-event
111 18:57:32.757764 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-feedback
112 18:57:32.757879 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-raise
113 18:57:32.757996 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-reference
114 18:57:32.758112 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-runner
115 18:57:32.758222 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-set
116 18:57:32.758335 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-test-shell
117 18:57:32.758450 Updating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-install-packages (oe)
118 18:57:32.758572 Updating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/bin/lava-installed-packages (oe)
119 18:57:32.758675 Creating /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/environment
120 18:57:32.758804 LAVA metadata
121 18:57:32.758893 - LAVA_JOB_ID=8815505
122 18:57:32.758967 - LAVA_DISPATCHER_IP=192.168.201.1
123 18:57:32.759086 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
124 18:57:32.759168 skipped lava-vland-overlay
125 18:57:32.759259 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 18:57:32.759352 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
127 18:57:32.759421 skipped lava-multinode-overlay
128 18:57:32.759501 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 18:57:32.759587 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
130 18:57:32.759668 Loading test definitions
131 18:57:32.759776 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
132 18:57:32.759856 Using /lava-8815505 at stage 0
133 18:57:32.760198 uuid=8815505_1.4.2.3.1 testdef=None
134 18:57:32.760311 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 18:57:32.760410 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
136 18:57:32.760952 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 18:57:32.761250 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
139 18:57:32.761864 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 18:57:32.762116 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
142 18:57:32.762684 runner path: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/0/tests/0_dmesg test_uuid 8815505_1.4.2.3.1
143 18:57:32.762839 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 18:57:32.763081 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
146 18:57:32.763177 Using /lava-8815505 at stage 1
147 18:57:32.763450 uuid=8815505_1.4.2.3.5 testdef=None
148 18:57:32.763562 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 18:57:32.763658 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
150 18:57:32.764122 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 18:57:32.764358 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
153 18:57:32.764947 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 18:57:32.765246 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
156 18:57:32.765860 runner path: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/1/tests/1_bootrr test_uuid 8815505_1.4.2.3.5
157 18:57:32.766011 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 18:57:32.766235 Creating lava-test-runner.conf files
160 18:57:32.766304 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/0 for stage 0
161 18:57:32.766404 - 0_dmesg
162 18:57:32.766485 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815505/lava-overlay-2jba4g5_/lava-8815505/1 for stage 1
163 18:57:32.766593 - 1_bootrr
164 18:57:32.766691 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 18:57:32.766788 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
166 18:57:32.773295 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 18:57:32.773458 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
168 18:57:32.773572 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 18:57:32.773682 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 18:57:32.773786 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
171 18:57:32.961578 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 18:57:32.961929 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 18:57:32.962044 extracting modules file /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815505/extract-overlay-ramdisk-2g3kfffs/ramdisk
174 18:57:32.966629 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 18:57:32.966772 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 18:57:32.966871 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815505/compress-overlay-hygmtmen/overlay-1.4.2.4.tar.gz to ramdisk
177 18:57:32.966949 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815505/compress-overlay-hygmtmen/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8815505/extract-overlay-ramdisk-2g3kfffs/ramdisk
178 18:57:32.971044 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 18:57:32.971186 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 18:57:32.971283 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 18:57:32.971380 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 18:57:32.971465 Building ramdisk /var/lib/lava/dispatcher/tmp/8815505/extract-overlay-ramdisk-2g3kfffs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8815505/extract-overlay-ramdisk-2g3kfffs/ramdisk
183 18:57:33.036322 >> 48350 blocks
184 18:57:33.797002 rename /var/lib/lava/dispatcher/tmp/8815505/extract-overlay-ramdisk-2g3kfffs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
185 18:57:33.797517 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 18:57:33.797694 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
187 18:57:33.797838 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
188 18:57:33.797969 No mkimage arch provided, not using FIT.
189 18:57:33.798111 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 18:57:33.798244 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 18:57:33.798394 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 18:57:33.798538 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
193 18:57:33.798662 No LXC device requested
194 18:57:33.798795 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 18:57:33.798942 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
196 18:57:33.799077 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 18:57:33.799196 Checking files for TFTP limit of 4294967296 bytes.
198 18:57:33.799764 end: 1 tftp-deploy (duration 00:00:03) [common]
199 18:57:33.799922 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 18:57:33.800070 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 18:57:33.800248 substitutions:
202 18:57:33.800357 - {DTB}: None
203 18:57:33.800462 - {INITRD}: 8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
204 18:57:33.800566 - {KERNEL}: 8815505/tftp-deploy-32_uyma6/kernel/bzImage
205 18:57:33.800666 - {LAVA_MAC}: None
206 18:57:33.800767 - {PRESEED_CONFIG}: None
207 18:57:33.800871 - {PRESEED_LOCAL}: None
208 18:57:33.800970 - {RAMDISK}: 8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
209 18:57:33.801069 - {ROOT_PART}: None
210 18:57:33.801171 - {ROOT}: None
211 18:57:33.801271 - {SERVER_IP}: 192.168.201.1
212 18:57:33.801368 - {TEE}: None
213 18:57:33.801475 Parsed boot commands:
214 18:57:33.801573 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 18:57:33.801798 Parsed boot commands: tftpboot 192.168.201.1 8815505/tftp-deploy-32_uyma6/kernel/bzImage 8815505/tftp-deploy-32_uyma6/kernel/cmdline 8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
216 18:57:33.801941 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 18:57:33.802087 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 18:57:33.802241 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 18:57:33.802391 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 18:57:33.802506 Not connected, no need to disconnect.
221 18:57:33.802636 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 18:57:33.802772 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 18:57:33.802889 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-3'
224 18:57:33.806045 Setting prompt string to ['lava-test: # ']
225 18:57:33.806459 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 18:57:33.806623 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 18:57:33.806776 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 18:57:33.806921 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 18:57:33.807219 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
230 18:57:33.827736 >> Command sent successfully.
231 18:57:33.829872 Returned 0 in 0 seconds
232 18:57:33.930727 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 18:57:33.931324 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 18:57:33.931443 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 18:57:33.931538 Setting prompt string to 'Starting depthcharge on Magolor...'
237 18:57:33.931616 Changing prompt to 'Starting depthcharge on Magolor...'
238 18:57:33.931704 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
239 18:57:33.931987 [Enter `^Ec?' for help]
240 18:57:41.531315
241 18:57:41.531475
242 18:57:41.542452 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
243 18:57:41.545925 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
244 18:57:41.549135 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
245 18:57:41.555840 CPU: AES supported, TXT NOT supported, VT supported
246 18:57:41.558814 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
247 18:57:41.565755 PCH: device id 4d87 (rev 01) is Jasperlake Super
248 18:57:41.569044 IGD: device id 4e55 (rev 01) is Jasperlake GT4
249 18:57:41.572401 VBOOT: Loading verstage.
250 18:57:41.576015 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 18:57:41.582237 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
252 18:57:41.589023 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 18:57:41.591836 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
254 18:57:41.595360
255 18:57:41.595467
256 18:57:41.605943 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
257 18:57:41.619429 Probing TPM: . done!
258 18:57:41.622608 TPM ready after 0 ms
259 18:57:41.626169 Connected to device vid:did:rid of 1ae0:0028:00
260 18:57:41.637040 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
261 18:57:41.643851 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
262 18:57:41.647551 Initialized TPM device CR50 revision 0
263 18:57:41.695780 tlcl_send_startup: Startup return code is 0
264 18:57:41.695935 TPM: setup succeeded
265 18:57:41.710054 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
266 18:57:41.723380 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 18:57:41.735990 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
268 18:57:41.745955 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 18:57:41.750035 Chrome EC: UHEPI supported
270 18:57:41.750168 Phase 1
271 18:57:41.757695 FMAP: area GBB found @ c05000 (12288 bytes)
272 18:57:41.763925 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 18:57:41.770724 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 18:57:41.774257 Recovery requested (1009000e)
275 18:57:41.777430 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 18:57:41.788238 tlcl_extend: response is 0
277 18:57:41.795188 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 18:57:41.804349 tlcl_extend: response is 0
279 18:57:41.811378 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
280 18:57:41.814170 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
281 18:57:41.820960 BS: verstage times (exec / console): total (unknown) / 124 ms
282 18:57:41.824561
283 18:57:41.824674
284 18:57:41.834137 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
285 18:57:41.841215 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 18:57:41.844592 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 18:57:41.847903 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
288 18:57:41.854114 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 18:57:41.857587 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
290 18:57:41.861071 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
291 18:57:41.864303 TCO_STS: 0000 0001
292 18:57:41.867625 GEN_PMCON: d0015038 00002200
293 18:57:41.871057 GBLRST_CAUSE: 00000000 00000000
294 18:57:41.871175 prev_sleep_state 5
295 18:57:41.874388 Boot Count incremented to 6211
296 18:57:41.881066 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
297 18:57:41.884736 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
298 18:57:41.889236 Chrome EC: UHEPI supported
299 18:57:41.895592 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
300 18:57:41.901992 Probing TPM: done!
301 18:57:41.908452 Connected to device vid:did:rid of 1ae0:0028:00
302 18:57:41.918834 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
303 18:57:41.922199 Initialized TPM device CR50 revision 0
304 18:57:41.936472 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
305 18:57:41.943311 MRC: Hash idx 0x100b comparison successful.
306 18:57:41.946684 MRC cache found, size 5458
307 18:57:41.946796 bootmode is set to: 2
308 18:57:41.949470 SPD INDEX = 0
309 18:57:41.952975 CBFS: Found 'spd.bin' @0x40c40 size 0x600
310 18:57:41.956114 SPD: module type is LPDDR4X
311 18:57:41.962994 SPD: module part number is MT53E512M32D2NP-046 WT:E
312 18:57:41.966786 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
313 18:57:41.969351
314 18:57:41.972839 SPD: device width 16 bits, bus width 32 bits
315 18:57:41.976405 SPD: module size is 4096 MB (per channel)
316 18:57:41.979638 meminit_channels: DRAM half-populated
317 18:57:42.062941 CBMEM:
318 18:57:42.066013 IMD: root @ 0x76fff000 254 entries.
319 18:57:42.069232 IMD: root @ 0x76ffec00 62 entries.
320 18:57:42.072597 FMAP: area RO_VPD found @ c00000 (16384 bytes)
321 18:57:42.079286 WARNING: RO_VPD is uninitialized or empty.
322 18:57:42.082747 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
323 18:57:42.085998 External stage cache:
324 18:57:42.089785 IMD: root @ 0x7b3ff000 254 entries.
325 18:57:42.093058 IMD: root @ 0x7b3fec00 62 entries.
326 18:57:42.102808 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
327 18:57:42.109216 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 18:57:42.115690 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
329 18:57:42.124120 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 18:57:42.127687 cse_lite: Skip switching to RW in the recovery path
331 18:57:42.130929 1 DIMMs found
332 18:57:42.131041 SMM Memory Map
333 18:57:42.134250 SMRAM : 0x7b000000 0x800000
334 18:57:42.138091 Subregion 0: 0x7b000000 0x200000
335 18:57:42.140838 Subregion 1: 0x7b200000 0x200000
336 18:57:42.144069 Subregion 2: 0x7b400000 0x400000
337 18:57:42.147659
338 18:57:42.147767 top_of_ram = 0x77000000
339 18:57:42.153985 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
340 18:57:42.157628 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
341 18:57:42.161026
342 18:57:42.163917 MTRR Range: Start=ff000000 End=0 (Size 1000000)
343 18:57:42.167435 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
344 18:57:42.170405
345 18:57:42.173967 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
346 18:57:42.185916 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
347 18:57:42.189179 Processing 188 relocs. Offset value of 0x74c0e000
348 18:57:42.199856 BS: romstage times (exec / console): total (unknown) / 255 ms
349 18:57:42.204308
350 18:57:42.204446
351 18:57:42.214226 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
352 18:57:42.217597 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
353 18:57:42.224017 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
354 18:57:42.230804 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
355 18:57:42.286672 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
356 18:57:42.293066 Processing 4805 relocs. Offset value of 0x75da8000
357 18:57:42.296603 BS: postcar times (exec / console): total (unknown) / 42 ms
358 18:57:42.296703
359 18:57:42.299931
360 18:57:42.300027
361 18:57:42.309814 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
362 18:57:42.309963 Normal boot
363 18:57:42.313981 EC returned error result code 3
364 18:57:42.317334 FW_CONFIG value is 0x204
365 18:57:42.320847 GENERIC: 0.0 disabled by fw_config
366 18:57:42.327059 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
367 18:57:42.330567 I2C: 00:10 disabled by fw_config
368 18:57:42.333922 I2C: 00:10 disabled by fw_config
369 18:57:42.337187 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
370 18:57:42.344192 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 18:57:42.347265 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 18:57:42.353545 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 18:57:42.356841 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
374 18:57:42.360265 I2C: 00:10 disabled by fw_config
375 18:57:42.366961 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
376 18:57:42.373336 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
377 18:57:42.376676 I2C: 00:1a disabled by fw_config
378 18:57:42.379958 I2C: 00:1a disabled by fw_config
379 18:57:42.387084 fw_config match found: AUDIO_AMP=UNPROVISIONED
380 18:57:42.389888 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 18:57:42.393319 GENERIC: 0.0 disabled by fw_config
382 18:57:42.399874 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
383 18:57:42.403410 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
384 18:57:42.409870 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
385 18:57:42.413231 microcode: Update skipped, already up-to-date
386 18:57:42.419833 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
387 18:57:42.445993 Detected 2 core, 2 thread CPU.
388 18:57:42.448824 Setting up SMI for CPU
389 18:57:42.452123 IED base = 0x7b400000
390 18:57:42.452220 IED size = 0x00400000
391 18:57:42.455864 Will perform SMM setup.
392 18:57:42.459034 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
393 18:57:42.468864 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
394 18:57:42.472298 Processing 16 relocs. Offset value of 0x00030000
395 18:57:42.475863 Attempting to start 1 APs
396 18:57:42.479122 Waiting for 10ms after sending INIT.
397 18:57:42.495698 Waiting for 1st SIPI to complete...done.
398 18:57:42.495866 AP: slot 1 apic_id 2.
399 18:57:42.502086 Waiting for 2nd SIPI to complete...done.
400 18:57:42.508589 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
401 18:57:42.515525 Processing 13 relocs. Offset value of 0x00038000
402 18:57:42.515665 Unable to locate Global NVS
403 18:57:42.525231 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
404 18:57:42.528750 Installing permanent SMM handler to 0x7b000000
405 18:57:42.538932 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
406 18:57:42.541837 Processing 704 relocs. Offset value of 0x7b010000
407 18:57:42.548590 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
408 18:57:42.551962
409 18:57:42.555442 Processing 13 relocs. Offset value of 0x7b008000
410 18:57:42.561657 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 18:57:42.564999 Unable to locate Global NVS
412 18:57:42.571748 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 18:57:42.574834 Clearing SMI status registers
414 18:57:42.574985 SMI_STS: PM1
415 18:57:42.578365 PM1_STS: PWRBTN
416 18:57:42.578501 TCO_STS: INTRD_DET
417 18:57:42.588224 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 18:57:42.588381 In relocation handler: CPU 0
419 18:57:42.591838
420 18:57:42.594758 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 18:57:42.598227 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 18:57:42.601295 Relocation complete.
423 18:57:42.608480 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 18:57:42.611854 In relocation handler: CPU 1
425 18:57:42.614715 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 18:57:42.621439 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 18:57:42.621580 Relocation complete.
428 18:57:42.624946 Initializing CPU #0
429 18:57:42.627990 CPU: vendor Intel device 906c0
430 18:57:42.631593 CPU: family 06, model 9c, stepping 00
431 18:57:42.634514 Clearing out pending MCEs
432 18:57:42.638191 Setting up local APIC...
433 18:57:42.638293 apic_id: 0x00 done.
434 18:57:42.641553 Turbo is available but hidden
435 18:57:42.644993 Turbo is available and visible
436 18:57:42.648128 microcode: Update skipped, already up-to-date
437 18:57:42.651540 CPU #0 initialized
438 18:57:42.654895 Initializing CPU #1
439 18:57:42.658306 CPU: vendor Intel device 906c0
440 18:57:42.661379 CPU: family 06, model 9c, stepping 00
441 18:57:42.664515 Clearing out pending MCEs
442 18:57:42.664615 Setting up local APIC...
443 18:57:42.667852 apic_id: 0x02 done.
444 18:57:42.671449 microcode: Update skipped, already up-to-date
445 18:57:42.674411 CPU #1 initialized
446 18:57:42.677862 bsp_do_flight_plan done after 173 msecs.
447 18:57:42.681663 CPU: frequency set to 2800 MHz
448 18:57:42.684316 Enabling SMIs.
449 18:57:42.691337 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
450 18:57:42.700243 Probing TPM: done!
451 18:57:42.706656 Connected to device vid:did:rid of 1ae0:0028:00
452 18:57:42.716452 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
453 18:57:42.720267 Initialized TPM device CR50 revision 0
454 18:57:42.723163 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 18:57:42.729987 Found a VBT of 7680 bytes after decompression
456 18:57:42.737142 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 18:57:42.771650 Detected 2 core, 2 thread CPU.
458 18:57:42.775072 Detected 2 core, 2 thread CPU.
459 18:57:43.137330 Display FSP Version Info HOB
460 18:57:43.140066 Reference Code - CPU = 8.7.22.30
461 18:57:43.143666 uCode Version = 24.0.0.1f
462 18:57:43.146685 TXT ACM version = ff.ff.ff.ffff
463 18:57:43.149931 Reference Code - ME = 8.7.22.30
464 18:57:43.153707 MEBx version = 0.0.0.0
465 18:57:43.156641 ME Firmware Version = Consumer SKU
466 18:57:43.160079 Reference Code - PCH = 8.7.22.30
467 18:57:43.163099 PCH-CRID Status = Disabled
468 18:57:43.166595 PCH-CRID Original Value = ff.ff.ff.ffff
469 18:57:43.170318 PCH-CRID New Value = ff.ff.ff.ffff
470 18:57:43.173170 OPROM - RST - RAID = ff.ff.ff.ffff
471 18:57:43.176520 PCH Hsio Version = 4.0.0.0
472 18:57:43.180219 Reference Code - SA - System Agent = 8.7.22.30
473 18:57:43.182972 Reference Code - MRC = 0.0.4.68
474 18:57:43.186585 SA - PCIe Version = 8.7.22.30
475 18:57:43.190123 SA-CRID Status = Disabled
476 18:57:43.193228 SA-CRID Original Value = 0.0.0.0
477 18:57:43.196694 SA-CRID New Value = 0.0.0.0
478 18:57:43.200105 OPROM - VBIOS = ff.ff.ff.ffff
479 18:57:43.202990 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 18:57:43.206522 PHY Build Version = ff.ff.ff.ffff
481 18:57:43.212928 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 18:57:43.216669 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 18:57:43.219796 ITSS IRQ Polarities Before:
484 18:57:43.223191 IPC0: 0xffffffff
485 18:57:43.223299 IPC1: 0xffffffff
486 18:57:43.225968 IPC2: 0xffffffff
487 18:57:43.226080 IPC3: 0xffffffff
488 18:57:43.229657 ITSS IRQ Polarities After:
489 18:57:43.232748 IPC0: 0xffffffff
490 18:57:43.232841 IPC1: 0xffffffff
491 18:57:43.236270 IPC2: 0xffffffff
492 18:57:43.236353 IPC3: 0xffffffff
493 18:57:43.249262 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 18:57:43.256430 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
495 18:57:43.259246 Enumerating buses...
496 18:57:43.262752 Show all devs... Before device enumeration.
497 18:57:43.266111 Root Device: enabled 1
498 18:57:43.266214 CPU_CLUSTER: 0: enabled 1
499 18:57:43.269755 DOMAIN: 0000: enabled 1
500 18:57:43.272575 PCI: 00:00.0: enabled 1
501 18:57:43.276297 PCI: 00:02.0: enabled 1
502 18:57:43.276406 PCI: 00:04.0: enabled 1
503 18:57:43.279675 PCI: 00:05.0: enabled 1
504 18:57:43.282545 PCI: 00:09.0: enabled 0
505 18:57:43.282636 PCI: 00:12.6: enabled 0
506 18:57:43.286017 PCI: 00:14.0: enabled 1
507 18:57:43.289242 PCI: 00:14.1: enabled 0
508 18:57:43.292692 PCI: 00:14.2: enabled 0
509 18:57:43.292782 PCI: 00:14.3: enabled 1
510 18:57:43.295842 PCI: 00:14.5: enabled 1
511 18:57:43.299177 PCI: 00:15.0: enabled 1
512 18:57:43.302474 PCI: 00:15.1: enabled 1
513 18:57:43.302579 PCI: 00:15.2: enabled 1
514 18:57:43.306173 PCI: 00:15.3: enabled 1
515 18:57:43.309050 PCI: 00:16.0: enabled 1
516 18:57:43.312676 PCI: 00:16.1: enabled 0
517 18:57:43.312779 PCI: 00:16.4: enabled 0
518 18:57:43.315552 PCI: 00:16.5: enabled 0
519 18:57:43.319165 PCI: 00:17.0: enabled 0
520 18:57:43.319263 PCI: 00:19.0: enabled 1
521 18:57:43.322245 PCI: 00:19.1: enabled 0
522 18:57:43.325710 PCI: 00:19.2: enabled 1
523 18:57:43.329096 PCI: 00:1a.0: enabled 1
524 18:57:43.329198 PCI: 00:1c.0: enabled 0
525 18:57:43.332729 PCI: 00:1c.1: enabled 0
526 18:57:43.335555 PCI: 00:1c.2: enabled 0
527 18:57:43.338681 PCI: 00:1c.3: enabled 0
528 18:57:43.338783 PCI: 00:1c.4: enabled 0
529 18:57:43.342206 PCI: 00:1c.5: enabled 0
530 18:57:43.345316 PCI: 00:1c.6: enabled 0
531 18:57:43.348759 PCI: 00:1c.7: enabled 1
532 18:57:43.348874 PCI: 00:1e.0: enabled 0
533 18:57:43.352316 PCI: 00:1e.1: enabled 0
534 18:57:43.355786 PCI: 00:1e.2: enabled 1
535 18:57:43.355896 PCI: 00:1e.3: enabled 0
536 18:57:43.358672 PCI: 00:1f.0: enabled 1
537 18:57:43.362261 PCI: 00:1f.1: enabled 1
538 18:57:43.365319 PCI: 00:1f.2: enabled 1
539 18:57:43.365433 PCI: 00:1f.3: enabled 1
540 18:57:43.368812 PCI: 00:1f.4: enabled 0
541 18:57:43.372378 PCI: 00:1f.5: enabled 1
542 18:57:43.375442 PCI: 00:1f.7: enabled 0
543 18:57:43.375539 GENERIC: 0.0: enabled 1
544 18:57:43.378849 GENERIC: 0.0: enabled 1
545 18:57:43.381790 USB0 port 0: enabled 1
546 18:57:43.385322 GENERIC: 0.0: enabled 1
547 18:57:43.385424 I2C: 00:2c: enabled 1
548 18:57:43.388865 I2C: 00:15: enabled 1
549 18:57:43.391813 GENERIC: 0.0: enabled 0
550 18:57:43.391906 I2C: 00:15: enabled 1
551 18:57:43.395359 I2C: 00:10: enabled 0
552 18:57:43.398308 I2C: 00:10: enabled 0
553 18:57:43.398401 I2C: 00:2c: enabled 1
554 18:57:43.401839 I2C: 00:40: enabled 1
555 18:57:43.405288 I2C: 00:10: enabled 1
556 18:57:43.405384 I2C: 00:39: enabled 1
557 18:57:43.408393 I2C: 00:36: enabled 1
558 18:57:43.411700 I2C: 00:10: enabled 0
559 18:57:43.411795 I2C: 00:0c: enabled 1
560 18:57:43.415382 I2C: 00:50: enabled 1
561 18:57:43.418344 I2C: 00:1a: enabled 1
562 18:57:43.418433 I2C: 00:1a: enabled 0
563 18:57:43.422005 I2C: 00:1a: enabled 0
564 18:57:43.424817 I2C: 00:28: enabled 1
565 18:57:43.424919 I2C: 00:29: enabled 1
566 18:57:43.428312 PCI: 00:00.0: enabled 1
567 18:57:43.431655 SPI: 00: enabled 1
568 18:57:43.431755 PNP: 0c09.0: enabled 1
569 18:57:43.435342 GENERIC: 0.0: enabled 0
570 18:57:43.438298 USB2 port 0: enabled 1
571 18:57:43.441911 USB2 port 1: enabled 1
572 18:57:43.442006 USB2 port 2: enabled 1
573 18:57:43.445024 USB2 port 3: enabled 1
574 18:57:43.448726 USB2 port 4: enabled 0
575 18:57:43.448821 USB2 port 5: enabled 1
576 18:57:43.451597 USB2 port 6: enabled 0
577 18:57:43.455092 USB2 port 7: enabled 1
578 18:57:43.455182 USB3 port 0: enabled 1
579 18:57:43.458429
580 18:57:43.458517 USB3 port 1: enabled 1
581 18:57:43.461907 USB3 port 2: enabled 1
582 18:57:43.464892 USB3 port 3: enabled 1
583 18:57:43.464986 APIC: 00: enabled 1
584 18:57:43.467987 APIC: 02: enabled 1
585 18:57:43.468079 Compare with tree...
586 18:57:43.471704
587 18:57:43.471801 Root Device: enabled 1
588 18:57:43.475010 CPU_CLUSTER: 0: enabled 1
589 18:57:43.478586 APIC: 00: enabled 1
590 18:57:43.478698 APIC: 02: enabled 1
591 18:57:43.481455 DOMAIN: 0000: enabled 1
592 18:57:43.484825 PCI: 00:00.0: enabled 1
593 18:57:43.487972 PCI: 00:02.0: enabled 1
594 18:57:43.491439 PCI: 00:04.0: enabled 1
595 18:57:43.491531 GENERIC: 0.0: enabled 1
596 18:57:43.494568 PCI: 00:05.0: enabled 1
597 18:57:43.498014 GENERIC: 0.0: enabled 1
598 18:57:43.501595 PCI: 00:09.0: enabled 0
599 18:57:43.504572 PCI: 00:12.6: enabled 0
600 18:57:43.504673 PCI: 00:14.0: enabled 1
601 18:57:43.508204 USB0 port 0: enabled 1
602 18:57:43.511004 USB2 port 0: enabled 1
603 18:57:43.514295 USB2 port 1: enabled 1
604 18:57:43.518016 USB2 port 2: enabled 1
605 18:57:43.518120 USB2 port 3: enabled 1
606 18:57:43.521019 USB2 port 4: enabled 0
607 18:57:43.524376 USB2 port 5: enabled 1
608 18:57:43.528025 USB2 port 6: enabled 0
609 18:57:43.530770 USB2 port 7: enabled 1
610 18:57:43.534519 USB3 port 0: enabled 1
611 18:57:43.534626 USB3 port 1: enabled 1
612 18:57:43.537429 USB3 port 2: enabled 1
613 18:57:43.540938 USB3 port 3: enabled 1
614 18:57:43.544598 PCI: 00:14.1: enabled 0
615 18:57:43.547712 PCI: 00:14.2: enabled 0
616 18:57:43.547842 PCI: 00:14.3: enabled 1
617 18:57:43.551156 GENERIC: 0.0: enabled 1
618 18:57:43.554521 PCI: 00:14.5: enabled 1
619 18:57:43.557549 PCI: 00:15.0: enabled 1
620 18:57:43.561001 I2C: 00:2c: enabled 1
621 18:57:43.561102 I2C: 00:15: enabled 1
622 18:57:43.564417 PCI: 00:15.1: enabled 1
623 18:57:43.567611 PCI: 00:15.2: enabled 1
624 18:57:43.571201 GENERIC: 0.0: enabled 0
625 18:57:43.574091 I2C: 00:15: enabled 1
626 18:57:43.574195 I2C: 00:10: enabled 0
627 18:57:43.577401 I2C: 00:10: enabled 0
628 18:57:43.580637 I2C: 00:2c: enabled 1
629 18:57:43.584024 I2C: 00:40: enabled 1
630 18:57:43.584124 I2C: 00:10: enabled 1
631 18:57:43.587854 I2C: 00:39: enabled 1
632 18:57:43.590788 PCI: 00:15.3: enabled 1
633 18:57:43.593767 I2C: 00:36: enabled 1
634 18:57:43.593861 I2C: 00:10: enabled 0
635 18:57:43.597359 I2C: 00:0c: enabled 1
636 18:57:43.600346 I2C: 00:50: enabled 1
637 18:57:43.603909 PCI: 00:16.0: enabled 1
638 18:57:43.607180 PCI: 00:16.1: enabled 0
639 18:57:43.607293 PCI: 00:16.4: enabled 0
640 18:57:43.610742 PCI: 00:16.5: enabled 0
641 18:57:43.613688 PCI: 00:17.0: enabled 0
642 18:57:43.617190 PCI: 00:19.0: enabled 1
643 18:57:43.617301 I2C: 00:1a: enabled 1
644 18:57:43.620271 I2C: 00:1a: enabled 0
645 18:57:43.623658 I2C: 00:1a: enabled 0
646 18:57:43.627277 I2C: 00:28: enabled 1
647 18:57:43.630268 I2C: 00:29: enabled 1
648 18:57:43.630367 PCI: 00:19.1: enabled 0
649 18:57:43.633899 PCI: 00:19.2: enabled 1
650 18:57:43.637256 PCI: 00:1a.0: enabled 1
651 18:57:43.640436 PCI: 00:1e.0: enabled 0
652 18:57:43.640533 PCI: 00:1e.1: enabled 0
653 18:57:43.643927 PCI: 00:1e.2: enabled 1
654 18:57:43.646951 SPI: 00: enabled 1
655 18:57:43.650618 PCI: 00:1e.3: enabled 0
656 18:57:43.653365 PCI: 00:1f.0: enabled 1
657 18:57:43.653480 PNP: 0c09.0: enabled 1
658 18:57:43.656919 PCI: 00:1f.1: enabled 1
659 18:57:43.660317 PCI: 00:1f.2: enabled 1
660 18:57:43.663665 PCI: 00:1f.3: enabled 1
661 18:57:43.663761 GENERIC: 0.0: enabled 0
662 18:57:43.666690
663 18:57:43.666784 PCI: 00:1f.4: enabled 0
664 18:57:43.670248 PCI: 00:1f.5: enabled 1
665 18:57:43.674003 PCI: 00:1f.7: enabled 0
666 18:57:43.677098 Root Device scanning...
667 18:57:43.680160 scan_static_bus for Root Device
668 18:57:43.680256 CPU_CLUSTER: 0 enabled
669 18:57:43.683539 DOMAIN: 0000 enabled
670 18:57:43.686726 DOMAIN: 0000 scanning...
671 18:57:43.689977 PCI: pci_scan_bus for bus 00
672 18:57:43.693625 PCI: 00:00.0 [8086/0000] ops
673 18:57:43.696664 PCI: 00:00.0 [8086/4e22] enabled
674 18:57:43.700310 PCI: 00:02.0 [8086/0000] bus ops
675 18:57:43.703121 PCI: 00:02.0 [8086/4e55] enabled
676 18:57:43.706730 PCI: 00:04.0 [8086/0000] bus ops
677 18:57:43.710124 PCI: 00:04.0 [8086/4e03] enabled
678 18:57:43.713617 PCI: 00:05.0 [8086/0000] bus ops
679 18:57:43.716429 PCI: 00:05.0 [8086/4e19] enabled
680 18:57:43.720235 PCI: 00:08.0 [8086/4e11] enabled
681 18:57:43.723204 PCI: 00:14.0 [8086/0000] bus ops
682 18:57:43.726672 PCI: 00:14.0 [8086/4ded] enabled
683 18:57:43.729740 PCI: 00:14.2 [8086/4def] disabled
684 18:57:43.733161 PCI: 00:14.3 [8086/0000] bus ops
685 18:57:43.737038 PCI: 00:14.3 [8086/4df0] enabled
686 18:57:43.739889 PCI: 00:14.5 [8086/0000] ops
687 18:57:43.742964 PCI: 00:14.5 [8086/4df8] enabled
688 18:57:43.746584 PCI: 00:15.0 [8086/0000] bus ops
689 18:57:43.749989 PCI: 00:15.0 [8086/4de8] enabled
690 18:57:43.753090 PCI: 00:15.1 [8086/0000] bus ops
691 18:57:43.756418 PCI: 00:15.1 [8086/4de9] enabled
692 18:57:43.759368 PCI: 00:15.2 [8086/0000] bus ops
693 18:57:43.762839 PCI: 00:15.2 [8086/4dea] enabled
694 18:57:43.766501 PCI: 00:15.3 [8086/0000] bus ops
695 18:57:43.769946 PCI: 00:15.3 [8086/4deb] enabled
696 18:57:43.770046 PCI: 00:16.0 [8086/0000] ops
697 18:57:43.772848 PCI: 00:16.0 [8086/4de0] enabled
698 18:57:43.776202 PCI: 00:19.0 [8086/0000] bus ops
699 18:57:43.779790 PCI: 00:19.0 [8086/4dc5] enabled
700 18:57:43.782698 PCI: 00:19.2 [8086/0000] ops
701 18:57:43.786267 PCI: 00:19.2 [8086/4dc7] enabled
702 18:57:43.789626 PCI: 00:1a.0 [8086/0000] ops
703 18:57:43.792651 PCI: 00:1a.0 [8086/4dc4] enabled
704 18:57:43.796137 PCI: 00:1e.0 [8086/0000] ops
705 18:57:43.799220 PCI: 00:1e.0 [8086/4da8] disabled
706 18:57:43.802891 PCI: 00:1e.2 [8086/0000] bus ops
707 18:57:43.805791 PCI: 00:1e.2 [8086/4daa] enabled
708 18:57:43.809292 PCI: 00:1f.0 [8086/0000] bus ops
709 18:57:43.812845 PCI: 00:1f.0 [8086/4d87] enabled
710 18:57:43.819202 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 18:57:43.819344 RTC Init
712 18:57:43.822653 Set power on after power failure.
713 18:57:43.825672 Disabling Deep S3
714 18:57:43.825771 Disabling Deep S3
715 18:57:43.829290 Disabling Deep S4
716 18:57:43.829382 Disabling Deep S4
717 18:57:43.832839 Disabling Deep S5
718 18:57:43.835693 Disabling Deep S5
719 18:57:43.839121 PCI: 00:1f.2 [0000/0000] hidden
720 18:57:43.842929 PCI: 00:1f.3 [8086/0000] bus ops
721 18:57:43.845829 PCI: 00:1f.3 [8086/4dc8] enabled
722 18:57:43.848870 PCI: 00:1f.5 [8086/0000] bus ops
723 18:57:43.852257 PCI: 00:1f.5 [8086/4da4] enabled
724 18:57:43.852347 PCI: Leftover static devices:
725 18:57:43.856277 PCI: 00:12.6
726 18:57:43.856366 PCI: 00:09.0
727 18:57:43.858858 PCI: 00:14.1
728 18:57:43.858944 PCI: 00:16.1
729 18:57:43.859008 PCI: 00:16.4
730 18:57:43.862418
731 18:57:43.862504 PCI: 00:16.5
732 18:57:43.862568 PCI: 00:17.0
733 18:57:43.865996 PCI: 00:19.1
734 18:57:43.866088 PCI: 00:1e.1
735 18:57:43.869279 PCI: 00:1e.3
736 18:57:43.869361 PCI: 00:1f.1
737 18:57:43.869435 PCI: 00:1f.4
738 18:57:43.872402 PCI: 00:1f.7
739 18:57:43.875773 PCI: Check your devicetree.cb.
740 18:57:43.875867 PCI: 00:02.0 scanning...
741 18:57:43.879004 scan_generic_bus for PCI: 00:02.0
742 18:57:43.882324
743 18:57:43.885855 scan_generic_bus for PCI: 00:02.0 done
744 18:57:43.889352 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
745 18:57:43.892159 PCI: 00:04.0 scanning...
746 18:57:43.895710 scan_generic_bus for PCI: 00:04.0
747 18:57:43.898754 GENERIC: 0.0 enabled
748 18:57:43.902415 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
749 18:57:43.909098 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
750 18:57:43.912385 PCI: 00:05.0 scanning...
751 18:57:43.915181 scan_generic_bus for PCI: 00:05.0
752 18:57:43.915336 GENERIC: 0.0 enabled
753 18:57:43.922359 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
754 18:57:43.928872 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
755 18:57:43.929025 PCI: 00:14.0 scanning...
756 18:57:43.931838 scan_static_bus for PCI: 00:14.0
757 18:57:43.935370 USB0 port 0 enabled
758 18:57:43.938857 USB0 port 0 scanning...
759 18:57:43.941850 scan_static_bus for USB0 port 0
760 18:57:43.941962 USB2 port 0 enabled
761 18:57:43.945281 USB2 port 1 enabled
762 18:57:43.948322 USB2 port 2 enabled
763 18:57:43.948423 USB2 port 3 enabled
764 18:57:43.951887 USB2 port 4 disabled
765 18:57:43.954883 USB2 port 5 enabled
766 18:57:43.954983 USB2 port 6 disabled
767 18:57:43.958511 USB2 port 7 enabled
768 18:57:43.958620 USB3 port 0 enabled
769 18:57:43.961409 USB3 port 1 enabled
770 18:57:43.965064 USB3 port 2 enabled
771 18:57:43.965166 USB3 port 3 enabled
772 18:57:43.968402 USB2 port 0 scanning...
773 18:57:43.971541 scan_static_bus for USB2 port 0
774 18:57:43.975018 scan_static_bus for USB2 port 0 done
775 18:57:43.981144 scan_bus: bus USB2 port 0 finished in 6 msecs
776 18:57:43.981304 USB2 port 1 scanning...
777 18:57:43.984661 scan_static_bus for USB2 port 1
778 18:57:43.988175 scan_static_bus for USB2 port 1 done
779 18:57:43.991597
780 18:57:43.994534 scan_bus: bus USB2 port 1 finished in 6 msecs
781 18:57:43.997928 USB2 port 2 scanning...
782 18:57:44.001017 scan_static_bus for USB2 port 2
783 18:57:44.004598 scan_static_bus for USB2 port 2 done
784 18:57:44.007635 scan_bus: bus USB2 port 2 finished in 6 msecs
785 18:57:44.011198 USB2 port 3 scanning...
786 18:57:44.014410 scan_static_bus for USB2 port 3
787 18:57:44.017427 scan_static_bus for USB2 port 3 done
788 18:57:44.021056 scan_bus: bus USB2 port 3 finished in 6 msecs
789 18:57:44.024567 USB2 port 5 scanning...
790 18:57:44.027394 scan_static_bus for USB2 port 5
791 18:57:44.031133 scan_static_bus for USB2 port 5 done
792 18:57:44.037711 scan_bus: bus USB2 port 5 finished in 6 msecs
793 18:57:44.037838 USB2 port 7 scanning...
794 18:57:44.040971 scan_static_bus for USB2 port 7
795 18:57:44.047357 scan_static_bus for USB2 port 7 done
796 18:57:44.051184 scan_bus: bus USB2 port 7 finished in 6 msecs
797 18:57:44.054082 USB3 port 0 scanning...
798 18:57:44.057260 scan_static_bus for USB3 port 0
799 18:57:44.060803 scan_static_bus for USB3 port 0 done
800 18:57:44.063719 scan_bus: bus USB3 port 0 finished in 6 msecs
801 18:57:44.067221 USB3 port 1 scanning...
802 18:57:44.071330 scan_static_bus for USB3 port 1
803 18:57:44.074104 scan_static_bus for USB3 port 1 done
804 18:57:44.076936 scan_bus: bus USB3 port 1 finished in 6 msecs
805 18:57:44.080655
806 18:57:44.080774 USB3 port 2 scanning...
807 18:57:44.083656 scan_static_bus for USB3 port 2
808 18:57:44.087041 scan_static_bus for USB3 port 2 done
809 18:57:44.093592 scan_bus: bus USB3 port 2 finished in 6 msecs
810 18:57:44.093726 USB3 port 3 scanning...
811 18:57:44.096995
812 18:57:44.100017 scan_static_bus for USB3 port 3
813 18:57:44.103562 scan_static_bus for USB3 port 3 done
814 18:57:44.107393 scan_bus: bus USB3 port 3 finished in 6 msecs
815 18:57:44.110145 scan_static_bus for USB0 port 0 done
816 18:57:44.116509 scan_bus: bus USB0 port 0 finished in 172 msecs
817 18:57:44.119940 scan_static_bus for PCI: 00:14.0 done
818 18:57:44.123295 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
819 18:57:44.126309 PCI: 00:14.3 scanning...
820 18:57:44.129747 scan_static_bus for PCI: 00:14.3
821 18:57:44.133302 GENERIC: 0.0 enabled
822 18:57:44.136395 scan_static_bus for PCI: 00:14.3 done
823 18:57:44.139808 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
824 18:57:44.142915 PCI: 00:15.0 scanning...
825 18:57:44.146206 scan_static_bus for PCI: 00:15.0
826 18:57:44.149936 I2C: 00:2c enabled
827 18:57:44.150037 I2C: 00:15 enabled
828 18:57:44.152835 scan_static_bus for PCI: 00:15.0 done
829 18:57:44.159405 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
830 18:57:44.162922 PCI: 00:15.1 scanning...
831 18:57:44.166000 scan_static_bus for PCI: 00:15.1
832 18:57:44.169521 scan_static_bus for PCI: 00:15.1 done
833 18:57:44.172971 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
834 18:57:44.175987 PCI: 00:15.2 scanning...
835 18:57:44.179648 scan_static_bus for PCI: 00:15.2
836 18:57:44.182694 GENERIC: 0.0 disabled
837 18:57:44.182794 I2C: 00:15 enabled
838 18:57:44.186139 I2C: 00:10 disabled
839 18:57:44.189287 I2C: 00:10 disabled
840 18:57:44.189375 I2C: 00:2c enabled
841 18:57:44.192699 I2C: 00:40 enabled
842 18:57:44.192789 I2C: 00:10 enabled
843 18:57:44.196201 I2C: 00:39 enabled
844 18:57:44.199076 scan_static_bus for PCI: 00:15.2 done
845 18:57:44.202609 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
846 18:57:44.205719
847 18:57:44.205819 PCI: 00:15.3 scanning...
848 18:57:44.209300 scan_static_bus for PCI: 00:15.3
849 18:57:44.212504 I2C: 00:36 enabled
850 18:57:44.212596 I2C: 00:10 disabled
851 18:57:44.215770
852 18:57:44.215853 I2C: 00:0c enabled
853 18:57:44.219218 I2C: 00:50 enabled
854 18:57:44.222559 scan_static_bus for PCI: 00:15.3 done
855 18:57:44.226031 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
856 18:57:44.228857 PCI: 00:19.0 scanning...
857 18:57:44.232657 scan_static_bus for PCI: 00:19.0
858 18:57:44.235740 I2C: 00:1a enabled
859 18:57:44.235843 I2C: 00:1a disabled
860 18:57:44.239406 I2C: 00:1a disabled
861 18:57:44.239496 I2C: 00:28 enabled
862 18:57:44.242291 I2C: 00:29 enabled
863 18:57:44.245888 scan_static_bus for PCI: 00:19.0 done
864 18:57:44.252627 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
865 18:57:44.252763 PCI: 00:1e.2 scanning...
866 18:57:44.255628 scan_generic_bus for PCI: 00:1e.2
867 18:57:44.258779
868 18:57:44.258889 SPI: 00 enabled
869 18:57:44.265141 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
870 18:57:44.268703 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
871 18:57:44.272169 PCI: 00:1f.0 scanning...
872 18:57:44.275354 scan_static_bus for PCI: 00:1f.0
873 18:57:44.278739 PNP: 0c09.0 enabled
874 18:57:44.278849 PNP: 0c09.0 scanning...
875 18:57:44.282463 scan_static_bus for PNP: 0c09.0
876 18:57:44.288707 scan_static_bus for PNP: 0c09.0 done
877 18:57:44.291912 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
878 18:57:44.295132 scan_static_bus for PCI: 00:1f.0 done
879 18:57:44.301887 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
880 18:57:44.302025 PCI: 00:1f.3 scanning...
881 18:57:44.305314 scan_static_bus for PCI: 00:1f.3
882 18:57:44.308321 GENERIC: 0.0 disabled
883 18:57:44.312008 scan_static_bus for PCI: 00:1f.3 done
884 18:57:44.318497 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
885 18:57:44.318616 PCI: 00:1f.5 scanning...
886 18:57:44.321852 scan_generic_bus for PCI: 00:1f.5
887 18:57:44.328798 scan_generic_bus for PCI: 00:1f.5 done
888 18:57:44.331782 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
889 18:57:44.335189 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
890 18:57:44.338254
891 18:57:44.342063 scan_static_bus for Root Device done
892 18:57:44.345104 scan_bus: bus Root Device finished in 664 msecs
893 18:57:44.345205 done
894 18:57:44.351643 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
895 18:57:44.355161 Chrome EC: UHEPI supported
896 18:57:44.361884 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
897 18:57:44.368330 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
898 18:57:44.372012 SPI flash protection: WPSW=0 SRP0=1
899 18:57:44.374889 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
900 18:57:44.381894 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
901 18:57:44.384862 found VGA at PCI: 00:02.0
902 18:57:44.388337 Setting up VGA for PCI: 00:02.0
903 18:57:44.391787 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
904 18:57:44.398168 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
905 18:57:44.401451 Allocating resources...
906 18:57:44.401564 Reading resources...
907 18:57:44.404426 Root Device read_resources bus 0 link: 0
908 18:57:44.411515 CPU_CLUSTER: 0 read_resources bus 0 link: 0
909 18:57:44.414622 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
910 18:57:44.421117 DOMAIN: 0000 read_resources bus 0 link: 0
911 18:57:44.424526 PCI: 00:04.0 read_resources bus 1 link: 0
912 18:57:44.430941 PCI: 00:04.0 read_resources bus 1 link: 0 done
913 18:57:44.434315 PCI: 00:05.0 read_resources bus 2 link: 0
914 18:57:44.440791 PCI: 00:05.0 read_resources bus 2 link: 0 done
915 18:57:44.444356 PCI: 00:14.0 read_resources bus 0 link: 0
916 18:57:44.447802 USB0 port 0 read_resources bus 0 link: 0
917 18:57:44.455511 USB0 port 0 read_resources bus 0 link: 0 done
918 18:57:44.459127 PCI: 00:14.0 read_resources bus 0 link: 0 done
919 18:57:44.465724 PCI: 00:14.3 read_resources bus 0 link: 0
920 18:57:44.468674 PCI: 00:14.3 read_resources bus 0 link: 0 done
921 18:57:44.475274 PCI: 00:15.0 read_resources bus 0 link: 0
922 18:57:44.478809 PCI: 00:15.0 read_resources bus 0 link: 0 done
923 18:57:44.534245 PCI: 00:15.2 read_resources bus 0 link: 0
924 18:57:44.535065 PCI: 00:15.2 read_resources bus 0 link: 0 done
925 18:57:44.535157 PCI: 00:15.3 read_resources bus 0 link: 0
926 18:57:44.535428
927 18:57:44.535513 PCI: 00:15.3 read_resources bus 0 link: 0 done
928 18:57:44.535766 PCI: 00:19.0 read_resources bus 0 link: 0
929 18:57:44.536190 PCI: 00:19.0 read_resources bus 0 link: 0 done
930 18:57:44.536261 PCI: 00:1e.2 read_resources bus 3 link: 0
931 18:57:44.536530 PCI: 00:1e.2 read_resources bus 3 link: 0 done
932 18:57:44.536785 PCI: 00:1f.0 read_resources bus 0 link: 0
933 18:57:44.537326 PCI: 00:1f.0 read_resources bus 0 link: 0 done
934 18:57:44.537406 PCI: 00:1f.3 read_resources bus 0 link: 0
935 18:57:44.584758 PCI: 00:1f.3 read_resources bus 0 link: 0 done
936 18:57:44.585117 DOMAIN: 0000 read_resources bus 0 link: 0 done
937 18:57:44.585202 Root Device read_resources bus 0 link: 0 done
938 18:57:44.585269 Done reading resources.
939 18:57:44.585339 Show resources in subtree (Root Device)...After reading.
940 18:57:44.585403 Root Device child on link 0 CPU_CLUSTER: 0
941 18:57:44.585475 CPU_CLUSTER: 0 child on link 0 APIC: 00
942 18:57:44.585541 APIC: 00
943 18:57:44.585601 APIC: 02
944 18:57:44.585849
945 18:57:44.585915 DOMAIN: 0000 child on link 0 PCI: 00:00.0
946 18:57:44.586168 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
947 18:57:44.596606 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
948 18:57:44.600153 PCI: 00:00.0
949 18:57:44.603699 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
950 18:57:44.613292 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
951 18:57:44.619942 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
952 18:57:44.629920 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
953 18:57:44.639827 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
954 18:57:44.649545 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
955 18:57:44.659562 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
956 18:57:44.666190 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
957 18:57:44.675875 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
958 18:57:44.685792 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
959 18:57:44.696177 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
960 18:57:44.705849 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
961 18:57:44.715842 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
962 18:57:44.722329 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
963 18:57:44.732242 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
964 18:57:44.742248 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
965 18:57:44.751766 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
966 18:57:44.761880 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
967 18:57:44.768404 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
968 18:57:44.772040
969 18:57:44.772160 PCI: 00:02.0
970 18:57:44.782081 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
971 18:57:44.791354 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
972 18:57:44.801433 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
973 18:57:44.805011 PCI: 00:04.0 child on link 0 GENERIC: 0.0
974 18:57:44.814981 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 18:57:44.818262 GENERIC: 0.0
976 18:57:44.821171 PCI: 00:05.0 child on link 0 GENERIC: 0.0
977 18:57:44.831276 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
978 18:57:44.834690 GENERIC: 0.0
979 18:57:44.834805 PCI: 00:08.0
980 18:57:44.844843 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
981 18:57:44.847705 PCI: 00:14.0 child on link 0 USB0 port 0
982 18:57:44.857880 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
983 18:57:44.861164
984 18:57:44.864474 USB0 port 0 child on link 0 USB2 port 0
985 18:57:44.864574 USB2 port 0
986 18:57:44.867981 USB2 port 1
987 18:57:44.868068 USB2 port 2
988 18:57:44.871054 USB2 port 3
989 18:57:44.871142 USB2 port 4
990 18:57:44.874713 USB2 port 5
991 18:57:44.874807 USB2 port 6
992 18:57:44.877759
993 18:57:44.877850 USB2 port 7
994 18:57:44.881084 USB3 port 0
995 18:57:44.881181 USB3 port 1
996 18:57:44.884693 USB3 port 2
997 18:57:44.884789 USB3 port 3
998 18:57:44.887754 PCI: 00:14.2
999 18:57:44.891210 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1000 18:57:44.900728 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1001 18:57:44.904484 GENERIC: 0.0
1002 18:57:44.904599 PCI: 00:14.5
1003 18:57:44.914141 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 18:57:44.917708 PCI: 00:15.0 child on link 0 I2C: 00:2c
1005 18:57:44.927244 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 18:57:44.930788 I2C: 00:2c
1007 18:57:44.930898 I2C: 00:15
1008 18:57:44.934230 PCI: 00:15.1
1009 18:57:44.943702 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 18:57:44.947380 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1011 18:57:44.957002 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 18:57:44.960417 GENERIC: 0.0
1013 18:57:44.960527 I2C: 00:15
1014 18:57:44.963582 I2C: 00:10
1015 18:57:44.963677 I2C: 00:10
1016 18:57:44.963773 I2C: 00:2c
1017 18:57:44.967077
1018 18:57:44.967165 I2C: 00:40
1019 18:57:44.967234 I2C: 00:10
1020 18:57:44.970486 I2C: 00:39
1021 18:57:44.973574 PCI: 00:15.3 child on link 0 I2C: 00:36
1022 18:57:44.983881 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 18:57:44.987323 I2C: 00:36
1024 18:57:44.987436 I2C: 00:10
1025 18:57:44.990380 I2C: 00:0c
1026 18:57:44.990468 I2C: 00:50
1027 18:57:44.993796 PCI: 00:16.0
1028 18:57:45.003521 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 18:57:45.006826 PCI: 00:19.0 child on link 0 I2C: 00:1a
1030 18:57:45.016723 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 18:57:45.016871 I2C: 00:1a
1032 18:57:45.019832 I2C: 00:1a
1033 18:57:45.019932 I2C: 00:1a
1034 18:57:45.023397 I2C: 00:28
1035 18:57:45.023497 I2C: 00:29
1036 18:57:45.026927 PCI: 00:19.2
1037 18:57:45.036787 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1038 18:57:45.046784 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1039 18:57:45.049664 PCI: 00:1a.0
1040 18:57:45.060069 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 18:57:45.060204 PCI: 00:1e.0
1042 18:57:45.063046 PCI: 00:1e.2 child on link 0 SPI: 00
1043 18:57:45.072986 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1044 18:57:45.076637 SPI: 00
1045 18:57:45.079644 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1046 18:57:45.089677 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1047 18:57:45.089812 PNP: 0c09.0
1048 18:57:45.099723 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1049 18:57:45.099851 PCI: 00:1f.2
1050 18:57:45.109284 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1051 18:57:45.119068 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1052 18:57:45.122516 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1053 18:57:45.132261 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1054 18:57:45.142270 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1055 18:57:45.145727 GENERIC: 0.0
1056 18:57:45.145825 PCI: 00:1f.5
1057 18:57:45.155810 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1058 18:57:45.162510 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1059 18:57:45.171932 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1060 18:57:45.175714 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1061 18:57:45.185671 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1062 18:57:45.192300 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1063 18:57:45.198830 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1064 18:57:45.201800 DOMAIN: 0000: Resource ranges:
1065 18:57:45.205401 * Base: 1000, Size: 800, Tag: 100
1066 18:57:45.208560 * Base: 1900, Size: e700, Tag: 100
1067 18:57:45.215413 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1068 18:57:45.221708 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1069 18:57:45.228648 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1070 18:57:45.235399 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1071 18:57:45.245348 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1072 18:57:45.251924 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1073 18:57:45.258548 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1074 18:57:45.268352 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1075 18:57:45.274970 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1076 18:57:45.281321 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1077 18:57:45.291224 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1078 18:57:45.297930 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1079 18:57:45.304411 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1080 18:57:45.314278 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1081 18:57:45.320652 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1082 18:57:45.327829 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1083 18:57:45.337393 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1084 18:57:45.344251 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1085 18:57:45.350543 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1086 18:57:45.360316 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1087 18:57:45.367244 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1088 18:57:45.374151 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1089 18:57:45.380217 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1090 18:57:45.383996
1091 18:57:45.390032 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1092 18:57:45.393379 DOMAIN: 0000: Resource ranges:
1093 18:57:45.396972 * Base: 7fc00000, Size: 40400000, Tag: 200
1094 18:57:45.400288 * Base: d0000000, Size: 2b000000, Tag: 200
1095 18:57:45.406775 * Base: fb001000, Size: 2fff000, Tag: 200
1096 18:57:45.409718 * Base: fe010000, Size: 22000, Tag: 200
1097 18:57:45.413480 * Base: fe033000, Size: a4d000, Tag: 200
1098 18:57:45.419690 * Base: fea88000, Size: 2f8000, Tag: 200
1099 18:57:45.423207 * Base: fed88000, Size: 8000, Tag: 200
1100 18:57:45.426829 * Base: fed93000, Size: d000, Tag: 200
1101 18:57:45.429760 * Base: feda2000, Size: 125e000, Tag: 200
1102 18:57:45.436515 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1103 18:57:45.442795 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1104 18:57:45.449703 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1105 18:57:45.456219 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1106 18:57:45.462906 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1107 18:57:45.469584 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1108 18:57:45.475919 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1109 18:57:45.482431 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1110 18:57:45.488874 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1111 18:57:45.495504 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1112 18:57:45.502380 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1113 18:57:45.509025 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1114 18:57:45.515674 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1115 18:57:45.522619 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1116 18:57:45.528557 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1117 18:57:45.535014 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1118 18:57:45.541684 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1119 18:57:45.548638 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1120 18:57:45.554939 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1121 18:57:45.561541 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1122 18:57:45.568171 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1123 18:57:45.574632 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1124 18:57:45.581318 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1125 18:57:45.588067 Root Device assign_resources, bus 0 link: 0
1126 18:57:45.591340 DOMAIN: 0000 assign_resources, bus 0 link: 0
1127 18:57:45.601220 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1128 18:57:45.607788 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1129 18:57:45.614755 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1130 18:57:45.624707 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1131 18:57:45.627431 PCI: 00:04.0 assign_resources, bus 1 link: 0
1132 18:57:45.634096 PCI: 00:04.0 assign_resources, bus 1 link: 0
1133 18:57:45.640881 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1134 18:57:45.644442 PCI: 00:05.0 assign_resources, bus 2 link: 0
1135 18:57:45.650778 PCI: 00:05.0 assign_resources, bus 2 link: 0
1136 18:57:45.657223 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1137 18:57:45.667548 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1138 18:57:45.670425 PCI: 00:14.0 assign_resources, bus 0 link: 0
1139 18:57:45.676998 PCI: 00:14.0 assign_resources, bus 0 link: 0
1140 18:57:45.683616 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1141 18:57:45.687081 PCI: 00:14.3 assign_resources, bus 0 link: 0
1142 18:57:45.693871 PCI: 00:14.3 assign_resources, bus 0 link: 0
1143 18:57:45.700415 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1144 18:57:45.710491 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1145 18:57:45.713397 PCI: 00:15.0 assign_resources, bus 0 link: 0
1146 18:57:45.719769 PCI: 00:15.0 assign_resources, bus 0 link: 0
1147 18:57:45.726643 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1148 18:57:45.733240 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1149 18:57:45.739728 PCI: 00:15.2 assign_resources, bus 0 link: 0
1150 18:57:45.743362 PCI: 00:15.2 assign_resources, bus 0 link: 0
1151 18:57:45.752929 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1152 18:57:45.756316 PCI: 00:15.3 assign_resources, bus 0 link: 0
1153 18:57:45.759842 PCI: 00:15.3 assign_resources, bus 0 link: 0
1154 18:57:45.769842 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1155 18:57:45.776497 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1156 18:57:45.782983 PCI: 00:19.0 assign_resources, bus 0 link: 0
1157 18:57:45.786003 PCI: 00:19.0 assign_resources, bus 0 link: 0
1158 18:57:45.795824 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1159 18:57:45.802481 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1160 18:57:45.812325 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1161 18:57:45.815806 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1162 18:57:45.818685 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1163 18:57:45.825853 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1164 18:57:45.828712 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1165 18:57:45.835311 LPC: Trying to open IO window from 800 size 1ff
1166 18:57:45.842464 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1167 18:57:45.849218 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1168 18:57:45.851986
1169 18:57:45.855473 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1170 18:57:45.859035 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1171 18:57:45.866070 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1172 18:57:45.873254 DOMAIN: 0000 assign_resources, bus 0 link: 0
1173 18:57:45.876280 Root Device assign_resources, bus 0 link: 0
1174 18:57:45.879401 Done setting resources.
1175 18:57:45.886396 Show resources in subtree (Root Device)...After assigning values.
1176 18:57:45.889499 Root Device child on link 0 CPU_CLUSTER: 0
1177 18:57:45.892953 CPU_CLUSTER: 0 child on link 0 APIC: 00
1178 18:57:45.895983
1179 18:57:45.896068 APIC: 00
1180 18:57:45.896144 APIC: 02
1181 18:57:45.903150 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1182 18:57:45.909397 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1183 18:57:45.919473 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1184 18:57:45.923581 PCI: 00:00.0
1185 18:57:45.931153 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1186 18:57:45.941130 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1187 18:57:45.951236 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1188 18:57:45.958120 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1189 18:57:45.968665 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1190 18:57:45.978851 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1191 18:57:45.988489 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1192 18:57:45.998702 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1193 18:57:46.005865 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1194 18:57:46.015906 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1195 18:57:46.025939 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1196 18:57:46.032396 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1197 18:57:46.035754
1198 18:57:46.042830 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1199 18:57:46.052123 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1200 18:57:46.062170 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1201 18:57:46.072267 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1202 18:57:46.082358 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1203 18:57:46.091908 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1204 18:57:46.098471 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1205 18:57:46.102059 PCI: 00:02.0
1206 18:57:46.111656 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1207 18:57:46.122260 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1208 18:57:46.132559 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1209 18:57:46.135844 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1210 18:57:46.145853 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1211 18:57:46.148826 GENERIC: 0.0
1212 18:57:46.152548 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1213 18:57:46.162357 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1214 18:57:46.165987 GENERIC: 0.0
1215 18:57:46.166111 PCI: 00:08.0
1216 18:57:46.175364 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1217 18:57:46.182117 PCI: 00:14.0 child on link 0 USB0 port 0
1218 18:57:46.191905 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1219 18:57:46.195405 USB0 port 0 child on link 0 USB2 port 0
1220 18:57:46.198620 USB2 port 0
1221 18:57:46.198722 USB2 port 1
1222 18:57:46.202190 USB2 port 2
1223 18:57:46.202288 USB2 port 3
1224 18:57:46.205100 USB2 port 4
1225 18:57:46.205178 USB2 port 5
1226 18:57:46.208650 USB2 port 6
1227 18:57:46.208740 USB2 port 7
1228 18:57:46.211663
1229 18:57:46.211750 USB3 port 0
1230 18:57:46.215002 USB3 port 1
1231 18:57:46.215090 USB3 port 2
1232 18:57:46.218574 USB3 port 3
1233 18:57:46.218656 PCI: 00:14.2
1234 18:57:46.222245 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1235 18:57:46.233384 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1236 18:57:46.237550 GENERIC: 0.0
1237 18:57:46.237670 PCI: 00:14.5
1238 18:57:46.247824 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1239 18:57:46.251357 PCI: 00:15.0 child on link 0 I2C: 00:2c
1240 18:57:46.261563 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1241 18:57:46.264526 I2C: 00:2c
1242 18:57:46.264626 I2C: 00:15
1243 18:57:46.267917 PCI: 00:15.1
1244 18:57:46.278144 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1245 18:57:46.281145 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1246 18:57:46.290715 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1247 18:57:46.294207 GENERIC: 0.0
1248 18:57:46.294294 I2C: 00:15
1249 18:57:46.297875 I2C: 00:10
1250 18:57:46.297958 I2C: 00:10
1251 18:57:46.300796 I2C: 00:2c
1252 18:57:46.300878 I2C: 00:40
1253 18:57:46.304376 I2C: 00:10
1254 18:57:46.304455 I2C: 00:39
1255 18:57:46.307449 PCI: 00:15.3 child on link 0 I2C: 00:36
1256 18:57:46.320385 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1257 18:57:46.320511 I2C: 00:36
1258 18:57:46.320589 I2C: 00:10
1259 18:57:46.323955 I2C: 00:0c
1260 18:57:46.324040 I2C: 00:50
1261 18:57:46.327392 PCI: 00:16.0
1262 18:57:46.337574 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1263 18:57:46.340879 PCI: 00:19.0 child on link 0 I2C: 00:1a
1264 18:57:46.350665 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1265 18:57:46.353473 I2C: 00:1a
1266 18:57:46.353583 I2C: 00:1a
1267 18:57:46.356979 I2C: 00:1a
1268 18:57:46.357105 I2C: 00:28
1269 18:57:46.360541 I2C: 00:29
1270 18:57:46.360663 PCI: 00:19.2
1271 18:57:46.373612 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1272 18:57:46.383077 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1273 18:57:46.383207 PCI: 00:1a.0
1274 18:57:46.393268 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1275 18:57:46.397109 PCI: 00:1e.0
1276 18:57:46.399967 PCI: 00:1e.2 child on link 0 SPI: 00
1277 18:57:46.409749 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1278 18:57:46.413505 SPI: 00
1279 18:57:46.416357 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1280 18:57:46.426306 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1281 18:57:46.426447 PNP: 0c09.0
1282 18:57:46.433696 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1283 18:57:46.436873
1284 18:57:46.436984 PCI: 00:1f.2
1285 18:57:46.447342 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1286 18:57:46.453932 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1287 18:57:46.460508 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1288 18:57:46.470302 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1289 18:57:46.480390 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1290 18:57:46.483431 GENERIC: 0.0
1291 18:57:46.483551 PCI: 00:1f.5
1292 18:57:46.493632 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1293 18:57:46.496994 Done allocating resources.
1294 18:57:46.503394 BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2096 ms
1295 18:57:46.506562 Enabling resources...
1296 18:57:46.510142 PCI: 00:00.0 subsystem <- 8086/4e22
1297 18:57:46.513165 PCI: 00:00.0 cmd <- 06
1298 18:57:46.517197 PCI: 00:02.0 subsystem <- 8086/4e55
1299 18:57:46.517326 PCI: 00:02.0 cmd <- 03
1300 18:57:46.519983
1301 18:57:46.523546 PCI: 00:04.0 subsystem <- 8086/4e03
1302 18:57:46.523663 PCI: 00:04.0 cmd <- 02
1303 18:57:46.526835 PCI: 00:05.0 bridge ctrl <- 0003
1304 18:57:46.529718 PCI: 00:05.0 subsystem <- 8086/4e19
1305 18:57:46.533293
1306 18:57:46.533424 PCI: 00:05.0 cmd <- 02
1307 18:57:46.536232 PCI: 00:08.0 cmd <- 06
1308 18:57:46.539856 PCI: 00:14.0 subsystem <- 8086/4ded
1309 18:57:46.543223 PCI: 00:14.0 cmd <- 02
1310 18:57:46.546875 PCI: 00:14.3 subsystem <- 8086/4df0
1311 18:57:46.549598 PCI: 00:14.3 cmd <- 02
1312 18:57:46.552937 PCI: 00:14.5 subsystem <- 8086/4df8
1313 18:57:46.556582 PCI: 00:14.5 cmd <- 06
1314 18:57:46.559649 PCI: 00:15.0 subsystem <- 8086/4de8
1315 18:57:46.559770 PCI: 00:15.0 cmd <- 02
1316 18:57:46.566292 PCI: 00:15.1 subsystem <- 8086/4de9
1317 18:57:46.566417 PCI: 00:15.1 cmd <- 02
1318 18:57:46.569753 PCI: 00:15.2 subsystem <- 8086/4dea
1319 18:57:46.573152 PCI: 00:15.2 cmd <- 02
1320 18:57:46.576007 PCI: 00:15.3 subsystem <- 8086/4deb
1321 18:57:46.579624 PCI: 00:15.3 cmd <- 02
1322 18:57:46.582574 PCI: 00:16.0 subsystem <- 8086/4de0
1323 18:57:46.586159 PCI: 00:16.0 cmd <- 02
1324 18:57:46.589482 PCI: 00:19.0 subsystem <- 8086/4dc5
1325 18:57:46.592937 PCI: 00:19.0 cmd <- 02
1326 18:57:46.595919 PCI: 00:19.2 subsystem <- 8086/4dc7
1327 18:57:46.596040 PCI: 00:19.2 cmd <- 06
1328 18:57:46.599593
1329 18:57:46.602699 PCI: 00:1a.0 subsystem <- 8086/4dc4
1330 18:57:46.602818 PCI: 00:1a.0 cmd <- 06
1331 18:57:46.605673 PCI: 00:1e.2 subsystem <- 8086/4daa
1332 18:57:46.609418
1333 18:57:46.609536 PCI: 00:1e.2 cmd <- 06
1334 18:57:46.612399 PCI: 00:1f.0 subsystem <- 8086/4d87
1335 18:57:46.616058 PCI: 00:1f.0 cmd <- 407
1336 18:57:46.618888 PCI: 00:1f.3 subsystem <- 8086/4dc8
1337 18:57:46.622508 PCI: 00:1f.3 cmd <- 02
1338 18:57:46.625969 PCI: 00:1f.5 subsystem <- 8086/4da4
1339 18:57:46.629033 PCI: 00:1f.5 cmd <- 406
1340 18:57:46.632632 done.
1341 18:57:46.636036 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1342 18:57:46.639465 Initializing devices...
1343 18:57:46.643043 Root Device init
1344 18:57:46.643169 mainboard: EC init
1345 18:57:46.649237 Chrome EC: Set SMI mask to 0x0000000000000000
1346 18:57:46.652615 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1347 18:57:46.655876
1348 18:57:46.659142 ELOG: NV offset 0xbfa000 size 0x1000
1349 18:57:46.665699 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1350 18:57:46.672591 ELOG: Event(17) added with size 13 at 2023-01-21 18:57:46 UTC
1351 18:57:46.679188 ELOG: Event(91) added with size 10 at 2023-01-21 18:57:46 UTC
1352 18:57:46.682510 Chrome EC: clear events_b mask to 0x0000000000800000
1353 18:57:46.685635
1354 18:57:47.590205 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1355 18:57:47.599392 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1356 18:57:47.606730 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1357 18:57:47.610288 Chrome EC: Set WAKE mask to 0x0000000000000000
1358 18:57:47.613792 Root Device init finished in 968 msecs
1359 18:57:47.616922 PCI: 00:00.0 init
1360 18:57:47.620503 CPU TDP = 6 Watts
1361 18:57:47.620609 CPU PL1 = 7 Watts
1362 18:57:47.623906 CPU PL2 = 12 Watts
1363 18:57:47.626987 PCI: 00:00.0 init finished in 6 msecs
1364 18:57:47.630587 PCI: 00:02.0 init
1365 18:57:47.633706 GMA: Found VBT in CBFS
1366 18:57:47.633801 GMA: Found valid VBT in CBFS
1367 18:57:47.640138 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1368 18:57:47.647127 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1369 18:57:47.653661 PCI: 00:02.0 init finished in 18 msecs
1370 18:57:47.653761 PCI: 00:08.0 init
1371 18:57:47.660039 PCI: 00:08.0 init finished in 0 msecs
1372 18:57:47.660131 PCI: 00:14.0 init
1373 18:57:47.666471 XHCI: Updated LFPS sampling OFF time to 9 ms
1374 18:57:47.669974 PCI: 00:14.0 init finished in 4 msecs
1375 18:57:47.673512 PCI: 00:15.0 init
1376 18:57:47.673622 I2C bus 0 version 0x3230302a
1377 18:57:47.679943 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1378 18:57:47.682991 PCI: 00:15.0 init finished in 6 msecs
1379 18:57:47.683082 PCI: 00:15.1 init
1380 18:57:47.686373 I2C bus 1 version 0x3230302a
1381 18:57:47.689799 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1382 18:57:47.692824 PCI: 00:15.1 init finished in 6 msecs
1383 18:57:47.696436 PCI: 00:15.2 init
1384 18:57:47.699841 I2C bus 2 version 0x3230302a
1385 18:57:47.703427 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1386 18:57:47.706867 PCI: 00:15.2 init finished in 6 msecs
1387 18:57:47.709942 PCI: 00:15.3 init
1388 18:57:47.713200 I2C bus 3 version 0x3230302a
1389 18:57:47.716565 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1390 18:57:47.720014 PCI: 00:15.3 init finished in 6 msecs
1391 18:57:47.723050 PCI: 00:16.0 init
1392 18:57:47.726786 PCI: 00:16.0 init finished in 0 msecs
1393 18:57:47.726874 PCI: 00:19.0 init
1394 18:57:47.729675 I2C bus 4 version 0x3230302a
1395 18:57:47.733191 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1396 18:57:47.736119 PCI: 00:19.0 init finished in 6 msecs
1397 18:57:47.739570
1398 18:57:47.739664 PCI: 00:1a.0 init
1399 18:57:47.743069 PCI: 00:1a.0 init finished in 0 msecs
1400 18:57:47.746580 PCI: 00:1f.0 init
1401 18:57:47.749688 IOAPIC: Initializing IOAPIC at 0xfec00000
1402 18:57:47.756650 IOAPIC: Bootstrap Processor Local APIC = 0x00
1403 18:57:47.756746 IOAPIC: ID = 0x02
1404 18:57:47.760245 IOAPIC: Dumping registers
1405 18:57:47.763137 reg 0x0000: 0x02000000
1406 18:57:47.766652 reg 0x0001: 0x00770020
1407 18:57:47.766742 reg 0x0002: 0x00000000
1408 18:57:47.772914 PCI: 00:1f.0 init finished in 21 msecs
1409 18:57:47.773008 PCI: 00:1f.2 init
1410 18:57:47.776435 Disabling ACPI via APMC.
1411 18:57:47.780537 APMC done.
1412 18:57:47.784046 PCI: 00:1f.2 init finished in 6 msecs
1413 18:57:47.794987 PNP: 0c09.0 init
1414 18:57:47.798526 Google Chrome EC uptime: 7.734 seconds
1415 18:57:47.804915 Google Chrome AP resets since EC boot: 0
1416 18:57:47.808590 Google Chrome most recent AP reset causes:
1417 18:57:47.814512 Google Chrome EC reset flags at last EC boot: reset-pin
1418 18:57:47.818119 PNP: 0c09.0 init finished in 18 msecs
1419 18:57:47.818208 Devices initialized
1420 18:57:47.821735 Show all devs... After init.
1421 18:57:47.824694 Root Device: enabled 1
1422 18:57:47.827974 CPU_CLUSTER: 0: enabled 1
1423 18:57:47.831222 DOMAIN: 0000: enabled 1
1424 18:57:47.831318 PCI: 00:00.0: enabled 1
1425 18:57:47.834857 PCI: 00:02.0: enabled 1
1426 18:57:47.837974 PCI: 00:04.0: enabled 1
1427 18:57:47.838056 PCI: 00:05.0: enabled 1
1428 18:57:47.841367 PCI: 00:09.0: enabled 0
1429 18:57:47.844607 PCI: 00:12.6: enabled 0
1430 18:57:47.848141 PCI: 00:14.0: enabled 1
1431 18:57:47.848230 PCI: 00:14.1: enabled 0
1432 18:57:47.851110 PCI: 00:14.2: enabled 0
1433 18:57:47.854528 PCI: 00:14.3: enabled 1
1434 18:57:47.858121 PCI: 00:14.5: enabled 1
1435 18:57:47.858209 PCI: 00:15.0: enabled 1
1436 18:57:47.861161 PCI: 00:15.1: enabled 1
1437 18:57:47.864001 PCI: 00:15.2: enabled 1
1438 18:57:47.867520 PCI: 00:15.3: enabled 1
1439 18:57:47.867613 PCI: 00:16.0: enabled 1
1440 18:57:47.870986 PCI: 00:16.1: enabled 0
1441 18:57:47.874300 PCI: 00:16.4: enabled 0
1442 18:57:47.874389 PCI: 00:16.5: enabled 0
1443 18:57:47.877339
1444 18:57:47.877432 PCI: 00:17.0: enabled 0
1445 18:57:47.880958 PCI: 00:19.0: enabled 1
1446 18:57:47.884071 PCI: 00:19.1: enabled 0
1447 18:57:47.884171 PCI: 00:19.2: enabled 1
1448 18:57:47.887557 PCI: 00:1a.0: enabled 1
1449 18:57:47.890967 PCI: 00:1c.0: enabled 0
1450 18:57:47.894494 PCI: 00:1c.1: enabled 0
1451 18:57:47.894582 PCI: 00:1c.2: enabled 0
1452 18:57:47.897806 PCI: 00:1c.3: enabled 0
1453 18:57:47.900822 PCI: 00:1c.4: enabled 0
1454 18:57:47.904203 PCI: 00:1c.5: enabled 0
1455 18:57:47.904291 PCI: 00:1c.6: enabled 0
1456 18:57:47.907741 PCI: 00:1c.7: enabled 1
1457 18:57:47.910579 PCI: 00:1e.0: enabled 0
1458 18:57:47.910668 PCI: 00:1e.1: enabled 0
1459 18:57:47.914222 PCI: 00:1e.2: enabled 1
1460 18:57:47.917868 PCI: 00:1e.3: enabled 0
1461 18:57:47.920779 PCI: 00:1f.0: enabled 1
1462 18:57:47.920866 PCI: 00:1f.1: enabled 0
1463 18:57:47.924155 PCI: 00:1f.2: enabled 1
1464 18:57:47.927142 PCI: 00:1f.3: enabled 1
1465 18:57:47.930762 PCI: 00:1f.4: enabled 0
1466 18:57:47.930853 PCI: 00:1f.5: enabled 1
1467 18:57:47.933723 PCI: 00:1f.7: enabled 0
1468 18:57:47.937147 GENERIC: 0.0: enabled 1
1469 18:57:47.940791 GENERIC: 0.0: enabled 1
1470 18:57:47.940880 USB0 port 0: enabled 1
1471 18:57:47.943871 GENERIC: 0.0: enabled 1
1472 18:57:47.947268 I2C: 00:2c: enabled 1
1473 18:57:47.947356 I2C: 00:15: enabled 1
1474 18:57:47.950272 GENERIC: 0.0: enabled 0
1475 18:57:47.953934 I2C: 00:15: enabled 1
1476 18:57:47.954021 I2C: 00:10: enabled 0
1477 18:57:47.956775 I2C: 00:10: enabled 0
1478 18:57:47.960169 I2C: 00:2c: enabled 1
1479 18:57:47.960256 I2C: 00:40: enabled 1
1480 18:57:47.963865
1481 18:57:47.963953 I2C: 00:10: enabled 1
1482 18:57:47.966688 I2C: 00:39: enabled 1
1483 18:57:47.970430 I2C: 00:36: enabled 1
1484 18:57:47.970516 I2C: 00:10: enabled 0
1485 18:57:47.973821 I2C: 00:0c: enabled 1
1486 18:57:47.976840 I2C: 00:50: enabled 1
1487 18:57:47.976923 I2C: 00:1a: enabled 1
1488 18:57:47.980254 I2C: 00:1a: enabled 0
1489 18:57:47.983623 I2C: 00:1a: enabled 0
1490 18:57:47.983712 I2C: 00:28: enabled 1
1491 18:57:47.986617 I2C: 00:29: enabled 1
1492 18:57:47.990159 PCI: 00:00.0: enabled 1
1493 18:57:47.990245 SPI: 00: enabled 1
1494 18:57:47.993159 PNP: 0c09.0: enabled 1
1495 18:57:47.996524 GENERIC: 0.0: enabled 0
1496 18:57:47.996614 USB2 port 0: enabled 1
1497 18:57:47.999943 USB2 port 1: enabled 1
1498 18:57:48.003538 USB2 port 2: enabled 1
1499 18:57:48.006536 USB2 port 3: enabled 1
1500 18:57:48.006651 USB2 port 4: enabled 0
1501 18:57:48.009752 USB2 port 5: enabled 1
1502 18:57:48.013259 USB2 port 6: enabled 0
1503 18:57:48.013341 USB2 port 7: enabled 1
1504 18:57:48.016324 USB3 port 0: enabled 1
1505 18:57:48.019940 USB3 port 1: enabled 1
1506 18:57:48.020027 USB3 port 2: enabled 1
1507 18:57:48.022971
1508 18:57:48.023057 USB3 port 3: enabled 1
1509 18:57:48.026631 APIC: 00: enabled 1
1510 18:57:48.026711 APIC: 02: enabled 1
1511 18:57:48.029686 PCI: 00:08.0: enabled 1
1512 18:57:48.036272 BS: BS_DEV_INIT run times (exec / console): 929 / 464 ms
1513 18:57:48.042818 ELOG: Event(92) added with size 9 at 2023-01-21 18:57:48 UTC
1514 18:57:48.049297 ELOG: Event(93) added with size 9 at 2023-01-21 18:57:48 UTC
1515 18:57:48.055701 ELOG: Event(9E) added with size 10 at 2023-01-21 18:57:48 UTC
1516 18:57:48.059312 ELOG: Event(9F) added with size 14 at 2023-01-21 18:57:48 UTC
1517 18:57:48.065851 BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms
1518 18:57:48.072741 ELOG: Event(A1) added with size 10 at 2023-01-21 18:57:48 UTC
1519 18:57:48.079129 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1520 18:57:48.085935 ELOG: Event(A0) added with size 9 at 2023-01-21 18:57:48 UTC
1521 18:57:48.092650 elog_add_boot_reason: Logged dev mode boot
1522 18:57:48.095492 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1523 18:57:48.099095 Finalize devices...
1524 18:57:48.099192 Devices finalized
1525 18:57:48.105535 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1526 18:57:48.112304 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1527 18:57:48.115341 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1528 18:57:48.122263 ME: HFSTS1 : 0x80030045
1529 18:57:48.125164 ME: HFSTS2 : 0x30280136
1530 18:57:48.128806 ME: HFSTS3 : 0x00000050
1531 18:57:48.131784 ME: HFSTS4 : 0x00004000
1532 18:57:48.138728 ME: HFSTS5 : 0x00000000
1533 18:57:48.141710 ME: HFSTS6 : 0x40400006
1534 18:57:48.145269 ME: Manufacturing Mode : NO
1535 18:57:48.148912 ME: FW Partition Table : OK
1536 18:57:48.151818 ME: Bringup Loader Failure : NO
1537 18:57:48.154793 ME: Firmware Init Complete : NO
1538 18:57:48.158327 ME: Boot Options Present : NO
1539 18:57:48.161780 ME: Update In Progress : NO
1540 18:57:48.165171 ME: D0i3 Support : YES
1541 18:57:48.168244 ME: Low Power State Enabled : NO
1542 18:57:48.171956 ME: CPU Replaced : YES
1543 18:57:48.175148 ME: CPU Replacement Valid : YES
1544 18:57:48.178541 ME: Current Working State : 5
1545 18:57:48.181274 ME: Current Operation State : 1
1546 18:57:48.184924 ME: Current Operation Mode : 3
1547 18:57:48.187885 ME: Error Code : 0
1548 18:57:48.191395 ME: CPU Debug Disabled : YES
1549 18:57:48.194517 ME: TXT Support : NO
1550 18:57:48.201511 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1551 18:57:48.204479 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1552 18:57:48.211656 ACPI: Writing ACPI tables at 76b27000.
1553 18:57:48.211753 ACPI: * FACS
1554 18:57:48.214883 ACPI: * DSDT
1555 18:57:48.218047 Ramoops buffer: 0x100000@0x76a26000.
1556 18:57:48.221444 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1557 18:57:48.227724 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1558 18:57:48.231100 Google Chrome EC: version:
1559 18:57:48.234706 ro: magolor_1.1.9999-103b6f9
1560 18:57:48.234792 rw: magolor_1.1.9999-103b6f9
1561 18:57:48.238153 running image: 1
1562 18:57:48.244717 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1563 18:57:48.247735 ACPI: * FADT
1564 18:57:48.247818 SCI is IRQ9
1565 18:57:48.251300 ACPI: added table 1/32, length now 40
1566 18:57:48.254255 ACPI: * SSDT
1567 18:57:48.257714 Found 1 CPU(s) with 2 core(s) each.
1568 18:57:48.261319 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1569 18:57:48.267732 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1570 18:57:48.271340 Could not locate 'wifi_sar' in VPD.
1571 18:57:48.274252 Checking CBFS for default SAR values
1572 18:57:48.281216 wifi_sar_defaults.hex has bad len in CBFS
1573 18:57:48.284085 failed from getting SAR limits!
1574 18:57:48.287621 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1575 18:57:48.294135 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1576 18:57:48.297339 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1577 18:57:48.303984 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1578 18:57:48.307516 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1579 18:57:48.313954 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1580 18:57:48.317557 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1581 18:57:48.324126 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1582 18:57:48.330589 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1583 18:57:48.337256 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1584 18:57:48.340365 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1585 18:57:48.347456 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1586 18:57:48.353829 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1587 18:57:48.357495 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1588 18:57:48.360568 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1589 18:57:48.368148 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1590 18:57:48.371074 PS2K: Passing 101 keymaps to kernel
1591 18:57:48.378159 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1592 18:57:48.384547 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1593 18:57:48.388033 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1594 18:57:48.394589 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1595 18:57:48.397942 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1596 18:57:48.404606 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1597 18:57:48.410915 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1598 18:57:48.414500 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1599 18:57:48.417930
1600 18:57:48.420885 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1601 18:57:48.427980 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1602 18:57:48.430985 ACPI: added table 2/32, length now 44
1603 18:57:48.434649 ACPI: * MCFG
1604 18:57:48.437408 ACPI: added table 3/32, length now 48
1605 18:57:48.437504 ACPI: * TPM2
1606 18:57:48.441208 TPM2 log created at 0x76a16000
1607 18:57:48.443978 ACPI: added table 4/32, length now 52
1608 18:57:48.447481 ACPI: * MADT
1609 18:57:48.447559 SCI is IRQ9
1610 18:57:48.450588 ACPI: added table 5/32, length now 56
1611 18:57:48.454096 current = 76b2d580
1612 18:57:48.454184 ACPI: * DMAR
1613 18:57:48.457574
1614 18:57:48.461093 ACPI: added table 6/32, length now 60
1615 18:57:48.464069 ACPI: added table 7/32, length now 64
1616 18:57:48.464158 ACPI: * HPET
1617 18:57:48.467477 ACPI: added table 8/32, length now 68
1618 18:57:48.471013 ACPI: done.
1619 18:57:48.474021 ACPI tables: 26304 bytes.
1620 18:57:48.477712 smbios_write_tables: 76a15000
1621 18:57:48.480859 EC returned error result code 3
1622 18:57:48.483930 Couldn't obtain OEM name from CBI
1623 18:57:48.484028 Create SMBIOS type 16
1624 18:57:48.487490 Create SMBIOS type 17
1625 18:57:48.490615 GENERIC: 0.0 (WIFI Device)
1626 18:57:48.494023 SMBIOS tables: 913 bytes.
1627 18:57:48.497563 Writing table forward entry at 0x00000500
1628 18:57:48.504070 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1629 18:57:48.507186 Writing coreboot table at 0x76b4b000
1630 18:57:48.514210 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1631 18:57:48.517517 1. 0000000000001000-000000000009ffff: RAM
1632 18:57:48.523974 2. 00000000000a0000-00000000000fffff: RESERVED
1633 18:57:48.526894 3. 0000000000100000-0000000076a14fff: RAM
1634 18:57:48.534039 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1635 18:57:48.537056 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1636 18:57:48.543596 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1637 18:57:48.547124 7. 0000000077000000-000000007fbfffff: RESERVED
1638 18:57:48.553730 8. 00000000c0000000-00000000cfffffff: RESERVED
1639 18:57:48.556650 9. 00000000fb000000-00000000fb000fff: RESERVED
1640 18:57:48.563692 10. 00000000fe000000-00000000fe00ffff: RESERVED
1641 18:57:48.566568 11. 00000000fea80000-00000000fea87fff: RESERVED
1642 18:57:48.573623 12. 00000000fed80000-00000000fed87fff: RESERVED
1643 18:57:48.576565 13. 00000000fed90000-00000000fed92fff: RESERVED
1644 18:57:48.579819 14. 00000000feda0000-00000000feda1fff: RESERVED
1645 18:57:48.586748 15. 0000000100000000-00000001803fffff: RAM
1646 18:57:48.589858 Passing 4 GPIOs to payload:
1647 18:57:48.593176 NAME | PORT | POLARITY | VALUE
1648 18:57:48.599679 lid | undefined | high | high
1649 18:57:48.603240 power | undefined | high | low
1650 18:57:48.609601 oprom | undefined | high | low
1651 18:57:48.612945 EC in RW | 0x000000b9 | high | low
1652 18:57:48.616513
1653 18:57:48.620026 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum b2de
1654 18:57:48.622916 coreboot table: 1504 bytes.
1655 18:57:48.626577 IMD ROOT 0. 0x76fff000 0x00001000
1656 18:57:48.629577 IMD SMALL 1. 0x76ffe000 0x00001000
1657 18:57:48.636190 FSP MEMORY 2. 0x76c4e000 0x003b0000
1658 18:57:48.639605 CONSOLE 3. 0x76c2e000 0x00020000
1659 18:57:48.643412 FMAP 4. 0x76c2d000 0x00000578
1660 18:57:48.646265 TIME STAMP 5. 0x76c2c000 0x00000910
1661 18:57:48.649816 VBOOT WORK 6. 0x76c18000 0x00014000
1662 18:57:48.653104 ROMSTG STCK 7. 0x76c17000 0x00001000
1663 18:57:48.656447 AFTER CAR 8. 0x76c0d000 0x0000a000
1664 18:57:48.659854 RAMSTAGE 9. 0x76ba7000 0x00066000
1665 18:57:48.666094 REFCODE 10. 0x76b67000 0x00040000
1666 18:57:48.669699 SMM BACKUP 11. 0x76b57000 0x00010000
1667 18:57:48.672667 4f444749 12. 0x76b55000 0x00002000
1668 18:57:48.676123 EXT VBT13. 0x76b53000 0x00001c43
1669 18:57:48.679710 COREBOOT 14. 0x76b4b000 0x00008000
1670 18:57:48.682605 ACPI 15. 0x76b27000 0x00024000
1671 18:57:48.686371 ACPI GNVS 16. 0x76b26000 0x00001000
1672 18:57:48.689303 RAMOOPS 17. 0x76a26000 0x00100000
1673 18:57:48.692696 TPM2 TCGLOG18. 0x76a16000 0x00010000
1674 18:57:48.696122 SMBIOS 19. 0x76a15000 0x00000800
1675 18:57:48.699338
1676 18:57:48.699433 IMD small region:
1677 18:57:48.702505 IMD ROOT 0. 0x76ffec00 0x00000400
1678 18:57:48.705785 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1679 18:57:48.712546 VPD 2. 0x76ffeb80 0x0000004c
1680 18:57:48.715717 POWER STATE 3. 0x76ffeb40 0x00000040
1681 18:57:48.719212 ROMSTAGE 4. 0x76ffeb20 0x00000004
1682 18:57:48.722305 MEM INFO 5. 0x76ffe940 0x000001e0
1683 18:57:48.729293 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1684 18:57:48.732263 MTRR: Physical address space:
1685 18:57:48.739003 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 18:57:48.745498 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 18:57:48.749273 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1688 18:57:48.755714 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1689 18:57:48.762132 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1690 18:57:48.769103 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1691 18:57:48.775398 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1692 18:57:48.778927 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 18:57:48.782006 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 18:57:48.788559 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 18:57:48.792079 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 18:57:48.795637 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 18:57:48.798658 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 18:57:48.805292 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 18:57:48.808367 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 18:57:48.811907 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 18:57:48.815176 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 18:57:48.821577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 18:57:48.821664 call enable_fixed_mtrr()
1704 18:57:48.828511 CPU physical address size: 39 bits
1705 18:57:48.831436 MTRR: default type WB/UC MTRR counts: 6/5.
1706 18:57:48.835196 MTRR: UC selected as default type.
1707 18:57:48.841484 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 18:57:48.848035 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1709 18:57:48.854518 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1710 18:57:48.858105 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1711 18:57:48.864614 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1712 18:57:48.864708
1713 18:57:48.868061
1714 18:57:48.868141 MTRR check
1715 18:57:48.871102 Fixed MTRRs : Enabled
1716 18:57:48.871186 Variable MTRRs: Enabled
1717 18:57:48.871252
1718 18:57:48.878138 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 18:57:48.881014 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 18:57:48.884708 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 18:57:48.887717 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 18:57:48.894790 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 18:57:48.897505 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 18:57:48.900954 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 18:57:48.904262 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 18:57:48.907730 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 18:57:48.910735
1728 18:57:48.914318 MTRR: Fixed MSR 0x26e 0x0606060606060606
1729 18:57:48.917476 MTRR: Fixed MSR 0x26f 0x0606060606060606
1730 18:57:48.924509 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1731 18:57:48.927429 call enable_fixed_mtrr()
1732 18:57:48.932153 Checking cr50 for pending updates
1733 18:57:48.932306 CPU physical address size: 39 bits
1734 18:57:48.936309 Reading cr50 TPM mode
1735 18:57:48.946142 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1736 18:57:48.953713 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1737 18:57:48.956795 Checking segment from ROM address 0xfff9d5b8
1738 18:57:48.964116 Checking segment from ROM address 0xfff9d5d4
1739 18:57:48.967033 Loading segment from ROM address 0xfff9d5b8
1740 18:57:48.970662 code (compression=0)
1741 18:57:48.976963 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1742 18:57:48.987001 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1743 18:57:48.989897 it's not compressed!
1744 18:57:49.115483 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1745 18:57:49.121911 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1746 18:57:49.129476 Loading segment from ROM address 0xfff9d5d4
1747 18:57:49.132820 Entry Point 0x30000000
1748 18:57:49.132935 Loaded segments
1749 18:57:49.139503 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1750 18:57:49.155584 Finalizing chipset.
1751 18:57:49.159057 Finalizing SMM.
1752 18:57:49.159146 APMC done.
1753 18:57:49.165586 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1754 18:57:49.168441 mp_park_aps done after 0 msecs.
1755 18:57:49.172009 Jumping to boot code at 0x30000000(0x76b4b000)
1756 18:57:49.181877 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1757 18:57:49.182003
1758 18:57:49.182075
1759 18:57:49.182148
1760 18:57:49.185238 Starting depthcharge on Magolor...
1761 18:57:49.185330
1762 18:57:49.185696 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
1763 18:57:49.185807 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
1764 18:57:49.185902 Setting prompt string to ['dedede:']
1765 18:57:49.185983 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:45)
1766 18:57:49.195497 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1767 18:57:49.195624
1768 18:57:49.201533 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1769 18:57:49.201621
1770 18:57:49.205020 fw_config match found: AUDIO_AMP=UNPROVISIONED
1771 18:57:49.205101
1772 18:57:49.208240 Wipe memory regions:
1773 18:57:49.208343
1774 18:57:49.211563 [0x00000000001000, 0x000000000a0000)
1775 18:57:49.211664
1776 18:57:49.214815 [0x00000000100000, 0x00000030000000)
1777 18:57:49.214897
1778 18:57:49.347183 [0x00000031062170, 0x00000076a15000)
1779 18:57:49.347329
1780 18:57:49.519855 [0x00000100000000, 0x00000180400000)
1781 18:57:49.519993
1782 18:57:50.582800 R8152: Initializing
1783 18:57:50.582993
1784 18:57:50.586335 Version 9 (ocp_data = 6010)
1785 18:57:50.586470
1786 18:57:50.589387 R8152: Done initializing
1787 18:57:50.589530
1788 18:57:50.593042 Adding net device
1789 18:57:50.593165
1790 18:57:50.596302 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1791 18:57:50.596437
1792 18:57:50.599370
1793 18:57:50.599497
1794 18:57:50.599862 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1796 18:57:50.700609 dedede: tftpboot 192.168.201.1 8815505/tftp-deploy-32_uyma6/kernel/bzImage 8815505/tftp-deploy-32_uyma6/kernel/cmdline 8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
1797 18:57:50.700777 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1798 18:57:50.700876 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
1799 18:57:50.704872 tftpboot 192.168.201.1 8815505/tftp-deploy-32_uyma6/kernel/bzImay-32_uyma6/kernel/cmdline 8815505/tftp-deploy-32_uyma6/ramdisk/ramdisk.cpio.gz
1800 18:57:50.704960
1801 18:57:50.705027 Waiting for link
1802 18:57:50.705089
1803 18:57:50.906824 done.
1804 18:57:50.906964
1805 18:57:50.907039 MAC: 00:e0:4c:75:0d:b4
1806 18:57:50.907123
1807 18:57:50.910017 Sending DHCP discover... done.
1808 18:57:50.910126
1809 18:57:50.913332 Waiting for reply... done.
1810 18:57:50.913437
1811 18:57:50.917065 Sending DHCP request... done.
1812 18:57:50.917164
1813 18:57:50.920094 Waiting for reply... done.
1814 18:57:50.920185
1815 18:57:50.923133 My ip is 192.168.201.20
1816 18:57:50.923221
1817 18:57:50.926317 The DHCP server ip is 192.168.201.1
1818 18:57:50.926407
1819 18:57:50.933026 TFTP server IP predefined by user: 192.168.201.1
1820 18:57:50.933130
1821 18:57:50.939839 Bootfile predefined by user: 8815505/tftp-deploy-32_uyma6/kernel/bzImage
1822 18:57:50.939937
1823 18:57:50.942928 Sending tftp read request... done.
1824 18:57:50.943018
1825 18:57:50.946698 Waiting for the transfer...
1826 18:57:50.946788
1827 18:57:51.212548 00000000 ################################################################
1828 18:57:51.212703
1829 18:57:51.479301 00080000 ################################################################
1830 18:57:51.479458
1831 18:57:51.751793 00100000 ################################################################
1832 18:57:51.751937
1833 18:57:52.015302 00180000 ################################################################
1834 18:57:52.015450
1835 18:57:52.289153 00200000 ################################################################
1836 18:57:52.289300
1837 18:57:52.568043 00280000 ################################################################
1838 18:57:52.568190
1839 18:57:52.825179 00300000 ################################################################
1840 18:57:52.825319
1841 18:57:53.080129 00380000 ################################################################
1842 18:57:53.080282
1843 18:57:53.344339 00400000 ################################################################
1844 18:57:53.344479
1845 18:57:53.598287 00480000 ################################################################
1846 18:57:53.598431
1847 18:57:53.855832 00500000 ################################################################
1848 18:57:53.855978
1849 18:57:54.112580 00580000 ################################################################
1850 18:57:54.112723
1851 18:57:54.375276 00600000 ################################################################
1852 18:57:54.375420
1853 18:57:54.638025 00680000 ################################################################
1854 18:57:54.638177
1855 18:57:54.910868 00700000 ################################################################
1856 18:57:54.911015
1857 18:57:55.186206 00780000 ################################################################
1858 18:57:55.186355
1859 18:57:55.451974 00800000 ################################################################
1860 18:57:55.452123
1861 18:57:55.715473 00880000 ################################################################
1862 18:57:55.715624
1863 18:57:55.848805 00900000 ################################## done.
1864 18:57:55.848942
1865 18:57:55.851798 The bootfile was 9711616 bytes long.
1866 18:57:55.851883
1867 18:57:55.854876 Sending tftp read request... done.
1868 18:57:55.854966
1869 18:57:55.858475 Waiting for the transfer...
1870 18:57:55.858558
1871 18:57:56.113617 00000000 ################################################################
1872 18:57:56.113759
1873 18:57:56.368834 00080000 ################################################################
1874 18:57:56.368981
1875 18:57:56.626636 00100000 ################################################################
1876 18:57:56.626815
1877 18:57:56.891158 00180000 ################################################################
1878 18:57:56.891302
1879 18:57:57.157648 00200000 ################################################################
1880 18:57:57.157790
1881 18:57:57.420705 00280000 ################################################################
1882 18:57:57.420856
1883 18:57:57.767423 00300000 ################################################################
1884 18:57:57.767597
1885 18:57:58.109406 00380000 ################################################################
1886 18:57:58.109562
1887 18:57:58.445856 00400000 ################################################################
1888 18:57:58.446025
1889 18:57:58.778427 00480000 ################################################################
1890 18:57:58.778582
1891 18:57:59.088141 00500000 ################################################################
1892 18:57:59.088278
1893 18:57:59.388365 00580000 ################################################################
1894 18:57:59.388504
1895 18:57:59.692894 00600000 ################################################################
1896 18:57:59.693034
1897 18:57:59.989893 00680000 ################################################################
1898 18:57:59.990037
1899 18:58:00.271951 00700000 ################################################################
1900 18:58:00.272091
1901 18:58:00.549386 00780000 ################################################################
1902 18:58:00.549560
1903 18:58:00.663640 00800000 ######################## done.
1904 18:58:00.663775
1905 18:58:00.666654 Sending tftp read request... done.
1906 18:58:00.666737
1907 18:58:00.670335 Waiting for the transfer...
1908 18:58:00.670425
1909 18:58:00.673201 00000000 # done.
1910 18:58:00.673289
1911 18:58:00.683680 Command line loaded dynamically from TFTP file: 8815505/tftp-deploy-32_uyma6/kernel/cmdline
1912 18:58:00.683766
1913 18:58:00.693524 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1914 18:58:00.693612
1915 18:58:01.252456 ec_init: CrosEC protocol v3 supported (256, 256)
1916 18:58:01.252640
1917 18:58:01.263020 Shutting down all USB controllers.
1918 18:58:01.263128
1919 18:58:01.266616 Removing current net device
1920 18:58:01.266708
1921 18:58:01.269705 Finalizing coreboot
1922 18:58:01.269794
1923 18:58:01.272596 Exiting depthcharge with code 4 at timestamp: 19783002
1924 18:58:01.276339
1925 18:58:01.276430
1926 18:58:01.276498 Starting kernel ...
1927 18:58:01.276562
1928 18:58:01.276626
1929 18:58:01.276697
1930 18:58:01.277082 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
1931 18:58:01.277184 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
1932 18:58:01.277262 Setting prompt string to ['Linux version [0-9]']
1933 18:58:01.277334 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1934 18:58:01.277406 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1936 19:02:34.277559 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
1938 19:02:34.277881 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
1940 19:02:34.278122 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1943 19:02:34.278544 end: 2 depthcharge-action (duration 00:05:00) [common]
1945 19:02:34.278890 Cleaning after the job
1946 19:02:34.279016 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/ramdisk
1947 19:02:34.279966 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/kernel
1948 19:02:34.280982 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815505/tftp-deploy-32_uyma6/modules
1949 19:02:34.281246 start: 5.1 power-off (timeout 00:00:30) [common]
1950 19:02:34.281559 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1951 19:02:34.301740 >> Command sent successfully.
1952 19:02:34.303791 Returned 0 in 0 seconds
1953 19:02:34.404608 end: 5.1 power-off (duration 00:00:00) [common]
1955 19:02:34.405063 start: 5.2 read-feedback (timeout 00:10:00) [common]
1956 19:02:34.405378 Listened to connection for namespace 'common' for up to 1s
1957 19:02:35.409547 Finalising connection for namespace 'common'
1958 19:02:35.409733 Disconnecting from shell: Finalise
1959 19:02:35.510477 end: 5.2 read-feedback (duration 00:00:01) [common]
1960 19:02:35.510654 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8815505
1961 19:02:35.515788 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8815505
1962 19:02:35.515913 JobError: Your job cannot terminate cleanly.