Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 18:57:13.739689 lava-dispatcher, installed at version: 2022.11
2 18:57:13.739869 start: 0 validate
3 18:57:13.739992 Start time: 2023-01-21 18:57:13.739985+00:00 (UTC)
4 18:57:13.740112 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:57:13.740235 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 18:57:13.742951 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:57:13.743068 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:57:14.244746 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:57:14.245440 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:57:14.249174 validate duration: 0.51
12 18:57:14.249421 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:57:14.249564 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:57:14.249658 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:57:14.249782 Not decompressing ramdisk as can be used compressed.
16 18:57:14.249879 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 18:57:14.249944 saving as /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/ramdisk/rootfs.cpio.gz
18 18:57:14.250021 total size: 8423555 (8MB)
19 18:57:14.252049 progress 0% (0MB)
20 18:57:14.258758 progress 5% (0MB)
21 18:57:14.266059 progress 10% (0MB)
22 18:57:14.273542 progress 15% (1MB)
23 18:57:14.281389 progress 20% (1MB)
24 18:57:14.289233 progress 25% (2MB)
25 18:57:14.300732 progress 30% (2MB)
26 18:57:14.310145 progress 35% (2MB)
27 18:57:14.321444 progress 40% (3MB)
28 18:57:14.332823 progress 45% (3MB)
29 18:57:14.342598 progress 50% (4MB)
30 18:57:14.353745 progress 55% (4MB)
31 18:57:14.365292 progress 60% (4MB)
32 18:57:14.376813 progress 65% (5MB)
33 18:57:14.386007 progress 70% (5MB)
34 18:57:14.397735 progress 75% (6MB)
35 18:57:14.407422 progress 80% (6MB)
36 18:57:14.418414 progress 85% (6MB)
37 18:57:14.429747 progress 90% (7MB)
38 18:57:14.440916 progress 95% (7MB)
39 18:57:14.450115 progress 100% (8MB)
40 18:57:14.450327 8MB downloaded in 0.20s (40.11MB/s)
41 18:57:14.450489 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:57:14.450746 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:57:14.450837 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:57:14.450924 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:57:14.451026 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:57:14.451094 saving as /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/kernel/bzImage
48 18:57:14.451157 total size: 9711616 (9MB)
49 18:57:14.451219 No compression specified
50 18:57:14.453640 progress 0% (0MB)
51 18:57:14.465334 progress 5% (0MB)
52 18:57:14.477877 progress 10% (0MB)
53 18:57:14.491268 progress 15% (1MB)
54 18:57:14.503028 progress 20% (1MB)
55 18:57:14.516866 progress 25% (2MB)
56 18:57:14.527411 progress 30% (2MB)
57 18:57:14.538908 progress 35% (3MB)
58 18:57:14.548479 progress 40% (3MB)
59 18:57:14.560380 progress 45% (4MB)
60 18:57:14.574434 progress 50% (4MB)
61 18:57:14.586296 progress 55% (5MB)
62 18:57:14.597824 progress 60% (5MB)
63 18:57:14.609755 progress 65% (6MB)
64 18:57:14.623414 progress 70% (6MB)
65 18:57:14.634841 progress 75% (6MB)
66 18:57:14.648303 progress 80% (7MB)
67 18:57:14.659994 progress 85% (7MB)
68 18:57:14.671873 progress 90% (8MB)
69 18:57:14.685573 progress 95% (8MB)
70 18:57:14.696316 progress 100% (9MB)
71 18:57:14.696524 9MB downloaded in 0.25s (37.75MB/s)
72 18:57:14.696675 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:57:14.696914 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:57:14.697002 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:57:14.697087 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:57:14.697192 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:57:14.697293 saving as /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/modules/modules.tar
79 18:57:14.697363 total size: 64624 (0MB)
80 18:57:14.697426 Using unxz to decompress xz
81 18:57:14.707038 progress 50% (0MB)
82 18:57:14.709955 progress 100% (0MB)
83 18:57:14.730076 0MB downloaded in 0.03s (1.89MB/s)
84 18:57:14.731254 end: 1.3.1 http-download (duration 00:00:00) [common]
86 18:57:14.732601 end: 1.3 download-retry (duration 00:00:00) [common]
87 18:57:14.733092 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 18:57:14.733606 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 18:57:14.734045 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 18:57:14.734490 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 18:57:14.735165 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88
92 18:57:14.735273 makedir: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin
93 18:57:14.735356 makedir: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/tests
94 18:57:14.735437 makedir: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/results
95 18:57:14.735545 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-add-keys
96 18:57:14.735675 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-add-sources
97 18:57:14.735792 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-background-process-start
98 18:57:14.735903 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-background-process-stop
99 18:57:14.736014 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-common-functions
100 18:57:14.736124 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-echo-ipv4
101 18:57:14.736235 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-install-packages
102 18:57:14.736346 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-installed-packages
103 18:57:14.736453 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-os-build
104 18:57:14.736561 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-probe-channel
105 18:57:14.736672 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-probe-ip
106 18:57:14.736781 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-target-ip
107 18:57:14.736889 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-target-mac
108 18:57:14.736997 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-target-storage
109 18:57:14.737111 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-case
110 18:57:14.737220 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-event
111 18:57:14.737329 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-feedback
112 18:57:14.737438 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-raise
113 18:57:14.737557 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-reference
114 18:57:14.737668 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-runner
115 18:57:14.737777 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-set
116 18:57:14.737886 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-test-shell
117 18:57:14.737998 Updating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-install-packages (oe)
118 18:57:14.738111 Updating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/bin/lava-installed-packages (oe)
119 18:57:14.738212 Creating /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/environment
120 18:57:14.738300 LAVA metadata
121 18:57:14.738372 - LAVA_JOB_ID=8815423
122 18:57:14.738441 - LAVA_DISPATCHER_IP=192.168.201.1
123 18:57:14.738545 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 18:57:14.738610 skipped lava-vland-overlay
125 18:57:14.738688 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 18:57:14.738775 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 18:57:14.738840 skipped lava-multinode-overlay
128 18:57:14.738915 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 18:57:14.738999 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 18:57:14.739077 Loading test definitions
131 18:57:14.739177 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 18:57:14.739254 Using /lava-8815423 at stage 0
133 18:57:14.739523 uuid=8815423_1.4.2.3.1 testdef=None
134 18:57:14.739614 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 18:57:14.739707 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 18:57:14.740209 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 18:57:14.740439 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 18:57:14.741009 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 18:57:14.741250 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 18:57:14.741794 runner path: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/0/tests/0_dmesg test_uuid 8815423_1.4.2.3.1
143 18:57:14.741943 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 18:57:14.742178 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 18:57:14.742252 Using /lava-8815423 at stage 1
147 18:57:14.742495 uuid=8815423_1.4.2.3.5 testdef=None
148 18:57:14.742585 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 18:57:14.742676 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 18:57:14.743133 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 18:57:14.743360 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 18:57:14.743925 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 18:57:14.744166 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 18:57:14.744706 runner path: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/1/tests/1_bootrr test_uuid 8815423_1.4.2.3.5
157 18:57:14.744848 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 18:57:14.745100 Creating lava-test-runner.conf files
160 18:57:14.745182 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/0 for stage 0
161 18:57:14.745268 - 0_dmesg
162 18:57:14.745344 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815423/lava-overlay-uttz6j88/lava-8815423/1 for stage 1
163 18:57:14.745427 - 1_bootrr
164 18:57:14.745566 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 18:57:14.745655 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 18:57:14.751733 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 18:57:14.751841 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 18:57:14.751932 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 18:57:14.752019 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 18:57:14.752108 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 18:57:14.935111 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 18:57:14.935445 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 18:57:14.935558 extracting modules file /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815423/extract-overlay-ramdisk-71f7nq1o/ramdisk
174 18:57:14.939616 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 18:57:14.939729 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 18:57:14.939815 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815423/compress-overlay-t75041u1/overlay-1.4.2.4.tar.gz to ramdisk
177 18:57:14.939887 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815423/compress-overlay-t75041u1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8815423/extract-overlay-ramdisk-71f7nq1o/ramdisk
178 18:57:14.943642 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 18:57:14.943750 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 18:57:14.943843 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 18:57:14.943933 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 18:57:14.944013 Building ramdisk /var/lib/lava/dispatcher/tmp/8815423/extract-overlay-ramdisk-71f7nq1o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8815423/extract-overlay-ramdisk-71f7nq1o/ramdisk
183 18:57:15.006628 >> 48350 blocks
184 18:57:15.755949 rename /var/lib/lava/dispatcher/tmp/8815423/extract-overlay-ramdisk-71f7nq1o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
185 18:57:15.756350 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 18:57:15.756479 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 18:57:15.756585 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 18:57:15.756681 No mkimage arch provided, not using FIT.
189 18:57:15.756771 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 18:57:15.756855 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 18:57:15.756952 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 18:57:15.757042 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 18:57:15.757122 No LXC device requested
194 18:57:15.757206 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 18:57:15.757330 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 18:57:15.757414 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 18:57:15.757510 Checking files for TFTP limit of 4294967296 bytes.
198 18:57:15.757925 end: 1 tftp-deploy (duration 00:00:02) [common]
199 18:57:15.758034 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 18:57:15.758133 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 18:57:15.758262 substitutions:
202 18:57:15.758333 - {DTB}: None
203 18:57:15.758404 - {INITRD}: 8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
204 18:57:15.758470 - {KERNEL}: 8815423/tftp-deploy-wgxs2uzo/kernel/bzImage
205 18:57:15.758531 - {LAVA_MAC}: None
206 18:57:15.758590 - {PRESEED_CONFIG}: None
207 18:57:15.758648 - {PRESEED_LOCAL}: None
208 18:57:15.758705 - {RAMDISK}: 8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
209 18:57:15.758763 - {ROOT_PART}: None
210 18:57:15.758819 - {ROOT}: None
211 18:57:15.758876 - {SERVER_IP}: 192.168.201.1
212 18:57:15.758932 - {TEE}: None
213 18:57:15.758989 Parsed boot commands:
214 18:57:15.759045 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 18:57:15.759197 Parsed boot commands: tftpboot 192.168.201.1 8815423/tftp-deploy-wgxs2uzo/kernel/bzImage 8815423/tftp-deploy-wgxs2uzo/kernel/cmdline 8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
216 18:57:15.759291 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 18:57:15.759383 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 18:57:15.759485 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 18:57:15.759575 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 18:57:15.759647 Not connected, no need to disconnect.
221 18:57:15.759724 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 18:57:15.759806 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 18:57:15.759872 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
224 18:57:15.762579 Setting prompt string to ['lava-test: # ']
225 18:57:15.762860 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 18:57:15.762967 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 18:57:15.763068 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 18:57:15.763161 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 18:57:15.763338 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
230 18:57:15.782153 >> Command sent successfully.
231 18:57:15.783976 Returned 0 in 0 seconds
232 18:57:15.885053 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 18:57:15.887602 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 18:57:15.888133 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 18:57:15.888638 Setting prompt string to 'Starting depthcharge on Voema...'
237 18:57:15.889063 Changing prompt to 'Starting depthcharge on Voema...'
238 18:57:15.889433 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 18:57:15.890662 [Enter `^Ec?' for help]
240 18:57:23.530936
241 18:57:23.531114
242 18:57:23.540279 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 18:57:23.544043 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 18:57:23.547166
245 18:57:23.550411 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
246 18:57:23.553841 CPU: AES supported, TXT NOT supported, VT supported
247 18:57:23.560389 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
248 18:57:23.567559 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
249 18:57:23.570362 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 18:57:23.573965 VBOOT: Loading verstage.
251 18:57:23.577888 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 18:57:23.584402 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 18:57:23.588212 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 18:57:23.594818 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 18:57:23.604831 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 18:57:23.604958
257 18:57:23.605027
258 18:57:23.615271 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 18:57:23.631408 Probing TPM: . done!
260 18:57:23.635163 TPM ready after 0 ms
261 18:57:23.638117 Connected to device vid:did:rid of 1ae0:0028:00
262 18:57:23.649074 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
263 18:57:23.655862 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 18:57:23.659545 Initialized TPM device CR50 revision 0
265 18:57:23.710366 tlcl_send_startup: Startup return code is 0
266 18:57:23.710523 TPM: setup succeeded
267 18:57:23.726111 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 18:57:23.740252 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 18:57:23.752796 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 18:57:23.762657 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 18:57:23.766462 Chrome EC: UHEPI supported
272 18:57:23.769467 Phase 1
273 18:57:23.772684 FMAP: area GBB found @ 1805000 (458752 bytes)
274 18:57:23.783170 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 18:57:23.789695 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
276 18:57:23.796065 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
277 18:57:23.802677 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
278 18:57:23.806333 Recovery requested (1009000e)
279 18:57:23.809437 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 18:57:23.821035 tlcl_extend: response is 0
281 18:57:23.827407 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 18:57:23.837457 tlcl_extend: response is 0
283 18:57:23.844205 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 18:57:23.850701 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 18:57:23.857226 BS: verstage times (exec / console): total (unknown) / 142 ms
286 18:57:23.857334
287 18:57:23.857402
288 18:57:23.870685 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 18:57:23.877054 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 18:57:23.880736 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 18:57:23.883661 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 18:57:23.890527 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 18:57:23.893754 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 18:57:23.897128 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 18:57:23.900378 TCO_STS: 0000 0000
296 18:57:23.903663 GEN_PMCON: d0015038 00002200
297 18:57:23.906842 GBLRST_CAUSE: 00000000 00000000
298 18:57:23.910155 HPR_CAUSE0: 00000000
299 18:57:23.910249 prev_sleep_state 5
300 18:57:23.914013 Boot Count incremented to 12664
301 18:57:23.920342 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 18:57:23.926513 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 18:57:23.936784 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 18:57:23.943025 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 18:57:23.946406 Chrome EC: UHEPI supported
306 18:57:23.957696 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 18:57:23.970823 Probing TPM: done!
308 18:57:23.977019 Connected to device vid:did:rid of 1ae0:0028:00
309 18:57:23.986996 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
310 18:57:23.990746 Initialized TPM device CR50 revision 0
311 18:57:24.005548 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 18:57:24.011939 MRC: Hash idx 0x100b comparison successful.
313 18:57:24.015160 MRC cache found, size faa8
314 18:57:24.015256 bootmode is set to: 2
315 18:57:24.018624 SPD index = 2
316 18:57:24.025293 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 18:57:24.028338 SPD: module type is LPDDR4X
318 18:57:24.031725 SPD: module part number is MT53D1G64D4NW-046
319 18:57:24.038352 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
320 18:57:24.041976 SPD: device width 16 bits, bus width 16 bits
321 18:57:24.048094 SPD: module size is 2048 MB (per channel)
322 18:57:24.477402 CBMEM:
323 18:57:24.480315 IMD: root @ 0x76fff000 254 entries.
324 18:57:24.483424 IMD: root @ 0x76ffec00 62 entries.
325 18:57:24.486977 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 18:57:24.493465 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 18:57:24.496562 External stage cache:
328 18:57:24.499921 IMD: root @ 0x7b3ff000 254 entries.
329 18:57:24.503113 IMD: root @ 0x7b3fec00 62 entries.
330 18:57:24.518140 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 18:57:24.524835 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 18:57:24.532259 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 18:57:24.545026 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 18:57:24.551427 cse_lite: Skip switching to RW in the recovery path
335 18:57:24.551547 8 DIMMs found
336 18:57:24.551640 SMM Memory Map
337 18:57:24.554913
338 18:57:24.558066 SMRAM : 0x7b000000 0x800000
339 18:57:24.562068 Subregion 0: 0x7b000000 0x200000
340 18:57:24.564710 Subregion 1: 0x7b200000 0x200000
341 18:57:24.568625 Subregion 2: 0x7b400000 0x400000
342 18:57:24.568720 top_of_ram = 0x77000000
343 18:57:24.574717 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 18:57:24.581449 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 18:57:24.585293 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
346 18:57:24.591329 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 18:57:24.598123 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
348 18:57:24.604321 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 18:57:24.614559 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 18:57:24.621744 Processing 211 relocs. Offset value of 0x74c0b000
351 18:57:24.628017 BS: romstage times (exec / console): total (unknown) / 277 ms
352 18:57:24.633874
353 18:57:24.633986
354 18:57:24.643355 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 18:57:24.647010 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 18:57:24.657227 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 18:57:24.663546 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 18:57:24.670328 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 18:57:24.676430 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 18:57:24.720690 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 18:57:24.727600 Processing 5008 relocs. Offset value of 0x75d98000
362 18:57:24.730543 BS: postcar times (exec / console): total (unknown) / 59 ms
363 18:57:24.734124
364 18:57:24.734219
365 18:57:24.743517 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
366 18:57:24.743641 Normal boot
367 18:57:24.747196 FW_CONFIG value is 0x804c02
368 18:57:24.750497 PCI: 00:07.0 disabled by fw_config
369 18:57:24.753998 PCI: 00:07.1 disabled by fw_config
370 18:57:24.757223 PCI: 00:0d.2 disabled by fw_config
371 18:57:24.760713
372 18:57:24.764225 PCI: 00:1c.7 disabled by fw_config
373 18:57:24.767027 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 18:57:24.773828 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 18:57:24.777292 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 18:57:24.780910
377 18:57:24.783834 GENERIC: 0.0 disabled by fw_config
378 18:57:24.786937 GENERIC: 1.0 disabled by fw_config
379 18:57:24.789986 fw_config match found: DB_USB=USB3_ACTIVE
380 18:57:24.793262 fw_config match found: DB_USB=USB3_ACTIVE
381 18:57:24.796769 fw_config match found: DB_USB=USB3_ACTIVE
382 18:57:24.803263 fw_config match found: DB_USB=USB3_ACTIVE
383 18:57:24.807077 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
384 18:57:24.817044 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
385 18:57:24.823231 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
386 18:57:24.829918 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
387 18:57:24.836447 microcode: sig=0x806c1 pf=0x80 revision=0x86
388 18:57:24.840082 microcode: Update skipped, already up-to-date
389 18:57:24.846547 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
390 18:57:24.875173 Detected 4 core, 8 thread CPU.
391 18:57:24.877625 Setting up SMI for CPU
392 18:57:24.881114 IED base = 0x7b400000
393 18:57:24.881231 IED size = 0x00400000
394 18:57:24.884470 Will perform SMM setup.
395 18:57:24.890868 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
396 18:57:24.897421 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
397 18:57:24.904085 Processing 16 relocs. Offset value of 0x00030000
398 18:57:24.907305 Attempting to start 7 APs
399 18:57:24.910708 Waiting for 10ms after sending INIT.
400 18:57:24.926774 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
401 18:57:24.926918 done.
402 18:57:24.930308 AP: slot 2 apic_id 6.
403 18:57:24.933141 AP: slot 6 apic_id 7.
404 18:57:24.933220 AP: slot 3 apic_id 5.
405 18:57:24.936277 AP: slot 7 apic_id 4.
406 18:57:24.939727 AP: slot 5 apic_id 2.
407 18:57:24.939817 AP: slot 4 apic_id 3.
408 18:57:24.946813 Waiting for 2nd SIPI to complete...done.
409 18:57:24.952934 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
410 18:57:24.959594 Processing 13 relocs. Offset value of 0x00038000
411 18:57:24.959698 Unable to locate Global NVS
412 18:57:24.969583 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 18:57:24.972900 Installing permanent SMM handler to 0x7b000000
414 18:57:24.982788 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 18:57:24.986056 Processing 794 relocs. Offset value of 0x7b010000
416 18:57:24.996312 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 18:57:24.999783 Processing 13 relocs. Offset value of 0x7b008000
418 18:57:25.005824 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 18:57:25.012624 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 18:57:25.015922 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 18:57:25.022712 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
422 18:57:25.029229 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
423 18:57:25.035576 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
424 18:57:25.042618 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
425 18:57:25.042731 Unable to locate Global NVS
426 18:57:25.052601 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
427 18:57:25.055632 Clearing SMI status registers
428 18:57:25.055747 SMI_STS: PM1
429 18:57:25.058901 PM1_STS: PWRBTN
430 18:57:25.065223 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
431 18:57:25.068758 In relocation handler: CPU 0
432 18:57:25.072352 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 18:57:25.079071 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 18:57:25.079186 Relocation complete.
435 18:57:25.089003 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 18:57:25.089141 In relocation handler: CPU 1
437 18:57:25.095676 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
438 18:57:25.095782 Relocation complete.
439 18:57:25.105307 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
440 18:57:25.105431 In relocation handler: CPU 2
441 18:57:25.112195 New SMBASE=0x7afff800 IEDBASE=0x7b400000
442 18:57:25.115190 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 18:57:25.118254 Relocation complete.
444 18:57:25.125119 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
445 18:57:25.128671 In relocation handler: CPU 6
446 18:57:25.131567 New SMBASE=0x7affe800 IEDBASE=0x7b400000
447 18:57:25.135103 Relocation complete.
448 18:57:25.142033 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 18:57:25.144709 In relocation handler: CPU 7
450 18:57:25.148632 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 18:57:25.154634 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 18:57:25.154745 Relocation complete.
453 18:57:25.161435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 18:57:25.164829
455 18:57:25.164930 In relocation handler: CPU 3
456 18:57:25.171326 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 18:57:25.171437 Relocation complete.
458 18:57:25.178458 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
459 18:57:25.180995 In relocation handler: CPU 5
460 18:57:25.187995 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 18:57:25.191848 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 18:57:25.195145 Relocation complete.
463 18:57:25.201852 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
464 18:57:25.205235 In relocation handler: CPU 4
465 18:57:25.208392 New SMBASE=0x7afff000 IEDBASE=0x7b400000
466 18:57:25.208486 Relocation complete.
467 18:57:25.212064 Initializing CPU #0
468 18:57:25.215200 CPU: vendor Intel device 806c1
469 18:57:25.218540 CPU: family 06, model 8c, stepping 01
470 18:57:25.221610 Clearing out pending MCEs
471 18:57:25.225340 Setting up local APIC...
472 18:57:25.228110 apic_id: 0x00 done.
473 18:57:25.228203 Turbo is available but hidden
474 18:57:25.231891 Turbo is available and visible
475 18:57:25.238287 microcode: Update skipped, already up-to-date
476 18:57:25.238398 CPU #0 initialized
477 18:57:25.241323 Initializing CPU #7
478 18:57:25.244592 Initializing CPU #2
479 18:57:25.244683 Initializing CPU #3
480 18:57:25.248073 CPU: vendor Intel device 806c1
481 18:57:25.251332 CPU: family 06, model 8c, stepping 01
482 18:57:25.254701 Initializing CPU #6
483 18:57:25.257879 Clearing out pending MCEs
484 18:57:25.261200 CPU: vendor Intel device 806c1
485 18:57:25.264629 CPU: family 06, model 8c, stepping 01
486 18:57:25.268161 Setting up local APIC...
487 18:57:25.268260 Initializing CPU #4
488 18:57:25.271120 Initializing CPU #5
489 18:57:25.274486 apic_id: 0x06 done.
490 18:57:25.274589 Clearing out pending MCEs
491 18:57:25.281173 microcode: Update skipped, already up-to-date
492 18:57:25.284645 Setting up local APIC...
493 18:57:25.284749 CPU: vendor Intel device 806c1
494 18:57:25.290993 CPU: family 06, model 8c, stepping 01
495 18:57:25.294402 CPU: vendor Intel device 806c1
496 18:57:25.297437 CPU: family 06, model 8c, stepping 01
497 18:57:25.297577 Clearing out pending MCEs
498 18:57:25.300877
499 18:57:25.300968 Clearing out pending MCEs
500 18:57:25.304125 Setting up local APIC...
501 18:57:25.307479 Initializing CPU #1
502 18:57:25.310800 CPU: vendor Intel device 806c1
503 18:57:25.314782 CPU: family 06, model 8c, stepping 01
504 18:57:25.317717 CPU: vendor Intel device 806c1
505 18:57:25.321035 CPU: family 06, model 8c, stepping 01
506 18:57:25.324053 Clearing out pending MCEs
507 18:57:25.324142 Clearing out pending MCEs
508 18:57:25.327407 Setting up local APIC...
509 18:57:25.330742 CPU: vendor Intel device 806c1
510 18:57:25.334216 CPU: family 06, model 8c, stepping 01
511 18:57:25.337877 apic_id: 0x03 done.
512 18:57:25.340756 Setting up local APIC...
513 18:57:25.340841 Setting up local APIC...
514 18:57:25.344548 Clearing out pending MCEs
515 18:57:25.347563 apic_id: 0x05 done.
516 18:57:25.350684 apic_id: 0x04 done.
517 18:57:25.350767 Setting up local APIC...
518 18:57:25.354414 CPU #2 initialized
519 18:57:25.357924 apic_id: 0x07 done.
520 18:57:25.358015 apic_id: 0x01 done.
521 18:57:25.364078 microcode: Update skipped, already up-to-date
522 18:57:25.367761 microcode: Update skipped, already up-to-date
523 18:57:25.371137 microcode: Update skipped, already up-to-date
524 18:57:25.374235 CPU #7 initialized
525 18:57:25.377168 CPU #3 initialized
526 18:57:25.377264 apic_id: 0x02 done.
527 18:57:25.383770 microcode: Update skipped, already up-to-date
528 18:57:25.386995 microcode: Update skipped, already up-to-date
529 18:57:25.390581 CPU #4 initialized
530 18:57:25.390681 CPU #5 initialized
531 18:57:25.393811 CPU #6 initialized
532 18:57:25.397318 microcode: Update skipped, already up-to-date
533 18:57:25.400558 CPU #1 initialized
534 18:57:25.403517 bsp_do_flight_plan done after 454 msecs.
535 18:57:25.407137 CPU: frequency set to 4400 MHz
536 18:57:25.407238 Enabling SMIs.
537 18:57:25.414037 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 18:57:25.431266 SATAXPCIE1 indicates PCIe NVMe is present
539 18:57:25.434515 Probing TPM: done!
540 18:57:25.437890 Connected to device vid:did:rid of 1ae0:0028:00
541 18:57:25.448744 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
542 18:57:25.451692 Initialized TPM device CR50 revision 0
543 18:57:25.455168 Enabling S0i3.4
544 18:57:25.461782 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 18:57:25.464852 Found a VBT of 8704 bytes after decompression
546 18:57:25.471779 cse_lite: CSE RO boot. HybridStorageMode disabled
547 18:57:25.478075 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 18:57:25.553039 FSPS returned 0
549 18:57:25.556586 Executing Phase 1 of FspMultiPhaseSiInit
550 18:57:25.566332 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 18:57:25.569749 port C0 DISC req: usage 1 usb3 1 usb2 5
552 18:57:25.573019 Raw Buffer output 0 00000511
553 18:57:25.576451 Raw Buffer output 1 00000000
554 18:57:25.579871 pmc_send_ipc_cmd succeeded
555 18:57:25.583541 port C1 DISC req: usage 1 usb3 2 usb2 3
556 18:57:25.586993
557 18:57:25.587095 Raw Buffer output 0 00000321
558 18:57:25.589779 Raw Buffer output 1 00000000
559 18:57:25.594317 pmc_send_ipc_cmd succeeded
560 18:57:25.599518 Detected 4 core, 8 thread CPU.
561 18:57:25.602425 Detected 4 core, 8 thread CPU.
562 18:57:25.802411 Display FSP Version Info HOB
563 18:57:25.806038 Reference Code - CPU = a.0.4c.31
564 18:57:25.809288 uCode Version = 0.0.0.86
565 18:57:25.812176 TXT ACM version = ff.ff.ff.ffff
566 18:57:25.815720 Reference Code - ME = a.0.4c.31
567 18:57:25.818991 MEBx version = 0.0.0.0
568 18:57:25.822586 ME Firmware Version = Consumer SKU
569 18:57:25.825965 Reference Code - PCH = a.0.4c.31
570 18:57:25.829017 PCH-CRID Status = Disabled
571 18:57:25.832202 PCH-CRID Original Value = ff.ff.ff.ffff
572 18:57:25.835793 PCH-CRID New Value = ff.ff.ff.ffff
573 18:57:25.838965 OPROM - RST - RAID = ff.ff.ff.ffff
574 18:57:25.842192 PCH Hsio Version = 4.0.0.0
575 18:57:25.846014 Reference Code - SA - System Agent = a.0.4c.31
576 18:57:25.849025 Reference Code - MRC = 2.0.0.1
577 18:57:25.851982 SA - PCIe Version = a.0.4c.31
578 18:57:25.855302 SA-CRID Status = Disabled
579 18:57:25.858747 SA-CRID Original Value = 0.0.0.1
580 18:57:25.862023 SA-CRID New Value = 0.0.0.1
581 18:57:25.865366 OPROM - VBIOS = ff.ff.ff.ffff
582 18:57:25.868939 IO Manageability Engine FW Version = 11.1.4.0
583 18:57:25.872051 PHY Build Version = 0.0.0.e0
584 18:57:25.875411 Thunderbolt(TM) FW Version = 0.0.0.0
585 18:57:25.882398 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
586 18:57:25.885047 ITSS IRQ Polarities Before:
587 18:57:25.885148 IPC0: 0xffffffff
588 18:57:25.888784 IPC1: 0xffffffff
589 18:57:25.888861 IPC2: 0xffffffff
590 18:57:25.892004 IPC3: 0xffffffff
591 18:57:25.895772 ITSS IRQ Polarities After:
592 18:57:25.895863 IPC0: 0xffffffff
593 18:57:25.898969 IPC1: 0xffffffff
594 18:57:25.899060 IPC2: 0xffffffff
595 18:57:25.902215 IPC3: 0xffffffff
596 18:57:25.906082 Found PCIe Root Port #9 at PCI: 00:1d.0.
597 18:57:25.918809 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
598 18:57:25.928368 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
599 18:57:25.941685 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
600 18:57:25.948076 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
601 18:57:25.951421 Enumerating buses...
602 18:57:25.954843 Show all devs... Before device enumeration.
603 18:57:25.958106 Root Device: enabled 1
604 18:57:25.958198 DOMAIN: 0000: enabled 1
605 18:57:25.961219 CPU_CLUSTER: 0: enabled 1
606 18:57:25.964925 PCI: 00:00.0: enabled 1
607 18:57:25.968052 PCI: 00:02.0: enabled 1
608 18:57:25.968131 PCI: 00:04.0: enabled 1
609 18:57:25.971215 PCI: 00:05.0: enabled 1
610 18:57:25.974820 PCI: 00:06.0: enabled 0
611 18:57:25.978263 PCI: 00:07.0: enabled 0
612 18:57:25.978357 PCI: 00:07.1: enabled 0
613 18:57:25.981222 PCI: 00:07.2: enabled 0
614 18:57:25.984491 PCI: 00:07.3: enabled 0
615 18:57:25.987927 PCI: 00:08.0: enabled 1
616 18:57:25.988013 PCI: 00:09.0: enabled 0
617 18:57:25.991340 PCI: 00:0a.0: enabled 0
618 18:57:25.994702 PCI: 00:0d.0: enabled 1
619 18:57:25.994784 PCI: 00:0d.1: enabled 0
620 18:57:25.997702
621 18:57:25.997779 PCI: 00:0d.2: enabled 0
622 18:57:26.000930 PCI: 00:0d.3: enabled 0
623 18:57:26.004611 PCI: 00:0e.0: enabled 0
624 18:57:26.004701 PCI: 00:10.2: enabled 1
625 18:57:26.007670 PCI: 00:10.6: enabled 0
626 18:57:26.010956 PCI: 00:10.7: enabled 0
627 18:57:26.014407 PCI: 00:12.0: enabled 0
628 18:57:26.014497 PCI: 00:12.6: enabled 0
629 18:57:26.017795 PCI: 00:13.0: enabled 0
630 18:57:26.021042 PCI: 00:14.0: enabled 1
631 18:57:26.024547 PCI: 00:14.1: enabled 0
632 18:57:26.024645 PCI: 00:14.2: enabled 1
633 18:57:26.027842 PCI: 00:14.3: enabled 1
634 18:57:26.030773 PCI: 00:15.0: enabled 1
635 18:57:26.034171 PCI: 00:15.1: enabled 1
636 18:57:26.034266 PCI: 00:15.2: enabled 1
637 18:57:26.038190 PCI: 00:15.3: enabled 1
638 18:57:26.040613 PCI: 00:16.0: enabled 1
639 18:57:26.043949 PCI: 00:16.1: enabled 0
640 18:57:26.044029 PCI: 00:16.2: enabled 0
641 18:57:26.047277 PCI: 00:16.3: enabled 0
642 18:57:26.051278 PCI: 00:16.4: enabled 0
643 18:57:26.051367 PCI: 00:16.5: enabled 0
644 18:57:26.053819 PCI: 00:17.0: enabled 1
645 18:57:26.057440 PCI: 00:19.0: enabled 0
646 18:57:26.060505 PCI: 00:19.1: enabled 1
647 18:57:26.060595 PCI: 00:19.2: enabled 0
648 18:57:26.064322 PCI: 00:1c.0: enabled 1
649 18:57:26.067371 PCI: 00:1c.1: enabled 0
650 18:57:26.070736 PCI: 00:1c.2: enabled 0
651 18:57:26.070814 PCI: 00:1c.3: enabled 0
652 18:57:26.073665 PCI: 00:1c.4: enabled 0
653 18:57:26.077168 PCI: 00:1c.5: enabled 0
654 18:57:26.080420 PCI: 00:1c.6: enabled 1
655 18:57:26.080513 PCI: 00:1c.7: enabled 0
656 18:57:26.083706 PCI: 00:1d.0: enabled 1
657 18:57:26.087116 PCI: 00:1d.1: enabled 0
658 18:57:26.090481 PCI: 00:1d.2: enabled 1
659 18:57:26.090575 PCI: 00:1d.3: enabled 0
660 18:57:26.093715 PCI: 00:1e.0: enabled 1
661 18:57:26.097305 PCI: 00:1e.1: enabled 0
662 18:57:26.097397 PCI: 00:1e.2: enabled 1
663 18:57:26.100268
664 18:57:26.100358 PCI: 00:1e.3: enabled 1
665 18:57:26.103535 PCI: 00:1f.0: enabled 1
666 18:57:26.107135 PCI: 00:1f.1: enabled 0
667 18:57:26.107229 PCI: 00:1f.2: enabled 1
668 18:57:26.110570 PCI: 00:1f.3: enabled 1
669 18:57:26.114083 PCI: 00:1f.4: enabled 0
670 18:57:26.117084 PCI: 00:1f.5: enabled 1
671 18:57:26.117175 PCI: 00:1f.6: enabled 0
672 18:57:26.120076 PCI: 00:1f.7: enabled 0
673 18:57:26.123277 APIC: 00: enabled 1
674 18:57:26.123367 GENERIC: 0.0: enabled 1
675 18:57:26.126693
676 18:57:26.126784 GENERIC: 0.0: enabled 1
677 18:57:26.130092 GENERIC: 1.0: enabled 1
678 18:57:26.133435 GENERIC: 0.0: enabled 1
679 18:57:26.133566 GENERIC: 1.0: enabled 1
680 18:57:26.136863 USB0 port 0: enabled 1
681 18:57:26.140120 GENERIC: 0.0: enabled 1
682 18:57:26.143386 USB0 port 0: enabled 1
683 18:57:26.143478 GENERIC: 0.0: enabled 1
684 18:57:26.146995 I2C: 00:1a: enabled 1
685 18:57:26.149947 I2C: 00:31: enabled 1
686 18:57:26.150039 I2C: 00:32: enabled 1
687 18:57:26.153933 I2C: 00:10: enabled 1
688 18:57:26.156507 I2C: 00:15: enabled 1
689 18:57:26.156598 GENERIC: 0.0: enabled 0
690 18:57:26.160215 GENERIC: 1.0: enabled 0
691 18:57:26.163375 GENERIC: 0.0: enabled 1
692 18:57:26.163467 SPI: 00: enabled 1
693 18:57:26.166794
694 18:57:26.166888 SPI: 00: enabled 1
695 18:57:26.169909 PNP: 0c09.0: enabled 1
696 18:57:26.173285 GENERIC: 0.0: enabled 1
697 18:57:26.173376 USB3 port 0: enabled 1
698 18:57:26.176598 USB3 port 1: enabled 1
699 18:57:26.180035 USB3 port 2: enabled 0
700 18:57:26.180130 USB3 port 3: enabled 0
701 18:57:26.183323 USB2 port 0: enabled 0
702 18:57:26.186478 USB2 port 1: enabled 1
703 18:57:26.186604 USB2 port 2: enabled 1
704 18:57:26.189599 USB2 port 3: enabled 0
705 18:57:26.193381 USB2 port 4: enabled 1
706 18:57:26.196349 USB2 port 5: enabled 0
707 18:57:26.196450 USB2 port 6: enabled 0
708 18:57:26.199878 USB2 port 7: enabled 0
709 18:57:26.203022 USB2 port 8: enabled 0
710 18:57:26.203113 USB2 port 9: enabled 0
711 18:57:26.206785 USB3 port 0: enabled 0
712 18:57:26.209660 USB3 port 1: enabled 1
713 18:57:26.213070 USB3 port 2: enabled 0
714 18:57:26.213165 USB3 port 3: enabled 0
715 18:57:26.216756 GENERIC: 0.0: enabled 1
716 18:57:26.219715 GENERIC: 1.0: enabled 1
717 18:57:26.219833 APIC: 01: enabled 1
718 18:57:26.223198 APIC: 06: enabled 1
719 18:57:26.225995 APIC: 05: enabled 1
720 18:57:26.226077 APIC: 03: enabled 1
721 18:57:26.229413 APIC: 02: enabled 1
722 18:57:26.229579 APIC: 07: enabled 1
723 18:57:26.232699 APIC: 04: enabled 1
724 18:57:26.235940 Compare with tree...
725 18:57:26.236034 Root Device: enabled 1
726 18:57:26.239353 DOMAIN: 0000: enabled 1
727 18:57:26.242964 PCI: 00:00.0: enabled 1
728 18:57:26.245968 PCI: 00:02.0: enabled 1
729 18:57:26.249224 PCI: 00:04.0: enabled 1
730 18:57:26.249319 GENERIC: 0.0: enabled 1
731 18:57:26.252876 PCI: 00:05.0: enabled 1
732 18:57:26.256156 PCI: 00:06.0: enabled 0
733 18:57:26.259061 PCI: 00:07.0: enabled 0
734 18:57:26.263022 GENERIC: 0.0: enabled 1
735 18:57:26.263121 PCI: 00:07.1: enabled 0
736 18:57:26.265897 GENERIC: 1.0: enabled 1
737 18:57:26.269431 PCI: 00:07.2: enabled 0
738 18:57:26.272574 GENERIC: 0.0: enabled 1
739 18:57:26.275626 PCI: 00:07.3: enabled 0
740 18:57:26.279400 GENERIC: 1.0: enabled 1
741 18:57:26.279503 PCI: 00:08.0: enabled 1
742 18:57:26.282507 PCI: 00:09.0: enabled 0
743 18:57:26.285855 PCI: 00:0a.0: enabled 0
744 18:57:26.289079 PCI: 00:0d.0: enabled 1
745 18:57:26.289161 USB0 port 0: enabled 1
746 18:57:26.292324
747 18:57:26.292414 USB3 port 0: enabled 1
748 18:57:26.295708 USB3 port 1: enabled 1
749 18:57:26.299057 USB3 port 2: enabled 0
750 18:57:26.302185 USB3 port 3: enabled 0
751 18:57:26.305707 PCI: 00:0d.1: enabled 0
752 18:57:26.305793 PCI: 00:0d.2: enabled 0
753 18:57:26.308884 GENERIC: 0.0: enabled 1
754 18:57:26.312386 PCI: 00:0d.3: enabled 0
755 18:57:26.315290 PCI: 00:0e.0: enabled 0
756 18:57:26.319232 PCI: 00:10.2: enabled 1
757 18:57:26.319318 PCI: 00:10.6: enabled 0
758 18:57:26.322800 PCI: 00:10.7: enabled 0
759 18:57:26.325680 PCI: 00:12.0: enabled 0
760 18:57:26.328548 PCI: 00:12.6: enabled 0
761 18:57:26.331953 PCI: 00:13.0: enabled 0
762 18:57:26.332032 PCI: 00:14.0: enabled 1
763 18:57:26.335310 USB0 port 0: enabled 1
764 18:57:26.339020 USB2 port 0: enabled 0
765 18:57:26.342301 USB2 port 1: enabled 1
766 18:57:26.345388 USB2 port 2: enabled 1
767 18:57:26.345473 USB2 port 3: enabled 0
768 18:57:26.348294
769 18:57:26.348370 USB2 port 4: enabled 1
770 18:57:26.352052 USB2 port 5: enabled 0
771 18:57:26.355123 USB2 port 6: enabled 0
772 18:57:26.358890 USB2 port 7: enabled 0
773 18:57:26.362469 USB2 port 8: enabled 0
774 18:57:26.362560 USB2 port 9: enabled 0
775 18:57:26.365144 USB3 port 0: enabled 0
776 18:57:26.368294 USB3 port 1: enabled 1
777 18:57:26.371614 USB3 port 2: enabled 0
778 18:57:26.375261 USB3 port 3: enabled 0
779 18:57:26.378073 PCI: 00:14.1: enabled 0
780 18:57:26.378183 PCI: 00:14.2: enabled 1
781 18:57:26.381408 PCI: 00:14.3: enabled 1
782 18:57:26.384678 GENERIC: 0.0: enabled 1
783 18:57:26.388254 PCI: 00:15.0: enabled 1
784 18:57:26.391278 I2C: 00:1a: enabled 1
785 18:57:26.391384 I2C: 00:31: enabled 1
786 18:57:26.395011 I2C: 00:32: enabled 1
787 18:57:26.398076 PCI: 00:15.1: enabled 1
788 18:57:26.401237 I2C: 00:10: enabled 1
789 18:57:26.401329 PCI: 00:15.2: enabled 1
790 18:57:26.404494 PCI: 00:15.3: enabled 1
791 18:57:26.407937 PCI: 00:16.0: enabled 1
792 18:57:26.411528 PCI: 00:16.1: enabled 0
793 18:57:26.414977 PCI: 00:16.2: enabled 0
794 18:57:26.415067 PCI: 00:16.3: enabled 0
795 18:57:26.417989 PCI: 00:16.4: enabled 0
796 18:57:26.421266 PCI: 00:16.5: enabled 0
797 18:57:26.424358 PCI: 00:17.0: enabled 1
798 18:57:26.427765 PCI: 00:19.0: enabled 0
799 18:57:26.427858 PCI: 00:19.1: enabled 1
800 18:57:26.432053 I2C: 00:15: enabled 1
801 18:57:26.435244 PCI: 00:19.2: enabled 0
802 18:57:26.439191 PCI: 00:1d.0: enabled 1
803 18:57:26.439320 GENERIC: 0.0: enabled 1
804 18:57:26.442352 PCI: 00:1e.0: enabled 1
805 18:57:26.445441 PCI: 00:1e.1: enabled 0
806 18:57:26.448738 PCI: 00:1e.2: enabled 1
807 18:57:26.448826 SPI: 00: enabled 1
808 18:57:26.452313 PCI: 00:1e.3: enabled 1
809 18:57:26.455818 SPI: 00: enabled 1
810 18:57:26.458818 PCI: 00:1f.0: enabled 1
811 18:57:26.458940 PNP: 0c09.0: enabled 1
812 18:57:26.462057 PCI: 00:1f.1: enabled 0
813 18:57:26.465230 PCI: 00:1f.2: enabled 1
814 18:57:26.468820 GENERIC: 0.0: enabled 1
815 18:57:26.472077 GENERIC: 0.0: enabled 1
816 18:57:26.475430 GENERIC: 1.0: enabled 1
817 18:57:26.475525 PCI: 00:1f.3: enabled 1
818 18:57:26.478767 PCI: 00:1f.4: enabled 0
819 18:57:26.530739 PCI: 00:1f.5: enabled 1
820 18:57:26.530882 PCI: 00:1f.6: enabled 0
821 18:57:26.531155 PCI: 00:1f.7: enabled 0
822 18:57:26.531224 CPU_CLUSTER: 0: enabled 1
823 18:57:26.531287 APIC: 00: enabled 1
824 18:57:26.531346 APIC: 01: enabled 1
825 18:57:26.531411 APIC: 06: enabled 1
826 18:57:26.531498 APIC: 05: enabled 1
827 18:57:26.531786 APIC: 03: enabled 1
828 18:57:26.531889 APIC: 02: enabled 1
829 18:57:26.531977 APIC: 07: enabled 1
830 18:57:26.532064 APIC: 04: enabled 1
831 18:57:26.532147 Root Device scanning...
832 18:57:26.532394 scan_static_bus for Root Device
833 18:57:26.532459 DOMAIN: 0000 enabled
834 18:57:26.532524 CPU_CLUSTER: 0 enabled
835 18:57:26.532763
836 18:57:26.532828 DOMAIN: 0000 scanning...
837 18:57:26.532886 PCI: pci_scan_bus for bus 00
838 18:57:26.533125 PCI: 00:00.0 [8086/0000] ops
839 18:57:26.533187 PCI: 00:00.0 [8086/9a12] enabled
840 18:57:26.537451 PCI: 00:02.0 [8086/0000] bus ops
841 18:57:26.537585 PCI: 00:02.0 [8086/9a40] enabled
842 18:57:26.540710 PCI: 00:04.0 [8086/0000] bus ops
843 18:57:26.543767 PCI: 00:04.0 [8086/9a03] enabled
844 18:57:26.547092 PCI: 00:05.0 [8086/9a19] enabled
845 18:57:26.550670 PCI: 00:07.0 [0000/0000] hidden
846 18:57:26.554201 PCI: 00:08.0 [8086/9a11] enabled
847 18:57:26.557295 PCI: 00:0a.0 [8086/9a0d] disabled
848 18:57:26.560669 PCI: 00:0d.0 [8086/0000] bus ops
849 18:57:26.563822 PCI: 00:0d.0 [8086/9a13] enabled
850 18:57:26.567073 PCI: 00:14.0 [8086/0000] bus ops
851 18:57:26.570289 PCI: 00:14.0 [8086/a0ed] enabled
852 18:57:26.573684 PCI: 00:14.2 [8086/a0ef] enabled
853 18:57:26.576898 PCI: 00:14.3 [8086/0000] bus ops
854 18:57:26.580646 PCI: 00:14.3 [8086/a0f0] enabled
855 18:57:26.583801 PCI: 00:15.0 [8086/0000] bus ops
856 18:57:26.587074 PCI: 00:15.0 [8086/a0e8] enabled
857 18:57:26.590334 PCI: 00:15.1 [8086/0000] bus ops
858 18:57:26.593857 PCI: 00:15.1 [8086/a0e9] enabled
859 18:57:26.597075 PCI: 00:15.2 [8086/0000] bus ops
860 18:57:26.600166 PCI: 00:15.2 [8086/a0ea] enabled
861 18:57:26.603449 PCI: 00:15.3 [8086/0000] bus ops
862 18:57:26.607007 PCI: 00:15.3 [8086/a0eb] enabled
863 18:57:26.610143 PCI: 00:16.0 [8086/0000] ops
864 18:57:26.613226 PCI: 00:16.0 [8086/a0e0] enabled
865 18:57:26.620311 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 18:57:26.623687 PCI: 00:19.0 [8086/0000] bus ops
867 18:57:26.626466 PCI: 00:19.0 [8086/a0c5] disabled
868 18:57:26.630283 PCI: 00:19.1 [8086/0000] bus ops
869 18:57:26.633665 PCI: 00:19.1 [8086/a0c6] enabled
870 18:57:26.636313 PCI: 00:1d.0 [8086/0000] bus ops
871 18:57:26.639558 PCI: 00:1d.0 [8086/a0b0] enabled
872 18:57:26.643056 PCI: 00:1e.0 [8086/0000] ops
873 18:57:26.646459 PCI: 00:1e.0 [8086/a0a8] enabled
874 18:57:26.650209 PCI: 00:1e.2 [8086/0000] bus ops
875 18:57:26.653276 PCI: 00:1e.2 [8086/a0aa] enabled
876 18:57:26.657284 PCI: 00:1e.3 [8086/0000] bus ops
877 18:57:26.659916 PCI: 00:1e.3 [8086/a0ab] enabled
878 18:57:26.662944 PCI: 00:1f.0 [8086/0000] bus ops
879 18:57:26.666468 PCI: 00:1f.0 [8086/a087] enabled
880 18:57:26.666565 RTC Init
881 18:57:26.669744 Set power on after power failure.
882 18:57:26.672600
883 18:57:26.672692 Disabling Deep S3
884 18:57:26.676146 Disabling Deep S3
885 18:57:26.676240 Disabling Deep S4
886 18:57:26.679194 Disabling Deep S4
887 18:57:26.679285 Disabling Deep S5
888 18:57:26.682727 Disabling Deep S5
889 18:57:26.686186 PCI: 00:1f.2 [0000/0000] hidden
890 18:57:26.689119 PCI: 00:1f.3 [8086/0000] bus ops
891 18:57:26.692329 PCI: 00:1f.3 [8086/a0c8] enabled
892 18:57:26.695929 PCI: 00:1f.5 [8086/0000] bus ops
893 18:57:26.699210 PCI: 00:1f.5 [8086/a0a4] enabled
894 18:57:26.702438 PCI: Leftover static devices:
895 18:57:26.702531 PCI: 00:10.2
896 18:57:26.705761 PCI: 00:10.6
897 18:57:26.705851 PCI: 00:10.7
898 18:57:26.705920 PCI: 00:06.0
899 18:57:26.708954
900 18:57:26.709043 PCI: 00:07.1
901 18:57:26.709112 PCI: 00:07.2
902 18:57:26.712447 PCI: 00:07.3
903 18:57:26.712536 PCI: 00:09.0
904 18:57:26.715783 PCI: 00:0d.1
905 18:57:26.715872 PCI: 00:0d.2
906 18:57:26.715941 PCI: 00:0d.3
907 18:57:26.719210 PCI: 00:0e.0
908 18:57:26.719302 PCI: 00:12.0
909 18:57:26.722676 PCI: 00:12.6
910 18:57:26.722765 PCI: 00:13.0
911 18:57:26.722834 PCI: 00:14.1
912 18:57:26.725426
913 18:57:26.725551 PCI: 00:16.1
914 18:57:26.725620 PCI: 00:16.2
915 18:57:26.729192 PCI: 00:16.3
916 18:57:26.729281 PCI: 00:16.4
917 18:57:26.732037 PCI: 00:16.5
918 18:57:26.732132 PCI: 00:17.0
919 18:57:26.732203 PCI: 00:19.2
920 18:57:26.735755 PCI: 00:1e.1
921 18:57:26.735845 PCI: 00:1f.1
922 18:57:26.738660 PCI: 00:1f.4
923 18:57:26.738751 PCI: 00:1f.6
924 18:57:26.738820 PCI: 00:1f.7
925 18:57:26.742702 PCI: Check your devicetree.cb.
926 18:57:26.745454 PCI: 00:02.0 scanning...
927 18:57:26.748815 scan_generic_bus for PCI: 00:02.0
928 18:57:26.752282 scan_generic_bus for PCI: 00:02.0 done
929 18:57:26.758828 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
930 18:57:26.761975 PCI: 00:04.0 scanning...
931 18:57:26.765145 scan_generic_bus for PCI: 00:04.0
932 18:57:26.765249 GENERIC: 0.0 enabled
933 18:57:26.771611 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
934 18:57:26.778871 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
935 18:57:26.778999 PCI: 00:0d.0 scanning...
936 18:57:26.782266 scan_static_bus for PCI: 00:0d.0
937 18:57:26.785469 USB0 port 0 enabled
938 18:57:26.788499 USB0 port 0 scanning...
939 18:57:26.792158 scan_static_bus for USB0 port 0
940 18:57:26.792253 USB3 port 0 enabled
941 18:57:26.795091
942 18:57:26.795178 USB3 port 1 enabled
943 18:57:26.798527 USB3 port 2 disabled
944 18:57:26.798616 USB3 port 3 disabled
945 18:57:26.801847 USB3 port 0 scanning...
946 18:57:26.804846 scan_static_bus for USB3 port 0
947 18:57:26.808527 scan_static_bus for USB3 port 0 done
948 18:57:26.814915 scan_bus: bus USB3 port 0 finished in 6 msecs
949 18:57:26.815017 USB3 port 1 scanning...
950 18:57:26.818657 scan_static_bus for USB3 port 1
951 18:57:26.825107 scan_static_bus for USB3 port 1 done
952 18:57:26.828856 scan_bus: bus USB3 port 1 finished in 6 msecs
953 18:57:26.832199 scan_static_bus for USB0 port 0 done
954 18:57:26.835097 scan_bus: bus USB0 port 0 finished in 43 msecs
955 18:57:26.838096
956 18:57:26.841640 scan_static_bus for PCI: 00:0d.0 done
957 18:57:26.845033 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
958 18:57:26.848124 PCI: 00:14.0 scanning...
959 18:57:26.852172 scan_static_bus for PCI: 00:14.0
960 18:57:26.854633 USB0 port 0 enabled
961 18:57:26.854725 USB0 port 0 scanning...
962 18:57:26.858388 scan_static_bus for USB0 port 0
963 18:57:26.861750 USB2 port 0 disabled
964 18:57:26.864686 USB2 port 1 enabled
965 18:57:26.864791 USB2 port 2 enabled
966 18:57:26.868576 USB2 port 3 disabled
967 18:57:26.871131 USB2 port 4 enabled
968 18:57:26.871221 USB2 port 5 disabled
969 18:57:26.874407 USB2 port 6 disabled
970 18:57:26.874503 USB2 port 7 disabled
971 18:57:26.878004
972 18:57:26.878099 USB2 port 8 disabled
973 18:57:26.881028 USB2 port 9 disabled
974 18:57:26.881117 USB3 port 0 disabled
975 18:57:26.884602 USB3 port 1 enabled
976 18:57:26.888077 USB3 port 2 disabled
977 18:57:26.888173 USB3 port 3 disabled
978 18:57:26.891173 USB2 port 1 scanning...
979 18:57:26.894500 scan_static_bus for USB2 port 1
980 18:57:26.897965 scan_static_bus for USB2 port 1 done
981 18:57:26.904087 scan_bus: bus USB2 port 1 finished in 6 msecs
982 18:57:26.904191 USB2 port 2 scanning...
983 18:57:26.907656 scan_static_bus for USB2 port 2
984 18:57:26.914570 scan_static_bus for USB2 port 2 done
985 18:57:26.917473 scan_bus: bus USB2 port 2 finished in 6 msecs
986 18:57:26.920912 USB2 port 4 scanning...
987 18:57:26.924441 scan_static_bus for USB2 port 4
988 18:57:26.927596 scan_static_bus for USB2 port 4 done
989 18:57:26.930639 scan_bus: bus USB2 port 4 finished in 6 msecs
990 18:57:26.934121 USB3 port 1 scanning...
991 18:57:26.937125 scan_static_bus for USB3 port 1
992 18:57:26.940769 scan_static_bus for USB3 port 1 done
993 18:57:26.947380 scan_bus: bus USB3 port 1 finished in 6 msecs
994 18:57:26.950439 scan_static_bus for USB0 port 0 done
995 18:57:26.954299 scan_bus: bus USB0 port 0 finished in 93 msecs
996 18:57:26.957225 scan_static_bus for PCI: 00:14.0 done
997 18:57:26.964215 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
998 18:57:26.964336 PCI: 00:14.3 scanning...
999 18:57:26.967522 scan_static_bus for PCI: 00:14.3
1000 18:57:26.970596 GENERIC: 0.0 enabled
1001 18:57:26.973863 scan_static_bus for PCI: 00:14.3 done
1002 18:57:26.980534 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1003 18:57:26.980666 PCI: 00:15.0 scanning...
1004 18:57:26.984043 scan_static_bus for PCI: 00:15.0
1005 18:57:26.987251 I2C: 00:1a enabled
1006 18:57:26.990718 I2C: 00:31 enabled
1007 18:57:26.990857 I2C: 00:32 enabled
1008 18:57:26.994157 scan_static_bus for PCI: 00:15.0 done
1009 18:57:27.000498 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1010 18:57:27.003774 PCI: 00:15.1 scanning...
1011 18:57:27.007807 scan_static_bus for PCI: 00:15.1
1012 18:57:27.007912 I2C: 00:10 enabled
1013 18:57:27.011315 scan_static_bus for PCI: 00:15.1 done
1014 18:57:27.018005 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1015 18:57:27.018114 PCI: 00:15.2 scanning...
1016 18:57:27.020926 scan_static_bus for PCI: 00:15.2
1017 18:57:27.028088 scan_static_bus for PCI: 00:15.2 done
1018 18:57:27.031370 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1019 18:57:27.034611 PCI: 00:15.3 scanning...
1020 18:57:27.037939 scan_static_bus for PCI: 00:15.3
1021 18:57:27.041085 scan_static_bus for PCI: 00:15.3 done
1022 18:57:27.044262 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1023 18:57:27.047913 PCI: 00:19.1 scanning...
1024 18:57:27.051814 scan_static_bus for PCI: 00:19.1
1025 18:57:27.054207 I2C: 00:15 enabled
1026 18:57:27.057359 scan_static_bus for PCI: 00:19.1 done
1027 18:57:27.060557 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1028 18:57:27.064240 PCI: 00:1d.0 scanning...
1029 18:57:27.067451 do_pci_scan_bridge for PCI: 00:1d.0
1030 18:57:27.070558 PCI: pci_scan_bus for bus 01
1031 18:57:27.074156 PCI: 01:00.0 [15b7/5009] enabled
1032 18:57:27.077212 GENERIC: 0.0 enabled
1033 18:57:27.080763 Enabling Common Clock Configuration
1034 18:57:27.083907 L1 Sub-State supported from root port 29
1035 18:57:27.087387 L1 Sub-State Support = 0x5
1036 18:57:27.090635 CommonModeRestoreTime = 0x28
1037 18:57:27.093983 Power On Value = 0x16, Power On Scale = 0x0
1038 18:57:27.097046 ASPM: Enabled L1
1039 18:57:27.100870 PCIe: Max_Payload_Size adjusted to 128
1040 18:57:27.107268 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1041 18:57:27.107392 PCI: 00:1e.2 scanning...
1042 18:57:27.110790 scan_generic_bus for PCI: 00:1e.2
1043 18:57:27.113508
1044 18:57:27.113598 SPI: 00 enabled
1045 18:57:27.119993 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1046 18:57:27.123423 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1047 18:57:27.126712 PCI: 00:1e.3 scanning...
1048 18:57:27.130530 scan_generic_bus for PCI: 00:1e.3
1049 18:57:27.133788 SPI: 00 enabled
1050 18:57:27.136760 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1051 18:57:27.140039
1052 18:57:27.143576 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1053 18:57:27.146406 PCI: 00:1f.0 scanning...
1054 18:57:27.150052 scan_static_bus for PCI: 00:1f.0
1055 18:57:27.150143 PNP: 0c09.0 enabled
1056 18:57:27.153115 PNP: 0c09.0 scanning...
1057 18:57:27.156406 scan_static_bus for PNP: 0c09.0
1058 18:57:27.160094 scan_static_bus for PNP: 0c09.0 done
1059 18:57:27.166633 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1060 18:57:27.170199 scan_static_bus for PCI: 00:1f.0 done
1061 18:57:27.173102 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1062 18:57:27.176344 PCI: 00:1f.2 scanning...
1063 18:57:27.179733 scan_static_bus for PCI: 00:1f.2
1064 18:57:27.183452 GENERIC: 0.0 enabled
1065 18:57:27.186661 GENERIC: 0.0 scanning...
1066 18:57:27.189626 scan_static_bus for GENERIC: 0.0
1067 18:57:27.189722 GENERIC: 0.0 enabled
1068 18:57:27.193270 GENERIC: 1.0 enabled
1069 18:57:27.196309 scan_static_bus for GENERIC: 0.0 done
1070 18:57:27.202823 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1071 18:57:27.206100 scan_static_bus for PCI: 00:1f.2 done
1072 18:57:27.209421 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1073 18:57:27.212779 PCI: 00:1f.3 scanning...
1074 18:57:27.216552 scan_static_bus for PCI: 00:1f.3
1075 18:57:27.219625 scan_static_bus for PCI: 00:1f.3 done
1076 18:57:27.226062 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1077 18:57:27.226194 PCI: 00:1f.5 scanning...
1078 18:57:27.229119 scan_generic_bus for PCI: 00:1f.5
1079 18:57:27.235711 scan_generic_bus for PCI: 00:1f.5 done
1080 18:57:27.239207 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1081 18:57:27.245666 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1082 18:57:27.249109 scan_static_bus for Root Device done
1083 18:57:27.252000 scan_bus: bus Root Device finished in 736 msecs
1084 18:57:27.252097 done
1085 18:57:27.259330 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1086 18:57:27.262199 Chrome EC: UHEPI supported
1087 18:57:27.268753 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1088 18:57:27.275437 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1089 18:57:27.278745 SPI flash protection: WPSW=0 SRP0=1
1090 18:57:27.285605 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1091 18:57:27.288681 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1092 18:57:27.291929 found VGA at PCI: 00:02.0
1093 18:57:27.295217 Setting up VGA for PCI: 00:02.0
1094 18:57:27.301960 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1095 18:57:27.305242 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1096 18:57:27.308606 Allocating resources...
1097 18:57:27.311765 Reading resources...
1098 18:57:27.315339 Root Device read_resources bus 0 link: 0
1099 18:57:27.318268 DOMAIN: 0000 read_resources bus 0 link: 0
1100 18:57:27.324729 PCI: 00:04.0 read_resources bus 1 link: 0
1101 18:57:27.328462 PCI: 00:04.0 read_resources bus 1 link: 0 done
1102 18:57:27.335140 PCI: 00:0d.0 read_resources bus 0 link: 0
1103 18:57:27.338089 USB0 port 0 read_resources bus 0 link: 0
1104 18:57:27.344763 USB0 port 0 read_resources bus 0 link: 0 done
1105 18:57:27.347830 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1106 18:57:27.351475 PCI: 00:14.0 read_resources bus 0 link: 0
1107 18:57:27.355145
1108 18:57:27.358059 USB0 port 0 read_resources bus 0 link: 0
1109 18:57:27.364396 USB0 port 0 read_resources bus 0 link: 0 done
1110 18:57:27.368141 PCI: 00:14.0 read_resources bus 0 link: 0 done
1111 18:57:27.371254 PCI: 00:14.3 read_resources bus 0 link: 0
1112 18:57:27.374334
1113 18:57:27.377772 PCI: 00:14.3 read_resources bus 0 link: 0 done
1114 18:57:27.381021 PCI: 00:15.0 read_resources bus 0 link: 0
1115 18:57:27.388547 PCI: 00:15.0 read_resources bus 0 link: 0 done
1116 18:57:27.391500 PCI: 00:15.1 read_resources bus 0 link: 0
1117 18:57:27.398298 PCI: 00:15.1 read_resources bus 0 link: 0 done
1118 18:57:27.401746 PCI: 00:19.1 read_resources bus 0 link: 0
1119 18:57:27.404571
1120 18:57:27.407921 PCI: 00:19.1 read_resources bus 0 link: 0 done
1121 18:57:27.411545 PCI: 00:1d.0 read_resources bus 1 link: 0
1122 18:57:27.418547 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1123 18:57:27.421628 PCI: 00:1e.2 read_resources bus 2 link: 0
1124 18:57:27.428915 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1125 18:57:27.431968 PCI: 00:1e.3 read_resources bus 3 link: 0
1126 18:57:27.438688 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1127 18:57:27.441615 PCI: 00:1f.0 read_resources bus 0 link: 0
1128 18:57:27.448200 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1129 18:57:27.451847 PCI: 00:1f.2 read_resources bus 0 link: 0
1130 18:57:27.454890 GENERIC: 0.0 read_resources bus 0 link: 0
1131 18:57:27.462093 GENERIC: 0.0 read_resources bus 0 link: 0 done
1132 18:57:27.465692 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1133 18:57:27.472564 DOMAIN: 0000 read_resources bus 0 link: 0 done
1134 18:57:27.476160 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1135 18:57:27.482520 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1136 18:57:27.485800 Root Device read_resources bus 0 link: 0 done
1137 18:57:27.489070 Done reading resources.
1138 18:57:27.495796 Show resources in subtree (Root Device)...After reading.
1139 18:57:27.499453 Root Device child on link 0 DOMAIN: 0000
1140 18:57:27.502399 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1141 18:57:27.512413 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1142 18:57:27.522370 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1143 18:57:27.526324 PCI: 00:00.0
1144 18:57:27.536230 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1145 18:57:27.542358 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1146 18:57:27.552110 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1147 18:57:27.562287 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1148 18:57:27.572106 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1149 18:57:27.581943 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1150 18:57:27.591955 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1151 18:57:27.598489 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1152 18:57:27.608215 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1153 18:57:27.618064 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1154 18:57:27.628064 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1155 18:57:27.637992 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1156 18:57:27.647977 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1157 18:57:27.654745 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1158 18:57:27.664381 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1159 18:57:27.674249 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1160 18:57:27.684319 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1161 18:57:27.694270 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1162 18:57:27.703986 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1163 18:57:27.713762 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1164 18:57:27.713898 PCI: 00:02.0
1165 18:57:27.723747 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1166 18:57:27.733393 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1167 18:57:27.743324 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1168 18:57:27.747022 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1169 18:57:27.756408 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1170 18:57:27.759772 GENERIC: 0.0
1171 18:57:27.759870 PCI: 00:05.0
1172 18:57:27.773373 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1173 18:57:27.776359 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1174 18:57:27.776495 GENERIC: 0.0
1175 18:57:27.779889 PCI: 00:08.0
1176 18:57:27.789909 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 18:57:27.790057 PCI: 00:0a.0
1178 18:57:27.796452 PCI: 00:0d.0 child on link 0 USB0 port 0
1179 18:57:27.806111 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1180 18:57:27.809507 USB0 port 0 child on link 0 USB3 port 0
1181 18:57:27.813222 USB3 port 0
1182 18:57:27.813312 USB3 port 1
1183 18:57:27.816195 USB3 port 2
1184 18:57:27.816281 USB3 port 3
1185 18:57:27.822558 PCI: 00:14.0 child on link 0 USB0 port 0
1186 18:57:27.832684 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1187 18:57:27.835931 USB0 port 0 child on link 0 USB2 port 0
1188 18:57:27.839930 USB2 port 0
1189 18:57:27.840053 USB2 port 1
1190 18:57:27.842489 USB2 port 2
1191 18:57:27.842578 USB2 port 3
1192 18:57:27.845660 USB2 port 4
1193 18:57:27.845747 USB2 port 5
1194 18:57:27.849046 USB2 port 6
1195 18:57:27.849134 USB2 port 7
1196 18:57:27.852504 USB2 port 8
1197 18:57:27.852592 USB2 port 9
1198 18:57:27.855764 USB3 port 0
1199 18:57:27.855851 USB3 port 1
1200 18:57:27.858800 USB3 port 2
1201 18:57:27.862196 USB3 port 3
1202 18:57:27.862288 PCI: 00:14.2
1203 18:57:27.872213 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 18:57:27.882230 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1205 18:57:27.885370 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1206 18:57:27.895460 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1207 18:57:27.898726 GENERIC: 0.0
1208 18:57:27.902002 PCI: 00:15.0 child on link 0 I2C: 00:1a
1209 18:57:27.911618 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 18:57:27.915248 I2C: 00:1a
1211 18:57:27.915355 I2C: 00:31
1212 18:57:27.918845 I2C: 00:32
1213 18:57:27.921982 PCI: 00:15.1 child on link 0 I2C: 00:10
1214 18:57:27.931712 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 18:57:27.931843 I2C: 00:10
1216 18:57:27.934710 PCI: 00:15.2
1217 18:57:27.944796 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 18:57:27.944928 PCI: 00:15.3
1219 18:57:27.957775 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 18:57:27.957917 PCI: 00:16.0
1221 18:57:27.968067 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 18:57:27.970981 PCI: 00:19.0
1223 18:57:27.974397 PCI: 00:19.1 child on link 0 I2C: 00:15
1224 18:57:27.984451 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 18:57:27.984590 I2C: 00:15
1226 18:57:27.991175 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1227 18:57:27.997384 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1228 18:57:28.007688 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1229 18:57:28.017322 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1230 18:57:28.021223 GENERIC: 0.0
1231 18:57:28.021324 PCI: 01:00.0
1232 18:57:28.030522 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 18:57:28.040387 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1234 18:57:28.043775 PCI: 00:1e.0
1235 18:57:28.053451 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1236 18:57:28.057420 PCI: 00:1e.2 child on link 0 SPI: 00
1237 18:57:28.066647 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 18:57:28.070461 SPI: 00
1239 18:57:28.073630 PCI: 00:1e.3 child on link 0 SPI: 00
1240 18:57:28.083274 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 18:57:28.083414 SPI: 00
1242 18:57:28.089787 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1243 18:57:28.096655 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1244 18:57:28.100201 PNP: 0c09.0
1245 18:57:28.106565 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1246 18:57:28.113074 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1247 18:57:28.123094 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1248 18:57:28.129700 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1249 18:57:28.136090 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1250 18:57:28.136206 GENERIC: 0.0
1251 18:57:28.139474 GENERIC: 1.0
1252 18:57:28.139565 PCI: 00:1f.3
1253 18:57:28.150019 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1254 18:57:28.159517 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1255 18:57:28.162669 PCI: 00:1f.5
1256 18:57:28.172645 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1257 18:57:28.176121 CPU_CLUSTER: 0 child on link 0 APIC: 00
1258 18:57:28.176220 APIC: 00
1259 18:57:28.179161 APIC: 01
1260 18:57:28.179264 APIC: 06
1261 18:57:28.182404 APIC: 05
1262 18:57:28.182494 APIC: 03
1263 18:57:28.182561 APIC: 02
1264 18:57:28.185666 APIC: 07
1265 18:57:28.185760 APIC: 04
1266 18:57:28.192389 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1267 18:57:28.199940 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1268 18:57:28.205831 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1269 18:57:28.212297 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1270 18:57:28.216180 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1271 18:57:28.218691 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1272 18:57:28.228975 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1273 18:57:28.235184 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1274 18:57:28.242079 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1275 18:57:28.248550 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1276 18:57:28.254993 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1277 18:57:28.261668 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1278 18:57:28.271843 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1279 18:57:28.278191 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1280 18:57:28.281924 DOMAIN: 0000: Resource ranges:
1281 18:57:28.284816 * Base: 1000, Size: 800, Tag: 100
1282 18:57:28.287992 * Base: 1900, Size: e700, Tag: 100
1283 18:57:28.295201 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1284 18:57:28.301323 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1285 18:57:28.307872 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1286 18:57:28.314510 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1287 18:57:28.324377 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1288 18:57:28.331101 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1289 18:57:28.337779 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1290 18:57:28.344537 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1291 18:57:28.347875
1292 18:57:28.354555 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1293 18:57:28.361056 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1294 18:57:28.367387 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1295 18:57:28.370838
1296 18:57:28.377416 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1297 18:57:28.384289 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1298 18:57:28.393844 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1299 18:57:28.400324 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1300 18:57:28.407198 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1301 18:57:28.416872 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1302 18:57:28.424040 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1303 18:57:28.430383 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1304 18:57:28.440374 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1305 18:57:28.447035 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1306 18:57:28.453318 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1307 18:57:28.463363 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1308 18:57:28.469837 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1309 18:57:28.476276 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1310 18:57:28.479656 DOMAIN: 0000: Resource ranges:
1311 18:57:28.486674 * Base: 7fc00000, Size: 40400000, Tag: 200
1312 18:57:28.490061 * Base: d0000000, Size: 28000000, Tag: 200
1313 18:57:28.493050 * Base: fa000000, Size: 1000000, Tag: 200
1314 18:57:28.496209 * Base: fb001000, Size: 2fff000, Tag: 200
1315 18:57:28.502880 * Base: fe010000, Size: 2e000, Tag: 200
1316 18:57:28.506214 * Base: fe03f000, Size: d41000, Tag: 200
1317 18:57:28.509321 * Base: fed88000, Size: 8000, Tag: 200
1318 18:57:28.512682 * Base: fed93000, Size: d000, Tag: 200
1319 18:57:28.519430 * Base: feda2000, Size: 1e000, Tag: 200
1320 18:57:28.522506 * Base: fede0000, Size: 1220000, Tag: 200
1321 18:57:28.526037 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1322 18:57:28.535702 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1323 18:57:28.542267 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1324 18:57:28.549069 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1325 18:57:28.555724 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1326 18:57:28.562030 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1327 18:57:28.568937 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1328 18:57:28.575511 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1329 18:57:28.581970 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1330 18:57:28.588584 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1331 18:57:28.595338 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1332 18:57:28.602110 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1333 18:57:28.608374 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1334 18:57:28.615060 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1335 18:57:28.621349 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1336 18:57:28.627935 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1337 18:57:28.634999 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1338 18:57:28.641827 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1339 18:57:28.648413 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1340 18:57:28.654649 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1341 18:57:28.661305 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1342 18:57:28.667597 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1343 18:57:28.674507 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1344 18:57:28.681235 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1345 18:57:28.687583 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1346 18:57:28.690850 PCI: 00:1d.0: Resource ranges:
1347 18:57:28.697671 * Base: 7fc00000, Size: 100000, Tag: 200
1348 18:57:28.704392 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1349 18:57:28.711036 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1350 18:57:28.717245 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1351 18:57:28.723827 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1352 18:57:28.730750 Root Device assign_resources, bus 0 link: 0
1353 18:57:28.733946 DOMAIN: 0000 assign_resources, bus 0 link: 0
1354 18:57:28.743557 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1355 18:57:28.750642 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1356 18:57:28.760233 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1357 18:57:28.766622 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1358 18:57:28.770270 PCI: 00:04.0 assign_resources, bus 1 link: 0
1359 18:57:28.776781 PCI: 00:04.0 assign_resources, bus 1 link: 0
1360 18:57:28.783894 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1361 18:57:28.793320 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1362 18:57:28.799781 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1363 18:57:28.806489 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1364 18:57:28.809786 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1365 18:57:28.819907 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1366 18:57:28.823297 PCI: 00:14.0 assign_resources, bus 0 link: 0
1367 18:57:28.826320 PCI: 00:14.0 assign_resources, bus 0 link: 0
1368 18:57:28.836343 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1369 18:57:28.842776 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1370 18:57:28.852988 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1371 18:57:28.856206 PCI: 00:14.3 assign_resources, bus 0 link: 0
1372 18:57:28.862485 PCI: 00:14.3 assign_resources, bus 0 link: 0
1373 18:57:28.868893 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1374 18:57:28.872539 PCI: 00:15.0 assign_resources, bus 0 link: 0
1375 18:57:28.878903 PCI: 00:15.0 assign_resources, bus 0 link: 0
1376 18:57:28.886465 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1377 18:57:28.892976 PCI: 00:15.1 assign_resources, bus 0 link: 0
1378 18:57:28.895550 PCI: 00:15.1 assign_resources, bus 0 link: 0
1379 18:57:28.905407 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1380 18:57:28.912451 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1381 18:57:28.921933 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1382 18:57:28.928609 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1383 18:57:28.931797 PCI: 00:19.1 assign_resources, bus 0 link: 0
1384 18:57:28.938755 PCI: 00:19.1 assign_resources, bus 0 link: 0
1385 18:57:28.945512 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1386 18:57:28.955343 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1387 18:57:28.958547
1388 18:57:28.965299 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1389 18:57:28.968131 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1390 18:57:28.978603 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1391 18:57:28.985141 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1392 18:57:28.991932 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1393 18:57:28.998434 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1394 18:57:29.005098 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1395 18:57:29.007966 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1396 18:57:29.017939 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1397 18:57:29.021701 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1398 18:57:29.024867 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1399 18:57:29.031308 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1400 18:57:29.034553 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1401 18:57:29.041626 LPC: Trying to open IO window from 800 size 1ff
1402 18:57:29.047873 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1403 18:57:29.057918 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1404 18:57:29.064687 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1405 18:57:29.070961 DOMAIN: 0000 assign_resources, bus 0 link: 0
1406 18:57:29.074330 Root Device assign_resources, bus 0 link: 0
1407 18:57:29.077409 Done setting resources.
1408 18:57:29.084164 Show resources in subtree (Root Device)...After assigning values.
1409 18:57:29.087478 Root Device child on link 0 DOMAIN: 0000
1410 18:57:29.091295 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1411 18:57:29.100759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1412 18:57:29.110934 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1413 18:57:29.114126 PCI: 00:00.0
1414 18:57:29.120989 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1415 18:57:29.130573 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1416 18:57:29.140708 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1417 18:57:29.150336 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1418 18:57:29.160464 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1419 18:57:29.170461 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1420 18:57:29.177231 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1421 18:57:29.186959 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1422 18:57:29.196890 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1423 18:57:29.206677 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1424 18:57:29.216766 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1425 18:57:29.226708 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1426 18:57:29.233273 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1427 18:57:29.243232 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1428 18:57:29.253006 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1429 18:57:29.263262 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1430 18:57:29.273441 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1431 18:57:29.283229 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1432 18:57:29.289769 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1433 18:57:29.299531 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1434 18:57:29.302881 PCI: 00:02.0
1435 18:57:29.313125 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1436 18:57:29.322727 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1437 18:57:29.332971 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1438 18:57:29.335814 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1439 18:57:29.349020 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1440 18:57:29.349178 GENERIC: 0.0
1441 18:57:29.352185 PCI: 00:05.0
1442 18:57:29.362391 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1443 18:57:29.365694 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1444 18:57:29.369105 GENERIC: 0.0
1445 18:57:29.369204 PCI: 00:08.0
1446 18:57:29.378979 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1447 18:57:29.382089 PCI: 00:0a.0
1448 18:57:29.386228 PCI: 00:0d.0 child on link 0 USB0 port 0
1449 18:57:29.395805 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1450 18:57:29.402020 USB0 port 0 child on link 0 USB3 port 0
1451 18:57:29.402159 USB3 port 0
1452 18:57:29.405038 USB3 port 1
1453 18:57:29.405131 USB3 port 2
1454 18:57:29.408715 USB3 port 3
1455 18:57:29.411675 PCI: 00:14.0 child on link 0 USB0 port 0
1456 18:57:29.421728 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1457 18:57:29.428128 USB0 port 0 child on link 0 USB2 port 0
1458 18:57:29.428255 USB2 port 0
1459 18:57:29.431542 USB2 port 1
1460 18:57:29.431633 USB2 port 2
1461 18:57:29.435054 USB2 port 3
1462 18:57:29.435148 USB2 port 4
1463 18:57:29.438275 USB2 port 5
1464 18:57:29.438368 USB2 port 6
1465 18:57:29.441758 USB2 port 7
1466 18:57:29.441849 USB2 port 8
1467 18:57:29.445162
1468 18:57:29.445254 USB2 port 9
1469 18:57:29.448313 USB3 port 0
1470 18:57:29.448404 USB3 port 1
1471 18:57:29.451460 USB3 port 2
1472 18:57:29.451551 USB3 port 3
1473 18:57:29.454998 PCI: 00:14.2
1474 18:57:29.464801 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1475 18:57:29.474837 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1476 18:57:29.477776 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1477 18:57:29.487656 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1478 18:57:29.490947 GENERIC: 0.0
1479 18:57:29.494331 PCI: 00:15.0 child on link 0 I2C: 00:1a
1480 18:57:29.504095 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1481 18:57:29.507657 I2C: 00:1a
1482 18:57:29.507766 I2C: 00:31
1483 18:57:29.511256 I2C: 00:32
1484 18:57:29.514656 PCI: 00:15.1 child on link 0 I2C: 00:10
1485 18:57:29.524053 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1486 18:57:29.527378 I2C: 00:10
1487 18:57:29.527482 PCI: 00:15.2
1488 18:57:29.537288 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1489 18:57:29.540601 PCI: 00:15.3
1490 18:57:29.550349 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1491 18:57:29.553783 PCI: 00:16.0
1492 18:57:29.563690 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1493 18:57:29.563826 PCI: 00:19.0
1494 18:57:29.567193 PCI: 00:19.1 child on link 0 I2C: 00:15
1495 18:57:29.580096 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1496 18:57:29.580260 I2C: 00:15
1497 18:57:29.583702 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1498 18:57:29.593335 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1499 18:57:29.606651 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1500 18:57:29.617210 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1501 18:57:29.617396 GENERIC: 0.0
1502 18:57:29.620039 PCI: 01:00.0
1503 18:57:29.629890 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1504 18:57:29.639685 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1505 18:57:29.643034 PCI: 00:1e.0
1506 18:57:29.652942 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1507 18:57:29.656649 PCI: 00:1e.2 child on link 0 SPI: 00
1508 18:57:29.666595 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1509 18:57:29.669404 SPI: 00
1510 18:57:29.672756 PCI: 00:1e.3 child on link 0 SPI: 00
1511 18:57:29.682779 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1512 18:57:29.686347 SPI: 00
1513 18:57:29.689034 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1514 18:57:29.698916 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1515 18:57:29.699063 PNP: 0c09.0
1516 18:57:29.708714 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1517 18:57:29.712147 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1518 18:57:29.721962 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1519 18:57:29.732273 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1520 18:57:29.734948 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1521 18:57:29.738753 GENERIC: 0.0
1522 18:57:29.738878 GENERIC: 1.0
1523 18:57:29.742061 PCI: 00:1f.3
1524 18:57:29.751778 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1525 18:57:29.761506 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1526 18:57:29.765029 PCI: 00:1f.5
1527 18:57:29.774718 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1528 18:57:29.778340 CPU_CLUSTER: 0 child on link 0 APIC: 00
1529 18:57:29.778480 APIC: 00
1530 18:57:29.781469 APIC: 01
1531 18:57:29.781605 APIC: 06
1532 18:57:29.784650 APIC: 05
1533 18:57:29.784769 APIC: 03
1534 18:57:29.784872 APIC: 02
1535 18:57:29.787972 APIC: 07
1536 18:57:29.788086 APIC: 04
1537 18:57:29.791260 Done allocating resources.
1538 18:57:29.798002 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1539 18:57:29.804733 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1540 18:57:29.807647 Configure GPIOs for I2S audio on UP4.
1541 18:57:29.814573 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1542 18:57:29.817555 Enabling resources...
1543 18:57:29.820769 PCI: 00:00.0 subsystem <- 8086/9a12
1544 18:57:29.820868 PCI: 00:00.0 cmd <- 06
1545 18:57:29.827755 PCI: 00:02.0 subsystem <- 8086/9a40
1546 18:57:29.827870 PCI: 00:02.0 cmd <- 03
1547 18:57:29.831369 PCI: 00:04.0 subsystem <- 8086/9a03
1548 18:57:29.834176 PCI: 00:04.0 cmd <- 02
1549 18:57:29.837341 PCI: 00:05.0 subsystem <- 8086/9a19
1550 18:57:29.840831 PCI: 00:05.0 cmd <- 02
1551 18:57:29.844530 PCI: 00:08.0 subsystem <- 8086/9a11
1552 18:57:29.847280 PCI: 00:08.0 cmd <- 06
1553 18:57:29.850691 PCI: 00:0d.0 subsystem <- 8086/9a13
1554 18:57:29.854125 PCI: 00:0d.0 cmd <- 02
1555 18:57:29.857383 PCI: 00:14.0 subsystem <- 8086/a0ed
1556 18:57:29.860941 PCI: 00:14.0 cmd <- 02
1557 18:57:29.863692 PCI: 00:14.2 subsystem <- 8086/a0ef
1558 18:57:29.867086 PCI: 00:14.2 cmd <- 02
1559 18:57:29.870858 PCI: 00:14.3 subsystem <- 8086/a0f0
1560 18:57:29.870958 PCI: 00:14.3 cmd <- 02
1561 18:57:29.877402 PCI: 00:15.0 subsystem <- 8086/a0e8
1562 18:57:29.877515 PCI: 00:15.0 cmd <- 02
1563 18:57:29.880528 PCI: 00:15.1 subsystem <- 8086/a0e9
1564 18:57:29.884211 PCI: 00:15.1 cmd <- 02
1565 18:57:29.887288 PCI: 00:15.2 subsystem <- 8086/a0ea
1566 18:57:29.890447 PCI: 00:15.2 cmd <- 02
1567 18:57:29.893559 PCI: 00:15.3 subsystem <- 8086/a0eb
1568 18:57:29.897016 PCI: 00:15.3 cmd <- 02
1569 18:57:29.900715 PCI: 00:16.0 subsystem <- 8086/a0e0
1570 18:57:29.903675 PCI: 00:16.0 cmd <- 02
1571 18:57:29.907055 PCI: 00:19.1 subsystem <- 8086/a0c6
1572 18:57:29.910750 PCI: 00:19.1 cmd <- 02
1573 18:57:29.913953 PCI: 00:1d.0 bridge ctrl <- 0013
1574 18:57:29.916955 PCI: 00:1d.0 subsystem <- 8086/a0b0
1575 18:57:29.920186 PCI: 00:1d.0 cmd <- 06
1576 18:57:29.923308 PCI: 00:1e.0 subsystem <- 8086/a0a8
1577 18:57:29.923440 PCI: 00:1e.0 cmd <- 06
1578 18:57:29.930247 PCI: 00:1e.2 subsystem <- 8086/a0aa
1579 18:57:29.930362 PCI: 00:1e.2 cmd <- 06
1580 18:57:29.933429 PCI: 00:1e.3 subsystem <- 8086/a0ab
1581 18:57:29.937014 PCI: 00:1e.3 cmd <- 02
1582 18:57:29.940104 PCI: 00:1f.0 subsystem <- 8086/a087
1583 18:57:29.943531 PCI: 00:1f.0 cmd <- 407
1584 18:57:29.946821 PCI: 00:1f.3 subsystem <- 8086/a0c8
1585 18:57:29.950005 PCI: 00:1f.3 cmd <- 02
1586 18:57:29.953244 PCI: 00:1f.5 subsystem <- 8086/a0a4
1587 18:57:29.956506 PCI: 00:1f.5 cmd <- 406
1588 18:57:29.960545 PCI: 01:00.0 cmd <- 02
1589 18:57:29.964736 done.
1590 18:57:29.968187 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1591 18:57:29.971307 Initializing devices...
1592 18:57:29.975197 Root Device init
1593 18:57:29.977949 Chrome EC: Set SMI mask to 0x0000000000000000
1594 18:57:29.985439 Chrome EC: clear events_b mask to 0x0000000000000000
1595 18:57:29.992318 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1596 18:57:29.998418 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1597 18:57:30.005006 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1598 18:57:30.012038 Chrome EC: Set WAKE mask to 0x0000000000000000
1599 18:57:30.014888 fw_config match found: DB_USB=USB3_ACTIVE
1600 18:57:30.021429 Configure Right Type-C port orientation for retimer
1601 18:57:30.024593 Root Device init finished in 46 msecs
1602 18:57:30.027902 PCI: 00:00.0 init
1603 18:57:30.031297 CPU TDP = 9 Watts
1604 18:57:30.031414 CPU PL1 = 9 Watts
1605 18:57:30.034380 CPU PL2 = 40 Watts
1606 18:57:30.034503 CPU PL4 = 83 Watts
1607 18:57:30.041495 PCI: 00:00.0 init finished in 8 msecs
1608 18:57:30.041623 PCI: 00:02.0 init
1609 18:57:30.044392 GMA: Found VBT in CBFS
1610 18:57:30.047870 GMA: Found valid VBT in CBFS
1611 18:57:30.054203 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1612 18:57:30.060855 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1613 18:57:30.064183 PCI: 00:02.0 init finished in 18 msecs
1614 18:57:30.067381 PCI: 00:05.0 init
1615 18:57:30.070765 PCI: 00:05.0 init finished in 0 msecs
1616 18:57:30.074213 PCI: 00:08.0 init
1617 18:57:30.077328 PCI: 00:08.0 init finished in 0 msecs
1618 18:57:30.081164 PCI: 00:14.0 init
1619 18:57:30.083741 PCI: 00:14.0 init finished in 0 msecs
1620 18:57:30.087214 PCI: 00:14.2 init
1621 18:57:30.090679 PCI: 00:14.2 init finished in 0 msecs
1622 18:57:30.090781 PCI: 00:15.0 init
1623 18:57:30.093797 I2C bus 0 version 0x3230302a
1624 18:57:30.097245 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1625 18:57:30.103647 PCI: 00:15.0 init finished in 6 msecs
1626 18:57:30.103767 PCI: 00:15.1 init
1627 18:57:30.107011 I2C bus 1 version 0x3230302a
1628 18:57:30.110242 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1629 18:57:30.113686 PCI: 00:15.1 init finished in 6 msecs
1630 18:57:30.116870 PCI: 00:15.2 init
1631 18:57:30.120517 I2C bus 2 version 0x3230302a
1632 18:57:30.123836 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1633 18:57:30.127097 PCI: 00:15.2 init finished in 6 msecs
1634 18:57:30.130580 PCI: 00:15.3 init
1635 18:57:30.133461 I2C bus 3 version 0x3230302a
1636 18:57:30.136608 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1637 18:57:30.140250 PCI: 00:15.3 init finished in 6 msecs
1638 18:57:30.143245 PCI: 00:16.0 init
1639 18:57:30.147095 PCI: 00:16.0 init finished in 0 msecs
1640 18:57:30.150081 PCI: 00:19.1 init
1641 18:57:30.150177 I2C bus 5 version 0x3230302a
1642 18:57:30.153379
1643 18:57:30.156562 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1644 18:57:30.159986 PCI: 00:19.1 init finished in 6 msecs
1645 18:57:30.160067 PCI: 00:1d.0 init
1646 18:57:30.163272 Initializing PCH PCIe bridge.
1647 18:57:30.169460 PCI: 00:1d.0 init finished in 3 msecs
1648 18:57:30.169617 PCI: 00:1f.0 init
1649 18:57:30.172925
1650 18:57:30.176040 IOAPIC: Initializing IOAPIC at 0xfec00000
1651 18:57:30.179659 IOAPIC: Bootstrap Processor Local APIC = 0x00
1652 18:57:30.182890 IOAPIC: ID = 0x02
1653 18:57:30.186252 IOAPIC: Dumping registers
1654 18:57:30.186341 reg 0x0000: 0x02000000
1655 18:57:30.189295 reg 0x0001: 0x00770020
1656 18:57:30.192601 reg 0x0002: 0x00000000
1657 18:57:30.195890 PCI: 00:1f.0 init finished in 21 msecs
1658 18:57:30.199165 PCI: 00:1f.2 init
1659 18:57:30.202958 Disabling ACPI via APMC.
1660 18:57:30.205876 APMC done.
1661 18:57:30.209200 PCI: 00:1f.2 init finished in 6 msecs
1662 18:57:30.220595 PCI: 01:00.0 init
1663 18:57:30.223472 PCI: 01:00.0 init finished in 0 msecs
1664 18:57:30.226685 PNP: 0c09.0 init
1665 18:57:30.233682 Google Chrome EC uptime: 8.409 seconds
1666 18:57:30.236869 Google Chrome AP resets since EC boot: 1
1667 18:57:30.240298 Google Chrome most recent AP reset causes:
1668 18:57:30.243587 0.454: 32775 shutdown: entering G3
1669 18:57:30.250411 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1670 18:57:30.253537 PNP: 0c09.0 init finished in 24 msecs
1671 18:57:30.260514 Devices initialized
1672 18:57:30.263651 Show all devs... After init.
1673 18:57:30.266879 Root Device: enabled 1
1674 18:57:30.266965 DOMAIN: 0000: enabled 1
1675 18:57:30.270169 CPU_CLUSTER: 0: enabled 1
1676 18:57:30.273444 PCI: 00:00.0: enabled 1
1677 18:57:30.276979 PCI: 00:02.0: enabled 1
1678 18:57:30.277084 PCI: 00:04.0: enabled 1
1679 18:57:30.280052 PCI: 00:05.0: enabled 1
1680 18:57:30.283693 PCI: 00:06.0: enabled 0
1681 18:57:30.286672 PCI: 00:07.0: enabled 0
1682 18:57:30.286759 PCI: 00:07.1: enabled 0
1683 18:57:30.290166 PCI: 00:07.2: enabled 0
1684 18:57:30.293355 PCI: 00:07.3: enabled 0
1685 18:57:30.296947 PCI: 00:08.0: enabled 1
1686 18:57:30.297047 PCI: 00:09.0: enabled 0
1687 18:57:30.299687 PCI: 00:0a.0: enabled 0
1688 18:57:30.303106 PCI: 00:0d.0: enabled 1
1689 18:57:30.307283 PCI: 00:0d.1: enabled 0
1690 18:57:30.307382 PCI: 00:0d.2: enabled 0
1691 18:57:30.309835 PCI: 00:0d.3: enabled 0
1692 18:57:30.313681 PCI: 00:0e.0: enabled 0
1693 18:57:30.316576 PCI: 00:10.2: enabled 1
1694 18:57:30.316673 PCI: 00:10.6: enabled 0
1695 18:57:30.320098 PCI: 00:10.7: enabled 0
1696 18:57:30.323077 PCI: 00:12.0: enabled 0
1697 18:57:30.323170 PCI: 00:12.6: enabled 0
1698 18:57:30.326490
1699 18:57:30.326590 PCI: 00:13.0: enabled 0
1700 18:57:30.329826 PCI: 00:14.0: enabled 1
1701 18:57:30.332842 PCI: 00:14.1: enabled 0
1702 18:57:30.332927 PCI: 00:14.2: enabled 1
1703 18:57:30.336428 PCI: 00:14.3: enabled 1
1704 18:57:30.339835 PCI: 00:15.0: enabled 1
1705 18:57:30.342890 PCI: 00:15.1: enabled 1
1706 18:57:30.342975 PCI: 00:15.2: enabled 1
1707 18:57:30.346157 PCI: 00:15.3: enabled 1
1708 18:57:30.349701 PCI: 00:16.0: enabled 1
1709 18:57:30.352793 PCI: 00:16.1: enabled 0
1710 18:57:30.352878 PCI: 00:16.2: enabled 0
1711 18:57:30.356409 PCI: 00:16.3: enabled 0
1712 18:57:30.359248 PCI: 00:16.4: enabled 0
1713 18:57:30.362995 PCI: 00:16.5: enabled 0
1714 18:57:30.363081 PCI: 00:17.0: enabled 0
1715 18:57:30.366253 PCI: 00:19.0: enabled 0
1716 18:57:30.369118 PCI: 00:19.1: enabled 1
1717 18:57:30.369202 PCI: 00:19.2: enabled 0
1718 18:57:30.372548
1719 18:57:30.372630 PCI: 00:1c.0: enabled 1
1720 18:57:30.376083 PCI: 00:1c.1: enabled 0
1721 18:57:30.379389 PCI: 00:1c.2: enabled 0
1722 18:57:30.379478 PCI: 00:1c.3: enabled 0
1723 18:57:30.382934 PCI: 00:1c.4: enabled 0
1724 18:57:30.386129 PCI: 00:1c.5: enabled 0
1725 18:57:30.389391 PCI: 00:1c.6: enabled 1
1726 18:57:30.389485 PCI: 00:1c.7: enabled 0
1727 18:57:30.392238 PCI: 00:1d.0: enabled 1
1728 18:57:30.395721 PCI: 00:1d.1: enabled 0
1729 18:57:30.399002 PCI: 00:1d.2: enabled 1
1730 18:57:30.399093 PCI: 00:1d.3: enabled 0
1731 18:57:30.402731 PCI: 00:1e.0: enabled 1
1732 18:57:30.405684 PCI: 00:1e.1: enabled 0
1733 18:57:30.409067 PCI: 00:1e.2: enabled 1
1734 18:57:30.409165 PCI: 00:1e.3: enabled 1
1735 18:57:30.412112 PCI: 00:1f.0: enabled 1
1736 18:57:30.415527 PCI: 00:1f.1: enabled 0
1737 18:57:30.419011 PCI: 00:1f.2: enabled 1
1738 18:57:30.419107 PCI: 00:1f.3: enabled 1
1739 18:57:30.422722 PCI: 00:1f.4: enabled 0
1740 18:57:30.425593 PCI: 00:1f.5: enabled 1
1741 18:57:30.425679 PCI: 00:1f.6: enabled 0
1742 18:57:30.428810
1743 18:57:30.428897 PCI: 00:1f.7: enabled 0
1744 18:57:30.432222 APIC: 00: enabled 1
1745 18:57:30.435290 GENERIC: 0.0: enabled 1
1746 18:57:30.435375 GENERIC: 0.0: enabled 1
1747 18:57:30.438753 GENERIC: 1.0: enabled 1
1748 18:57:30.442251 GENERIC: 0.0: enabled 1
1749 18:57:30.445548 GENERIC: 1.0: enabled 1
1750 18:57:30.445642 USB0 port 0: enabled 1
1751 18:57:30.448684 GENERIC: 0.0: enabled 1
1752 18:57:30.451819 USB0 port 0: enabled 1
1753 18:57:30.451901 GENERIC: 0.0: enabled 1
1754 18:57:30.455957 I2C: 00:1a: enabled 1
1755 18:57:30.458904 I2C: 00:31: enabled 1
1756 18:57:30.458996 I2C: 00:32: enabled 1
1757 18:57:30.461768
1758 18:57:30.461848 I2C: 00:10: enabled 1
1759 18:57:30.464962 I2C: 00:15: enabled 1
1760 18:57:30.468652 GENERIC: 0.0: enabled 0
1761 18:57:30.468732 GENERIC: 1.0: enabled 0
1762 18:57:30.471830 GENERIC: 0.0: enabled 1
1763 18:57:30.475156 SPI: 00: enabled 1
1764 18:57:30.475236 SPI: 00: enabled 1
1765 18:57:30.478475 PNP: 0c09.0: enabled 1
1766 18:57:30.481738 GENERIC: 0.0: enabled 1
1767 18:57:30.481843 USB3 port 0: enabled 1
1768 18:57:30.484853 USB3 port 1: enabled 1
1769 18:57:30.488528 USB3 port 2: enabled 0
1770 18:57:30.491664 USB3 port 3: enabled 0
1771 18:57:30.491774 USB2 port 0: enabled 0
1772 18:57:30.494764 USB2 port 1: enabled 1
1773 18:57:30.498428 USB2 port 2: enabled 1
1774 18:57:30.498522 USB2 port 3: enabled 0
1775 18:57:30.501504 USB2 port 4: enabled 1
1776 18:57:30.505080 USB2 port 5: enabled 0
1777 18:57:30.505164 USB2 port 6: enabled 0
1778 18:57:30.508755
1779 18:57:30.508884 USB2 port 7: enabled 0
1780 18:57:30.511285 USB2 port 8: enabled 0
1781 18:57:30.514626 USB2 port 9: enabled 0
1782 18:57:30.514719 USB3 port 0: enabled 0
1783 18:57:30.518050 USB3 port 1: enabled 1
1784 18:57:30.521493 USB3 port 2: enabled 0
1785 18:57:30.521591 USB3 port 3: enabled 0
1786 18:57:30.524662 GENERIC: 0.0: enabled 1
1787 18:57:30.528085 GENERIC: 1.0: enabled 1
1788 18:57:30.531012 APIC: 01: enabled 1
1789 18:57:30.531109 APIC: 06: enabled 1
1790 18:57:30.534455 APIC: 05: enabled 1
1791 18:57:30.534548 APIC: 03: enabled 1
1792 18:57:30.537602 APIC: 02: enabled 1
1793 18:57:30.540918 APIC: 07: enabled 1
1794 18:57:30.541016 APIC: 04: enabled 1
1795 18:57:30.544220 PCI: 01:00.0: enabled 1
1796 18:57:30.551193 BS: BS_DEV_INIT run times (exec / console): 35 / 540 ms
1797 18:57:30.554741 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1798 18:57:30.557695 ELOG: NV offset 0xf30000 size 0x1000
1799 18:57:30.565461 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1800 18:57:30.571881 ELOG: Event(17) added with size 13 at 2023-01-21 18:57:30 UTC
1801 18:57:30.578874 ELOG: Event(92) added with size 9 at 2023-01-21 18:57:30 UTC
1802 18:57:30.585243 ELOG: Event(93) added with size 9 at 2023-01-21 18:57:30 UTC
1803 18:57:30.592014 ELOG: Event(9E) added with size 10 at 2023-01-21 18:57:30 UTC
1804 18:57:30.598677 ELOG: Event(9F) added with size 14 at 2023-01-21 18:57:30 UTC
1805 18:57:30.605108 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1806 18:57:30.608332 ELOG: Event(A1) added with size 10 at 2023-01-21 18:57:30 UTC
1807 18:57:30.611923
1808 18:57:30.618564 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1809 18:57:30.624897 ELOG: Event(A0) added with size 9 at 2023-01-21 18:57:30 UTC
1810 18:57:30.628269 elog_add_boot_reason: Logged dev mode boot
1811 18:57:30.634759 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1812 18:57:30.634916 Finalize devices...
1813 18:57:30.638070 Devices finalized
1814 18:57:30.644704 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1815 18:57:30.648289 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1816 18:57:30.654828 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1817 18:57:30.658187 ME: HFSTS1 : 0x80030055
1818 18:57:30.664581 ME: HFSTS2 : 0x30280116
1819 18:57:30.668121 ME: HFSTS3 : 0x00000050
1820 18:57:30.671682 ME: HFSTS4 : 0x00004000
1821 18:57:30.677872 ME: HFSTS5 : 0x00000000
1822 18:57:30.681446 ME: HFSTS6 : 0x40400006
1823 18:57:30.684728 ME: Manufacturing Mode : YES
1824 18:57:30.687856 ME: SPI Protection Mode Enabled : NO
1825 18:57:30.691102 ME: FW Partition Table : OK
1826 18:57:30.694639
1827 18:57:30.698351 ME: Bringup Loader Failure : NO
1828 18:57:30.701292 ME: Firmware Init Complete : NO
1829 18:57:30.705148 ME: Boot Options Present : NO
1830 18:57:30.708178 ME: Update In Progress : NO
1831 18:57:30.710983 ME: D0i3 Support : YES
1832 18:57:30.714307 ME: Low Power State Enabled : NO
1833 18:57:30.717890 ME: CPU Replaced : YES
1834 18:57:30.724566 ME: CPU Replacement Valid : YES
1835 18:57:30.727719 ME: Current Working State : 5
1836 18:57:30.731046 ME: Current Operation State : 1
1837 18:57:30.734537 ME: Current Operation Mode : 3
1838 18:57:30.737533 ME: Error Code : 0
1839 18:57:30.740852 ME: Enhanced Debug Mode : NO
1840 18:57:30.744336 ME: CPU Debug Disabled : YES
1841 18:57:30.747997 ME: TXT Support : NO
1842 18:57:30.754406 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1843 18:57:30.760593 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1844 18:57:30.764105 CBFS: 'fallback/slic' not found.
1845 18:57:30.770702 ACPI: Writing ACPI tables at 76b01000.
1846 18:57:30.770831 ACPI: * FACS
1847 18:57:30.773912 ACPI: * DSDT
1848 18:57:30.777441 Ramoops buffer: 0x100000@0x76a00000.
1849 18:57:30.780490 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1850 18:57:30.787258 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1851 18:57:30.790396 Google Chrome EC: version:
1852 18:57:30.794012 ro: voema_v2.0.10114-a447f03e46
1853 18:57:30.797227 rw: voema_v2.0.10114-a447f03e46
1854 18:57:30.797327 running image: 2
1855 18:57:30.803566 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1856 18:57:30.808289 ACPI: * FADT
1857 18:57:30.808441 SCI is IRQ9
1858 18:57:30.815158 ACPI: added table 1/32, length now 40
1859 18:57:30.815277 ACPI: * SSDT
1860 18:57:30.818437 Found 1 CPU(s) with 8 core(s) each.
1861 18:57:30.825125 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1862 18:57:30.827915 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1863 18:57:30.831120 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1864 18:57:30.834535 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1865 18:57:30.838229
1866 18:57:30.841058 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1867 18:57:30.847876 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1868 18:57:30.851074 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1869 18:57:30.858523 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1870 18:57:30.863946 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1871 18:57:30.867775 \_SB.PCI0.RP09: Added StorageD3Enable property
1872 18:57:30.874204 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1873 18:57:30.877320 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1874 18:57:30.884384 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1875 18:57:30.887718 PS2K: Passing 80 keymaps to kernel
1876 18:57:30.894227 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1877 18:57:30.900741 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1878 18:57:30.907688 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1879 18:57:30.914255 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1880 18:57:30.920789 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1881 18:57:30.927369 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1882 18:57:30.934335 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1883 18:57:30.940596 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1884 18:57:30.943879 ACPI: added table 2/32, length now 44
1885 18:57:30.944040 ACPI: * MCFG
1886 18:57:30.947365
1887 18:57:30.950809 ACPI: added table 3/32, length now 48
1888 18:57:30.950893 ACPI: * TPM2
1889 18:57:30.953749 TPM2 log created at 0x769f0000
1890 18:57:30.957323 ACPI: added table 4/32, length now 52
1891 18:57:30.960636 ACPI: * MADT
1892 18:57:30.960716 SCI is IRQ9
1893 18:57:30.963772 ACPI: added table 5/32, length now 56
1894 18:57:30.967393 current = 76b09850
1895 18:57:30.967475 ACPI: * DMAR
1896 18:57:30.974207 ACPI: added table 6/32, length now 60
1897 18:57:30.977078 ACPI: added table 7/32, length now 64
1898 18:57:30.977158 ACPI: * HPET
1899 18:57:30.980607 ACPI: added table 8/32, length now 68
1900 18:57:30.983407 ACPI: done.
1901 18:57:30.986926 ACPI tables: 35216 bytes.
1902 18:57:30.987009 smbios_write_tables: 769ef000
1903 18:57:30.991879 EC returned error result code 3
1904 18:57:30.994991 Couldn't obtain OEM name from CBI
1905 18:57:30.998930 Create SMBIOS type 16
1906 18:57:31.001963 Create SMBIOS type 17
1907 18:57:31.005611 GENERIC: 0.0 (WIFI Device)
1908 18:57:31.005737 SMBIOS tables: 1734 bytes.
1909 18:57:31.008517
1910 18:57:31.011870 Writing table forward entry at 0x00000500
1911 18:57:31.018371 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1912 18:57:31.021665 Writing coreboot table at 0x76b25000
1913 18:57:31.028479 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1914 18:57:31.031730 1. 0000000000001000-000000000009ffff: RAM
1915 18:57:31.035401 2. 00000000000a0000-00000000000fffff: RESERVED
1916 18:57:31.041796 3. 0000000000100000-00000000769eefff: RAM
1917 18:57:31.045060 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1918 18:57:31.051629 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1919 18:57:31.057990 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1920 18:57:31.061639 7. 0000000077000000-000000007fbfffff: RESERVED
1921 18:57:31.067803 8. 00000000c0000000-00000000cfffffff: RESERVED
1922 18:57:31.071205 9. 00000000f8000000-00000000f9ffffff: RESERVED
1923 18:57:31.077900 10. 00000000fb000000-00000000fb000fff: RESERVED
1924 18:57:31.081382 11. 00000000fe000000-00000000fe00ffff: RESERVED
1925 18:57:31.084622 12. 00000000fed80000-00000000fed87fff: RESERVED
1926 18:57:31.090901 13. 00000000fed90000-00000000fed92fff: RESERVED
1927 18:57:31.094082 14. 00000000feda0000-00000000feda1fff: RESERVED
1928 18:57:31.101053 15. 00000000fedc0000-00000000feddffff: RESERVED
1929 18:57:31.104483 16. 0000000100000000-00000004803fffff: RAM
1930 18:57:31.107476 Passing 4 GPIOs to payload:
1931 18:57:31.113920 NAME | PORT | POLARITY | VALUE
1932 18:57:31.117150 lid | undefined | high | high
1933 18:57:31.123876 power | undefined | high | low
1934 18:57:31.127022 oprom | undefined | high | low
1935 18:57:31.133522 EC in RW | 0x000000e5 | high | high
1936 18:57:31.140408 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1937 18:57:31.143663 coreboot table: 1576 bytes.
1938 18:57:31.146551 IMD ROOT 0. 0x76fff000 0x00001000
1939 18:57:31.149864 IMD SMALL 1. 0x76ffe000 0x00001000
1940 18:57:31.153352 FSP MEMORY 2. 0x76c4e000 0x003b0000
1941 18:57:31.156548 VPD 3. 0x76c4d000 0x00000367
1942 18:57:31.159993 RO MCACHE 4. 0x76c4c000 0x00000fdc
1943 18:57:31.163505
1944 18:57:31.166297 CONSOLE 5. 0x76c2c000 0x00020000
1945 18:57:31.170000 FMAP 6. 0x76c2b000 0x00000578
1946 18:57:31.173053 TIME STAMP 7. 0x76c2a000 0x00000910
1947 18:57:31.176468 VBOOT WORK 8. 0x76c16000 0x00014000
1948 18:57:31.180142 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 18:57:31.182705 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 18:57:31.186107 RAMSTAGE 11. 0x76b97000 0x00073000
1951 18:57:31.192858 REFCODE 12. 0x76b42000 0x00055000
1952 18:57:31.196388 SMM BACKUP 13. 0x76b32000 0x00010000
1953 18:57:31.199577 4f444749 14. 0x76b30000 0x00002000
1954 18:57:31.202674 EXT VBT15. 0x76b2d000 0x0000219f
1955 18:57:31.206374 COREBOOT 16. 0x76b25000 0x00008000
1956 18:57:31.209229 ACPI 17. 0x76b01000 0x00024000
1957 18:57:31.212667 ACPI GNVS 18. 0x76b00000 0x00001000
1958 18:57:31.215752 RAMOOPS 19. 0x76a00000 0x00100000
1959 18:57:31.219403 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 18:57:31.222227
1961 18:57:31.225850 SMBIOS 21. 0x769ef000 0x00000800
1962 18:57:31.225937 IMD small region:
1963 18:57:31.229137 IMD ROOT 0. 0x76ffec00 0x00000400
1964 18:57:31.235570 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 18:57:31.239237 POWER STATE 2. 0x76ffeb80 0x00000044
1966 18:57:31.242082 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 18:57:31.245360 MEM INFO 4. 0x76ffe980 0x000001e0
1968 18:57:31.252095 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1969 18:57:31.255428 MTRR: Physical address space:
1970 18:57:31.261749 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 18:57:31.268420 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 18:57:31.275386 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 18:57:31.278356 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 18:57:31.284764 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 18:57:31.291488 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 18:57:31.298476 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 18:57:31.301614 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 18:57:31.307904 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 18:57:31.311497 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 18:57:31.314481 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 18:57:31.317938 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 18:57:31.324462 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 18:57:31.327876 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 18:57:31.331426 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 18:57:31.334797 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 18:57:31.341106 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 18:57:31.344223 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 18:57:31.347684 call enable_fixed_mtrr()
1989 18:57:31.350700 CPU physical address size: 39 bits
1990 18:57:31.357412 MTRR: default type WB/UC MTRR counts: 6/7.
1991 18:57:31.360564 MTRR: WB selected as default type.
1992 18:57:31.367579 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 18:57:31.370588 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 18:57:31.377340 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 18:57:31.383995 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 18:57:31.390658 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 18:57:31.397022 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 18:57:31.404163 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 18:57:31.408003 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 18:57:31.410831 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 18:57:31.414060 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 18:57:31.420754 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 18:57:31.424399 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 18:57:31.427249 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 18:57:31.430662 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 18:57:31.437614 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 18:57:31.440568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 18:57:31.444034 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 18:57:31.444122
2010 18:57:31.447898 MTRR check
2011 18:57:31.451122 call enable_fixed_mtrr()
2012 18:57:31.451201 Fixed MTRRs : Enabled
2013 18:57:31.454450 Variable MTRRs: Enabled
2014 18:57:31.454538
2015 18:57:31.457926 CPU physical address size: 39 bits
2016 18:57:31.465940 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2017 18:57:31.468933 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 18:57:31.475452 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 18:57:31.478675 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 18:57:31.482123 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 18:57:31.485310 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 18:57:31.492059 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 18:57:31.495100 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 18:57:31.498726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 18:57:31.502390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 18:57:31.508500 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 18:57:31.511582 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 18:57:31.514980 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 18:57:31.522822 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 18:57:31.526238 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 18:57:31.529091 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 18:57:31.532515 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 18:57:31.539115 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 18:57:31.542400 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 18:57:31.545691 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 18:57:31.549070 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 18:57:31.555473 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 18:57:31.558910 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 18:57:31.562042 call enable_fixed_mtrr()
2040 18:57:31.565600 call enable_fixed_mtrr()
2041 18:57:31.569139 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 18:57:31.572402 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 18:57:31.579504 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 18:57:31.582094 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 18:57:31.585884 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 18:57:31.588871 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 18:57:31.592006 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 18:57:31.595296
2049 18:57:31.598935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 18:57:31.602418 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 18:57:31.605414 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 18:57:31.608758 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 18:57:31.615464 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 18:57:31.618668 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 18:57:31.622276 call enable_fixed_mtrr()
2056 18:57:31.625060 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 18:57:31.631705 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 18:57:31.635202 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 18:57:31.638293 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 18:57:31.641726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 18:57:31.648045 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 18:57:31.651389 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 18:57:31.654885 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 18:57:31.658600 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 18:57:31.664711 CPU physical address size: 39 bits
2066 18:57:31.668712 call enable_fixed_mtrr()
2067 18:57:31.671884 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 18:57:31.678774 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 18:57:31.681813 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 18:57:31.685079 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 18:57:31.688268 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 18:57:31.694884 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 18:57:31.698246 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 18:57:31.702008 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 18:57:31.704509 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 18:57:31.711556 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 18:57:31.715145 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 18:57:31.717979 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 18:57:31.725422 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 18:57:31.725552 call enable_fixed_mtrr()
2081 18:57:31.732139 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 18:57:31.735721 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 18:57:31.738578 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 18:57:31.741712 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 18:57:31.749180 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 18:57:31.751709 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 18:57:31.755249 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 18:57:31.758127 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 18:57:31.764944 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 18:57:31.768205 CPU physical address size: 39 bits
2091 18:57:31.773021 call enable_fixed_mtrr()
2092 18:57:31.777500 Checking cr50 for pending updates
2093 18:57:31.781210 CPU physical address size: 39 bits
2094 18:57:31.784279 CPU physical address size: 39 bits
2095 18:57:31.788176 Reading cr50 TPM mode
2096 18:57:31.791833 CPU physical address size: 39 bits
2097 18:57:31.795500 CPU physical address size: 39 bits
2098 18:57:31.802205 BS: BS_PAYLOAD_LOAD entry times (exec / console): 321 / 6 ms
2099 18:57:31.809127 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2100 18:57:31.811723 Checking segment from ROM address 0xffc02b38
2101 18:57:31.818272 Checking segment from ROM address 0xffc02b54
2102 18:57:31.821789 Loading segment from ROM address 0xffc02b38
2103 18:57:31.825069 code (compression=0)
2104 18:57:31.831745 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2105 18:57:31.835061
2106 18:57:31.841371 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2107 18:57:31.844900 it's not compressed!
2108 18:57:31.984695 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2109 18:57:31.991266 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2110 18:57:31.998577 Loading segment from ROM address 0xffc02b54
2111 18:57:32.001443 Entry Point 0x30000000
2112 18:57:32.001614 Loaded segments
2113 18:57:32.007899 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2114 18:57:32.052978 Finalizing chipset.
2115 18:57:32.056140 Finalizing SMM.
2116 18:57:32.056238 APMC done.
2117 18:57:32.062942 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2118 18:57:32.066197 mp_park_aps done after 0 msecs.
2119 18:57:32.069654 Jumping to boot code at 0x30000000(0x76b25000)
2120 18:57:32.079403 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2121 18:57:32.079515
2122 18:57:32.079591
2123 18:57:32.082445
2124 18:57:32.082534
2125 18:57:32.082889 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2126 18:57:32.082996 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2127 18:57:32.083087 Setting prompt string to ['volteer:']
2128 18:57:32.083171 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2129 18:57:32.086187 Starting depthcharge on Voema...
2130 18:57:32.086278
2131 18:57:32.092594 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 18:57:32.092690
2133 18:57:32.098966 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 18:57:32.099066
2135 18:57:32.105532 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 18:57:32.105622
2137 18:57:32.109062 Failed to find eMMC card reader
2138 18:57:32.109142
2139 18:57:32.112229 Wipe memory regions:
2140 18:57:32.112318
2141 18:57:32.115549 [0x00000000001000, 0x000000000a0000)
2142 18:57:32.115631
2143 18:57:32.118728 [0x00000000100000, 0x00000030000000)
2144 18:57:32.118816
2145 18:57:32.156533 [0x00000032662db0, 0x000000769ef000)
2146 18:57:32.156685
2147 18:57:32.207654 [0x00000100000000, 0x00000480400000)
2148 18:57:32.207806
2149 18:57:32.838992 ec_init: CrosEC protocol v3 supported (256, 256)
2150 18:57:32.839150
2151 18:57:33.271236 R8152: Initializing
2152 18:57:33.271399
2153 18:57:33.274482 Version 6 (ocp_data = 5c30)
2154 18:57:33.274565
2155 18:57:33.278015 R8152: Done initializing
2156 18:57:33.278106
2157 18:57:33.280990 Adding net device
2158 18:57:33.281070
2159 18:57:33.585606 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2160 18:57:33.585809
2161 18:57:33.585955
2162 18:57:33.586055
2163 18:57:33.589241 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 18:57:33.690038 volteer: tftpboot 192.168.201.1 8815423/tftp-deploy-wgxs2uzo/kernel/bzImage 8815423/tftp-deploy-wgxs2uzo/kernel/cmdline 8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
2166 18:57:33.690268 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 18:57:33.690394 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2168 18:57:33.694925 tftpboot 192.168.201.1 8815423/tftp-deploy-wgxs2uzo/kernel/bzImoy-wgxs2uzo/kernel/cmdline 8815423/tftp-deploy-wgxs2uzo/ramdisk/ramdisk.cpio.gz
2169 18:57:33.695028
2170 18:57:33.695098 Waiting for link
2171 18:57:33.695163
2172 18:57:33.897500 done.
2173 18:57:33.897670
2174 18:57:33.897744 MAC: 00:24:32:30:7a:04
2175 18:57:33.897809
2176 18:57:33.900450 Sending DHCP discover... done.
2177 18:57:33.900527
2178 18:57:33.904023 Waiting for reply... done.
2179 18:57:33.904146
2180 18:57:33.906983 Sending DHCP request... done.
2181 18:57:33.907077
2182 18:57:33.910265 Waiting for reply... done.
2183 18:57:33.910356
2184 18:57:33.913759 My ip is 192.168.201.22
2185 18:57:33.913849
2186 18:57:33.916959 The DHCP server ip is 192.168.201.1
2187 18:57:33.917063
2188 18:57:33.920322 TFTP server IP predefined by user: 192.168.201.1
2189 18:57:33.920411
2190 18:57:33.927286 Bootfile predefined by user: 8815423/tftp-deploy-wgxs2uzo/kernel/bzImage
2191 18:57:33.927389
2192 18:57:33.930012 Sending tftp read request... done.
2193 18:57:33.930107
2194 18:57:33.936844 Waiting for the transfer...
2195 18:57:33.936976
2196 18:57:34.490862 00000000 ################################################################
2197 18:57:34.491030
2198 18:57:35.023280 00080000 ################################################################
2199 18:57:35.023438
2200 18:57:35.565234 00100000 ################################################################
2201 18:57:35.565389
2202 18:57:36.111872 00180000 ################################################################
2203 18:57:36.112084
2204 18:57:36.666009 00200000 ################################################################
2205 18:57:36.666164
2206 18:57:37.218929 00280000 ################################################################
2207 18:57:37.219086
2208 18:57:37.798953 00300000 ################################################################
2209 18:57:37.799108
2210 18:57:38.368102 00380000 ################################################################
2211 18:57:38.368259
2212 18:57:38.948517 00400000 ################################################################
2213 18:57:38.948677
2214 18:57:39.556647 00480000 ################################################################
2215 18:57:39.556801
2216 18:57:40.137743 00500000 ################################################################
2217 18:57:40.137905
2218 18:57:40.735557 00580000 ################################################################
2219 18:57:40.735763
2220 18:57:41.309511 00600000 ################################################################
2221 18:57:41.309684
2222 18:57:41.873615 00680000 ################################################################
2223 18:57:41.873769
2224 18:57:42.449800 00700000 ################################################################
2225 18:57:42.449969
2226 18:57:43.025766 00780000 ################################################################
2227 18:57:43.025933
2228 18:57:43.599429 00800000 ################################################################
2229 18:57:43.599600
2230 18:57:44.198979 00880000 ################################################################
2231 18:57:44.199134
2232 18:57:44.503652 00900000 ################################## done.
2233 18:57:44.503815
2234 18:57:44.506988 The bootfile was 9711616 bytes long.
2235 18:57:44.507101
2236 18:57:44.510372 Sending tftp read request... done.
2237 18:57:44.510477
2238 18:57:44.513448 Waiting for the transfer...
2239 18:57:44.513558
2240 18:57:45.090596 00000000 ################################################################
2241 18:57:45.090785
2242 18:57:45.675148 00080000 ################################################################
2243 18:57:45.675289
2244 18:57:46.251567 00100000 ################################################################
2245 18:57:46.251708
2246 18:57:46.834931 00180000 ################################################################
2247 18:57:46.835077
2248 18:57:47.413641 00200000 ################################################################
2249 18:57:47.413799
2250 18:57:47.992965 00280000 ################################################################
2251 18:57:47.993115
2252 18:57:48.574597 00300000 ################################################################
2253 18:57:48.574745
2254 18:57:49.138956 00380000 ################################################################
2255 18:57:49.139111
2256 18:57:49.667045 00400000 ################################################################
2257 18:57:49.667199
2258 18:57:50.186391 00480000 ################################################################
2259 18:57:50.186558
2260 18:57:50.743027 00500000 ################################################################
2261 18:57:50.743178
2262 18:57:51.288177 00580000 ################################################################
2263 18:57:51.288328
2264 18:57:51.854657 00600000 ################################################################
2265 18:57:51.854816
2266 18:57:52.421232 00680000 ################################################################
2267 18:57:52.421387
2268 18:57:52.991891 00700000 ################################################################
2269 18:57:52.992032
2270 18:57:53.556590 00780000 ################################################################
2271 18:57:53.556744
2272 18:57:53.767688 00800000 ######################## done.
2273 18:57:53.767828
2274 18:57:53.771216 Sending tftp read request... done.
2275 18:57:53.771299
2276 18:57:53.774298 Waiting for the transfer...
2277 18:57:53.774377
2278 18:57:53.774443 00000000 # done.
2279 18:57:53.774506
2280 18:57:53.784455 Command line loaded dynamically from TFTP file: 8815423/tftp-deploy-wgxs2uzo/kernel/cmdline
2281 18:57:53.784545
2282 18:57:53.797531 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2283 18:57:53.797621
2284 18:57:53.804648 Shutting down all USB controllers.
2285 18:57:53.804732
2286 18:57:53.804801 Removing current net device
2287 18:57:53.804863
2288 18:57:53.808332 Finalizing coreboot
2289 18:57:53.808414
2290 18:57:53.814831 Exiting depthcharge with code 4 at timestamp: 30310966
2291 18:57:53.814915
2292 18:57:53.814983
2293 18:57:53.815045 Starting kernel ...
2294 18:57:53.815107
2295 18:57:53.815167
2296 18:57:53.815545 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2297 18:57:53.815645 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2298 18:57:53.815725 Setting prompt string to ['Linux version [0-9]']
2299 18:57:53.815800 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2300 18:57:53.815872 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2301 18:57:53.817986
2303 19:02:15.816664 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2305 19:02:15.818039 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2307 19:02:15.818982 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2310 19:02:15.820815 end: 2 depthcharge-action (duration 00:05:00) [common]
2312 19:02:15.821702 Cleaning after the job
2313 19:02:15.821788 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/ramdisk
2314 19:02:15.822412 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/kernel
2315 19:02:15.823065 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815423/tftp-deploy-wgxs2uzo/modules
2316 19:02:15.823254 start: 5.1 power-off (timeout 00:00:30) [common]
2317 19:02:15.823401 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2318 19:02:15.843043 >> Command sent successfully.
2319 19:02:15.845023 Returned 0 in 0 seconds
2320 19:02:15.946011 end: 5.1 power-off (duration 00:00:00) [common]
2322 19:02:15.947649 start: 5.2 read-feedback (timeout 00:10:00) [common]
2323 19:02:15.949027 Listened to connection for namespace 'common' for up to 1s
2324 19:02:16.953752 Finalising connection for namespace 'common'
2325 19:02:16.954565 Disconnecting from shell: Finalise
2326 19:02:17.056116 end: 5.2 read-feedback (duration 00:00:01) [common]
2327 19:02:17.056852 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8815423
2328 19:02:17.083227 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8815423
2329 19:02:17.083949 JobError: Your job cannot terminate cleanly.