Boot log: acer-cb317-1h-c3z6-dedede

    1 18:57:12.552926  lava-dispatcher, installed at version: 2022.11
    2 18:57:12.553115  start: 0 validate
    3 18:57:12.553248  Start time: 2023-01-21 18:57:12.553241+00:00 (UTC)
    4 18:57:12.553376  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:57:12.553508  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
    6 18:57:12.556614  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:57:12.556744  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:57:14.567082  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:57:14.567256  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 18:57:14.858634  Using caching service: 'http://localhost/cache/?uri=%s'
   11 18:57:14.858814  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 18:57:14.866294  validate duration: 2.31
   14 18:57:14.866646  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 18:57:14.866806  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 18:57:14.866945  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 18:57:14.867059  Not decompressing ramdisk as can be used compressed.
   18 18:57:14.867163  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
   19 18:57:14.867267  saving as /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/ramdisk/initrd.cpio.gz
   20 18:57:14.867348  total size: 5432135 (5MB)
   21 18:57:14.869899  progress   0% (0MB)
   22 18:57:14.875080  progress   5% (0MB)
   23 18:57:14.879169  progress  10% (0MB)
   24 18:57:14.883733  progress  15% (0MB)
   25 18:57:14.888901  progress  20% (1MB)
   26 18:57:14.892938  progress  25% (1MB)
   27 18:57:14.898334  progress  30% (1MB)
   28 18:57:14.902366  progress  35% (1MB)
   29 18:57:14.907332  progress  40% (2MB)
   30 18:57:14.911535  progress  45% (2MB)
   31 18:57:14.916205  progress  50% (2MB)
   32 18:57:14.921158  progress  55% (2MB)
   33 18:57:14.925360  progress  60% (3MB)
   34 18:57:14.930210  progress  65% (3MB)
   35 18:57:14.936705  progress  70% (3MB)
   36 18:57:14.943811  progress  75% (3MB)
   37 18:57:14.949572  progress  80% (4MB)
   38 18:57:14.956595  progress  85% (4MB)
   39 18:57:14.963968  progress  90% (4MB)
   40 18:57:14.971469  progress  95% (4MB)
   41 18:57:14.977101  progress 100% (5MB)
   42 18:57:14.977418  5MB downloaded in 0.11s (47.07MB/s)
   43 18:57:14.977586  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 18:57:14.977838  end: 1.1 download-retry (duration 00:00:00) [common]
   46 18:57:14.977930  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 18:57:14.978019  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 18:57:14.978142  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 18:57:14.978213  saving as /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/kernel/bzImage
   50 18:57:14.978277  total size: 9711616 (9MB)
   51 18:57:14.978340  No compression specified
   52 18:57:14.986690  progress   0% (0MB)
   53 18:57:15.004327  progress   5% (0MB)
   54 18:57:15.017908  progress  10% (0MB)
   55 18:57:15.030777  progress  15% (1MB)
   56 18:57:15.041895  progress  20% (1MB)
   57 18:57:15.054564  progress  25% (2MB)
   58 18:57:15.067196  progress  30% (2MB)
   59 18:57:15.078867  progress  35% (3MB)
   60 18:57:15.091370  progress  40% (3MB)
   61 18:57:15.104908  progress  45% (4MB)
   62 18:57:15.117699  progress  50% (4MB)
   63 18:57:15.130376  progress  55% (5MB)
   64 18:57:15.139617  progress  60% (5MB)
   65 18:57:15.151356  progress  65% (6MB)
   66 18:57:15.165000  progress  70% (6MB)
   67 18:57:15.176866  progress  75% (6MB)
   68 18:57:15.190536  progress  80% (7MB)
   69 18:57:15.202234  progress  85% (7MB)
   70 18:57:15.213919  progress  90% (8MB)
   71 18:57:15.227398  progress  95% (8MB)
   72 18:57:15.237775  progress 100% (9MB)
   73 18:57:15.238027  9MB downloaded in 0.26s (35.66MB/s)
   74 18:57:15.238197  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 18:57:15.238443  end: 1.2 download-retry (duration 00:00:00) [common]
   77 18:57:15.238533  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 18:57:15.238620  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 18:57:15.238734  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
   80 18:57:15.238801  saving as /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/nfsrootfs/full.rootfs.tar
   81 18:57:15.238866  total size: 133346544 (127MB)
   82 18:57:15.238928  Using unxz to decompress xz
   83 18:57:15.248995  progress   0% (0MB)
   84 18:57:15.592842  progress   5% (6MB)
   85 18:57:15.965072  progress  10% (12MB)
   86 18:57:16.267692  progress  15% (19MB)
   87 18:57:16.484227  progress  20% (25MB)
   88 18:57:16.737515  progress  25% (31MB)
   89 18:57:17.088403  progress  30% (38MB)
   90 18:57:17.450195  progress  35% (44MB)
   91 18:57:17.854958  progress  40% (50MB)
   92 18:57:18.245280  progress  45% (57MB)
   93 18:57:18.606730  progress  50% (63MB)
   94 18:57:18.989350  progress  55% (69MB)
   95 18:57:19.359674  progress  60% (76MB)
   96 18:57:19.732718  progress  65% (82MB)
   97 18:57:20.129376  progress  70% (89MB)
   98 18:57:20.515700  progress  75% (95MB)
   99 18:57:20.979899  progress  80% (101MB)
  100 18:57:21.432003  progress  85% (108MB)
  101 18:57:21.702753  progress  90% (114MB)
  102 18:57:22.055992  progress  95% (120MB)
  103 18:57:22.459549  progress 100% (127MB)
  104 18:57:22.465229  127MB downloaded in 7.23s (17.60MB/s)
  105 18:57:22.465556  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 18:57:22.465886  end: 1.3 download-retry (duration 00:00:07) [common]
  108 18:57:22.465988  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 18:57:22.466089  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 18:57:22.466215  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 18:57:22.466288  saving as /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/modules/modules.tar
  112 18:57:22.466353  total size: 64624 (0MB)
  113 18:57:22.466435  Using unxz to decompress xz
  114 18:57:22.785370  progress  50% (0MB)
  115 18:57:22.793000  progress 100% (0MB)
  116 18:57:22.795619  0MB downloaded in 0.33s (0.19MB/s)
  117 18:57:22.795912  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 18:57:22.796188  end: 1.4 download-retry (duration 00:00:00) [common]
  120 18:57:22.796285  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 18:57:22.796385  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 18:57:24.049051  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8815438/extract-nfsrootfs-66m8w9bn
  123 18:57:24.049261  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 18:57:24.049371  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  125 18:57:24.049507  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1
  126 18:57:24.049609  makedir: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin
  127 18:57:24.049693  makedir: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/tests
  128 18:57:24.049774  makedir: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/results
  129 18:57:24.049871  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-add-keys
  130 18:57:24.050002  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-add-sources
  131 18:57:24.050408  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-background-process-start
  132 18:57:24.050530  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-background-process-stop
  133 18:57:24.050642  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-common-functions
  134 18:57:24.050753  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-echo-ipv4
  135 18:57:24.050865  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-install-packages
  136 18:57:24.050973  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-installed-packages
  137 18:57:24.051081  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-os-build
  138 18:57:24.051188  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-probe-channel
  139 18:57:24.051295  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-probe-ip
  140 18:57:24.051400  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-target-ip
  141 18:57:24.051506  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-target-mac
  142 18:57:24.051612  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-target-storage
  143 18:57:24.051720  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-case
  144 18:57:24.051828  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-event
  145 18:57:24.051934  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-feedback
  146 18:57:24.052038  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-raise
  147 18:57:24.052143  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-reference
  148 18:57:24.052248  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-runner
  149 18:57:24.052354  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-set
  150 18:57:24.052458  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-test-shell
  151 18:57:24.052565  Updating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-install-packages (oe)
  152 18:57:24.052674  Updating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/bin/lava-installed-packages (oe)
  153 18:57:24.052767  Creating /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/environment
  154 18:57:24.052850  LAVA metadata
  155 18:57:24.052913  - LAVA_JOB_ID=8815438
  156 18:57:24.052976  - LAVA_DISPATCHER_IP=192.168.201.1
  157 18:57:24.053072  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  158 18:57:24.053135  skipped lava-vland-overlay
  159 18:57:24.053210  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 18:57:24.053289  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  161 18:57:24.053350  skipped lava-multinode-overlay
  162 18:57:24.053423  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 18:57:24.053503  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  164 18:57:24.053572  Loading test definitions
  165 18:57:24.053661  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  166 18:57:24.053737  Using /lava-8815438 at stage 0
  167 18:57:24.053991  uuid=8815438_1.5.2.3.1 testdef=None
  168 18:57:24.054120  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 18:57:24.054208  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  170 18:57:24.054674  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 18:57:24.054901  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  173 18:57:24.055445  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 18:57:24.055798  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  176 18:57:24.056381  runner path: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/0/tests/0_dmesg test_uuid 8815438_1.5.2.3.1
  177 18:57:24.056527  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 18:57:24.056756  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  180 18:57:24.056830  Using /lava-8815438 at stage 1
  181 18:57:24.057128  uuid=8815438_1.5.2.3.5 testdef=None
  182 18:57:24.057216  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 18:57:24.057303  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  184 18:57:24.057803  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 18:57:24.058118  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  187 18:57:24.058740  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 18:57:24.059006  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  190 18:57:24.059589  runner path: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/1/tests/1_bootrr test_uuid 8815438_1.5.2.3.5
  191 18:57:24.059741  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 18:57:24.059956  Creating lava-test-runner.conf files
  194 18:57:24.060021  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/0 for stage 0
  195 18:57:24.060101  - 0_dmesg
  196 18:57:24.060174  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815438/lava-overlay-r3r6mae1/lava-8815438/1 for stage 1
  197 18:57:24.060255  - 1_bootrr
  198 18:57:24.060344  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 18:57:24.060429  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  200 18:57:24.066067  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 18:57:24.066176  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  202 18:57:24.066272  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 18:57:24.066366  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 18:57:24.066455  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  205 18:57:24.173024  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 18:57:24.173420  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  207 18:57:24.173540  extracting modules file /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815438/extract-nfsrootfs-66m8w9bn
  208 18:57:24.177615  extracting modules file /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815438/extract-overlay-ramdisk-w8chbu8s/ramdisk
  209 18:57:24.182248  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 18:57:24.182411  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  211 18:57:24.182507  [common] Applying overlay to NFS
  212 18:57:24.182593  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815438/compress-overlay-q7w54ibj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8815438/extract-nfsrootfs-66m8w9bn
  213 18:57:24.186506  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 18:57:24.186621  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  215 18:57:24.186718  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 18:57:24.186815  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  217 18:57:24.186897  Building ramdisk /var/lib/lava/dispatcher/tmp/8815438/extract-overlay-ramdisk-w8chbu8s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8815438/extract-overlay-ramdisk-w8chbu8s/ramdisk
  218 18:57:24.221406  >> 24777 blocks

  219 18:57:24.718759  rename /var/lib/lava/dispatcher/tmp/8815438/extract-overlay-ramdisk-w8chbu8s/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
  220 18:57:24.719160  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 18:57:24.719291  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  222 18:57:24.719402  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  223 18:57:24.719509  No mkimage arch provided, not using FIT.
  224 18:57:24.719604  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 18:57:24.719691  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 18:57:24.719792  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 18:57:24.719890  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  228 18:57:24.719972  No LXC device requested
  229 18:57:24.720053  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 18:57:24.720143  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  231 18:57:24.720230  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 18:57:24.720301  Checking files for TFTP limit of 4294967296 bytes.
  233 18:57:24.720685  end: 1 tftp-deploy (duration 00:00:10) [common]
  234 18:57:24.720794  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 18:57:24.720889  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 18:57:24.721026  substitutions:
  237 18:57:24.721099  - {DTB}: None
  238 18:57:24.721167  - {INITRD}: 8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
  239 18:57:24.721232  - {KERNEL}: 8815438/tftp-deploy-3dwy96ri/kernel/bzImage
  240 18:57:24.721295  - {LAVA_MAC}: None
  241 18:57:24.721356  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8815438/extract-nfsrootfs-66m8w9bn
  242 18:57:24.721417  - {NFS_SERVER_IP}: 192.168.201.1
  243 18:57:24.721476  - {PRESEED_CONFIG}: None
  244 18:57:24.721533  - {PRESEED_LOCAL}: None
  245 18:57:24.721591  - {RAMDISK}: 8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
  246 18:57:24.721649  - {ROOT_PART}: None
  247 18:57:24.721705  - {ROOT}: None
  248 18:57:24.721762  - {SERVER_IP}: 192.168.201.1
  249 18:57:24.721819  - {TEE}: None
  250 18:57:24.721876  Parsed boot commands:
  251 18:57:24.721933  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 18:57:24.722102  Parsed boot commands: tftpboot 192.168.201.1 8815438/tftp-deploy-3dwy96ri/kernel/bzImage 8815438/tftp-deploy-3dwy96ri/kernel/cmdline 8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
  253 18:57:24.722199  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 18:57:24.722292  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 18:57:24.722385  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 18:57:24.722472  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 18:57:24.722547  Not connected, no need to disconnect.
  258 18:57:24.722627  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 18:57:24.722711  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 18:57:24.722786  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
  261 18:57:24.725569  Setting prompt string to ['lava-test: # ']
  262 18:57:24.725869  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 18:57:24.725982  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 18:57:24.726094  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 18:57:24.726190  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 18:57:24.726380  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
  267 18:57:24.746706  >> Command sent successfully.

  268 18:57:24.748734  Returned 0 in 0 seconds
  269 18:57:24.849524  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  271 18:57:24.849952  end: 2.2.2 reset-device (duration 00:00:00) [common]
  272 18:57:24.850080  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  273 18:57:24.850202  Setting prompt string to 'Starting depthcharge on Magolor...'
  274 18:57:24.850285  Changing prompt to 'Starting depthcharge on Magolor...'
  275 18:57:24.850390  depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
  276 18:57:24.850725  [Enter `^Ec?' for help]
  277 18:57:32.191002  
  278 18:57:32.191155  
  279 18:57:32.201777  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
  280 18:57:32.204810  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
  281 18:57:32.208311  CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
  282 18:57:32.214990  CPU: AES supported, TXT NOT supported, VT supported
  283 18:57:32.217857  MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
  284 18:57:32.224446  PCH: device id 4d87 (rev 01) is Jasperlake Super
  285 18:57:32.227787  IGD: device id 4e55 (rev 01) is Jasperlake GT4
  286 18:57:32.231354  VBOOT: Loading verstage.
  287 18:57:32.238148  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  288 18:57:32.241965  FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
  289 18:57:32.248168  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  290 18:57:32.251529  CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
  291 18:57:32.255169  
  292 18:57:32.255255  
  293 18:57:32.265339  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
  294 18:57:32.279441  Probing TPM: . done!
  295 18:57:32.282975  TPM ready after 0 ms
  296 18:57:32.286989  Connected to device vid:did:rid of 1ae0:0028:00
  297 18:57:32.296768  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
  298 18:57:32.303897  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  299 18:57:32.306936  Initialized TPM device CR50 revision 0
  300 18:57:32.366299  tlcl_send_startup: Startup return code is 0
  301 18:57:32.366460  TPM: setup succeeded
  302 18:57:32.382651  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  303 18:57:32.398382  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  304 18:57:32.405829  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  305 18:57:32.410481  
  306 18:57:32.420085  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  307 18:57:32.423657  Chrome EC: UHEPI supported
  308 18:57:32.427216  Phase 1
  309 18:57:32.430163  FMAP: area GBB found @ c05000 (12288 bytes)
  310 18:57:32.436564  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  311 18:57:32.443557  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  312 18:57:32.446580  Recovery requested (1009000e)
  313 18:57:32.456072  TPM: Extending digest for VBOOT: boot mode into PCR 0
  314 18:57:32.462585  tlcl_extend: response is 0
  315 18:57:32.469603  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  316 18:57:32.478504  tlcl_extend: response is 0
  317 18:57:32.485365  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  318 18:57:32.488520  CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
  319 18:57:32.494863  BS: verstage times (exec / console): total (unknown) / 124 ms
  320 18:57:32.498660  
  321 18:57:32.498761  
  322 18:57:32.508324  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
  323 18:57:32.514758  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  324 18:57:32.518246  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  325 18:57:32.521400  gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
  326 18:57:32.528471  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  327 18:57:32.531480  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  328 18:57:32.534922  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  329 18:57:32.538353  TCO_STS:   0000 0001
  330 18:57:32.541258  GEN_PMCON: d0015038 00002200
  331 18:57:32.544819  GBLRST_CAUSE: 00000000 00000000
  332 18:57:32.544941  prev_sleep_state 5
  333 18:57:32.548456  Boot Count incremented to 11169
  334 18:57:32.555527  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  335 18:57:32.558681  CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
  336 18:57:32.562951  Chrome EC: UHEPI supported
  337 18:57:32.569695  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
  338 18:57:32.575693  Probing TPM:  done!
  339 18:57:32.582844  Connected to device vid:did:rid of 1ae0:0028:00
  340 18:57:32.592244  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
  341 18:57:32.595714  Initialized TPM device CR50 revision 0
  342 18:57:32.609967  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  343 18:57:32.616669  MRC: Hash idx 0x100b comparison successful.
  344 18:57:32.619749  MRC cache found, size 5458
  345 18:57:32.619840  bootmode is set to: 2
  346 18:57:32.623502  SPD INDEX = 0
  347 18:57:32.626414  CBFS: Found 'spd.bin' @0x40c40 size 0x600
  348 18:57:32.629854  SPD: module type is LPDDR4X
  349 18:57:32.636213  SPD: module part number is MT53E512M32D2NP-046 WT:E
  350 18:57:32.643255  SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
  351 18:57:32.646582  SPD: device width 16 bits, bus width 32 bits
  352 18:57:32.649526  SPD: module size is 4096 MB (per channel)
  353 18:57:32.652723  meminit_channels: DRAM half-populated
  354 18:57:32.735669  CBMEM:
  355 18:57:32.739119  IMD: root @ 0x76fff000 254 entries.
  356 18:57:32.742557  IMD: root @ 0x76ffec00 62 entries.
  357 18:57:32.745443  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  358 18:57:32.752309  WARNING: RO_VPD is uninitialized or empty.
  359 18:57:32.755090  FMAP: area RW_VPD found @ bfc000 (8192 bytes)
  360 18:57:32.758940  External stage cache:
  361 18:57:32.762663  IMD: root @ 0x7b3ff000 254 entries.
  362 18:57:32.766172  IMD: root @ 0x7b3fec00 62 entries.
  363 18:57:32.775701  FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
  364 18:57:32.782057  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  365 18:57:32.789082  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
  366 18:57:32.797244  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  367 18:57:32.800377  cse_lite: Skip switching to RW in the recovery path
  368 18:57:32.803812  
  369 18:57:32.803902  1 DIMMs found
  370 18:57:32.803973  SMM Memory Map
  371 18:57:32.806904  SMRAM       : 0x7b000000 0x800000
  372 18:57:32.810483   Subregion 0: 0x7b000000 0x200000
  373 18:57:32.813615  
  374 18:57:32.817223   Subregion 1: 0x7b200000 0x200000
  375 18:57:32.820585   Subregion 2: 0x7b400000 0x400000
  376 18:57:32.820677  top_of_ram = 0x77000000
  377 18:57:32.826779  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  378 18:57:32.833333  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  379 18:57:32.836752  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  380 18:57:32.843204  CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
  381 18:57:32.846666  Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
  382 18:57:32.849982  
  383 18:57:32.860380  Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
  384 18:57:32.863150  Processing 188 relocs. Offset value of 0x74c0e000
  385 18:57:32.872635  BS: romstage times (exec / console): total (unknown) / 255 ms
  386 18:57:32.876760  
  387 18:57:32.876877  
  388 18:57:32.886611  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
  389 18:57:32.893426  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  390 18:57:32.896832  CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
  391 18:57:32.903387  Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
  392 18:57:32.959562  Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
  393 18:57:32.966069  Processing 4805 relocs. Offset value of 0x75da8000
  394 18:57:32.969271  BS: postcar times (exec / console): total (unknown) / 42 ms
  395 18:57:32.972781  
  396 18:57:32.972888  
  397 18:57:32.982635  coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
  398 18:57:32.982786  Normal boot
  399 18:57:32.986612  EC returned error result code 3
  400 18:57:32.989590  FW_CONFIG value is 0x204
  401 18:57:32.993317  GENERIC: 0.0 disabled by fw_config
  402 18:57:32.999656  fw_config match found: TS_SOURCE=TS_UNPROVISIONED
  403 18:57:33.003264  I2C: 00:10 disabled by fw_config
  404 18:57:33.006261  I2C: 00:10 disabled by fw_config
  405 18:57:33.009835  fw_config match found: TS_SOURCE=TS_UNPROVISIONED
  406 18:57:33.016375  fw_config match found: TS_SOURCE=TS_UNPROVISIONED
  407 18:57:33.019472  fw_config match found: TS_SOURCE=TS_UNPROVISIONED
  408 18:57:33.026629  fw_config match found: TS_SOURCE=TS_UNPROVISIONED
  409 18:57:33.030104  fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
  410 18:57:33.033728  I2C: 00:10 disabled by fw_config
  411 18:57:33.040194  fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
  412 18:57:33.047165  fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
  413 18:57:33.050224  I2C: 00:1a disabled by fw_config
  414 18:57:33.053531  I2C: 00:1a disabled by fw_config
  415 18:57:33.056651  fw_config match found: AUDIO_AMP=UNPROVISIONED
  416 18:57:33.063705  fw_config match found: AUDIO_AMP=UNPROVISIONED
  417 18:57:33.066718  GENERIC: 0.0 disabled by fw_config
  418 18:57:33.070262  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  419 18:57:33.076632  CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
  420 18:57:33.082949  microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
  421 18:57:33.086522  microcode: Update skipped, already up-to-date
  422 18:57:33.089420  CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
  423 18:57:33.118688  Detected 2 core, 2 thread CPU.
  424 18:57:33.121615  Setting up SMI for CPU
  425 18:57:33.124709  IED base = 0x7b400000
  426 18:57:33.124807  IED size = 0x00400000
  427 18:57:33.128024  Will perform SMM setup.
  428 18:57:33.131766  CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
  429 18:57:33.141472  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  430 18:57:33.144825  Processing 16 relocs. Offset value of 0x00030000
  431 18:57:33.148397  Attempting to start 1 APs
  432 18:57:33.151932  Waiting for 10ms after sending INIT.
  433 18:57:33.168162  Waiting for 1st SIPI to complete...done.
  434 18:57:33.168308  AP: slot 1 apic_id 2.
  435 18:57:33.174614  Waiting for 2nd SIPI to complete...done.
  436 18:57:33.181638  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  437 18:57:33.188144  Processing 13 relocs. Offset value of 0x00038000
  438 18:57:33.188265  Unable to locate Global NVS
  439 18:57:33.197990  SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
  440 18:57:33.200867  Installing permanent SMM handler to 0x7b000000
  441 18:57:33.211182  Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
  442 18:57:33.214262  Processing 704 relocs. Offset value of 0x7b010000
  443 18:57:33.221541  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  444 18:57:33.224346  
  445 18:57:33.227460  Processing 13 relocs. Offset value of 0x7b008000
  446 18:57:33.234484  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  447 18:57:33.237437  Unable to locate Global NVS
  448 18:57:33.243816  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
  449 18:57:33.247334  Clearing SMI status registers
  450 18:57:33.247436  SMI_STS: PM1 
  451 18:57:33.250819  PM1_STS: PWRBTN 
  452 18:57:33.250914  TCO_STS: INTRD_DET 
  453 18:57:33.260704  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  454 18:57:33.260854  In relocation handler: CPU 0
  455 18:57:33.264231  
  456 18:57:33.267024  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  457 18:57:33.270590  Writing SMRR. base = 0x7b000006, mask=0xff800800
  458 18:57:33.274194  Relocation complete.
  459 18:57:33.280808  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  460 18:57:33.284222  In relocation handler: CPU 1
  461 18:57:33.287128  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  462 18:57:33.293936  Writing SMRR. base = 0x7b000006, mask=0xff800800
  463 18:57:33.294109  Relocation complete.
  464 18:57:33.297454  Initializing CPU #0
  465 18:57:33.300482  CPU: vendor Intel device 906c0
  466 18:57:33.303986  CPU: family 06, model 9c, stepping 00
  467 18:57:33.306970  Clearing out pending MCEs
  468 18:57:33.310454  Setting up local APIC...
  469 18:57:33.310586   apic_id: 0x00 done.
  470 18:57:33.313387  Turbo is available but hidden
  471 18:57:33.317009  Turbo is available and visible
  472 18:57:33.323714  microcode: Update skipped, already up-to-date
  473 18:57:33.323851  CPU #0 initialized
  474 18:57:33.326654  Initializing CPU #1
  475 18:57:33.330237  CPU: vendor Intel device 906c0
  476 18:57:33.333230  CPU: family 06, model 9c, stepping 00
  477 18:57:33.336803  Clearing out pending MCEs
  478 18:57:33.336898  Setting up local APIC...
  479 18:57:33.339784  
  480 18:57:33.339874   apic_id: 0x02 done.
  481 18:57:33.346427  microcode: Update skipped, already up-to-date
  482 18:57:33.346565  CPU #1 initialized
  483 18:57:33.349932  bsp_do_flight_plan done after 173 msecs.
  484 18:57:33.353362  CPU: frequency set to 2800 MHz
  485 18:57:33.356253  Enabling SMIs.
  486 18:57:33.363178  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
  487 18:57:33.372562  Probing TPM:  done!
  488 18:57:33.379086  Connected to device vid:did:rid of 1ae0:0028:00
  489 18:57:33.388545  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
  490 18:57:33.392115  Initialized TPM device CR50 revision 0
  491 18:57:33.395209  CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
  492 18:57:33.402627  Found a VBT of 7680 bytes after decompression
  493 18:57:33.409154  WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
  494 18:57:33.444387  Detected 2 core, 2 thread CPU.
  495 18:57:33.447305  Detected 2 core, 2 thread CPU.
  496 18:57:33.810461  Display FSP Version Info HOB
  497 18:57:33.814031  Reference Code - CPU = 8.7.22.30
  498 18:57:33.817473  uCode Version = 24.0.0.1f
  499 18:57:33.820397  TXT ACM version = ff.ff.ff.ffff
  500 18:57:33.824103  Reference Code - ME = 8.7.22.30
  501 18:57:33.827117  MEBx version = 0.0.0.0
  502 18:57:33.830710  ME Firmware Version = Consumer SKU
  503 18:57:33.833784  Reference Code - PCH = 8.7.22.30
  504 18:57:33.837346  PCH-CRID Status = Disabled
  505 18:57:33.840489  PCH-CRID Original Value = ff.ff.ff.ffff
  506 18:57:33.844048  PCH-CRID New Value = ff.ff.ff.ffff
  507 18:57:33.847104  OPROM - RST - RAID = ff.ff.ff.ffff
  508 18:57:33.850635  PCH Hsio Version = 4.0.0.0
  509 18:57:33.853597  Reference Code - SA - System Agent = 8.7.22.30
  510 18:57:33.857092  Reference Code - MRC = 0.0.4.68
  511 18:57:33.860819  SA - PCIe Version = 8.7.22.30
  512 18:57:33.863423  SA-CRID Status = Disabled
  513 18:57:33.867034  SA-CRID Original Value = 0.0.0.0
  514 18:57:33.870532  SA-CRID New Value = 0.0.0.0
  515 18:57:33.873464  OPROM - VBIOS = ff.ff.ff.ffff
  516 18:57:33.876995  IO Manageability Engine FW Version = ff.ff.ff.ffff
  517 18:57:33.880648  PHY Build Version = ff.ff.ff.ffff
  518 18:57:33.886903  Thunderbolt(TM) FW Version = ff.ff.ff.ffff
  519 18:57:33.889959  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  520 18:57:33.893603  ITSS IRQ Polarities Before:
  521 18:57:33.896910  IPC0: 0xffffffff
  522 18:57:33.897020  IPC1: 0xffffffff
  523 18:57:33.899971  IPC2: 0xffffffff
  524 18:57:33.900068  IPC3: 0xffffffff
  525 18:57:33.903631  ITSS IRQ Polarities After:
  526 18:57:33.906532  IPC0: 0xffffffff
  527 18:57:33.906620  IPC1: 0xffffffff
  528 18:57:33.909902  IPC2: 0xffffffff
  529 18:57:33.909987  IPC3: 0xffffffff
  530 18:57:33.923141  pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
  531 18:57:33.929710  BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
  532 18:57:33.929820  Enumerating buses...
  533 18:57:33.933368  
  534 18:57:33.936159  Show all devs... Before device enumeration.
  535 18:57:33.939661  Root Device: enabled 1
  536 18:57:33.939768  CPU_CLUSTER: 0: enabled 1
  537 18:57:33.942804  DOMAIN: 0000: enabled 1
  538 18:57:33.946320  PCI: 00:00.0: enabled 1
  539 18:57:33.949455  PCI: 00:02.0: enabled 1
  540 18:57:33.949543  PCI: 00:04.0: enabled 1
  541 18:57:33.952998  PCI: 00:05.0: enabled 1
  542 18:57:33.956440  PCI: 00:09.0: enabled 0
  543 18:57:33.956523  PCI: 00:12.6: enabled 0
  544 18:57:33.959459  PCI: 00:14.0: enabled 1
  545 18:57:33.962739  PCI: 00:14.1: enabled 0
  546 18:57:33.966348  PCI: 00:14.2: enabled 0
  547 18:57:33.966434  PCI: 00:14.3: enabled 1
  548 18:57:33.969446  PCI: 00:14.5: enabled 1
  549 18:57:33.972822  PCI: 00:15.0: enabled 1
  550 18:57:33.976464  PCI: 00:15.1: enabled 1
  551 18:57:33.976549  PCI: 00:15.2: enabled 1
  552 18:57:33.979431  PCI: 00:15.3: enabled 1
  553 18:57:33.982973  PCI: 00:16.0: enabled 1
  554 18:57:33.985710  PCI: 00:16.1: enabled 0
  555 18:57:33.985791  PCI: 00:16.4: enabled 0
  556 18:57:33.989306  PCI: 00:16.5: enabled 0
  557 18:57:33.992356  PCI: 00:17.0: enabled 0
  558 18:57:33.992445  PCI: 00:19.0: enabled 1
  559 18:57:33.995775  
  560 18:57:33.995864  PCI: 00:19.1: enabled 0
  561 18:57:33.999159  PCI: 00:19.2: enabled 1
  562 18:57:34.002274  PCI: 00:1a.0: enabled 1
  563 18:57:34.002360  PCI: 00:1c.0: enabled 0
  564 18:57:34.005665  PCI: 00:1c.1: enabled 0
  565 18:57:34.009134  PCI: 00:1c.2: enabled 0
  566 18:57:34.012240  PCI: 00:1c.3: enabled 0
  567 18:57:34.012331  PCI: 00:1c.4: enabled 0
  568 18:57:34.015718  PCI: 00:1c.5: enabled 0
  569 18:57:34.018699  PCI: 00:1c.6: enabled 0
  570 18:57:34.022039  PCI: 00:1c.7: enabled 1
  571 18:57:34.022165  PCI: 00:1e.0: enabled 0
  572 18:57:34.025930  PCI: 00:1e.1: enabled 0
  573 18:57:34.028849  PCI: 00:1e.2: enabled 1
  574 18:57:34.032512  PCI: 00:1e.3: enabled 0
  575 18:57:34.032601  PCI: 00:1f.0: enabled 1
  576 18:57:34.035535  PCI: 00:1f.1: enabled 1
  577 18:57:34.038539  PCI: 00:1f.2: enabled 1
  578 18:57:34.038626  PCI: 00:1f.3: enabled 1
  579 18:57:34.042178  PCI: 00:1f.4: enabled 0
  580 18:57:34.045119  PCI: 00:1f.5: enabled 1
  581 18:57:34.048713  PCI: 00:1f.7: enabled 0
  582 18:57:34.048814  GENERIC: 0.0: enabled 1
  583 18:57:34.052346  GENERIC: 0.0: enabled 1
  584 18:57:34.055272  USB0 port 0: enabled 1
  585 18:57:34.058609  GENERIC: 0.0: enabled 1
  586 18:57:34.058696  I2C: 00:2c: enabled 1
  587 18:57:34.061648  I2C: 00:15: enabled 1
  588 18:57:34.065187  GENERIC: 0.0: enabled 0
  589 18:57:34.065274  I2C: 00:15: enabled 1
  590 18:57:34.068624  I2C: 00:10: enabled 0
  591 18:57:34.071482  I2C: 00:10: enabled 0
  592 18:57:34.071570  I2C: 00:2c: enabled 1
  593 18:57:34.075095  I2C: 00:40: enabled 1
  594 18:57:34.078665  I2C: 00:10: enabled 1
  595 18:57:34.078755  I2C: 00:39: enabled 1
  596 18:57:34.081680  I2C: 00:36: enabled 1
  597 18:57:34.085053  I2C: 00:10: enabled 0
  598 18:57:34.085155  I2C: 00:0c: enabled 1
  599 18:57:34.088062  I2C: 00:50: enabled 1
  600 18:57:34.091645  I2C: 00:1a: enabled 1
  601 18:57:34.091765  I2C: 00:1a: enabled 0
  602 18:57:34.095152  I2C: 00:1a: enabled 0
  603 18:57:34.098700  I2C: 00:28: enabled 1
  604 18:57:34.098784  I2C: 00:29: enabled 1
  605 18:57:34.101492  PCI: 00:00.0: enabled 1
  606 18:57:34.104958  SPI: 00: enabled 1
  607 18:57:34.105045  PNP: 0c09.0: enabled 1
  608 18:57:34.108107  
  609 18:57:34.108200  GENERIC: 0.0: enabled 0
  610 18:57:34.111513  USB2 port 0: enabled 1
  611 18:57:34.114908  USB2 port 1: enabled 1
  612 18:57:34.115040  USB2 port 2: enabled 1
  613 18:57:34.118570  USB2 port 3: enabled 1
  614 18:57:34.121506  USB2 port 4: enabled 0
  615 18:57:34.121632  USB2 port 5: enabled 1
  616 18:57:34.124527  USB2 port 6: enabled 0
  617 18:57:34.128112  USB2 port 7: enabled 1
  618 18:57:34.131126  USB3 port 0: enabled 1
  619 18:57:34.131227  USB3 port 1: enabled 1
  620 18:57:34.134871  USB3 port 2: enabled 1
  621 18:57:34.137869  USB3 port 3: enabled 1
  622 18:57:34.137997  APIC: 00: enabled 1
  623 18:57:34.141050  APIC: 02: enabled 1
  624 18:57:34.144772  Compare with tree...
  625 18:57:34.144891  Root Device: enabled 1
  626 18:57:34.147736   CPU_CLUSTER: 0: enabled 1
  627 18:57:34.151395    APIC: 00: enabled 1
  628 18:57:34.151482    APIC: 02: enabled 1
  629 18:57:34.154452   DOMAIN: 0000: enabled 1
  630 18:57:34.157917    PCI: 00:00.0: enabled 1
  631 18:57:34.160873    PCI: 00:02.0: enabled 1
  632 18:57:34.164439    PCI: 00:04.0: enabled 1
  633 18:57:34.164545     GENERIC: 0.0: enabled 1
  634 18:57:34.167478    PCI: 00:05.0: enabled 1
  635 18:57:34.170898     GENERIC: 0.0: enabled 1
  636 18:57:34.174631    PCI: 00:09.0: enabled 0
  637 18:57:34.177457    PCI: 00:12.6: enabled 0
  638 18:57:34.177546    PCI: 00:14.0: enabled 1
  639 18:57:34.181084     USB0 port 0: enabled 1
  640 18:57:34.184599      USB2 port 0: enabled 1
  641 18:57:34.187578      USB2 port 1: enabled 1
  642 18:57:34.191221      USB2 port 2: enabled 1
  643 18:57:34.194319      USB2 port 3: enabled 1
  644 18:57:34.194408      USB2 port 4: enabled 0
  645 18:57:34.197208      USB2 port 5: enabled 1
  646 18:57:34.200728      USB2 port 6: enabled 0
  647 18:57:34.203850      USB2 port 7: enabled 1
  648 18:57:34.207336      USB3 port 0: enabled 1
  649 18:57:34.207423      USB3 port 1: enabled 1
  650 18:57:34.210443  
  651 18:57:34.210540      USB3 port 2: enabled 1
  652 18:57:34.214091      USB3 port 3: enabled 1
  653 18:57:34.216982    PCI: 00:14.1: enabled 0
  654 18:57:34.220604    PCI: 00:14.2: enabled 0
  655 18:57:34.223614    PCI: 00:14.3: enabled 1
  656 18:57:34.223698     GENERIC: 0.0: enabled 1
  657 18:57:34.227123    PCI: 00:14.5: enabled 1
  658 18:57:34.230249    PCI: 00:15.0: enabled 1
  659 18:57:34.233750     I2C: 00:2c: enabled 1
  660 18:57:34.233839     I2C: 00:15: enabled 1
  661 18:57:34.236818    PCI: 00:15.1: enabled 1
  662 18:57:34.240539    PCI: 00:15.2: enabled 1
  663 18:57:34.243665     GENERIC: 0.0: enabled 0
  664 18:57:34.247113     I2C: 00:15: enabled 1
  665 18:57:34.247207     I2C: 00:10: enabled 0
  666 18:57:34.250279     I2C: 00:10: enabled 0
  667 18:57:34.253603     I2C: 00:2c: enabled 1
  668 18:57:34.256828     I2C: 00:40: enabled 1
  669 18:57:34.256933     I2C: 00:10: enabled 1
  670 18:57:34.260301     I2C: 00:39: enabled 1
  671 18:57:34.263239    PCI: 00:15.3: enabled 1
  672 18:57:34.266957     I2C: 00:36: enabled 1
  673 18:57:34.269860     I2C: 00:10: enabled 0
  674 18:57:34.269952     I2C: 00:0c: enabled 1
  675 18:57:34.273386     I2C: 00:50: enabled 1
  676 18:57:34.276492    PCI: 00:16.0: enabled 1
  677 18:57:34.279870    PCI: 00:16.1: enabled 0
  678 18:57:34.279983    PCI: 00:16.4: enabled 0
  679 18:57:34.284066  
  680 18:57:34.284152    PCI: 00:16.5: enabled 0
  681 18:57:34.287800    PCI: 00:17.0: enabled 0
  682 18:57:34.291478    PCI: 00:19.0: enabled 1
  683 18:57:34.291579     I2C: 00:1a: enabled 1
  684 18:57:34.294257     I2C: 00:1a: enabled 0
  685 18:57:34.297698     I2C: 00:1a: enabled 0
  686 18:57:34.300687     I2C: 00:28: enabled 1
  687 18:57:34.300797     I2C: 00:29: enabled 1
  688 18:57:34.304313    PCI: 00:19.1: enabled 0
  689 18:57:34.307447    PCI: 00:19.2: enabled 1
  690 18:57:34.310887    PCI: 00:1a.0: enabled 1
  691 18:57:34.313911    PCI: 00:1e.0: enabled 0
  692 18:57:34.314001    PCI: 00:1e.1: enabled 0
  693 18:57:34.317638    PCI: 00:1e.2: enabled 1
  694 18:57:34.320571     SPI: 00: enabled 1
  695 18:57:34.323743    PCI: 00:1e.3: enabled 0
  696 18:57:34.323832    PCI: 00:1f.0: enabled 1
  697 18:57:34.327467     PNP: 0c09.0: enabled 1
  698 18:57:34.330444    PCI: 00:1f.1: enabled 1
  699 18:57:34.333902    PCI: 00:1f.2: enabled 1
  700 18:57:34.337162    PCI: 00:1f.3: enabled 1
  701 18:57:34.337252     GENERIC: 0.0: enabled 0
  702 18:57:34.340666    PCI: 00:1f.4: enabled 0
  703 18:57:34.343938    PCI: 00:1f.5: enabled 1
  704 18:57:34.347430    PCI: 00:1f.7: enabled 0
  705 18:57:34.347524  Root Device scanning...
  706 18:57:34.350433  
  707 18:57:34.353900  scan_static_bus for Root Device
  708 18:57:34.354005  CPU_CLUSTER: 0 enabled
  709 18:57:34.357111  DOMAIN: 0000 enabled
  710 18:57:34.360091  DOMAIN: 0000 scanning...
  711 18:57:34.363671  PCI: pci_scan_bus for bus 00
  712 18:57:34.363753  PCI: 00:00.0 [8086/0000] ops
  713 18:57:34.366782  
  714 18:57:34.366873  PCI: 00:00.0 [8086/4e22] enabled
  715 18:57:34.370263  
  716 18:57:34.370353  PCI: 00:02.0 [8086/0000] bus ops
  717 18:57:34.373864  
  718 18:57:34.373953  PCI: 00:02.0 [8086/4e55] enabled
  719 18:57:34.376549  
  720 18:57:34.376640  PCI: 00:04.0 [8086/0000] bus ops
  721 18:57:34.380163  
  722 18:57:34.380242  PCI: 00:04.0 [8086/4e03] enabled
  723 18:57:34.383212  
  724 18:57:34.383319  PCI: 00:05.0 [8086/0000] bus ops
  725 18:57:34.386896  
  726 18:57:34.386990  PCI: 00:05.0 [8086/4e19] enabled
  727 18:57:34.390315  
  728 18:57:34.390410  PCI: 00:08.0 [8086/4e11] enabled
  729 18:57:34.393274  
  730 18:57:34.396789  PCI: 00:14.0 [8086/0000] bus ops
  731 18:57:34.399847  PCI: 00:14.0 [8086/4ded] enabled
  732 18:57:34.403417  PCI: 00:14.2 [8086/4def] disabled
  733 18:57:34.407254  PCI: 00:14.3 [8086/0000] bus ops
  734 18:57:34.410138  PCI: 00:14.3 [8086/4df0] enabled
  735 18:57:34.410225  PCI: 00:14.5 [8086/0000] ops
  736 18:57:34.413651  PCI: 00:14.5 [8086/4df8] enabled
  737 18:57:34.416508  PCI: 00:15.0 [8086/0000] bus ops
  738 18:57:34.420164  PCI: 00:15.0 [8086/4de8] enabled
  739 18:57:34.423221  PCI: 00:15.1 [8086/0000] bus ops
  740 18:57:34.426326  PCI: 00:15.1 [8086/4de9] enabled
  741 18:57:34.429824  PCI: 00:15.2 [8086/0000] bus ops
  742 18:57:34.433532  PCI: 00:15.2 [8086/4dea] enabled
  743 18:57:34.436424  PCI: 00:15.3 [8086/0000] bus ops
  744 18:57:34.440153  PCI: 00:15.3 [8086/4deb] enabled
  745 18:57:34.443041  PCI: 00:16.0 [8086/0000] ops
  746 18:57:34.446077  PCI: 00:16.0 [8086/4de0] enabled
  747 18:57:34.449777  PCI: 00:19.0 [8086/0000] bus ops
  748 18:57:34.452731  PCI: 00:19.0 [8086/4dc5] enabled
  749 18:57:34.456435  PCI: 00:19.2 [8086/0000] ops
  750 18:57:34.459900  PCI: 00:19.2 [8086/4dc7] enabled
  751 18:57:34.463020  PCI: 00:1a.0 [8086/0000] ops
  752 18:57:34.465961  PCI: 00:1a.0 [8086/4dc4] enabled
  753 18:57:34.469585  PCI: 00:1e.0 [8086/0000] ops
  754 18:57:34.472989  PCI: 00:1e.0 [8086/4da8] disabled
  755 18:57:34.476102  PCI: 00:1e.2 [8086/0000] bus ops
  756 18:57:34.479611  PCI: 00:1e.2 [8086/4daa] enabled
  757 18:57:34.483054  PCI: 00:1f.0 [8086/0000] bus ops
  758 18:57:34.485945  PCI: 00:1f.0 [8086/4d87] enabled
  759 18:57:34.492580  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  760 18:57:34.492679  RTC Init
  761 18:57:34.495719  Set power on after power failure.
  762 18:57:34.499332  Disabling Deep S3
  763 18:57:34.499424  Disabling Deep S3
  764 18:57:34.502254  Disabling Deep S4
  765 18:57:34.502336  Disabling Deep S4
  766 18:57:34.505832  Disabling Deep S5
  767 18:57:34.509293  Disabling Deep S5
  768 18:57:34.509381  PCI: 00:1f.2 [0000/0000] hidden
  769 18:57:34.512253  
  770 18:57:34.512335  PCI: 00:1f.3 [8086/0000] bus ops
  771 18:57:34.515929  
  772 18:57:34.516020  PCI: 00:1f.3 [8086/4dc8] enabled
  773 18:57:34.519121  
  774 18:57:34.519204  PCI: 00:1f.5 [8086/0000] bus ops
  775 18:57:34.522066  
  776 18:57:34.522162  PCI: 00:1f.5 [8086/4da4] enabled
  777 18:57:34.525610  
  778 18:57:34.525693  PCI: Leftover static devices:
  779 18:57:34.528809  PCI: 00:12.6
  780 18:57:34.528911  PCI: 00:09.0
  781 18:57:34.532245  PCI: 00:14.1
  782 18:57:34.532333  PCI: 00:16.1
  783 18:57:34.535395  PCI: 00:16.4
  784 18:57:34.535505  PCI: 00:16.5
  785 18:57:34.535617  PCI: 00:17.0
  786 18:57:34.538935  PCI: 00:19.1
  787 18:57:34.539019  PCI: 00:1e.1
  788 18:57:34.541881  PCI: 00:1e.3
  789 18:57:34.541972  PCI: 00:1f.1
  790 18:57:34.542039  PCI: 00:1f.4
  791 18:57:34.545695  PCI: 00:1f.7
  792 18:57:34.548911  PCI: Check your devicetree.cb.
  793 18:57:34.551629  PCI: 00:02.0 scanning...
  794 18:57:34.555271  scan_generic_bus for PCI: 00:02.0
  795 18:57:34.558110  scan_generic_bus for PCI: 00:02.0 done
  796 18:57:34.561571  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  797 18:57:34.565169  PCI: 00:04.0 scanning...
  798 18:57:34.568073  scan_generic_bus for PCI: 00:04.0
  799 18:57:34.571237  GENERIC: 0.0 enabled
  800 18:57:34.578338  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  801 18:57:34.581454  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  802 18:57:34.584927  PCI: 00:05.0 scanning...
  803 18:57:34.588019  scan_generic_bus for PCI: 00:05.0
  804 18:57:34.591118  GENERIC: 0.0 enabled
  805 18:57:34.594689  bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
  806 18:57:34.601310  scan_bus: bus PCI: 00:05.0 finished in 11 msecs
  807 18:57:34.604749  PCI: 00:14.0 scanning...
  808 18:57:34.607688  scan_static_bus for PCI: 00:14.0
  809 18:57:34.607776  USB0 port 0 enabled
  810 18:57:34.610842  USB0 port 0 scanning...
  811 18:57:34.614245  scan_static_bus for USB0 port 0
  812 18:57:34.617771  USB2 port 0 enabled
  813 18:57:34.617876  USB2 port 1 enabled
  814 18:57:34.620615  USB2 port 2 enabled
  815 18:57:34.624267  USB2 port 3 enabled
  816 18:57:34.624362  USB2 port 4 disabled
  817 18:57:34.627211  USB2 port 5 enabled
  818 18:57:34.627305  USB2 port 6 disabled
  819 18:57:34.630951  USB2 port 7 enabled
  820 18:57:34.633750  USB3 port 0 enabled
  821 18:57:34.633837  USB3 port 1 enabled
  822 18:57:34.637573  USB3 port 2 enabled
  823 18:57:34.640634  USB3 port 3 enabled
  824 18:57:34.640724  USB2 port 0 scanning...
  825 18:57:34.643683  scan_static_bus for USB2 port 0
  826 18:57:34.647226  scan_static_bus for USB2 port 0 done
  827 18:57:34.653883  scan_bus: bus USB2 port 0 finished in 6 msecs
  828 18:57:34.656804  USB2 port 1 scanning...
  829 18:57:34.660447  scan_static_bus for USB2 port 1
  830 18:57:34.663643  scan_static_bus for USB2 port 1 done
  831 18:57:34.666639  scan_bus: bus USB2 port 1 finished in 6 msecs
  832 18:57:34.670227  USB2 port 2 scanning...
  833 18:57:34.673078  scan_static_bus for USB2 port 2
  834 18:57:34.676741  scan_static_bus for USB2 port 2 done
  835 18:57:34.680332  scan_bus: bus USB2 port 2 finished in 6 msecs
  836 18:57:34.683294  USB2 port 3 scanning...
  837 18:57:34.686294  scan_static_bus for USB2 port 3
  838 18:57:34.689818  scan_static_bus for USB2 port 3 done
  839 18:57:34.696574  scan_bus: bus USB2 port 3 finished in 6 msecs
  840 18:57:34.696676  USB2 port 5 scanning...
  841 18:57:34.699629  scan_static_bus for USB2 port 5
  842 18:57:34.706115  scan_static_bus for USB2 port 5 done
  843 18:57:34.709600  scan_bus: bus USB2 port 5 finished in 6 msecs
  844 18:57:34.713254  USB2 port 7 scanning...
  845 18:57:34.715986  scan_static_bus for USB2 port 7
  846 18:57:34.719799  scan_static_bus for USB2 port 7 done
  847 18:57:34.722670  scan_bus: bus USB2 port 7 finished in 6 msecs
  848 18:57:34.726190  USB3 port 0 scanning...
  849 18:57:34.729010  scan_static_bus for USB3 port 0
  850 18:57:34.732812  scan_static_bus for USB3 port 0 done
  851 18:57:34.739263  scan_bus: bus USB3 port 0 finished in 6 msecs
  852 18:57:34.739390  USB3 port 1 scanning...
  853 18:57:34.742192  scan_static_bus for USB3 port 1
  854 18:57:34.745909  scan_static_bus for USB3 port 1 done
  855 18:57:34.752162  scan_bus: bus USB3 port 1 finished in 6 msecs
  856 18:57:34.755883  USB3 port 2 scanning...
  857 18:57:34.758886  scan_static_bus for USB3 port 2
  858 18:57:34.761855  scan_static_bus for USB3 port 2 done
  859 18:57:34.765627  scan_bus: bus USB3 port 2 finished in 6 msecs
  860 18:57:34.768738  USB3 port 3 scanning...
  861 18:57:34.772148  scan_static_bus for USB3 port 3
  862 18:57:34.775100  scan_static_bus for USB3 port 3 done
  863 18:57:34.778824  scan_bus: bus USB3 port 3 finished in 6 msecs
  864 18:57:34.782398  scan_static_bus for USB0 port 0 done
  865 18:57:34.788231  scan_bus: bus USB0 port 0 finished in 172 msecs
  866 18:57:34.791723  scan_static_bus for PCI: 00:14.0 done
  867 18:57:34.798473  scan_bus: bus PCI: 00:14.0 finished in 188 msecs
  868 18:57:34.798571  PCI: 00:14.3 scanning...
  869 18:57:34.802026  scan_static_bus for PCI: 00:14.3
  870 18:57:34.804756  GENERIC: 0.0 enabled
  871 18:57:34.808352  scan_static_bus for PCI: 00:14.3 done
  872 18:57:34.814822  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  873 18:57:34.814916  PCI: 00:15.0 scanning...
  874 18:57:34.818363  scan_static_bus for PCI: 00:15.0
  875 18:57:34.821460  I2C: 00:2c enabled
  876 18:57:34.825045  I2C: 00:15 enabled
  877 18:57:34.827986  scan_static_bus for PCI: 00:15.0 done
  878 18:57:34.831683  scan_bus: bus PCI: 00:15.0 finished in 10 msecs
  879 18:57:34.834904  PCI: 00:15.1 scanning...
  880 18:57:34.838073  scan_static_bus for PCI: 00:15.1
  881 18:57:34.841196  scan_static_bus for PCI: 00:15.1 done
  882 18:57:34.847876  scan_bus: bus PCI: 00:15.1 finished in 7 msecs
  883 18:57:34.847964  PCI: 00:15.2 scanning...
  884 18:57:34.850962  scan_static_bus for PCI: 00:15.2
  885 18:57:34.854760  GENERIC: 0.0 disabled
  886 18:57:34.857677  I2C: 00:15 enabled
  887 18:57:34.857768  I2C: 00:10 disabled
  888 18:57:34.861439  I2C: 00:10 disabled
  889 18:57:34.861540  I2C: 00:2c enabled
  890 18:57:34.864969  I2C: 00:40 enabled
  891 18:57:34.865057  I2C: 00:10 enabled
  892 18:57:34.868532  I2C: 00:39 enabled
  893 18:57:34.872205  scan_static_bus for PCI: 00:15.2 done
  894 18:57:34.878845  scan_bus: bus PCI: 00:15.2 finished in 23 msecs
  895 18:57:34.878947  PCI: 00:15.3 scanning...
  896 18:57:34.882457  scan_static_bus for PCI: 00:15.3
  897 18:57:34.885894  I2C: 00:36 enabled
  898 18:57:34.885999  I2C: 00:10 disabled
  899 18:57:34.888963  I2C: 00:0c enabled
  900 18:57:34.892328  I2C: 00:50 enabled
  901 18:57:34.895814  scan_static_bus for PCI: 00:15.3 done
  902 18:57:34.898915  scan_bus: bus PCI: 00:15.3 finished in 14 msecs
  903 18:57:34.902344  PCI: 00:19.0 scanning...
  904 18:57:34.905848  scan_static_bus for PCI: 00:19.0
  905 18:57:34.908777  I2C: 00:1a enabled
  906 18:57:34.908865  I2C: 00:1a disabled
  907 18:57:34.912509  I2C: 00:1a disabled
  908 18:57:34.912594  I2C: 00:28 enabled
  909 18:57:34.915566  I2C: 00:29 enabled
  910 18:57:34.918896  scan_static_bus for PCI: 00:19.0 done
  911 18:57:34.925563  scan_bus: bus PCI: 00:19.0 finished in 17 msecs
  912 18:57:34.925699  PCI: 00:1e.2 scanning...
  913 18:57:34.928635  scan_generic_bus for PCI: 00:1e.2
  914 18:57:34.932161  SPI: 00 enabled
  915 18:57:34.938741  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
  916 18:57:34.941809  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
  917 18:57:34.945345  PCI: 00:1f.0 scanning...
  918 18:57:34.948992  scan_static_bus for PCI: 00:1f.0
  919 18:57:34.951851  PNP: 0c09.0 enabled
  920 18:57:34.951936  PNP: 0c09.0 scanning...
  921 18:57:34.955176  scan_static_bus for PNP: 0c09.0
  922 18:57:34.962070  scan_static_bus for PNP: 0c09.0 done
  923 18:57:34.965044  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
  924 18:57:34.968089  scan_static_bus for PCI: 00:1f.0 done
  925 18:57:34.971841  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
  926 18:57:34.974843  
  927 18:57:34.974930  PCI: 00:1f.3 scanning...
  928 18:57:34.978468  scan_static_bus for PCI: 00:1f.3
  929 18:57:34.981624  GENERIC: 0.0 disabled
  930 18:57:34.984939  scan_static_bus for PCI: 00:1f.3 done
  931 18:57:34.991458  scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
  932 18:57:34.991566  PCI: 00:1f.5 scanning...
  933 18:57:34.994966  scan_generic_bus for PCI: 00:1f.5
  934 18:57:35.001592  scan_generic_bus for PCI: 00:1f.5 done
  935 18:57:35.004722  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
  936 18:57:35.008160  scan_bus: bus DOMAIN: 0000 finished in 645 msecs
  937 18:57:35.011151  
  938 18:57:35.014553  scan_static_bus for Root Device done
  939 18:57:35.018460  scan_bus: bus Root Device finished in 664 msecs
  940 18:57:35.018544  done
  941 18:57:35.024837  BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1084 ms
  942 18:57:35.027627  Chrome EC: UHEPI supported
  943 18:57:35.034854  FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
  944 18:57:35.040723  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
  945 18:57:35.044219  SPI flash protection: WPSW=1 SRP0=1
  946 18:57:35.050689  fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
  947 18:57:35.057565  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
  948 18:57:35.060617  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 31 ms
  949 18:57:35.064294  found VGA at PCI: 00:02.0
  950 18:57:35.067350  Setting up VGA for PCI: 00:02.0
  951 18:57:35.074043  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
  952 18:57:35.077227  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  953 18:57:35.080674  Allocating resources...
  954 18:57:35.083857  Reading resources...
  955 18:57:35.087463  Root Device read_resources bus 0 link: 0
  956 18:57:35.090520  CPU_CLUSTER: 0 read_resources bus 0 link: 0
  957 18:57:35.097361  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
  958 18:57:35.100340  DOMAIN: 0000 read_resources bus 0 link: 0
  959 18:57:35.107133  PCI: 00:04.0 read_resources bus 1 link: 0
  960 18:57:35.110675  PCI: 00:04.0 read_resources bus 1 link: 0 done
  961 18:57:35.113555  PCI: 00:05.0 read_resources bus 2 link: 0
  962 18:57:35.120559  PCI: 00:05.0 read_resources bus 2 link: 0 done
  963 18:57:35.124200  PCI: 00:14.0 read_resources bus 0 link: 0
  964 18:57:35.130717  USB0 port 0 read_resources bus 0 link: 0
  965 18:57:35.137282  USB0 port 0 read_resources bus 0 link: 0 done
  966 18:57:35.192305  PCI: 00:14.0 read_resources bus 0 link: 0 done
  967 18:57:35.192515  PCI: 00:14.3 read_resources bus 0 link: 0
  968 18:57:35.192631  PCI: 00:14.3 read_resources bus 0 link: 0 done
  969 18:57:35.192967  PCI: 00:15.0 read_resources bus 0 link: 0
  970 18:57:35.193079  PCI: 00:15.0 read_resources bus 0 link: 0 done
  971 18:57:35.193230  PCI: 00:15.2 read_resources bus 0 link: 0
  972 18:57:35.193373  PCI: 00:15.2 read_resources bus 0 link: 0 done
  973 18:57:35.193501  PCI: 00:15.3 read_resources bus 0 link: 0
  974 18:57:35.193614  PCI: 00:15.3 read_resources bus 0 link: 0 done
  975 18:57:35.193923  PCI: 00:19.0 read_resources bus 0 link: 0
  976 18:57:35.194034  PCI: 00:19.0 read_resources bus 0 link: 0 done
  977 18:57:35.196299  PCI: 00:1e.2 read_resources bus 3 link: 0
  978 18:57:35.199649  PCI: 00:1e.2 read_resources bus 3 link: 0 done
  979 18:57:35.203236  PCI: 00:1f.0 read_resources bus 0 link: 0
  980 18:57:35.209890  PCI: 00:1f.0 read_resources bus 0 link: 0 done
  981 18:57:35.212918  PCI: 00:1f.3 read_resources bus 0 link: 0
  982 18:57:35.219978  PCI: 00:1f.3 read_resources bus 0 link: 0 done
  983 18:57:35.222898  DOMAIN: 0000 read_resources bus 0 link: 0 done
  984 18:57:35.229702  Root Device read_resources bus 0 link: 0 done
  985 18:57:35.229795  Done reading resources.
  986 18:57:35.236059  Show resources in subtree (Root Device)...After reading.
  987 18:57:35.239705   Root Device child on link 0 CPU_CLUSTER: 0
  988 18:57:35.242753  
  989 18:57:35.246444    CPU_CLUSTER: 0 child on link 0 APIC: 00
  990 18:57:35.246527     APIC: 00
  991 18:57:35.249318     APIC: 02
  992 18:57:35.252903    DOMAIN: 0000 child on link 0 PCI: 00:00.0
  993 18:57:35.262679    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  994 18:57:35.272366    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
  995 18:57:35.272472     PCI: 00:00.0
  996 18:57:35.282848     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
  997 18:57:35.292199     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
  998 18:57:35.302104     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
  999 18:57:35.312559     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1000 18:57:35.319089     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1001 18:57:35.328473     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1002 18:57:35.338635     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1003 18:57:35.348240     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1004 18:57:35.358039     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1005 18:57:35.365008     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1006 18:57:35.374615     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1007 18:57:35.384813     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1008 18:57:35.394441     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1009 18:57:35.404795     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1010 18:57:35.411060     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1011 18:57:35.421066     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1012 18:57:35.430596     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1013 18:57:35.440695     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1014 18:57:35.450985     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1015 18:57:35.451145     PCI: 00:02.0
 1016 18:57:35.463554     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1017 18:57:35.473773     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1018 18:57:35.480226     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1019 18:57:35.486794     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1020 18:57:35.496683     PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1021 18:57:35.496809      GENERIC: 0.0
 1022 18:57:35.499934     PCI: 00:05.0 child on link 0 GENERIC: 0.0
 1023 18:57:35.513091     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1024 18:57:35.513243      GENERIC: 0.0
 1025 18:57:35.516701     PCI: 00:08.0
 1026 18:57:35.526776     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1027 18:57:35.529880     PCI: 00:14.0 child on link 0 USB0 port 0
 1028 18:57:35.540581     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1029 18:57:35.543600      USB0 port 0 child on link 0 USB2 port 0
 1030 18:57:35.547579       USB2 port 0
 1031 18:57:35.547672       USB2 port 1
 1032 18:57:35.547743       USB2 port 2
 1033 18:57:35.550889       USB2 port 3
 1034 18:57:35.554434       USB2 port 4
 1035 18:57:35.554530       USB2 port 5
 1036 18:57:35.557333       USB2 port 6
 1037 18:57:35.557430       USB2 port 7
 1038 18:57:35.560884       USB3 port 0
 1039 18:57:35.560994       USB3 port 1
 1040 18:57:35.564466       USB3 port 2
 1041 18:57:35.564546       USB3 port 3
 1042 18:57:35.567636     PCI: 00:14.2
 1043 18:57:35.570821     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1044 18:57:35.580720     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1045 18:57:35.583711      GENERIC: 0.0
 1046 18:57:35.583802     PCI: 00:14.5
 1047 18:57:35.593915     PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1048 18:57:35.597486     PCI: 00:15.0 child on link 0 I2C: 00:2c
 1049 18:57:35.606922     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1050 18:57:35.610427      I2C: 00:2c
 1051 18:57:35.610570      I2C: 00:15
 1052 18:57:35.613968     PCI: 00:15.1
 1053 18:57:35.623435     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1054 18:57:35.627053     PCI: 00:15.2 child on link 0 GENERIC: 0.0
 1055 18:57:35.636816     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1056 18:57:35.640520      GENERIC: 0.0
 1057 18:57:35.640625      I2C: 00:15
 1058 18:57:35.643308      I2C: 00:10
 1059 18:57:35.643399      I2C: 00:10
 1060 18:57:35.647138      I2C: 00:2c
 1061 18:57:35.647229      I2C: 00:40
 1062 18:57:35.650163      I2C: 00:10
 1063 18:57:35.650252      I2C: 00:39
 1064 18:57:35.653636     PCI: 00:15.3 child on link 0 I2C: 00:36
 1065 18:57:35.663146     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1066 18:57:35.666966      I2C: 00:36
 1067 18:57:35.667066      I2C: 00:10
 1068 18:57:35.669924      I2C: 00:0c
 1069 18:57:35.670016      I2C: 00:50
 1070 18:57:35.673578     PCI: 00:16.0
 1071 18:57:35.683161     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1072 18:57:35.686409     PCI: 00:19.0 child on link 0 I2C: 00:1a
 1073 18:57:35.696697     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1074 18:57:35.696825      I2C: 00:1a
 1075 18:57:35.699391      I2C: 00:1a
 1076 18:57:35.699489      I2C: 00:1a
 1077 18:57:35.702842      I2C: 00:28
 1078 18:57:35.702936      I2C: 00:29
 1079 18:57:35.706599     PCI: 00:19.2
 1080 18:57:35.716483     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1081 18:57:35.725843     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1082 18:57:35.729570     PCI: 00:1a.0
 1083 18:57:35.739268     PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1084 18:57:35.739433     PCI: 00:1e.0
 1085 18:57:35.742899     PCI: 00:1e.2 child on link 0 SPI: 00
 1086 18:57:35.752339     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1087 18:57:35.755925      SPI: 00
 1088 18:57:35.759088     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1089 18:57:35.768754     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1090 18:57:35.768925      PNP: 0c09.0
 1091 18:57:35.779077      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1092 18:57:35.779236     PCI: 00:1f.2
 1093 18:57:35.788760     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1094 18:57:35.798874     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
 1095 18:57:35.801793     PCI: 00:1f.3 child on link 0 GENERIC: 0.0
 1096 18:57:35.811686     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1097 18:57:35.821644     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1098 18:57:35.825293      GENERIC: 0.0
 1099 18:57:35.825424     PCI: 00:1f.5
 1100 18:57:35.834979     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1101 18:57:35.844989  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1102 18:57:35.851699  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1103 18:57:35.858401  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1104 18:57:35.864928   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1105 18:57:35.871492   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1106 18:57:35.878050   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1107 18:57:35.881254   DOMAIN: 0000: Resource ranges:
 1108 18:57:35.884748   * Base: 1000, Size: 800, Tag: 100
 1109 18:57:35.891302   * Base: 1900, Size: e700, Tag: 100
 1110 18:57:35.894420    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1111 18:57:35.900877  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1112 18:57:35.907755  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1113 18:57:35.917287   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1114 18:57:35.924369   update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
 1115 18:57:35.930895   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1116 18:57:35.937654   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1117 18:57:35.940535  
 1118 18:57:35.947216   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1119 18:57:35.953763   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1120 18:57:35.960614   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1121 18:57:35.970248   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1122 18:57:35.976752   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1123 18:57:35.983497   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1124 18:57:35.993122   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1125 18:57:35.999753   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1126 18:57:36.006303   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1127 18:57:36.016249   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1128 18:57:36.022784   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1129 18:57:36.029792   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1130 18:57:36.039401   update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
 1131 18:57:36.046002   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1132 18:57:36.052792   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1133 18:57:36.062716   update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
 1134 18:57:36.069274   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1135 18:57:36.072904   DOMAIN: 0000: Resource ranges:
 1136 18:57:36.075965   * Base: 7fc00000, Size: 40400000, Tag: 200
 1137 18:57:36.082493   * Base: d0000000, Size: 2b000000, Tag: 200
 1138 18:57:36.085451   * Base: fb001000, Size: 2fff000, Tag: 200
 1139 18:57:36.089156   * Base: fe010000, Size: 22000, Tag: 200
 1140 18:57:36.092318   * Base: fe033000, Size: a4d000, Tag: 200
 1141 18:57:36.098812   * Base: fea88000, Size: 2f8000, Tag: 200
 1142 18:57:36.102304   * Base: fed88000, Size: 8000, Tag: 200
 1143 18:57:36.105291   * Base: fed93000, Size: d000, Tag: 200
 1144 18:57:36.108935   * Base: feda2000, Size: 125e000, Tag: 200
 1145 18:57:36.115525   * Base: 180400000, Size: 7e7fc00000, Tag: 100200
 1146 18:57:36.122591    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1147 18:57:36.129576    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1148 18:57:36.136255    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1149 18:57:36.142801    PCI: 00:1f.3 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1150 18:57:36.149089    PCI: 00:04.0 10 *  [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
 1151 18:57:36.155896    PCI: 00:14.0 10 *  [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
 1152 18:57:36.162555    PCI: 00:14.3 10 *  [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
 1153 18:57:36.169117    PCI: 00:1f.3 10 *  [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
 1154 18:57:36.175716    PCI: 00:08.0 10 *  [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
 1155 18:57:36.182343    PCI: 00:14.5 10 *  [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
 1156 18:57:36.189044    PCI: 00:15.0 10 *  [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
 1157 18:57:36.195595    PCI: 00:15.1 10 *  [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
 1158 18:57:36.202163    PCI: 00:15.2 10 *  [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
 1159 18:57:36.208763    PCI: 00:15.3 10 *  [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
 1160 18:57:36.215363    PCI: 00:16.0 10 *  [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
 1161 18:57:36.221780    PCI: 00:19.0 10 *  [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
 1162 18:57:36.228239    PCI: 00:19.2 18 *  [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
 1163 18:57:36.235160    PCI: 00:1a.0 10 *  [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
 1164 18:57:36.241592    PCI: 00:1e.2 10 *  [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
 1165 18:57:36.248274    PCI: 00:1f.5 10 *  [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
 1166 18:57:36.254853  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1167 18:57:36.261347  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1168 18:57:36.265043  Root Device assign_resources, bus 0 link: 0
 1169 18:57:36.268086  
 1170 18:57:36.271497  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1171 18:57:36.277896  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1172 18:57:36.288250  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1173 18:57:36.294830  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1174 18:57:36.304445  PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
 1175 18:57:36.307467  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1176 18:57:36.314017  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1177 18:57:36.320929  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1178 18:57:36.324401  PCI: 00:05.0 assign_resources, bus 2 link: 0
 1179 18:57:36.330659  PCI: 00:05.0 assign_resources, bus 2 link: 0
 1180 18:57:36.337265  PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
 1181 18:57:36.347267  PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
 1182 18:57:36.350430  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1183 18:57:36.354151  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1184 18:57:36.364142  PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
 1185 18:57:36.367290  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1186 18:57:36.373669  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1187 18:57:36.380169  PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
 1188 18:57:36.390469  PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
 1189 18:57:36.393595  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1190 18:57:36.396718  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1191 18:57:36.406913  PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
 1192 18:57:36.413539  PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
 1193 18:57:36.420330  PCI: 00:15.2 assign_resources, bus 0 link: 0
 1194 18:57:36.423340  PCI: 00:15.2 assign_resources, bus 0 link: 0
 1195 18:57:36.432963  PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
 1196 18:57:36.436677  PCI: 00:15.3 assign_resources, bus 0 link: 0
 1197 18:57:36.439888  PCI: 00:15.3 assign_resources, bus 0 link: 0
 1198 18:57:36.449413  PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
 1199 18:57:36.456086  PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
 1200 18:57:36.462770  PCI: 00:19.0 assign_resources, bus 0 link: 0
 1201 18:57:36.466316  PCI: 00:19.0 assign_resources, bus 0 link: 0
 1202 18:57:36.472691  PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
 1203 18:57:36.483046  PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
 1204 18:57:36.489594  PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
 1205 18:57:36.495712  PCI: 00:1e.2 assign_resources, bus 3 link: 0
 1206 18:57:36.499303  PCI: 00:1e.2 assign_resources, bus 3 link: 0
 1207 18:57:36.506039  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1208 18:57:36.508879  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1209 18:57:36.512385  LPC: Trying to open IO window from 800 size 1ff
 1210 18:57:36.522737  PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
 1211 18:57:36.529243  PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
 1212 18:57:36.535753  PCI: 00:1f.3 assign_resources, bus 0 link: 0
 1213 18:57:36.539274  PCI: 00:1f.3 assign_resources, bus 0 link: 0
 1214 18:57:36.545360  PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
 1215 18:57:36.552520  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1216 18:57:36.555541  Root Device assign_resources, bus 0 link: 0
 1217 18:57:36.558917  Done setting resources.
 1218 18:57:36.565612  Show resources in subtree (Root Device)...After assigning values.
 1219 18:57:36.569098   Root Device child on link 0 CPU_CLUSTER: 0
 1220 18:57:36.572098    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1221 18:57:36.575695  
 1222 18:57:36.575793     APIC: 00
 1223 18:57:36.575866     APIC: 02
 1224 18:57:36.582040    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1225 18:57:36.588871    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1226 18:57:36.598599    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1227 18:57:36.602103     PCI: 00:00.0
 1228 18:57:36.612247     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1229 18:57:36.621969     PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1230 18:57:36.628610     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1231 18:57:36.638421     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1232 18:57:36.647874     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1233 18:57:36.658258     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1234 18:57:36.667866     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1235 18:57:36.677993     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1236 18:57:36.684590     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1237 18:57:36.694489     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1238 18:57:36.704431     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1239 18:57:36.714181     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1240 18:57:36.723854     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1241 18:57:36.730811     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1242 18:57:36.740628     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1243 18:57:36.750528     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1244 18:57:36.760478     PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1245 18:57:36.770147     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1246 18:57:36.779981     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1247 18:57:36.780131     PCI: 00:02.0
 1248 18:57:36.789841     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1249 18:57:36.802874     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1250 18:57:36.809534     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1251 18:57:36.816239     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1252 18:57:36.825920     PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
 1253 18:57:36.826051      GENERIC: 0.0
 1254 18:57:36.832351     PCI: 00:05.0 child on link 0 GENERIC: 0.0
 1255 18:57:36.842441     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1256 18:57:36.845522      GENERIC: 0.0
 1257 18:57:36.845618     PCI: 00:08.0
 1258 18:57:36.855739     PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
 1259 18:57:36.862476     PCI: 00:14.0 child on link 0 USB0 port 0
 1260 18:57:36.872109     PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
 1261 18:57:36.875592      USB0 port 0 child on link 0 USB2 port 0
 1262 18:57:36.879010       USB2 port 0
 1263 18:57:36.879096       USB2 port 1
 1264 18:57:36.881802       USB2 port 2
 1265 18:57:36.881888       USB2 port 3
 1266 18:57:36.885569       USB2 port 4
 1267 18:57:36.885657       USB2 port 5
 1268 18:57:36.888501       USB2 port 6
 1269 18:57:36.888600       USB2 port 7
 1270 18:57:36.892132       USB3 port 0
 1271 18:57:36.892217       USB3 port 1
 1272 18:57:36.895164       USB3 port 2
 1273 18:57:36.895250       USB3 port 3
 1274 18:57:36.898413     PCI: 00:14.2
 1275 18:57:36.902058     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1276 18:57:36.911562     PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
 1277 18:57:36.915117      GENERIC: 0.0
 1278 18:57:36.915219     PCI: 00:14.5
 1279 18:57:36.928316     PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
 1280 18:57:36.931371     PCI: 00:15.0 child on link 0 I2C: 00:2c
 1281 18:57:36.941394     PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
 1282 18:57:36.941509      I2C: 00:2c
 1283 18:57:36.944467      I2C: 00:15
 1284 18:57:36.944551     PCI: 00:15.1
 1285 18:57:36.957770     PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
 1286 18:57:36.961061     PCI: 00:15.2 child on link 0 GENERIC: 0.0
 1287 18:57:36.970807     PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
 1288 18:57:36.974452      GENERIC: 0.0
 1289 18:57:36.974549      I2C: 00:15
 1290 18:57:36.974620      I2C: 00:10
 1291 18:57:36.977427      I2C: 00:10
 1292 18:57:36.977514      I2C: 00:2c
 1293 18:57:36.981153      I2C: 00:40
 1294 18:57:36.981234      I2C: 00:10
 1295 18:57:36.984223      I2C: 00:39
 1296 18:57:36.987987     PCI: 00:15.3 child on link 0 I2C: 00:36
 1297 18:57:36.997295     PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
 1298 18:57:37.000904      I2C: 00:36
 1299 18:57:37.000996      I2C: 00:10
 1300 18:57:37.004026      I2C: 00:0c
 1301 18:57:37.004113      I2C: 00:50
 1302 18:57:37.007674     PCI: 00:16.0
 1303 18:57:37.017182     PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
 1304 18:57:37.020727     PCI: 00:19.0 child on link 0 I2C: 00:1a
 1305 18:57:37.030460     PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
 1306 18:57:37.033594      I2C: 00:1a
 1307 18:57:37.033684      I2C: 00:1a
 1308 18:57:37.037207      I2C: 00:1a
 1309 18:57:37.037317      I2C: 00:28
 1310 18:57:37.037391      I2C: 00:29
 1311 18:57:37.040351  
 1312 18:57:37.040432     PCI: 00:19.2
 1313 18:57:37.050630     PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1314 18:57:37.060186     PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
 1315 18:57:37.063403     PCI: 00:1a.0
 1316 18:57:37.073240     PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
 1317 18:57:37.076966     PCI: 00:1e.0
 1318 18:57:37.079998     PCI: 00:1e.2 child on link 0 SPI: 00
 1319 18:57:37.089930     PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
 1320 18:57:37.090067      SPI: 00
 1321 18:57:37.096485     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1322 18:57:37.102853     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1323 18:57:37.106488      PNP: 0c09.0
 1324 18:57:37.113216      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1325 18:57:37.116510     PCI: 00:1f.2
 1326 18:57:37.126078     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1327 18:57:37.132923     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
 1328 18:57:37.135898  
 1329 18:57:37.139490     PCI: 00:1f.3 child on link 0 GENERIC: 0.0
 1330 18:57:37.149138     PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
 1331 18:57:37.159256     PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
 1332 18:57:37.162441      GENERIC: 0.0
 1333 18:57:37.162535     PCI: 00:1f.5
 1334 18:57:37.172240     PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
 1335 18:57:37.175511  Done allocating resources.
 1336 18:57:37.182616  BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2094 ms
 1337 18:57:37.185768  Enabling resources...
 1338 18:57:37.188820  PCI: 00:00.0 subsystem <- 8086/4e22
 1339 18:57:37.192353  PCI: 00:00.0 cmd <- 06
 1340 18:57:37.195553  PCI: 00:02.0 subsystem <- 8086/4e55
 1341 18:57:37.199181  PCI: 00:02.0 cmd <- 03
 1342 18:57:37.202210  PCI: 00:04.0 subsystem <- 8086/4e03
 1343 18:57:37.202294  PCI: 00:04.0 cmd <- 02
 1344 18:57:37.205865  PCI: 00:05.0 bridge ctrl <- 0003
 1345 18:57:37.211947  PCI: 00:05.0 subsystem <- 8086/4e19
 1346 18:57:37.212035  PCI: 00:05.0 cmd <- 02
 1347 18:57:37.215417  PCI: 00:08.0 cmd <- 06
 1348 18:57:37.218650  PCI: 00:14.0 subsystem <- 8086/4ded
 1349 18:57:37.222295  PCI: 00:14.0 cmd <- 02
 1350 18:57:37.225171  PCI: 00:14.3 subsystem <- 8086/4df0
 1351 18:57:37.228262  PCI: 00:14.3 cmd <- 02
 1352 18:57:37.231962  PCI: 00:14.5 subsystem <- 8086/4df8
 1353 18:57:37.235640  PCI: 00:14.5 cmd <- 06
 1354 18:57:37.238748  PCI: 00:15.0 subsystem <- 8086/4de8
 1355 18:57:37.238849  PCI: 00:15.0 cmd <- 02
 1356 18:57:37.245415  PCI: 00:15.1 subsystem <- 8086/4de9
 1357 18:57:37.245511  PCI: 00:15.1 cmd <- 02
 1358 18:57:37.248260  PCI: 00:15.2 subsystem <- 8086/4dea
 1359 18:57:37.252045  PCI: 00:15.2 cmd <- 02
 1360 18:57:37.255067  PCI: 00:15.3 subsystem <- 8086/4deb
 1361 18:57:37.258614  PCI: 00:15.3 cmd <- 02
 1362 18:57:37.261631  PCI: 00:16.0 subsystem <- 8086/4de0
 1363 18:57:37.265101  PCI: 00:16.0 cmd <- 02
 1364 18:57:37.268091  PCI: 00:19.0 subsystem <- 8086/4dc5
 1365 18:57:37.271804  PCI: 00:19.0 cmd <- 02
 1366 18:57:37.274923  PCI: 00:19.2 subsystem <- 8086/4dc7
 1367 18:57:37.278603  PCI: 00:19.2 cmd <- 06
 1368 18:57:37.281442  PCI: 00:1a.0 subsystem <- 8086/4dc4
 1369 18:57:37.281525  PCI: 00:1a.0 cmd <- 06
 1370 18:57:37.288116  PCI: 00:1e.2 subsystem <- 8086/4daa
 1371 18:57:37.288203  PCI: 00:1e.2 cmd <- 06
 1372 18:57:37.291295  PCI: 00:1f.0 subsystem <- 8086/4d87
 1373 18:57:37.294376  PCI: 00:1f.0 cmd <- 407
 1374 18:57:37.297905  PCI: 00:1f.3 subsystem <- 8086/4dc8
 1375 18:57:37.301071  PCI: 00:1f.3 cmd <- 02
 1376 18:57:37.304169  PCI: 00:1f.5 subsystem <- 8086/4da4
 1377 18:57:37.308057  PCI: 00:1f.5 cmd <- 406
 1378 18:57:37.311701  done.
 1379 18:57:37.314883  BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
 1380 18:57:37.318114  Initializing devices...
 1381 18:57:37.321615  Root Device init
 1382 18:57:37.321707  mainboard: EC init
 1383 18:57:37.328365  Chrome EC: Set SMI mask to 0x0000000000000000
 1384 18:57:37.331302  Chrome EC: clear events_b mask to 0x0000000000000000
 1385 18:57:37.338191  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1386 18:57:37.344701  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
 1387 18:57:37.351431  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
 1388 18:57:37.354932  Chrome EC: Set WAKE mask to 0x0000000000000000
 1389 18:57:37.360926  Root Device init finished in 35 msecs
 1390 18:57:37.361030  PCI: 00:00.0 init
 1391 18:57:37.365292  CPU TDP = 6 Watts
 1392 18:57:37.369072  CPU PL1 = 7 Watts
 1393 18:57:37.369166  CPU PL2 = 12 Watts
 1394 18:57:37.372037  PCI: 00:00.0 init finished in 6 msecs
 1395 18:57:37.375689  PCI: 00:02.0 init
 1396 18:57:37.378580  GMA: Found VBT in CBFS
 1397 18:57:37.382288  GMA: Found valid VBT in CBFS
 1398 18:57:37.385336  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1399 18:57:37.395141                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1400 18:57:37.398673  PCI: 00:02.0 init finished in 18 msecs
 1401 18:57:37.398770  PCI: 00:08.0 init
 1402 18:57:37.402427  
 1403 18:57:37.405353  PCI: 00:08.0 init finished in 0 msecs
 1404 18:57:37.405440  PCI: 00:14.0 init
 1405 18:57:37.412049  XHCI: Updated LFPS sampling OFF time to 9 ms
 1406 18:57:37.415192  PCI: 00:14.0 init finished in 4 msecs
 1407 18:57:37.418285  PCI: 00:15.0 init
 1408 18:57:37.421929  I2C bus 0 version 0x3230302a
 1409 18:57:37.425034  DW I2C bus 0 at 0x7fd2a000 (400 KHz)
 1410 18:57:37.428685  PCI: 00:15.0 init finished in 6 msecs
 1411 18:57:37.428802  PCI: 00:15.1 init
 1412 18:57:37.431858  I2C bus 1 version 0x3230302a
 1413 18:57:37.435023  DW I2C bus 1 at 0x7fd2b000 (400 KHz)
 1414 18:57:37.441530  PCI: 00:15.1 init finished in 6 msecs
 1415 18:57:37.441629  PCI: 00:15.2 init
 1416 18:57:37.444733  I2C bus 2 version 0x3230302a
 1417 18:57:37.448287  DW I2C bus 2 at 0x7fd2c000 (400 KHz)
 1418 18:57:37.451237  PCI: 00:15.2 init finished in 6 msecs
 1419 18:57:37.455182  PCI: 00:15.3 init
 1420 18:57:37.457887  I2C bus 3 version 0x3230302a
 1421 18:57:37.461481  DW I2C bus 3 at 0x7fd2d000 (400 KHz)
 1422 18:57:37.465185  PCI: 00:15.3 init finished in 6 msecs
 1423 18:57:37.467974  PCI: 00:16.0 init
 1424 18:57:37.471706  PCI: 00:16.0 init finished in 0 msecs
 1425 18:57:37.474741  PCI: 00:19.0 init
 1426 18:57:37.474833  I2C bus 4 version 0x3230302a
 1427 18:57:37.481638  DW I2C bus 4 at 0x7fd2f000 (400 KHz)
 1428 18:57:37.484388  PCI: 00:19.0 init finished in 6 msecs
 1429 18:57:37.484478  PCI: 00:1a.0 init
 1430 18:57:37.491243  PCI: 00:1a.0 init finished in 0 msecs
 1431 18:57:37.491338  PCI: 00:1f.0 init
 1432 18:57:37.497953  IOAPIC: Initializing IOAPIC at 0xfec00000
 1433 18:57:37.500949  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1434 18:57:37.504504  IOAPIC: ID = 0x02
 1435 18:57:37.504587  IOAPIC: Dumping registers
 1436 18:57:37.507776    reg 0x0000: 0x02000000
 1437 18:57:37.510957    reg 0x0001: 0x00770020
 1438 18:57:37.514506    reg 0x0002: 0x00000000
 1439 18:57:37.517676  PCI: 00:1f.0 init finished in 21 msecs
 1440 18:57:37.517768  PCI: 00:1f.2 init
 1441 18:57:37.520768  
 1442 18:57:37.520855  Disabling ACPI via APMC.
 1443 18:57:37.527123  APMC done.
 1444 18:57:37.530198  PCI: 00:1f.2 init finished in 6 msecs
 1445 18:57:37.540943  PNP: 0c09.0 init
 1446 18:57:37.544899  Google Chrome EC uptime: 6.548 seconds
 1447 18:57:37.551088  Google Chrome AP resets since EC boot: 0
 1448 18:57:37.554591  Google Chrome most recent AP reset causes:
 1449 18:57:37.561332  Google Chrome EC reset flags at last EC boot: reset-pin
 1450 18:57:37.564262  PNP: 0c09.0 init finished in 18 msecs
 1451 18:57:37.564361  Devices initialized
 1452 18:57:37.567663  Show all devs... After init.
 1453 18:57:37.570980  Root Device: enabled 1
 1454 18:57:37.573909  CPU_CLUSTER: 0: enabled 1
 1455 18:57:37.577415  DOMAIN: 0000: enabled 1
 1456 18:57:37.577502  PCI: 00:00.0: enabled 1
 1457 18:57:37.580918  PCI: 00:02.0: enabled 1
 1458 18:57:37.584144  PCI: 00:04.0: enabled 1
 1459 18:57:37.584230  PCI: 00:05.0: enabled 1
 1460 18:57:37.587103  PCI: 00:09.0: enabled 0
 1461 18:57:37.590771  PCI: 00:12.6: enabled 0
 1462 18:57:37.593995  PCI: 00:14.0: enabled 1
 1463 18:57:37.594133  PCI: 00:14.1: enabled 0
 1464 18:57:37.597590  PCI: 00:14.2: enabled 0
 1465 18:57:37.600787  PCI: 00:14.3: enabled 1
 1466 18:57:37.603897  PCI: 00:14.5: enabled 1
 1467 18:57:37.603985  PCI: 00:15.0: enabled 1
 1468 18:57:37.607028  PCI: 00:15.1: enabled 1
 1469 18:57:37.610724  PCI: 00:15.2: enabled 1
 1470 18:57:37.613612  PCI: 00:15.3: enabled 1
 1471 18:57:37.613709  PCI: 00:16.0: enabled 1
 1472 18:57:37.617417  PCI: 00:16.1: enabled 0
 1473 18:57:37.620344  PCI: 00:16.4: enabled 0
 1474 18:57:37.620431  PCI: 00:16.5: enabled 0
 1475 18:57:37.623670  
 1476 18:57:37.623757  PCI: 00:17.0: enabled 0
 1477 18:57:37.627416  PCI: 00:19.0: enabled 1
 1478 18:57:37.630453  PCI: 00:19.1: enabled 0
 1479 18:57:37.630548  PCI: 00:19.2: enabled 1
 1480 18:57:37.633979  PCI: 00:1a.0: enabled 1
 1481 18:57:37.636965  PCI: 00:1c.0: enabled 0
 1482 18:57:37.639976  PCI: 00:1c.1: enabled 0
 1483 18:57:37.640064  PCI: 00:1c.2: enabled 0
 1484 18:57:37.643725  PCI: 00:1c.3: enabled 0
 1485 18:57:37.646718  PCI: 00:1c.4: enabled 0
 1486 18:57:37.650235  PCI: 00:1c.5: enabled 0
 1487 18:57:37.650314  PCI: 00:1c.6: enabled 0
 1488 18:57:37.653763  PCI: 00:1c.7: enabled 1
 1489 18:57:37.656687  PCI: 00:1e.0: enabled 0
 1490 18:57:37.659921  PCI: 00:1e.1: enabled 0
 1491 18:57:37.660010  PCI: 00:1e.2: enabled 1
 1492 18:57:37.663421  PCI: 00:1e.3: enabled 0
 1493 18:57:37.666571  PCI: 00:1f.0: enabled 1
 1494 18:57:37.666661  PCI: 00:1f.1: enabled 0
 1495 18:57:37.670084  PCI: 00:1f.2: enabled 1
 1496 18:57:37.673634  PCI: 00:1f.3: enabled 1
 1497 18:57:37.676711  PCI: 00:1f.4: enabled 0
 1498 18:57:37.676794  PCI: 00:1f.5: enabled 1
 1499 18:57:37.679611  PCI: 00:1f.7: enabled 0
 1500 18:57:37.683272  GENERIC: 0.0: enabled 1
 1501 18:57:37.686314  GENERIC: 0.0: enabled 1
 1502 18:57:37.686403  USB0 port 0: enabled 1
 1503 18:57:37.690070  GENERIC: 0.0: enabled 1
 1504 18:57:37.693120  I2C: 00:2c: enabled 1
 1505 18:57:37.693206  I2C: 00:15: enabled 1
 1506 18:57:37.696245  GENERIC: 0.0: enabled 0
 1507 18:57:37.700017  I2C: 00:15: enabled 1
 1508 18:57:37.700098  I2C: 00:10: enabled 0
 1509 18:57:37.703072  
 1510 18:57:37.703166  I2C: 00:10: enabled 0
 1511 18:57:37.705927  I2C: 00:2c: enabled 1
 1512 18:57:37.709462  I2C: 00:40: enabled 1
 1513 18:57:37.709554  I2C: 00:10: enabled 1
 1514 18:57:37.712767  I2C: 00:39: enabled 1
 1515 18:57:37.715863  I2C: 00:36: enabled 1
 1516 18:57:37.715964  I2C: 00:10: enabled 0
 1517 18:57:37.719729  I2C: 00:0c: enabled 1
 1518 18:57:37.722812  I2C: 00:50: enabled 1
 1519 18:57:37.722898  I2C: 00:1a: enabled 1
 1520 18:57:37.726298  I2C: 00:1a: enabled 0
 1521 18:57:37.729364  I2C: 00:1a: enabled 0
 1522 18:57:37.729444  I2C: 00:28: enabled 1
 1523 18:57:37.732377  I2C: 00:29: enabled 1
 1524 18:57:37.736054  PCI: 00:00.0: enabled 1
 1525 18:57:37.736135  SPI: 00: enabled 1
 1526 18:57:37.739701  PNP: 0c09.0: enabled 1
 1527 18:57:37.742243  GENERIC: 0.0: enabled 0
 1528 18:57:37.742322  USB2 port 0: enabled 1
 1529 18:57:37.745931  USB2 port 1: enabled 1
 1530 18:57:37.749086  USB2 port 2: enabled 1
 1531 18:57:37.752187  USB2 port 3: enabled 1
 1532 18:57:37.752266  USB2 port 4: enabled 0
 1533 18:57:37.755660  USB2 port 5: enabled 1
 1534 18:57:37.758827  USB2 port 6: enabled 0
 1535 18:57:37.758912  USB2 port 7: enabled 1
 1536 18:57:37.762409  USB3 port 0: enabled 1
 1537 18:57:37.765854  USB3 port 1: enabled 1
 1538 18:57:37.765941  USB3 port 2: enabled 1
 1539 18:57:37.768893  USB3 port 3: enabled 1
 1540 18:57:37.772658  APIC: 00: enabled 1
 1541 18:57:37.772747  APIC: 02: enabled 1
 1542 18:57:37.775530  PCI: 00:08.0: enabled 1
 1543 18:57:37.782467  BS: BS_DEV_INIT run times (exec / console): 24 / 436 ms
 1544 18:57:37.785601  FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
 1545 18:57:37.788757  ELOG: NV offset 0xbfa000 size 0x1000
 1546 18:57:37.796649  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1547 18:57:37.803603  ELOG: Event(17) added with size 13 at 2023-01-21 18:57:37 UTC
 1548 18:57:37.810107  ELOG: Event(92) added with size 9 at 2023-01-21 18:57:37 UTC
 1549 18:57:37.817045  ELOG: Event(93) added with size 9 at 2023-01-21 18:57:37 UTC
 1550 18:57:37.823368  ELOG: Event(9E) added with size 10 at 2023-01-21 18:57:37 UTC
 1551 18:57:37.829903  ELOG: Event(9F) added with size 14 at 2023-01-21 18:57:37 UTC
 1552 18:57:37.836916  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1553 18:57:37.839869  ELOG: Event(A1) added with size 10 at 2023-01-21 18:57:37 UTC
 1554 18:57:37.849855  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1555 18:57:37.856650  ELOG: Event(A0) added with size 9 at 2023-01-21 18:57:37 UTC
 1556 18:57:37.859615  elog_add_boot_reason: Logged dev mode boot
 1557 18:57:37.866275  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
 1558 18:57:37.866402  Finalize devices...
 1559 18:57:37.869335  Devices finalized
 1560 18:57:37.876043  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1561 18:57:37.879689  FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
 1562 18:57:37.886342  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1563 18:57:37.889301  ME: HFSTS1                  : 0x80030045
 1564 18:57:37.892530  ME: HFSTS2                  : 0x30280136
 1565 18:57:37.899177  ME: HFSTS3                  : 0x00000050
 1566 18:57:37.902193  ME: HFSTS4                  : 0x00004000
 1567 18:57:37.905862  ME: HFSTS5                  : 0x00000000
 1568 18:57:37.908952  ME: HFSTS6                  : 0x40400006
 1569 18:57:37.912103  ME: Manufacturing Mode      : NO
 1570 18:57:37.915777  ME: FW Partition Table      : OK
 1571 18:57:37.918893  ME: Bringup Loader Failure  : NO
 1572 18:57:37.922163  ME: Firmware Init Complete  : NO
 1573 18:57:37.925874  ME: Boot Options Present    : NO
 1574 18:57:37.928695  ME: Update In Progress      : NO
 1575 18:57:37.932525  ME: D0i3 Support            : YES
 1576 18:57:37.935573  ME: Low Power State Enabled : NO
 1577 18:57:37.938690  ME: CPU Replaced            : YES
 1578 18:57:37.942143  ME: CPU Replacement Valid   : YES
 1579 18:57:37.945154  ME: Current Working State   : 5
 1580 18:57:37.948779  ME: Current Operation State : 1
 1581 18:57:37.952037  ME: Current Operation Mode  : 3
 1582 18:57:37.955116  ME: Error Code              : 0
 1583 18:57:37.958765  ME: CPU Debug Disabled      : YES
 1584 18:57:37.961663  ME: TXT Support             : NO
 1585 18:57:37.968433  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
 1586 18:57:37.974944  CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
 1587 18:57:37.978006  ACPI: Writing ACPI tables at 76b27000.
 1588 18:57:37.981712  ACPI:    * FACS
 1589 18:57:37.981830  ACPI:    * DSDT
 1590 18:57:37.984765  Ramoops buffer: 0x100000@0x76a26000.
 1591 18:57:37.991468  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1592 18:57:37.994612  FMAP: area RW_VPD found @ bfc000 (8192 bytes)
 1593 18:57:37.997837  Google Chrome EC: version:
 1594 18:57:38.001609  	ro: magolor_1.1.9999-103b6f9
 1595 18:57:38.004566  	rw: magolor_1.1.9999-103b6f9
 1596 18:57:38.004664    running image: 1
 1597 18:57:38.008149  
 1598 18:57:38.011159  PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
 1599 18:57:38.015914  ACPI:    * FADT
 1600 18:57:38.016034  SCI is IRQ9
 1601 18:57:38.022308  ACPI: added table 1/32, length now 40
 1602 18:57:38.022398  ACPI:     * SSDT
 1603 18:57:38.025475  Found 1 CPU(s) with 2 core(s) each.
 1604 18:57:38.029005  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1605 18:57:38.036078  \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
 1606 18:57:38.038955  Could not locate 'wifi_sar' in VPD.
 1607 18:57:38.041918  Checking CBFS for default SAR values
 1608 18:57:38.048700  wifi_sar_defaults.hex has bad len in CBFS
 1609 18:57:38.052201  failed from getting SAR limits!
 1610 18:57:38.055503  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1611 18:57:38.062178  \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
 1612 18:57:38.065637  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
 1613 18:57:38.072286  \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
 1614 18:57:38.075366  \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
 1615 18:57:38.081636  \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
 1616 18:57:38.085166  \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
 1617 18:57:38.092046  \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
 1618 18:57:38.098256  \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
 1619 18:57:38.105201  \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
 1620 18:57:38.108186  \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
 1621 18:57:38.111840  
 1622 18:57:38.114817  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
 1623 18:57:38.121870  \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
 1624 18:57:38.124712  \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
 1625 18:57:38.127886  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1626 18:57:38.131594  
 1627 18:57:38.134660  PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
 1628 18:57:38.137617  PS2K: Passing 101 keymaps to kernel
 1629 18:57:38.144453  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1630 18:57:38.151440  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
 1631 18:57:38.158370  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
 1632 18:57:38.161155  \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
 1633 18:57:38.167717  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
 1634 18:57:38.171358  \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
 1635 18:57:38.177915  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1636 18:57:38.184649  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
 1637 18:57:38.191358  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1638 18:57:38.194484  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
 1639 18:57:38.200638  ACPI: added table 2/32, length now 44
 1640 18:57:38.200779  ACPI:    * MCFG
 1641 18:57:38.204253  ACPI: added table 3/32, length now 48
 1642 18:57:38.207337  ACPI:    * TPM2
 1643 18:57:38.210548  TPM2 log created at 0x76a16000
 1644 18:57:38.214006  ACPI: added table 4/32, length now 52
 1645 18:57:38.214102  ACPI:    * MADT
 1646 18:57:38.217249  SCI is IRQ9
 1647 18:57:38.221165  ACPI: added table 5/32, length now 56
 1648 18:57:38.221263  current = 76b2d580
 1649 18:57:38.224259  ACPI:    * DMAR
 1650 18:57:38.227469  ACPI: added table 6/32, length now 60
 1651 18:57:38.231037  ACPI: added table 7/32, length now 64
 1652 18:57:38.234021  ACPI:    * HPET
 1653 18:57:38.237480  ACPI: added table 8/32, length now 68
 1654 18:57:38.237568  ACPI: done.
 1655 18:57:38.240487  ACPI tables: 26304 bytes.
 1656 18:57:38.244145  smbios_write_tables: 76a15000
 1657 18:57:38.247289  EC returned error result code 3
 1658 18:57:38.250882  Couldn't obtain OEM name from CBI
 1659 18:57:38.253936  Create SMBIOS type 16
 1660 18:57:38.254023  Create SMBIOS type 17
 1661 18:57:38.257584  
 1662 18:57:38.257672  GENERIC: 0.0 (WIFI Device)
 1663 18:57:38.260799  SMBIOS tables: 913 bytes.
 1664 18:57:38.264441  Writing table forward entry at 0x00000500
 1665 18:57:38.271076  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
 1666 18:57:38.273984  Writing coreboot table at 0x76b4b000
 1667 18:57:38.280630   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1668 18:57:38.284136   1. 0000000000001000-000000000009ffff: RAM
 1669 18:57:38.290400   2. 00000000000a0000-00000000000fffff: RESERVED
 1670 18:57:38.293984   3. 0000000000100000-0000000076a14fff: RAM
 1671 18:57:38.300683   4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
 1672 18:57:38.303737   5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
 1673 18:57:38.310693   6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
 1674 18:57:38.317081   7. 0000000077000000-000000007fbfffff: RESERVED
 1675 18:57:38.320593   8. 00000000c0000000-00000000cfffffff: RESERVED
 1676 18:57:38.326846   9. 00000000fb000000-00000000fb000fff: RESERVED
 1677 18:57:38.330588  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1678 18:57:38.333644  11. 00000000fea80000-00000000fea87fff: RESERVED
 1679 18:57:38.340167  12. 00000000fed80000-00000000fed87fff: RESERVED
 1680 18:57:38.343480  13. 00000000fed90000-00000000fed92fff: RESERVED
 1681 18:57:38.349793  14. 00000000feda0000-00000000feda1fff: RESERVED
 1682 18:57:38.353531  15. 0000000100000000-00000001803fffff: RAM
 1683 18:57:38.356631  Passing 4 GPIOs to payload:
 1684 18:57:38.360242              NAME |       PORT | POLARITY |     VALUE
 1685 18:57:38.363082  
 1686 18:57:38.366240               lid |  undefined |     high |      high
 1687 18:57:38.373416             power |  undefined |     high |       low
 1688 18:57:38.376468             oprom |  undefined |     high |       low
 1689 18:57:38.382913          EC in RW | 0x000000b9 |     high |       low
 1690 18:57:38.389436  Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum ddb9
 1691 18:57:38.393143  coreboot table: 1504 bytes.
 1692 18:57:38.396122  IMD ROOT    0. 0x76fff000 0x00001000
 1693 18:57:38.399834  IMD SMALL   1. 0x76ffe000 0x00001000
 1694 18:57:38.402960  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1695 18:57:38.406033  CONSOLE     3. 0x76c2e000 0x00020000
 1696 18:57:38.409758  FMAP        4. 0x76c2d000 0x00000578
 1697 18:57:38.413001  TIME STAMP  5. 0x76c2c000 0x00000910
 1698 18:57:38.416001  VBOOT WORK  6. 0x76c18000 0x00014000
 1699 18:57:38.422664  ROMSTG STCK 7. 0x76c17000 0x00001000
 1700 18:57:38.425862  AFTER CAR   8. 0x76c0d000 0x0000a000
 1701 18:57:38.429534  RAMSTAGE    9. 0x76ba7000 0x00066000
 1702 18:57:38.432737  REFCODE    10. 0x76b67000 0x00040000
 1703 18:57:38.436127  SMM BACKUP 11. 0x76b57000 0x00010000
 1704 18:57:38.439345  4f444749   12. 0x76b55000 0x00002000
 1705 18:57:38.443074  EXT VBT13. 0x76b53000 0x00001c43
 1706 18:57:38.445806  COREBOOT   14. 0x76b4b000 0x00008000
 1707 18:57:38.449161  ACPI       15. 0x76b27000 0x00024000
 1708 18:57:38.452808  ACPI GNVS  16. 0x76b26000 0x00001000
 1709 18:57:38.455802  
 1710 18:57:38.459624  RAMOOPS    17. 0x76a26000 0x00100000
 1711 18:57:38.462629  TPM2 TCGLOG18. 0x76a16000 0x00010000
 1712 18:57:38.465660  SMBIOS     19. 0x76a15000 0x00000800
 1713 18:57:38.465749  IMD small region:
 1714 18:57:38.472175    IMD ROOT    0. 0x76ffec00 0x00000400
 1715 18:57:38.475930    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1716 18:57:38.478905    VPD         2. 0x76ffeb80 0x0000004c
 1717 18:57:38.482594    POWER STATE 3. 0x76ffeb40 0x00000040
 1718 18:57:38.485490    ROMSTAGE    4. 0x76ffeb20 0x00000004
 1719 18:57:38.489164    MEM INFO    5. 0x76ffe940 0x000001e0
 1720 18:57:38.495468  BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
 1721 18:57:38.498998  MTRR: Physical address space:
 1722 18:57:38.505626  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1723 18:57:38.512536  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1724 18:57:38.518577  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1725 18:57:38.525853  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1726 18:57:38.532140  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1727 18:57:38.535249  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1728 18:57:38.541839  0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
 1729 18:57:38.548680  MTRR: Fixed MSR 0x250 0x0606060606060606
 1730 18:57:38.551745  MTRR: Fixed MSR 0x258 0x0606060606060606
 1731 18:57:38.554938  MTRR: Fixed MSR 0x259 0x0000000000000000
 1732 18:57:38.558427  MTRR: Fixed MSR 0x268 0x0606060606060606
 1733 18:57:38.561535  MTRR: Fixed MSR 0x269 0x0606060606060606
 1734 18:57:38.568120  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1735 18:57:38.571783  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1736 18:57:38.574827  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1737 18:57:38.577967  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1738 18:57:38.585130  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1739 18:57:38.588224  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1740 18:57:38.591239  call enable_fixed_mtrr()
 1741 18:57:38.594854  CPU physical address size: 39 bits
 1742 18:57:38.597881  MTRR: default type WB/UC MTRR counts: 6/5.
 1743 18:57:38.601084  MTRR: UC selected as default type.
 1744 18:57:38.607722  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1745 18:57:38.614465  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1746 18:57:38.620778  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1747 18:57:38.627548  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1748 18:57:38.634422  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1749 18:57:38.634551  
 1750 18:57:38.634654  MTRR check
 1751 18:57:38.637497  Fixed MTRRs   : Enabled
 1752 18:57:38.640560  Variable MTRRs: Enabled
 1753 18:57:38.640673  
 1754 18:57:38.644131  MTRR: Fixed MSR 0x250 0x0606060606060606
 1755 18:57:38.647272  MTRR: Fixed MSR 0x258 0x0606060606060606
 1756 18:57:38.654009  MTRR: Fixed MSR 0x259 0x0000000000000000
 1757 18:57:38.656880  MTRR: Fixed MSR 0x268 0x0606060606060606
 1758 18:57:38.660148  MTRR: Fixed MSR 0x269 0x0606060606060606
 1759 18:57:38.663987  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1760 18:57:38.666943  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1761 18:57:38.670474  
 1762 18:57:38.673413  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1763 18:57:38.677436  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1764 18:57:38.680317  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1765 18:57:38.683328  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1766 18:57:38.689983  BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
 1767 18:57:38.693516  call enable_fixed_mtrr()
 1768 18:57:38.697196  Checking cr50 for pending updates
 1769 18:57:38.700361  CPU physical address size: 39 bits
 1770 18:57:38.703952  Reading cr50 TPM mode
 1771 18:57:38.713791  BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
 1772 18:57:38.721225  CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
 1773 18:57:38.724589  Checking segment from ROM address 0xfff9d5b8
 1774 18:57:38.731431  Checking segment from ROM address 0xfff9d5d4
 1775 18:57:38.734428  Loading segment from ROM address 0xfff9d5b8
 1776 18:57:38.737657    code (compression=0)
 1777 18:57:38.744435    New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
 1778 18:57:38.754258  Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
 1779 18:57:38.757722  it's not compressed!
 1780 18:57:38.882906  [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
 1781 18:57:38.889463  Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
 1782 18:57:38.897451  Loading segment from ROM address 0xfff9d5d4
 1783 18:57:38.900517    Entry Point 0x30000000
 1784 18:57:38.900619  Loaded segments
 1785 18:57:38.906959  BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
 1786 18:57:38.923292  Finalizing chipset.
 1787 18:57:38.926423  Finalizing SMM.
 1788 18:57:38.926529  APMC done.
 1789 18:57:38.933247  BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
 1790 18:57:38.936321  mp_park_aps done after 0 msecs.
 1791 18:57:38.939541  Jumping to boot code at 0x30000000(0x76b4b000)
 1792 18:57:38.949989  CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
 1793 18:57:38.950116  
 1794 18:57:38.950188  
 1795 18:57:38.950253  
 1796 18:57:38.953158  Starting depthcharge on Magolor...
 1797 18:57:38.953275  
 1798 18:57:38.953634  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 1799 18:57:38.953745  start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
 1800 18:57:38.953831  Setting prompt string to ['dedede:']
 1801 18:57:38.953915  bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
 1802 18:57:38.962827  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 1803 18:57:38.962923  
 1804 18:57:38.969659  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 1805 18:57:38.969746  
 1806 18:57:38.972580  fw_config match found: AUDIO_AMP=UNPROVISIONED
 1807 18:57:38.972656  
 1808 18:57:38.975620  Wipe memory regions:
 1809 18:57:38.975734  
 1810 18:57:38.979399  	[0x00000000001000, 0x000000000a0000)
 1811 18:57:38.979476  
 1812 18:57:38.982356  	[0x00000000100000, 0x00000030000000)
 1813 18:57:38.982458  
 1814 18:57:39.115385  	[0x00000031062170, 0x00000076a15000)
 1815 18:57:39.115589  
 1816 18:57:39.288087  	[0x00000100000000, 0x00000180400000)
 1817 18:57:39.288247  
 1818 18:57:40.351130  R8152: Initializing
 1819 18:57:40.351289  
 1820 18:57:40.354942  Version 6 (ocp_data = 5c30)
 1821 18:57:40.355034  
 1822 18:57:40.357864  R8152: Done initializing
 1823 18:57:40.357963  
 1824 18:57:40.361526  Adding net device
 1825 18:57:40.361609  
 1826 18:57:40.364476  [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
 1827 18:57:40.368414  
 1828 18:57:40.368506  
 1829 18:57:40.368574  
 1830 18:57:40.368852  Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1832 18:57:40.469590  dedede: tftpboot 192.168.201.1 8815438/tftp-deploy-3dwy96ri/kernel/bzImage 8815438/tftp-deploy-3dwy96ri/kernel/cmdline 8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
 1833 18:57:40.469791  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1834 18:57:40.469891  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
 1835 18:57:40.474026  tftpboot 192.168.201.1 8815438/tftp-deploy-3dwy96ri/kernel/bzImaoy-3dwy96ri/kernel/cmdline 8815438/tftp-deploy-3dwy96ri/ramdisk/ramdisk.cpio.gz
 1836 18:57:40.474139  
 1837 18:57:40.474229  Waiting for link
 1838 18:57:40.474303  
 1839 18:57:40.675962  done.
 1840 18:57:40.676126  
 1841 18:57:40.676203  MAC: 00:24:32:30:7b:c4
 1842 18:57:40.676280  
 1843 18:57:40.679227  Sending DHCP discover... done.
 1844 18:57:40.679308  
 1845 18:57:40.682743  Waiting for reply... done.
 1846 18:57:40.682827  
 1847 18:57:40.686332  Sending DHCP request... done.
 1848 18:57:40.686422  
 1849 18:57:40.689426  Waiting for reply... done.
 1850 18:57:40.689506  
 1851 18:57:40.692466  My ip is 192.168.201.12
 1852 18:57:40.692543  
 1853 18:57:40.696223  The DHCP server ip is 192.168.201.1
 1854 18:57:40.696312  
 1855 18:57:40.702743  TFTP server IP predefined by user: 192.168.201.1
 1856 18:57:40.702851  
 1857 18:57:40.709656  Bootfile predefined by user: 8815438/tftp-deploy-3dwy96ri/kernel/bzImage
 1858 18:57:40.709753  
 1859 18:57:40.712560  Sending tftp read request... done.
 1860 18:57:40.712649  
 1861 18:57:40.715405  Waiting for the transfer... 
 1862 18:57:40.715494  
 1863 18:57:41.292391  00000000 ################################################################
 1864 18:57:41.292550  
 1865 18:57:41.855895  00080000 ################################################################
 1866 18:57:41.856048  
 1867 18:57:42.423755  00100000 ################################################################
 1868 18:57:42.423911  
 1869 18:57:42.995643  00180000 ################################################################
 1870 18:57:42.995805  
 1871 18:57:43.572476  00200000 ################################################################
 1872 18:57:43.572685  
 1873 18:57:44.148478  00280000 ################################################################
 1874 18:57:44.148688  
 1875 18:57:44.727626  00300000 ################################################################
 1876 18:57:44.727788  
 1877 18:57:45.313239  00380000 ################################################################
 1878 18:57:45.313388  
 1879 18:57:45.883580  00400000 ################################################################
 1880 18:57:45.883782  
 1881 18:57:46.441749  00480000 ################################################################
 1882 18:57:46.441928  
 1883 18:57:46.990258  00500000 ################################################################
 1884 18:57:46.990421  
 1885 18:57:47.556208  00580000 ################################################################
 1886 18:57:47.556376  
 1887 18:57:48.131719  00600000 ################################################################
 1888 18:57:48.131883  
 1889 18:57:48.689773  00680000 ################################################################
 1890 18:57:48.689950  
 1891 18:57:49.256460  00700000 ################################################################
 1892 18:57:49.256675  
 1893 18:57:49.834053  00780000 ################################################################
 1894 18:57:49.834208  
 1895 18:57:50.423145  00800000 ################################################################
 1896 18:57:50.423303  
 1897 18:57:50.977791  00880000 ################################################################
 1898 18:57:50.977940  
 1899 18:57:51.258401  00900000 ################################## done.
 1900 18:57:51.258555  
 1901 18:57:51.261497  The bootfile was 9711616 bytes long.
 1902 18:57:51.261611  
 1903 18:57:51.264563  Sending tftp read request... done.
 1904 18:57:51.264656  
 1905 18:57:51.267610  Waiting for the transfer... 
 1906 18:57:51.267698  
 1907 18:57:51.803330  00000000 ################################################################
 1908 18:57:51.803477  
 1909 18:57:52.340538  00080000 ################################################################
 1910 18:57:52.340684  
 1911 18:57:52.885070  00100000 ################################################################
 1912 18:57:52.885224  
 1913 18:57:53.427738  00180000 ################################################################
 1914 18:57:53.427889  
 1915 18:57:53.975473  00200000 ################################################################
 1916 18:57:53.975639  
 1917 18:57:54.514782  00280000 ################################################################
 1918 18:57:54.514930  
 1919 18:57:55.054681  00300000 ################################################################
 1920 18:57:55.054837  
 1921 18:57:55.604045  00380000 ################################################################
 1922 18:57:55.604201  
 1923 18:57:56.160321  00400000 ################################################################
 1924 18:57:56.160488  
 1925 18:57:56.711423  00480000 ################################################################
 1926 18:57:56.711570  
 1927 18:57:56.994469  00500000 ################################### done.
 1928 18:57:56.994651  
 1929 18:57:56.997452  Sending tftp read request... done.
 1930 18:57:56.997565  
 1931 18:57:57.001185  Waiting for the transfer... 
 1932 18:57:57.001299  
 1933 18:57:57.001373  00000000 # done.
 1934 18:57:57.001444  
 1935 18:57:57.010681  Command line loaded dynamically from TFTP file: 8815438/tftp-deploy-3dwy96ri/kernel/cmdline
 1936 18:57:57.010856  
 1937 18:57:57.033489  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8815438/extract-nfsrootfs-66m8w9bn,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 1938 18:57:57.033647  
 1939 18:57:57.037392  ec_init: CrosEC protocol v3 supported (256, 256)
 1940 18:57:57.037505  
 1941 18:57:57.047217  Shutting down all USB controllers.
 1942 18:57:57.047343  
 1943 18:57:57.047452  Removing current net device
 1944 18:57:57.047535  
 1945 18:57:57.050224  Finalizing coreboot
 1946 18:57:57.050325  
 1947 18:57:57.056853  Exiting depthcharge with code 4 at timestamp: 24907288
 1948 18:57:57.056964  
 1949 18:57:57.057043  
 1950 18:57:57.057109  Starting kernel ...
 1951 18:57:57.057171  
 1952 18:57:57.057233  
 1953 18:57:57.057296  
 1954 18:57:57.057731  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 1955 18:57:57.057847  start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
 1956 18:57:57.057925  Setting prompt string to ['Linux version [0-9]']
 1957 18:57:57.058000  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 1958 18:57:57.058112  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 1960 19:02:25.058089  end: 2.2.5 auto-login-action (duration 00:04:28) [common]
 1962 19:02:25.058327  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
 1964 19:02:25.058491  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 1967 19:02:25.058778  end: 2 depthcharge-action (duration 00:05:00) [common]
 1969 19:02:25.059012  Cleaning after the job
 1970 19:02:25.059101  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/ramdisk
 1971 19:02:25.059573  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/kernel
 1972 19:02:25.060284  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/nfsrootfs
 1973 19:02:25.092412  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815438/tftp-deploy-3dwy96ri/modules
 1974 19:02:25.092721  start: 5.1 power-off (timeout 00:00:30) [common]
 1975 19:02:25.092907  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
 1976 19:02:25.113593  >> Command sent successfully.

 1977 19:02:25.115762  Returned 0 in 0 seconds
 1978 19:02:25.216527  end: 5.1 power-off (duration 00:00:00) [common]
 1980 19:02:25.216858  start: 5.2 read-feedback (timeout 00:10:00) [common]
 1981 19:02:25.217107  Listened to connection for namespace 'common' for up to 1s
 1982 19:02:26.222063  Finalising connection for namespace 'common'
 1983 19:02:26.222261  Disconnecting from shell: Finalise
 1984 19:02:26.322992  end: 5.2 read-feedback (duration 00:00:01) [common]
 1985 19:02:26.323284  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8815438
 1986 19:02:26.418192  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8815438
 1987 19:02:26.418379  JobError: Your job cannot terminate cleanly.