Boot log: asus-cx9400-volteer

    1 18:57:17.420213  lava-dispatcher, installed at version: 2022.11
    2 18:57:17.420400  start: 0 validate
    3 18:57:17.420534  Start time: 2023-01-21 18:57:17.420526+00:00 (UTC)
    4 18:57:17.420660  Using caching service: 'http://localhost/cache/?uri=%s'
    5 18:57:17.420787  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
    6 18:57:17.431884  Using caching service: 'http://localhost/cache/?uri=%s'
    7 18:57:17.432011  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 18:57:17.446619  Using caching service: 'http://localhost/cache/?uri=%s'
    9 18:57:17.446755  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 18:57:17.448736  Using caching service: 'http://localhost/cache/?uri=%s'
   11 18:57:17.448849  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 18:57:17.459908  validate duration: 0.04
   14 18:57:17.460199  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 18:57:17.460302  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 18:57:17.460390  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 18:57:17.460492  Not decompressing ramdisk as can be used compressed.
   18 18:57:17.460582  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
   19 18:57:17.460652  saving as /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/ramdisk/initrd.cpio.gz
   20 18:57:17.460721  total size: 5432135 (5MB)
   21 18:57:17.463287  progress   0% (0MB)
   22 18:57:17.471320  progress   5% (0MB)
   23 18:57:17.478032  progress  10% (0MB)
   24 18:57:17.483570  progress  15% (0MB)
   25 18:57:17.490916  progress  20% (1MB)
   26 18:57:17.497639  progress  25% (1MB)
   27 18:57:17.504281  progress  30% (1MB)
   28 18:57:17.511847  progress  35% (1MB)
   29 18:57:17.518536  progress  40% (2MB)
   30 18:57:17.525398  progress  45% (2MB)
   31 18:57:17.531754  progress  50% (2MB)
   32 18:57:17.540244  progress  55% (2MB)
   33 18:57:17.547386  progress  60% (3MB)
   34 18:57:17.553057  progress  65% (3MB)
   35 18:57:17.560358  progress  70% (3MB)
   36 18:57:17.567109  progress  75% (3MB)
   37 18:57:17.573961  progress  80% (4MB)
   38 18:57:17.581557  progress  85% (4MB)
   39 18:57:17.588791  progress  90% (4MB)
   40 18:57:17.595542  progress  95% (4MB)
   41 18:57:17.601364  progress 100% (5MB)
   42 18:57:17.601683  5MB downloaded in 0.14s (36.75MB/s)
   43 18:57:17.601860  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 18:57:17.602116  end: 1.1 download-retry (duration 00:00:00) [common]
   46 18:57:17.602206  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 18:57:17.602295  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 18:57:17.602397  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 18:57:17.602465  saving as /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/kernel/bzImage
   50 18:57:17.602527  total size: 9711616 (9MB)
   51 18:57:17.602589  No compression specified
   52 18:57:17.618019  progress   0% (0MB)
   53 18:57:17.653420  progress   5% (0MB)
   54 18:57:17.674147  progress  10% (0MB)
   55 18:57:17.699610  progress  15% (1MB)
   56 18:57:17.725862  progress  20% (1MB)
   57 18:57:17.751958  progress  25% (2MB)
   58 18:57:17.773029  progress  30% (2MB)
   59 18:57:17.798761  progress  35% (3MB)
   60 18:57:17.825830  progress  40% (3MB)
   61 18:57:17.846646  progress  45% (4MB)
   62 18:57:17.873383  progress  50% (4MB)
   63 18:57:17.898255  progress  55% (5MB)
   64 18:57:17.924165  progress  60% (5MB)
   65 18:57:17.945081  progress  65% (6MB)
   66 18:57:17.971161  progress  70% (6MB)
   67 18:57:17.997086  progress  75% (6MB)
   68 18:57:18.019604  progress  80% (7MB)
   69 18:57:18.044893  progress  85% (7MB)
   70 18:57:18.071601  progress  90% (8MB)
   71 18:57:18.097498  progress  95% (8MB)
   72 18:57:18.118434  progress 100% (9MB)
   73 18:57:18.118705  9MB downloaded in 0.52s (17.94MB/s)
   74 18:57:18.118871  end: 1.2.1 http-download (duration 00:00:01) [common]
   76 18:57:18.119154  end: 1.2 download-retry (duration 00:00:01) [common]
   77 18:57:18.119242  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 18:57:18.119329  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 18:57:18.119433  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
   80 18:57:18.119504  saving as /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/nfsrootfs/full.rootfs.tar
   81 18:57:18.119565  total size: 133346544 (127MB)
   82 18:57:18.119626  Using unxz to decompress xz
   83 18:57:18.124330  progress   0% (0MB)
   84 18:57:18.459767  progress   5% (6MB)
   85 18:57:18.826347  progress  10% (12MB)
   86 18:57:19.123371  progress  15% (19MB)
   87 18:57:19.330751  progress  20% (25MB)
   88 18:57:19.583268  progress  25% (31MB)
   89 18:57:19.930070  progress  30% (38MB)
   90 18:57:20.281331  progress  35% (44MB)
   91 18:57:20.681783  progress  40% (50MB)
   92 18:57:21.067928  progress  45% (57MB)
   93 18:57:21.425052  progress  50% (63MB)
   94 18:57:21.798445  progress  55% (69MB)
   95 18:57:22.164056  progress  60% (76MB)
   96 18:57:22.530508  progress  65% (82MB)
   97 18:57:22.898656  progress  70% (89MB)
   98 18:57:23.268206  progress  75% (95MB)
   99 18:57:23.716894  progress  80% (101MB)
  100 18:57:24.160112  progress  85% (108MB)
  101 18:57:24.425659  progress  90% (114MB)
  102 18:57:24.769232  progress  95% (120MB)
  103 18:57:25.163248  progress 100% (127MB)
  104 18:57:25.168970  127MB downloaded in 7.05s (18.04MB/s)
  105 18:57:25.169260  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 18:57:25.169534  end: 1.3 download-retry (duration 00:00:07) [common]
  108 18:57:25.169631  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 18:57:25.169723  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 18:57:25.169844  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 18:57:25.169915  saving as /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/modules/modules.tar
  112 18:57:25.169977  total size: 64624 (0MB)
  113 18:57:25.170055  Using unxz to decompress xz
  114 18:57:25.213757  progress  50% (0MB)
  115 18:57:25.230437  progress 100% (0MB)
  116 18:57:25.240386  0MB downloaded in 0.07s (0.88MB/s)
  117 18:57:25.241361  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 18:57:25.242642  end: 1.4 download-retry (duration 00:00:00) [common]
  120 18:57:25.243152  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 18:57:25.243656  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 18:57:26.585161  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8815443/extract-nfsrootfs-s9425vun
  123 18:57:26.585366  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 18:57:26.585475  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  125 18:57:26.585618  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4
  126 18:57:26.585722  makedir: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin
  127 18:57:26.585808  makedir: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/tests
  128 18:57:26.585891  makedir: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/results
  129 18:57:26.585993  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-add-keys
  130 18:57:26.586128  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-add-sources
  131 18:57:26.586247  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-background-process-start
  132 18:57:26.586365  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-background-process-stop
  133 18:57:26.586481  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-common-functions
  134 18:57:26.586594  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-echo-ipv4
  135 18:57:26.586707  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-install-packages
  136 18:57:26.586824  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-installed-packages
  137 18:57:26.586977  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-os-build
  138 18:57:26.587091  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-probe-channel
  139 18:57:26.587202  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-probe-ip
  140 18:57:26.587313  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-target-ip
  141 18:57:26.587430  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-target-mac
  142 18:57:26.587583  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-target-storage
  143 18:57:26.587700  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-case
  144 18:57:26.587812  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-event
  145 18:57:26.587924  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-feedback
  146 18:57:26.588036  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-raise
  147 18:57:26.588146  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-reference
  148 18:57:26.588256  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-runner
  149 18:57:26.588367  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-set
  150 18:57:26.588490  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-test-shell
  151 18:57:26.588622  Updating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-install-packages (oe)
  152 18:57:26.588741  Updating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/bin/lava-installed-packages (oe)
  153 18:57:26.588852  Creating /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/environment
  154 18:57:26.588940  LAVA metadata
  155 18:57:26.589019  - LAVA_JOB_ID=8815443
  156 18:57:26.589085  - LAVA_DISPATCHER_IP=192.168.201.1
  157 18:57:26.589194  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  158 18:57:26.589261  skipped lava-vland-overlay
  159 18:57:26.589347  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 18:57:26.589432  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  161 18:57:26.589495  skipped lava-multinode-overlay
  162 18:57:26.589581  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 18:57:26.589664  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  164 18:57:26.589743  Loading test definitions
  165 18:57:26.589836  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
  166 18:57:26.589908  Using /lava-8815443 at stage 0
  167 18:57:26.590215  uuid=8815443_1.5.2.3.1 testdef=None
  168 18:57:26.590309  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 18:57:26.590397  start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
  170 18:57:26.590878  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 18:57:26.591536  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
  173 18:57:26.592111  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 18:57:26.592353  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
  176 18:57:26.592900  runner path: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/0/tests/0_dmesg test_uuid 8815443_1.5.2.3.1
  177 18:57:26.593046  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 18:57:26.593281  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
  180 18:57:26.593355  Using /lava-8815443 at stage 1
  181 18:57:26.593597  uuid=8815443_1.5.2.3.5 testdef=None
  182 18:57:26.593688  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 18:57:26.593776  start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
  184 18:57:26.594218  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 18:57:26.594445  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
  187 18:57:26.595061  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 18:57:26.595303  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
  190 18:57:26.595857  runner path: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/1/tests/1_bootrr test_uuid 8815443_1.5.2.3.5
  191 18:57:26.596000  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 18:57:26.596214  Creating lava-test-runner.conf files
  194 18:57:26.596280  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/0 for stage 0
  195 18:57:26.596364  - 0_dmesg
  196 18:57:26.596439  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815443/lava-overlay-2ggsg1k4/lava-8815443/1 for stage 1
  197 18:57:26.596523  - 1_bootrr
  198 18:57:26.596615  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 18:57:26.596701  start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
  200 18:57:26.602470  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 18:57:26.602578  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
  202 18:57:26.602669  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 18:57:26.602760  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 18:57:26.602849  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
  205 18:57:26.704872  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 18:57:26.705224  start: 1.5.4 extract-modules (timeout 00:09:51) [common]
  207 18:57:26.705336  extracting modules file /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815443/extract-nfsrootfs-s9425vun
  208 18:57:26.709465  extracting modules file /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815443/extract-overlay-ramdisk-n49cvig7/ramdisk
  209 18:57:26.713320  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 18:57:26.713436  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  211 18:57:26.713521  [common] Applying overlay to NFS
  212 18:57:26.713596  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815443/compress-overlay-zbebvo_p/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8815443/extract-nfsrootfs-s9425vun
  213 18:57:26.717611  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 18:57:26.717719  start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
  215 18:57:26.717816  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 18:57:26.717913  start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
  217 18:57:26.717992  Building ramdisk /var/lib/lava/dispatcher/tmp/8815443/extract-overlay-ramdisk-n49cvig7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8815443/extract-overlay-ramdisk-n49cvig7/ramdisk
  218 18:57:26.751503  >> 24777 blocks

  219 18:57:27.248216  rename /var/lib/lava/dispatcher/tmp/8815443/extract-overlay-ramdisk-n49cvig7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
  220 18:57:27.248675  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 18:57:27.248839  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  222 18:57:27.248959  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  223 18:57:27.249058  No mkimage arch provided, not using FIT.
  224 18:57:27.249149  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 18:57:27.249239  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 18:57:27.249337  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 18:57:27.249434  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
  228 18:57:27.249529  No LXC device requested
  229 18:57:27.249613  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 18:57:27.249711  start: 1.7 deploy-device-env (timeout 00:09:50) [common]
  231 18:57:27.249794  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 18:57:27.249870  Checking files for TFTP limit of 4294967296 bytes.
  233 18:57:27.250272  end: 1 tftp-deploy (duration 00:00:10) [common]
  234 18:57:27.250376  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 18:57:27.250472  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 18:57:27.250595  substitutions:
  237 18:57:27.250663  - {DTB}: None
  238 18:57:27.250729  - {INITRD}: 8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
  239 18:57:27.250790  - {KERNEL}: 8815443/tftp-deploy-vb5iyu23/kernel/bzImage
  240 18:57:27.250851  - {LAVA_MAC}: None
  241 18:57:27.250915  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8815443/extract-nfsrootfs-s9425vun
  242 18:57:27.250973  - {NFS_SERVER_IP}: 192.168.201.1
  243 18:57:27.251033  - {PRESEED_CONFIG}: None
  244 18:57:27.251090  - {PRESEED_LOCAL}: None
  245 18:57:27.251145  - {RAMDISK}: 8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
  246 18:57:27.251202  - {ROOT_PART}: None
  247 18:57:27.251257  - {ROOT}: None
  248 18:57:27.251313  - {SERVER_IP}: 192.168.201.1
  249 18:57:27.251368  - {TEE}: None
  250 18:57:27.251424  Parsed boot commands:
  251 18:57:27.251478  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 18:57:27.251634  Parsed boot commands: tftpboot 192.168.201.1 8815443/tftp-deploy-vb5iyu23/kernel/bzImage 8815443/tftp-deploy-vb5iyu23/kernel/cmdline 8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
  253 18:57:27.251729  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 18:57:27.251819  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 18:57:27.251910  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 18:57:27.251997  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 18:57:27.252065  Not connected, no need to disconnect.
  258 18:57:27.252143  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 18:57:27.252226  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 18:57:27.252297  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
  261 18:57:27.254959  Setting prompt string to ['lava-test: # ']
  262 18:57:27.255241  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 18:57:27.255343  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 18:57:27.255442  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 18:57:27.255534  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 18:57:27.255716  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
  267 18:57:27.274945  >> Command sent successfully.

  268 18:57:27.276962  Returned 0 in 0 seconds
  269 18:57:27.377996  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  271 18:57:27.379230  end: 2.2.2 reset-device (duration 00:00:00) [common]
  272 18:57:27.379658  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  273 18:57:27.380085  Setting prompt string to 'Starting depthcharge on Voema...'
  274 18:57:27.380396  Changing prompt to 'Starting depthcharge on Voema...'
  275 18:57:27.380700  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  276 18:57:27.381762  [Enter `^Ec?' for help]
  277 18:57:35.745251  
  278 18:57:35.745424  
  279 18:57:35.755151  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  280 18:57:35.758269  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
  281 18:57:35.764748  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  282 18:57:35.768584  CPU: AES supported, TXT NOT supported, VT supported
  283 18:57:35.775073  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  284 18:57:35.781953  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  285 18:57:35.785415  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  286 18:57:35.788065  VBOOT: Loading verstage.
  287 18:57:35.792125  FMAP: Found "FLASH" version 1.1 at 0x1804000.
  288 18:57:35.795372  
  289 18:57:35.798491  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  290 18:57:35.801658  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  291 18:57:35.812433  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  292 18:57:35.818681  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  293 18:57:35.818809  
  294 18:57:35.818905  
  295 18:57:35.831636  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  296 18:57:35.845667  Probing TPM: . done!
  297 18:57:35.848925  TPM ready after 0 ms
  298 18:57:35.852478  Connected to device vid:did:rid of 1ae0:0028:00
  299 18:57:35.863611  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  300 18:57:35.870619  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  301 18:57:35.873445  Initialized TPM device CR50 revision 0
  302 18:57:35.925433  tlcl_send_startup: Startup return code is 0
  303 18:57:35.925583  TPM: setup succeeded
  304 18:57:35.939486  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  305 18:57:35.953684  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  306 18:57:35.966380  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  307 18:57:35.976223  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  308 18:57:35.980242  Chrome EC: UHEPI supported
  309 18:57:35.983396  Phase 1
  310 18:57:35.986547  FMAP: area GBB found @ 1805000 (458752 bytes)
  311 18:57:35.993431  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  312 18:57:35.996963  
  313 18:57:36.003772  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  314 18:57:36.009790  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  315 18:57:36.016950  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  316 18:57:36.020513  Recovery requested (1009000e)
  317 18:57:36.022995  TPM: Extending digest for VBOOT: boot mode into PCR 0
  318 18:57:36.035180  tlcl_extend: response is 0
  319 18:57:36.041100  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  320 18:57:36.050790  tlcl_extend: response is 0
  321 18:57:36.057623  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  322 18:57:36.064304  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  323 18:57:36.071099  BS: verstage times (exec / console): total (unknown) / 142 ms
  324 18:57:36.071236  
  325 18:57:36.071309  
  326 18:57:36.084382  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  327 18:57:36.090768  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  328 18:57:36.094052  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  329 18:57:36.097720  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  330 18:57:36.104371  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  331 18:57:36.107472  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  332 18:57:36.111050  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
  333 18:57:36.114122  TCO_STS:   0000 0000
  334 18:57:36.118253  GEN_PMCON: d0015038 00002200
  335 18:57:36.120879  GBLRST_CAUSE: 00000000 00000000
  336 18:57:36.120970  HPR_CAUSE0: 00000000
  337 18:57:36.124144  prev_sleep_state 5
  338 18:57:36.127236  Boot Count incremented to 14868
  339 18:57:36.134419  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  340 18:57:36.140997  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  341 18:57:36.148394  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  342 18:57:36.153953  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  343 18:57:36.158874  Chrome EC: UHEPI supported
  344 18:57:36.165621  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  345 18:57:36.178173  Probing TPM:  done!
  346 18:57:36.185032  Connected to device vid:did:rid of 1ae0:0028:00
  347 18:57:36.195736  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  348 18:57:36.198523  Initialized TPM device CR50 revision 0
  349 18:57:36.212904  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  350 18:57:36.219426  MRC: Hash idx 0x100b comparison successful.
  351 18:57:36.223033  MRC cache found, size faa8
  352 18:57:36.223143  bootmode is set to: 2
  353 18:57:36.226449  SPD index = 0
  354 18:57:36.233464  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  355 18:57:36.236186  SPD: module type is LPDDR4X
  356 18:57:36.239740  SPD: module part number is MT53E512M64D4NW-046
  357 18:57:36.246283  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
  358 18:57:36.249604  SPD: device width 16 bits, bus width 16 bits
  359 18:57:36.255991  SPD: module size is 1024 MB (per channel)
  360 18:57:36.687133  CBMEM:
  361 18:57:36.690797  IMD: root @ 0x76fff000 254 entries.
  362 18:57:36.693944  IMD: root @ 0x76ffec00 62 entries.
  363 18:57:36.697251  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  364 18:57:36.703912  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  365 18:57:36.706840  External stage cache:
  366 18:57:36.710817  IMD: root @ 0x7b3ff000 254 entries.
  367 18:57:36.713656  IMD: root @ 0x7b3fec00 62 entries.
  368 18:57:36.729166  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  369 18:57:36.735273  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  370 18:57:36.742347  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  371 18:57:36.756052  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  372 18:57:36.759892  cse_lite: Skip switching to RW in the recovery path
  373 18:57:36.764190  8 DIMMs found
  374 18:57:36.764341  SMM Memory Map
  375 18:57:36.767404  SMRAM       : 0x7b000000 0x800000
  376 18:57:36.771045   Subregion 0: 0x7b000000 0x200000
  377 18:57:36.774109   Subregion 1: 0x7b200000 0x200000
  378 18:57:36.777049   Subregion 2: 0x7b400000 0x400000
  379 18:57:36.780570  top_of_ram = 0x77000000
  380 18:57:36.787138  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  381 18:57:36.790569  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  382 18:57:36.797304  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  383 18:57:36.800443  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  384 18:57:36.810518  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  385 18:57:36.813611  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  386 18:57:36.816910  
  387 18:57:36.826686  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  388 18:57:36.830059  Processing 211 relocs. Offset value of 0x74c0b000
  389 18:57:36.839333  BS: romstage times (exec / console): total (unknown) / 277 ms
  390 18:57:36.845517  
  391 18:57:36.845647  
  392 18:57:36.855149  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  393 18:57:36.858264  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  394 18:57:36.868168  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  395 18:57:36.874791  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  396 18:57:36.881414  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  397 18:57:36.888314  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  398 18:57:36.934902  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  399 18:57:36.941619  Processing 5008 relocs. Offset value of 0x75d98000
  400 18:57:36.944703  BS: postcar times (exec / console): total (unknown) / 59 ms
  401 18:57:36.947967  
  402 18:57:36.948087  
  403 18:57:36.958224  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  404 18:57:36.958477  Normal boot
  405 18:57:36.961748  FW_CONFIG value is 0x804c02
  406 18:57:36.964816  PCI: 00:07.0 disabled by fw_config
  407 18:57:36.968062  PCI: 00:07.1 disabled by fw_config
  408 18:57:36.971847  PCI: 00:0d.2 disabled by fw_config
  409 18:57:36.974772  PCI: 00:1c.7 disabled by fw_config
  410 18:57:36.981536  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  411 18:57:36.988205  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  412 18:57:36.991656  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  413 18:57:36.995170  GENERIC: 0.0 disabled by fw_config
  414 18:57:36.998548  GENERIC: 1.0 disabled by fw_config
  415 18:57:37.005404  fw_config match found: DB_USB=USB3_ACTIVE
  416 18:57:37.008297  fw_config match found: DB_USB=USB3_ACTIVE
  417 18:57:37.011640  fw_config match found: DB_USB=USB3_ACTIVE
  418 18:57:37.017986  fw_config match found: DB_USB=USB3_ACTIVE
  419 18:57:37.021364  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  420 18:57:37.027991  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  421 18:57:37.038293  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  422 18:57:37.045153  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  423 18:57:37.047864  microcode: sig=0x806c1 pf=0x80 revision=0x86
  424 18:57:37.054902  microcode: Update skipped, already up-to-date
  425 18:57:37.061368  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  426 18:57:37.088960  Detected 4 core, 8 thread CPU.
  427 18:57:37.092173  Setting up SMI for CPU
  428 18:57:37.095246  IED base = 0x7b400000
  429 18:57:37.095371  IED size = 0x00400000
  430 18:57:37.098924  Will perform SMM setup.
  431 18:57:37.105071  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
  432 18:57:37.111666  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  433 18:57:37.118141  Processing 16 relocs. Offset value of 0x00030000
  434 18:57:37.121545  Attempting to start 7 APs
  435 18:57:37.125048  Waiting for 10ms after sending INIT.
  436 18:57:37.141085  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  437 18:57:37.143652  AP: slot 5 apic_id 6.
  438 18:57:37.147238  AP: slot 4 apic_id 7.
  439 18:57:37.147369  AP: slot 3 apic_id 5.
  440 18:57:37.150417  AP: slot 7 apic_id 4.
  441 18:57:37.150536  done.
  442 18:57:37.154068  AP: slot 6 apic_id 2.
  443 18:57:37.154181  AP: slot 2 apic_id 3.
  444 18:57:37.160587  Waiting for 2nd SIPI to complete...done.
  445 18:57:37.167085  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  446 18:57:37.174136  Processing 13 relocs. Offset value of 0x00038000
  447 18:57:37.174301  Unable to locate Global NVS
  448 18:57:37.183490  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  449 18:57:37.187303  Installing permanent SMM handler to 0x7b000000
  450 18:57:37.196737  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  451 18:57:37.200511  Processing 794 relocs. Offset value of 0x7b010000
  452 18:57:37.210653  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  453 18:57:37.213318  Processing 13 relocs. Offset value of 0x7b008000
  454 18:57:37.220331  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  455 18:57:37.226968  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  456 18:57:37.229857  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  457 18:57:37.236367  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  458 18:57:37.243040  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  459 18:57:37.250535  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  460 18:57:37.256259  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  461 18:57:37.256439  Unable to locate Global NVS
  462 18:57:37.266131  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  463 18:57:37.269752  Clearing SMI status registers
  464 18:57:37.269906  SMI_STS: PM1 
  465 18:57:37.272946  PM1_STS: PWRBTN 
  466 18:57:37.279953  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  467 18:57:37.282744  In relocation handler: CPU 0
  468 18:57:37.285926  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  469 18:57:37.293010  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  470 18:57:37.293153  Relocation complete.
  471 18:57:37.302838  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  472 18:57:37.303031  In relocation handler: CPU 1
  473 18:57:37.306203  
  474 18:57:37.309180  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  475 18:57:37.309359  Relocation complete.
  476 18:57:37.319221  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  477 18:57:37.319410  In relocation handler: CPU 6
  478 18:57:37.323099  
  479 18:57:37.325723  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  480 18:57:37.329107  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  481 18:57:37.332742  Relocation complete.
  482 18:57:37.339017  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  483 18:57:37.342405  In relocation handler: CPU 2
  484 18:57:37.346171  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  485 18:57:37.349283  Relocation complete.
  486 18:57:37.356109  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  487 18:57:37.359411  In relocation handler: CPU 4
  488 18:57:37.362707  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  489 18:57:37.366191  Relocation complete.
  490 18:57:37.372437  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  491 18:57:37.375765  In relocation handler: CPU 7
  492 18:57:37.379167  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  493 18:57:37.385582  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  494 18:57:37.385709  Relocation complete.
  495 18:57:37.392069  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  496 18:57:37.395312  In relocation handler: CPU 3
  497 18:57:37.402081  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  498 18:57:37.402220  Relocation complete.
  499 18:57:37.408827  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  500 18:57:37.411999  In relocation handler: CPU 5
  501 18:57:37.419019  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  502 18:57:37.422185  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  503 18:57:37.425748  Relocation complete.
  504 18:57:37.425853  Initializing CPU #0
  505 18:57:37.429206  CPU: vendor Intel device 806c1
  506 18:57:37.433190  CPU: family 06, model 8c, stepping 01
  507 18:57:37.436224  Clearing out pending MCEs
  508 18:57:37.439693  Setting up local APIC...
  509 18:57:37.439833   apic_id: 0x00 done.
  510 18:57:37.443167  Turbo is available but hidden
  511 18:57:37.446675  Turbo is available and visible
  512 18:57:37.453441  microcode: Update skipped, already up-to-date
  513 18:57:37.453551  CPU #0 initialized
  514 18:57:37.457069  Initializing CPU #5
  515 18:57:37.459624  Initializing CPU #4
  516 18:57:37.459719  CPU: vendor Intel device 806c1
  517 18:57:37.466306  CPU: family 06, model 8c, stepping 01
  518 18:57:37.469666  CPU: vendor Intel device 806c1
  519 18:57:37.473025  CPU: family 06, model 8c, stepping 01
  520 18:57:37.473131  Clearing out pending MCEs
  521 18:57:37.476498  
  522 18:57:37.476635  Clearing out pending MCEs
  523 18:57:37.480063  Setting up local APIC...
  524 18:57:37.483030  Initializing CPU #2
  525 18:57:37.483181  Initializing CPU #6
  526 18:57:37.486510  CPU: vendor Intel device 806c1
  527 18:57:37.489529  CPU: family 06, model 8c, stepping 01
  528 18:57:37.493090  CPU: vendor Intel device 806c1
  529 18:57:37.496827  CPU: family 06, model 8c, stepping 01
  530 18:57:37.499293  Clearing out pending MCEs
  531 18:57:37.503147  Clearing out pending MCEs
  532 18:57:37.506390  Setting up local APIC...
  533 18:57:37.509546  Setting up local APIC...
  534 18:57:37.509673  Setting up local APIC...
  535 18:57:37.513115  Initializing CPU #7
  536 18:57:37.516221  Initializing CPU #3
  537 18:57:37.519206  CPU: vendor Intel device 806c1
  538 18:57:37.522857  CPU: family 06, model 8c, stepping 01
  539 18:57:37.526263  CPU: vendor Intel device 806c1
  540 18:57:37.529618  CPU: family 06, model 8c, stepping 01
  541 18:57:37.532617  Clearing out pending MCEs
  542 18:57:37.532743  Clearing out pending MCEs
  543 18:57:37.536390  Setting up local APIC...
  544 18:57:37.539268   apic_id: 0x03 done.
  545 18:57:37.539363   apic_id: 0x02 done.
  546 18:57:37.546104  microcode: Update skipped, already up-to-date
  547 18:57:37.546270  Initializing CPU #1
  548 18:57:37.549039   apic_id: 0x06 done.
  549 18:57:37.552744  CPU: vendor Intel device 806c1
  550 18:57:37.556074  CPU: family 06, model 8c, stepping 01
  551 18:57:37.559480  Clearing out pending MCEs
  552 18:57:37.562421  CPU #2 initialized
  553 18:57:37.565810  microcode: Update skipped, already up-to-date
  554 18:57:37.569215  microcode: Update skipped, already up-to-date
  555 18:57:37.572855   apic_id: 0x07 done.
  556 18:57:37.572991  CPU #5 initialized
  557 18:57:37.576306  
  558 18:57:37.579449  microcode: Update skipped, already up-to-date
  559 18:57:37.582490  Setting up local APIC...
  560 18:57:37.582612  CPU #4 initialized
  561 18:57:37.585741  Setting up local APIC...
  562 18:57:37.589252   apic_id: 0x05 done.
  563 18:57:37.589351   apic_id: 0x04 done.
  564 18:57:37.595854  microcode: Update skipped, already up-to-date
  565 18:57:37.599595  microcode: Update skipped, already up-to-date
  566 18:57:37.602525  CPU #3 initialized
  567 18:57:37.602649  CPU #7 initialized
  568 18:57:37.605554  CPU #6 initialized
  569 18:57:37.605664   apic_id: 0x01 done.
  570 18:57:37.612489  microcode: Update skipped, already up-to-date
  571 18:57:37.612598  CPU #1 initialized
  572 18:57:37.615733  
  573 18:57:37.618856  bsp_do_flight_plan done after 455 msecs.
  574 18:57:37.622341  CPU: frequency set to 4000 MHz
  575 18:57:37.622459  Enabling SMIs.
  576 18:57:37.629105  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  577 18:57:37.645521  SATAXPCIE1 indicates PCIe NVMe is present
  578 18:57:37.648971  Probing TPM:  done!
  579 18:57:37.652158  Connected to device vid:did:rid of 1ae0:0028:00
  580 18:57:37.663155  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
  581 18:57:37.665876  Initialized TPM device CR50 revision 0
  582 18:57:37.669446  Enabling S0i3.4
  583 18:57:37.676111  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  584 18:57:37.679500  Found a VBT of 8704 bytes after decompression
  585 18:57:37.685953  cse_lite: CSE RO boot. HybridStorageMode disabled
  586 18:57:37.692831  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  587 18:57:37.767526  FSPS returned 0
  588 18:57:37.771354  Executing Phase 1 of FspMultiPhaseSiInit
  589 18:57:37.780989  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  590 18:57:37.784180  port C0 DISC req: usage 1 usb3 1 usb2 5
  591 18:57:37.787526  Raw Buffer output 0 00000511
  592 18:57:37.790493  Raw Buffer output 1 00000000
  593 18:57:37.794341  pmc_send_ipc_cmd succeeded
  594 18:57:37.798241  port C1 DISC req: usage 1 usb3 2 usb2 3
  595 18:57:37.801233  
  596 18:57:37.801370  Raw Buffer output 0 00000321
  597 18:57:37.804794  Raw Buffer output 1 00000000
  598 18:57:37.808594  pmc_send_ipc_cmd succeeded
  599 18:57:37.813902  Detected 4 core, 8 thread CPU.
  600 18:57:37.817784  Detected 4 core, 8 thread CPU.
  601 18:57:38.052014  Display FSP Version Info HOB
  602 18:57:38.055568  Reference Code - CPU = a.0.4c.31
  603 18:57:38.058321  uCode Version = 0.0.0.86
  604 18:57:38.061860  TXT ACM version = ff.ff.ff.ffff
  605 18:57:38.065286  Reference Code - ME = a.0.4c.31
  606 18:57:38.068235  MEBx version = 0.0.0.0
  607 18:57:38.072244  ME Firmware Version = Consumer SKU
  608 18:57:38.074991  Reference Code - PCH = a.0.4c.31
  609 18:57:38.078621  PCH-CRID Status = Disabled
  610 18:57:38.081991  PCH-CRID Original Value = ff.ff.ff.ffff
  611 18:57:38.085258  PCH-CRID New Value = ff.ff.ff.ffff
  612 18:57:38.088560  OPROM - RST - RAID = ff.ff.ff.ffff
  613 18:57:38.091750  PCH Hsio Version = 4.0.0.0
  614 18:57:38.095496  Reference Code - SA - System Agent = a.0.4c.31
  615 18:57:38.098090  Reference Code - MRC = 2.0.0.1
  616 18:57:38.101477  SA - PCIe Version = a.0.4c.31
  617 18:57:38.105251  SA-CRID Status = Disabled
  618 18:57:38.108409  SA-CRID Original Value = 0.0.0.1
  619 18:57:38.111980  SA-CRID New Value = 0.0.0.1
  620 18:57:38.116211  OPROM - VBIOS = ff.ff.ff.ffff
  621 18:57:38.118148  IO Manageability Engine FW Version = 11.1.4.0
  622 18:57:38.121651  PHY Build Version = 0.0.0.e0
  623 18:57:38.125032  Thunderbolt(TM) FW Version = 0.0.0.0
  624 18:57:38.132168  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  625 18:57:38.135268  ITSS IRQ Polarities Before:
  626 18:57:38.135371  IPC0: 0xffffffff
  627 18:57:38.138141  IPC1: 0xffffffff
  628 18:57:38.138236  IPC2: 0xffffffff
  629 18:57:38.142247  IPC3: 0xffffffff
  630 18:57:38.144658  ITSS IRQ Polarities After:
  631 18:57:38.144778  IPC0: 0xffffffff
  632 18:57:38.148088  IPC1: 0xffffffff
  633 18:57:38.148190  IPC2: 0xffffffff
  634 18:57:38.151307  IPC3: 0xffffffff
  635 18:57:38.154774  Found PCIe Root Port #9 at PCI: 00:1d.0.
  636 18:57:38.168423  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  637 18:57:38.178618  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  638 18:57:38.191245  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  639 18:57:38.198031  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
  640 18:57:38.198178  Enumerating buses...
  641 18:57:38.204963  Show all devs... Before device enumeration.
  642 18:57:38.205123  Root Device: enabled 1
  643 18:57:38.207855  DOMAIN: 0000: enabled 1
  644 18:57:38.211156  CPU_CLUSTER: 0: enabled 1
  645 18:57:38.215530  PCI: 00:00.0: enabled 1
  646 18:57:38.215655  PCI: 00:02.0: enabled 1
  647 18:57:38.217868  PCI: 00:04.0: enabled 1
  648 18:57:38.221428  PCI: 00:05.0: enabled 1
  649 18:57:38.224597  PCI: 00:06.0: enabled 0
  650 18:57:38.224702  PCI: 00:07.0: enabled 0
  651 18:57:38.227774  PCI: 00:07.1: enabled 0
  652 18:57:38.231402  PCI: 00:07.2: enabled 0
  653 18:57:38.234865  PCI: 00:07.3: enabled 0
  654 18:57:38.234973  PCI: 00:08.0: enabled 1
  655 18:57:38.237975  PCI: 00:09.0: enabled 0
  656 18:57:38.241715  PCI: 00:0a.0: enabled 0
  657 18:57:38.244490  PCI: 00:0d.0: enabled 1
  658 18:57:38.244598  PCI: 00:0d.1: enabled 0
  659 18:57:38.247916  PCI: 00:0d.2: enabled 0
  660 18:57:38.251236  PCI: 00:0d.3: enabled 0
  661 18:57:38.251348  PCI: 00:0e.0: enabled 0
  662 18:57:38.254389  
  663 18:57:38.254471  PCI: 00:10.2: enabled 1
  664 18:57:38.258101  PCI: 00:10.6: enabled 0
  665 18:57:38.261341  PCI: 00:10.7: enabled 0
  666 18:57:38.261455  PCI: 00:12.0: enabled 0
  667 18:57:38.264457  PCI: 00:12.6: enabled 0
  668 18:57:38.267957  PCI: 00:13.0: enabled 0
  669 18:57:38.270876  PCI: 00:14.0: enabled 1
  670 18:57:38.270994  PCI: 00:14.1: enabled 0
  671 18:57:38.274209  PCI: 00:14.2: enabled 1
  672 18:57:38.278237  PCI: 00:14.3: enabled 1
  673 18:57:38.281013  PCI: 00:15.0: enabled 1
  674 18:57:38.281136  PCI: 00:15.1: enabled 1
  675 18:57:38.284546  PCI: 00:15.2: enabled 1
  676 18:57:38.288383  PCI: 00:15.3: enabled 1
  677 18:57:38.291067  PCI: 00:16.0: enabled 1
  678 18:57:38.291179  PCI: 00:16.1: enabled 0
  679 18:57:38.294246  PCI: 00:16.2: enabled 0
  680 18:57:38.297359  PCI: 00:16.3: enabled 0
  681 18:57:38.297469  PCI: 00:16.4: enabled 0
  682 18:57:38.301114  PCI: 00:16.5: enabled 0
  683 18:57:38.304371  PCI: 00:17.0: enabled 1
  684 18:57:38.307586  PCI: 00:19.0: enabled 0
  685 18:57:38.307732  PCI: 00:19.1: enabled 1
  686 18:57:38.310918  PCI: 00:19.2: enabled 0
  687 18:57:38.314536  PCI: 00:1c.0: enabled 1
  688 18:57:38.317771  PCI: 00:1c.1: enabled 0
  689 18:57:38.317909  PCI: 00:1c.2: enabled 0
  690 18:57:38.320861  PCI: 00:1c.3: enabled 0
  691 18:57:38.324494  PCI: 00:1c.4: enabled 0
  692 18:57:38.328045  PCI: 00:1c.5: enabled 0
  693 18:57:38.328176  PCI: 00:1c.6: enabled 1
  694 18:57:38.331285  PCI: 00:1c.7: enabled 0
  695 18:57:38.334223  PCI: 00:1d.0: enabled 1
  696 18:57:38.334326  PCI: 00:1d.1: enabled 0
  697 18:57:38.337539  PCI: 00:1d.2: enabled 1
  698 18:57:38.340712  PCI: 00:1d.3: enabled 0
  699 18:57:38.344162  PCI: 00:1e.0: enabled 1
  700 18:57:38.344282  PCI: 00:1e.1: enabled 0
  701 18:57:38.347843  PCI: 00:1e.2: enabled 1
  702 18:57:38.350824  PCI: 00:1e.3: enabled 1
  703 18:57:38.354851  PCI: 00:1f.0: enabled 1
  704 18:57:38.354985  PCI: 00:1f.1: enabled 0
  705 18:57:38.357628  PCI: 00:1f.2: enabled 1
  706 18:57:38.360993  PCI: 00:1f.3: enabled 1
  707 18:57:38.364331  PCI: 00:1f.4: enabled 0
  708 18:57:38.364449  PCI: 00:1f.5: enabled 1
  709 18:57:38.367959  PCI: 00:1f.6: enabled 0
  710 18:57:38.370770  PCI: 00:1f.7: enabled 0
  711 18:57:38.370918  APIC: 00: enabled 1
  712 18:57:38.374172  GENERIC: 0.0: enabled 1
  713 18:57:38.377324  GENERIC: 0.0: enabled 1
  714 18:57:38.380774  GENERIC: 1.0: enabled 1
  715 18:57:38.380898  GENERIC: 0.0: enabled 1
  716 18:57:38.384139  GENERIC: 1.0: enabled 1
  717 18:57:38.387697  USB0 port 0: enabled 1
  718 18:57:38.387857  GENERIC: 0.0: enabled 1
  719 18:57:38.390600  
  720 18:57:38.390726  USB0 port 0: enabled 1
  721 18:57:38.394617  GENERIC: 0.0: enabled 1
  722 18:57:38.397194  I2C: 00:1a: enabled 1
  723 18:57:38.397308  I2C: 00:31: enabled 1
  724 18:57:38.400876  I2C: 00:32: enabled 1
  725 18:57:38.404449  I2C: 00:10: enabled 1
  726 18:57:38.404571  I2C: 00:15: enabled 1
  727 18:57:38.407152  GENERIC: 0.0: enabled 0
  728 18:57:38.410381  GENERIC: 1.0: enabled 0
  729 18:57:38.413787  GENERIC: 0.0: enabled 1
  730 18:57:38.413899  SPI: 00: enabled 1
  731 18:57:38.417278  SPI: 00: enabled 1
  732 18:57:38.417391  PNP: 0c09.0: enabled 1
  733 18:57:38.420965  GENERIC: 0.0: enabled 1
  734 18:57:38.424407  USB3 port 0: enabled 1
  735 18:57:38.427570  USB3 port 1: enabled 1
  736 18:57:38.427688  USB3 port 2: enabled 0
  737 18:57:38.430848  USB3 port 3: enabled 0
  738 18:57:38.433808  USB2 port 0: enabled 0
  739 18:57:38.433912  USB2 port 1: enabled 1
  740 18:57:38.437013  USB2 port 2: enabled 1
  741 18:57:38.440722  USB2 port 3: enabled 0
  742 18:57:38.440817  USB2 port 4: enabled 1
  743 18:57:38.444328  
  744 18:57:38.444437  USB2 port 5: enabled 0
  745 18:57:38.446960  USB2 port 6: enabled 0
  746 18:57:38.450786  USB2 port 7: enabled 0
  747 18:57:38.450920  USB2 port 8: enabled 0
  748 18:57:38.454464  USB2 port 9: enabled 0
  749 18:57:38.457276  USB3 port 0: enabled 0
  750 18:57:38.457389  USB3 port 1: enabled 1
  751 18:57:38.460605  USB3 port 2: enabled 0
  752 18:57:38.463728  USB3 port 3: enabled 0
  753 18:57:38.467465  GENERIC: 0.0: enabled 1
  754 18:57:38.467616  GENERIC: 1.0: enabled 1
  755 18:57:38.470706  APIC: 01: enabled 1
  756 18:57:38.473614  APIC: 03: enabled 1
  757 18:57:38.473724  APIC: 05: enabled 1
  758 18:57:38.477437  APIC: 07: enabled 1
  759 18:57:38.477538  APIC: 06: enabled 1
  760 18:57:38.480668  APIC: 02: enabled 1
  761 18:57:38.484313  APIC: 04: enabled 1
  762 18:57:38.484464  Compare with tree...
  763 18:57:38.487198  Root Device: enabled 1
  764 18:57:38.490569   DOMAIN: 0000: enabled 1
  765 18:57:38.493513    PCI: 00:00.0: enabled 1
  766 18:57:38.493659    PCI: 00:02.0: enabled 1
  767 18:57:38.496753    PCI: 00:04.0: enabled 1
  768 18:57:38.500395     GENERIC: 0.0: enabled 1
  769 18:57:38.503821    PCI: 00:05.0: enabled 1
  770 18:57:38.507109    PCI: 00:06.0: enabled 0
  771 18:57:38.507230    PCI: 00:07.0: enabled 0
  772 18:57:38.510159     GENERIC: 0.0: enabled 1
  773 18:57:38.514025    PCI: 00:07.1: enabled 0
  774 18:57:38.516775     GENERIC: 1.0: enabled 1
  775 18:57:38.520646    PCI: 00:07.2: enabled 0
  776 18:57:38.520799     GENERIC: 0.0: enabled 1
  777 18:57:38.523579    PCI: 00:07.3: enabled 0
  778 18:57:38.527208     GENERIC: 1.0: enabled 1
  779 18:57:38.530109    PCI: 00:08.0: enabled 1
  780 18:57:38.533909    PCI: 00:09.0: enabled 0
  781 18:57:38.534046    PCI: 00:0a.0: enabled 0
  782 18:57:38.536766    PCI: 00:0d.0: enabled 1
  783 18:57:38.540026     USB0 port 0: enabled 1
  784 18:57:38.543653      USB3 port 0: enabled 1
  785 18:57:38.546934      USB3 port 1: enabled 1
  786 18:57:38.547052      USB3 port 2: enabled 0
  787 18:57:38.550481      USB3 port 3: enabled 0
  788 18:57:38.553361    PCI: 00:0d.1: enabled 0
  789 18:57:38.557171    PCI: 00:0d.2: enabled 0
  790 18:57:38.559996     GENERIC: 0.0: enabled 1
  791 18:57:38.560102    PCI: 00:0d.3: enabled 0
  792 18:57:38.563393  
  793 18:57:38.563504    PCI: 00:0e.0: enabled 0
  794 18:57:38.566983    PCI: 00:10.2: enabled 1
  795 18:57:38.570242    PCI: 00:10.6: enabled 0
  796 18:57:38.573659    PCI: 00:10.7: enabled 0
  797 18:57:38.573774    PCI: 00:12.0: enabled 0
  798 18:57:38.576976    PCI: 00:12.6: enabled 0
  799 18:57:38.580622    PCI: 00:13.0: enabled 0
  800 18:57:38.583182    PCI: 00:14.0: enabled 1
  801 18:57:38.586756     USB0 port 0: enabled 1
  802 18:57:38.586875      USB2 port 0: enabled 0
  803 18:57:38.590308      USB2 port 1: enabled 1
  804 18:57:38.593433      USB2 port 2: enabled 1
  805 18:57:38.596855      USB2 port 3: enabled 0
  806 18:57:38.600033      USB2 port 4: enabled 1
  807 18:57:38.604125      USB2 port 5: enabled 0
  808 18:57:38.604259      USB2 port 6: enabled 0
  809 18:57:38.606770      USB2 port 7: enabled 0
  810 18:57:38.610196      USB2 port 8: enabled 0
  811 18:57:38.613184      USB2 port 9: enabled 0
  812 18:57:38.616653      USB3 port 0: enabled 0
  813 18:57:38.620109      USB3 port 1: enabled 1
  814 18:57:38.620224      USB3 port 2: enabled 0
  815 18:57:38.622998      USB3 port 3: enabled 0
  816 18:57:38.626668    PCI: 00:14.1: enabled 0
  817 18:57:38.630317    PCI: 00:14.2: enabled 1
  818 18:57:38.633241    PCI: 00:14.3: enabled 1
  819 18:57:38.633380     GENERIC: 0.0: enabled 1
  820 18:57:38.636853    PCI: 00:15.0: enabled 1
  821 18:57:38.640144     I2C: 00:1a: enabled 1
  822 18:57:38.643078     I2C: 00:31: enabled 1
  823 18:57:38.643203     I2C: 00:32: enabled 1
  824 18:57:38.646836    PCI: 00:15.1: enabled 1
  825 18:57:38.650225     I2C: 00:10: enabled 1
  826 18:57:38.653799    PCI: 00:15.2: enabled 1
  827 18:57:38.656706    PCI: 00:15.3: enabled 1
  828 18:57:38.656817    PCI: 00:16.0: enabled 1
  829 18:57:38.660221    PCI: 00:16.1: enabled 0
  830 18:57:38.663161    PCI: 00:16.2: enabled 0
  831 18:57:38.666458    PCI: 00:16.3: enabled 0
  832 18:57:38.670197    PCI: 00:16.4: enabled 0
  833 18:57:38.670315    PCI: 00:16.5: enabled 0
  834 18:57:38.673584    PCI: 00:17.0: enabled 1
  835 18:57:38.677715    PCI: 00:19.0: enabled 0
  836 18:57:38.677852    PCI: 00:19.1: enabled 1
  837 18:57:38.680950     I2C: 00:15: enabled 1
  838 18:57:38.684072    PCI: 00:19.2: enabled 0
  839 18:57:38.687512    PCI: 00:1d.0: enabled 1
  840 18:57:38.690696     GENERIC: 0.0: enabled 1
  841 18:57:38.690817    PCI: 00:1e.0: enabled 1
  842 18:57:38.694384    PCI: 00:1e.1: enabled 0
  843 18:57:38.697624    PCI: 00:1e.2: enabled 1
  844 18:57:38.701106     SPI: 00: enabled 1
  845 18:57:38.701233    PCI: 00:1e.3: enabled 1
  846 18:57:38.703682  
  847 18:57:38.703778     SPI: 00: enabled 1
  848 18:57:38.707113    PCI: 00:1f.0: enabled 1
  849 18:57:38.710389     PNP: 0c09.0: enabled 1
  850 18:57:38.714186    PCI: 00:1f.1: enabled 0
  851 18:57:38.714317    PCI: 00:1f.2: enabled 1
  852 18:57:38.717320     GENERIC: 0.0: enabled 1
  853 18:57:38.768782      GENERIC: 0.0: enabled 1
  854 18:57:38.768938      GENERIC: 1.0: enabled 1
  855 18:57:38.769387    PCI: 00:1f.3: enabled 1
  856 18:57:38.769464    PCI: 00:1f.4: enabled 0
  857 18:57:38.769529    PCI: 00:1f.5: enabled 1
  858 18:57:38.769778  
  859 18:57:38.769848    PCI: 00:1f.6: enabled 0
  860 18:57:38.769911    PCI: 00:1f.7: enabled 0
  861 18:57:38.770166   CPU_CLUSTER: 0: enabled 1
  862 18:57:38.770235    APIC: 00: enabled 1
  863 18:57:38.770296    APIC: 01: enabled 1
  864 18:57:38.770355    APIC: 03: enabled 1
  865 18:57:38.770412    APIC: 05: enabled 1
  866 18:57:38.770768    APIC: 07: enabled 1
  867 18:57:38.770856    APIC: 06: enabled 1
  868 18:57:38.770937    APIC: 02: enabled 1
  869 18:57:38.771191    APIC: 04: enabled 1
  870 18:57:38.771271  Root Device scanning...
  871 18:57:38.771518  scan_static_bus for Root Device
  872 18:57:38.771586  DOMAIN: 0000 enabled
  873 18:57:38.771646  CPU_CLUSTER: 0 enabled
  874 18:57:38.803932  DOMAIN: 0000 scanning...
  875 18:57:38.804091  PCI: pci_scan_bus for bus 00
  876 18:57:38.804380  PCI: 00:00.0 [8086/0000] ops
  877 18:57:38.804464  PCI: 00:00.0 [8086/9a12] enabled
  878 18:57:38.804724  PCI: 00:02.0 [8086/0000] bus ops
  879 18:57:38.804800  PCI: 00:02.0 [8086/9a40] enabled
  880 18:57:38.804871  PCI: 00:04.0 [8086/0000] bus ops
  881 18:57:38.804937  PCI: 00:04.0 [8086/9a03] enabled
  882 18:57:38.805181  PCI: 00:05.0 [8086/9a19] enabled
  883 18:57:38.805246  PCI: 00:07.0 [0000/0000] hidden
  884 18:57:38.807910  PCI: 00:08.0 [8086/9a11] enabled
  885 18:57:38.808021  PCI: 00:0a.0 [8086/9a0d] disabled
  886 18:57:38.811349  PCI: 00:0d.0 [8086/0000] bus ops
  887 18:57:38.814632  PCI: 00:0d.0 [8086/9a13] enabled
  888 18:57:38.817923  PCI: 00:14.0 [8086/0000] bus ops
  889 18:57:38.821430  PCI: 00:14.0 [8086/a0ed] enabled
  890 18:57:38.824874  PCI: 00:14.2 [8086/a0ef] enabled
  891 18:57:38.828166  PCI: 00:14.3 [8086/0000] bus ops
  892 18:57:38.831323  PCI: 00:14.3 [8086/a0f0] enabled
  893 18:57:38.834734  PCI: 00:15.0 [8086/0000] bus ops
  894 18:57:38.838205  PCI: 00:15.0 [8086/a0e8] enabled
  895 18:57:38.841301  PCI: 00:15.1 [8086/0000] bus ops
  896 18:57:38.844940  PCI: 00:15.1 [8086/a0e9] enabled
  897 18:57:38.848393  PCI: 00:15.2 [8086/0000] bus ops
  898 18:57:38.851756  PCI: 00:15.2 [8086/a0ea] enabled
  899 18:57:38.854994  PCI: 00:15.3 [8086/0000] bus ops
  900 18:57:38.858415  PCI: 00:15.3 [8086/a0eb] enabled
  901 18:57:38.861779  PCI: 00:16.0 [8086/0000] ops
  902 18:57:38.864385  PCI: 00:16.0 [8086/a0e0] enabled
  903 18:57:38.871093  PCI: Static device PCI: 00:17.0 not found, disabling it.
  904 18:57:38.875026  PCI: 00:19.0 [8086/0000] bus ops
  905 18:57:38.878064  PCI: 00:19.0 [8086/a0c5] disabled
  906 18:57:38.881057  PCI: 00:19.1 [8086/0000] bus ops
  907 18:57:38.884757  PCI: 00:19.1 [8086/a0c6] enabled
  908 18:57:38.888032  PCI: 00:1d.0 [8086/0000] bus ops
  909 18:57:38.890849  PCI: 00:1d.0 [8086/a0b0] enabled
  910 18:57:38.894530  PCI: 00:1e.0 [8086/0000] ops
  911 18:57:38.897968  PCI: 00:1e.0 [8086/a0a8] enabled
  912 18:57:38.901167  PCI: 00:1e.2 [8086/0000] bus ops
  913 18:57:38.904606  PCI: 00:1e.2 [8086/a0aa] enabled
  914 18:57:38.908551  PCI: 00:1e.3 [8086/0000] bus ops
  915 18:57:38.911346  PCI: 00:1e.3 [8086/a0ab] enabled
  916 18:57:38.914378  PCI: 00:1f.0 [8086/0000] bus ops
  917 18:57:38.918445  PCI: 00:1f.0 [8086/a087] enabled
  918 18:57:38.918617  RTC Init
  919 18:57:38.920810  Set power on after power failure.
  920 18:57:38.924427  Disabling Deep S3
  921 18:57:38.924572  Disabling Deep S3
  922 18:57:38.927803  Disabling Deep S4
  923 18:57:38.927939  Disabling Deep S4
  924 18:57:38.930728  Disabling Deep S5
  925 18:57:38.930849  Disabling Deep S5
  926 18:57:38.934078  PCI: 00:1f.2 [0000/0000] hidden
  927 18:57:38.937582  PCI: 00:1f.3 [8086/0000] bus ops
  928 18:57:38.940845  PCI: 00:1f.3 [8086/a0c8] enabled
  929 18:57:38.944028  PCI: 00:1f.5 [8086/0000] bus ops
  930 18:57:38.947791  PCI: 00:1f.5 [8086/a0a4] enabled
  931 18:57:38.951036  PCI: Leftover static devices:
  932 18:57:38.954668  PCI: 00:10.2
  933 18:57:38.954826  PCI: 00:10.6
  934 18:57:38.957664  PCI: 00:10.7
  935 18:57:38.957792  PCI: 00:06.0
  936 18:57:38.957894  PCI: 00:07.1
  937 18:57:38.960869  PCI: 00:07.2
  938 18:57:38.961003  PCI: 00:07.3
  939 18:57:38.964323  PCI: 00:09.0
  940 18:57:38.964458  PCI: 00:0d.1
  941 18:57:38.964563  PCI: 00:0d.2
  942 18:57:38.967692  PCI: 00:0d.3
  943 18:57:38.967813  PCI: 00:0e.0
  944 18:57:38.970817  PCI: 00:12.0
  945 18:57:38.970957  PCI: 00:12.6
  946 18:57:38.974727  PCI: 00:13.0
  947 18:57:38.974873  PCI: 00:14.1
  948 18:57:38.974986  PCI: 00:16.1
  949 18:57:38.977544  PCI: 00:16.2
  950 18:57:38.977660  PCI: 00:16.3
  951 18:57:38.980883  PCI: 00:16.4
  952 18:57:38.981027  PCI: 00:16.5
  953 18:57:38.981132  PCI: 00:17.0
  954 18:57:38.984348  PCI: 00:19.2
  955 18:57:38.984474  PCI: 00:1e.1
  956 18:57:38.987212  PCI: 00:1f.1
  957 18:57:38.987335  PCI: 00:1f.4
  958 18:57:38.987437  PCI: 00:1f.6
  959 18:57:38.991343  PCI: 00:1f.7
  960 18:57:38.993989  PCI: Check your devicetree.cb.
  961 18:57:38.997404  PCI: 00:02.0 scanning...
  962 18:57:39.000637  scan_generic_bus for PCI: 00:02.0
  963 18:57:39.004089  scan_generic_bus for PCI: 00:02.0 done
  964 18:57:39.007568  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  965 18:57:39.010333  PCI: 00:04.0 scanning...
  966 18:57:39.013719  scan_generic_bus for PCI: 00:04.0
  967 18:57:39.017351  GENERIC: 0.0 enabled
  968 18:57:39.024088  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  969 18:57:39.027220  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  970 18:57:39.030700  PCI: 00:0d.0 scanning...
  971 18:57:39.034088  scan_static_bus for PCI: 00:0d.0
  972 18:57:39.037439  USB0 port 0 enabled
  973 18:57:39.037593  USB0 port 0 scanning...
  974 18:57:39.040551  scan_static_bus for USB0 port 0
  975 18:57:39.043747  USB3 port 0 enabled
  976 18:57:39.047415  USB3 port 1 enabled
  977 18:57:39.047556  USB3 port 2 disabled
  978 18:57:39.051383  USB3 port 3 disabled
  979 18:57:39.053698  USB3 port 0 scanning...
  980 18:57:39.057250  scan_static_bus for USB3 port 0
  981 18:57:39.060159  scan_static_bus for USB3 port 0 done
  982 18:57:39.063791  scan_bus: bus USB3 port 0 finished in 6 msecs
  983 18:57:39.067405  USB3 port 1 scanning...
  984 18:57:39.070395  scan_static_bus for USB3 port 1
  985 18:57:39.073506  scan_static_bus for USB3 port 1 done
  986 18:57:39.077060  scan_bus: bus USB3 port 1 finished in 6 msecs
  987 18:57:39.083497  scan_static_bus for USB0 port 0 done
  988 18:57:39.087544  scan_bus: bus USB0 port 0 finished in 43 msecs
  989 18:57:39.090047  scan_static_bus for PCI: 00:0d.0 done
  990 18:57:39.096713  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  991 18:57:39.096903  PCI: 00:14.0 scanning...
  992 18:57:39.100414  scan_static_bus for PCI: 00:14.0
  993 18:57:39.103463  USB0 port 0 enabled
  994 18:57:39.106987  USB0 port 0 scanning...
  995 18:57:39.110467  scan_static_bus for USB0 port 0
  996 18:57:39.110634  USB2 port 0 disabled
  997 18:57:39.113325  USB2 port 1 enabled
  998 18:57:39.116640  USB2 port 2 enabled
  999 18:57:39.116770  USB2 port 3 disabled
 1000 18:57:39.120334  USB2 port 4 enabled
 1001 18:57:39.124089  USB2 port 5 disabled
 1002 18:57:39.124249  USB2 port 6 disabled
 1003 18:57:39.126623  USB2 port 7 disabled
 1004 18:57:39.130080  USB2 port 8 disabled
 1005 18:57:39.130199  USB2 port 9 disabled
 1006 18:57:39.133235  USB3 port 0 disabled
 1007 18:57:39.133344  USB3 port 1 enabled
 1008 18:57:39.136742  USB3 port 2 disabled
 1009 18:57:39.140117  USB3 port 3 disabled
 1010 18:57:39.140264  USB2 port 1 scanning...
 1011 18:57:39.143315  scan_static_bus for USB2 port 1
 1012 18:57:39.150408  scan_static_bus for USB2 port 1 done
 1013 18:57:39.153434  scan_bus: bus USB2 port 1 finished in 6 msecs
 1014 18:57:39.157245  USB2 port 2 scanning...
 1015 18:57:39.160723  scan_static_bus for USB2 port 2
 1016 18:57:39.163838  scan_static_bus for USB2 port 2 done
 1017 18:57:39.166751  scan_bus: bus USB2 port 2 finished in 6 msecs
 1018 18:57:39.170065  USB2 port 4 scanning...
 1019 18:57:39.173174  scan_static_bus for USB2 port 4
 1020 18:57:39.177191  scan_static_bus for USB2 port 4 done
 1021 18:57:39.180097  scan_bus: bus USB2 port 4 finished in 6 msecs
 1022 18:57:39.183062  
 1023 18:57:39.183185  USB3 port 1 scanning...
 1024 18:57:39.186791  scan_static_bus for USB3 port 1
 1025 18:57:39.190972  scan_static_bus for USB3 port 1 done
 1026 18:57:39.196652  scan_bus: bus USB3 port 1 finished in 6 msecs
 1027 18:57:39.200764  scan_static_bus for USB0 port 0 done
 1028 18:57:39.203345  scan_bus: bus USB0 port 0 finished in 93 msecs
 1029 18:57:39.206829  scan_static_bus for PCI: 00:14.0 done
 1030 18:57:39.213340  scan_bus: bus PCI: 00:14.0 finished in 109 msecs
 1031 18:57:39.216813  PCI: 00:14.3 scanning...
 1032 18:57:39.220189  scan_static_bus for PCI: 00:14.3
 1033 18:57:39.220349  GENERIC: 0.0 enabled
 1034 18:57:39.226812  scan_static_bus for PCI: 00:14.3 done
 1035 18:57:39.229724  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
 1036 18:57:39.233190  PCI: 00:15.0 scanning...
 1037 18:57:39.236302  scan_static_bus for PCI: 00:15.0
 1038 18:57:39.236461  I2C: 00:1a enabled
 1039 18:57:39.240071  I2C: 00:31 enabled
 1040 18:57:39.243316  I2C: 00:32 enabled
 1041 18:57:39.246686  scan_static_bus for PCI: 00:15.0 done
 1042 18:57:39.250468  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
 1043 18:57:39.254734  PCI: 00:15.1 scanning...
 1044 18:57:39.257117  scan_static_bus for PCI: 00:15.1
 1045 18:57:39.257262  I2C: 00:10 enabled
 1046 18:57:39.260980  scan_static_bus for PCI: 00:15.1 done
 1047 18:57:39.267637  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
 1048 18:57:39.270627  PCI: 00:15.2 scanning...
 1049 18:57:39.273729  scan_static_bus for PCI: 00:15.2
 1050 18:57:39.276823  scan_static_bus for PCI: 00:15.2 done
 1051 18:57:39.280490  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
 1052 18:57:39.284251  PCI: 00:15.3 scanning...
 1053 18:57:39.287257  scan_static_bus for PCI: 00:15.3
 1054 18:57:39.290072  scan_static_bus for PCI: 00:15.3 done
 1055 18:57:39.297053  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1056 18:57:39.297239  PCI: 00:19.1 scanning...
 1057 18:57:39.300704  scan_static_bus for PCI: 00:19.1
 1058 18:57:39.304232  I2C: 00:15 enabled
 1059 18:57:39.306992  scan_static_bus for PCI: 00:19.1 done
 1060 18:57:39.313744  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1061 18:57:39.313936  PCI: 00:1d.0 scanning...
 1062 18:57:39.320259  do_pci_scan_bridge for PCI: 00:1d.0
 1063 18:57:39.320445  PCI: pci_scan_bus for bus 01
 1064 18:57:39.323591  PCI: 01:00.0 [1c5c/174a] enabled
 1065 18:57:39.327183  GENERIC: 0.0 enabled
 1066 18:57:39.330262  Enabling Common Clock Configuration
 1067 18:57:39.333958  L1 Sub-State supported from root port 29
 1068 18:57:39.337241  
 1069 18:57:39.337391  L1 Sub-State Support = 0xf
 1070 18:57:39.340664  CommonModeRestoreTime = 0x28
 1071 18:57:39.347477  Power On Value = 0x16, Power On Scale = 0x0
 1072 18:57:39.347658  ASPM: Enabled L1
 1073 18:57:39.350131  PCIe: Max_Payload_Size adjusted to 128
 1074 18:57:39.356963  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1075 18:57:39.357150  PCI: 00:1e.2 scanning...
 1076 18:57:39.360954  scan_generic_bus for PCI: 00:1e.2
 1077 18:57:39.364234  
 1078 18:57:39.364384  SPI: 00 enabled
 1079 18:57:39.370848  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1080 18:57:39.374147  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1081 18:57:39.377048  PCI: 00:1e.3 scanning...
 1082 18:57:39.380728  scan_generic_bus for PCI: 00:1e.3
 1083 18:57:39.383845  SPI: 00 enabled
 1084 18:57:39.387364  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1085 18:57:39.394025  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1086 18:57:39.396992  PCI: 00:1f.0 scanning...
 1087 18:57:39.400395  scan_static_bus for PCI: 00:1f.0
 1088 18:57:39.400541  PNP: 0c09.0 enabled
 1089 18:57:39.403647  PNP: 0c09.0 scanning...
 1090 18:57:39.407081  scan_static_bus for PNP: 0c09.0
 1091 18:57:39.410697  scan_static_bus for PNP: 0c09.0 done
 1092 18:57:39.417256  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1093 18:57:39.420485  scan_static_bus for PCI: 00:1f.0 done
 1094 18:57:39.424097  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1095 18:57:39.426870  PCI: 00:1f.2 scanning...
 1096 18:57:39.430273  scan_static_bus for PCI: 00:1f.2
 1097 18:57:39.433917  GENERIC: 0.0 enabled
 1098 18:57:39.434069  GENERIC: 0.0 scanning...
 1099 18:57:39.437333  scan_static_bus for GENERIC: 0.0
 1100 18:57:39.440233  GENERIC: 0.0 enabled
 1101 18:57:39.444271  GENERIC: 1.0 enabled
 1102 18:57:39.447287  scan_static_bus for GENERIC: 0.0 done
 1103 18:57:39.450478  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1104 18:57:39.453716  scan_static_bus for PCI: 00:1f.2 done
 1105 18:57:39.456894  
 1106 18:57:39.460502  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1107 18:57:39.464218  PCI: 00:1f.3 scanning...
 1108 18:57:39.467449  scan_static_bus for PCI: 00:1f.3
 1109 18:57:39.470596  scan_static_bus for PCI: 00:1f.3 done
 1110 18:57:39.473710  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1111 18:57:39.477758  PCI: 00:1f.5 scanning...
 1112 18:57:39.480134  scan_generic_bus for PCI: 00:1f.5
 1113 18:57:39.483881  scan_generic_bus for PCI: 00:1f.5 done
 1114 18:57:39.490676  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1115 18:57:39.493589  scan_bus: bus DOMAIN: 0000 finished in 717 msecs
 1116 18:57:39.497110  scan_static_bus for Root Device done
 1117 18:57:39.503730  scan_bus: bus Root Device finished in 736 msecs
 1118 18:57:39.503899  done
 1119 18:57:39.510513  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
 1120 18:57:39.513858  Chrome EC: UHEPI supported
 1121 18:57:39.520340  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1122 18:57:39.526823  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1123 18:57:39.530139  SPI flash protection: WPSW=0 SRP0=0
 1124 18:57:39.533547  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1125 18:57:39.540404  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1126 18:57:39.543522  found VGA at PCI: 00:02.0
 1127 18:57:39.546804  Setting up VGA for PCI: 00:02.0
 1128 18:57:39.550338  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1129 18:57:39.556768  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1130 18:57:39.556918  Allocating resources...
 1131 18:57:39.560026  Reading resources...
 1132 18:57:39.563519  Root Device read_resources bus 0 link: 0
 1133 18:57:39.570729  DOMAIN: 0000 read_resources bus 0 link: 0
 1134 18:57:39.573806  PCI: 00:04.0 read_resources bus 1 link: 0
 1135 18:57:39.580235  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1136 18:57:39.583326  PCI: 00:0d.0 read_resources bus 0 link: 0
 1137 18:57:39.589880  USB0 port 0 read_resources bus 0 link: 0
 1138 18:57:39.593255  USB0 port 0 read_resources bus 0 link: 0 done
 1139 18:57:39.599999  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1140 18:57:39.603488  PCI: 00:14.0 read_resources bus 0 link: 0
 1141 18:57:39.606313  USB0 port 0 read_resources bus 0 link: 0
 1142 18:57:39.613875  USB0 port 0 read_resources bus 0 link: 0 done
 1143 18:57:39.617469  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1144 18:57:39.623873  PCI: 00:14.3 read_resources bus 0 link: 0
 1145 18:57:39.627362  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1146 18:57:39.634065  PCI: 00:15.0 read_resources bus 0 link: 0
 1147 18:57:39.637391  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1148 18:57:39.643781  PCI: 00:15.1 read_resources bus 0 link: 0
 1149 18:57:39.646976  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1150 18:57:39.654831  PCI: 00:19.1 read_resources bus 0 link: 0
 1151 18:57:39.658037  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1152 18:57:39.664650  PCI: 00:1d.0 read_resources bus 1 link: 0
 1153 18:57:39.667688  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1154 18:57:39.674469  PCI: 00:1e.2 read_resources bus 2 link: 0
 1155 18:57:39.677914  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1156 18:57:39.684423  PCI: 00:1e.3 read_resources bus 3 link: 0
 1157 18:57:39.687787  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1158 18:57:39.694519  PCI: 00:1f.0 read_resources bus 0 link: 0
 1159 18:57:39.697822  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1160 18:57:39.700643  PCI: 00:1f.2 read_resources bus 0 link: 0
 1161 18:57:39.707554  GENERIC: 0.0 read_resources bus 0 link: 0
 1162 18:57:39.711024  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1163 18:57:39.717855  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1164 18:57:39.721586  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1165 18:57:39.724456  
 1166 18:57:39.727769  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1167 18:57:39.730984  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1168 18:57:39.738203  Root Device read_resources bus 0 link: 0 done
 1169 18:57:39.741469  Done reading resources.
 1170 18:57:39.744953  Show resources in subtree (Root Device)...After reading.
 1171 18:57:39.751268   Root Device child on link 0 DOMAIN: 0000
 1172 18:57:39.754583    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1173 18:57:39.764674    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1174 18:57:39.774029    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1175 18:57:39.774217     PCI: 00:00.0
 1176 18:57:39.784785     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1177 18:57:39.794348     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1178 18:57:39.804081     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1179 18:57:39.814321     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1180 18:57:39.820952     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1181 18:57:39.830493     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1182 18:57:39.840413     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1183 18:57:39.851651     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1184 18:57:39.860380     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1185 18:57:39.870497     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1186 18:57:39.877078     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1187 18:57:39.886903     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1188 18:57:39.897351     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1189 18:57:39.906802     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1190 18:57:39.916684     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1191 18:57:39.923536     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1192 18:57:39.933951     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1193 18:57:39.943946     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1194 18:57:39.953768     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1195 18:57:39.963667     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1196 18:57:39.963847     PCI: 00:02.0
 1197 18:57:39.976607     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1198 18:57:39.986621     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1199 18:57:39.993256     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1200 18:57:40.000177     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1201 18:57:40.010256     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1202 18:57:40.010419      GENERIC: 0.0
 1203 18:57:40.013381     PCI: 00:05.0
 1204 18:57:40.023682     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1205 18:57:40.026597     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1206 18:57:40.030213      GENERIC: 0.0
 1207 18:57:40.030354     PCI: 00:08.0
 1208 18:57:40.039526     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1209 18:57:40.043255     PCI: 00:0a.0
 1210 18:57:40.046594     PCI: 00:0d.0 child on link 0 USB0 port 0
 1211 18:57:40.056238     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1212 18:57:40.059868      USB0 port 0 child on link 0 USB3 port 0
 1213 18:57:40.062822       USB3 port 0
 1214 18:57:40.062965       USB3 port 1
 1215 18:57:40.066251       USB3 port 2
 1216 18:57:40.066357       USB3 port 3
 1217 18:57:40.073059     PCI: 00:14.0 child on link 0 USB0 port 0
 1218 18:57:40.083244     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1219 18:57:40.086074      USB0 port 0 child on link 0 USB2 port 0
 1220 18:57:40.089340       USB2 port 0
 1221 18:57:40.089469       USB2 port 1
 1222 18:57:40.092927       USB2 port 2
 1223 18:57:40.093024       USB2 port 3
 1224 18:57:40.096145       USB2 port 4
 1225 18:57:40.096260       USB2 port 5
 1226 18:57:40.100133       USB2 port 6
 1227 18:57:40.100245       USB2 port 7
 1228 18:57:40.103239       USB2 port 8
 1229 18:57:40.103374       USB2 port 9
 1230 18:57:40.106593       USB3 port 0
 1231 18:57:40.106700       USB3 port 1
 1232 18:57:40.109933       USB3 port 2
 1233 18:57:40.110047       USB3 port 3
 1234 18:57:40.113169  
 1235 18:57:40.113271     PCI: 00:14.2
 1236 18:57:40.122974     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1237 18:57:40.132868     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1238 18:57:40.135950     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1239 18:57:40.146337     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1240 18:57:40.149356      GENERIC: 0.0
 1241 18:57:40.152841     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1242 18:57:40.162481     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1243 18:57:40.166137      I2C: 00:1a
 1244 18:57:40.166314      I2C: 00:31
 1245 18:57:40.169267      I2C: 00:32
 1246 18:57:40.172636     PCI: 00:15.1 child on link 0 I2C: 00:10
 1247 18:57:40.182842     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1248 18:57:40.183052      I2C: 00:10
 1249 18:57:40.186006     PCI: 00:15.2
 1250 18:57:40.195698     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1251 18:57:40.195909     PCI: 00:15.3
 1252 18:57:40.206136     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1253 18:57:40.209122     PCI: 00:16.0
 1254 18:57:40.219341     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1255 18:57:40.219496     PCI: 00:19.0
 1256 18:57:40.225823     PCI: 00:19.1 child on link 0 I2C: 00:15
 1257 18:57:40.236025     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1258 18:57:40.236181      I2C: 00:15
 1259 18:57:40.238861     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1260 18:57:40.249198     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1261 18:57:40.258889     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1262 18:57:40.268838     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1263 18:57:40.268991      GENERIC: 0.0
 1264 18:57:40.272279      PCI: 01:00.0
 1265 18:57:40.282809      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1266 18:57:40.292841      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
 1267 18:57:40.299392      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
 1268 18:57:40.301978     PCI: 00:1e.0
 1269 18:57:40.312664     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1270 18:57:40.318636     PCI: 00:1e.2 child on link 0 SPI: 00
 1271 18:57:40.328964     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1272 18:57:40.329124      SPI: 00
 1273 18:57:40.332573     PCI: 00:1e.3 child on link 0 SPI: 00
 1274 18:57:40.341772     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1275 18:57:40.341935      SPI: 00
 1276 18:57:40.345137  
 1277 18:57:40.348718     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1278 18:57:40.355448     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1279 18:57:40.358365      PNP: 0c09.0
 1280 18:57:40.368511      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1281 18:57:40.371763     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1282 18:57:40.382079     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1283 18:57:40.392348     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1284 18:57:40.394844      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1285 18:57:40.394976       GENERIC: 0.0
 1286 18:57:40.398355  
 1287 18:57:40.398497       GENERIC: 1.0
 1288 18:57:40.401572     PCI: 00:1f.3
 1289 18:57:40.412037     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1290 18:57:40.421629     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1291 18:57:40.421788     PCI: 00:1f.5
 1292 18:57:40.431976     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1293 18:57:40.434705    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1294 18:57:40.438285     APIC: 00
 1295 18:57:40.438403     APIC: 01
 1296 18:57:40.438477     APIC: 03
 1297 18:57:40.441664     APIC: 05
 1298 18:57:40.441759     APIC: 07
 1299 18:57:40.441827     APIC: 06
 1300 18:57:40.444980     APIC: 02
 1301 18:57:40.445081     APIC: 04
 1302 18:57:40.454625  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1303 18:57:40.458117   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1304 18:57:40.465238   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1305 18:57:40.471256   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1306 18:57:40.474907    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1307 18:57:40.478329    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem
 1308 18:57:40.484723    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem
 1309 18:57:40.491052   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1310 18:57:40.498152   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1311 18:57:40.504723   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1312 18:57:40.514825  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1313 18:57:40.518032  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1314 18:57:40.520933  
 1315 18:57:40.527573   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1316 18:57:40.534501   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1317 18:57:40.541883   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1318 18:57:40.544213   DOMAIN: 0000: Resource ranges:
 1319 18:57:40.547524   * Base: 1000, Size: 800, Tag: 100
 1320 18:57:40.550864   * Base: 1900, Size: e700, Tag: 100
 1321 18:57:40.557853    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1322 18:57:40.564559  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1323 18:57:40.570671  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1324 18:57:40.577333   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1325 18:57:40.587518   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1326 18:57:40.593897   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1327 18:57:40.600834   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1328 18:57:40.610530   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1329 18:57:40.617233   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1330 18:57:40.624391   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1331 18:57:40.633791   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1332 18:57:40.641938   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1333 18:57:40.646999   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1334 18:57:40.657024   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1335 18:57:40.663484   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1336 18:57:40.670219   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1337 18:57:40.680443   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1338 18:57:40.687345   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1339 18:57:40.693548   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1340 18:57:40.703318   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
 1341 18:57:40.710220   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1342 18:57:40.716677   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1343 18:57:40.727202   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1344 18:57:40.733521   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1345 18:57:40.739988   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1346 18:57:40.743170   DOMAIN: 0000: Resource ranges:
 1347 18:57:40.750278   * Base: 7fc00000, Size: 40400000, Tag: 200
 1348 18:57:40.753064   * Base: d0000000, Size: 28000000, Tag: 200
 1349 18:57:40.756792   * Base: fa000000, Size: 1000000, Tag: 200
 1350 18:57:40.760752   * Base: fb001000, Size: 2fff000, Tag: 200
 1351 18:57:40.763073  
 1352 18:57:40.766532   * Base: fe010000, Size: 2e000, Tag: 200
 1353 18:57:40.769839   * Base: fe03f000, Size: d41000, Tag: 200
 1354 18:57:40.773635   * Base: fed88000, Size: 8000, Tag: 200
 1355 18:57:40.776736   * Base: fed93000, Size: d000, Tag: 200
 1356 18:57:40.783434   * Base: feda2000, Size: 1e000, Tag: 200
 1357 18:57:40.787055   * Base: fede0000, Size: 1220000, Tag: 200
 1358 18:57:40.789931   * Base: 280400000, Size: 7d7fc00000, Tag: 100200
 1359 18:57:40.800210    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1360 18:57:40.806515    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1361 18:57:40.813345    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1362 18:57:40.819719    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1363 18:57:40.826367    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1364 18:57:40.833209    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1365 18:57:40.837082    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1366 18:57:40.839888  
 1367 18:57:40.843000    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1368 18:57:40.846140  
 1369 18:57:40.850003    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1370 18:57:40.853239  
 1371 18:57:40.856179    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1372 18:57:40.859431  
 1373 18:57:40.863006    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1374 18:57:40.866329  
 1375 18:57:40.870234    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1376 18:57:40.873100  
 1377 18:57:40.876091    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1378 18:57:40.879851  
 1379 18:57:40.882835    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1380 18:57:40.886512  
 1381 18:57:40.889649    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1382 18:57:40.893444  
 1383 18:57:40.896254    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1384 18:57:40.899394  
 1385 18:57:40.902684    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1386 18:57:40.905822  
 1387 18:57:40.909576    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1388 18:57:40.912629  
 1389 18:57:40.916393    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1390 18:57:40.919192  
 1391 18:57:40.922560    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1392 18:57:40.926132  
 1393 18:57:40.929672    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1394 18:57:40.935897    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1395 18:57:40.946137  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1396 18:57:40.952588  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1397 18:57:40.955995   PCI: 00:1d.0: Resource ranges:
 1398 18:57:40.959095   * Base: 7fc00000, Size: 100000, Tag: 200
 1399 18:57:40.965989    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1400 18:57:40.972393    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
 1401 18:57:40.979753    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
 1402 18:57:40.989237  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1403 18:57:40.995984  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1404 18:57:40.999031  Root Device assign_resources, bus 0 link: 0
 1405 18:57:41.006453  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1406 18:57:41.012157  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1407 18:57:41.022994  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1408 18:57:41.028773  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1409 18:57:41.039876  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1410 18:57:41.042563  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1411 18:57:41.045293  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1412 18:57:41.055554  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1413 18:57:41.062043  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1414 18:57:41.072089  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1415 18:57:41.075412  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1416 18:57:41.082715  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1417 18:57:41.088679  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1418 18:57:41.092213  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1419 18:57:41.099230  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1420 18:57:41.105560  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1421 18:57:41.115308  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1422 18:57:41.121951  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1423 18:57:41.129298  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1424 18:57:41.131766  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1425 18:57:41.141820  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1426 18:57:41.145122  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1427 18:57:41.148846  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1428 18:57:41.158466  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1429 18:57:41.161554  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1430 18:57:41.168451  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1431 18:57:41.175432  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1432 18:57:41.185011  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1433 18:57:41.191331  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1434 18:57:41.201367  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1435 18:57:41.204601  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1436 18:57:41.207945  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1437 18:57:41.218171  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1438 18:57:41.228055  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1439 18:57:41.237841  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1440 18:57:41.241206  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1441 18:57:41.247910  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1442 18:57:41.257721  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
 1443 18:57:41.264391  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
 1444 18:57:41.271322  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1445 18:57:41.277401  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1446 18:57:41.280670  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1447 18:57:41.288037  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1448 18:57:41.294842  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1449 18:57:41.301543  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1450 18:57:41.304450  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1451 18:57:41.308174  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1452 18:57:41.310792  
 1453 18:57:41.314615  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1454 18:57:41.317834  LPC: Trying to open IO window from 800 size 1ff
 1455 18:57:41.328181  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1456 18:57:41.334719  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1457 18:57:41.344381  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1458 18:57:41.348003  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1459 18:57:41.354431  Root Device assign_resources, bus 0 link: 0
 1460 18:57:41.354570  Done setting resources.
 1461 18:57:41.361282  Show resources in subtree (Root Device)...After assigning values.
 1462 18:57:41.367662   Root Device child on link 0 DOMAIN: 0000
 1463 18:57:41.371515    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1464 18:57:41.381186    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1465 18:57:41.390837    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1466 18:57:41.391012     PCI: 00:00.0
 1467 18:57:41.400858     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1468 18:57:41.410682     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1469 18:57:41.421103     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1470 18:57:41.430902     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1471 18:57:41.437367     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1472 18:57:41.447110     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1473 18:57:41.457885     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1474 18:57:41.467282     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1475 18:57:41.477443     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1476 18:57:41.487224     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1477 18:57:41.494206     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1478 18:57:41.504005     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1479 18:57:41.513594     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1480 18:57:41.523380     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1481 18:57:41.530505     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1482 18:57:41.540474     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1483 18:57:41.550205     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1484 18:57:41.560312     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1485 18:57:41.570069     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1486 18:57:41.580668     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1487 18:57:41.580862     PCI: 00:02.0
 1488 18:57:41.593598     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1489 18:57:41.603612     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1490 18:57:41.613174     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1491 18:57:41.616838     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1492 18:57:41.626448     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1493 18:57:41.629680      GENERIC: 0.0
 1494 18:57:41.629820     PCI: 00:05.0
 1495 18:57:41.639639     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1496 18:57:41.646506     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1497 18:57:41.646665      GENERIC: 0.0
 1498 18:57:41.649768     PCI: 00:08.0
 1499 18:57:41.659658     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1500 18:57:41.659813     PCI: 00:0a.0
 1501 18:57:41.666477     PCI: 00:0d.0 child on link 0 USB0 port 0
 1502 18:57:41.676960     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1503 18:57:41.679369      USB0 port 0 child on link 0 USB3 port 0
 1504 18:57:41.682766       USB3 port 0
 1505 18:57:41.682919       USB3 port 1
 1506 18:57:41.686274       USB3 port 2
 1507 18:57:41.686460       USB3 port 3
 1508 18:57:41.693227     PCI: 00:14.0 child on link 0 USB0 port 0
 1509 18:57:41.703033     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1510 18:57:41.706316      USB0 port 0 child on link 0 USB2 port 0
 1511 18:57:41.709451       USB2 port 0
 1512 18:57:41.709621       USB2 port 1
 1513 18:57:41.712811       USB2 port 2
 1514 18:57:41.712933       USB2 port 3
 1515 18:57:41.716376       USB2 port 4
 1516 18:57:41.716497       USB2 port 5
 1517 18:57:41.719554       USB2 port 6
 1518 18:57:41.719662       USB2 port 7
 1519 18:57:41.723227       USB2 port 8
 1520 18:57:41.723344       USB2 port 9
 1521 18:57:41.726504       USB3 port 0
 1522 18:57:41.726614       USB3 port 1
 1523 18:57:41.729438       USB3 port 2
 1524 18:57:41.729536       USB3 port 3
 1525 18:57:41.733404     PCI: 00:14.2
 1526 18:57:41.742967     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1527 18:57:41.753359     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1528 18:57:41.759660     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1529 18:57:41.769559     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1530 18:57:41.769721      GENERIC: 0.0
 1531 18:57:41.776052     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1532 18:57:41.785885     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1533 18:57:41.786039      I2C: 00:1a
 1534 18:57:41.789164      I2C: 00:31
 1535 18:57:41.789291      I2C: 00:32
 1536 18:57:41.792785     PCI: 00:15.1 child on link 0 I2C: 00:10
 1537 18:57:41.802441     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1538 18:57:41.806051      I2C: 00:10
 1539 18:57:41.806191     PCI: 00:15.2
 1540 18:57:41.819147     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1541 18:57:41.819302     PCI: 00:15.3
 1542 18:57:41.828861     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1543 18:57:41.832584     PCI: 00:16.0
 1544 18:57:41.842451     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1545 18:57:41.842606     PCI: 00:19.0
 1546 18:57:41.849029     PCI: 00:19.1 child on link 0 I2C: 00:15
 1547 18:57:41.859145     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1548 18:57:41.859302      I2C: 00:15
 1549 18:57:41.865653     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1550 18:57:41.872265     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1551 18:57:41.885604     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1552 18:57:41.896124     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1553 18:57:41.898839      GENERIC: 0.0
 1554 18:57:41.899017      PCI: 01:00.0
 1555 18:57:41.908740      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1556 18:57:41.918712      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
 1557 18:57:41.928444      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
 1558 18:57:41.931911  
 1559 18:57:41.932076     PCI: 00:1e.0
 1560 18:57:41.942085     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1561 18:57:41.948485     PCI: 00:1e.2 child on link 0 SPI: 00
 1562 18:57:41.958451     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1563 18:57:41.958650      SPI: 00
 1564 18:57:41.962024     PCI: 00:1e.3 child on link 0 SPI: 00
 1565 18:57:41.972170     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1566 18:57:41.975185      SPI: 00
 1567 18:57:41.978992     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1568 18:57:41.988643     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1569 18:57:41.988845      PNP: 0c09.0
 1570 18:57:41.998619      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1571 18:57:42.001994     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1572 18:57:42.011742     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1573 18:57:42.021623     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1574 18:57:42.024886      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1575 18:57:42.028259       GENERIC: 0.0
 1576 18:57:42.028448       GENERIC: 1.0
 1577 18:57:42.031652     PCI: 00:1f.3
 1578 18:57:42.041432     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1579 18:57:42.051765     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1580 18:57:42.055282     PCI: 00:1f.5
 1581 18:57:42.064791     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1582 18:57:42.067895    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1583 18:57:42.068073     APIC: 00
 1584 18:57:42.071532     APIC: 01
 1585 18:57:42.071677     APIC: 03
 1586 18:57:42.075171     APIC: 05
 1587 18:57:42.075298     APIC: 07
 1588 18:57:42.075371     APIC: 06
 1589 18:57:42.078250     APIC: 02
 1590 18:57:42.078422     APIC: 04
 1591 18:57:42.081605  Done allocating resources.
 1592 18:57:42.088597  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
 1593 18:57:42.091270  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1594 18:57:42.095088  
 1595 18:57:42.097841  Configure GPIOs for I2S audio on UP4.
 1596 18:57:42.104747  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1597 18:57:42.107828  Enabling resources...
 1598 18:57:42.111581  PCI: 00:00.0 subsystem <- 8086/9a12
 1599 18:57:42.111772  PCI: 00:00.0 cmd <- 06
 1600 18:57:42.117977  PCI: 00:02.0 subsystem <- 8086/9a40
 1601 18:57:42.118170  PCI: 00:02.0 cmd <- 03
 1602 18:57:42.121568  PCI: 00:04.0 subsystem <- 8086/9a03
 1603 18:57:42.124687  PCI: 00:04.0 cmd <- 02
 1604 18:57:42.128040  PCI: 00:05.0 subsystem <- 8086/9a19
 1605 18:57:42.131050  PCI: 00:05.0 cmd <- 02
 1606 18:57:42.134313  PCI: 00:08.0 subsystem <- 8086/9a11
 1607 18:57:42.137824  PCI: 00:08.0 cmd <- 06
 1608 18:57:42.141257  PCI: 00:0d.0 subsystem <- 8086/9a13
 1609 18:57:42.144639  PCI: 00:0d.0 cmd <- 02
 1610 18:57:42.147855  PCI: 00:14.0 subsystem <- 8086/a0ed
 1611 18:57:42.150733  PCI: 00:14.0 cmd <- 02
 1612 18:57:42.155118  PCI: 00:14.2 subsystem <- 8086/a0ef
 1613 18:57:42.157330  PCI: 00:14.2 cmd <- 02
 1614 18:57:42.161027  PCI: 00:14.3 subsystem <- 8086/a0f0
 1615 18:57:42.161201  PCI: 00:14.3 cmd <- 02
 1616 18:57:42.167705  PCI: 00:15.0 subsystem <- 8086/a0e8
 1617 18:57:42.167893  PCI: 00:15.0 cmd <- 02
 1618 18:57:42.171174  PCI: 00:15.1 subsystem <- 8086/a0e9
 1619 18:57:42.174221  PCI: 00:15.1 cmd <- 02
 1620 18:57:42.177932  PCI: 00:15.2 subsystem <- 8086/a0ea
 1621 18:57:42.180669  PCI: 00:15.2 cmd <- 02
 1622 18:57:42.184415  PCI: 00:15.3 subsystem <- 8086/a0eb
 1623 18:57:42.187629  PCI: 00:15.3 cmd <- 02
 1624 18:57:42.191176  PCI: 00:16.0 subsystem <- 8086/a0e0
 1625 18:57:42.194154  PCI: 00:16.0 cmd <- 02
 1626 18:57:42.197389  PCI: 00:19.1 subsystem <- 8086/a0c6
 1627 18:57:42.201548  PCI: 00:19.1 cmd <- 02
 1628 18:57:42.204256  PCI: 00:1d.0 bridge ctrl <- 0013
 1629 18:57:42.207208  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1630 18:57:42.207331  PCI: 00:1d.0 cmd <- 06
 1631 18:57:42.211262  
 1632 18:57:42.215223  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1633 18:57:42.215357  PCI: 00:1e.0 cmd <- 06
 1634 18:57:42.220756  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1635 18:57:42.220900  PCI: 00:1e.2 cmd <- 06
 1636 18:57:42.224080  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1637 18:57:42.227289  PCI: 00:1e.3 cmd <- 02
 1638 18:57:42.230529  PCI: 00:1f.0 subsystem <- 8086/a087
 1639 18:57:42.234087  PCI: 00:1f.0 cmd <- 407
 1640 18:57:42.237090  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1641 18:57:42.240682  PCI: 00:1f.3 cmd <- 02
 1642 18:57:42.244062  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1643 18:57:42.247031  PCI: 00:1f.5 cmd <- 406
 1644 18:57:42.251139  PCI: 01:00.0 cmd <- 02
 1645 18:57:42.255429  done.
 1646 18:57:42.258775  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1647 18:57:42.262388  Initializing devices...
 1648 18:57:42.265366  Root Device init
 1649 18:57:42.269080  Chrome EC: Set SMI mask to 0x0000000000000000
 1650 18:57:42.276230  Chrome EC: clear events_b mask to 0x0000000000000000
 1651 18:57:42.282473  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1652 18:57:42.289155  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1653 18:57:42.295488  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1654 18:57:42.302146  Chrome EC: Set WAKE mask to 0x0000000000000000
 1655 18:57:42.305675  fw_config match found: DB_USB=USB3_ACTIVE
 1656 18:57:42.312882  Configure Right Type-C port orientation for retimer
 1657 18:57:42.315724  Root Device init finished in 47 msecs
 1658 18:57:42.318865  PCI: 00:00.0 init
 1659 18:57:42.322153  CPU TDP = 9 Watts
 1660 18:57:42.322324  CPU PL1 = 9 Watts
 1661 18:57:42.325437  CPU PL2 = 40 Watts
 1662 18:57:42.328845  CPU PL4 = 83 Watts
 1663 18:57:42.332444  PCI: 00:00.0 init finished in 8 msecs
 1664 18:57:42.332618  PCI: 00:02.0 init
 1665 18:57:42.335833  GMA: Found VBT in CBFS
 1666 18:57:42.339364  GMA: Found valid VBT in CBFS
 1667 18:57:42.345770  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1668 18:57:42.352269                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1669 18:57:42.356002  PCI: 00:02.0 init finished in 18 msecs
 1670 18:57:42.358769  PCI: 00:05.0 init
 1671 18:57:42.361914  PCI: 00:05.0 init finished in 0 msecs
 1672 18:57:42.365602  PCI: 00:08.0 init
 1673 18:57:42.368691  PCI: 00:08.0 init finished in 0 msecs
 1674 18:57:42.371855  PCI: 00:14.0 init
 1675 18:57:42.375743  PCI: 00:14.0 init finished in 0 msecs
 1676 18:57:42.378852  PCI: 00:14.2 init
 1677 18:57:42.382429  PCI: 00:14.2 init finished in 0 msecs
 1678 18:57:42.382598  PCI: 00:15.0 init
 1679 18:57:42.385433  I2C bus 0 version 0x3230302a
 1680 18:57:42.388550  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1681 18:57:42.395237  PCI: 00:15.0 init finished in 6 msecs
 1682 18:57:42.395398  PCI: 00:15.1 init
 1683 18:57:42.399186  I2C bus 1 version 0x3230302a
 1684 18:57:42.402536  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1685 18:57:42.405257  PCI: 00:15.1 init finished in 6 msecs
 1686 18:57:42.409649  PCI: 00:15.2 init
 1687 18:57:42.411787  I2C bus 2 version 0x3230302a
 1688 18:57:42.415576  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1689 18:57:42.419263  PCI: 00:15.2 init finished in 6 msecs
 1690 18:57:42.422074  PCI: 00:15.3 init
 1691 18:57:42.425807  I2C bus 3 version 0x3230302a
 1692 18:57:42.428897  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1693 18:57:42.432532  PCI: 00:15.3 init finished in 6 msecs
 1694 18:57:42.435108  PCI: 00:16.0 init
 1695 18:57:42.438649  PCI: 00:16.0 init finished in 0 msecs
 1696 18:57:42.442222  PCI: 00:19.1 init
 1697 18:57:42.442369  I2C bus 5 version 0x3230302a
 1698 18:57:42.448720  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1699 18:57:42.452093  PCI: 00:19.1 init finished in 6 msecs
 1700 18:57:42.452233  PCI: 00:1d.0 init
 1701 18:57:42.455250  Initializing PCH PCIe bridge.
 1702 18:57:42.458747  PCI: 00:1d.0 init finished in 3 msecs
 1703 18:57:42.463080  PCI: 00:1f.0 init
 1704 18:57:42.466299  IOAPIC: Initializing IOAPIC at 0xfec00000
 1705 18:57:42.473073  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1706 18:57:42.473243  IOAPIC: ID = 0x02
 1707 18:57:42.476572  IOAPIC: Dumping registers
 1708 18:57:42.480444    reg 0x0000: 0x02000000
 1709 18:57:42.483080    reg 0x0001: 0x00770020
 1710 18:57:42.483205    reg 0x0002: 0x00000000
 1711 18:57:42.489828  PCI: 00:1f.0 init finished in 21 msecs
 1712 18:57:42.489990  PCI: 00:1f.2 init
 1713 18:57:42.492819  Disabling ACPI via APMC.
 1714 18:57:42.496510  APMC done.
 1715 18:57:42.499738  PCI: 00:1f.2 init finished in 5 msecs
 1716 18:57:42.511400  PCI: 01:00.0 init
 1717 18:57:42.514537  PCI: 01:00.0 init finished in 0 msecs
 1718 18:57:42.518293  PNP: 0c09.0 init
 1719 18:57:42.521176  Google Chrome EC uptime: 8.415 seconds
 1720 18:57:42.527431  Google Chrome AP resets since EC boot: 1
 1721 18:57:42.531111  Google Chrome most recent AP reset causes:
 1722 18:57:42.534113  	0.349: 32775 shutdown: entering G3
 1723 18:57:42.541037  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1724 18:57:42.544338  PNP: 0c09.0 init finished in 22 msecs
 1725 18:57:42.549919  Devices initialized
 1726 18:57:42.553261  Show all devs... After init.
 1727 18:57:42.556475  Root Device: enabled 1
 1728 18:57:42.556639  DOMAIN: 0000: enabled 1
 1729 18:57:42.559870  CPU_CLUSTER: 0: enabled 1
 1730 18:57:42.563569  PCI: 00:00.0: enabled 1
 1731 18:57:42.566757  PCI: 00:02.0: enabled 1
 1732 18:57:42.566896  PCI: 00:04.0: enabled 1
 1733 18:57:42.570157  PCI: 00:05.0: enabled 1
 1734 18:57:42.573141  PCI: 00:06.0: enabled 0
 1735 18:57:42.576217  PCI: 00:07.0: enabled 0
 1736 18:57:42.576388  PCI: 00:07.1: enabled 0
 1737 18:57:42.579771  PCI: 00:07.2: enabled 0
 1738 18:57:42.583355  PCI: 00:07.3: enabled 0
 1739 18:57:42.586819  PCI: 00:08.0: enabled 1
 1740 18:57:42.586974  PCI: 00:09.0: enabled 0
 1741 18:57:42.589788  PCI: 00:0a.0: enabled 0
 1742 18:57:42.593200  PCI: 00:0d.0: enabled 1
 1743 18:57:42.596468  PCI: 00:0d.1: enabled 0
 1744 18:57:42.596606  PCI: 00:0d.2: enabled 0
 1745 18:57:42.599784  PCI: 00:0d.3: enabled 0
 1746 18:57:42.602875  PCI: 00:0e.0: enabled 0
 1747 18:57:42.603057  PCI: 00:10.2: enabled 1
 1748 18:57:42.606249  
 1749 18:57:42.606383  PCI: 00:10.6: enabled 0
 1750 18:57:42.609824  PCI: 00:10.7: enabled 0
 1751 18:57:42.612715  PCI: 00:12.0: enabled 0
 1752 18:57:42.612883  PCI: 00:12.6: enabled 0
 1753 18:57:42.615945  PCI: 00:13.0: enabled 0
 1754 18:57:42.619439  PCI: 00:14.0: enabled 1
 1755 18:57:42.623300  PCI: 00:14.1: enabled 0
 1756 18:57:42.623438  PCI: 00:14.2: enabled 1
 1757 18:57:42.626075  PCI: 00:14.3: enabled 1
 1758 18:57:42.629292  PCI: 00:15.0: enabled 1
 1759 18:57:42.633202  PCI: 00:15.1: enabled 1
 1760 18:57:42.633385  PCI: 00:15.2: enabled 1
 1761 18:57:42.636105  PCI: 00:15.3: enabled 1
 1762 18:57:42.639296  PCI: 00:16.0: enabled 1
 1763 18:57:42.642590  PCI: 00:16.1: enabled 0
 1764 18:57:42.642729  PCI: 00:16.2: enabled 0
 1765 18:57:42.646123  PCI: 00:16.3: enabled 0
 1766 18:57:42.649865  PCI: 00:16.4: enabled 0
 1767 18:57:42.650019  PCI: 00:16.5: enabled 0
 1768 18:57:42.652438  
 1769 18:57:42.652586  PCI: 00:17.0: enabled 0
 1770 18:57:42.656145  PCI: 00:19.0: enabled 0
 1771 18:57:42.659355  PCI: 00:19.1: enabled 1
 1772 18:57:42.659488  PCI: 00:19.2: enabled 0
 1773 18:57:42.662659  PCI: 00:1c.0: enabled 1
 1774 18:57:42.665939  PCI: 00:1c.1: enabled 0
 1775 18:57:42.669734  PCI: 00:1c.2: enabled 0
 1776 18:57:42.669879  PCI: 00:1c.3: enabled 0
 1777 18:57:42.672535  PCI: 00:1c.4: enabled 0
 1778 18:57:42.676109  PCI: 00:1c.5: enabled 0
 1779 18:57:42.679324  PCI: 00:1c.6: enabled 1
 1780 18:57:42.679453  PCI: 00:1c.7: enabled 0
 1781 18:57:42.682513  PCI: 00:1d.0: enabled 1
 1782 18:57:42.685660  PCI: 00:1d.1: enabled 0
 1783 18:57:42.689278  PCI: 00:1d.2: enabled 1
 1784 18:57:42.689447  PCI: 00:1d.3: enabled 0
 1785 18:57:42.692378  PCI: 00:1e.0: enabled 1
 1786 18:57:42.695944  PCI: 00:1e.1: enabled 0
 1787 18:57:42.696093  PCI: 00:1e.2: enabled 1
 1788 18:57:42.699593  PCI: 00:1e.3: enabled 1
 1789 18:57:42.702482  PCI: 00:1f.0: enabled 1
 1790 18:57:42.705824  PCI: 00:1f.1: enabled 0
 1791 18:57:42.705960  PCI: 00:1f.2: enabled 1
 1792 18:57:42.709261  PCI: 00:1f.3: enabled 1
 1793 18:57:42.712441  PCI: 00:1f.4: enabled 0
 1794 18:57:42.716184  PCI: 00:1f.5: enabled 1
 1795 18:57:42.716336  PCI: 00:1f.6: enabled 0
 1796 18:57:42.719106  PCI: 00:1f.7: enabled 0
 1797 18:57:42.722477  APIC: 00: enabled 1
 1798 18:57:42.722616  GENERIC: 0.0: enabled 1
 1799 18:57:42.725371  GENERIC: 0.0: enabled 1
 1800 18:57:42.728935  GENERIC: 1.0: enabled 1
 1801 18:57:42.732170  GENERIC: 0.0: enabled 1
 1802 18:57:42.732306  GENERIC: 1.0: enabled 1
 1803 18:57:42.735877  USB0 port 0: enabled 1
 1804 18:57:42.739178  GENERIC: 0.0: enabled 1
 1805 18:57:42.743135  USB0 port 0: enabled 1
 1806 18:57:42.743326  GENERIC: 0.0: enabled 1
 1807 18:57:42.745932  I2C: 00:1a: enabled 1
 1808 18:57:42.748943  I2C: 00:31: enabled 1
 1809 18:57:42.749114  I2C: 00:32: enabled 1
 1810 18:57:42.752155  I2C: 00:10: enabled 1
 1811 18:57:42.755537  I2C: 00:15: enabled 1
 1812 18:57:42.755717  GENERIC: 0.0: enabled 0
 1813 18:57:42.758658  GENERIC: 1.0: enabled 0
 1814 18:57:42.762075  GENERIC: 0.0: enabled 1
 1815 18:57:42.762247  SPI: 00: enabled 1
 1816 18:57:42.765835  SPI: 00: enabled 1
 1817 18:57:42.768849  PNP: 0c09.0: enabled 1
 1818 18:57:42.769008  GENERIC: 0.0: enabled 1
 1819 18:57:42.772479  
 1820 18:57:42.772640  USB3 port 0: enabled 1
 1821 18:57:42.775572  USB3 port 1: enabled 1
 1822 18:57:42.779046  USB3 port 2: enabled 0
 1823 18:57:42.779237  USB3 port 3: enabled 0
 1824 18:57:42.781933  USB2 port 0: enabled 0
 1825 18:57:42.786029  USB2 port 1: enabled 1
 1826 18:57:42.786224  USB2 port 2: enabled 1
 1827 18:57:42.789539  USB2 port 3: enabled 0
 1828 18:57:42.791784  USB2 port 4: enabled 1
 1829 18:57:42.795176  USB2 port 5: enabled 0
 1830 18:57:42.795359  USB2 port 6: enabled 0
 1831 18:57:42.798439  USB2 port 7: enabled 0
 1832 18:57:42.802153  USB2 port 8: enabled 0
 1833 18:57:42.802340  USB2 port 9: enabled 0
 1834 18:57:42.805189  USB3 port 0: enabled 0
 1835 18:57:42.808892  USB3 port 1: enabled 1
 1836 18:57:42.809081  USB3 port 2: enabled 0
 1837 18:57:42.811733  
 1838 18:57:42.811881  USB3 port 3: enabled 0
 1839 18:57:42.815336  GENERIC: 0.0: enabled 1
 1840 18:57:42.818307  GENERIC: 1.0: enabled 1
 1841 18:57:42.818479  APIC: 01: enabled 1
 1842 18:57:42.822160  APIC: 03: enabled 1
 1843 18:57:42.825210  APIC: 05: enabled 1
 1844 18:57:42.825373  APIC: 07: enabled 1
 1845 18:57:42.828258  APIC: 06: enabled 1
 1846 18:57:42.828410  APIC: 02: enabled 1
 1847 18:57:42.832339  APIC: 04: enabled 1
 1848 18:57:42.835413  PCI: 01:00.0: enabled 1
 1849 18:57:42.838420  BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
 1850 18:57:42.845356  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1851 18:57:42.848401  ELOG: NV offset 0xf30000 size 0x1000
 1852 18:57:42.855109  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1853 18:57:42.862267  ELOG: Event(17) added with size 13 at 2023-01-21 18:57:41 UTC
 1854 18:57:42.869128  ELOG: Event(92) added with size 9 at 2023-01-21 18:57:41 UTC
 1855 18:57:42.875045  ELOG: Event(93) added with size 9 at 2023-01-21 18:57:41 UTC
 1856 18:57:42.881742  ELOG: Event(9E) added with size 10 at 2023-01-21 18:57:41 UTC
 1857 18:57:42.888105  ELOG: Event(9F) added with size 14 at 2023-01-21 18:57:41 UTC
 1858 18:57:42.895215  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1859 18:57:42.898129  ELOG: Event(A1) added with size 10 at 2023-01-21 18:57:41 UTC
 1860 18:57:42.901340  
 1861 18:57:42.904785  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
 1862 18:57:42.911356  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
 1863 18:57:42.914639  Finalize devices...
 1864 18:57:42.914782  Devices finalized
 1865 18:57:42.921414  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1866 18:57:42.925079  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1867 18:57:42.928169  
 1868 18:57:42.931721  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1869 18:57:42.937801  ME: HFSTS1                      : 0x80030055
 1870 18:57:42.941710  ME: HFSTS2                      : 0x30280116
 1871 18:57:42.944694  ME: HFSTS3                      : 0x00000050
 1872 18:57:42.951430  ME: HFSTS4                      : 0x00004000
 1873 18:57:42.954522  ME: HFSTS5                      : 0x00000000
 1874 18:57:42.957955  ME: HFSTS6                      : 0x00400006
 1875 18:57:42.964852  ME: Manufacturing Mode          : YES
 1876 18:57:42.967678  ME: SPI Protection Mode Enabled : NO
 1877 18:57:42.971215  ME: FW Partition Table          : OK
 1878 18:57:42.974458  ME: Bringup Loader Failure      : NO
 1879 18:57:42.978125  ME: Firmware Init Complete      : NO
 1880 18:57:42.981136  ME: Boot Options Present        : NO
 1881 18:57:42.984180  ME: Update In Progress          : NO
 1882 18:57:42.987981  ME: D0i3 Support                : YES
 1883 18:57:42.994484  ME: Low Power State Enabled     : NO
 1884 18:57:42.998099  ME: CPU Replaced                : YES
 1885 18:57:43.000963  ME: CPU Replacement Valid       : YES
 1886 18:57:43.004154  ME: Current Working State       : 5
 1887 18:57:43.007476  ME: Current Operation State     : 1
 1888 18:57:43.011035  ME: Current Operation Mode      : 3
 1889 18:57:43.014723  ME: Error Code                  : 0
 1890 18:57:43.017313  ME: Enhanced Debug Mode         : NO
 1891 18:57:43.020854  ME: CPU Debug Disabled          : YES
 1892 18:57:43.024845  
 1893 18:57:43.027761  ME: TXT Support                 : NO
 1894 18:57:43.030776  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1895 18:57:43.040538  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1896 18:57:43.044914  CBFS: 'fallback/slic' not found.
 1897 18:57:43.047513  ACPI: Writing ACPI tables at 76b01000.
 1898 18:57:43.047652  ACPI:    * FACS
 1899 18:57:43.050808  ACPI:    * DSDT
 1900 18:57:43.054103  Ramoops buffer: 0x100000@0x76a00000.
 1901 18:57:43.057913  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1902 18:57:43.060875  
 1903 18:57:43.064115  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1904 18:57:43.067141  Google Chrome EC: version:
 1905 18:57:43.070464  	ro: voema_v2.0.7540-147f8d37d1
 1906 18:57:43.073678  	rw: voema_v2.0.7540-147f8d37d1
 1907 18:57:43.077616    running image: 2
 1908 18:57:43.080357  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
 1909 18:57:43.086050  ACPI:    * FADT
 1910 18:57:43.086280  SCI is IRQ9
 1911 18:57:43.089606  ACPI: added table 1/32, length now 40
 1912 18:57:43.092680  
 1913 18:57:43.092813  ACPI:     * SSDT
 1914 18:57:43.095915  Found 1 CPU(s) with 8 core(s) each.
 1915 18:57:43.102690  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1916 18:57:43.105926  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1917 18:57:43.109080  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1918 18:57:43.112973  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1919 18:57:43.119189  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1920 18:57:43.125663  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1921 18:57:43.129312  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1922 18:57:43.135782  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1923 18:57:43.142562  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1924 18:57:43.146002  \_SB.PCI0.RP09: Added StorageD3Enable property
 1925 18:57:43.149416  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1926 18:57:43.155358  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1927 18:57:43.162517  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1928 18:57:43.165822  PS2K: Passing 80 keymaps to kernel
 1929 18:57:43.172168  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1930 18:57:43.179170  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1931 18:57:43.185745  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1932 18:57:43.191941  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1933 18:57:43.198618  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1934 18:57:43.205208  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1935 18:57:43.211819  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1936 18:57:43.218587  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1937 18:57:43.221995  ACPI: added table 2/32, length now 44
 1938 18:57:43.222128  ACPI:    * MCFG
 1939 18:57:43.225163  ACPI: added table 3/32, length now 48
 1940 18:57:43.228513  
 1941 18:57:43.228644  ACPI:    * TPM2
 1942 18:57:43.231649  TPM2 log created at 0x769f0000
 1943 18:57:43.235385  ACPI: added table 4/32, length now 52
 1944 18:57:43.238622  ACPI:    * MADT
 1945 18:57:43.238740  SCI is IRQ9
 1946 18:57:43.242191  ACPI: added table 5/32, length now 56
 1947 18:57:43.245151  current = 76b09850
 1948 18:57:43.245297  ACPI:    * DMAR
 1949 18:57:43.248513  ACPI: added table 6/32, length now 60
 1950 18:57:43.252055  ACPI: added table 7/32, length now 64
 1951 18:57:43.255612  
 1952 18:57:43.255741  ACPI:    * HPET
 1953 18:57:43.258556  ACPI: added table 8/32, length now 68
 1954 18:57:43.261974  ACPI: done.
 1955 18:57:43.262096  ACPI tables: 35216 bytes.
 1956 18:57:43.265597  smbios_write_tables: 769ef000
 1957 18:57:43.268742  EC returned error result code 3
 1958 18:57:43.272002  Couldn't obtain OEM name from CBI
 1959 18:57:43.275765  Create SMBIOS type 16
 1960 18:57:43.279408  Create SMBIOS type 17
 1961 18:57:43.282412  GENERIC: 0.0 (WIFI Device)
 1962 18:57:43.282535  SMBIOS tables: 1750 bytes.
 1963 18:57:43.289358  Writing table forward entry at 0x00000500
 1964 18:57:43.295646  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1965 18:57:43.299032  Writing coreboot table at 0x76b25000
 1966 18:57:43.306312   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1967 18:57:43.309411   1. 0000000000001000-000000000009ffff: RAM
 1968 18:57:43.313427   2. 00000000000a0000-00000000000fffff: RESERVED
 1969 18:57:43.318828   3. 0000000000100000-00000000769eefff: RAM
 1970 18:57:43.322369   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1971 18:57:43.329095   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1972 18:57:43.336074   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1973 18:57:43.339310   7. 0000000077000000-000000007fbfffff: RESERVED
 1974 18:57:43.342349   8. 00000000c0000000-00000000cfffffff: RESERVED
 1975 18:57:43.349033   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1976 18:57:43.352306  10. 00000000fb000000-00000000fb000fff: RESERVED
 1977 18:57:43.358756  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1978 18:57:43.362240  12. 00000000fed80000-00000000fed87fff: RESERVED
 1979 18:57:43.368955  13. 00000000fed90000-00000000fed92fff: RESERVED
 1980 18:57:43.372738  14. 00000000feda0000-00000000feda1fff: RESERVED
 1981 18:57:43.378736  15. 00000000fedc0000-00000000feddffff: RESERVED
 1982 18:57:43.382096  16. 0000000100000000-00000002803fffff: RAM
 1983 18:57:43.385823  Passing 4 GPIOs to payload:
 1984 18:57:43.388600              NAME |       PORT | POLARITY |     VALUE
 1985 18:57:43.396154               lid |  undefined |     high |      high
 1986 18:57:43.399723             power |  undefined |     high |       low
 1987 18:57:43.405449             oprom |  undefined |     high |       low
 1988 18:57:43.411976          EC in RW | 0x000000e5 |     high |      high
 1989 18:57:43.418608  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 37bb
 1990 18:57:43.418811  coreboot table: 1576 bytes.
 1991 18:57:43.425152  IMD ROOT    0. 0x76fff000 0x00001000
 1992 18:57:43.429063  IMD SMALL   1. 0x76ffe000 0x00001000
 1993 18:57:43.432517  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1994 18:57:43.435454  VPD         3. 0x76c4d000 0x00000367
 1995 18:57:43.438844  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1996 18:57:43.441835  CONSOLE     5. 0x76c2c000 0x00020000
 1997 18:57:43.445569  FMAP        6. 0x76c2b000 0x00000578
 1998 18:57:43.448918  TIME STAMP  7. 0x76c2a000 0x00000910
 1999 18:57:43.452080  VBOOT WORK  8. 0x76c16000 0x00014000
 2000 18:57:43.458924  ROMSTG STCK 9. 0x76c15000 0x00001000
 2001 18:57:43.461890  AFTER CAR  10. 0x76c0a000 0x0000b000
 2002 18:57:43.465402  RAMSTAGE   11. 0x76b97000 0x00073000
 2003 18:57:43.468867  REFCODE    12. 0x76b42000 0x00055000
 2004 18:57:43.471767  SMM BACKUP 13. 0x76b32000 0x00010000
 2005 18:57:43.475449  4f444749   14. 0x76b30000 0x00002000
 2006 18:57:43.478824  EXT VBT15. 0x76b2d000 0x0000219f
 2007 18:57:43.482217  COREBOOT   16. 0x76b25000 0x00008000
 2008 18:57:43.485386  ACPI       17. 0x76b01000 0x00024000
 2009 18:57:43.492206  ACPI GNVS  18. 0x76b00000 0x00001000
 2010 18:57:43.495678  RAMOOPS    19. 0x76a00000 0x00100000
 2011 18:57:43.498775  TPM2 TCGLOG20. 0x769f0000 0x00010000
 2012 18:57:43.502508  SMBIOS     21. 0x769ef000 0x00000800
 2013 18:57:43.502680  IMD small region:
 2014 18:57:43.508797    IMD ROOT    0. 0x76ffec00 0x00000400
 2015 18:57:43.511771    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 2016 18:57:43.515934    POWER STATE 2. 0x76ffeb80 0x00000044
 2017 18:57:43.518456    ROMSTAGE    3. 0x76ffeb60 0x00000004
 2018 18:57:43.521667    MEM INFO    4. 0x76ffe980 0x000001e0
 2019 18:57:43.528421  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
 2020 18:57:43.532237  MTRR: Physical address space:
 2021 18:57:43.538866  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 2022 18:57:43.545276  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 2023 18:57:43.552024  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 2024 18:57:43.555205  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 2025 18:57:43.558510  
 2026 18:57:43.561799  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 2027 18:57:43.568283  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 2028 18:57:43.575002  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
 2029 18:57:43.578460  MTRR: Fixed MSR 0x250 0x0606060606060606
 2030 18:57:43.585026  MTRR: Fixed MSR 0x258 0x0606060606060606
 2031 18:57:43.588533  MTRR: Fixed MSR 0x259 0x0000000000000000
 2032 18:57:43.591667  MTRR: Fixed MSR 0x268 0x0606060606060606
 2033 18:57:43.595714  MTRR: Fixed MSR 0x269 0x0606060606060606
 2034 18:57:43.602816  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2035 18:57:43.604856  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2036 18:57:43.608115  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2037 18:57:43.611580  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2038 18:57:43.618313  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2039 18:57:43.622335  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2040 18:57:43.624918  call enable_fixed_mtrr()
 2041 18:57:43.628280  CPU physical address size: 39 bits
 2042 18:57:43.631778  MTRR: default type WB/UC MTRR counts: 6/6.
 2043 18:57:43.635121  MTRR: UC selected as default type.
 2044 18:57:43.641437  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 2045 18:57:43.648360  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 2046 18:57:43.655242  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 2047 18:57:43.661535  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 2048 18:57:43.668542  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 2049 18:57:43.674827  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
 2050 18:57:43.678548  MTRR: Fixed MSR 0x250 0x0606060606060606
 2051 18:57:43.681255  MTRR: Fixed MSR 0x258 0x0606060606060606
 2052 18:57:43.688257  MTRR: Fixed MSR 0x259 0x0000000000000000
 2053 18:57:43.691829  MTRR: Fixed MSR 0x268 0x0606060606060606
 2054 18:57:43.694859  MTRR: Fixed MSR 0x269 0x0606060606060606
 2055 18:57:43.698174  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2056 18:57:43.705229  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2057 18:57:43.707883  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2058 18:57:43.711537  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2059 18:57:43.714579  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2060 18:57:43.720904  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2061 18:57:43.721095  
 2062 18:57:43.721209  MTRR check
 2063 18:57:43.724338  call enable_fixed_mtrr()
 2064 18:57:43.727708  Fixed MTRRs   : Enabled
 2065 18:57:43.731299  Variable MTRRs: Enabled
 2066 18:57:43.731455  
 2067 18:57:43.734573  CPU physical address size: 39 bits
 2068 18:57:43.741660  BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
 2069 18:57:43.744510  MTRR: Fixed MSR 0x250 0x0606060606060606
 2070 18:57:43.748324  MTRR: Fixed MSR 0x250 0x0606060606060606
 2071 18:57:43.754463  MTRR: Fixed MSR 0x258 0x0606060606060606
 2072 18:57:43.757756  MTRR: Fixed MSR 0x259 0x0000000000000000
 2073 18:57:43.761296  MTRR: Fixed MSR 0x268 0x0606060606060606
 2074 18:57:43.764555  MTRR: Fixed MSR 0x269 0x0606060606060606
 2075 18:57:43.767701  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2076 18:57:43.774616  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2077 18:57:43.777423  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2078 18:57:43.781165  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2079 18:57:43.784565  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2080 18:57:43.791016  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2081 18:57:43.794321  MTRR: Fixed MSR 0x258 0x0606060606060606
 2082 18:57:43.797374  call enable_fixed_mtrr()
 2083 18:57:43.801324  MTRR: Fixed MSR 0x259 0x0000000000000000
 2084 18:57:43.804080  MTRR: Fixed MSR 0x268 0x0606060606060606
 2085 18:57:43.811711  MTRR: Fixed MSR 0x269 0x0606060606060606
 2086 18:57:43.814022  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2087 18:57:43.817427  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2088 18:57:43.820898  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2089 18:57:43.827469  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2090 18:57:43.831141  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2091 18:57:43.834187  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2092 18:57:43.837499  CPU physical address size: 39 bits
 2093 18:57:43.844130  call enable_fixed_mtrr()
 2094 18:57:43.848856  Checking cr50 for pending updates
 2095 18:57:43.852272  MTRR: Fixed MSR 0x250 0x0606060606060606
 2096 18:57:43.854984  MTRR: Fixed MSR 0x250 0x0606060606060606
 2097 18:57:43.858335  MTRR: Fixed MSR 0x258 0x0606060606060606
 2098 18:57:43.861827  MTRR: Fixed MSR 0x259 0x0000000000000000
 2099 18:57:43.865364  MTRR: Fixed MSR 0x268 0x0606060606060606
 2100 18:57:43.871472  MTRR: Fixed MSR 0x269 0x0606060606060606
 2101 18:57:43.874831  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2102 18:57:43.878381  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2103 18:57:43.881497  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2104 18:57:43.888356  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2105 18:57:43.891836  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2106 18:57:43.895591  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2107 18:57:43.901852  MTRR: Fixed MSR 0x258 0x0606060606060606
 2108 18:57:43.902008  call enable_fixed_mtrr()
 2109 18:57:43.908503  MTRR: Fixed MSR 0x259 0x0000000000000000
 2110 18:57:43.911790  MTRR: Fixed MSR 0x268 0x0606060606060606
 2111 18:57:43.915217  MTRR: Fixed MSR 0x269 0x0606060606060606
 2112 18:57:43.918390  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2113 18:57:43.924714  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2114 18:57:43.927934  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2115 18:57:43.931114  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2116 18:57:43.934867  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2117 18:57:43.938041  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2118 18:57:43.941040  
 2119 18:57:43.944713  CPU physical address size: 39 bits
 2120 18:57:43.947856  call enable_fixed_mtrr()
 2121 18:57:43.951040  MTRR: Fixed MSR 0x250 0x0606060606060606
 2122 18:57:43.954891  MTRR: Fixed MSR 0x250 0x0606060606060606
 2123 18:57:43.960865  MTRR: Fixed MSR 0x258 0x0606060606060606
 2124 18:57:43.964944  MTRR: Fixed MSR 0x259 0x0000000000000000
 2125 18:57:43.967637  MTRR: Fixed MSR 0x268 0x0606060606060606
 2126 18:57:43.970898  MTRR: Fixed MSR 0x269 0x0606060606060606
 2127 18:57:43.977745  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2128 18:57:43.980932  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2129 18:57:43.984098  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2130 18:57:43.987982  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2131 18:57:43.994750  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2132 18:57:43.997528  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2133 18:57:44.000725  MTRR: Fixed MSR 0x258 0x0606060606060606
 2134 18:57:44.004284  call enable_fixed_mtrr()
 2135 18:57:44.007425  MTRR: Fixed MSR 0x259 0x0000000000000000
 2136 18:57:44.014133  MTRR: Fixed MSR 0x268 0x0606060606060606
 2137 18:57:44.017414  MTRR: Fixed MSR 0x269 0x0606060606060606
 2138 18:57:44.020417  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2139 18:57:44.023976  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2140 18:57:44.031003  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2141 18:57:44.033907  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2142 18:57:44.037221  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2143 18:57:44.040483  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2144 18:57:44.044440  CPU physical address size: 39 bits
 2145 18:57:44.052036  call enable_fixed_mtrr()
 2146 18:57:44.055303  CPU physical address size: 39 bits
 2147 18:57:44.055480  Reading cr50 TPM mode
 2148 18:57:44.058330  CPU physical address size: 39 bits
 2149 18:57:44.062113  CPU physical address size: 39 bits
 2150 18:57:44.068767  BS: BS_PAYLOAD_LOAD entry times (exec / console): 314 / 6 ms
 2151 18:57:44.074893  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2152 18:57:44.081671  Checking segment from ROM address 0xffc02b38
 2153 18:57:44.085306  Checking segment from ROM address 0xffc02b54
 2154 18:57:44.088770  Loading segment from ROM address 0xffc02b38
 2155 18:57:44.092045    code (compression=0)
 2156 18:57:44.101691    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2157 18:57:44.108571  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2158 18:57:44.111816  it's not compressed!
 2159 18:57:44.250175  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2160 18:57:44.256860  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2161 18:57:44.263826  Loading segment from ROM address 0xffc02b54
 2162 18:57:44.263989    Entry Point 0x30000000
 2163 18:57:44.266739  Loaded segments
 2164 18:57:44.273687  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
 2165 18:57:44.316537  Finalizing chipset.
 2166 18:57:44.319989  Finalizing SMM.
 2167 18:57:44.320138  APMC done.
 2168 18:57:44.326649  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
 2169 18:57:44.330155  mp_park_aps done after 0 msecs.
 2170 18:57:44.333329  Jumping to boot code at 0x30000000(0x76b25000)
 2171 18:57:44.343276  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2172 18:57:44.343482  
 2173 18:57:44.343605  
 2174 18:57:44.343704  
 2175 18:57:44.346642  Starting depthcharge on Voema...
 2176 18:57:44.346804  
 2177 18:57:44.347255  end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
 2178 18:57:44.347410  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 2179 18:57:44.347539  Setting prompt string to ['volteer:']
 2180 18:57:44.347658  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
 2181 18:57:44.356927  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2182 18:57:44.357140  
 2183 18:57:44.363118  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2184 18:57:44.363321  
 2185 18:57:44.366853  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2186 18:57:44.369579  
 2187 18:57:44.373272  Failed to find eMMC card reader
 2188 18:57:44.373468  
 2189 18:57:44.373581  Wipe memory regions:
 2190 18:57:44.373679  
 2191 18:57:44.379837  	[0x00000000001000, 0x000000000a0000)
 2192 18:57:44.380041  
 2193 18:57:44.382618  	[0x00000000100000, 0x00000030000000)
 2194 18:57:44.382786  
 2195 18:57:44.410979  	[0x00000032662db0, 0x000000769ef000)
 2196 18:57:44.411177  
 2197 18:57:44.449916  	[0x00000100000000, 0x00000280400000)
 2198 18:57:44.450119  
 2199 18:57:44.657689  ec_init: CrosEC protocol v3 supported (256, 256)
 2200 18:57:44.657890  
 2201 18:57:44.664344  update_port_state: port C0 state: usb enable 1 mux conn 0
 2202 18:57:44.664537  
 2203 18:57:44.674267  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
 2204 18:57:44.674464  
 2205 18:57:44.680412  pmc_check_ipc_sts: STS_BUSY done after 1611 us
 2206 18:57:44.680599  
 2207 18:57:44.684021  send_conn_disc_msg: pmc_send_cmd succeeded
 2208 18:57:44.684179  
 2209 18:57:45.116487  R8152: Initializing
 2210 18:57:45.116644  
 2211 18:57:45.120127  Version 6 (ocp_data = 5c30)
 2212 18:57:45.120250  
 2213 18:57:45.123162  R8152: Done initializing
 2214 18:57:45.123302  
 2215 18:57:45.126192  Adding net device
 2216 18:57:45.126355  
 2217 18:57:45.432605  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2218 18:57:45.432767  
 2219 18:57:45.432844  
 2220 18:57:45.432908  
 2221 18:57:45.436292  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2223 18:57:45.537166  volteer: tftpboot 192.168.201.1 8815443/tftp-deploy-vb5iyu23/kernel/bzImage 8815443/tftp-deploy-vb5iyu23/kernel/cmdline 8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
 2224 18:57:45.537379  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2225 18:57:45.537517  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 2226 18:57:45.542254  tftpboot 192.168.201.1 8815443/tftp-deploy-vb5iyu23/kernel/bzImoy-vb5iyu23/kernel/cmdline 8815443/tftp-deploy-vb5iyu23/ramdisk/ramdisk.cpio.gz
 2227 18:57:45.542442  
 2228 18:57:45.542567  Waiting for link
 2229 18:57:45.542662  
 2230 18:57:45.745755  done.
 2231 18:57:45.745943  
 2232 18:57:45.746017  MAC: 00:24:32:30:7d:bc
 2233 18:57:45.746111  
 2234 18:57:45.749284  Sending DHCP discover... done.
 2235 18:57:45.749415  
 2236 18:57:45.752157  Waiting for reply... done.
 2237 18:57:45.752270  
 2238 18:57:45.755602  Sending DHCP request... done.
 2239 18:57:45.755705  
 2240 18:57:45.762015  Waiting for reply... done.
 2241 18:57:45.762134  
 2242 18:57:45.762203  My ip is 192.168.201.22
 2243 18:57:45.762265  
 2244 18:57:45.765622  The DHCP server ip is 192.168.201.1
 2245 18:57:45.765718  
 2246 18:57:45.772147  TFTP server IP predefined by user: 192.168.201.1
 2247 18:57:45.772262  
 2248 18:57:45.778725  Bootfile predefined by user: 8815443/tftp-deploy-vb5iyu23/kernel/bzImage
 2249 18:57:45.778849  
 2250 18:57:45.781875  Sending tftp read request... done.
 2251 18:57:45.781978  
 2252 18:57:45.785645  Waiting for the transfer... 
 2253 18:57:45.785747  
 2254 18:57:46.311200  00000000 ################################################################
 2255 18:57:46.311362  
 2256 18:57:46.832504  00080000 ################################################################
 2257 18:57:46.832718  
 2258 18:57:47.370098  00100000 ################################################################
 2259 18:57:47.370307  
 2260 18:57:47.908125  00180000 ################################################################
 2261 18:57:47.908279  
 2262 18:57:48.445026  00200000 ################################################################
 2263 18:57:48.445185  
 2264 18:57:48.988266  00280000 ################################################################
 2265 18:57:48.988426  
 2266 18:57:49.516382  00300000 ################################################################
 2267 18:57:49.516558  
 2268 18:57:50.040704  00380000 ################################################################
 2269 18:57:50.040860  
 2270 18:57:50.560866  00400000 ################################################################
 2271 18:57:50.561080  
 2272 18:57:51.085573  00480000 ################################################################
 2273 18:57:51.085768  
 2274 18:57:51.611885  00500000 ################################################################
 2275 18:57:51.612076  
 2276 18:57:52.157614  00580000 ################################################################
 2277 18:57:52.157804  
 2278 18:57:52.715659  00600000 ################################################################
 2279 18:57:52.715814  
 2280 18:57:53.261768  00680000 ################################################################
 2281 18:57:53.261940  
 2282 18:57:53.827152  00700000 ################################################################
 2283 18:57:53.827314  
 2284 18:57:54.389797  00780000 ################################################################
 2285 18:57:54.389989  
 2286 18:57:54.960937  00800000 ################################################################
 2287 18:57:54.961100  
 2288 18:57:55.526548  00880000 ################################################################
 2289 18:57:55.526696  
 2290 18:57:55.824049  00900000 ################################## done.
 2291 18:57:55.824200  
 2292 18:57:55.827467  The bootfile was 9711616 bytes long.
 2293 18:57:55.827601  
 2294 18:57:55.830437  Sending tftp read request... done.
 2295 18:57:55.830532  
 2296 18:57:55.833958  Waiting for the transfer... 
 2297 18:57:55.834059  
 2298 18:57:56.390250  00000000 ################################################################
 2299 18:57:56.390393  
 2300 18:57:56.957047  00080000 ################################################################
 2301 18:57:56.957189  
 2302 18:57:57.516565  00100000 ################################################################
 2303 18:57:57.516703  
 2304 18:57:58.050314  00180000 ################################################################
 2305 18:57:58.050454  
 2306 18:57:58.607157  00200000 ################################################################
 2307 18:57:58.607346  
 2308 18:57:59.148848  00280000 ################################################################
 2309 18:57:59.148988  
 2310 18:57:59.678164  00300000 ################################################################
 2311 18:57:59.678302  
 2312 18:58:00.203383  00380000 ################################################################
 2313 18:58:00.203523  
 2314 18:58:00.737680  00400000 ################################################################
 2315 18:58:00.737836  
 2316 18:58:01.279311  00480000 ################################################################
 2317 18:58:01.279496  
 2318 18:58:01.570481  00500000 ################################### done.
 2319 18:58:01.570635  
 2320 18:58:01.573280  Sending tftp read request... done.
 2321 18:58:01.573370  
 2322 18:58:01.576900  Waiting for the transfer... 
 2323 18:58:01.576992  
 2324 18:58:01.577060  00000000 # done.
 2325 18:58:01.577124  
 2326 18:58:01.586543  Command line loaded dynamically from TFTP file: 8815443/tftp-deploy-vb5iyu23/kernel/cmdline
 2327 18:58:01.586697  
 2328 18:58:01.606975  The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8815443/extract-nfsrootfs-s9425vun,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2329 18:58:01.607155  
 2330 18:58:01.614307  Shutting down all USB controllers.
 2331 18:58:01.614446  
 2332 18:58:01.614520  Removing current net device
 2333 18:58:01.614583  
 2334 18:58:01.617562  Finalizing coreboot
 2335 18:58:01.617663  
 2336 18:58:01.624192  Exiting depthcharge with code 4 at timestamp: 25917100
 2337 18:58:01.624299  
 2338 18:58:01.624371  
 2339 18:58:01.624434  Starting kernel ...
 2340 18:58:01.624498  
 2341 18:58:01.624560  
 2342 18:58:01.625031  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2343 18:58:01.625154  start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
 2344 18:58:01.625244  Setting prompt string to ['Linux version [0-9]']
 2345 18:58:01.625323  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2346 18:58:01.625401  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2347 18:58:01.627182  
 2348 18:58:01.627269  
 2350 19:02:27.625485  end: 2.2.5 auto-login-action (duration 00:04:26) [common]
 2352 19:02:27.625696  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
 2354 19:02:27.625851  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2357 19:02:27.626132  end: 2 depthcharge-action (duration 00:05:00) [common]
 2359 19:02:27.626432  Cleaning after the job
 2360 19:02:27.626515  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/ramdisk
 2361 19:02:27.627101  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/kernel
 2362 19:02:27.627830  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/nfsrootfs
 2363 19:02:27.659324  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815443/tftp-deploy-vb5iyu23/modules
 2364 19:02:27.659635  start: 5.1 power-off (timeout 00:00:30) [common]
 2365 19:02:27.659800  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
 2366 19:02:27.679690  >> Command sent successfully.

 2367 19:02:27.681762  Returned 0 in 0 seconds
 2368 19:02:27.782552  end: 5.1 power-off (duration 00:00:00) [common]
 2370 19:02:27.782887  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2371 19:02:27.783162  Listened to connection for namespace 'common' for up to 1s
 2372 19:02:28.788134  Finalising connection for namespace 'common'
 2373 19:02:28.788310  Disconnecting from shell: Finalise
 2374 19:02:28.889028  end: 5.2 read-feedback (duration 00:00:01) [common]
 2375 19:02:28.889181  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8815443
 2376 19:02:28.983802  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8815443
 2377 19:02:28.983990  JobError: Your job cannot terminate cleanly.