Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 18:57:10.090321 lava-dispatcher, installed at version: 2022.11
2 18:57:10.090526 start: 0 validate
3 18:57:10.090660 Start time: 2023-01-21 18:57:10.090653+00:00 (UTC)
4 18:57:10.090797 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:57:10.090934 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230114.0%2Famd64%2Frootfs.cpio.gz exists
6 18:57:10.384784 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:57:10.384977 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:57:10.676046 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:57:10.676215 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.270-cip89%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 18:57:10.971024 validate duration: 0.88
12 18:57:10.971991 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:57:10.972519 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:57:10.973001 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:57:10.973523 Not decompressing ramdisk as can be used compressed.
16 18:57:10.973970 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230114.0/amd64/rootfs.cpio.gz
17 18:57:10.974317 saving as /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/ramdisk/rootfs.cpio.gz
18 18:57:10.974679 total size: 35753308 (34MB)
19 18:57:10.980697 progress 0% (0MB)
20 18:57:10.995775 progress 5% (1MB)
21 18:57:11.010755 progress 10% (3MB)
22 18:57:11.025666 progress 15% (5MB)
23 18:57:11.041068 progress 20% (6MB)
24 18:57:11.056001 progress 25% (8MB)
25 18:57:11.071362 progress 30% (10MB)
26 18:57:11.086531 progress 35% (11MB)
27 18:57:11.101900 progress 40% (13MB)
28 18:57:11.117058 progress 45% (15MB)
29 18:57:11.132227 progress 50% (17MB)
30 18:57:11.147587 progress 55% (18MB)
31 18:57:11.162903 progress 60% (20MB)
32 18:57:11.178546 progress 65% (22MB)
33 18:57:11.193141 progress 70% (23MB)
34 18:57:11.208475 progress 75% (25MB)
35 18:57:11.223615 progress 80% (27MB)
36 18:57:11.239000 progress 85% (29MB)
37 18:57:11.254005 progress 90% (30MB)
38 18:57:11.269313 progress 95% (32MB)
39 18:57:11.284723 progress 100% (34MB)
40 18:57:11.284928 34MB downloaded in 0.31s (109.90MB/s)
41 18:57:11.285089 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:57:11.285339 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:57:11.285470 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:57:11.285562 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:57:11.285669 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 18:57:11.285737 saving as /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/kernel/bzImage
48 18:57:11.285800 total size: 9711616 (9MB)
49 18:57:11.285861 No compression specified
50 18:57:14.288355 progress 0% (0MB)
51 18:57:14.300549 progress 5% (0MB)
52 18:57:14.312681 progress 10% (0MB)
53 18:57:14.324260 progress 15% (1MB)
54 18:57:14.336998 progress 20% (1MB)
55 18:57:14.349869 progress 25% (2MB)
56 18:57:14.361103 progress 30% (2MB)
57 18:57:14.374489 progress 35% (3MB)
58 18:57:14.386190 progress 40% (3MB)
59 18:57:14.400036 progress 45% (4MB)
60 18:57:14.411537 progress 50% (4MB)
61 18:57:14.424931 progress 55% (5MB)
62 18:57:14.436617 progress 60% (5MB)
63 18:57:14.448491 progress 65% (6MB)
64 18:57:14.459665 progress 70% (6MB)
65 18:57:14.473484 progress 75% (6MB)
66 18:57:14.485380 progress 80% (7MB)
67 18:57:14.497889 progress 85% (7MB)
68 18:57:14.509555 progress 90% (8MB)
69 18:57:14.521490 progress 95% (8MB)
70 18:57:14.533407 progress 100% (9MB)
71 18:57:14.533669 9MB downloaded in 3.25s (2.85MB/s)
72 18:57:14.533820 end: 1.2.1 http-download (duration 00:00:03) [common]
74 18:57:14.534060 end: 1.2 download-retry (duration 00:00:03) [common]
75 18:57:14.534149 start: 1.3 download-retry (timeout 00:09:56) [common]
76 18:57:14.534235 start: 1.3.1 http-download (timeout 00:09:56) [common]
77 18:57:14.534340 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.270-cip89/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 18:57:14.534408 saving as /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/modules/modules.tar
79 18:57:14.534468 total size: 64624 (0MB)
80 18:57:14.534528 Using unxz to decompress xz
81 18:57:14.538888 progress 50% (0MB)
82 18:57:14.539509 progress 100% (0MB)
83 18:57:14.543787 0MB downloaded in 0.01s (6.62MB/s)
84 18:57:14.544031 end: 1.3.1 http-download (duration 00:00:00) [common]
86 18:57:14.544313 end: 1.3 download-retry (duration 00:00:00) [common]
87 18:57:14.544413 start: 1.4 prepare-tftp-overlay (timeout 00:09:56) [common]
88 18:57:14.544530 start: 1.4.1 extract-nfsrootfs (timeout 00:09:56) [common]
89 18:57:14.544625 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 18:57:14.544722 start: 1.4.2 lava-overlay (timeout 00:09:56) [common]
91 18:57:14.544953 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk
92 18:57:14.545082 makedir: /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin
93 18:57:14.545181 makedir: /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/tests
94 18:57:14.545274 makedir: /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/results
95 18:57:14.545392 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-add-keys
96 18:57:14.545552 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-add-sources
97 18:57:14.545687 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-background-process-start
98 18:57:14.545817 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-background-process-stop
99 18:57:14.545947 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-common-functions
100 18:57:14.546072 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-echo-ipv4
101 18:57:14.546200 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-install-packages
102 18:57:14.546327 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-installed-packages
103 18:57:14.546451 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-os-build
104 18:57:14.546575 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-probe-channel
105 18:57:14.546702 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-probe-ip
106 18:57:14.546828 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-target-ip
107 18:57:14.546956 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-target-mac
108 18:57:14.547079 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-target-storage
109 18:57:14.547208 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-case
110 18:57:14.547332 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-event
111 18:57:14.547457 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-feedback
112 18:57:14.547580 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-raise
113 18:57:14.547709 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-reference
114 18:57:14.547833 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-runner
115 18:57:14.547956 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-set
116 18:57:14.548080 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-test-shell
117 18:57:14.548208 Updating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-install-packages (oe)
118 18:57:14.548337 Updating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/bin/lava-installed-packages (oe)
119 18:57:14.548451 Creating /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/environment
120 18:57:14.548552 LAVA metadata
121 18:57:14.548633 - LAVA_JOB_ID=8815429
122 18:57:14.548709 - LAVA_DISPATCHER_IP=192.168.201.1
123 18:57:14.548826 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:56) [common]
124 18:57:14.548902 skipped lava-vland-overlay
125 18:57:14.548990 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 18:57:14.549084 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
127 18:57:14.549158 skipped lava-multinode-overlay
128 18:57:14.549247 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 18:57:14.549352 start: 1.4.2.3 test-definition (timeout 00:09:56) [common]
130 18:57:14.549446 Loading test definitions
131 18:57:14.549559 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:56) [common]
132 18:57:14.549647 Using /lava-8815429 at stage 0
133 18:57:14.549943 uuid=8815429_1.4.2.3.1 testdef=None
134 18:57:14.550046 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 18:57:14.550149 start: 1.4.2.3.2 test-overlay (timeout 00:09:56) [common]
136 18:57:14.550692 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 18:57:14.550952 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:56) [common]
139 18:57:14.551577 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 18:57:14.551852 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
142 18:57:14.552443 runner path: /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/0/tests/0_cros-ec test_uuid 8815429_1.4.2.3.1
143 18:57:14.552610 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 18:57:14.552852 Creating lava-test-runner.conf files
146 18:57:14.552927 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8815429/lava-overlay-8mvokenk/lava-8815429/0 for stage 0
147 18:57:14.553019 - 0_cros-ec
148 18:57:14.553126 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 18:57:14.553226 start: 1.4.2.4 compress-overlay (timeout 00:09:56) [common]
150 18:57:14.558951 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 18:57:14.559184 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
152 18:57:14.559285 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 18:57:14.559383 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 18:57:14.559486 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
155 18:57:15.307292 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 18:57:15.307626 start: 1.4.4 extract-modules (timeout 00:09:56) [common]
157 18:57:15.307736 extracting modules file /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8815429/extract-overlay-ramdisk-tlebhxer/ramdisk
158 18:57:15.311936 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 18:57:15.312061 start: 1.4.5 apply-overlay-tftp (timeout 00:09:56) [common]
160 18:57:15.312146 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815429/compress-overlay-eqtf0h65/overlay-1.4.2.4.tar.gz to ramdisk
161 18:57:15.312218 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8815429/compress-overlay-eqtf0h65/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8815429/extract-overlay-ramdisk-tlebhxer/ramdisk
162 18:57:15.316931 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 18:57:15.317086 start: 1.4.6 configure-preseed-file (timeout 00:09:56) [common]
164 18:57:15.317220 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 18:57:15.317358 start: 1.4.7 compress-ramdisk (timeout 00:09:56) [common]
166 18:57:15.317518 Building ramdisk /var/lib/lava/dispatcher/tmp/8815429/extract-overlay-ramdisk-tlebhxer/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8815429/extract-overlay-ramdisk-tlebhxer/ramdisk
167 18:57:15.564469 >> 182673 blocks
168 18:57:18.792416 rename /var/lib/lava/dispatcher/tmp/8815429/extract-overlay-ramdisk-tlebhxer/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
169 18:57:18.792827 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 18:57:18.792955 start: 1.4.8 prepare-kernel (timeout 00:09:52) [common]
171 18:57:18.793057 start: 1.4.8.1 prepare-fit (timeout 00:09:52) [common]
172 18:57:18.793151 No mkimage arch provided, not using FIT.
173 18:57:18.793237 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 18:57:18.793325 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 18:57:18.793440 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 18:57:18.793552 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:52) [common]
177 18:57:18.793649 No LXC device requested
178 18:57:18.793734 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 18:57:18.793827 start: 1.6 deploy-device-env (timeout 00:09:52) [common]
180 18:57:18.793915 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 18:57:18.793989 Checking files for TFTP limit of 4294967296 bytes.
182 18:57:18.794376 end: 1 tftp-deploy (duration 00:00:08) [common]
183 18:57:18.794482 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 18:57:18.794581 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 18:57:18.794709 substitutions:
186 18:57:18.794780 - {DTB}: None
187 18:57:18.794848 - {INITRD}: 8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
188 18:57:18.794909 - {KERNEL}: 8815429/tftp-deploy-8fde47j2/kernel/bzImage
189 18:57:18.794969 - {LAVA_MAC}: None
190 18:57:18.795026 - {PRESEED_CONFIG}: None
191 18:57:18.795085 - {PRESEED_LOCAL}: None
192 18:57:18.795141 - {RAMDISK}: 8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
193 18:57:18.795197 - {ROOT_PART}: None
194 18:57:18.795252 - {ROOT}: None
195 18:57:18.795307 - {SERVER_IP}: 192.168.201.1
196 18:57:18.795362 - {TEE}: None
197 18:57:18.795417 Parsed boot commands:
198 18:57:18.795499 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 18:57:18.795664 Parsed boot commands: tftpboot 192.168.201.1 8815429/tftp-deploy-8fde47j2/kernel/bzImage 8815429/tftp-deploy-8fde47j2/kernel/cmdline 8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
200 18:57:18.795769 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 18:57:18.795854 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 18:57:18.795944 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 18:57:18.796027 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 18:57:18.796098 Not connected, no need to disconnect.
205 18:57:18.796174 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 18:57:18.796255 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 18:57:18.796321 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
208 18:57:18.799043 Setting prompt string to ['lava-test: # ']
209 18:57:18.799329 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 18:57:18.799435 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 18:57:18.799534 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 18:57:18.799624 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 18:57:18.799841 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
214 18:57:18.818921 >> Command sent successfully.
215 18:57:18.820871 Returned 0 in 0 seconds
216 18:57:18.921638 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 18:57:18.921975 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 18:57:18.922084 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 18:57:18.922187 Setting prompt string to 'Starting depthcharge on Voema...'
221 18:57:18.922290 Changing prompt to 'Starting depthcharge on Voema...'
222 18:57:18.922386 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 18:57:18.922673 [Enter `^Ec?' for help]
224 18:57:26.683419
225 18:57:26.683574
226 18:57:26.692737 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 18:57:26.695954 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 18:57:26.698950
229 18:57:26.702234 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
230 18:57:26.705727 CPU: AES supported, TXT NOT supported, VT supported
231 18:57:26.712588 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
232 18:57:26.719024 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
233 18:57:26.722440 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 18:57:26.725580 VBOOT: Loading verstage.
235 18:57:26.732272 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 18:57:26.735917 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 18:57:26.742187 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 18:57:26.748697 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 18:57:26.755225 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 18:57:26.758495
241 18:57:26.758649
242 18:57:26.768602 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 18:57:26.783056 Probing TPM: . done!
244 18:57:26.786996 TPM ready after 0 ms
245 18:57:26.790094 Connected to device vid:did:rid of 1ae0:0028:00
246 18:57:26.801317 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
247 18:57:26.807731 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 18:57:26.810902 Initialized TPM device CR50 revision 0
249 18:57:26.862757 tlcl_send_startup: Startup return code is 0
250 18:57:26.862890 TPM: setup succeeded
251 18:57:26.876898 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 18:57:26.890856 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 18:57:26.904045 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 18:57:26.913847 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 18:57:26.917828 Chrome EC: UHEPI supported
256 18:57:26.921078 Phase 1
257 18:57:26.924594 FMAP: area GBB found @ 1805000 (458752 bytes)
258 18:57:26.934256 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 18:57:26.940760 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
260 18:57:26.947056 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
261 18:57:26.953857 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
262 18:57:26.957090 Recovery requested (1009000e)
263 18:57:26.960667 TPM: Extending digest for VBOOT: boot mode into PCR 0
264 18:57:26.972076 tlcl_extend: response is 0
265 18:57:26.978549 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
266 18:57:26.988699 tlcl_extend: response is 0
267 18:57:26.995725 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 18:57:27.002157 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
269 18:57:27.008496 BS: verstage times (exec / console): total (unknown) / 142 ms
270 18:57:27.008594
271 18:57:27.008662
272 18:57:27.021684 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
273 18:57:27.028206 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
274 18:57:27.031531 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
275 18:57:27.035322 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
276 18:57:27.041889 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
277 18:57:27.044801 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
278 18:57:27.048770 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
279 18:57:27.051294 TCO_STS: 0000 0000
280 18:57:27.054943 GEN_PMCON: d0015038 00002200
281 18:57:27.058193 GBLRST_CAUSE: 00000000 00000000
282 18:57:27.061302 HPR_CAUSE0: 00000000
283 18:57:27.061390 prev_sleep_state 5
284 18:57:27.064989 Boot Count incremented to 15255
285 18:57:27.071597 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
286 18:57:27.078664 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 18:57:27.087934 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 18:57:27.094560 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
289 18:57:27.097696 Chrome EC: UHEPI supported
290 18:57:27.104392 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
291 18:57:27.116237 Probing TPM: done!
292 18:57:27.124420 Connected to device vid:did:rid of 1ae0:0028:00
293 18:57:27.131553 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
294 18:57:27.140133 Initialized TPM device CR50 revision 0
295 18:57:27.149921 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
296 18:57:27.156765 MRC: Hash idx 0x100b comparison successful.
297 18:57:27.159817 MRC cache found, size faa8
298 18:57:27.159914 bootmode is set to: 2
299 18:57:27.163017 SPD index = 0
300 18:57:27.169650 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
301 18:57:27.173210 SPD: module type is LPDDR4X
302 18:57:27.175975 SPD: module part number is MT53E512M64D4NW-046
303 18:57:27.182750 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
304 18:57:27.186489 SPD: device width 16 bits, bus width 16 bits
305 18:57:27.192861 SPD: module size is 1024 MB (per channel)
306 18:57:27.626577 CBMEM:
307 18:57:27.629841 IMD: root @ 0x76fff000 254 entries.
308 18:57:27.633361 IMD: root @ 0x76ffec00 62 entries.
309 18:57:27.636443 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
310 18:57:27.642701 FMAP: area RW_VPD found @ f35000 (8192 bytes)
311 18:57:27.646363 External stage cache:
312 18:57:27.649436 IMD: root @ 0x7b3ff000 254 entries.
313 18:57:27.652858 IMD: root @ 0x7b3fec00 62 entries.
314 18:57:27.668274 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
315 18:57:27.674964 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
316 18:57:27.682258 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
317 18:57:27.695887 MRC: 'RECOVERY_MRC_CACHE' does not need update.
318 18:57:27.702714 cse_lite: Skip switching to RW in the recovery path
319 18:57:27.702838 8 DIMMs found
320 18:57:27.702919 SMM Memory Map
321 18:57:27.706006 SMRAM : 0x7b000000 0x800000
322 18:57:27.709435 Subregion 0: 0x7b000000 0x200000
323 18:57:27.712662 Subregion 1: 0x7b200000 0x200000
324 18:57:27.716087 Subregion 2: 0x7b400000 0x400000
325 18:57:27.719778 top_of_ram = 0x77000000
326 18:57:27.725928 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
327 18:57:27.729233 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
328 18:57:27.735949 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
329 18:57:27.739234 MTRR Range: Start=ff000000 End=0 (Size 1000000)
330 18:57:27.749195 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
331 18:57:27.756324 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
332 18:57:27.765856 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
333 18:57:27.769257 Processing 211 relocs. Offset value of 0x74c0b000
334 18:57:27.778281 BS: romstage times (exec / console): total (unknown) / 277 ms
335 18:57:27.784256
336 18:57:27.784362
337 18:57:27.794325 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
338 18:57:27.797805 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
339 18:57:27.807581 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 18:57:27.814160 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 18:57:27.820600 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
342 18:57:27.827322 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
343 18:57:27.874307 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
344 18:57:27.880890 Processing 5008 relocs. Offset value of 0x75d98000
345 18:57:27.884701 BS: postcar times (exec / console): total (unknown) / 59 ms
346 18:57:27.887433
347 18:57:27.887526
348 18:57:27.897846 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
349 18:57:27.897956 Normal boot
350 18:57:27.901146 FW_CONFIG value is 0x804c02
351 18:57:27.904406 PCI: 00:07.0 disabled by fw_config
352 18:57:27.907748 PCI: 00:07.1 disabled by fw_config
353 18:57:27.911038 PCI: 00:0d.2 disabled by fw_config
354 18:57:27.914508 PCI: 00:1c.7 disabled by fw_config
355 18:57:27.921078 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 18:57:27.928094 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 18:57:27.931075 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
358 18:57:27.934607 GENERIC: 0.0 disabled by fw_config
359 18:57:27.937542 GENERIC: 1.0 disabled by fw_config
360 18:57:27.944613 fw_config match found: DB_USB=USB3_ACTIVE
361 18:57:27.947452 fw_config match found: DB_USB=USB3_ACTIVE
362 18:57:27.950742 fw_config match found: DB_USB=USB3_ACTIVE
363 18:57:27.957828 fw_config match found: DB_USB=USB3_ACTIVE
364 18:57:27.960768 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 18:57:27.967523 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 18:57:27.977735 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 18:57:27.984149 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
368 18:57:27.987190 microcode: sig=0x806c1 pf=0x80 revision=0x86
369 18:57:27.994098 microcode: Update skipped, already up-to-date
370 18:57:28.000565 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
371 18:57:28.027999 Detected 4 core, 8 thread CPU.
372 18:57:28.031363 Setting up SMI for CPU
373 18:57:28.034697 IED base = 0x7b400000
374 18:57:28.034788 IED size = 0x00400000
375 18:57:28.038054 Will perform SMM setup.
376 18:57:28.044266 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
377 18:57:28.051393 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
378 18:57:28.057772 Processing 16 relocs. Offset value of 0x00030000
379 18:57:28.061224 Attempting to start 7 APs
380 18:57:28.064303 Waiting for 10ms after sending INIT.
381 18:57:28.080450 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 2.
382 18:57:28.083412 AP: slot 2 apic_id 3.
383 18:57:28.086746 AP: slot 1 apic_id 1.
384 18:57:28.086825 AP: slot 3 apic_id 7.
385 18:57:28.089962 AP: slot 7 apic_id 6.
386 18:57:28.093631 AP: slot 4 apic_id 5.
387 18:57:28.093710 AP: slot 5 apic_id 4.
388 18:57:28.093777 done.
389 18:57:28.099803 Waiting for 2nd SIPI to complete...done.
390 18:57:28.106849 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
391 18:57:28.113352 Processing 13 relocs. Offset value of 0x00038000
392 18:57:28.116350 Unable to locate Global NVS
393 18:57:28.123048 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
394 18:57:28.126734 Installing permanent SMM handler to 0x7b000000
395 18:57:28.136575 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
396 18:57:28.139726 Processing 794 relocs. Offset value of 0x7b010000
397 18:57:28.149419 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
398 18:57:28.152862 Processing 13 relocs. Offset value of 0x7b008000
399 18:57:28.159916 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
400 18:57:28.166454 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
401 18:57:28.169122 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
402 18:57:28.172552
403 18:57:28.176159 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
404 18:57:28.182572 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
405 18:57:28.189591 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
406 18:57:28.195740 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
407 18:57:28.199391 Unable to locate Global NVS
408 18:57:28.205558 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
409 18:57:28.208840 Clearing SMI status registers
410 18:57:28.212115 SMI_STS: PM1
411 18:57:28.212219 PM1_STS: PWRBTN
412 18:57:28.218632 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
413 18:57:28.222006 In relocation handler: CPU 0
414 18:57:28.225371 New SMBASE=0x7b000000 IEDBASE=0x7b400000
415 18:57:28.232006 Writing SMRR. base = 0x7b000006, mask=0xff800c00
416 18:57:28.235372 Relocation complete.
417 18:57:28.242220 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
418 18:57:28.245441 In relocation handler: CPU 1
419 18:57:28.248726 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
420 18:57:28.251879 Relocation complete.
421 18:57:28.258513 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
422 18:57:28.262275 In relocation handler: CPU 6
423 18:57:28.265106 New SMBASE=0x7affe800 IEDBASE=0x7b400000
424 18:57:28.268480 Writing SMRR. base = 0x7b000006, mask=0xff800c00
425 18:57:28.272119 Relocation complete.
426 18:57:28.278267 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
427 18:57:28.281734 In relocation handler: CPU 2
428 18:57:28.285605 New SMBASE=0x7afff800 IEDBASE=0x7b400000
429 18:57:28.288310 Relocation complete.
430 18:57:28.296199 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
431 18:57:28.298218 In relocation handler: CPU 3
432 18:57:28.301714 New SMBASE=0x7afff400 IEDBASE=0x7b400000
433 18:57:28.305268 Relocation complete.
434 18:57:28.311828 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
435 18:57:28.314621 In relocation handler: CPU 7
436 18:57:28.318335 New SMBASE=0x7affe400 IEDBASE=0x7b400000
437 18:57:28.325100 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 18:57:28.325215 Relocation complete.
439 18:57:28.334494 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
440 18:57:28.334602 In relocation handler: CPU 4
441 18:57:28.338048
442 18:57:28.341263 New SMBASE=0x7afff000 IEDBASE=0x7b400000
443 18:57:28.341347 Relocation complete.
444 18:57:28.351241 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 18:57:28.351322 In relocation handler: CPU 5
446 18:57:28.357715 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 18:57:28.361202 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 18:57:28.364267 Relocation complete.
449 18:57:28.364347 Initializing CPU #0
450 18:57:28.368265 CPU: vendor Intel device 806c1
451 18:57:28.371943 CPU: family 06, model 8c, stepping 01
452 18:57:28.375339 Clearing out pending MCEs
453 18:57:28.378428 Setting up local APIC...
454 18:57:28.381988 apic_id: 0x00 done.
455 18:57:28.382066 Turbo is available but hidden
456 18:57:28.385198
457 18:57:28.385275 Turbo is available and visible
458 18:57:28.391855 microcode: Update skipped, already up-to-date
459 18:57:28.395714 CPU #0 initialized
460 18:57:28.395791 Initializing CPU #2
461 18:57:28.398706 Initializing CPU #5
462 18:57:28.398789 Initializing CPU #4
463 18:57:28.402071 CPU: vendor Intel device 806c1
464 18:57:28.405604 CPU: family 06, model 8c, stepping 01
465 18:57:28.408339
466 18:57:28.408414 CPU: vendor Intel device 806c1
467 18:57:28.415306 CPU: family 06, model 8c, stepping 01
468 18:57:28.415384 Clearing out pending MCEs
469 18:57:28.418917 Clearing out pending MCEs
470 18:57:28.421382 Initializing CPU #7
471 18:57:28.425149 CPU: vendor Intel device 806c1
472 18:57:28.428562 CPU: family 06, model 8c, stepping 01
473 18:57:28.432085 CPU: vendor Intel device 806c1
474 18:57:28.435332 CPU: family 06, model 8c, stepping 01
475 18:57:28.438292 Initializing CPU #3
476 18:57:28.438377 Clearing out pending MCEs
477 18:57:28.441237 CPU: vendor Intel device 806c1
478 18:57:28.444654 CPU: family 06, model 8c, stepping 01
479 18:57:28.448017
480 18:57:28.448099 Setting up local APIC...
481 18:57:28.451459 Clearing out pending MCEs
482 18:57:28.454527 Initializing CPU #6
483 18:57:28.454617 Setting up local APIC...
484 18:57:28.458020 Clearing out pending MCEs
485 18:57:28.461671 apic_id: 0x06 done.
486 18:57:28.464980 Setting up local APIC...
487 18:57:28.465057 Setting up local APIC...
488 18:57:28.468097 apic_id: 0x04 done.
489 18:57:28.471688 Setting up local APIC...
490 18:57:28.474884 CPU: vendor Intel device 806c1
491 18:57:28.477737 CPU: family 06, model 8c, stepping 01
492 18:57:28.481116 apic_id: 0x03 done.
493 18:57:28.481212 Clearing out pending MCEs
494 18:57:28.487601 microcode: Update skipped, already up-to-date
495 18:57:28.491091 Setting up local APIC...
496 18:57:28.491192 apic_id: 0x07 done.
497 18:57:28.497712 microcode: Update skipped, already up-to-date
498 18:57:28.501583 microcode: Update skipped, already up-to-date
499 18:57:28.504399 CPU #7 initialized
500 18:57:28.504496 CPU #3 initialized
501 18:57:28.507869 apic_id: 0x05 done.
502 18:57:28.510961 microcode: Update skipped, already up-to-date
503 18:57:28.517738 microcode: Update skipped, already up-to-date
504 18:57:28.517829 CPU #5 initialized
505 18:57:28.520952 CPU #4 initialized
506 18:57:28.521037 Initializing CPU #1
507 18:57:28.524701 CPU #2 initialized
508 18:57:28.527663 apic_id: 0x02 done.
509 18:57:28.527749 CPU: vendor Intel device 806c1
510 18:57:28.531130
511 18:57:28.534110 CPU: family 06, model 8c, stepping 01
512 18:57:28.537389 microcode: Update skipped, already up-to-date
513 18:57:28.541191 Clearing out pending MCEs
514 18:57:28.541277 CPU #6 initialized
515 18:57:28.544311 Setting up local APIC...
516 18:57:28.547392 apic_id: 0x01 done.
517 18:57:28.550986 microcode: Update skipped, already up-to-date
518 18:57:28.554264 CPU #1 initialized
519 18:57:28.557398 bsp_do_flight_plan done after 455 msecs.
520 18:57:28.560707 CPU: frequency set to 4000 MHz
521 18:57:28.564037 Enabling SMIs.
522 18:57:28.570420 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
523 18:57:28.585533 SATAXPCIE1 indicates PCIe NVMe is present
524 18:57:28.588192 Probing TPM: done!
525 18:57:28.592196 Connected to device vid:did:rid of 1ae0:0028:00
526 18:57:28.602435 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
527 18:57:28.606617 Initialized TPM device CR50 revision 0
528 18:57:28.608647 Enabling S0i3.4
529 18:57:28.615982 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
530 18:57:28.618898 Found a VBT of 8704 bytes after decompression
531 18:57:28.625772 cse_lite: CSE RO boot. HybridStorageMode disabled
532 18:57:28.632020 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
533 18:57:28.708198 FSPS returned 0
534 18:57:28.711488 Executing Phase 1 of FspMultiPhaseSiInit
535 18:57:28.721646 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
536 18:57:28.724617 port C0 DISC req: usage 1 usb3 1 usb2 5
537 18:57:28.727933 Raw Buffer output 0 00000511
538 18:57:28.731354 Raw Buffer output 1 00000000
539 18:57:28.735108 pmc_send_ipc_cmd succeeded
540 18:57:28.738276 port C1 DISC req: usage 1 usb3 2 usb2 3
541 18:57:28.741678
542 18:57:28.741765 Raw Buffer output 0 00000321
543 18:57:28.744910 Raw Buffer output 1 00000000
544 18:57:28.749356 pmc_send_ipc_cmd succeeded
545 18:57:28.754715 Detected 4 core, 8 thread CPU.
546 18:57:28.757348 Detected 4 core, 8 thread CPU.
547 18:57:28.991528 Display FSP Version Info HOB
548 18:57:28.995040 Reference Code - CPU = a.0.4c.31
549 18:57:28.997823 uCode Version = 0.0.0.86
550 18:57:29.001316 TXT ACM version = ff.ff.ff.ffff
551 18:57:29.004548 Reference Code - ME = a.0.4c.31
552 18:57:29.007999 MEBx version = 0.0.0.0
553 18:57:29.011049 ME Firmware Version = Consumer SKU
554 18:57:29.014495 Reference Code - PCH = a.0.4c.31
555 18:57:29.018355 PCH-CRID Status = Disabled
556 18:57:29.020960 PCH-CRID Original Value = ff.ff.ff.ffff
557 18:57:29.024512 PCH-CRID New Value = ff.ff.ff.ffff
558 18:57:29.028181 OPROM - RST - RAID = ff.ff.ff.ffff
559 18:57:29.031187 PCH Hsio Version = 4.0.0.0
560 18:57:29.034741 Reference Code - SA - System Agent = a.0.4c.31
561 18:57:29.037932 Reference Code - MRC = 2.0.0.1
562 18:57:29.041222 SA - PCIe Version = a.0.4c.31
563 18:57:29.044422 SA-CRID Status = Disabled
564 18:57:29.047568 SA-CRID Original Value = 0.0.0.1
565 18:57:29.051422 SA-CRID New Value = 0.0.0.1
566 18:57:29.054474 OPROM - VBIOS = ff.ff.ff.ffff
567 18:57:29.057967 IO Manageability Engine FW Version = 11.1.4.0
568 18:57:29.061320 PHY Build Version = 0.0.0.e0
569 18:57:29.064537 Thunderbolt(TM) FW Version = 0.0.0.0
570 18:57:29.071368 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
571 18:57:29.074440 ITSS IRQ Polarities Before:
572 18:57:29.074518 IPC0: 0xffffffff
573 18:57:29.077869 IPC1: 0xffffffff
574 18:57:29.077938 IPC2: 0xffffffff
575 18:57:29.080788 IPC3: 0xffffffff
576 18:57:29.084108 ITSS IRQ Polarities After:
577 18:57:29.084191 IPC0: 0xffffffff
578 18:57:29.087529 IPC1: 0xffffffff
579 18:57:29.087604 IPC2: 0xffffffff
580 18:57:29.091077 IPC3: 0xffffffff
581 18:57:29.094448 Found PCIe Root Port #9 at PCI: 00:1d.0.
582 18:57:29.107494 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
583 18:57:29.117299 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
584 18:57:29.130440 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
585 18:57:29.137181 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
586 18:57:29.140674 Enumerating buses...
587 18:57:29.144550 Show all devs... Before device enumeration.
588 18:57:29.147410 Root Device: enabled 1
589 18:57:29.147496 DOMAIN: 0000: enabled 1
590 18:57:29.150851 CPU_CLUSTER: 0: enabled 1
591 18:57:29.153926 PCI: 00:00.0: enabled 1
592 18:57:29.156933 PCI: 00:02.0: enabled 1
593 18:57:29.157009 PCI: 00:04.0: enabled 1
594 18:57:29.160532 PCI: 00:05.0: enabled 1
595 18:57:29.163879 PCI: 00:06.0: enabled 0
596 18:57:29.167588 PCI: 00:07.0: enabled 0
597 18:57:29.167662 PCI: 00:07.1: enabled 0
598 18:57:29.170964 PCI: 00:07.2: enabled 0
599 18:57:29.173706 PCI: 00:07.3: enabled 0
600 18:57:29.173781 PCI: 00:08.0: enabled 1
601 18:57:29.176927
602 18:57:29.177002 PCI: 00:09.0: enabled 0
603 18:57:29.180382 PCI: 00:0a.0: enabled 0
604 18:57:29.183364 PCI: 00:0d.0: enabled 1
605 18:57:29.183435 PCI: 00:0d.1: enabled 0
606 18:57:29.187174 PCI: 00:0d.2: enabled 0
607 18:57:29.190378 PCI: 00:0d.3: enabled 0
608 18:57:29.193630 PCI: 00:0e.0: enabled 0
609 18:57:29.193716 PCI: 00:10.2: enabled 1
610 18:57:29.196780 PCI: 00:10.6: enabled 0
611 18:57:29.200991 PCI: 00:10.7: enabled 0
612 18:57:29.203373 PCI: 00:12.0: enabled 0
613 18:57:29.203461 PCI: 00:12.6: enabled 0
614 18:57:29.206778 PCI: 00:13.0: enabled 0
615 18:57:29.210149 PCI: 00:14.0: enabled 1
616 18:57:29.213505 PCI: 00:14.1: enabled 0
617 18:57:29.213593 PCI: 00:14.2: enabled 1
618 18:57:29.216679 PCI: 00:14.3: enabled 1
619 18:57:29.220078 PCI: 00:15.0: enabled 1
620 18:57:29.220164 PCI: 00:15.1: enabled 1
621 18:57:29.223535 PCI: 00:15.2: enabled 1
622 18:57:29.226995 PCI: 00:15.3: enabled 1
623 18:57:29.229903 PCI: 00:16.0: enabled 1
624 18:57:29.229989 PCI: 00:16.1: enabled 0
625 18:57:29.233379 PCI: 00:16.2: enabled 0
626 18:57:29.236652 PCI: 00:16.3: enabled 0
627 18:57:29.240003 PCI: 00:16.4: enabled 0
628 18:57:29.240092 PCI: 00:16.5: enabled 0
629 18:57:29.243454 PCI: 00:17.0: enabled 1
630 18:57:29.246548 PCI: 00:19.0: enabled 0
631 18:57:29.250031 PCI: 00:19.1: enabled 1
632 18:57:29.250117 PCI: 00:19.2: enabled 0
633 18:57:29.253244 PCI: 00:1c.0: enabled 1
634 18:57:29.256461 PCI: 00:1c.1: enabled 0
635 18:57:29.259971 PCI: 00:1c.2: enabled 0
636 18:57:29.260057 PCI: 00:1c.3: enabled 0
637 18:57:29.263170 PCI: 00:1c.4: enabled 0
638 18:57:29.266538 PCI: 00:1c.5: enabled 0
639 18:57:29.266624 PCI: 00:1c.6: enabled 1
640 18:57:29.270368 PCI: 00:1c.7: enabled 0
641 18:57:29.273476 PCI: 00:1d.0: enabled 1
642 18:57:29.276999 PCI: 00:1d.1: enabled 0
643 18:57:29.277085 PCI: 00:1d.2: enabled 1
644 18:57:29.279790 PCI: 00:1d.3: enabled 0
645 18:57:29.282859 PCI: 00:1e.0: enabled 1
646 18:57:29.286702 PCI: 00:1e.1: enabled 0
647 18:57:29.286789 PCI: 00:1e.2: enabled 1
648 18:57:29.289995 PCI: 00:1e.3: enabled 1
649 18:57:29.293385 PCI: 00:1f.0: enabled 1
650 18:57:29.297299 PCI: 00:1f.1: enabled 0
651 18:57:29.297386 PCI: 00:1f.2: enabled 1
652 18:57:29.300183 PCI: 00:1f.3: enabled 1
653 18:57:29.303155 PCI: 00:1f.4: enabled 0
654 18:57:29.303245 PCI: 00:1f.5: enabled 1
655 18:57:29.306404
656 18:57:29.306492 PCI: 00:1f.6: enabled 0
657 18:57:29.309496 PCI: 00:1f.7: enabled 0
658 18:57:29.313257 APIC: 00: enabled 1
659 18:57:29.313354 GENERIC: 0.0: enabled 1
660 18:57:29.316516 GENERIC: 0.0: enabled 1
661 18:57:29.319984 GENERIC: 1.0: enabled 1
662 18:57:29.322699 GENERIC: 0.0: enabled 1
663 18:57:29.322800 GENERIC: 1.0: enabled 1
664 18:57:29.326123 USB0 port 0: enabled 1
665 18:57:29.329778 GENERIC: 0.0: enabled 1
666 18:57:29.329868 USB0 port 0: enabled 1
667 18:57:29.332817 GENERIC: 0.0: enabled 1
668 18:57:29.336094 I2C: 00:1a: enabled 1
669 18:57:29.339342 I2C: 00:31: enabled 1
670 18:57:29.339424 I2C: 00:32: enabled 1
671 18:57:29.342737 I2C: 00:10: enabled 1
672 18:57:29.345976 I2C: 00:15: enabled 1
673 18:57:29.346087 GENERIC: 0.0: enabled 0
674 18:57:29.349297 GENERIC: 1.0: enabled 0
675 18:57:29.352630 GENERIC: 0.0: enabled 1
676 18:57:29.352709 SPI: 00: enabled 1
677 18:57:29.355898 SPI: 00: enabled 1
678 18:57:29.359353 PNP: 0c09.0: enabled 1
679 18:57:29.359445 GENERIC: 0.0: enabled 1
680 18:57:29.362875 USB3 port 0: enabled 1
681 18:57:29.365711 USB3 port 1: enabled 1
682 18:57:29.368910 USB3 port 2: enabled 0
683 18:57:29.368989 USB3 port 3: enabled 0
684 18:57:29.372301 USB2 port 0: enabled 0
685 18:57:29.375808 USB2 port 1: enabled 1
686 18:57:29.375897 USB2 port 2: enabled 1
687 18:57:29.378972 USB2 port 3: enabled 0
688 18:57:29.382682 USB2 port 4: enabled 1
689 18:57:29.385908 USB2 port 5: enabled 0
690 18:57:29.385994 USB2 port 6: enabled 0
691 18:57:29.388981 USB2 port 7: enabled 0
692 18:57:29.391999 USB2 port 8: enabled 0
693 18:57:29.392077 USB2 port 9: enabled 0
694 18:57:29.395328 USB3 port 0: enabled 0
695 18:57:29.398817 USB3 port 1: enabled 1
696 18:57:29.402252 USB3 port 2: enabled 0
697 18:57:29.402336 USB3 port 3: enabled 0
698 18:57:29.405268 GENERIC: 0.0: enabled 1
699 18:57:29.409060 GENERIC: 1.0: enabled 1
700 18:57:29.409145 APIC: 01: enabled 1
701 18:57:29.412207 APIC: 03: enabled 1
702 18:57:29.415502 APIC: 07: enabled 1
703 18:57:29.415587 APIC: 05: enabled 1
704 18:57:29.419099 APIC: 04: enabled 1
705 18:57:29.419184 APIC: 02: enabled 1
706 18:57:29.422261 APIC: 06: enabled 1
707 18:57:29.425085 Compare with tree...
708 18:57:29.425171 Root Device: enabled 1
709 18:57:29.428648 DOMAIN: 0000: enabled 1
710 18:57:29.431916 PCI: 00:00.0: enabled 1
711 18:57:29.435478 PCI: 00:02.0: enabled 1
712 18:57:29.438841 PCI: 00:04.0: enabled 1
713 18:57:29.438926 GENERIC: 0.0: enabled 1
714 18:57:29.442058 PCI: 00:05.0: enabled 1
715 18:57:29.445570 PCI: 00:06.0: enabled 0
716 18:57:29.448825 PCI: 00:07.0: enabled 0
717 18:57:29.451941 GENERIC: 0.0: enabled 1
718 18:57:29.452026 PCI: 00:07.1: enabled 0
719 18:57:29.455096 GENERIC: 1.0: enabled 1
720 18:57:29.458342 PCI: 00:07.2: enabled 0
721 18:57:29.461856 GENERIC: 0.0: enabled 1
722 18:57:29.465387 PCI: 00:07.3: enabled 0
723 18:57:29.465508 GENERIC: 1.0: enabled 1
724 18:57:29.468374
725 18:57:29.468450 PCI: 00:08.0: enabled 1
726 18:57:29.471628 PCI: 00:09.0: enabled 0
727 18:57:29.474953 PCI: 00:0a.0: enabled 0
728 18:57:29.478143 PCI: 00:0d.0: enabled 1
729 18:57:29.478220 USB0 port 0: enabled 1
730 18:57:29.481684 USB3 port 0: enabled 1
731 18:57:29.485040 USB3 port 1: enabled 1
732 18:57:29.488290 USB3 port 2: enabled 0
733 18:57:29.491313 USB3 port 3: enabled 0
734 18:57:29.494671 PCI: 00:0d.1: enabled 0
735 18:57:29.494760 PCI: 00:0d.2: enabled 0
736 18:57:29.498304 GENERIC: 0.0: enabled 1
737 18:57:29.501695 PCI: 00:0d.3: enabled 0
738 18:57:29.504934 PCI: 00:0e.0: enabled 0
739 18:57:29.508215 PCI: 00:10.2: enabled 1
740 18:57:29.508301 PCI: 00:10.6: enabled 0
741 18:57:29.511238 PCI: 00:10.7: enabled 0
742 18:57:29.514448 PCI: 00:12.0: enabled 0
743 18:57:29.518191 PCI: 00:12.6: enabled 0
744 18:57:29.521311 PCI: 00:13.0: enabled 0
745 18:57:29.521418 PCI: 00:14.0: enabled 1
746 18:57:29.524393 USB0 port 0: enabled 1
747 18:57:29.528096 USB2 port 0: enabled 0
748 18:57:29.531288 USB2 port 1: enabled 1
749 18:57:29.534496 USB2 port 2: enabled 1
750 18:57:29.534580 USB2 port 3: enabled 0
751 18:57:29.537772
752 18:57:29.537859 USB2 port 4: enabled 1
753 18:57:29.541096 USB2 port 5: enabled 0
754 18:57:29.544449 USB2 port 6: enabled 0
755 18:57:29.547967 USB2 port 7: enabled 0
756 18:57:29.550982 USB2 port 8: enabled 0
757 18:57:29.551067 USB2 port 9: enabled 0
758 18:57:29.554322 USB3 port 0: enabled 0
759 18:57:29.557452 USB3 port 1: enabled 1
760 18:57:29.560866 USB3 port 2: enabled 0
761 18:57:29.564455 USB3 port 3: enabled 0
762 18:57:29.568030 PCI: 00:14.1: enabled 0
763 18:57:29.568115 PCI: 00:14.2: enabled 1
764 18:57:29.570743 PCI: 00:14.3: enabled 1
765 18:57:29.573930 GENERIC: 0.0: enabled 1
766 18:57:29.577302 PCI: 00:15.0: enabled 1
767 18:57:29.581036 I2C: 00:1a: enabled 1
768 18:57:29.581122 I2C: 00:31: enabled 1
769 18:57:29.583995 I2C: 00:32: enabled 1
770 18:57:29.587606 PCI: 00:15.1: enabled 1
771 18:57:29.590515 I2C: 00:10: enabled 1
772 18:57:29.590599 PCI: 00:15.2: enabled 1
773 18:57:29.593725 PCI: 00:15.3: enabled 1
774 18:57:29.597577 PCI: 00:16.0: enabled 1
775 18:57:29.600817 PCI: 00:16.1: enabled 0
776 18:57:29.604162 PCI: 00:16.2: enabled 0
777 18:57:29.604266 PCI: 00:16.3: enabled 0
778 18:57:29.607864 PCI: 00:16.4: enabled 0
779 18:57:29.611447 PCI: 00:16.5: enabled 0
780 18:57:29.614503 PCI: 00:17.0: enabled 1
781 18:57:29.614584 PCI: 00:19.0: enabled 0
782 18:57:29.618207 PCI: 00:19.1: enabled 1
783 18:57:29.621994 I2C: 00:15: enabled 1
784 18:57:29.624524 PCI: 00:19.2: enabled 0
785 18:57:29.627722 PCI: 00:1d.0: enabled 1
786 18:57:29.627814 GENERIC: 0.0: enabled 1
787 18:57:29.631474 PCI: 00:1e.0: enabled 1
788 18:57:29.640366 PCI: 00:1e.1: enabled 0
789 18:57:29.640452 PCI: 00:1e.2: enabled 1
790 18:57:29.652929 SPI: 00: enabled 1
791 18:57:29.653014 PCI: 00:1e.3: enabled 1
792 18:57:29.653099 SPI: 00: enabled 1
793 18:57:29.653355 PCI: 00:1f.0: enabled 1
794 18:57:29.653451 PNP: 0c09.0: enabled 1
795 18:57:29.661369 PCI: 00:1f.1: enabled 0
796 18:57:29.661492 PCI: 00:1f.2: enabled 1
797 18:57:29.661560 GENERIC: 0.0: enabled 1
798 18:57:29.667268 GENERIC: 0.0: enabled 1
799 18:57:29.667431 GENERIC: 1.0: enabled 1
800 18:57:29.674498 PCI: 00:1f.3: enabled 1
801 18:57:29.674583 PCI: 00:1f.4: enabled 0
802 18:57:29.678446 PCI: 00:1f.5: enabled 1
803 18:57:29.678533 PCI: 00:1f.6: enabled 0
804 18:57:29.678655 PCI: 00:1f.7: enabled 0
805 18:57:29.684314 CPU_CLUSTER: 0: enabled 1
806 18:57:29.684399 APIC: 00: enabled 1
807 18:57:29.690156 APIC: 01: enabled 1
808 18:57:29.690248 APIC: 03: enabled 1
809 18:57:29.690316 APIC: 07: enabled 1
810 18:57:29.695503 APIC: 05: enabled 1
811 18:57:29.695593 APIC: 04: enabled 1
812 18:57:29.695674 APIC: 02: enabled 1
813 18:57:29.702002 APIC: 06: enabled 1
814 18:57:29.702090 Root Device scanning...
815 18:57:29.708410 scan_static_bus for Root Device
816 18:57:29.708511 DOMAIN: 0000 enabled
817 18:57:29.708580 CPU_CLUSTER: 0 enabled
818 18:57:29.715252 DOMAIN: 0000 scanning...
819 18:57:29.715341 PCI: pci_scan_bus for bus 00
820 18:57:29.721009 PCI: 00:00.0 [8086/0000] ops
821 18:57:29.721110 PCI: 00:00.0 [8086/9a12] enabled
822 18:57:29.727394 PCI: 00:02.0 [8086/0000] bus ops
823 18:57:29.727496 PCI: 00:02.0 [8086/9a40] enabled
824 18:57:29.745778 PCI: 00:04.0 [8086/0000] bus ops
825 18:57:29.745864 PCI: 00:04.0 [8086/9a03] enabled
826 18:57:29.746128 PCI: 00:05.0 [8086/9a19] enabled
827 18:57:29.746229 PCI: 00:07.0 [0000/0000] hidden
828 18:57:29.746496 PCI: 00:08.0 [8086/9a11] enabled
829 18:57:29.796028 PCI: 00:0a.0 [8086/9a0d] disabled
830 18:57:29.796142 PCI: 00:0d.0 [8086/0000] bus ops
831 18:57:29.797004 PCI: 00:0d.0 [8086/9a13] enabled
832 18:57:29.797109 PCI: 00:14.0 [8086/0000] bus ops
833 18:57:29.797384 PCI: 00:14.0 [8086/a0ed] enabled
834 18:57:29.797493 PCI: 00:14.2 [8086/a0ef] enabled
835 18:57:29.797559 PCI: 00:14.3 [8086/0000] bus ops
836 18:57:29.797621 PCI: 00:14.3 [8086/a0f0] enabled
837 18:57:29.797864 PCI: 00:15.0 [8086/0000] bus ops
838 18:57:29.797971 PCI: 00:15.0 [8086/a0e8] enabled
839 18:57:29.798248 PCI: 00:15.1 [8086/0000] bus ops
840 18:57:29.798313 PCI: 00:15.1 [8086/a0e9] enabled
841 18:57:29.798687 PCI: 00:15.2 [8086/0000] bus ops
842 18:57:29.798767 PCI: 00:15.2 [8086/a0ea] enabled
843 18:57:29.799015 PCI: 00:15.3 [8086/0000] bus ops
844 18:57:29.799082 PCI: 00:15.3 [8086/a0eb] enabled
845 18:57:29.839316 PCI: 00:16.0 [8086/0000] ops
846 18:57:29.839425 PCI: 00:16.0 [8086/a0e0] enabled
847 18:57:29.839687 PCI: Static device PCI: 00:17.0 not found, disabling it.
848 18:57:29.839941 PCI: 00:19.0 [8086/0000] bus ops
849 18:57:29.840008 PCI: 00:19.0 [8086/a0c5] disabled
850 18:57:29.840295 PCI: 00:19.1 [8086/0000] bus ops
851 18:57:29.840379 PCI: 00:19.1 [8086/a0c6] enabled
852 18:57:29.840446 PCI: 00:1d.0 [8086/0000] bus ops
853 18:57:29.840927 PCI: 00:1d.0 [8086/a0b0] enabled
854 18:57:29.841012 PCI: 00:1e.0 [8086/0000] ops
855 18:57:29.841460 PCI: 00:1e.0 [8086/a0a8] enabled
856 18:57:29.841534 PCI: 00:1e.2 [8086/0000] bus ops
857 18:57:29.876739 PCI: 00:1e.2 [8086/a0aa] enabled
858 18:57:29.876877 PCI: 00:1e.3 [8086/0000] bus ops
859 18:57:29.877637 PCI: 00:1e.3 [8086/a0ab] enabled
860 18:57:29.877773 PCI: 00:1f.0 [8086/0000] bus ops
861 18:57:29.878065 PCI: 00:1f.0 [8086/a087] enabled
862 18:57:29.878155 RTC Init
863 18:57:29.878269 Set power on after power failure.
864 18:57:29.878620 Disabling Deep S3
865 18:57:29.878705 Disabling Deep S3
866 18:57:29.878789 Disabling Deep S4
867 18:57:29.879085 Disabling Deep S4
868 18:57:29.879169 Disabling Deep S5
869 18:57:29.879231 Disabling Deep S5
870 18:57:29.879290 PCI: 00:1f.2 [0000/0000] hidden
871 18:57:29.879348 PCI: 00:1f.3 [8086/0000] bus ops
872 18:57:29.918705 PCI: 00:1f.3 [8086/a0c8] enabled
873 18:57:29.918878 PCI: 00:1f.5 [8086/0000] bus ops
874 18:57:29.919168 PCI: 00:1f.5 [8086/a0a4] enabled
875 18:57:29.919241 PCI: Leftover static devices:
876 18:57:29.919319 PCI: 00:10.2
877 18:57:29.919398 PCI: 00:10.6
878 18:57:29.919458 PCI: 00:10.7
879 18:57:29.919546 PCI: 00:06.0
880 18:57:29.919644 PCI: 00:07.1
881 18:57:29.919887 PCI: 00:07.2
882 18:57:29.919993 PCI: 00:07.3
883 18:57:29.920050 PCI: 00:09.0
884 18:57:29.920106 PCI: 00:0d.1
885 18:57:29.920349 PCI: 00:0d.2
886 18:57:29.920431 PCI: 00:0d.3
887 18:57:29.920503 PCI: 00:0e.0
888 18:57:29.920577 PCI: 00:12.0
889 18:57:29.920657 PCI: 00:12.6
890 18:57:29.920712 PCI: 00:13.0
891 18:57:29.920798 PCI: 00:14.1
892 18:57:29.920853 PCI: 00:16.1
893 18:57:29.920908 PCI: 00:16.2
894 18:57:29.923760 PCI: 00:16.3
895 18:57:29.923857 PCI: 00:16.4
896 18:57:29.923926 PCI: 00:16.5
897 18:57:29.923988 PCI: 00:17.0
898 18:57:29.924047 PCI: 00:19.2
899 18:57:29.926388 PCI: 00:1e.1
900 18:57:29.926472 PCI: 00:1f.1
901 18:57:29.926538 PCI: 00:1f.4
902 18:57:29.929698 PCI: 00:1f.6
903 18:57:29.929790 PCI: 00:1f.7
904 18:57:29.933005 PCI: Check your devicetree.cb.
905 18:57:29.937206 PCI: 00:02.0 scanning...
906 18:57:29.939760 scan_generic_bus for PCI: 00:02.0
907 18:57:29.943573 scan_generic_bus for PCI: 00:02.0 done
908 18:57:29.946326 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
909 18:57:29.949681 PCI: 00:04.0 scanning...
910 18:57:29.953063 scan_generic_bus for PCI: 00:04.0
911 18:57:29.956738 GENERIC: 0.0 enabled
912 18:57:29.962960 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
913 18:57:29.965934 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
914 18:57:29.969250 PCI: 00:0d.0 scanning...
915 18:57:29.972803 scan_static_bus for PCI: 00:0d.0
916 18:57:29.976103 USB0 port 0 enabled
917 18:57:29.976193 USB0 port 0 scanning...
918 18:57:29.979811 scan_static_bus for USB0 port 0
919 18:57:29.982903 USB3 port 0 enabled
920 18:57:29.986639 USB3 port 1 enabled
921 18:57:29.986760 USB3 port 2 disabled
922 18:57:29.989893 USB3 port 3 disabled
923 18:57:29.992705 USB3 port 0 scanning...
924 18:57:29.996359 scan_static_bus for USB3 port 0
925 18:57:29.999893 scan_static_bus for USB3 port 0 done
926 18:57:30.002846 scan_bus: bus USB3 port 0 finished in 6 msecs
927 18:57:30.006370 USB3 port 1 scanning...
928 18:57:30.009410 scan_static_bus for USB3 port 1
929 18:57:30.012932 scan_static_bus for USB3 port 1 done
930 18:57:30.019563 scan_bus: bus USB3 port 1 finished in 6 msecs
931 18:57:30.022777 scan_static_bus for USB0 port 0 done
932 18:57:30.026176 scan_bus: bus USB0 port 0 finished in 43 msecs
933 18:57:30.029462 scan_static_bus for PCI: 00:0d.0 done
934 18:57:30.036060 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
935 18:57:30.036179 PCI: 00:14.0 scanning...
936 18:57:30.039256 scan_static_bus for PCI: 00:14.0
937 18:57:30.043340 USB0 port 0 enabled
938 18:57:30.045753 USB0 port 0 scanning...
939 18:57:30.049338 scan_static_bus for USB0 port 0
940 18:57:30.052602 USB2 port 0 disabled
941 18:57:30.052710 USB2 port 1 enabled
942 18:57:30.055980 USB2 port 2 enabled
943 18:57:30.056071 USB2 port 3 disabled
944 18:57:30.059209 USB2 port 4 enabled
945 18:57:30.062518 USB2 port 5 disabled
946 18:57:30.062600 USB2 port 6 disabled
947 18:57:30.065943 USB2 port 7 disabled
948 18:57:30.068875 USB2 port 8 disabled
949 18:57:30.068960 USB2 port 9 disabled
950 18:57:30.072747 USB3 port 0 disabled
951 18:57:30.076056 USB3 port 1 enabled
952 18:57:30.076143 USB3 port 2 disabled
953 18:57:30.079213 USB3 port 3 disabled
954 18:57:30.082555 USB2 port 1 scanning...
955 18:57:30.085834 scan_static_bus for USB2 port 1
956 18:57:30.088989 scan_static_bus for USB2 port 1 done
957 18:57:30.092414 scan_bus: bus USB2 port 1 finished in 6 msecs
958 18:57:30.095896 USB2 port 2 scanning...
959 18:57:30.098928 scan_static_bus for USB2 port 2
960 18:57:30.102553 scan_static_bus for USB2 port 2 done
961 18:57:30.105634 scan_bus: bus USB2 port 2 finished in 6 msecs
962 18:57:30.108835 USB2 port 4 scanning...
963 18:57:30.112381 scan_static_bus for USB2 port 4
964 18:57:30.115509 scan_static_bus for USB2 port 4 done
965 18:57:30.122044 scan_bus: bus USB2 port 4 finished in 6 msecs
966 18:57:30.122168 USB3 port 1 scanning...
967 18:57:30.125083
968 18:57:30.128499 scan_static_bus for USB3 port 1
969 18:57:30.131957 scan_static_bus for USB3 port 1 done
970 18:57:30.135162 scan_bus: bus USB3 port 1 finished in 6 msecs
971 18:57:30.138604 scan_static_bus for USB0 port 0 done
972 18:57:30.145209 scan_bus: bus USB0 port 0 finished in 93 msecs
973 18:57:30.148941 scan_static_bus for PCI: 00:14.0 done
974 18:57:30.152081 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 18:57:30.155429 PCI: 00:14.3 scanning...
976 18:57:30.158367 scan_static_bus for PCI: 00:14.3
977 18:57:30.161492 GENERIC: 0.0 enabled
978 18:57:30.165011 scan_static_bus for PCI: 00:14.3 done
979 18:57:30.168474 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 18:57:30.171377 PCI: 00:15.0 scanning...
981 18:57:30.175108 scan_static_bus for PCI: 00:15.0
982 18:57:30.178516 I2C: 00:1a enabled
983 18:57:30.178602 I2C: 00:31 enabled
984 18:57:30.181851 I2C: 00:32 enabled
985 18:57:30.185049 scan_static_bus for PCI: 00:15.0 done
986 18:57:30.188430 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 18:57:30.191830 PCI: 00:15.1 scanning...
988 18:57:30.195255 scan_static_bus for PCI: 00:15.1
989 18:57:30.198309 I2C: 00:10 enabled
990 18:57:30.201689 scan_static_bus for PCI: 00:15.1 done
991 18:57:30.205040 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 18:57:30.208302 PCI: 00:15.2 scanning...
993 18:57:30.211508 scan_static_bus for PCI: 00:15.2
994 18:57:30.214743 scan_static_bus for PCI: 00:15.2 done
995 18:57:30.221383 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 18:57:30.224892 PCI: 00:15.3 scanning...
997 18:57:30.228045 scan_static_bus for PCI: 00:15.3
998 18:57:30.231419 scan_static_bus for PCI: 00:15.3 done
999 18:57:30.234983 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 18:57:30.238149 PCI: 00:19.1 scanning...
1001 18:57:30.241338 scan_static_bus for PCI: 00:19.1
1002 18:57:30.244621 I2C: 00:15 enabled
1003 18:57:30.247778 scan_static_bus for PCI: 00:19.1 done
1004 18:57:30.251758 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 18:57:30.254466 PCI: 00:1d.0 scanning...
1006 18:57:30.257841 do_pci_scan_bridge for PCI: 00:1d.0
1007 18:57:30.261371 PCI: pci_scan_bus for bus 01
1008 18:57:30.264919 PCI: 01:00.0 [1c5c/174a] enabled
1009 18:57:30.267609 GENERIC: 0.0 enabled
1010 18:57:30.271030 Enabling Common Clock Configuration
1011 18:57:30.274627 L1 Sub-State supported from root port 29
1012 18:57:30.278161 L1 Sub-State Support = 0xf
1013 18:57:30.281030 CommonModeRestoreTime = 0x28
1014 18:57:30.284288 Power On Value = 0x16, Power On Scale = 0x0
1015 18:57:30.287716 ASPM: Enabled L1
1016 18:57:30.290751 PCIe: Max_Payload_Size adjusted to 128
1017 18:57:30.294117 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 18:57:30.297580 PCI: 00:1e.2 scanning...
1019 18:57:30.300852 scan_generic_bus for PCI: 00:1e.2
1020 18:57:30.304219 SPI: 00 enabled
1021 18:57:30.310601 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 18:57:30.313915 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 18:57:30.316997 PCI: 00:1e.3 scanning...
1024 18:57:30.320805 scan_generic_bus for PCI: 00:1e.3
1025 18:57:30.320929 SPI: 00 enabled
1026 18:57:30.327697 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 18:57:30.334032 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 18:57:30.334150 PCI: 00:1f.0 scanning...
1029 18:57:30.337101
1030 18:57:30.340302 scan_static_bus for PCI: 00:1f.0
1031 18:57:30.340389 PNP: 0c09.0 enabled
1032 18:57:30.343761 PNP: 0c09.0 scanning...
1033 18:57:30.346895 scan_static_bus for PNP: 0c09.0
1034 18:57:30.350491 scan_static_bus for PNP: 0c09.0 done
1035 18:57:30.354570 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1036 18:57:30.357453
1037 18:57:30.360870 scan_static_bus for PCI: 00:1f.0 done
1038 18:57:30.364084 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1039 18:57:30.367574 PCI: 00:1f.2 scanning...
1040 18:57:30.370265 scan_static_bus for PCI: 00:1f.2
1041 18:57:30.373706 GENERIC: 0.0 enabled
1042 18:57:30.373795 GENERIC: 0.0 scanning...
1043 18:57:30.376844 scan_static_bus for GENERIC: 0.0
1044 18:57:30.380019 GENERIC: 0.0 enabled
1045 18:57:30.383389 GENERIC: 1.0 enabled
1046 18:57:30.387125 scan_static_bus for GENERIC: 0.0 done
1047 18:57:30.390125 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1048 18:57:30.393578 scan_static_bus for PCI: 00:1f.2 done
1049 18:57:30.400666 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1050 18:57:30.403454 PCI: 00:1f.3 scanning...
1051 18:57:30.406633 scan_static_bus for PCI: 00:1f.3
1052 18:57:30.410003 scan_static_bus for PCI: 00:1f.3 done
1053 18:57:30.413374 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1054 18:57:30.416649 PCI: 00:1f.5 scanning...
1055 18:57:30.420048 scan_generic_bus for PCI: 00:1f.5
1056 18:57:30.423790 scan_generic_bus for PCI: 00:1f.5 done
1057 18:57:30.429958 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1058 18:57:30.433249 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1059 18:57:30.436817 scan_static_bus for Root Device done
1060 18:57:30.442955 scan_bus: bus Root Device finished in 736 msecs
1061 18:57:30.443063 done
1062 18:57:30.449715 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1063 18:57:30.452773 Chrome EC: UHEPI supported
1064 18:57:30.459753 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1065 18:57:30.466364 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1066 18:57:30.469756 SPI flash protection: WPSW=0 SRP0=0
1067 18:57:30.472804 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 18:57:30.479831 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1069 18:57:30.483015 found VGA at PCI: 00:02.0
1070 18:57:30.486497 Setting up VGA for PCI: 00:02.0
1071 18:57:30.489739 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 18:57:30.496405 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 18:57:30.496504 Allocating resources...
1074 18:57:30.499260
1075 18:57:30.499401 Reading resources...
1076 18:57:30.502876 Root Device read_resources bus 0 link: 0
1077 18:57:30.509246 DOMAIN: 0000 read_resources bus 0 link: 0
1078 18:57:30.512744 PCI: 00:04.0 read_resources bus 1 link: 0
1079 18:57:30.519149 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 18:57:30.522592 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 18:57:30.529293 USB0 port 0 read_resources bus 0 link: 0
1082 18:57:30.532517 USB0 port 0 read_resources bus 0 link: 0 done
1083 18:57:30.538992 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 18:57:30.542638 PCI: 00:14.0 read_resources bus 0 link: 0
1085 18:57:30.545836 USB0 port 0 read_resources bus 0 link: 0
1086 18:57:30.553822 USB0 port 0 read_resources bus 0 link: 0 done
1087 18:57:30.556519 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 18:57:30.563406 PCI: 00:14.3 read_resources bus 0 link: 0
1089 18:57:30.567318 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 18:57:30.573256 PCI: 00:15.0 read_resources bus 0 link: 0
1091 18:57:30.576644 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 18:57:30.583465 PCI: 00:15.1 read_resources bus 0 link: 0
1093 18:57:30.586746 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 18:57:30.594046 PCI: 00:19.1 read_resources bus 0 link: 0
1095 18:57:30.597490 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 18:57:30.604313 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 18:57:30.606968 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 18:57:30.614121 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 18:57:30.617073 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 18:57:30.624127 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 18:57:30.627318 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 18:57:30.633731 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 18:57:30.636902 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 18:57:30.643547 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 18:57:30.646909 GENERIC: 0.0 read_resources bus 0 link: 0
1106 18:57:30.653956 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 18:57:30.656884 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 18:57:30.663272 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 18:57:30.666512 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 18:57:30.673786 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 18:57:30.676247 Root Device read_resources bus 0 link: 0 done
1112 18:57:30.679991 Done reading resources.
1113 18:57:30.686361 Show resources in subtree (Root Device)...After reading.
1114 18:57:30.690467 Root Device child on link 0 DOMAIN: 0000
1115 18:57:30.693287 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 18:57:30.703045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 18:57:30.713157 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 18:57:30.716501 PCI: 00:00.0
1119 18:57:30.723072 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 18:57:30.732914 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 18:57:30.742812 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 18:57:30.752886 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 18:57:30.762387 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 18:57:30.772586 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 18:57:30.779244 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 18:57:30.788871 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 18:57:30.798894 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 18:57:30.808859 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 18:57:30.818769 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 18:57:30.828929 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 18:57:30.835253 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 18:57:30.845215 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 18:57:30.855350 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 18:57:30.865270 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 18:57:30.875181 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 18:57:30.885579 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 18:57:30.891643 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 18:57:30.901677 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 18:57:30.905410 PCI: 00:02.0
1140 18:57:30.914773 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 18:57:30.924988 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 18:57:30.934581 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 18:57:30.938271 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 18:57:30.947689 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 18:57:30.951692 GENERIC: 0.0
1146 18:57:30.951844 PCI: 00:05.0
1147 18:57:30.960882 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 18:57:30.968158 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 18:57:30.968286 GENERIC: 0.0
1150 18:57:30.970953 PCI: 00:08.0
1151 18:57:30.980914 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 18:57:30.981059 PCI: 00:0a.0
1153 18:57:30.984093 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 18:57:30.994090 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 18:57:30.997873
1156 18:57:31.000754 USB0 port 0 child on link 0 USB3 port 0
1157 18:57:31.000862 USB3 port 0
1158 18:57:31.004753 USB3 port 1
1159 18:57:31.004861 USB3 port 2
1160 18:57:31.007914 USB3 port 3
1161 18:57:31.011201 PCI: 00:14.0 child on link 0 USB0 port 0
1162 18:57:31.020775 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 18:57:31.027143 USB0 port 0 child on link 0 USB2 port 0
1164 18:57:31.027282 USB2 port 0
1165 18:57:31.030545 USB2 port 1
1166 18:57:31.030634 USB2 port 2
1167 18:57:31.033659 USB2 port 3
1168 18:57:31.033777 USB2 port 4
1169 18:57:31.036977 USB2 port 5
1170 18:57:31.037064 USB2 port 6
1171 18:57:31.040533 USB2 port 7
1172 18:57:31.040633 USB2 port 8
1173 18:57:31.043653
1174 18:57:31.043753 USB2 port 9
1175 18:57:31.046956 USB3 port 0
1176 18:57:31.047045 USB3 port 1
1177 18:57:31.050144 USB3 port 2
1178 18:57:31.050230 USB3 port 3
1179 18:57:31.053820 PCI: 00:14.2
1180 18:57:31.063605 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 18:57:31.073858 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1182 18:57:31.076956 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1183 18:57:31.086854 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1184 18:57:31.090094 GENERIC: 0.0
1185 18:57:31.093688 PCI: 00:15.0 child on link 0 I2C: 00:1a
1186 18:57:31.103311 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 18:57:31.103448 I2C: 00:1a
1188 18:57:31.106757 I2C: 00:31
1189 18:57:31.106852 I2C: 00:32
1190 18:57:31.113206 PCI: 00:15.1 child on link 0 I2C: 00:10
1191 18:57:31.123296 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 18:57:31.123439 I2C: 00:10
1193 18:57:31.126431 PCI: 00:15.2
1194 18:57:31.136167 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 18:57:31.136297 PCI: 00:15.3
1196 18:57:31.146351 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 18:57:31.149748 PCI: 00:16.0
1198 18:57:31.159763 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 18:57:31.159911 PCI: 00:19.0
1200 18:57:31.162824 PCI: 00:19.1 child on link 0 I2C: 00:15
1201 18:57:31.172842 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 18:57:31.176021 I2C: 00:15
1203 18:57:31.179186 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1204 18:57:31.189674 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1205 18:57:31.199204 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1206 18:57:31.208969 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1207 18:57:31.209125 GENERIC: 0.0
1208 18:57:31.212291 PCI: 01:00.0
1209 18:57:31.222310 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 18:57:31.232079 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1211 18:57:31.238719 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1212 18:57:31.242350 PCI: 00:1e.0
1213 18:57:31.251905 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1214 18:57:31.255332 PCI: 00:1e.2 child on link 0 SPI: 00
1215 18:57:31.265723 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 18:57:31.268677 SPI: 00
1217 18:57:31.271907 PCI: 00:1e.3 child on link 0 SPI: 00
1218 18:57:31.282108 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 18:57:31.282293 SPI: 00
1220 18:57:31.288244 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1221 18:57:31.295013 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1222 18:57:31.298034 PNP: 0c09.0
1223 18:57:31.307921 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 18:57:31.311456 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1225 18:57:31.321756 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1226 18:57:31.331318 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1227 18:57:31.335034 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1228 18:57:31.335187 GENERIC: 0.0
1229 18:57:31.338031
1230 18:57:31.338149 GENERIC: 1.0
1231 18:57:31.341956 PCI: 00:1f.3
1232 18:57:31.351192 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 18:57:31.361248 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1234 18:57:31.361465 PCI: 00:1f.5
1235 18:57:31.371035 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1236 18:57:31.374895 CPU_CLUSTER: 0 child on link 0 APIC: 00
1237 18:57:31.378034 APIC: 00
1238 18:57:31.378135 APIC: 01
1239 18:57:31.378204 APIC: 03
1240 18:57:31.380606 APIC: 07
1241 18:57:31.380694 APIC: 05
1242 18:57:31.384051 APIC: 04
1243 18:57:31.384143 APIC: 02
1244 18:57:31.384214 APIC: 06
1245 18:57:31.394667 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1246 18:57:31.397576 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1247 18:57:31.404065 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1248 18:57:31.410532 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1249 18:57:31.414004 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1250 18:57:31.420971 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1251 18:57:31.423605 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1252 18:57:31.430533 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1253 18:57:31.437016 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1254 18:57:31.446931 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1255 18:57:31.453655 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1256 18:57:31.460351 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1257 18:57:31.467152 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 18:57:31.473988 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1259 18:57:31.483294 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1260 18:57:31.486633 DOMAIN: 0000: Resource ranges:
1261 18:57:31.490195 * Base: 1000, Size: 800, Tag: 100
1262 18:57:31.493550 * Base: 1900, Size: e700, Tag: 100
1263 18:57:31.497243 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1264 18:57:31.503387 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1265 18:57:31.509980 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1266 18:57:31.519812 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1267 18:57:31.526476 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1268 18:57:31.532711 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1269 18:57:31.542739 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1270 18:57:31.549266 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1271 18:57:31.556200 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1272 18:57:31.566329 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1273 18:57:31.573217 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1274 18:57:31.579219 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1275 18:57:31.589347 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1276 18:57:31.596204 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1277 18:57:31.602420 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1278 18:57:31.612449 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1279 18:57:31.618775 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1280 18:57:31.625523 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1281 18:57:31.635563 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1282 18:57:31.642444 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1283 18:57:31.648495 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1284 18:57:31.658562 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1285 18:57:31.665227 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1286 18:57:31.671653 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1287 18:57:31.681917 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1288 18:57:31.685383 DOMAIN: 0000: Resource ranges:
1289 18:57:31.687994 * Base: 7fc00000, Size: 40400000, Tag: 200
1290 18:57:31.691691 * Base: d0000000, Size: 28000000, Tag: 200
1291 18:57:31.698725 * Base: fa000000, Size: 1000000, Tag: 200
1292 18:57:31.701737 * Base: fb001000, Size: 2fff000, Tag: 200
1293 18:57:31.705105 * Base: fe010000, Size: 2e000, Tag: 200
1294 18:57:31.708020 * Base: fe03f000, Size: d41000, Tag: 200
1295 18:57:31.714775 * Base: fed88000, Size: 8000, Tag: 200
1296 18:57:31.718052 * Base: fed93000, Size: d000, Tag: 200
1297 18:57:31.721830 * Base: feda2000, Size: 1e000, Tag: 200
1298 18:57:31.724646 * Base: fede0000, Size: 1220000, Tag: 200
1299 18:57:31.732012 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1300 18:57:31.737707 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1301 18:57:31.744476 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1302 18:57:31.751308 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1303 18:57:31.757860 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1304 18:57:31.764385 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1305 18:57:31.770808 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1306 18:57:31.777539 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1307 18:57:31.783947 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1308 18:57:31.790905 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1309 18:57:31.797791 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1310 18:57:31.804179 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1311 18:57:31.810548 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1312 18:57:31.817242 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1313 18:57:31.823844 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1314 18:57:31.830724 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1315 18:57:31.836749 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1316 18:57:31.843423 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1317 18:57:31.850247 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1318 18:57:31.856708 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1319 18:57:31.863330 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1320 18:57:31.870242 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1321 18:57:31.876500 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1322 18:57:31.883046 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1323 18:57:31.893376 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1324 18:57:31.897009 PCI: 00:1d.0: Resource ranges:
1325 18:57:31.899576 * Base: 7fc00000, Size: 100000, Tag: 200
1326 18:57:31.906495 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1327 18:57:31.913186 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1328 18:57:31.920124 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1329 18:57:31.929800 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1330 18:57:31.936195 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1331 18:57:31.939421 Root Device assign_resources, bus 0 link: 0
1332 18:57:31.946311 DOMAIN: 0000 assign_resources, bus 0 link: 0
1333 18:57:31.952444 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1334 18:57:31.962451 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1335 18:57:31.969089 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1336 18:57:31.979298 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1337 18:57:31.982625 PCI: 00:04.0 assign_resources, bus 1 link: 0
1338 18:57:31.985964 PCI: 00:04.0 assign_resources, bus 1 link: 0
1339 18:57:31.995384 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1340 18:57:32.001977 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1341 18:57:32.012146 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1342 18:57:32.015441 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1343 18:57:32.022118 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1344 18:57:32.028313 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1345 18:57:32.031627 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 18:57:32.039099 PCI: 00:14.0 assign_resources, bus 0 link: 0
1347 18:57:32.045543 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1348 18:57:32.054974 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1349 18:57:32.062311 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1350 18:57:32.068634 PCI: 00:14.3 assign_resources, bus 0 link: 0
1351 18:57:32.071778 PCI: 00:14.3 assign_resources, bus 0 link: 0
1352 18:57:32.081469 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1353 18:57:32.085247 PCI: 00:15.0 assign_resources, bus 0 link: 0
1354 18:57:32.088274 PCI: 00:15.0 assign_resources, bus 0 link: 0
1355 18:57:32.097883 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1356 18:57:32.101485 PCI: 00:15.1 assign_resources, bus 0 link: 0
1357 18:57:32.107914 PCI: 00:15.1 assign_resources, bus 0 link: 0
1358 18:57:32.114151 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1359 18:57:32.124171 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1360 18:57:32.131188 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1361 18:57:32.141037 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1362 18:57:32.144210 PCI: 00:19.1 assign_resources, bus 0 link: 0
1363 18:57:32.147786 PCI: 00:19.1 assign_resources, bus 0 link: 0
1364 18:57:32.157379 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1365 18:57:32.167514 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1366 18:57:32.177356 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1367 18:57:32.180696 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1368 18:57:32.187112 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1369 18:57:32.190413
1370 18:57:32.197892 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1371 18:57:32.203684 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1372 18:57:32.210220 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1373 18:57:32.216844 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1374 18:57:32.223555 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1375 18:57:32.226998 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1376 18:57:32.237102 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1377 18:57:32.240559 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1378 18:57:32.243784 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1379 18:57:32.250213 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1380 18:57:32.253787 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1381 18:57:32.260009 LPC: Trying to open IO window from 800 size 1ff
1382 18:57:32.266529 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1383 18:57:32.276195 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1384 18:57:32.282933 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1385 18:57:32.289797 DOMAIN: 0000 assign_resources, bus 0 link: 0
1386 18:57:32.292978 Root Device assign_resources, bus 0 link: 0
1387 18:57:32.295965 Done setting resources.
1388 18:57:32.302486 Show resources in subtree (Root Device)...After assigning values.
1389 18:57:32.306418 Root Device child on link 0 DOMAIN: 0000
1390 18:57:32.309861 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1391 18:57:32.319680 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1392 18:57:32.329051 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1393 18:57:32.332410 PCI: 00:00.0
1394 18:57:32.342342 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1395 18:57:32.349554 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1396 18:57:32.358946 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1397 18:57:32.368667 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1398 18:57:32.378774 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1399 18:57:32.388777 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1400 18:57:32.398614 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1401 18:57:32.405519 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1402 18:57:32.415099 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1403 18:57:32.425302 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1404 18:57:32.435183 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1405 18:57:32.445064 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1406 18:57:32.452684 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1407 18:57:32.455124
1408 18:57:32.461455 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1409 18:57:32.471527 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1410 18:57:32.481363 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1411 18:57:32.491282 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1412 18:57:32.501621 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1413 18:57:32.511194 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1414 18:57:32.518201 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1415 18:57:32.521488 PCI: 00:02.0
1416 18:57:32.531535 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1417 18:57:32.541624 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1418 18:57:32.551050 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1419 18:57:32.557691 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1420 18:57:32.567467 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1421 18:57:32.567662 GENERIC: 0.0
1422 18:57:32.571659 PCI: 00:05.0
1423 18:57:32.581040 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1424 18:57:32.584423 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1425 18:57:32.587922 GENERIC: 0.0
1426 18:57:32.588043 PCI: 00:08.0
1427 18:57:32.597388 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1428 18:57:32.600981 PCI: 00:0a.0
1429 18:57:32.604168 PCI: 00:0d.0 child on link 0 USB0 port 0
1430 18:57:32.614132 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1431 18:57:32.620975 USB0 port 0 child on link 0 USB3 port 0
1432 18:57:32.621177 USB3 port 0
1433 18:57:32.624093 USB3 port 1
1434 18:57:32.624260 USB3 port 2
1435 18:57:32.627468 USB3 port 3
1436 18:57:32.630491 PCI: 00:14.0 child on link 0 USB0 port 0
1437 18:57:32.640778 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1438 18:57:32.647304 USB0 port 0 child on link 0 USB2 port 0
1439 18:57:32.647451 USB2 port 0
1440 18:57:32.651196 USB2 port 1
1441 18:57:32.651317 USB2 port 2
1442 18:57:32.654185 USB2 port 3
1443 18:57:32.654326 USB2 port 4
1444 18:57:32.657329 USB2 port 5
1445 18:57:32.657451 USB2 port 6
1446 18:57:32.660390 USB2 port 7
1447 18:57:32.663741 USB2 port 8
1448 18:57:32.663864 USB2 port 9
1449 18:57:32.667238 USB3 port 0
1450 18:57:32.667354 USB3 port 1
1451 18:57:32.671095 USB3 port 2
1452 18:57:32.671219 USB3 port 3
1453 18:57:32.673712 PCI: 00:14.2
1454 18:57:32.683409 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1455 18:57:32.693868 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1456 18:57:32.696600 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1457 18:57:32.706965 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1458 18:57:32.709987 GENERIC: 0.0
1459 18:57:32.713701 PCI: 00:15.0 child on link 0 I2C: 00:1a
1460 18:57:32.723344 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1461 18:57:32.726763 I2C: 00:1a
1462 18:57:32.726921 I2C: 00:31
1463 18:57:32.730092 I2C: 00:32
1464 18:57:32.733447 PCI: 00:15.1 child on link 0 I2C: 00:10
1465 18:57:32.743368 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1466 18:57:32.746410 I2C: 00:10
1467 18:57:32.746524 PCI: 00:15.2
1468 18:57:32.756358 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1469 18:57:32.759911 PCI: 00:15.3
1470 18:57:32.769846 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1471 18:57:32.770020 PCI: 00:16.0
1472 18:57:32.782986 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1473 18:57:32.783128 PCI: 00:19.0
1474 18:57:32.786601 PCI: 00:19.1 child on link 0 I2C: 00:15
1475 18:57:32.799474 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1476 18:57:32.799623 I2C: 00:15
1477 18:57:32.803185 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1478 18:57:32.812847 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1479 18:57:32.825820 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1480 18:57:32.835625 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1481 18:57:32.835789 GENERIC: 0.0
1482 18:57:32.838856 PCI: 01:00.0
1483 18:57:32.849098 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1484 18:57:32.859160 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1485 18:57:32.868694 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1486 18:57:32.872299 PCI: 00:1e.0
1487 18:57:32.882066 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1488 18:57:32.885583 PCI: 00:1e.2 child on link 0 SPI: 00
1489 18:57:32.888936
1490 18:57:32.898264 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 18:57:32.898410 SPI: 00
1492 18:57:32.901628 PCI: 00:1e.3 child on link 0 SPI: 00
1493 18:57:32.911389 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 18:57:32.914878 SPI: 00
1495 18:57:32.918311 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 18:57:32.928143 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 18:57:32.928313 PNP: 0c09.0
1498 18:57:32.938035 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 18:57:32.941807 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 18:57:32.951729 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 18:57:32.961270 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 18:57:32.965195 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 18:57:32.967962 GENERIC: 0.0
1504 18:57:32.968081 GENERIC: 1.0
1505 18:57:32.971300 PCI: 00:1f.3
1506 18:57:32.980923 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 18:57:32.991243 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 18:57:32.994183 PCI: 00:1f.5
1509 18:57:33.004088 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 18:57:33.007797 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 18:57:33.007939 APIC: 00
1512 18:57:33.010954
1513 18:57:33.011070 APIC: 01
1514 18:57:33.011143 APIC: 03
1515 18:57:33.014370 APIC: 07
1516 18:57:33.014482 APIC: 05
1517 18:57:33.014552 APIC: 04
1518 18:57:33.017158 APIC: 02
1519 18:57:33.017252 APIC: 06
1520 18:57:33.020620 Done allocating resources.
1521 18:57:33.027407 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2515 ms
1522 18:57:33.034016 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1523 18:57:33.037162 Configure GPIOs for I2S audio on UP4.
1524 18:57:33.043822 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1525 18:57:33.047792 Enabling resources...
1526 18:57:33.050613 PCI: 00:00.0 subsystem <- 8086/9a12
1527 18:57:33.054030 PCI: 00:00.0 cmd <- 06
1528 18:57:33.057213 PCI: 00:02.0 subsystem <- 8086/9a40
1529 18:57:33.057332 PCI: 00:02.0 cmd <- 03
1530 18:57:33.060154
1531 18:57:33.063667 PCI: 00:04.0 subsystem <- 8086/9a03
1532 18:57:33.063766 PCI: 00:04.0 cmd <- 02
1533 18:57:33.070526 PCI: 00:05.0 subsystem <- 8086/9a19
1534 18:57:33.070656 PCI: 00:05.0 cmd <- 02
1535 18:57:33.073858 PCI: 00:08.0 subsystem <- 8086/9a11
1536 18:57:33.077310 PCI: 00:08.0 cmd <- 06
1537 18:57:33.080179 PCI: 00:0d.0 subsystem <- 8086/9a13
1538 18:57:33.083310 PCI: 00:0d.0 cmd <- 02
1539 18:57:33.086771 PCI: 00:14.0 subsystem <- 8086/a0ed
1540 18:57:33.089757 PCI: 00:14.0 cmd <- 02
1541 18:57:33.093142 PCI: 00:14.2 subsystem <- 8086/a0ef
1542 18:57:33.096923 PCI: 00:14.2 cmd <- 02
1543 18:57:33.100358 PCI: 00:14.3 subsystem <- 8086/a0f0
1544 18:57:33.103298 PCI: 00:14.3 cmd <- 02
1545 18:57:33.106548 PCI: 00:15.0 subsystem <- 8086/a0e8
1546 18:57:33.109744 PCI: 00:15.0 cmd <- 02
1547 18:57:33.113397 PCI: 00:15.1 subsystem <- 8086/a0e9
1548 18:57:33.113627 PCI: 00:15.1 cmd <- 02
1549 18:57:33.119874 PCI: 00:15.2 subsystem <- 8086/a0ea
1550 18:57:33.120015 PCI: 00:15.2 cmd <- 02
1551 18:57:33.123578 PCI: 00:15.3 subsystem <- 8086/a0eb
1552 18:57:33.126515
1553 18:57:33.126622 PCI: 00:15.3 cmd <- 02
1554 18:57:33.129679 PCI: 00:16.0 subsystem <- 8086/a0e0
1555 18:57:33.132982 PCI: 00:16.0 cmd <- 02
1556 18:57:33.136422 PCI: 00:19.1 subsystem <- 8086/a0c6
1557 18:57:33.139409 PCI: 00:19.1 cmd <- 02
1558 18:57:33.142988 PCI: 00:1d.0 bridge ctrl <- 0013
1559 18:57:33.146611 PCI: 00:1d.0 subsystem <- 8086/a0b0
1560 18:57:33.149537 PCI: 00:1d.0 cmd <- 06
1561 18:57:33.153214 PCI: 00:1e.0 subsystem <- 8086/a0a8
1562 18:57:33.155964 PCI: 00:1e.0 cmd <- 06
1563 18:57:33.159777 PCI: 00:1e.2 subsystem <- 8086/a0aa
1564 18:57:33.162934 PCI: 00:1e.2 cmd <- 06
1565 18:57:33.166373 PCI: 00:1e.3 subsystem <- 8086/a0ab
1566 18:57:33.166483 PCI: 00:1e.3 cmd <- 02
1567 18:57:33.173056 PCI: 00:1f.0 subsystem <- 8086/a087
1568 18:57:33.173195 PCI: 00:1f.0 cmd <- 407
1569 18:57:33.176788 PCI: 00:1f.3 subsystem <- 8086/a0c8
1570 18:57:33.179733 PCI: 00:1f.3 cmd <- 02
1571 18:57:33.183236 PCI: 00:1f.5 subsystem <- 8086/a0a4
1572 18:57:33.186133 PCI: 00:1f.5 cmd <- 406
1573 18:57:33.190639 PCI: 01:00.0 cmd <- 02
1574 18:57:33.195755 done.
1575 18:57:33.198893 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1576 18:57:33.201872 Initializing devices...
1577 18:57:33.205321 Root Device init
1578 18:57:33.208393 Chrome EC: Set SMI mask to 0x0000000000000000
1579 18:57:33.215444 Chrome EC: clear events_b mask to 0x0000000000000000
1580 18:57:33.221321 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1581 18:57:33.224779 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1582 18:57:33.231696 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1583 18:57:33.238264 Chrome EC: Set WAKE mask to 0x0000000000000000
1584 18:57:33.241890 fw_config match found: DB_USB=USB3_ACTIVE
1585 18:57:33.248067 Configure Right Type-C port orientation for retimer
1586 18:57:33.251477 Root Device init finished in 42 msecs
1587 18:57:33.254796 PCI: 00:00.0 init
1588 18:57:33.254926 CPU TDP = 9 Watts
1589 18:57:33.258189
1590 18:57:33.258322 CPU PL1 = 9 Watts
1591 18:57:33.261386 CPU PL2 = 40 Watts
1592 18:57:33.261513 CPU PL4 = 83 Watts
1593 18:57:33.264416 PCI: 00:00.0 init finished in 8 msecs
1594 18:57:33.268205 PCI: 00:02.0 init
1595 18:57:33.271557 GMA: Found VBT in CBFS
1596 18:57:33.274855 GMA: Found valid VBT in CBFS
1597 18:57:33.278267 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1598 18:57:33.288158 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1599 18:57:33.291345 PCI: 00:02.0 init finished in 18 msecs
1600 18:57:33.294549 PCI: 00:05.0 init
1601 18:57:33.297913 PCI: 00:05.0 init finished in 0 msecs
1602 18:57:33.298052 PCI: 00:08.0 init
1603 18:57:33.301291
1604 18:57:33.304477 PCI: 00:08.0 init finished in 0 msecs
1605 18:57:33.304606 PCI: 00:14.0 init
1606 18:57:33.307496
1607 18:57:33.310973 PCI: 00:14.0 init finished in 0 msecs
1608 18:57:33.311107 PCI: 00:14.2 init
1609 18:57:33.314172 PCI: 00:14.2 init finished in 0 msecs
1610 18:57:33.317723
1611 18:57:33.317853 PCI: 00:15.0 init
1612 18:57:33.321068 I2C bus 0 version 0x3230302a
1613 18:57:33.324317 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 18:57:33.327918 PCI: 00:15.0 init finished in 6 msecs
1615 18:57:33.331025 PCI: 00:15.1 init
1616 18:57:33.334508 I2C bus 1 version 0x3230302a
1617 18:57:33.337239 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 18:57:33.340999 PCI: 00:15.1 init finished in 6 msecs
1619 18:57:33.344189 PCI: 00:15.2 init
1620 18:57:33.347661 I2C bus 2 version 0x3230302a
1621 18:57:33.350802 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 18:57:33.354535 PCI: 00:15.2 init finished in 6 msecs
1623 18:57:33.357675 PCI: 00:15.3 init
1624 18:57:33.360574 I2C bus 3 version 0x3230302a
1625 18:57:33.364692 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 18:57:33.367177 PCI: 00:15.3 init finished in 6 msecs
1627 18:57:33.367309 PCI: 00:16.0 init
1628 18:57:33.370861
1629 18:57:33.373895 PCI: 00:16.0 init finished in 0 msecs
1630 18:57:33.374021 PCI: 00:19.1 init
1631 18:57:33.377321 I2C bus 5 version 0x3230302a
1632 18:57:33.380500 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1633 18:57:33.387156 PCI: 00:19.1 init finished in 6 msecs
1634 18:57:33.387320 PCI: 00:1d.0 init
1635 18:57:33.390569 Initializing PCH PCIe bridge.
1636 18:57:33.393816 PCI: 00:1d.0 init finished in 3 msecs
1637 18:57:33.397883 PCI: 00:1f.0 init
1638 18:57:33.401066 IOAPIC: Initializing IOAPIC at 0xfec00000
1639 18:57:33.407998 IOAPIC: Bootstrap Processor Local APIC = 0x00
1640 18:57:33.408169 IOAPIC: ID = 0x02
1641 18:57:33.410689 IOAPIC: Dumping registers
1642 18:57:33.414006 reg 0x0000: 0x02000000
1643 18:57:33.417873 reg 0x0001: 0x00770020
1644 18:57:33.418009 reg 0x0002: 0x00000000
1645 18:57:33.424014 PCI: 00:1f.0 init finished in 21 msecs
1646 18:57:33.424167 PCI: 00:1f.2 init
1647 18:57:33.427833 Disabling ACPI via APMC.
1648 18:57:33.432318 APMC done.
1649 18:57:33.435464 PCI: 00:1f.2 init finished in 6 msecs
1650 18:57:33.447357 PCI: 01:00.0 init
1651 18:57:33.450387 PCI: 01:00.0 init finished in 0 msecs
1652 18:57:33.453864 PNP: 0c09.0 init
1653 18:57:33.460852 Google Chrome EC uptime: 8.402 seconds
1654 18:57:33.464234 Google Chrome AP resets since EC boot: 1
1655 18:57:33.467388 Google Chrome most recent AP reset causes:
1656 18:57:33.470768 0.347: 32775 shutdown: entering G3
1657 18:57:33.477261 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1658 18:57:33.480646 PNP: 0c09.0 init finished in 23 msecs
1659 18:57:33.487086 Devices initialized
1660 18:57:33.490532 Show all devs... After init.
1661 18:57:33.493724 Root Device: enabled 1
1662 18:57:33.493855 DOMAIN: 0000: enabled 1
1663 18:57:33.496942 CPU_CLUSTER: 0: enabled 1
1664 18:57:33.500227 PCI: 00:00.0: enabled 1
1665 18:57:33.503890 PCI: 00:02.0: enabled 1
1666 18:57:33.504018 PCI: 00:04.0: enabled 1
1667 18:57:33.506861 PCI: 00:05.0: enabled 1
1668 18:57:33.510374 PCI: 00:06.0: enabled 0
1669 18:57:33.513923 PCI: 00:07.0: enabled 0
1670 18:57:33.514047 PCI: 00:07.1: enabled 0
1671 18:57:33.516860 PCI: 00:07.2: enabled 0
1672 18:57:33.520303 PCI: 00:07.3: enabled 0
1673 18:57:33.523939 PCI: 00:08.0: enabled 1
1674 18:57:33.524066 PCI: 00:09.0: enabled 0
1675 18:57:33.527556 PCI: 00:0a.0: enabled 0
1676 18:57:33.530162 PCI: 00:0d.0: enabled 1
1677 18:57:33.530281 PCI: 00:0d.1: enabled 0
1678 18:57:33.533791
1679 18:57:33.533889 PCI: 00:0d.2: enabled 0
1680 18:57:33.537073 PCI: 00:0d.3: enabled 0
1681 18:57:33.540112 PCI: 00:0e.0: enabled 0
1682 18:57:33.540193 PCI: 00:10.2: enabled 1
1683 18:57:33.543552 PCI: 00:10.6: enabled 0
1684 18:57:33.546689 PCI: 00:10.7: enabled 0
1685 18:57:33.550316 PCI: 00:12.0: enabled 0
1686 18:57:33.550418 PCI: 00:12.6: enabled 0
1687 18:57:33.553475 PCI: 00:13.0: enabled 0
1688 18:57:33.557001 PCI: 00:14.0: enabled 1
1689 18:57:33.560101 PCI: 00:14.1: enabled 0
1690 18:57:33.560198 PCI: 00:14.2: enabled 1
1691 18:57:33.563862 PCI: 00:14.3: enabled 1
1692 18:57:33.567047 PCI: 00:15.0: enabled 1
1693 18:57:33.569773 PCI: 00:15.1: enabled 1
1694 18:57:33.569872 PCI: 00:15.2: enabled 1
1695 18:57:33.573447 PCI: 00:15.3: enabled 1
1696 18:57:33.576670 PCI: 00:16.0: enabled 1
1697 18:57:33.579795 PCI: 00:16.1: enabled 0
1698 18:57:33.579884 PCI: 00:16.2: enabled 0
1699 18:57:33.583599 PCI: 00:16.3: enabled 0
1700 18:57:33.586495 PCI: 00:16.4: enabled 0
1701 18:57:33.586593 PCI: 00:16.5: enabled 0
1702 18:57:33.590049 PCI: 00:17.0: enabled 0
1703 18:57:33.593261 PCI: 00:19.0: enabled 0
1704 18:57:33.596302 PCI: 00:19.1: enabled 1
1705 18:57:33.596397 PCI: 00:19.2: enabled 0
1706 18:57:33.599744 PCI: 00:1c.0: enabled 1
1707 18:57:33.603733 PCI: 00:1c.1: enabled 0
1708 18:57:33.606472 PCI: 00:1c.2: enabled 0
1709 18:57:33.606577 PCI: 00:1c.3: enabled 0
1710 18:57:33.609696 PCI: 00:1c.4: enabled 0
1711 18:57:33.612982 PCI: 00:1c.5: enabled 0
1712 18:57:33.616576 PCI: 00:1c.6: enabled 1
1713 18:57:33.616686 PCI: 00:1c.7: enabled 0
1714 18:57:33.619688 PCI: 00:1d.0: enabled 1
1715 18:57:33.623047 PCI: 00:1d.1: enabled 0
1716 18:57:33.623147 PCI: 00:1d.2: enabled 1
1717 18:57:33.626338
1718 18:57:33.626436 PCI: 00:1d.3: enabled 0
1719 18:57:33.629576 PCI: 00:1e.0: enabled 1
1720 18:57:33.633227 PCI: 00:1e.1: enabled 0
1721 18:57:33.633322 PCI: 00:1e.2: enabled 1
1722 18:57:33.636553 PCI: 00:1e.3: enabled 1
1723 18:57:33.639538 PCI: 00:1f.0: enabled 1
1724 18:57:33.642951 PCI: 00:1f.1: enabled 0
1725 18:57:33.643057 PCI: 00:1f.2: enabled 1
1726 18:57:33.646175 PCI: 00:1f.3: enabled 1
1727 18:57:33.649702 PCI: 00:1f.4: enabled 0
1728 18:57:33.653305 PCI: 00:1f.5: enabled 1
1729 18:57:33.653407 PCI: 00:1f.6: enabled 0
1730 18:57:33.656152 PCI: 00:1f.7: enabled 0
1731 18:57:33.659902 APIC: 00: enabled 1
1732 18:57:33.660008 GENERIC: 0.0: enabled 1
1733 18:57:33.662835 GENERIC: 0.0: enabled 1
1734 18:57:33.666537 GENERIC: 1.0: enabled 1
1735 18:57:33.669829 GENERIC: 0.0: enabled 1
1736 18:57:33.669934 GENERIC: 1.0: enabled 1
1737 18:57:33.673004 USB0 port 0: enabled 1
1738 18:57:33.676163 GENERIC: 0.0: enabled 1
1739 18:57:33.680163 USB0 port 0: enabled 1
1740 18:57:33.680262 GENERIC: 0.0: enabled 1
1741 18:57:33.683017 I2C: 00:1a: enabled 1
1742 18:57:33.686623 I2C: 00:31: enabled 1
1743 18:57:33.686721 I2C: 00:32: enabled 1
1744 18:57:33.689268 I2C: 00:10: enabled 1
1745 18:57:33.692736 I2C: 00:15: enabled 1
1746 18:57:33.692828 GENERIC: 0.0: enabled 0
1747 18:57:33.696123 GENERIC: 1.0: enabled 0
1748 18:57:33.699307 GENERIC: 0.0: enabled 1
1749 18:57:33.699399 SPI: 00: enabled 1
1750 18:57:33.702764 SPI: 00: enabled 1
1751 18:57:33.705998 PNP: 0c09.0: enabled 1
1752 18:57:33.706102 GENERIC: 0.0: enabled 1
1753 18:57:33.709399
1754 18:57:33.709518 USB3 port 0: enabled 1
1755 18:57:33.712470 USB3 port 1: enabled 1
1756 18:57:33.715802 USB3 port 2: enabled 0
1757 18:57:33.715905 USB3 port 3: enabled 0
1758 18:57:33.719555 USB2 port 0: enabled 0
1759 18:57:33.722673 USB2 port 1: enabled 1
1760 18:57:33.722769 USB2 port 2: enabled 1
1761 18:57:33.725690 USB2 port 3: enabled 0
1762 18:57:33.729238 USB2 port 4: enabled 1
1763 18:57:33.732700 USB2 port 5: enabled 0
1764 18:57:33.732796 USB2 port 6: enabled 0
1765 18:57:33.736039 USB2 port 7: enabled 0
1766 18:57:33.738930 USB2 port 8: enabled 0
1767 18:57:33.739025 USB2 port 9: enabled 0
1768 18:57:33.742354 USB3 port 0: enabled 0
1769 18:57:33.745409 USB3 port 1: enabled 1
1770 18:57:33.745513 USB3 port 2: enabled 0
1771 18:57:33.749351
1772 18:57:33.749454 USB3 port 3: enabled 0
1773 18:57:33.752746 GENERIC: 0.0: enabled 1
1774 18:57:33.755708 GENERIC: 1.0: enabled 1
1775 18:57:33.755805 APIC: 01: enabled 1
1776 18:57:33.759281 APIC: 03: enabled 1
1777 18:57:33.762026 APIC: 07: enabled 1
1778 18:57:33.762122 APIC: 05: enabled 1
1779 18:57:33.765481 APIC: 04: enabled 1
1780 18:57:33.765576 APIC: 02: enabled 1
1781 18:57:33.768966 APIC: 06: enabled 1
1782 18:57:33.772354 PCI: 01:00.0: enabled 1
1783 18:57:33.775486 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1784 18:57:33.782418 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1785 18:57:33.785358 ELOG: NV offset 0xf30000 size 0x1000
1786 18:57:33.792369 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1787 18:57:33.799024 ELOG: Event(17) added with size 13 at 2023-01-21 18:57:33 UTC
1788 18:57:33.805721 ELOG: Event(92) added with size 9 at 2023-01-21 18:57:33 UTC
1789 18:57:33.812180 ELOG: Event(93) added with size 9 at 2023-01-21 18:57:33 UTC
1790 18:57:33.818825 ELOG: Event(9E) added with size 10 at 2023-01-21 18:57:33 UTC
1791 18:57:33.825345 ELOG: Event(9F) added with size 14 at 2023-01-21 18:57:33 UTC
1792 18:57:33.832140 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1793 18:57:33.838532 ELOG: Event(A1) added with size 10 at 2023-01-21 18:57:33 UTC
1794 18:57:33.841709 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1795 18:57:33.848735 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1796 18:57:33.851626 Finalize devices...
1797 18:57:33.851732 Devices finalized
1798 18:57:33.858637 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1799 18:57:33.865545 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1800 18:57:33.868834 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1801 18:57:33.874928 ME: HFSTS1 : 0x80030055
1802 18:57:33.878469 ME: HFSTS2 : 0x30280116
1803 18:57:33.882044 ME: HFSTS3 : 0x00000050
1804 18:57:33.888095 ME: HFSTS4 : 0x00004000
1805 18:57:33.891755 ME: HFSTS5 : 0x00000000
1806 18:57:33.894734 ME: HFSTS6 : 0x00400006
1807 18:57:33.898214
1808 18:57:33.901291 ME: Manufacturing Mode : YES
1809 18:57:33.904564 ME: SPI Protection Mode Enabled : NO
1810 18:57:33.908303 ME: FW Partition Table : OK
1811 18:57:33.911524 ME: Bringup Loader Failure : NO
1812 18:57:33.915091 ME: Firmware Init Complete : NO
1813 18:57:33.917836 ME: Boot Options Present : NO
1814 18:57:33.921233 ME: Update In Progress : NO
1815 18:57:33.927621 ME: D0i3 Support : YES
1816 18:57:33.931558 ME: Low Power State Enabled : NO
1817 18:57:33.934356 ME: CPU Replaced : YES
1818 18:57:33.937784 ME: CPU Replacement Valid : YES
1819 18:57:33.941267 ME: Current Working State : 5
1820 18:57:33.944607 ME: Current Operation State : 1
1821 18:57:33.948036 ME: Current Operation Mode : 3
1822 18:57:33.950919 ME: Error Code : 0
1823 18:57:33.954140 ME: Enhanced Debug Mode : NO
1824 18:57:33.960992 ME: CPU Debug Disabled : YES
1825 18:57:33.964624 ME: TXT Support : NO
1826 18:57:33.970966 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1827 18:57:33.977549 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1828 18:57:33.981011 CBFS: 'fallback/slic' not found.
1829 18:57:33.983933 ACPI: Writing ACPI tables at 76b01000.
1830 18:57:33.987628 ACPI: * FACS
1831 18:57:33.987761 ACPI: * DSDT
1832 18:57:33.990993 Ramoops buffer: 0x100000@0x76a00000.
1833 18:57:33.997371 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1834 18:57:34.000600 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1835 18:57:34.003968 Google Chrome EC: version:
1836 18:57:34.007335 ro: voema_v2.0.7540-147f8d37d1
1837 18:57:34.010786 rw: voema_v2.0.7540-147f8d37d1
1838 18:57:34.013662 running image: 2
1839 18:57:34.020553 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1840 18:57:34.024104 ACPI: * FADT
1841 18:57:34.024242 SCI is IRQ9
1842 18:57:34.027237 ACPI: added table 1/32, length now 40
1843 18:57:34.030691 ACPI: * SSDT
1844 18:57:34.033849 Found 1 CPU(s) with 8 core(s) each.
1845 18:57:34.036871 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1846 18:57:34.040328 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1847 18:57:34.043640
1848 18:57:34.046972 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1849 18:57:34.050023 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1850 18:57:34.056803 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1851 18:57:34.060300 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1852 18:57:34.063155
1853 18:57:34.066643 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1854 18:57:34.073171 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1855 18:57:34.080117 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1856 18:57:34.083693 \_SB.PCI0.RP09: Added StorageD3Enable property
1857 18:57:34.086873 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1858 18:57:34.093315 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1859 18:57:34.096151 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1860 18:57:34.103119 PS2K: Passing 80 keymaps to kernel
1861 18:57:34.109433 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1862 18:57:34.116305 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1863 18:57:34.119826 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1864 18:57:34.122924
1865 18:57:34.126398 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1866 18:57:34.133105 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1867 18:57:34.139371 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1868 18:57:34.146020 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1869 18:57:34.152414 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1870 18:57:34.159254 ACPI: added table 2/32, length now 44
1871 18:57:34.159397 ACPI: * MCFG
1872 18:57:34.162655 ACPI: added table 3/32, length now 48
1873 18:57:34.166262 ACPI: * TPM2
1874 18:57:34.169191 TPM2 log created at 0x769f0000
1875 18:57:34.172429 ACPI: added table 4/32, length now 52
1876 18:57:34.172564 ACPI: * MADT
1877 18:57:34.175691 SCI is IRQ9
1878 18:57:34.178933 ACPI: added table 5/32, length now 56
1879 18:57:34.179034 current = 76b09850
1880 18:57:34.182301 ACPI: * DMAR
1881 18:57:34.185853 ACPI: added table 6/32, length now 60
1882 18:57:34.189329 ACPI: added table 7/32, length now 64
1883 18:57:34.192363 ACPI: * HPET
1884 18:57:34.195677 ACPI: added table 8/32, length now 68
1885 18:57:34.195780 ACPI: done.
1886 18:57:34.198911 ACPI tables: 35216 bytes.
1887 18:57:34.202321 smbios_write_tables: 769ef000
1888 18:57:34.205751 EC returned error result code 3
1889 18:57:34.208908 Couldn't obtain OEM name from CBI
1890 18:57:34.212384 Create SMBIOS type 16
1891 18:57:34.215249 Create SMBIOS type 17
1892 18:57:34.218668 GENERIC: 0.0 (WIFI Device)
1893 18:57:34.218769 SMBIOS tables: 1750 bytes.
1894 18:57:34.222102
1895 18:57:34.225704 Writing table forward entry at 0x00000500
1896 18:57:34.232627 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1897 18:57:34.235470 Writing coreboot table at 0x76b25000
1898 18:57:34.242203 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1899 18:57:34.245198 1. 0000000000001000-000000000009ffff: RAM
1900 18:57:34.248782 2. 00000000000a0000-00000000000fffff: RESERVED
1901 18:57:34.255501 3. 0000000000100000-00000000769eefff: RAM
1902 18:57:34.258834 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1903 18:57:34.265180 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1904 18:57:34.272003 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1905 18:57:34.275130 7. 0000000077000000-000000007fbfffff: RESERVED
1906 18:57:34.281942 8. 00000000c0000000-00000000cfffffff: RESERVED
1907 18:57:34.285004 9. 00000000f8000000-00000000f9ffffff: RESERVED
1908 18:57:34.288655 10. 00000000fb000000-00000000fb000fff: RESERVED
1909 18:57:34.294909 11. 00000000fe000000-00000000fe00ffff: RESERVED
1910 18:57:34.298231 12. 00000000fed80000-00000000fed87fff: RESERVED
1911 18:57:34.304758 13. 00000000fed90000-00000000fed92fff: RESERVED
1912 18:57:34.308309 14. 00000000feda0000-00000000feda1fff: RESERVED
1913 18:57:34.315210 15. 00000000fedc0000-00000000feddffff: RESERVED
1914 18:57:34.318177 16. 0000000100000000-00000002803fffff: RAM
1915 18:57:34.321630 Passing 4 GPIOs to payload:
1916 18:57:34.324476 NAME | PORT | POLARITY | VALUE
1917 18:57:34.331453 lid | undefined | high | high
1918 18:57:34.337949 power | undefined | high | low
1919 18:57:34.341145 oprom | undefined | high | low
1920 18:57:34.347949 EC in RW | 0x000000e5 | high | high
1921 18:57:34.354233 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 761b
1922 18:57:34.357887 coreboot table: 1576 bytes.
1923 18:57:34.361232 IMD ROOT 0. 0x76fff000 0x00001000
1924 18:57:34.364071 IMD SMALL 1. 0x76ffe000 0x00001000
1925 18:57:34.367533 FSP MEMORY 2. 0x76c4e000 0x003b0000
1926 18:57:34.370740 VPD 3. 0x76c4d000 0x00000367
1927 18:57:34.374216 RO MCACHE 4. 0x76c4c000 0x00000fdc
1928 18:57:34.377299 CONSOLE 5. 0x76c2c000 0x00020000
1929 18:57:34.384011 FMAP 6. 0x76c2b000 0x00000578
1930 18:57:34.387017 TIME STAMP 7. 0x76c2a000 0x00000910
1931 18:57:34.390865 VBOOT WORK 8. 0x76c16000 0x00014000
1932 18:57:34.394418 ROMSTG STCK 9. 0x76c15000 0x00001000
1933 18:57:34.397072 AFTER CAR 10. 0x76c0a000 0x0000b000
1934 18:57:34.400266 RAMSTAGE 11. 0x76b97000 0x00073000
1935 18:57:34.403982 REFCODE 12. 0x76b42000 0x00055000
1936 18:57:34.407233 SMM BACKUP 13. 0x76b32000 0x00010000
1937 18:57:34.413599 4f444749 14. 0x76b30000 0x00002000
1938 18:57:34.416870 EXT VBT15. 0x76b2d000 0x0000219f
1939 18:57:34.420357 COREBOOT 16. 0x76b25000 0x00008000
1940 18:57:34.423895 ACPI 17. 0x76b01000 0x00024000
1941 18:57:34.427231 ACPI GNVS 18. 0x76b00000 0x00001000
1942 18:57:34.430189 RAMOOPS 19. 0x76a00000 0x00100000
1943 18:57:34.433642 TPM2 TCGLOG20. 0x769f0000 0x00010000
1944 18:57:34.436727 SMBIOS 21. 0x769ef000 0x00000800
1945 18:57:34.440303 IMD small region:
1946 18:57:34.443563 IMD ROOT 0. 0x76ffec00 0x00000400
1947 18:57:34.446524 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1948 18:57:34.450167 POWER STATE 2. 0x76ffeb80 0x00000044
1949 18:57:34.453316
1950 18:57:34.456989 ROMSTAGE 3. 0x76ffeb60 0x00000004
1951 18:57:34.459734 MEM INFO 4. 0x76ffe980 0x000001e0
1952 18:57:34.466856 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1953 18:57:34.470180 MTRR: Physical address space:
1954 18:57:34.476589 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1955 18:57:34.479814 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1956 18:57:34.485975 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1957 18:57:34.493113 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1958 18:57:34.499177 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1959 18:57:34.506262 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1960 18:57:34.512808 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1961 18:57:34.515708 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 18:57:34.519116 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 18:57:34.526062 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 18:57:34.528814 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 18:57:34.532409 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 18:57:34.535485 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 18:57:34.542456 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 18:57:34.545981 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 18:57:34.548792 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 18:57:34.552745 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 18:57:34.556086 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 18:57:34.560223 call enable_fixed_mtrr()
1973 18:57:34.563647 CPU physical address size: 39 bits
1974 18:57:34.570517 MTRR: default type WB/UC MTRR counts: 6/6.
1975 18:57:34.573843 MTRR: UC selected as default type.
1976 18:57:34.580038 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1977 18:57:34.583669 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1978 18:57:34.590338 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1979 18:57:34.596941 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1980 18:57:34.603602 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1981 18:57:34.609912 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1982 18:57:34.610079
1983 18:57:34.613305 MTRR check
1984 18:57:34.616877 Fixed MTRRs : Enabled
1985 18:57:34.617008 Variable MTRRs: Enabled
1986 18:57:34.617135
1987 18:57:34.622878 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 18:57:34.626660 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 18:57:34.629608 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 18:57:34.632985 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 18:57:34.639606 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 18:57:34.643150 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 18:57:34.646487 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 18:57:34.649469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 18:57:34.653096 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 18:57:34.659587 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 18:57:34.662992 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 18:57:34.669435 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1999 18:57:34.673047 call enable_fixed_mtrr()
2000 18:57:34.676319 Checking cr50 for pending updates
2001 18:57:34.679946 CPU physical address size: 39 bits
2002 18:57:34.683321 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 18:57:34.686743 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 18:57:34.690210 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 18:57:34.696834 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 18:57:34.699743 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 18:57:34.703144 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 18:57:34.706753 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 18:57:34.713280 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 18:57:34.716547 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 18:57:34.719986 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 18:57:34.723328 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 18:57:34.729574 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 18:57:34.732903 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 18:57:34.736032 call enable_fixed_mtrr()
2016 18:57:34.739421 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 18:57:34.742905 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 18:57:34.749461 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 18:57:34.753234 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 18:57:34.756073 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 18:57:34.759404 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 18:57:34.765817 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 18:57:34.769073 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 18:57:34.772878 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 18:57:34.775750 CPU physical address size: 39 bits
2026 18:57:34.782540 call enable_fixed_mtrr()
2027 18:57:34.785765 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 18:57:34.789181 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 18:57:34.792644 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 18:57:34.795676 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 18:57:34.799496
2032 18:57:34.802535 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 18:57:34.805391 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 18:57:34.809016 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 18:57:34.812518 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 18:57:34.819110 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 18:57:34.822120 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 18:57:34.825730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 18:57:34.828973 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 18:57:34.836405 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 18:57:34.836539 call enable_fixed_mtrr()
2042 18:57:34.843372 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 18:57:34.846350 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 18:57:34.849723 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 18:57:34.853135 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 18:57:34.859739 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 18:57:34.863027 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 18:57:34.866718 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 18:57:34.869370 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 18:57:34.876124 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 18:57:34.879312 CPU physical address size: 39 bits
2052 18:57:34.882818 call enable_fixed_mtrr()
2053 18:57:34.886510 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 18:57:34.889758 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 18:57:34.893056
2056 18:57:34.896243 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 18:57:34.899222 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 18:57:34.902543 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 18:57:34.905927 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 18:57:34.912892 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 18:57:34.915981 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 18:57:34.919344 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 18:57:34.922504 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 18:57:34.929650 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 18:57:34.932749 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 18:57:34.935993 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 18:57:34.939420 call enable_fixed_mtrr()
2068 18:57:34.942711 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 18:57:34.949242 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 18:57:34.952241 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 18:57:34.955759 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 18:57:34.958919 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 18:57:34.965747 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 18:57:34.969036 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 18:57:34.972773 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 18:57:34.975753 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 18:57:34.979567 CPU physical address size: 39 bits
2078 18:57:34.986803 call enable_fixed_mtrr()
2079 18:57:34.986940 Reading cr50 TPM mode
2080 18:57:34.990711 CPU physical address size: 39 bits
2081 18:57:34.993869 CPU physical address size: 39 bits
2082 18:57:35.000247 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 6 ms
2083 18:57:35.003797 CPU physical address size: 39 bits
2084 18:57:35.010241 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2085 18:57:35.017212 Checking segment from ROM address 0xffc02b38
2086 18:57:35.020539 Checking segment from ROM address 0xffc02b54
2087 18:57:35.023316 Loading segment from ROM address 0xffc02b38
2088 18:57:35.026799 code (compression=0)
2089 18:57:35.036554 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2090 18:57:35.043616 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2091 18:57:35.047630 it's not compressed!
2092 18:57:35.185325 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2093 18:57:35.192187 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2094 18:57:35.198848 Loading segment from ROM address 0xffc02b54
2095 18:57:35.198981 Entry Point 0x30000000
2096 18:57:35.202298 Loaded segments
2097 18:57:35.208341 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2098 18:57:35.251409 Finalizing chipset.
2099 18:57:35.254552 Finalizing SMM.
2100 18:57:35.254687 APMC done.
2101 18:57:35.261698 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2102 18:57:35.264642 mp_park_aps done after 0 msecs.
2103 18:57:35.267870 Jumping to boot code at 0x30000000(0x76b25000)
2104 18:57:35.278235 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2105 18:57:35.278405
2106 18:57:35.278527
2107 18:57:35.278592
2108 18:57:35.281151 Starting depthcharge on Voema...
2109 18:57:35.281239
2110 18:57:35.281602 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2111 18:57:35.281706 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2112 18:57:35.281799 Setting prompt string to ['volteer:']
2113 18:57:35.281880 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2114 18:57:35.290974 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2115 18:57:35.291100
2116 18:57:35.297503 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2117 18:57:35.297622
2118 18:57:35.304373 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2119 18:57:35.304485
2120 18:57:35.307693 Failed to find eMMC card reader
2121 18:57:35.307824
2122 18:57:35.307895 Wipe memory regions:
2123 18:57:35.307973
2124 18:57:35.314494 [0x00000000001000, 0x000000000a0000)
2125 18:57:35.314613
2126 18:57:35.318096 [0x00000000100000, 0x00000030000000)
2127 18:57:35.318203
2128 18:57:35.346125 [0x00000032662db0, 0x000000769ef000)
2129 18:57:35.346270
2130 18:57:35.384709 [0x00000100000000, 0x00000280400000)
2131 18:57:35.384859
2132 18:57:35.590698 ec_init: CrosEC protocol v3 supported (256, 256)
2133 18:57:35.590844
2134 18:57:35.597403 update_port_state: port C0 state: usb enable 1 mux conn 0
2135 18:57:35.597542
2136 18:57:35.604102 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2137 18:57:35.604221
2138 18:57:35.612102 pmc_check_ipc_sts: STS_BUSY done after 1562 us
2139 18:57:35.612253
2140 18:57:35.615017 send_conn_disc_msg: pmc_send_cmd succeeded
2141 18:57:35.615102
2142 18:57:36.047017 R8152: Initializing
2143 18:57:36.047195
2144 18:57:36.050473 Version 6 (ocp_data = 5c30)
2145 18:57:36.050569
2146 18:57:36.053088 R8152: Done initializing
2147 18:57:36.053182
2148 18:57:36.056469 Adding net device
2149 18:57:36.056563
2150 18:57:36.362202 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2151 18:57:36.362347
2152 18:57:36.362454
2153 18:57:36.362518
2154 18:57:36.365550 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 18:57:36.466339 volteer: tftpboot 192.168.201.1 8815429/tftp-deploy-8fde47j2/kernel/bzImage 8815429/tftp-deploy-8fde47j2/kernel/cmdline 8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
2157 18:57:36.466518 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2158 18:57:36.466647 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2159 18:57:36.471292 tftpboot 192.168.201.1 8815429/tftp-deploy-8fde47j2/kernel/bzImoy-8fde47j2/kernel/cmdline 8815429/tftp-deploy-8fde47j2/ramdisk/ramdisk.cpio.gz
2160 18:57:36.471400
2161 18:57:36.471469 Waiting for link
2162 18:57:36.471532
2163 18:57:36.673641 done.
2164 18:57:36.673791
2165 18:57:36.673866 MAC: 00:24:32:30:7b:ec
2166 18:57:36.673930
2167 18:57:36.677122 Sending DHCP discover... done.
2168 18:57:36.677216
2169 18:57:36.680374 Waiting for reply... done.
2170 18:57:36.680464
2171 18:57:36.683497 Sending DHCP request... done.
2172 18:57:36.683601
2173 18:57:36.686909 Waiting for reply... done.
2174 18:57:36.687021
2175 18:57:36.690267 My ip is 192.168.201.11
2176 18:57:36.690370
2177 18:57:36.693348 The DHCP server ip is 192.168.201.1
2178 18:57:36.693463
2179 18:57:36.699721 TFTP server IP predefined by user: 192.168.201.1
2180 18:57:36.699832
2181 18:57:36.706758 Bootfile predefined by user: 8815429/tftp-deploy-8fde47j2/kernel/bzImage
2182 18:57:36.706936
2183 18:57:36.709744 Sending tftp read request... done.
2184 18:57:36.709847
2185 18:57:36.713065 Waiting for the transfer...
2186 18:57:36.713172
2187 18:57:37.277370 00000000 ################################################################
2188 18:57:37.277561
2189 18:57:37.842822 00080000 ################################################################
2190 18:57:37.842971
2191 18:57:38.385832 00100000 ################################################################
2192 18:57:38.385982
2193 18:57:38.952727 00180000 ################################################################
2194 18:57:38.952887
2195 18:57:39.503889 00200000 ################################################################
2196 18:57:39.504045
2197 18:57:40.054015 00280000 ################################################################
2198 18:57:40.054173
2199 18:57:40.619961 00300000 ################################################################
2200 18:57:40.620127
2201 18:57:41.190955 00380000 ################################################################
2202 18:57:41.191136
2203 18:57:41.753794 00400000 ################################################################
2204 18:57:41.753946
2205 18:57:42.320013 00480000 ################################################################
2206 18:57:42.320162
2207 18:57:42.897731 00500000 ################################################################
2208 18:57:42.897904
2209 18:57:43.474001 00580000 ################################################################
2210 18:57:43.474146
2211 18:57:44.054558 00600000 ################################################################
2212 18:57:44.054712
2213 18:57:44.637321 00680000 ################################################################
2214 18:57:44.637493
2215 18:57:45.214617 00700000 ################################################################
2216 18:57:45.214762
2217 18:57:45.792194 00780000 ################################################################
2218 18:57:45.792348
2219 18:57:46.368196 00800000 ################################################################
2220 18:57:46.368346
2221 18:57:46.939283 00880000 ################################################################
2222 18:57:46.939422
2223 18:57:47.236755 00900000 ################################## done.
2224 18:57:47.236898
2225 18:57:47.240234 The bootfile was 9711616 bytes long.
2226 18:57:47.240351
2227 18:57:47.243488 Sending tftp read request... done.
2228 18:57:47.243574
2229 18:57:47.246935 Waiting for the transfer...
2230 18:57:47.247023
2231 18:57:47.811247 00000000 ################################################################
2232 18:57:47.811392
2233 18:57:48.358393 00080000 ################################################################
2234 18:57:48.358538
2235 18:57:48.908895 00100000 ################################################################
2236 18:57:48.909055
2237 18:57:49.476094 00180000 ################################################################
2238 18:57:49.476235
2239 18:57:50.040067 00200000 ################################################################
2240 18:57:50.040220
2241 18:57:50.614746 00280000 ################################################################
2242 18:57:50.614888
2243 18:57:51.170112 00300000 ################################################################
2244 18:57:51.170255
2245 18:57:51.695119 00380000 ################################################################
2246 18:57:51.695265
2247 18:57:52.217992 00400000 ################################################################
2248 18:57:52.218139
2249 18:57:52.738380 00480000 ################################################################
2250 18:57:52.738581
2251 18:57:53.249705 00500000 ################################################################
2252 18:57:53.249846
2253 18:57:53.762495 00580000 ################################################################
2254 18:57:53.762647
2255 18:57:54.279173 00600000 ################################################################
2256 18:57:54.279316
2257 18:57:54.808321 00680000 ################################################################
2258 18:57:54.808464
2259 18:57:55.355468 00700000 ################################################################
2260 18:57:55.355622
2261 18:57:55.885670 00780000 ################################################################
2262 18:57:55.885815
2263 18:57:56.409285 00800000 ################################################################
2264 18:57:56.409490
2265 18:57:56.936133 00880000 ################################################################
2266 18:57:56.936285
2267 18:57:57.475787 00900000 ################################################################
2268 18:57:57.475937
2269 18:57:58.107577 00980000 ################################################################
2270 18:57:58.107718
2271 18:57:58.741549 00a00000 ################################################################
2272 18:57:58.741692
2273 18:57:59.315599 00a80000 ################################################################
2274 18:57:59.315777
2275 18:57:59.879148 00b00000 ################################################################
2276 18:57:59.879298
2277 18:58:00.420589 00b80000 ################################################################
2278 18:58:00.420734
2279 18:58:00.985693 00c00000 ################################################################
2280 18:58:00.985832
2281 18:58:01.573288 00c80000 ################################################################
2282 18:58:01.573481
2283 18:58:02.221937 00d00000 ################################################################
2284 18:58:02.222117
2285 18:58:02.854833 00d80000 ################################################################
2286 18:58:02.854968
2287 18:58:03.422877 00e00000 ################################################################
2288 18:58:03.423016
2289 18:58:03.977962 00e80000 ################################################################
2290 18:58:03.978103
2291 18:58:04.550365 00f00000 ################################################################
2292 18:58:04.550506
2293 18:58:05.121799 00f80000 ################################################################
2294 18:58:05.121943
2295 18:58:05.680555 01000000 ################################################################
2296 18:58:05.680697
2297 18:58:06.222778 01080000 ################################################################
2298 18:58:06.222918
2299 18:58:06.772964 01100000 ################################################################
2300 18:58:06.773104
2301 18:58:07.318609 01180000 ################################################################
2302 18:58:07.318755
2303 18:58:07.861942 01200000 ################################################################
2304 18:58:07.862093
2305 18:58:08.415409 01280000 ################################################################
2306 18:58:08.415562
2307 18:58:08.935054 01300000 ################################################################
2308 18:58:08.935209
2309 18:58:09.453518 01380000 ################################################################
2310 18:58:09.453659
2311 18:58:09.967641 01400000 ################################################################
2312 18:58:09.967781
2313 18:58:10.481677 01480000 ################################################################
2314 18:58:10.481818
2315 18:58:10.995169 01500000 ################################################################
2316 18:58:10.995323
2317 18:58:11.512697 01580000 ################################################################
2318 18:58:11.512837
2319 18:58:12.033546 01600000 ################################################################
2320 18:58:12.033731
2321 18:58:12.554240 01680000 ################################################################
2322 18:58:12.554379
2323 18:58:13.086525 01700000 ################################################################
2324 18:58:13.086672
2325 18:58:13.600014 01780000 ################################################################
2326 18:58:13.600153
2327 18:58:14.146513 01800000 ################################################################
2328 18:58:14.146663
2329 18:58:14.702075 01880000 ################################################################
2330 18:58:14.702224
2331 18:58:15.223326 01900000 ################################################################
2332 18:58:15.223462
2333 18:58:15.738397 01980000 ################################################################
2334 18:58:15.738546
2335 18:58:16.251014 01a00000 ################################################################
2336 18:58:16.251153
2337 18:58:16.774230 01a80000 ################################################################
2338 18:58:16.774376
2339 18:58:17.317456 01b00000 ################################################################
2340 18:58:17.317601
2341 18:58:17.829194 01b80000 ################################################################
2342 18:58:17.829338
2343 18:58:18.341244 01c00000 ################################################################
2344 18:58:18.341384
2345 18:58:18.854692 01c80000 ################################################################
2346 18:58:18.854844
2347 18:58:19.367299 01d00000 ################################################################
2348 18:58:19.367439
2349 18:58:19.889583 01d80000 ################################################################
2350 18:58:19.889722
2351 18:58:20.405451 01e00000 ################################################################
2352 18:58:20.405593
2353 18:58:20.922260 01e80000 ################################################################
2354 18:58:20.922434
2355 18:58:21.437580 01f00000 ################################################################
2356 18:58:21.437753
2357 18:58:21.950096 01f80000 ################################################################
2358 18:58:21.950238
2359 18:58:22.463110 02000000 ################################################################
2360 18:58:22.463260
2361 18:58:22.977441 02080000 ################################################################
2362 18:58:22.977607
2363 18:58:23.493524 02100000 ################################################################
2364 18:58:23.493664
2365 18:58:24.005912 02180000 ################################################################
2366 18:58:24.006051
2367 18:58:24.190451 02200000 ######################## done.
2368 18:58:24.190600
2369 18:58:24.193654 Sending tftp read request... done.
2370 18:58:24.193735
2371 18:58:24.197131 Waiting for the transfer...
2372 18:58:24.197211
2373 18:58:24.197277 00000000 # done.
2374 18:58:24.197342
2375 18:58:24.207269 Command line loaded dynamically from TFTP file: 8815429/tftp-deploy-8fde47j2/kernel/cmdline
2376 18:58:24.207357
2377 18:58:24.220435 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2378 18:58:24.220521
2379 18:58:24.230227 Shutting down all USB controllers.
2380 18:58:24.230321
2381 18:58:24.230392 Removing current net device
2382 18:58:24.230470
2383 18:58:24.233131 Finalizing coreboot
2384 18:58:24.233212
2385 18:58:24.239844 Exiting depthcharge with code 4 at timestamp: 57609768
2386 18:58:24.239933
2387 18:58:24.240004
2388 18:58:24.240068 Starting kernel ...
2389 18:58:24.240129
2390 18:58:24.240189
2391 18:58:24.240247
2392 18:58:24.240666 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2393 18:58:24.240766 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
2394 18:58:24.240843 Setting prompt string to ['Linux version [0-9]']
2395 18:58:24.240913 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2396 18:58:24.240984 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2398 19:02:19.241787 end: 2.2.5 auto-login-action (duration 00:03:55) [common]
2400 19:02:19.243743 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 235 seconds'
2402 19:02:19.244622 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2405 19:02:19.246153 end: 2 depthcharge-action (duration 00:05:00) [common]
2407 19:02:19.247475 Cleaning after the job
2408 19:02:19.247928 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/ramdisk
2409 19:02:19.258158 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/kernel
2410 19:02:19.261243 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8815429/tftp-deploy-8fde47j2/modules
2411 19:02:19.262225 start: 4.1 power-off (timeout 00:00:30) [common]
2412 19:02:19.262984 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2413 19:02:19.288892 >> Command sent successfully.
2414 19:02:19.290820 Returned 0 in 0 seconds
2415 19:02:19.392099 end: 4.1 power-off (duration 00:00:00) [common]
2417 19:02:19.393752 start: 4.2 read-feedback (timeout 00:10:00) [common]
2418 19:02:19.394921 Listened to connection for namespace 'common' for up to 1s
2419 19:02:20.398703 Finalising connection for namespace 'common'
2420 19:02:20.399465 Disconnecting from shell: Finalise
2421 19:02:20.501061 end: 4.2 read-feedback (duration 00:00:01) [common]
2422 19:02:20.501781 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8815429
2423 19:02:20.567277 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8815429
2424 19:02:20.567476 JobError: Your job cannot terminate cleanly.