Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 21:57:18.045680 lava-dispatcher, installed at version: 2022.11
2 21:57:18.045876 start: 0 validate
3 21:57:18.046010 Start time: 2023-01-29 21:57:18.046003+00:00 (UTC)
4 21:57:18.046141 Using caching service: 'http://localhost/cache/?uri=%s'
5 21:57:18.046270 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230120.0%2Fx86%2Frootfs.cpio.gz exists
6 21:57:18.054171 Using caching service: 'http://localhost/cache/?uri=%s'
7 21:57:18.054305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 21:57:18.060167 Using caching service: 'http://localhost/cache/?uri=%s'
9 21:57:18.060281 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 21:57:18.062919 validate duration: 0.02
12 21:57:18.063158 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 21:57:18.063261 start: 1.1 download-retry (timeout 00:10:00) [common]
14 21:57:18.063357 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 21:57:18.063468 Not decompressing ramdisk as can be used compressed.
16 21:57:18.063554 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230120.0/x86/rootfs.cpio.gz
17 21:57:18.063620 saving as /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/ramdisk/rootfs.cpio.gz
18 21:57:18.063682 total size: 8423992 (8MB)
19 21:57:18.074836 progress 0% (0MB)
20 21:57:18.096755 progress 5% (0MB)
21 21:57:18.114600 progress 10% (0MB)
22 21:57:18.131044 progress 15% (1MB)
23 21:57:18.145603 progress 20% (1MB)
24 21:57:18.163960 progress 25% (2MB)
25 21:57:18.180120 progress 30% (2MB)
26 21:57:18.194161 progress 35% (2MB)
27 21:57:18.210939 progress 40% (3MB)
28 21:57:18.225684 progress 45% (3MB)
29 21:57:18.243933 progress 50% (4MB)
30 21:57:18.255770 progress 55% (4MB)
31 21:57:18.269200 progress 60% (4MB)
32 21:57:18.285969 progress 65% (5MB)
33 21:57:18.302302 progress 70% (5MB)
34 21:57:18.329377 progress 75% (6MB)
35 21:57:18.343791 progress 80% (6MB)
36 21:57:18.364873 progress 85% (6MB)
37 21:57:18.391383 progress 90% (7MB)
38 21:57:18.412514 progress 95% (7MB)
39 21:57:18.430025 progress 100% (8MB)
40 21:57:18.430257 8MB downloaded in 0.37s (21.92MB/s)
41 21:57:18.430427 end: 1.1.1 http-download (duration 00:00:00) [common]
43 21:57:18.430688 end: 1.1 download-retry (duration 00:00:00) [common]
44 21:57:18.430783 start: 1.2 download-retry (timeout 00:10:00) [common]
45 21:57:18.430874 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 21:57:18.430987 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 21:57:18.431057 saving as /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/kernel/bzImage
48 21:57:18.431123 total size: 9707520 (9MB)
49 21:57:18.431188 No compression specified
50 21:57:18.446607 progress 0% (0MB)
51 21:57:18.488411 progress 5% (0MB)
52 21:57:18.526055 progress 10% (0MB)
53 21:57:18.554536 progress 15% (1MB)
54 21:57:18.597391 progress 20% (1MB)
55 21:57:18.641507 progress 25% (2MB)
56 21:57:18.685281 progress 30% (2MB)
57 21:57:18.724073 progress 35% (3MB)
58 21:57:18.763823 progress 40% (3MB)
59 21:57:18.801542 progress 45% (4MB)
60 21:57:18.850297 progress 50% (4MB)
61 21:57:18.906444 progress 55% (5MB)
62 21:57:18.964258 progress 60% (5MB)
63 21:57:19.027605 progress 65% (6MB)
64 21:57:19.085042 progress 70% (6MB)
65 21:57:19.142084 progress 75% (6MB)
66 21:57:19.198410 progress 80% (7MB)
67 21:57:19.262213 progress 85% (7MB)
68 21:57:19.324092 progress 90% (8MB)
69 21:57:19.381662 progress 95% (8MB)
70 21:57:19.437954 progress 100% (9MB)
71 21:57:19.438198 9MB downloaded in 1.01s (9.19MB/s)
72 21:57:19.438365 end: 1.2.1 http-download (duration 00:00:01) [common]
74 21:57:19.438614 end: 1.2 download-retry (duration 00:00:01) [common]
75 21:57:19.438708 start: 1.3 download-retry (timeout 00:09:59) [common]
76 21:57:19.438796 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 21:57:19.438905 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 21:57:19.438976 saving as /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/modules/modules.tar
79 21:57:19.439040 total size: 64732 (0MB)
80 21:57:19.439105 Using unxz to decompress xz
81 21:57:19.463764 progress 50% (0MB)
82 21:57:19.469496 progress 100% (0MB)
83 21:57:19.471874 0MB downloaded in 0.03s (1.88MB/s)
84 21:57:19.472115 end: 1.3.1 http-download (duration 00:00:00) [common]
86 21:57:19.472386 end: 1.3 download-retry (duration 00:00:00) [common]
87 21:57:19.472488 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 21:57:19.472586 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 21:57:19.472698 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 21:57:19.472821 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 21:57:19.473047 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk
92 21:57:19.473205 makedir: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin
93 21:57:19.473327 makedir: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/tests
94 21:57:19.473424 makedir: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/results
95 21:57:19.473536 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-add-keys
96 21:57:19.473668 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-add-sources
97 21:57:19.473832 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-background-process-start
98 21:57:19.473982 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-background-process-stop
99 21:57:19.474129 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-common-functions
100 21:57:19.474241 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-echo-ipv4
101 21:57:19.474366 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-install-packages
102 21:57:19.474482 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-installed-packages
103 21:57:19.474593 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-os-build
104 21:57:19.474703 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-probe-channel
105 21:57:19.474816 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-probe-ip
106 21:57:19.474927 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-target-ip
107 21:57:19.475037 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-target-mac
108 21:57:19.475146 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-target-storage
109 21:57:19.475259 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-case
110 21:57:19.475370 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-event
111 21:57:19.475480 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-feedback
112 21:57:19.475589 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-raise
113 21:57:19.475704 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-reference
114 21:57:19.475812 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-runner
115 21:57:19.475921 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-set
116 21:57:19.476030 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-test-shell
117 21:57:19.476142 Updating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-install-packages (oe)
118 21:57:19.476257 Updating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/bin/lava-installed-packages (oe)
119 21:57:19.476364 Creating /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/environment
120 21:57:19.476457 LAVA metadata
121 21:57:19.476530 - LAVA_JOB_ID=8926127
122 21:57:19.476602 - LAVA_DISPATCHER_IP=192.168.201.1
123 21:57:19.476707 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 21:57:19.476776 skipped lava-vland-overlay
125 21:57:19.476856 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 21:57:19.476943 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 21:57:19.477012 skipped lava-multinode-overlay
128 21:57:19.477088 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 21:57:19.477172 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 21:57:19.477250 Loading test definitions
131 21:57:19.477373 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 21:57:19.477452 Using /lava-8926127 at stage 0
133 21:57:19.477755 uuid=8926127_1.4.2.3.1 testdef=None
134 21:57:19.477847 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 21:57:19.477941 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 21:57:19.478442 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 21:57:19.478677 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 21:57:19.479250 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 21:57:19.479492 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 21:57:19.480030 runner path: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/0/tests/0_dmesg test_uuid 8926127_1.4.2.3.1
143 21:57:19.480177 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 21:57:19.480415 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 21:57:19.480490 Using /lava-8926127 at stage 1
147 21:57:19.480737 uuid=8926127_1.4.2.3.5 testdef=None
148 21:57:19.480829 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 21:57:19.480920 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 21:57:19.481369 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 21:57:19.481752 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 21:57:19.482492 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 21:57:19.482742 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 21:57:19.483390 runner path: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/1/tests/1_bootrr test_uuid 8926127_1.4.2.3.5
157 21:57:19.483538 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 21:57:19.483753 Creating lava-test-runner.conf files
160 21:57:19.483819 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/0 for stage 0
161 21:57:19.483904 - 0_dmesg
162 21:57:19.483981 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926127/lava-overlay-a2z9b4wk/lava-8926127/1 for stage 1
163 21:57:19.484067 - 1_bootrr
164 21:57:19.484160 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 21:57:19.484249 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 21:57:19.490443 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 21:57:19.490552 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 21:57:19.490644 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 21:57:19.490732 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 21:57:19.490819 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 21:57:19.676521 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 21:57:19.676880 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
173 21:57:19.676994 extracting modules file /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926127/extract-overlay-ramdisk-xugqzv76/ramdisk
174 21:57:19.681191 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 21:57:19.681304 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
176 21:57:19.681389 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8926127/compress-overlay-9jlpla3h/overlay-1.4.2.4.tar.gz to ramdisk
177 21:57:19.681468 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8926127/compress-overlay-9jlpla3h/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8926127/extract-overlay-ramdisk-xugqzv76/ramdisk
178 21:57:19.685354 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 21:57:19.685463 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
180 21:57:19.685599 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 21:57:19.685689 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
182 21:57:19.685773 Building ramdisk /var/lib/lava/dispatcher/tmp/8926127/extract-overlay-ramdisk-xugqzv76/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8926127/extract-overlay-ramdisk-xugqzv76/ramdisk
183 21:57:19.750230 >> 48350 blocks
184 21:57:20.512426 rename /var/lib/lava/dispatcher/tmp/8926127/extract-overlay-ramdisk-xugqzv76/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
185 21:57:20.512838 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 21:57:20.512967 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 21:57:20.513070 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 21:57:20.513165 No mkimage arch provided, not using FIT.
189 21:57:20.513258 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 21:57:20.513345 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 21:57:20.513447 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 21:57:20.513584 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 21:57:20.513664 No LXC device requested
194 21:57:20.513750 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 21:57:20.513839 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 21:57:20.513921 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 21:57:20.513997 Checking files for TFTP limit of 4294967296 bytes.
198 21:57:20.514386 end: 1 tftp-deploy (duration 00:00:02) [common]
199 21:57:20.514494 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 21:57:20.514594 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 21:57:20.514721 substitutions:
202 21:57:20.514791 - {DTB}: None
203 21:57:20.514856 - {INITRD}: 8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
204 21:57:20.514918 - {KERNEL}: 8926127/tftp-deploy-cyc6ogma/kernel/bzImage
205 21:57:20.514978 - {LAVA_MAC}: None
206 21:57:20.515037 - {PRESEED_CONFIG}: None
207 21:57:20.515097 - {PRESEED_LOCAL}: None
208 21:57:20.515154 - {RAMDISK}: 8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
209 21:57:20.515212 - {ROOT_PART}: None
210 21:57:20.515269 - {ROOT}: None
211 21:57:20.515325 - {SERVER_IP}: 192.168.201.1
212 21:57:20.515382 - {TEE}: None
213 21:57:20.515438 Parsed boot commands:
214 21:57:20.515494 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 21:57:20.515647 Parsed boot commands: tftpboot 192.168.201.1 8926127/tftp-deploy-cyc6ogma/kernel/bzImage 8926127/tftp-deploy-cyc6ogma/kernel/cmdline 8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
216 21:57:20.515741 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 21:57:20.515839 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 21:57:20.515934 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 21:57:20.516028 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 21:57:20.516100 Not connected, no need to disconnect.
221 21:57:20.516182 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 21:57:20.516266 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 21:57:20.516339 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
224 21:57:20.519122 Setting prompt string to ['lava-test: # ']
225 21:57:20.519406 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 21:57:20.519512 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 21:57:20.519653 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 21:57:20.519746 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 21:57:20.519941 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
230 21:57:20.539379 >> Command sent successfully.
231 21:57:20.541401 Returned 0 in 0 seconds
232 21:57:20.642202 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 21:57:20.642792 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 21:57:20.642897 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 21:57:20.642983 Setting prompt string to 'Starting depthcharge on Voema...'
237 21:57:20.643052 Changing prompt to 'Starting depthcharge on Voema...'
238 21:57:20.643122 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 21:57:20.643389 [Enter `^Ec?' for help]
240 21:57:28.310977
241 21:57:28.311201
242 21:57:28.321455 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 21:57:28.324398 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 21:57:28.330783 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 21:57:28.334297 CPU: AES supported, TXT NOT supported, VT supported
246 21:57:28.341122 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 21:57:28.344448 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 21:57:28.347541
249 21:57:28.351236 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 21:57:28.355201 VBOOT: Loading verstage.
251 21:57:28.357647 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 21:57:28.364792 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 21:57:28.367807 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 21:57:28.378413 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 21:57:28.384982 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 21:57:28.385418
257 21:57:28.385791
258 21:57:28.397963 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 21:57:28.411513 Probing TPM: . done!
260 21:57:28.414853 TPM ready after 0 ms
261 21:57:28.418380 Connected to device vid:did:rid of 1ae0:0028:00
262 21:57:28.429677 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
263 21:57:28.436380 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 21:57:28.440118 Initialized TPM device CR50 revision 0
265 21:57:28.491501 tlcl_send_startup: Startup return code is 0
266 21:57:28.491987 TPM: setup succeeded
267 21:57:28.507269 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 21:57:28.521280 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 21:57:28.534487 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 21:57:28.544280 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 21:57:28.547673 Chrome EC: UHEPI supported
272 21:57:28.550769 Phase 1
273 21:57:28.554602 FMAP: area GBB found @ 1805000 (458752 bytes)
274 21:57:28.561073 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 21:57:28.564430
276 21:57:28.570867 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 21:57:28.577859 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 21:57:28.584781 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 21:57:28.587604 Recovery requested (1009000e)
280 21:57:28.591191 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 21:57:28.602501 tlcl_extend: response is 0
282 21:57:28.608935 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 21:57:28.618914 tlcl_extend: response is 0
284 21:57:28.625413 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 21:57:28.632123 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 21:57:28.639101 BS: verstage times (exec / console): total (unknown) / 142 ms
287 21:57:28.639668
288 21:57:28.640058
289 21:57:28.652676 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 21:57:28.659432 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 21:57:28.662393 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 21:57:28.665539 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 21:57:28.671922 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 21:57:28.675346 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 21:57:28.678998 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
296 21:57:28.682494 TCO_STS: 0000 0000
297 21:57:28.685241 GEN_PMCON: d0015038 00002200
298 21:57:28.688592 GBLRST_CAUSE: 00000000 00000000
299 21:57:28.689165 HPR_CAUSE0: 00000000
300 21:57:28.692163 prev_sleep_state 5
301 21:57:28.695027 Boot Count incremented to 15230
302 21:57:28.701914 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 21:57:28.709031 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 21:57:28.715157 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 21:57:28.721718 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
306 21:57:28.726477 Chrome EC: UHEPI supported
307 21:57:28.734690 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
308 21:57:28.746064 Probing TPM: done!
309 21:57:28.752592 Connected to device vid:did:rid of 1ae0:0028:00
310 21:57:28.764086 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
311 21:57:28.770809 Initialized TPM device CR50 revision 0
312 21:57:28.780989 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 21:57:28.787547 MRC: Hash idx 0x100b comparison successful.
314 21:57:28.791316 MRC cache found, size faa8
315 21:57:28.791819 bootmode is set to: 2
316 21:57:28.794097 SPD index = 0
317 21:57:28.800628 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
318 21:57:28.804570 SPD: module type is LPDDR4X
319 21:57:28.807384 SPD: module part number is MT53E512M64D4NW-046
320 21:57:28.814267 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
321 21:57:28.817401 SPD: device width 16 bits, bus width 16 bits
322 21:57:28.823967 SPD: module size is 1024 MB (per channel)
323 21:57:29.253174 CBMEM:
324 21:57:29.256683 IMD: root @ 0x76fff000 254 entries.
325 21:57:29.259669 IMD: root @ 0x76ffec00 62 entries.
326 21:57:29.263000 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
327 21:57:29.269763 FMAP: area RW_VPD found @ f35000 (8192 bytes)
328 21:57:29.272833 External stage cache:
329 21:57:29.276410 IMD: root @ 0x7b3ff000 254 entries.
330 21:57:29.279499 IMD: root @ 0x7b3fec00 62 entries.
331 21:57:29.294764 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
332 21:57:29.301228 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 21:57:29.307768 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
334 21:57:29.321891 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 21:57:29.328808 cse_lite: Skip switching to RW in the recovery path
336 21:57:29.329245 8 DIMMs found
337 21:57:29.329631 SMM Memory Map
338 21:57:29.332976 SMRAM : 0x7b000000 0x800000
339 21:57:29.335349
340 21:57:29.340138 Subregion 0: 0x7b000000 0x200000
341 21:57:29.340624 Subregion 1: 0x7b200000 0x200000
342 21:57:29.343742 Subregion 2: 0x7b400000 0x400000
343 21:57:29.346770 top_of_ram = 0x77000000
344 21:57:29.350500 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
345 21:57:29.353521
346 21:57:29.357345 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 21:57:29.364248 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
348 21:57:29.367582 MTRR Range: Start=ff000000 End=0 (Size 1000000)
349 21:57:29.373371 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
350 21:57:29.379876 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
351 21:57:29.391926 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
352 21:57:29.395473 Processing 211 relocs. Offset value of 0x74c0b000
353 21:57:29.398761
354 21:57:29.405287 BS: romstage times (exec / console): total (unknown) / 277 ms
355 21:57:29.411045
356 21:57:29.411527
357 21:57:29.420920 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
358 21:57:29.424273 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
359 21:57:29.434397 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
360 21:57:29.441006 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
361 21:57:29.447731 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
362 21:57:29.454569 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
363 21:57:29.500831 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
364 21:57:29.509092 Processing 5008 relocs. Offset value of 0x75d98000
365 21:57:29.510506 BS: postcar times (exec / console): total (unknown) / 59 ms
366 21:57:29.513936
367 21:57:29.514216
368 21:57:29.524231 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
369 21:57:29.524481 Normal boot
370 21:57:29.527572 FW_CONFIG value is 0x804c02
371 21:57:29.530479 PCI: 00:07.0 disabled by fw_config
372 21:57:29.533897 PCI: 00:07.1 disabled by fw_config
373 21:57:29.537663 PCI: 00:0d.2 disabled by fw_config
374 21:57:29.541146 PCI: 00:1c.7 disabled by fw_config
375 21:57:29.547882 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 21:57:29.554642 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 21:57:29.557769 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 21:57:29.562132 GENERIC: 0.0 disabled by fw_config
379 21:57:29.564965 GENERIC: 1.0 disabled by fw_config
380 21:57:29.571538 fw_config match found: DB_USB=USB3_ACTIVE
381 21:57:29.574585 fw_config match found: DB_USB=USB3_ACTIVE
382 21:57:29.577668 fw_config match found: DB_USB=USB3_ACTIVE
383 21:57:29.581240 fw_config match found: DB_USB=USB3_ACTIVE
384 21:57:29.587664 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 21:57:29.594419 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 21:57:29.601010 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 21:57:29.611001 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
388 21:57:29.614051 microcode: sig=0x806c1 pf=0x80 revision=0x86
389 21:57:29.620984 microcode: Update skipped, already up-to-date
390 21:57:29.627739 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
391 21:57:29.654155 Detected 4 core, 8 thread CPU.
392 21:57:29.657969 Setting up SMI for CPU
393 21:57:29.661209 IED base = 0x7b400000
394 21:57:29.661678 IED size = 0x00400000
395 21:57:29.664433 Will perform SMM setup.
396 21:57:29.671370 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
397 21:57:29.677862 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
398 21:57:29.684470 Processing 16 relocs. Offset value of 0x00030000
399 21:57:29.687798 Attempting to start 7 APs
400 21:57:29.690892 Waiting for 10ms after sending INIT.
401 21:57:29.706548 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
402 21:57:29.710020 AP: slot 2 apic_id 3.
403 21:57:29.714178 AP: slot 6 apic_id 2.
404 21:57:29.714609 AP: slot 4 apic_id 7.
405 21:57:29.716815 AP: slot 3 apic_id 5.
406 21:57:29.720197 AP: slot 7 apic_id 4.
407 21:57:29.720789 done.
408 21:57:29.721175 AP: slot 5 apic_id 6.
409 21:57:29.727090 Waiting for 2nd SIPI to complete...done.
410 21:57:29.733596 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
411 21:57:29.739956 Processing 13 relocs. Offset value of 0x00038000
412 21:57:29.740444 Unable to locate Global NVS
413 21:57:29.749817 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
414 21:57:29.752859 Installing permanent SMM handler to 0x7b000000
415 21:57:29.763502 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
416 21:57:29.766259 Processing 794 relocs. Offset value of 0x7b010000
417 21:57:29.773529 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
418 21:57:29.776558
419 21:57:29.780085 Processing 13 relocs. Offset value of 0x7b008000
420 21:57:29.786834 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 21:57:29.792729 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 21:57:29.796482 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 21:57:29.802872 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 21:57:29.809124 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 21:57:29.815714 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 21:57:29.822994 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 21:57:29.823337 Unable to locate Global NVS
428 21:57:29.832968 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 21:57:29.836256 Clearing SMI status registers
430 21:57:29.836547 SMI_STS: PM1
431 21:57:29.839357 PM1_STS: PWRBTN
432 21:57:29.846084 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 21:57:29.849336 In relocation handler: CPU 0
434 21:57:29.852761 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 21:57:29.859200 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 21:57:29.859645 Relocation complete.
437 21:57:29.869543 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 21:57:29.870281 In relocation handler: CPU 1
439 21:57:29.876058 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 21:57:29.876505 Relocation complete.
441 21:57:29.882613 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 21:57:29.885926 In relocation handler: CPU 3
443 21:57:29.893178 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 21:57:29.893873 Relocation complete.
445 21:57:29.899302 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 21:57:29.902694 In relocation handler: CPU 7
447 21:57:29.906060 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 21:57:29.909180
449 21:57:29.913245 Writing SMRR. base = 0x7b000006, mask=0xff800c00
450 21:57:29.915907 Relocation complete.
451 21:57:29.922731 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
452 21:57:29.925637 In relocation handler: CPU 5
453 21:57:29.929309 New SMBASE=0x7affec00 IEDBASE=0x7b400000
454 21:57:29.932907 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 21:57:29.935629 Relocation complete.
456 21:57:29.942303 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
457 21:57:29.945730 In relocation handler: CPU 4
458 21:57:29.949794 New SMBASE=0x7afff000 IEDBASE=0x7b400000
459 21:57:29.952764 Relocation complete.
460 21:57:29.959616 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
461 21:57:29.962706 In relocation handler: CPU 2
462 21:57:29.966644 New SMBASE=0x7afff800 IEDBASE=0x7b400000
463 21:57:29.969586 Relocation complete.
464 21:57:29.976433 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
465 21:57:29.979204 In relocation handler: CPU 6
466 21:57:29.983008 New SMBASE=0x7affe800 IEDBASE=0x7b400000
467 21:57:29.989380 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 21:57:29.990037 Relocation complete.
469 21:57:29.993026 Initializing CPU #0
470 21:57:29.996653 CPU: vendor Intel device 806c1
471 21:57:29.999881 CPU: family 06, model 8c, stepping 01
472 21:57:30.002777 Clearing out pending MCEs
473 21:57:30.006691 Setting up local APIC...
474 21:57:30.007195 apic_id: 0x00 done.
475 21:57:30.010371 Turbo is available but hidden
476 21:57:30.015055 Turbo is available and visible
477 21:57:30.017011 microcode: Update skipped, already up-to-date
478 21:57:30.020687 CPU #0 initialized
479 21:57:30.021331 Initializing CPU #1
480 21:57:30.024124
481 21:57:30.024720 Initializing CPU #2
482 21:57:30.027398 Initializing CPU #6
483 21:57:30.027961 Initializing CPU #4
484 21:57:30.030622 Initializing CPU #5
485 21:57:30.033646 CPU: vendor Intel device 806c1
486 21:57:30.037143 CPU: family 06, model 8c, stepping 01
487 21:57:30.040707 CPU: vendor Intel device 806c1
488 21:57:30.043887 CPU: family 06, model 8c, stepping 01
489 21:57:30.047061 Clearing out pending MCEs
490 21:57:30.050259 Clearing out pending MCEs
491 21:57:30.050662 Setting up local APIC...
492 21:57:30.054390 CPU: vendor Intel device 806c1
493 21:57:30.060187 CPU: family 06, model 8c, stepping 01
494 21:57:30.060372 CPU: vendor Intel device 806c1
495 21:57:30.063589
496 21:57:30.067300 CPU: family 06, model 8c, stepping 01
497 21:57:30.067455 Clearing out pending MCEs
498 21:57:30.070472 Clearing out pending MCEs
499 21:57:30.073577 Setting up local APIC...
500 21:57:30.077064 Initializing CPU #7
501 21:57:30.080001 CPU: vendor Intel device 806c1
502 21:57:30.083670 CPU: family 06, model 8c, stepping 01
503 21:57:30.083804 Initializing CPU #3
504 21:57:30.086678 CPU: vendor Intel device 806c1
505 21:57:30.090108 CPU: family 06, model 8c, stepping 01
506 21:57:30.093583 CPU: vendor Intel device 806c1
507 21:57:30.097098 CPU: family 06, model 8c, stepping 01
508 21:57:30.100263
509 21:57:30.100694 Clearing out pending MCEs
510 21:57:30.104073 Clearing out pending MCEs
511 21:57:30.107055 Setting up local APIC...
512 21:57:30.107585 apic_id: 0x03 done.
513 21:57:30.110342 Setting up local APIC...
514 21:57:30.114560 Setting up local APIC...
515 21:57:30.117842 apic_id: 0x02 done.
516 21:57:30.121048 microcode: Update skipped, already up-to-date
517 21:57:30.123747 microcode: Update skipped, already up-to-date
518 21:57:30.126976 CPU #2 initialized
519 21:57:30.130856 CPU #6 initialized
520 21:57:30.131488 apic_id: 0x04 done.
521 21:57:30.133975 apic_id: 0x05 done.
522 21:57:30.136960 microcode: Update skipped, already up-to-date
523 21:57:30.143684 microcode: Update skipped, already up-to-date
524 21:57:30.144160 CPU #7 initialized
525 21:57:30.147212 CPU #3 initialized
526 21:57:30.149928 Clearing out pending MCEs
527 21:57:30.150407 Setting up local APIC...
528 21:57:30.153460 Setting up local APIC...
529 21:57:30.156899 apic_id: 0x06 done.
530 21:57:30.157374 apic_id: 0x07 done.
531 21:57:30.163833 microcode: Update skipped, already up-to-date
532 21:57:30.166747 microcode: Update skipped, already up-to-date
533 21:57:30.170639 CPU #5 initialized
534 21:57:30.171118 CPU #4 initialized
535 21:57:30.173538 apic_id: 0x01 done.
536 21:57:30.177284 microcode: Update skipped, already up-to-date
537 21:57:30.180629 CPU #1 initialized
538 21:57:30.183818 bsp_do_flight_plan done after 455 msecs.
539 21:57:30.186863 CPU: frequency set to 4000 MHz
540 21:57:30.190510 Enabling SMIs.
541 21:57:30.196897 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
542 21:57:30.211708 SATAXPCIE1 indicates PCIe NVMe is present
543 21:57:30.214693 Probing TPM: done!
544 21:57:30.218247 Connected to device vid:did:rid of 1ae0:0028:00
545 21:57:30.228791 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
546 21:57:30.232840 Initialized TPM device CR50 revision 0
547 21:57:30.235509 Enabling S0i3.4
548 21:57:30.242034 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
549 21:57:30.245384 Found a VBT of 8704 bytes after decompression
550 21:57:30.252158 cse_lite: CSE RO boot. HybridStorageMode disabled
551 21:57:30.258580 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
552 21:57:30.334667 FSPS returned 0
553 21:57:30.338575 Executing Phase 1 of FspMultiPhaseSiInit
554 21:57:30.347861 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
555 21:57:30.351485 port C0 DISC req: usage 1 usb3 1 usb2 5
556 21:57:30.354076 Raw Buffer output 0 00000511
557 21:57:30.357679 Raw Buffer output 1 00000000
558 21:57:30.361470 pmc_send_ipc_cmd succeeded
559 21:57:30.365404 port C1 DISC req: usage 1 usb3 2 usb2 3
560 21:57:30.368223 Raw Buffer output 0 00000321
561 21:57:30.371693 Raw Buffer output 1 00000000
562 21:57:30.375919 pmc_send_ipc_cmd succeeded
563 21:57:30.380871 Detected 4 core, 8 thread CPU.
564 21:57:30.384219 Detected 4 core, 8 thread CPU.
565 21:57:30.617963 Display FSP Version Info HOB
566 21:57:30.620986 Reference Code - CPU = a.0.4c.31
567 21:57:30.624235 uCode Version = 0.0.0.86
568 21:57:30.627704 TXT ACM version = ff.ff.ff.ffff
569 21:57:30.630892 Reference Code - ME = a.0.4c.31
570 21:57:30.634848 MEBx version = 0.0.0.0
571 21:57:30.637686 ME Firmware Version = Consumer SKU
572 21:57:30.640961 Reference Code - PCH = a.0.4c.31
573 21:57:30.644216 PCH-CRID Status = Disabled
574 21:57:30.647752 PCH-CRID Original Value = ff.ff.ff.ffff
575 21:57:30.651278 PCH-CRID New Value = ff.ff.ff.ffff
576 21:57:30.654532 OPROM - RST - RAID = ff.ff.ff.ffff
577 21:57:30.657704 PCH Hsio Version = 4.0.0.0
578 21:57:30.661448 Reference Code - SA - System Agent = a.0.4c.31
579 21:57:30.664971 Reference Code - MRC = 2.0.0.1
580 21:57:30.667526 SA - PCIe Version = a.0.4c.31
581 21:57:30.671020 SA-CRID Status = Disabled
582 21:57:30.674549 SA-CRID Original Value = 0.0.0.1
583 21:57:30.677828 SA-CRID New Value = 0.0.0.1
584 21:57:30.681163 OPROM - VBIOS = ff.ff.ff.ffff
585 21:57:30.685277 IO Manageability Engine FW Version = 11.1.4.0
586 21:57:30.688073 PHY Build Version = 0.0.0.e0
587 21:57:30.691159 Thunderbolt(TM) FW Version = 0.0.0.0
588 21:57:30.697708 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
589 21:57:30.701598 ITSS IRQ Polarities Before:
590 21:57:30.702183 IPC0: 0xffffffff
591 21:57:30.704138 IPC1: 0xffffffff
592 21:57:30.704629 IPC2: 0xffffffff
593 21:57:30.707993 IPC3: 0xffffffff
594 21:57:30.711724 ITSS IRQ Polarities After:
595 21:57:30.712250 IPC0: 0xffffffff
596 21:57:30.714546 IPC1: 0xffffffff
597 21:57:30.715056 IPC2: 0xffffffff
598 21:57:30.717583 IPC3: 0xffffffff
599 21:57:30.721827 Found PCIe Root Port #9 at PCI: 00:1d.0.
600 21:57:30.734774 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
601 21:57:30.744010 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
602 21:57:30.757435 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
603 21:57:30.764474 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
604 21:57:30.764960 Enumerating buses...
605 21:57:30.771631 Show all devs... Before device enumeration.
606 21:57:30.772157 Root Device: enabled 1
607 21:57:30.774153 DOMAIN: 0000: enabled 1
608 21:57:30.777562 CPU_CLUSTER: 0: enabled 1
609 21:57:30.781312 PCI: 00:00.0: enabled 1
610 21:57:30.781793 PCI: 00:02.0: enabled 1
611 21:57:30.783994 PCI: 00:04.0: enabled 1
612 21:57:30.787829 PCI: 00:05.0: enabled 1
613 21:57:30.791714 PCI: 00:06.0: enabled 0
614 21:57:30.792247 PCI: 00:07.0: enabled 0
615 21:57:30.794143 PCI: 00:07.1: enabled 0
616 21:57:30.797845 PCI: 00:07.2: enabled 0
617 21:57:30.800735 PCI: 00:07.3: enabled 0
618 21:57:30.801140 PCI: 00:08.0: enabled 1
619 21:57:30.804147 PCI: 00:09.0: enabled 0
620 21:57:30.807567 PCI: 00:0a.0: enabled 0
621 21:57:30.808009 PCI: 00:0d.0: enabled 1
622 21:57:30.810859 PCI: 00:0d.1: enabled 0
623 21:57:30.814614 PCI: 00:0d.2: enabled 0
624 21:57:30.817790 PCI: 00:0d.3: enabled 0
625 21:57:30.818398 PCI: 00:0e.0: enabled 0
626 21:57:30.820661 PCI: 00:10.2: enabled 1
627 21:57:30.824313 PCI: 00:10.6: enabled 0
628 21:57:30.827672 PCI: 00:10.7: enabled 0
629 21:57:30.828253 PCI: 00:12.0: enabled 0
630 21:57:30.830590 PCI: 00:12.6: enabled 0
631 21:57:30.834195 PCI: 00:13.0: enabled 0
632 21:57:30.837886 PCI: 00:14.0: enabled 1
633 21:57:30.838324 PCI: 00:14.1: enabled 0
634 21:57:30.840873 PCI: 00:14.2: enabled 1
635 21:57:30.844682 PCI: 00:14.3: enabled 1
636 21:57:30.845130 PCI: 00:15.0: enabled 1
637 21:57:30.847545 PCI: 00:15.1: enabled 1
638 21:57:30.850909 PCI: 00:15.2: enabled 1
639 21:57:30.854155 PCI: 00:15.3: enabled 1
640 21:57:30.854686 PCI: 00:16.0: enabled 1
641 21:57:30.857445 PCI: 00:16.1: enabled 0
642 21:57:30.861105 PCI: 00:16.2: enabled 0
643 21:57:30.864031 PCI: 00:16.3: enabled 0
644 21:57:30.864527 PCI: 00:16.4: enabled 0
645 21:57:30.867207 PCI: 00:16.5: enabled 0
646 21:57:30.870788 PCI: 00:17.0: enabled 1
647 21:57:30.874080 PCI: 00:19.0: enabled 0
648 21:57:30.874515 PCI: 00:19.1: enabled 1
649 21:57:30.877269 PCI: 00:19.2: enabled 0
650 21:57:30.880739 PCI: 00:1c.0: enabled 1
651 21:57:30.881179 PCI: 00:1c.1: enabled 0
652 21:57:30.883903
653 21:57:30.884345 PCI: 00:1c.2: enabled 0
654 21:57:30.887749 PCI: 00:1c.3: enabled 0
655 21:57:30.891048 PCI: 00:1c.4: enabled 0
656 21:57:30.891530 PCI: 00:1c.5: enabled 0
657 21:57:30.893957 PCI: 00:1c.6: enabled 1
658 21:57:30.897608 PCI: 00:1c.7: enabled 0
659 21:57:30.900470 PCI: 00:1d.0: enabled 1
660 21:57:30.900954 PCI: 00:1d.1: enabled 0
661 21:57:30.904521 PCI: 00:1d.2: enabled 1
662 21:57:30.907497 PCI: 00:1d.3: enabled 0
663 21:57:30.910722 PCI: 00:1e.0: enabled 1
664 21:57:30.911292 PCI: 00:1e.1: enabled 0
665 21:57:30.914159 PCI: 00:1e.2: enabled 1
666 21:57:30.918154 PCI: 00:1e.3: enabled 1
667 21:57:30.918697 PCI: 00:1f.0: enabled 1
668 21:57:30.920584 PCI: 00:1f.1: enabled 0
669 21:57:30.923960 PCI: 00:1f.2: enabled 1
670 21:57:30.927636 PCI: 00:1f.3: enabled 1
671 21:57:30.928177 PCI: 00:1f.4: enabled 0
672 21:57:30.931094 PCI: 00:1f.5: enabled 1
673 21:57:30.934361 PCI: 00:1f.6: enabled 0
674 21:57:30.937402 PCI: 00:1f.7: enabled 0
675 21:57:30.937861 APIC: 00: enabled 1
676 21:57:30.940934 GENERIC: 0.0: enabled 1
677 21:57:30.944308 GENERIC: 0.0: enabled 1
678 21:57:30.944745 GENERIC: 1.0: enabled 1
679 21:57:30.947609 GENERIC: 0.0: enabled 1
680 21:57:30.950681 GENERIC: 1.0: enabled 1
681 21:57:30.954776 USB0 port 0: enabled 1
682 21:57:30.955216 GENERIC: 0.0: enabled 1
683 21:57:30.957569 USB0 port 0: enabled 1
684 21:57:30.960764 GENERIC: 0.0: enabled 1
685 21:57:30.961203 I2C: 00:1a: enabled 1
686 21:57:30.963980 I2C: 00:31: enabled 1
687 21:57:30.967667 I2C: 00:32: enabled 1
688 21:57:30.968106 I2C: 00:10: enabled 1
689 21:57:30.970756 I2C: 00:15: enabled 1
690 21:57:30.974153 GENERIC: 0.0: enabled 0
691 21:57:30.977393 GENERIC: 1.0: enabled 0
692 21:57:30.977898 GENERIC: 0.0: enabled 1
693 21:57:30.980708 SPI: 00: enabled 1
694 21:57:30.983854 SPI: 00: enabled 1
695 21:57:30.984290 PNP: 0c09.0: enabled 1
696 21:57:30.987186 GENERIC: 0.0: enabled 1
697 21:57:30.990558 USB3 port 0: enabled 1
698 21:57:30.991000 USB3 port 1: enabled 1
699 21:57:30.993720 USB3 port 2: enabled 0
700 21:57:30.997606 USB3 port 3: enabled 0
701 21:57:30.998053 USB2 port 0: enabled 0
702 21:57:31.000752
703 21:57:31.001384 USB2 port 1: enabled 1
704 21:57:31.003734 USB2 port 2: enabled 1
705 21:57:31.007329 USB2 port 3: enabled 0
706 21:57:31.007769 USB2 port 4: enabled 1
707 21:57:31.011069 USB2 port 5: enabled 0
708 21:57:31.013734 USB2 port 6: enabled 0
709 21:57:31.014174 USB2 port 7: enabled 0
710 21:57:31.017710 USB2 port 8: enabled 0
711 21:57:31.020464 USB2 port 9: enabled 0
712 21:57:31.023957 USB3 port 0: enabled 0
713 21:57:31.024396 USB3 port 1: enabled 1
714 21:57:31.027417 USB3 port 2: enabled 0
715 21:57:31.030777 USB3 port 3: enabled 0
716 21:57:31.031402 GENERIC: 0.0: enabled 1
717 21:57:31.033974 GENERIC: 1.0: enabled 1
718 21:57:31.037065 APIC: 01: enabled 1
719 21:57:31.037526 APIC: 03: enabled 1
720 21:57:31.040333 APIC: 05: enabled 1
721 21:57:31.043876 APIC: 07: enabled 1
722 21:57:31.044314 APIC: 06: enabled 1
723 21:57:31.047218 APIC: 02: enabled 1
724 21:57:31.047660 APIC: 04: enabled 1
725 21:57:31.050274 Compare with tree...
726 21:57:31.054044 Root Device: enabled 1
727 21:57:31.057031 DOMAIN: 0000: enabled 1
728 21:57:31.057471 PCI: 00:00.0: enabled 1
729 21:57:31.060462 PCI: 00:02.0: enabled 1
730 21:57:31.063820 PCI: 00:04.0: enabled 1
731 21:57:31.066938 GENERIC: 0.0: enabled 1
732 21:57:31.070564 PCI: 00:05.0: enabled 1
733 21:57:31.071049 PCI: 00:06.0: enabled 0
734 21:57:31.073809 PCI: 00:07.0: enabled 0
735 21:57:31.076927 GENERIC: 0.0: enabled 1
736 21:57:31.080918 PCI: 00:07.1: enabled 0
737 21:57:31.083454 GENERIC: 1.0: enabled 1
738 21:57:31.084013 PCI: 00:07.2: enabled 0
739 21:57:31.087752 GENERIC: 0.0: enabled 1
740 21:57:31.090453 PCI: 00:07.3: enabled 0
741 21:57:31.093688 GENERIC: 1.0: enabled 1
742 21:57:31.097170 PCI: 00:08.0: enabled 1
743 21:57:31.097663 PCI: 00:09.0: enabled 0
744 21:57:31.100321 PCI: 00:0a.0: enabled 0
745 21:57:31.103993 PCI: 00:0d.0: enabled 1
746 21:57:31.106982 USB0 port 0: enabled 1
747 21:57:31.110211 USB3 port 0: enabled 1
748 21:57:31.110653 USB3 port 1: enabled 1
749 21:57:31.114085 USB3 port 2: enabled 0
750 21:57:31.117358 USB3 port 3: enabled 0
751 21:57:31.120633 PCI: 00:0d.1: enabled 0
752 21:57:31.123923 PCI: 00:0d.2: enabled 0
753 21:57:31.124548 GENERIC: 0.0: enabled 1
754 21:57:31.127091 PCI: 00:0d.3: enabled 0
755 21:57:31.130693 PCI: 00:0e.0: enabled 0
756 21:57:31.133979 PCI: 00:10.2: enabled 1
757 21:57:31.137375 PCI: 00:10.6: enabled 0
758 21:57:31.137847 PCI: 00:10.7: enabled 0
759 21:57:31.140151 PCI: 00:12.0: enabled 0
760 21:57:31.143416 PCI: 00:12.6: enabled 0
761 21:57:31.147139 PCI: 00:13.0: enabled 0
762 21:57:31.150147 PCI: 00:14.0: enabled 1
763 21:57:31.150587 USB0 port 0: enabled 1
764 21:57:31.153574 USB2 port 0: enabled 0
765 21:57:31.156973 USB2 port 1: enabled 1
766 21:57:31.160612 USB2 port 2: enabled 1
767 21:57:31.163715 USB2 port 3: enabled 0
768 21:57:31.164155 USB2 port 4: enabled 1
769 21:57:31.167075
770 21:57:31.167561 USB2 port 5: enabled 0
771 21:57:31.169973 USB2 port 6: enabled 0
772 21:57:31.174317 USB2 port 7: enabled 0
773 21:57:31.176673 USB2 port 8: enabled 0
774 21:57:31.179993 USB2 port 9: enabled 0
775 21:57:31.180435 USB3 port 0: enabled 0
776 21:57:31.183518 USB3 port 1: enabled 1
777 21:57:31.187016 USB3 port 2: enabled 0
778 21:57:31.190361 USB3 port 3: enabled 0
779 21:57:31.194048 PCI: 00:14.1: enabled 0
780 21:57:31.197022 PCI: 00:14.2: enabled 1
781 21:57:31.197648 PCI: 00:14.3: enabled 1
782 21:57:31.199918 GENERIC: 0.0: enabled 1
783 21:57:31.203520 PCI: 00:15.0: enabled 1
784 21:57:31.206902 I2C: 00:1a: enabled 1
785 21:57:31.207552 I2C: 00:31: enabled 1
786 21:57:31.210088 I2C: 00:32: enabled 1
787 21:57:31.213929 PCI: 00:15.1: enabled 1
788 21:57:31.216886 I2C: 00:10: enabled 1
789 21:57:31.220061 PCI: 00:15.2: enabled 1
790 21:57:31.220503 PCI: 00:15.3: enabled 1
791 21:57:31.223764 PCI: 00:16.0: enabled 1
792 21:57:31.227000 PCI: 00:16.1: enabled 0
793 21:57:31.230253 PCI: 00:16.2: enabled 0
794 21:57:31.233094 PCI: 00:16.3: enabled 0
795 21:57:31.233559 PCI: 00:16.4: enabled 0
796 21:57:31.236714 PCI: 00:16.5: enabled 0
797 21:57:31.240214 PCI: 00:17.0: enabled 1
798 21:57:31.243334 PCI: 00:19.0: enabled 0
799 21:57:31.243820 PCI: 00:19.1: enabled 1
800 21:57:31.246733
801 21:57:31.247309 I2C: 00:15: enabled 1
802 21:57:31.250384 PCI: 00:19.2: enabled 0
803 21:57:31.254229 PCI: 00:1d.0: enabled 1
804 21:57:31.257104 GENERIC: 0.0: enabled 1
805 21:57:31.257612 PCI: 00:1e.0: enabled 1
806 21:57:31.260839 PCI: 00:1e.1: enabled 0
807 21:57:31.263889 PCI: 00:1e.2: enabled 1
808 21:57:31.267110 SPI: 00: enabled 1
809 21:57:31.267609 PCI: 00:1e.3: enabled 1
810 21:57:31.270396 SPI: 00: enabled 1
811 21:57:31.273769 PCI: 00:1f.0: enabled 1
812 21:57:31.277089 PNP: 0c09.0: enabled 1
813 21:57:31.277604 PCI: 00:1f.1: enabled 0
814 21:57:31.280640 PCI: 00:1f.2: enabled 1
815 21:57:31.332398 GENERIC: 0.0: enabled 1
816 21:57:31.333006 GENERIC: 0.0: enabled 1
817 21:57:31.333443 GENERIC: 1.0: enabled 1
818 21:57:31.333896 PCI: 00:1f.3: enabled 1
819 21:57:31.334256 PCI: 00:1f.4: enabled 0
820 21:57:31.334594 PCI: 00:1f.5: enabled 1
821 21:57:31.334919 PCI: 00:1f.6: enabled 0
822 21:57:31.335672 PCI: 00:1f.7: enabled 0
823 21:57:31.336051 CPU_CLUSTER: 0: enabled 1
824 21:57:31.336387 APIC: 00: enabled 1
825 21:57:31.336713 APIC: 01: enabled 1
826 21:57:31.337035 APIC: 03: enabled 1
827 21:57:31.337351 APIC: 05: enabled 1
828 21:57:31.337700 APIC: 07: enabled 1
829 21:57:31.338017 APIC: 06: enabled 1
830 21:57:31.338329 APIC: 02: enabled 1
831 21:57:31.338644 APIC: 04: enabled 1
832 21:57:31.338953 Root Device scanning...
833 21:57:31.339264 scan_static_bus for Root Device
834 21:57:31.339579 DOMAIN: 0000 enabled
835 21:57:31.351881 CPU_CLUSTER: 0 enabled
836 21:57:31.352467 DOMAIN: 0000 scanning...
837 21:57:31.353217 PCI: pci_scan_bus for bus 00
838 21:57:31.353786 PCI: 00:00.0 [8086/0000] ops
839 21:57:31.354164 PCI: 00:00.0 [8086/9a12] enabled
840 21:57:31.354508 PCI: 00:02.0 [8086/0000] bus ops
841 21:57:31.355653 PCI: 00:02.0 [8086/9a40] enabled
842 21:57:31.358440 PCI: 00:04.0 [8086/0000] bus ops
843 21:57:31.361826 PCI: 00:04.0 [8086/9a03] enabled
844 21:57:31.365296 PCI: 00:05.0 [8086/9a19] enabled
845 21:57:31.368811 PCI: 00:07.0 [0000/0000] hidden
846 21:57:31.371856 PCI: 00:08.0 [8086/9a11] enabled
847 21:57:31.375682 PCI: 00:0a.0 [8086/9a0d] disabled
848 21:57:31.378775 PCI: 00:0d.0 [8086/0000] bus ops
849 21:57:31.381818 PCI: 00:0d.0 [8086/9a13] enabled
850 21:57:31.385558 PCI: 00:14.0 [8086/0000] bus ops
851 21:57:31.388573 PCI: 00:14.0 [8086/a0ed] enabled
852 21:57:31.392075 PCI: 00:14.2 [8086/a0ef] enabled
853 21:57:31.395488 PCI: 00:14.3 [8086/0000] bus ops
854 21:57:31.399094 PCI: 00:14.3 [8086/a0f0] enabled
855 21:57:31.402200 PCI: 00:15.0 [8086/0000] bus ops
856 21:57:31.405380 PCI: 00:15.0 [8086/a0e8] enabled
857 21:57:31.408605 PCI: 00:15.1 [8086/0000] bus ops
858 21:57:31.411745 PCI: 00:15.1 [8086/a0e9] enabled
859 21:57:31.415365 PCI: 00:15.2 [8086/0000] bus ops
860 21:57:31.418671 PCI: 00:15.2 [8086/a0ea] enabled
861 21:57:31.422016 PCI: 00:15.3 [8086/0000] bus ops
862 21:57:31.425301 PCI: 00:15.3 [8086/a0eb] enabled
863 21:57:31.428521 PCI: 00:16.0 [8086/0000] ops
864 21:57:31.431801 PCI: 00:16.0 [8086/a0e0] enabled
865 21:57:31.435536 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 21:57:31.438672 PCI: 00:19.0 [8086/0000] bus ops
867 21:57:31.442009 PCI: 00:19.0 [8086/a0c5] disabled
868 21:57:31.445055 PCI: 00:19.1 [8086/0000] bus ops
869 21:57:31.448340 PCI: 00:19.1 [8086/a0c6] enabled
870 21:57:31.451824 PCI: 00:1d.0 [8086/0000] bus ops
871 21:57:31.454945 PCI: 00:1d.0 [8086/a0b0] enabled
872 21:57:31.458603 PCI: 00:1e.0 [8086/0000] ops
873 21:57:31.461606 PCI: 00:1e.0 [8086/a0a8] enabled
874 21:57:31.465035 PCI: 00:1e.2 [8086/0000] bus ops
875 21:57:31.468300 PCI: 00:1e.2 [8086/a0aa] enabled
876 21:57:31.471973 PCI: 00:1e.3 [8086/0000] bus ops
877 21:57:31.475147 PCI: 00:1e.3 [8086/a0ab] enabled
878 21:57:31.478605 PCI: 00:1f.0 [8086/0000] bus ops
879 21:57:31.481391 PCI: 00:1f.0 [8086/a087] enabled
880 21:57:31.484834 RTC Init
881 21:57:31.488751 Set power on after power failure.
882 21:57:31.489236 Disabling Deep S3
883 21:57:31.492134 Disabling Deep S3
884 21:57:31.492653 Disabling Deep S4
885 21:57:31.494798 Disabling Deep S4
886 21:57:31.498093 Disabling Deep S5
887 21:57:31.498573 Disabling Deep S5
888 21:57:31.501357 PCI: 00:1f.2 [0000/0000] hidden
889 21:57:31.505628 PCI: 00:1f.3 [8086/0000] bus ops
890 21:57:31.508081 PCI: 00:1f.3 [8086/a0c8] enabled
891 21:57:31.511426 PCI: 00:1f.5 [8086/0000] bus ops
892 21:57:31.515002 PCI: 00:1f.5 [8086/a0a4] enabled
893 21:57:31.517783 PCI: Leftover static devices:
894 21:57:31.518211 PCI: 00:10.2
895 21:57:31.521575 PCI: 00:10.6
896 21:57:31.522122 PCI: 00:10.7
897 21:57:31.524688 PCI: 00:06.0
898 21:57:31.525162 PCI: 00:07.1
899 21:57:31.528285 PCI: 00:07.2
900 21:57:31.528858 PCI: 00:07.3
901 21:57:31.529236 PCI: 00:09.0
902 21:57:31.531370 PCI: 00:0d.1
903 21:57:31.531951 PCI: 00:0d.2
904 21:57:31.534475 PCI: 00:0d.3
905 21:57:31.535066 PCI: 00:0e.0
906 21:57:31.535449 PCI: 00:12.0
907 21:57:31.537839 PCI: 00:12.6
908 21:57:31.538319 PCI: 00:13.0
909 21:57:31.541297 PCI: 00:14.1
910 21:57:31.541805 PCI: 00:16.1
911 21:57:31.542185 PCI: 00:16.2
912 21:57:31.544669 PCI: 00:16.3
913 21:57:31.545157 PCI: 00:16.4
914 21:57:31.547982 PCI: 00:16.5
915 21:57:31.548559 PCI: 00:17.0
916 21:57:31.551464 PCI: 00:19.2
917 21:57:31.552054 PCI: 00:1e.1
918 21:57:31.552437 PCI: 00:1f.1
919 21:57:31.554390 PCI: 00:1f.4
920 21:57:31.554883 PCI: 00:1f.6
921 21:57:31.557923 PCI: 00:1f.7
922 21:57:31.561532 PCI: Check your devicetree.cb.
923 21:57:31.562275 PCI: 00:02.0 scanning...
924 21:57:31.564211 scan_generic_bus for PCI: 00:02.0
925 21:57:31.571056 scan_generic_bus for PCI: 00:02.0 done
926 21:57:31.574332 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
927 21:57:31.577827 PCI: 00:04.0 scanning...
928 21:57:31.581306 scan_generic_bus for PCI: 00:04.0
929 21:57:31.581838 GENERIC: 0.0 enabled
930 21:57:31.584158
931 21:57:31.587682 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
932 21:57:31.593984 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
933 21:57:31.597388 PCI: 00:0d.0 scanning...
934 21:57:31.600878 scan_static_bus for PCI: 00:0d.0
935 21:57:31.601558 USB0 port 0 enabled
936 21:57:31.604212 USB0 port 0 scanning...
937 21:57:31.607805 scan_static_bus for USB0 port 0
938 21:57:31.610998 USB3 port 0 enabled
939 21:57:31.611508 USB3 port 1 enabled
940 21:57:31.614562 USB3 port 2 disabled
941 21:57:31.617833 USB3 port 3 disabled
942 21:57:31.618421 USB3 port 0 scanning...
943 21:57:31.621098 scan_static_bus for USB3 port 0
944 21:57:31.624798 scan_static_bus for USB3 port 0 done
945 21:57:31.630905 scan_bus: bus USB3 port 0 finished in 6 msecs
946 21:57:31.634275 USB3 port 1 scanning...
947 21:57:31.637673 scan_static_bus for USB3 port 1
948 21:57:31.640805 scan_static_bus for USB3 port 1 done
949 21:57:31.644143 scan_bus: bus USB3 port 1 finished in 6 msecs
950 21:57:31.647155 scan_static_bus for USB0 port 0 done
951 21:57:31.654113 scan_bus: bus USB0 port 0 finished in 43 msecs
952 21:57:31.657718 scan_static_bus for PCI: 00:0d.0 done
953 21:57:31.660531 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
954 21:57:31.663779 PCI: 00:14.0 scanning...
955 21:57:31.667315 scan_static_bus for PCI: 00:14.0
956 21:57:31.671144 USB0 port 0 enabled
957 21:57:31.671632 USB0 port 0 scanning...
958 21:57:31.673906 scan_static_bus for USB0 port 0
959 21:57:31.677127 USB2 port 0 disabled
960 21:57:31.680716 USB2 port 1 enabled
961 21:57:31.681204 USB2 port 2 enabled
962 21:57:31.683984 USB2 port 3 disabled
963 21:57:31.687120 USB2 port 4 enabled
964 21:57:31.687618 USB2 port 5 disabled
965 21:57:31.690488 USB2 port 6 disabled
966 21:57:31.693756 USB2 port 7 disabled
967 21:57:31.694242 USB2 port 8 disabled
968 21:57:31.697226 USB2 port 9 disabled
969 21:57:31.697819 USB3 port 0 disabled
970 21:57:31.700500 USB3 port 1 enabled
971 21:57:31.703859 USB3 port 2 disabled
972 21:57:31.704398 USB3 port 3 disabled
973 21:57:31.707538 USB2 port 1 scanning...
974 21:57:31.710906 scan_static_bus for USB2 port 1
975 21:57:31.713747 scan_static_bus for USB2 port 1 done
976 21:57:31.720386 scan_bus: bus USB2 port 1 finished in 6 msecs
977 21:57:31.720869 USB2 port 2 scanning...
978 21:57:31.724376 scan_static_bus for USB2 port 2
979 21:57:31.730600 scan_static_bus for USB2 port 2 done
980 21:57:31.734045 scan_bus: bus USB2 port 2 finished in 6 msecs
981 21:57:31.737173 USB2 port 4 scanning...
982 21:57:31.740436 scan_static_bus for USB2 port 4
983 21:57:31.743937 scan_static_bus for USB2 port 4 done
984 21:57:31.747121 scan_bus: bus USB2 port 4 finished in 6 msecs
985 21:57:31.750845 USB3 port 1 scanning...
986 21:57:31.754121 scan_static_bus for USB3 port 1
987 21:57:31.757059 scan_static_bus for USB3 port 1 done
988 21:57:31.760488 scan_bus: bus USB3 port 1 finished in 6 msecs
989 21:57:31.767314 scan_static_bus for USB0 port 0 done
990 21:57:31.770372 scan_bus: bus USB0 port 0 finished in 93 msecs
991 21:57:31.773742 scan_static_bus for PCI: 00:14.0 done
992 21:57:31.780455 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
993 21:57:31.780939 PCI: 00:14.3 scanning...
994 21:57:31.783493 scan_static_bus for PCI: 00:14.3
995 21:57:31.787155 GENERIC: 0.0 enabled
996 21:57:31.790235 scan_static_bus for PCI: 00:14.3 done
997 21:57:31.797036 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
998 21:57:31.797751 PCI: 00:15.0 scanning...
999 21:57:31.800320 scan_static_bus for PCI: 00:15.0
1000 21:57:31.804043 I2C: 00:1a enabled
1001 21:57:31.807120 I2C: 00:31 enabled
1002 21:57:31.807627 I2C: 00:32 enabled
1003 21:57:31.810588 scan_static_bus for PCI: 00:15.0 done
1004 21:57:31.816966 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1005 21:57:31.820106 PCI: 00:15.1 scanning...
1006 21:57:31.823734 scan_static_bus for PCI: 00:15.1
1007 21:57:31.824219 I2C: 00:10 enabled
1008 21:57:31.827636 scan_static_bus for PCI: 00:15.1 done
1009 21:57:31.834082 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1010 21:57:31.836960 PCI: 00:15.2 scanning...
1011 21:57:31.841141 scan_static_bus for PCI: 00:15.2
1012 21:57:31.844489 scan_static_bus for PCI: 00:15.2 done
1013 21:57:31.847496 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1014 21:57:31.850519 PCI: 00:15.3 scanning...
1015 21:57:31.853894 scan_static_bus for PCI: 00:15.3
1016 21:57:31.857309 scan_static_bus for PCI: 00:15.3 done
1017 21:57:31.861161 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1018 21:57:31.864988 PCI: 00:19.1 scanning...
1019 21:57:31.867473 scan_static_bus for PCI: 00:19.1
1020 21:57:31.870603 I2C: 00:15 enabled
1021 21:57:31.874071 scan_static_bus for PCI: 00:19.1 done
1022 21:57:31.877085 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1023 21:57:31.881402 PCI: 00:1d.0 scanning...
1024 21:57:31.883722 do_pci_scan_bridge for PCI: 00:1d.0
1025 21:57:31.887296 PCI: pci_scan_bus for bus 01
1026 21:57:31.890557 PCI: 01:00.0 [1c5c/174a] enabled
1027 21:57:31.893536 GENERIC: 0.0 enabled
1028 21:57:31.896927 Enabling Common Clock Configuration
1029 21:57:31.900617 L1 Sub-State supported from root port 29
1030 21:57:31.903860 L1 Sub-State Support = 0xf
1031 21:57:31.907195 CommonModeRestoreTime = 0x28
1032 21:57:31.910534 Power On Value = 0x16, Power On Scale = 0x0
1033 21:57:31.913677 ASPM: Enabled L1
1034 21:57:31.917034 PCIe: Max_Payload_Size adjusted to 128
1035 21:57:31.923499 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1036 21:57:31.924009 PCI: 00:1e.2 scanning...
1037 21:57:31.927379 scan_generic_bus for PCI: 00:1e.2
1038 21:57:31.930613 SPI: 00 enabled
1039 21:57:31.936952 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1040 21:57:31.940563 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1041 21:57:31.943660 PCI: 00:1e.3 scanning...
1042 21:57:31.946761 scan_generic_bus for PCI: 00:1e.3
1043 21:57:31.950017 SPI: 00 enabled
1044 21:57:31.954301 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1045 21:57:31.959802 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1046 21:57:31.963322 PCI: 00:1f.0 scanning...
1047 21:57:31.967192 scan_static_bus for PCI: 00:1f.0
1048 21:57:31.967680 PNP: 0c09.0 enabled
1049 21:57:31.970019 PNP: 0c09.0 scanning...
1050 21:57:31.973173 scan_static_bus for PNP: 0c09.0
1051 21:57:31.976914 scan_static_bus for PNP: 0c09.0 done
1052 21:57:31.983244 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1053 21:57:31.986476 scan_static_bus for PCI: 00:1f.0 done
1054 21:57:31.990151 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1055 21:57:31.992934 PCI: 00:1f.2 scanning...
1056 21:57:31.996348 scan_static_bus for PCI: 00:1f.2
1057 21:57:31.999851 GENERIC: 0.0 enabled
1058 21:57:32.000368 GENERIC: 0.0 scanning...
1059 21:57:32.003098
1060 21:57:32.006295 scan_static_bus for GENERIC: 0.0
1061 21:57:32.006859 GENERIC: 0.0 enabled
1062 21:57:32.009895 GENERIC: 1.0 enabled
1063 21:57:32.013339 scan_static_bus for GENERIC: 0.0 done
1064 21:57:32.016742 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1065 21:57:32.023214 scan_static_bus for PCI: 00:1f.2 done
1066 21:57:32.026297 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1067 21:57:32.029575 PCI: 00:1f.3 scanning...
1068 21:57:32.033677 scan_static_bus for PCI: 00:1f.3
1069 21:57:32.036468 scan_static_bus for PCI: 00:1f.3 done
1070 21:57:32.040136 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1071 21:57:32.042811 PCI: 00:1f.5 scanning...
1072 21:57:32.046471 scan_generic_bus for PCI: 00:1f.5
1073 21:57:32.049962 scan_generic_bus for PCI: 00:1f.5 done
1074 21:57:32.056213 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1075 21:57:32.059672 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1076 21:57:32.063286 scan_static_bus for Root Device done
1077 21:57:32.066546
1078 21:57:32.069214 scan_bus: bus Root Device finished in 737 msecs
1079 21:57:32.069757 done
1080 21:57:32.076046 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1081 21:57:32.079511 Chrome EC: UHEPI supported
1082 21:57:32.086025 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1083 21:57:32.092683 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1084 21:57:32.095788 SPI flash protection: WPSW=0 SRP0=0
1085 21:57:32.099133 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1086 21:57:32.105829 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1087 21:57:32.109408 found VGA at PCI: 00:02.0
1088 21:57:32.112546 Setting up VGA for PCI: 00:02.0
1089 21:57:32.115881 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1090 21:57:32.122334 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1091 21:57:32.126104 Allocating resources...
1092 21:57:32.126680 Reading resources...
1093 21:57:32.132643 Root Device read_resources bus 0 link: 0
1094 21:57:32.135587 DOMAIN: 0000 read_resources bus 0 link: 0
1095 21:57:32.139403 PCI: 00:04.0 read_resources bus 1 link: 0
1096 21:57:32.145814 PCI: 00:04.0 read_resources bus 1 link: 0 done
1097 21:57:32.149791 PCI: 00:0d.0 read_resources bus 0 link: 0
1098 21:57:32.156176 USB0 port 0 read_resources bus 0 link: 0
1099 21:57:32.159661 USB0 port 0 read_resources bus 0 link: 0 done
1100 21:57:32.166241 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1101 21:57:32.169461 PCI: 00:14.0 read_resources bus 0 link: 0
1102 21:57:32.172325 USB0 port 0 read_resources bus 0 link: 0
1103 21:57:32.180805 USB0 port 0 read_resources bus 0 link: 0 done
1104 21:57:32.183490 PCI: 00:14.0 read_resources bus 0 link: 0 done
1105 21:57:32.190547 PCI: 00:14.3 read_resources bus 0 link: 0
1106 21:57:32.193552 PCI: 00:14.3 read_resources bus 0 link: 0 done
1107 21:57:32.201366 PCI: 00:15.0 read_resources bus 0 link: 0
1108 21:57:32.203551 PCI: 00:15.0 read_resources bus 0 link: 0 done
1109 21:57:32.210219 PCI: 00:15.1 read_resources bus 0 link: 0
1110 21:57:32.213568 PCI: 00:15.1 read_resources bus 0 link: 0 done
1111 21:57:32.221205 PCI: 00:19.1 read_resources bus 0 link: 0
1112 21:57:32.224261 PCI: 00:19.1 read_resources bus 0 link: 0 done
1113 21:57:32.230890 PCI: 00:1d.0 read_resources bus 1 link: 0
1114 21:57:32.234067 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1115 21:57:32.240737 PCI: 00:1e.2 read_resources bus 2 link: 0
1116 21:57:32.244472 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1117 21:57:32.250767 PCI: 00:1e.3 read_resources bus 3 link: 0
1118 21:57:32.254462 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1119 21:57:32.260896 PCI: 00:1f.0 read_resources bus 0 link: 0
1120 21:57:32.264086 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1121 21:57:32.267525 PCI: 00:1f.2 read_resources bus 0 link: 0
1122 21:57:32.274643 GENERIC: 0.0 read_resources bus 0 link: 0
1123 21:57:32.277649 GENERIC: 0.0 read_resources bus 0 link: 0 done
1124 21:57:32.283978 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1125 21:57:32.290494 DOMAIN: 0000 read_resources bus 0 link: 0 done
1126 21:57:32.294026 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1127 21:57:32.297413 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1128 21:57:32.300419
1129 21:57:32.304129 Root Device read_resources bus 0 link: 0 done
1130 21:57:32.307291 Done reading resources.
1131 21:57:32.311578 Show resources in subtree (Root Device)...After reading.
1132 21:57:32.317936 Root Device child on link 0 DOMAIN: 0000
1133 21:57:32.320576 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1134 21:57:32.330640 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1135 21:57:32.340435 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1136 21:57:32.341010 PCI: 00:00.0
1137 21:57:32.351187 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1138 21:57:32.361133 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1139 21:57:32.370466 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1140 21:57:32.380067 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1141 21:57:32.386667 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1142 21:57:32.389813
1143 21:57:32.396426 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1144 21:57:32.406682 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1145 21:57:32.416462 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1146 21:57:32.427108 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1147 21:57:32.436845 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1148 21:57:32.443461 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1149 21:57:32.453194 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1150 21:57:32.464030 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1151 21:57:32.473112 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1152 21:57:32.483373 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1153 21:57:32.489784 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1154 21:57:32.499963 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1155 21:57:32.503081
1156 21:57:32.509794 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1157 21:57:32.519711 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1158 21:57:32.529642 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1159 21:57:32.532944 PCI: 00:02.0
1160 21:57:32.542736 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 21:57:32.553096 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1162 21:57:32.559505 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1163 21:57:32.566068 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1164 21:57:32.576191 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1165 21:57:32.576724 GENERIC: 0.0
1166 21:57:32.579978 PCI: 00:05.0
1167 21:57:32.589119 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1168 21:57:32.592517 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1169 21:57:32.595874 GENERIC: 0.0
1170 21:57:32.596312 PCI: 00:08.0
1171 21:57:32.605887 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 21:57:32.609033 PCI: 00:0a.0
1173 21:57:32.612665 PCI: 00:0d.0 child on link 0 USB0 port 0
1174 21:57:32.622417 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 21:57:32.625744 USB0 port 0 child on link 0 USB3 port 0
1176 21:57:32.629293 USB3 port 0
1177 21:57:32.629768 USB3 port 1
1178 21:57:32.632599 USB3 port 2
1179 21:57:32.633057 USB3 port 3
1180 21:57:32.639690 PCI: 00:14.0 child on link 0 USB0 port 0
1181 21:57:32.649089 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 21:57:32.652369 USB0 port 0 child on link 0 USB2 port 0
1183 21:57:32.655838 USB2 port 0
1184 21:57:32.656267 USB2 port 1
1185 21:57:32.659032 USB2 port 2
1186 21:57:32.659538 USB2 port 3
1187 21:57:32.662433 USB2 port 4
1188 21:57:32.662876 USB2 port 5
1189 21:57:32.666136 USB2 port 6
1190 21:57:32.666726 USB2 port 7
1191 21:57:32.668939 USB2 port 8
1192 21:57:32.669545 USB2 port 9
1193 21:57:32.672429 USB3 port 0
1194 21:57:32.672867 USB3 port 1
1195 21:57:32.676646
1196 21:57:32.677227 USB3 port 2
1197 21:57:32.679012 USB3 port 3
1198 21:57:32.679392 PCI: 00:14.2
1199 21:57:32.688921 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1200 21:57:32.699150 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1201 21:57:32.702225 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1202 21:57:32.712672 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 21:57:32.715597 GENERIC: 0.0
1204 21:57:32.718978 PCI: 00:15.0 child on link 0 I2C: 00:1a
1205 21:57:32.729332 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 21:57:32.732112 I2C: 00:1a
1207 21:57:32.732532 I2C: 00:31
1208 21:57:32.735753 I2C: 00:32
1209 21:57:32.738693 PCI: 00:15.1 child on link 0 I2C: 00:10
1210 21:57:32.749119 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 21:57:32.749645 I2C: 00:10
1212 21:57:32.752045 PCI: 00:15.2
1213 21:57:32.762452 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 21:57:32.762948 PCI: 00:15.3
1215 21:57:32.771985 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 21:57:32.775391 PCI: 00:16.0
1217 21:57:32.785327 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 21:57:32.785837 PCI: 00:19.0
1219 21:57:32.791908 PCI: 00:19.1 child on link 0 I2C: 00:15
1220 21:57:32.802212 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 21:57:32.802724 I2C: 00:15
1222 21:57:32.809006 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1223 21:57:32.814969 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1224 21:57:32.825347 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1225 21:57:32.835479 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1226 21:57:32.836075 GENERIC: 0.0
1227 21:57:32.838347 PCI: 01:00.0
1228 21:57:32.848770 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 21:57:32.858720 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1230 21:57:32.865073 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1231 21:57:32.868393
1232 21:57:32.868968 PCI: 00:1e.0
1233 21:57:32.878315 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1234 21:57:32.885160 PCI: 00:1e.2 child on link 0 SPI: 00
1235 21:57:32.895643 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 21:57:32.896166 SPI: 00
1237 21:57:32.898364 PCI: 00:1e.3 child on link 0 SPI: 00
1238 21:57:32.908357 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 21:57:32.911883 SPI: 00
1240 21:57:32.914741 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1241 21:57:32.921510 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1242 21:57:32.925377 PNP: 0c09.0
1243 21:57:32.935347 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1244 21:57:32.937983 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1245 21:57:32.948229 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1246 21:57:32.957985 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1247 21:57:32.961154 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1248 21:57:32.964712 GENERIC: 0.0
1249 21:57:32.965290 GENERIC: 1.0
1250 21:57:32.968165 PCI: 00:1f.3
1251 21:57:32.978124 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1252 21:57:32.988115 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1253 21:57:32.988750 PCI: 00:1f.5
1254 21:57:32.997936 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1255 21:57:33.001260 CPU_CLUSTER: 0 child on link 0 APIC: 00
1256 21:57:33.004594 APIC: 00
1257 21:57:33.005077 APIC: 01
1258 21:57:33.005450 APIC: 03
1259 21:57:33.008240 APIC: 05
1260 21:57:33.008737 APIC: 07
1261 21:57:33.009176 APIC: 06
1262 21:57:33.011345 APIC: 02
1263 21:57:33.011823 APIC: 04
1264 21:57:33.021545 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1265 21:57:33.024943 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1266 21:57:33.031207 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1267 21:57:33.038193 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1268 21:57:33.041660 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1269 21:57:33.044807 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1270 21:57:33.051196 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1271 21:57:33.057594 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1272 21:57:33.064588 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1273 21:57:33.071414 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1274 21:57:33.080913 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1275 21:57:33.083968 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1276 21:57:33.087939
1277 21:57:33.094335 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1278 21:57:33.101005 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1279 21:57:33.107333 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1280 21:57:33.110632 DOMAIN: 0000: Resource ranges:
1281 21:57:33.114714 * Base: 1000, Size: 800, Tag: 100
1282 21:57:33.117621 * Base: 1900, Size: e700, Tag: 100
1283 21:57:33.123927 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1284 21:57:33.131181 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1285 21:57:33.137257 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1286 21:57:33.144240 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1287 21:57:33.153837 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1288 21:57:33.160420 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1289 21:57:33.167535 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1290 21:57:33.177802 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1291 21:57:33.183802 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1292 21:57:33.190878 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1293 21:57:33.200606 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1294 21:57:33.207081 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1295 21:57:33.213986 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1296 21:57:33.223548 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1297 21:57:33.230274 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1298 21:57:33.237013 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1299 21:57:33.247216 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1300 21:57:33.253627 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1301 21:57:33.260564 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1302 21:57:33.270943 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1303 21:57:33.276639 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1304 21:57:33.283610 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1305 21:57:33.293449 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1306 21:57:33.300880 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1307 21:57:33.306800 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1308 21:57:33.309914 DOMAIN: 0000: Resource ranges:
1309 21:57:33.313436 * Base: 7fc00000, Size: 40400000, Tag: 200
1310 21:57:33.316643
1311 21:57:33.319987 * Base: d0000000, Size: 28000000, Tag: 200
1312 21:57:33.323243 * Base: fa000000, Size: 1000000, Tag: 200
1313 21:57:33.326640 * Base: fb001000, Size: 2fff000, Tag: 200
1314 21:57:33.333416 * Base: fe010000, Size: 2e000, Tag: 200
1315 21:57:33.336977 * Base: fe03f000, Size: d41000, Tag: 200
1316 21:57:33.340408 * Base: fed88000, Size: 8000, Tag: 200
1317 21:57:33.343516 * Base: fed93000, Size: d000, Tag: 200
1318 21:57:33.350186 * Base: feda2000, Size: 1e000, Tag: 200
1319 21:57:33.353308 * Base: fede0000, Size: 1220000, Tag: 200
1320 21:57:33.356656 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1321 21:57:33.363621 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1322 21:57:33.370356 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1323 21:57:33.376472 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1324 21:57:33.382909 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1325 21:57:33.389501 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1326 21:57:33.396271 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1327 21:57:33.402849 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1328 21:57:33.409514 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1329 21:57:33.416178 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1330 21:57:33.422936 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1331 21:57:33.429257 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1332 21:57:33.435814 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1333 21:57:33.442803 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1334 21:57:33.449673 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1335 21:57:33.456126 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1336 21:57:33.463042 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1337 21:57:33.469224 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1338 21:57:33.475867 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1339 21:57:33.482768 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1340 21:57:33.489346 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1341 21:57:33.495793 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1342 21:57:33.503008 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1343 21:57:33.512218 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1344 21:57:33.519390 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1345 21:57:33.522612 PCI: 00:1d.0: Resource ranges:
1346 21:57:33.526053 * Base: 7fc00000, Size: 100000, Tag: 200
1347 21:57:33.532284 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1348 21:57:33.539241 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1349 21:57:33.545741 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1350 21:57:33.555829 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1351 21:57:33.562231 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1352 21:57:33.565666 Root Device assign_resources, bus 0 link: 0
1353 21:57:33.572331 DOMAIN: 0000 assign_resources, bus 0 link: 0
1354 21:57:33.578979 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1355 21:57:33.589106 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1356 21:57:33.595991 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1357 21:57:33.605616 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1358 21:57:33.609157 PCI: 00:04.0 assign_resources, bus 1 link: 0
1359 21:57:33.612214 PCI: 00:04.0 assign_resources, bus 1 link: 0
1360 21:57:33.622830 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1361 21:57:33.628663 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1362 21:57:33.638865 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1363 21:57:33.642135 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1364 21:57:33.648485 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1365 21:57:33.655742 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1366 21:57:33.658459 PCI: 00:14.0 assign_resources, bus 0 link: 0
1367 21:57:33.665238 PCI: 00:14.0 assign_resources, bus 0 link: 0
1368 21:57:33.671869 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1369 21:57:33.682342 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1370 21:57:33.688837 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1371 21:57:33.695706 PCI: 00:14.3 assign_resources, bus 0 link: 0
1372 21:57:33.698826 PCI: 00:14.3 assign_resources, bus 0 link: 0
1373 21:57:33.705186 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1374 21:57:33.711615 PCI: 00:15.0 assign_resources, bus 0 link: 0
1375 21:57:33.715214 PCI: 00:15.0 assign_resources, bus 0 link: 0
1376 21:57:33.724990 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1377 21:57:33.729435 PCI: 00:15.1 assign_resources, bus 0 link: 0
1378 21:57:33.732008 PCI: 00:15.1 assign_resources, bus 0 link: 0
1379 21:57:33.734877
1380 21:57:33.741798 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1381 21:57:33.748350 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1382 21:57:33.751431
1383 21:57:33.758608 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1384 21:57:33.764581 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1385 21:57:33.771550 PCI: 00:19.1 assign_resources, bus 0 link: 0
1386 21:57:33.774691 PCI: 00:19.1 assign_resources, bus 0 link: 0
1387 21:57:33.784949 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1388 21:57:33.794712 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1389 21:57:33.801098 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1390 21:57:33.807978 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1391 21:57:33.814697 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1392 21:57:33.824802 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1393 21:57:33.831344 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1394 21:57:33.834536 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 21:57:33.844423 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1396 21:57:33.847786 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1397 21:57:33.855094 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1398 21:57:33.861461 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1399 21:57:33.867830 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1400 21:57:33.871423 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1401 21:57:33.875055 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1402 21:57:33.881322 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1403 21:57:33.884654 LPC: Trying to open IO window from 800 size 1ff
1404 21:57:33.894521 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1405 21:57:33.901343 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1406 21:57:33.911179 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1407 21:57:33.914189 DOMAIN: 0000 assign_resources, bus 0 link: 0
1408 21:57:33.917466 Root Device assign_resources, bus 0 link: 0
1409 21:57:33.920784 Done setting resources.
1410 21:57:33.927622 Show resources in subtree (Root Device)...After assigning values.
1411 21:57:33.930775 Root Device child on link 0 DOMAIN: 0000
1412 21:57:33.938083 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1413 21:57:33.947710 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1414 21:57:33.957331 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1415 21:57:33.957635 PCI: 00:00.0
1416 21:57:33.967503 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1417 21:57:33.977543 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1418 21:57:33.987581 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1419 21:57:33.994558 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1420 21:57:34.004090 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1421 21:57:34.014049 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1422 21:57:34.024077 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1423 21:57:34.033580 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1424 21:57:34.043527 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1425 21:57:34.050253 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1426 21:57:34.060528 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1427 21:57:34.070107 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1428 21:57:34.080291 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1429 21:57:34.090117 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1430 21:57:34.096726 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1431 21:57:34.106571 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1432 21:57:34.116487 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1433 21:57:34.126617 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1434 21:57:34.136412 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1435 21:57:34.146117 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1436 21:57:34.146561 PCI: 00:02.0
1437 21:57:34.159763 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1438 21:57:34.169636 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1439 21:57:34.179396 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1440 21:57:34.182794 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1441 21:57:34.192885 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1442 21:57:34.196430 GENERIC: 0.0
1443 21:57:34.196936 PCI: 00:05.0
1444 21:57:34.205917 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1445 21:57:34.213592 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1446 21:57:34.214035 GENERIC: 0.0
1447 21:57:34.215862 PCI: 00:08.0
1448 21:57:34.225824 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1449 21:57:34.226275 PCI: 00:0a.0
1450 21:57:34.232306 PCI: 00:0d.0 child on link 0 USB0 port 0
1451 21:57:34.242452 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1452 21:57:34.245532 USB0 port 0 child on link 0 USB3 port 0
1453 21:57:34.248857 USB3 port 0
1454 21:57:34.248993 USB3 port 1
1455 21:57:34.252038 USB3 port 2
1456 21:57:34.252175 USB3 port 3
1457 21:57:34.258996 PCI: 00:14.0 child on link 0 USB0 port 0
1458 21:57:34.268730 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1459 21:57:34.272609 USB0 port 0 child on link 0 USB2 port 0
1460 21:57:34.275790 USB2 port 0
1461 21:57:34.275969 USB2 port 1
1462 21:57:34.278661 USB2 port 2
1463 21:57:34.278800 USB2 port 3
1464 21:57:34.282409 USB2 port 4
1465 21:57:34.282585 USB2 port 5
1466 21:57:34.285732 USB2 port 6
1467 21:57:34.285913 USB2 port 7
1468 21:57:34.289346 USB2 port 8
1469 21:57:34.289837 USB2 port 9
1470 21:57:34.292486 USB3 port 0
1471 21:57:34.293002 USB3 port 1
1472 21:57:34.295700 USB3 port 2
1473 21:57:34.296183 USB3 port 3
1474 21:57:34.299294
1475 21:57:34.299795 PCI: 00:14.2
1476 21:57:34.309009 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1477 21:57:34.319202 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1478 21:57:34.325759 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1479 21:57:34.335914 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1480 21:57:34.336509 GENERIC: 0.0
1481 21:57:34.339230 PCI: 00:15.0 child on link 0 I2C: 00:1a
1482 21:57:34.342758
1483 21:57:34.352608 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1484 21:57:34.353073 I2C: 00:1a
1485 21:57:34.356049 I2C: 00:31
1486 21:57:34.356493 I2C: 00:32
1487 21:57:34.359037 PCI: 00:15.1 child on link 0 I2C: 00:10
1488 21:57:34.369430 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1489 21:57:34.372054 I2C: 00:10
1490 21:57:34.372509 PCI: 00:15.2
1491 21:57:34.385660 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1492 21:57:34.386237 PCI: 00:15.3
1493 21:57:34.395818 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1494 21:57:34.399080 PCI: 00:16.0
1495 21:57:34.408803 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1496 21:57:34.409321 PCI: 00:19.0
1497 21:57:34.415811 PCI: 00:19.1 child on link 0 I2C: 00:15
1498 21:57:34.426169 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1499 21:57:34.426683 I2C: 00:15
1500 21:57:34.428826 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1501 21:57:34.438940 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1502 21:57:34.452286 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1503 21:57:34.462207 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1504 21:57:34.462825 GENERIC: 0.0
1505 21:57:34.465649 PCI: 01:00.0
1506 21:57:34.475455 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1507 21:57:34.485323 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1508 21:57:34.495091 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1509 21:57:34.498722 PCI: 00:1e.0
1510 21:57:34.508998 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1511 21:57:34.512260 PCI: 00:1e.2 child on link 0 SPI: 00
1512 21:57:34.526103 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1513 21:57:34.526599 SPI: 00
1514 21:57:34.528976 PCI: 00:1e.3 child on link 0 SPI: 00
1515 21:57:34.539161 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1516 21:57:34.541937 SPI: 00
1517 21:57:34.545546 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1518 21:57:34.555420 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1519 21:57:34.555913 PNP: 0c09.0
1520 21:57:34.565202 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1521 21:57:34.568680 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1522 21:57:34.578631 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1523 21:57:34.588621 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1524 21:57:34.591619 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1525 21:57:34.594993 GENERIC: 0.0
1526 21:57:34.595495 GENERIC: 1.0
1527 21:57:34.598436 PCI: 00:1f.3
1528 21:57:34.608158 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1529 21:57:34.618208 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1530 21:57:34.618369 PCI: 00:1f.5
1531 21:57:34.631531 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1532 21:57:34.634906 CPU_CLUSTER: 0 child on link 0 APIC: 00
1533 21:57:34.635084 APIC: 00
1534 21:57:34.637969 APIC: 01
1535 21:57:34.638106 APIC: 03
1536 21:57:34.638182 APIC: 05
1537 21:57:34.641890 APIC: 07
1538 21:57:34.642111 APIC: 06
1539 21:57:34.642227 APIC: 02
1540 21:57:34.644945 APIC: 04
1541 21:57:34.648470 Done allocating resources.
1542 21:57:34.654766 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1543 21:57:34.657916 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1544 21:57:34.661454 Configure GPIOs for I2S audio on UP4.
1545 21:57:34.669548 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1546 21:57:34.672898 Enabling resources...
1547 21:57:34.676622 PCI: 00:00.0 subsystem <- 8086/9a12
1548 21:57:34.679962 PCI: 00:00.0 cmd <- 06
1549 21:57:34.682915 PCI: 00:02.0 subsystem <- 8086/9a40
1550 21:57:34.686566 PCI: 00:02.0 cmd <- 03
1551 21:57:34.690050 PCI: 00:04.0 subsystem <- 8086/9a03
1552 21:57:34.690542 PCI: 00:04.0 cmd <- 02
1553 21:57:34.696577 PCI: 00:05.0 subsystem <- 8086/9a19
1554 21:57:34.697066 PCI: 00:05.0 cmd <- 02
1555 21:57:34.699861 PCI: 00:08.0 subsystem <- 8086/9a11
1556 21:57:34.703304 PCI: 00:08.0 cmd <- 06
1557 21:57:34.706772 PCI: 00:0d.0 subsystem <- 8086/9a13
1558 21:57:34.709703 PCI: 00:0d.0 cmd <- 02
1559 21:57:34.713218 PCI: 00:14.0 subsystem <- 8086/a0ed
1560 21:57:34.716950 PCI: 00:14.0 cmd <- 02
1561 21:57:34.720484 PCI: 00:14.2 subsystem <- 8086/a0ef
1562 21:57:34.723730 PCI: 00:14.2 cmd <- 02
1563 21:57:34.726576 PCI: 00:14.3 subsystem <- 8086/a0f0
1564 21:57:34.729769 PCI: 00:14.3 cmd <- 02
1565 21:57:34.733520 PCI: 00:15.0 subsystem <- 8086/a0e8
1566 21:57:34.734171 PCI: 00:15.0 cmd <- 02
1567 21:57:34.740092 PCI: 00:15.1 subsystem <- 8086/a0e9
1568 21:57:34.740583 PCI: 00:15.1 cmd <- 02
1569 21:57:34.744448 PCI: 00:15.2 subsystem <- 8086/a0ea
1570 21:57:34.746707 PCI: 00:15.2 cmd <- 02
1571 21:57:34.750087 PCI: 00:15.3 subsystem <- 8086/a0eb
1572 21:57:34.753139 PCI: 00:15.3 cmd <- 02
1573 21:57:34.756729 PCI: 00:16.0 subsystem <- 8086/a0e0
1574 21:57:34.759969 PCI: 00:16.0 cmd <- 02
1575 21:57:34.763817 PCI: 00:19.1 subsystem <- 8086/a0c6
1576 21:57:34.766635 PCI: 00:19.1 cmd <- 02
1577 21:57:34.770462 PCI: 00:1d.0 bridge ctrl <- 0013
1578 21:57:34.773414 PCI: 00:1d.0 subsystem <- 8086/a0b0
1579 21:57:34.776851 PCI: 00:1d.0 cmd <- 06
1580 21:57:34.780002 PCI: 00:1e.0 subsystem <- 8086/a0a8
1581 21:57:34.780475 PCI: 00:1e.0 cmd <- 06
1582 21:57:34.783709
1583 21:57:34.786691 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 21:57:34.787163 PCI: 00:1e.2 cmd <- 06
1585 21:57:34.793356 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 21:57:34.793876 PCI: 00:1e.3 cmd <- 02
1587 21:57:34.796376 PCI: 00:1f.0 subsystem <- 8086/a087
1588 21:57:34.799615 PCI: 00:1f.0 cmd <- 407
1589 21:57:34.802875 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 21:57:34.806469 PCI: 00:1f.3 cmd <- 02
1591 21:57:34.809691 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 21:57:34.812557 PCI: 00:1f.5 cmd <- 406
1593 21:57:34.816916 PCI: 01:00.0 cmd <- 02
1594 21:57:34.821230 done.
1595 21:57:34.825053 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 21:57:34.828091 Initializing devices...
1597 21:57:34.831355 Root Device init
1598 21:57:34.835014 Chrome EC: Set SMI mask to 0x0000000000000000
1599 21:57:34.841674 Chrome EC: clear events_b mask to 0x0000000000000000
1600 21:57:34.848345 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 21:57:34.854731 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 21:57:34.861853 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 21:57:34.865369 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 21:57:34.872328 fw_config match found: DB_USB=USB3_ACTIVE
1605 21:57:34.875115 Configure Right Type-C port orientation for retimer
1606 21:57:34.878389 Root Device init finished in 45 msecs
1607 21:57:34.882835 PCI: 00:00.0 init
1608 21:57:34.886494 CPU TDP = 9 Watts
1609 21:57:34.887064 CPU PL1 = 9 Watts
1610 21:57:34.889407 CPU PL2 = 40 Watts
1611 21:57:34.892870 CPU PL4 = 83 Watts
1612 21:57:34.896026 PCI: 00:00.0 init finished in 8 msecs
1613 21:57:34.896503 PCI: 00:02.0 init
1614 21:57:34.899332 GMA: Found VBT in CBFS
1615 21:57:34.902667 GMA: Found valid VBT in CBFS
1616 21:57:34.909528 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 21:57:34.915997 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 21:57:34.919665 PCI: 00:02.0 init finished in 18 msecs
1619 21:57:34.922456 PCI: 00:05.0 init
1620 21:57:34.926293 PCI: 00:05.0 init finished in 0 msecs
1621 21:57:34.929656 PCI: 00:08.0 init
1622 21:57:34.932836 PCI: 00:08.0 init finished in 0 msecs
1623 21:57:34.935849 PCI: 00:14.0 init
1624 21:57:34.938969 PCI: 00:14.0 init finished in 0 msecs
1625 21:57:34.942519 PCI: 00:14.2 init
1626 21:57:34.945915 PCI: 00:14.2 init finished in 0 msecs
1627 21:57:34.949089 PCI: 00:15.0 init
1628 21:57:34.949394 I2C bus 0 version 0x3230302a
1629 21:57:34.955629 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 21:57:34.958809 PCI: 00:15.0 init finished in 6 msecs
1631 21:57:34.959115 PCI: 00:15.1 init
1632 21:57:34.962960 I2C bus 1 version 0x3230302a
1633 21:57:34.966005 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 21:57:34.968862 PCI: 00:15.1 init finished in 6 msecs
1635 21:57:34.972417 PCI: 00:15.2 init
1636 21:57:34.976078 I2C bus 2 version 0x3230302a
1637 21:57:34.979528 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 21:57:34.983040 PCI: 00:15.2 init finished in 6 msecs
1639 21:57:34.986849 PCI: 00:15.3 init
1640 21:57:34.990129 I2C bus 3 version 0x3230302a
1641 21:57:34.992898 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 21:57:34.995971 PCI: 00:15.3 init finished in 6 msecs
1643 21:57:34.999165 PCI: 00:16.0 init
1644 21:57:35.002912 PCI: 00:16.0 init finished in 0 msecs
1645 21:57:35.003413 PCI: 00:19.1 init
1646 21:57:35.006226
1647 21:57:35.006720 I2C bus 5 version 0x3230302a
1648 21:57:35.009273 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 21:57:35.012847
1650 21:57:35.015867 PCI: 00:19.1 init finished in 6 msecs
1651 21:57:35.016363 PCI: 00:1d.0 init
1652 21:57:35.019448 Initializing PCH PCIe bridge.
1653 21:57:35.023650 PCI: 00:1d.0 init finished in 3 msecs
1654 21:57:35.026649 PCI: 00:1f.0 init
1655 21:57:35.029975 IOAPIC: Initializing IOAPIC at 0xfec00000
1656 21:57:35.036709 IOAPIC: Bootstrap Processor Local APIC = 0x00
1657 21:57:35.037159 IOAPIC: ID = 0x02
1658 21:57:35.040046 IOAPIC: Dumping registers
1659 21:57:35.043277 reg 0x0000: 0x02000000
1660 21:57:35.046672 reg 0x0001: 0x00770020
1661 21:57:35.047450 reg 0x0002: 0x00000000
1662 21:57:35.053352 PCI: 00:1f.0 init finished in 21 msecs
1663 21:57:35.053957 PCI: 00:1f.2 init
1664 21:57:35.056887 Disabling ACPI via APMC.
1665 21:57:35.059981 APMC done.
1666 21:57:35.063231 PCI: 00:1f.2 init finished in 5 msecs
1667 21:57:35.075256 PCI: 01:00.0 init
1668 21:57:35.078318 PCI: 01:00.0 init finished in 0 msecs
1669 21:57:35.081756 PNP: 0c09.0 init
1670 21:57:35.084981 Google Chrome EC uptime: 8.366 seconds
1671 21:57:35.091909 Google Chrome AP resets since EC boot: 1
1672 21:57:35.095361 Google Chrome most recent AP reset causes:
1673 21:57:35.098194 0.347: 32775 shutdown: entering G3
1674 21:57:35.105229 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1675 21:57:35.108183 PNP: 0c09.0 init finished in 22 msecs
1676 21:57:35.113945 Devices initialized
1677 21:57:35.117205 Show all devs... After init.
1678 21:57:35.120493 Root Device: enabled 1
1679 21:57:35.120973 DOMAIN: 0000: enabled 1
1680 21:57:35.123887 CPU_CLUSTER: 0: enabled 1
1681 21:57:35.127482 PCI: 00:00.0: enabled 1
1682 21:57:35.130867 PCI: 00:02.0: enabled 1
1683 21:57:35.131297 PCI: 00:04.0: enabled 1
1684 21:57:35.133985 PCI: 00:05.0: enabled 1
1685 21:57:35.137504 PCI: 00:06.0: enabled 0
1686 21:57:35.140534 PCI: 00:07.0: enabled 0
1687 21:57:35.140984 PCI: 00:07.1: enabled 0
1688 21:57:35.143846 PCI: 00:07.2: enabled 0
1689 21:57:35.147541 PCI: 00:07.3: enabled 0
1690 21:57:35.150484 PCI: 00:08.0: enabled 1
1691 21:57:35.150914 PCI: 00:09.0: enabled 0
1692 21:57:35.154026 PCI: 00:0a.0: enabled 0
1693 21:57:35.157837 PCI: 00:0d.0: enabled 1
1694 21:57:35.158423 PCI: 00:0d.1: enabled 0
1695 21:57:35.160590
1696 21:57:35.161166 PCI: 00:0d.2: enabled 0
1697 21:57:35.163699 PCI: 00:0d.3: enabled 0
1698 21:57:35.167464 PCI: 00:0e.0: enabled 0
1699 21:57:35.168006 PCI: 00:10.2: enabled 1
1700 21:57:35.171098 PCI: 00:10.6: enabled 0
1701 21:57:35.173788 PCI: 00:10.7: enabled 0
1702 21:57:35.177187 PCI: 00:12.0: enabled 0
1703 21:57:35.177650 PCI: 00:12.6: enabled 0
1704 21:57:35.180528 PCI: 00:13.0: enabled 0
1705 21:57:35.183821 PCI: 00:14.0: enabled 1
1706 21:57:35.186978 PCI: 00:14.1: enabled 0
1707 21:57:35.187414 PCI: 00:14.2: enabled 1
1708 21:57:35.191195 PCI: 00:14.3: enabled 1
1709 21:57:35.194191 PCI: 00:15.0: enabled 1
1710 21:57:35.196917 PCI: 00:15.1: enabled 1
1711 21:57:35.197355 PCI: 00:15.2: enabled 1
1712 21:57:35.200189 PCI: 00:15.3: enabled 1
1713 21:57:35.203783 PCI: 00:16.0: enabled 1
1714 21:57:35.204250 PCI: 00:16.1: enabled 0
1715 21:57:35.207268 PCI: 00:16.2: enabled 0
1716 21:57:35.210893 PCI: 00:16.3: enabled 0
1717 21:57:35.213724 PCI: 00:16.4: enabled 0
1718 21:57:35.214159 PCI: 00:16.5: enabled 0
1719 21:57:35.217062 PCI: 00:17.0: enabled 0
1720 21:57:35.220398 PCI: 00:19.0: enabled 0
1721 21:57:35.224139 PCI: 00:19.1: enabled 1
1722 21:57:35.224619 PCI: 00:19.2: enabled 0
1723 21:57:35.227301 PCI: 00:1c.0: enabled 1
1724 21:57:35.230145 PCI: 00:1c.1: enabled 0
1725 21:57:35.233857 PCI: 00:1c.2: enabled 0
1726 21:57:35.234452 PCI: 00:1c.3: enabled 0
1727 21:57:35.237116 PCI: 00:1c.4: enabled 0
1728 21:57:35.240309 PCI: 00:1c.5: enabled 0
1729 21:57:35.240788 PCI: 00:1c.6: enabled 1
1730 21:57:35.243586 PCI: 00:1c.7: enabled 0
1731 21:57:35.246960 PCI: 00:1d.0: enabled 1
1732 21:57:35.250358 PCI: 00:1d.1: enabled 0
1733 21:57:35.250837 PCI: 00:1d.2: enabled 1
1734 21:57:35.254029 PCI: 00:1d.3: enabled 0
1735 21:57:35.257576 PCI: 00:1e.0: enabled 1
1736 21:57:35.260306 PCI: 00:1e.1: enabled 0
1737 21:57:35.260963 PCI: 00:1e.2: enabled 1
1738 21:57:35.263442 PCI: 00:1e.3: enabled 1
1739 21:57:35.266747 PCI: 00:1f.0: enabled 1
1740 21:57:35.270053 PCI: 00:1f.1: enabled 0
1741 21:57:35.270527 PCI: 00:1f.2: enabled 1
1742 21:57:35.273697 PCI: 00:1f.3: enabled 1
1743 21:57:35.276654 PCI: 00:1f.4: enabled 0
1744 21:57:35.277169 PCI: 00:1f.5: enabled 1
1745 21:57:35.280946
1746 21:57:35.281602 PCI: 00:1f.6: enabled 0
1747 21:57:35.283552 PCI: 00:1f.7: enabled 0
1748 21:57:35.287015 APIC: 00: enabled 1
1749 21:57:35.287671 GENERIC: 0.0: enabled 1
1750 21:57:35.289954 GENERIC: 0.0: enabled 1
1751 21:57:35.293460 GENERIC: 1.0: enabled 1
1752 21:57:35.296802 GENERIC: 0.0: enabled 1
1753 21:57:35.297281 GENERIC: 1.0: enabled 1
1754 21:57:35.300075 USB0 port 0: enabled 1
1755 21:57:35.303824 GENERIC: 0.0: enabled 1
1756 21:57:35.304302 USB0 port 0: enabled 1
1757 21:57:35.307029 GENERIC: 0.0: enabled 1
1758 21:57:35.310227 I2C: 00:1a: enabled 1
1759 21:57:35.310705 I2C: 00:31: enabled 1
1760 21:57:35.313137
1761 21:57:35.313659 I2C: 00:32: enabled 1
1762 21:57:35.316716 I2C: 00:10: enabled 1
1763 21:57:35.320428 I2C: 00:15: enabled 1
1764 21:57:35.321015 GENERIC: 0.0: enabled 0
1765 21:57:35.323262 GENERIC: 1.0: enabled 0
1766 21:57:35.327310 GENERIC: 0.0: enabled 1
1767 21:57:35.327904 SPI: 00: enabled 1
1768 21:57:35.329975 SPI: 00: enabled 1
1769 21:57:35.333293 PNP: 0c09.0: enabled 1
1770 21:57:35.333809 GENERIC: 0.0: enabled 1
1771 21:57:35.336849 USB3 port 0: enabled 1
1772 21:57:35.340033 USB3 port 1: enabled 1
1773 21:57:35.340508 USB3 port 2: enabled 0
1774 21:57:35.343602 USB3 port 3: enabled 0
1775 21:57:35.346902 USB2 port 0: enabled 0
1776 21:57:35.349796 USB2 port 1: enabled 1
1777 21:57:35.350351 USB2 port 2: enabled 1
1778 21:57:35.353587 USB2 port 3: enabled 0
1779 21:57:35.356485 USB2 port 4: enabled 1
1780 21:57:35.356989 USB2 port 5: enabled 0
1781 21:57:35.359579 USB2 port 6: enabled 0
1782 21:57:35.363141 USB2 port 7: enabled 0
1783 21:57:35.363493 USB2 port 8: enabled 0
1784 21:57:35.366250
1785 21:57:35.366497 USB2 port 9: enabled 0
1786 21:57:35.370054 USB3 port 0: enabled 0
1787 21:57:35.372771 USB3 port 1: enabled 1
1788 21:57:35.372967 USB3 port 2: enabled 0
1789 21:57:35.376251 USB3 port 3: enabled 0
1790 21:57:35.379701 GENERIC: 0.0: enabled 1
1791 21:57:35.379840 GENERIC: 1.0: enabled 1
1792 21:57:35.383219
1793 21:57:35.383360 APIC: 01: enabled 1
1794 21:57:35.386840 APIC: 03: enabled 1
1795 21:57:35.386979 APIC: 05: enabled 1
1796 21:57:35.389391 APIC: 07: enabled 1
1797 21:57:35.393416 APIC: 06: enabled 1
1798 21:57:35.393583 APIC: 02: enabled 1
1799 21:57:35.396118 APIC: 04: enabled 1
1800 21:57:35.399541 PCI: 01:00.0: enabled 1
1801 21:57:35.402747 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1802 21:57:35.409689 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1803 21:57:35.412634 ELOG: NV offset 0xf30000 size 0x1000
1804 21:57:35.420040 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1805 21:57:35.426764 ELOG: Event(17) added with size 13 at 2023-01-29 21:57:35 UTC
1806 21:57:35.433009 ELOG: Event(92) added with size 9 at 2023-01-29 21:57:35 UTC
1807 21:57:35.439886 ELOG: Event(93) added with size 9 at 2023-01-29 21:57:35 UTC
1808 21:57:35.446124 ELOG: Event(9E) added with size 10 at 2023-01-29 21:57:35 UTC
1809 21:57:35.453217 ELOG: Event(9F) added with size 14 at 2023-01-29 21:57:35 UTC
1810 21:57:35.456133 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1811 21:57:35.462727 ELOG: Event(A1) added with size 10 at 2023-01-29 21:57:35 UTC
1812 21:57:35.472591 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1813 21:57:35.476059 ELOG: Event(A0) added with size 9 at 2023-01-29 21:57:35 UTC
1814 21:57:35.479760
1815 21:57:35.482886 elog_add_boot_reason: Logged dev mode boot
1816 21:57:35.489616 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1817 21:57:35.490099 Finalize devices...
1818 21:57:35.492654 Devices finalized
1819 21:57:35.495873 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 21:57:35.502776 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 21:57:35.509451 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 21:57:35.512864 ME: HFSTS1 : 0x80030055
1823 21:57:35.515986 ME: HFSTS2 : 0x30280116
1824 21:57:35.522826 ME: HFSTS3 : 0x00000050
1825 21:57:35.526196 ME: HFSTS4 : 0x00004000
1826 21:57:35.529031 ME: HFSTS5 : 0x00000000
1827 21:57:35.536231 ME: HFSTS6 : 0x00400006
1828 21:57:35.539217 ME: Manufacturing Mode : YES
1829 21:57:35.542794 ME: SPI Protection Mode Enabled : NO
1830 21:57:35.547163 ME: FW Partition Table : OK
1831 21:57:35.548950 ME: Bringup Loader Failure : NO
1832 21:57:35.552550 ME: Firmware Init Complete : NO
1833 21:57:35.559119 ME: Boot Options Present : NO
1834 21:57:35.563162 ME: Update In Progress : NO
1835 21:57:35.565779 ME: D0i3 Support : YES
1836 21:57:35.568919 ME: Low Power State Enabled : NO
1837 21:57:35.572835 ME: CPU Replaced : YES
1838 21:57:35.576032 ME: CPU Replacement Valid : YES
1839 21:57:35.579095 ME: Current Working State : 5
1840 21:57:35.582853 ME: Current Operation State : 1
1841 21:57:35.585908 ME: Current Operation Mode : 3
1842 21:57:35.592782 ME: Error Code : 0
1843 21:57:35.595951 ME: Enhanced Debug Mode : NO
1844 21:57:35.599505 ME: CPU Debug Disabled : YES
1845 21:57:35.602463 ME: TXT Support : NO
1846 21:57:35.609269 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 21:57:35.615520 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 21:57:35.619095 CBFS: 'fallback/slic' not found.
1849 21:57:35.622932 ACPI: Writing ACPI tables at 76b01000.
1850 21:57:35.626199 ACPI: * FACS
1851 21:57:35.626636 ACPI: * DSDT
1852 21:57:35.629272 Ramoops buffer: 0x100000@0x76a00000.
1853 21:57:35.635555 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 21:57:35.638895 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 21:57:35.642413 Google Chrome EC: version:
1856 21:57:35.645418 ro: voema_v2.0.7540-147f8d37d1
1857 21:57:35.648798 rw: voema_v2.0.7540-147f8d37d1
1858 21:57:35.652131 running image: 2
1859 21:57:35.659175 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1860 21:57:35.662037 ACPI: * FADT
1861 21:57:35.662345 SCI is IRQ9
1862 21:57:35.665169 ACPI: added table 1/32, length now 40
1863 21:57:35.669055 ACPI: * SSDT
1864 21:57:35.672927 Found 1 CPU(s) with 8 core(s) each.
1865 21:57:35.675151 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 21:57:35.682212 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 21:57:35.685582 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 21:57:35.688905 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 21:57:35.695328 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 21:57:35.698953 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 21:57:35.705894 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 21:57:35.708690 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 21:57:35.718861 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 21:57:35.722248 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 21:57:35.725410 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 21:57:35.732212 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 21:57:35.739021 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 21:57:35.741831 PS2K: Passing 80 keymaps to kernel
1879 21:57:35.748566 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 21:57:35.755141 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 21:57:35.761866 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 21:57:35.765392 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 21:57:35.768485
1884 21:57:35.771964 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 21:57:35.775462
1886 21:57:35.778588 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1887 21:57:35.785327 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1888 21:57:35.791801 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1889 21:57:35.798309 ACPI: added table 2/32, length now 44
1890 21:57:35.798445 ACPI: * MCFG
1891 21:57:35.802092 ACPI: added table 3/32, length now 48
1892 21:57:35.805264 ACPI: * TPM2
1893 21:57:35.808486 TPM2 log created at 0x769f0000
1894 21:57:35.812201 ACPI: added table 4/32, length now 52
1895 21:57:35.812286 ACPI: * MADT
1896 21:57:35.815497 SCI is IRQ9
1897 21:57:35.818574 ACPI: added table 5/32, length now 56
1898 21:57:35.818659 current = 76b09850
1899 21:57:35.822006 ACPI: * DMAR
1900 21:57:35.825412 ACPI: added table 6/32, length now 60
1901 21:57:35.828555 ACPI: added table 7/32, length now 64
1902 21:57:35.831612 ACPI: * HPET
1903 21:57:35.835292 ACPI: added table 8/32, length now 68
1904 21:57:35.835454 ACPI: done.
1905 21:57:35.838763 ACPI tables: 35216 bytes.
1906 21:57:35.841904 smbios_write_tables: 769ef000
1907 21:57:35.845355 EC returned error result code 3
1908 21:57:35.848443 Couldn't obtain OEM name from CBI
1909 21:57:35.851561 Create SMBIOS type 16
1910 21:57:35.851665 Create SMBIOS type 17
1911 21:57:35.855261
1912 21:57:35.855424 GENERIC: 0.0 (WIFI Device)
1913 21:57:35.858569 SMBIOS tables: 1750 bytes.
1914 21:57:35.861588 Writing table forward entry at 0x00000500
1915 21:57:35.868292 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1916 21:57:35.872032 Writing coreboot table at 0x76b25000
1917 21:57:35.878263 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1918 21:57:35.881470 1. 0000000000001000-000000000009ffff: RAM
1919 21:57:35.885834
1920 21:57:35.888441 2. 00000000000a0000-00000000000fffff: RESERVED
1921 21:57:35.891338 3. 0000000000100000-00000000769eefff: RAM
1922 21:57:35.898343 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 21:57:35.901511 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 21:57:35.908041 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 21:57:35.915222 7. 0000000077000000-000000007fbfffff: RESERVED
1926 21:57:35.917970 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 21:57:35.924663 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 21:57:35.928586 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 21:57:35.931400 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 21:57:35.938162 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 21:57:35.941376 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 21:57:35.948027 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 21:57:35.952772 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 21:57:35.954772 16. 0000000100000000-00000002803fffff: RAM
1935 21:57:35.957807
1936 21:57:35.957919 Passing 4 GPIOs to payload:
1937 21:57:35.965168 NAME | PORT | POLARITY | VALUE
1938 21:57:35.971088 lid | undefined | high | high
1939 21:57:35.974632 power | undefined | high | low
1940 21:57:35.981285 oprom | undefined | high | low
1941 21:57:35.984363 EC in RW | 0x000000e5 | high | high
1942 21:57:35.991171 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8f37
1943 21:57:35.994338 coreboot table: 1576 bytes.
1944 21:57:35.997601 IMD ROOT 0. 0x76fff000 0x00001000
1945 21:57:36.001052 IMD SMALL 1. 0x76ffe000 0x00001000
1946 21:57:36.004956 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 21:57:36.011008 VPD 3. 0x76c4d000 0x00000367
1948 21:57:36.014225 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 21:57:36.017749 CONSOLE 5. 0x76c2c000 0x00020000
1950 21:57:36.021409 FMAP 6. 0x76c2b000 0x00000578
1951 21:57:36.024528 TIME STAMP 7. 0x76c2a000 0x00000910
1952 21:57:36.027866 VBOOT WORK 8. 0x76c16000 0x00014000
1953 21:57:36.031201 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 21:57:36.034511 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 21:57:36.037837 RAMSTAGE 11. 0x76b97000 0x00073000
1956 21:57:36.041454
1957 21:57:36.044779 REFCODE 12. 0x76b42000 0x00055000
1958 21:57:36.048204 SMM BACKUP 13. 0x76b32000 0x00010000
1959 21:57:36.051986 4f444749 14. 0x76b30000 0x00002000
1960 21:57:36.055037 EXT VBT15. 0x76b2d000 0x0000219f
1961 21:57:36.058751 COREBOOT 16. 0x76b25000 0x00008000
1962 21:57:36.061334 ACPI 17. 0x76b01000 0x00024000
1963 21:57:36.064864 ACPI GNVS 18. 0x76b00000 0x00001000
1964 21:57:36.067950 RAMOOPS 19. 0x76a00000 0x00100000
1965 21:57:36.071406 TPM2 TCGLOG20. 0x769f0000 0x00010000
1966 21:57:36.078228 SMBIOS 21. 0x769ef000 0x00000800
1967 21:57:36.078418 IMD small region:
1968 21:57:36.081011 IMD ROOT 0. 0x76ffec00 0x00000400
1969 21:57:36.084362 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1970 21:57:36.091090 POWER STATE 2. 0x76ffeb80 0x00000044
1971 21:57:36.094605 ROMSTAGE 3. 0x76ffeb60 0x00000004
1972 21:57:36.097712 MEM INFO 4. 0x76ffe980 0x000001e0
1973 21:57:36.104365 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1974 21:57:36.107864 MTRR: Physical address space:
1975 21:57:36.111290 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1976 21:57:36.114531
1977 21:57:36.118547 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1978 21:57:36.124850 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1979 21:57:36.131232 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1980 21:57:36.138071 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1981 21:57:36.144815 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1982 21:57:36.151424 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1983 21:57:36.154554 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 21:57:36.157990 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 21:57:36.161184 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 21:57:36.164426
1987 21:57:36.167981 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 21:57:36.171058 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 21:57:36.174225 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 21:57:36.177720 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 21:57:36.184267 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 21:57:36.187915 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 21:57:36.191435 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 21:57:36.194227 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 21:57:36.199269 call enable_fixed_mtrr()
1996 21:57:36.201877 CPU physical address size: 39 bits
1997 21:57:36.208654 MTRR: default type WB/UC MTRR counts: 6/6.
1998 21:57:36.211999 MTRR: UC selected as default type.
1999 21:57:36.218728 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2000 21:57:36.221569 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2001 21:57:36.228178 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2002 21:57:36.235093 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2003 21:57:36.241734 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2004 21:57:36.248397 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2005 21:57:36.248560
2006 21:57:36.251543 MTRR check
2007 21:57:36.255002 Fixed MTRRs : Enabled
2008 21:57:36.255159 Variable MTRRs: Enabled
2009 21:57:36.255227
2010 21:57:36.261545 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 21:57:36.265196 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 21:57:36.268303 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 21:57:36.271613 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 21:57:36.274614 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 21:57:36.278305
2016 21:57:36.281240 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 21:57:36.284601 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 21:57:36.288667 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 21:57:36.291811 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 21:57:36.297967 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 21:57:36.301587 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 21:57:36.307857 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2023 21:57:36.311135 call enable_fixed_mtrr()
2024 21:57:36.314405 Checking cr50 for pending updates
2025 21:57:36.319779 CPU physical address size: 39 bits
2026 21:57:36.322538 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 21:57:36.325866 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 21:57:36.329237 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 21:57:36.332737 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 21:57:36.339340 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 21:57:36.342254 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 21:57:36.345851 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 21:57:36.348758 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 21:57:36.355381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 21:57:36.359199 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 21:57:36.362502 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 21:57:36.365551 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 21:57:36.373224 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 21:57:36.376352 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 21:57:36.379610 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 21:57:36.382997 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 21:57:36.389536 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 21:57:36.392740 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 21:57:36.395932 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 21:57:36.399334 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 21:57:36.405797 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 21:57:36.409240 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 21:57:36.412538 call enable_fixed_mtrr()
2049 21:57:36.415894 call enable_fixed_mtrr()
2050 21:57:36.419623 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 21:57:36.422554 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 21:57:36.426321 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 21:57:36.433197 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 21:57:36.436103 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 21:57:36.439661 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 21:57:36.442739 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 21:57:36.445792 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 21:57:36.452826 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 21:57:36.455816 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 21:57:36.459439 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 21:57:36.462934 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 21:57:36.470687 MTRR: Fixed MSR 0x258 0x0606060606060606
2063 21:57:36.470888 call enable_fixed_mtrr()
2064 21:57:36.476749 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 21:57:36.480415 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 21:57:36.483660 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 21:57:36.487024 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 21:57:36.493415 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 21:57:36.496891 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 21:57:36.500303 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 21:57:36.503461 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 21:57:36.509698 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 21:57:36.513180 CPU physical address size: 39 bits
2074 21:57:36.516467 call enable_fixed_mtrr()
2075 21:57:36.519989 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 21:57:36.526912 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 21:57:36.529534 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 21:57:36.533574 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 21:57:36.536185 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 21:57:36.540086 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 21:57:36.543104
2082 21:57:36.546357 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 21:57:36.549975 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 21:57:36.552902 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 21:57:36.556075 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 21:57:36.562592 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 21:57:36.565851 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 21:57:36.572459 MTRR: Fixed MSR 0x258 0x0606060606060606
2089 21:57:36.575992 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 21:57:36.579333 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 21:57:36.582507 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 21:57:36.586146 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 21:57:36.592833 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 21:57:36.595874 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 21:57:36.599548 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 21:57:36.602773 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 21:57:36.609237 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 21:57:36.612635 call enable_fixed_mtrr()
2099 21:57:36.612834 call enable_fixed_mtrr()
2100 21:57:36.615732 CPU physical address size: 39 bits
2101 21:57:36.619096
2102 21:57:36.622351 CPU physical address size: 39 bits
2103 21:57:36.626078 CPU physical address size: 39 bits
2104 21:57:36.628999 CPU physical address size: 39 bits
2105 21:57:36.632609 CPU physical address size: 39 bits
2106 21:57:36.635659 Reading cr50 TPM mode
2107 21:57:36.646528 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2108 21:57:36.656024 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 21:57:36.659475 Checking segment from ROM address 0xffc02b38
2110 21:57:36.662659 Checking segment from ROM address 0xffc02b54
2111 21:57:36.669220 Loading segment from ROM address 0xffc02b38
2112 21:57:36.669421 code (compression=0)
2113 21:57:36.679296 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 21:57:36.685707 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 21:57:36.688930
2116 21:57:36.689041 it's not compressed!
2117 21:57:36.828695 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2118 21:57:36.835152 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2119 21:57:36.841735 Loading segment from ROM address 0xffc02b54
2120 21:57:36.841821 Entry Point 0x30000000
2121 21:57:36.845268 Loaded segments
2122 21:57:36.851835 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2123 21:57:36.894829 Finalizing chipset.
2124 21:57:36.897848 Finalizing SMM.
2125 21:57:36.897933 APMC done.
2126 21:57:36.905341 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2127 21:57:36.907837 mp_park_aps done after 0 msecs.
2128 21:57:36.911463 Jumping to boot code at 0x30000000(0x76b25000)
2129 21:57:36.921265 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2130 21:57:36.921356
2131 21:57:36.921425
2132 21:57:36.921509
2133 21:57:36.924822 Starting depthcharge on Voema...
2134 21:57:36.924907
2135 21:57:36.925270 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2136 21:57:36.925372 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2137 21:57:36.925455 Setting prompt string to ['volteer:']
2138 21:57:36.925579 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2139 21:57:36.934640 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2140 21:57:36.934729
2141 21:57:36.941293 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2142 21:57:36.941455
2143 21:57:36.944656 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2144 21:57:36.944742
2145 21:57:36.949172 Failed to find eMMC card reader
2146 21:57:36.949330
2147 21:57:36.952614 Wipe memory regions:
2148 21:57:36.952700
2149 21:57:36.955385 [0x00000000001000, 0x000000000a0000)
2150 21:57:36.955472
2151 21:57:36.959051 [0x00000000100000, 0x00000030000000)
2152 21:57:36.959221
2153 21:57:36.989191 [0x00000032662db0, 0x000000769ef000)
2154 21:57:36.989340
2155 21:57:37.027886 [0x00000100000000, 0x00000280400000)
2156 21:57:37.028016
2157 21:57:37.232240 ec_init: CrosEC protocol v3 supported (256, 256)
2158 21:57:37.232414
2159 21:57:37.239325 update_port_state: port C0 state: usb enable 1 mux conn 0
2160 21:57:37.239414
2161 21:57:37.245365 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2162 21:57:37.245450
2163 21:57:37.253407 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2164 21:57:37.253524
2165 21:57:37.256692 send_conn_disc_msg: pmc_send_cmd succeeded
2166 21:57:37.256776
2167 21:57:37.689221 R8152: Initializing
2168 21:57:37.689375
2169 21:57:37.692196 Version 9 (ocp_data = 6010)
2170 21:57:37.692280
2171 21:57:37.695386 R8152: Done initializing
2172 21:57:37.695470
2173 21:57:37.699279 Adding net device
2174 21:57:37.699362
2175 21:57:38.006184 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2176 21:57:38.006331
2177 21:57:38.006403
2178 21:57:38.006473
2179 21:57:38.009302 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2181 21:57:38.110159 volteer: tftpboot 192.168.201.1 8926127/tftp-deploy-cyc6ogma/kernel/bzImage 8926127/tftp-deploy-cyc6ogma/kernel/cmdline 8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
2182 21:57:38.110367 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2183 21:57:38.110476 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2184 21:57:38.114846 tftpboot 192.168.201.1 8926127/tftp-deploy-cyc6ogma/kernel/bzImy-cyc6ogma/kernel/cmdline 8926127/tftp-deploy-cyc6ogma/ramdisk/ramdisk.cpio.gz
2185 21:57:38.114936
2186 21:57:38.115003 Waiting for link
2187 21:57:38.115063
2188 21:57:38.317977 done.
2189 21:57:38.318178
2190 21:57:38.318265 MAC: 00:e0:4c:71:a6:42
2191 21:57:38.318352
2192 21:57:38.321630 Sending DHCP discover... done.
2193 21:57:38.321717
2194 21:57:38.324597 Waiting for reply... done.
2195 21:57:38.324682
2196 21:57:38.327899 Sending DHCP request... done.
2197 21:57:38.328004
2198 21:57:38.330940 Waiting for reply... done.
2199 21:57:38.331025
2200 21:57:38.334577 My ip is 192.168.201.18
2201 21:57:38.334662
2202 21:57:38.337876 The DHCP server ip is 192.168.201.1
2203 21:57:38.337963
2204 21:57:38.344324 TFTP server IP predefined by user: 192.168.201.1
2205 21:57:38.344414
2206 21:57:38.351748 Bootfile predefined by user: 8926127/tftp-deploy-cyc6ogma/kernel/bzImage
2207 21:57:38.351841
2208 21:57:38.354454 Sending tftp read request... done.
2209 21:57:38.354568
2210 21:57:38.357443 Waiting for the transfer...
2211 21:57:38.357594
2212 21:57:38.638601 00000000 ################################################################
2213 21:57:38.638761
2214 21:57:38.914817 00080000 ################################################################
2215 21:57:38.914972
2216 21:57:39.190007 00100000 ################################################################
2217 21:57:39.190167
2218 21:57:39.490910 00180000 ################################################################
2219 21:57:39.491060
2220 21:57:39.779348 00200000 ################################################################
2221 21:57:39.779503
2222 21:57:40.044829 00280000 ################################################################
2223 21:57:40.044980
2224 21:57:40.283106 00300000 ################################################################
2225 21:57:40.283259
2226 21:57:40.525398 00380000 ################################################################
2227 21:57:40.525553
2228 21:57:40.765646 00400000 ################################################################
2229 21:57:40.765794
2230 21:57:41.002755 00480000 ################################################################
2231 21:57:41.002931
2232 21:57:41.239621 00500000 ################################################################
2233 21:57:41.239770
2234 21:57:41.478098 00580000 ################################################################
2235 21:57:41.478246
2236 21:57:41.742514 00600000 ################################################################
2237 21:57:41.742663
2238 21:57:41.989026 00680000 ################################################################
2239 21:57:41.989179
2240 21:57:42.232704 00700000 ################################################################
2241 21:57:42.232862
2242 21:57:42.481179 00780000 ################################################################
2243 21:57:42.481328
2244 21:57:42.720524 00800000 ################################################################
2245 21:57:42.720675
2246 21:57:42.967778 00880000 ################################################################
2247 21:57:42.967925
2248 21:57:43.101126 00900000 ################################## done.
2249 21:57:43.101284
2250 21:57:43.104812 The bootfile was 9707520 bytes long.
2251 21:57:43.104922
2252 21:57:43.108186 Sending tftp read request... done.
2253 21:57:43.108272
2254 21:57:43.111152 Waiting for the transfer...
2255 21:57:43.111254
2256 21:57:43.355892 00000000 ################################################################
2257 21:57:43.356039
2258 21:57:43.591064 00080000 ################################################################
2259 21:57:43.591231
2260 21:57:43.825652 00100000 ################################################################
2261 21:57:43.825836
2262 21:57:44.079019 00180000 ################################################################
2263 21:57:44.079163
2264 21:57:44.356214 00200000 ################################################################
2265 21:57:44.356368
2266 21:57:44.636902 00280000 ################################################################
2267 21:57:44.637055
2268 21:57:44.915600 00300000 ################################################################
2269 21:57:44.915752
2270 21:57:45.189729 00380000 ################################################################
2271 21:57:45.189875
2272 21:57:45.463631 00400000 ################################################################
2273 21:57:45.463781
2274 21:57:45.738691 00480000 ################################################################
2275 21:57:45.738836
2276 21:57:46.014463 00500000 ################################################################
2277 21:57:46.014610
2278 21:57:46.258805 00580000 ################################################################
2279 21:57:46.258943
2280 21:57:46.494190 00600000 ################################################################
2281 21:57:46.494329
2282 21:57:46.730679 00680000 ################################################################
2283 21:57:46.730818
2284 21:57:46.969056 00700000 ################################################################
2285 21:57:46.969190
2286 21:57:47.206457 00780000 ################################################################
2287 21:57:47.206598
2288 21:57:47.291461 00800000 ######################## done.
2289 21:57:47.291572
2290 21:57:47.294897 Sending tftp read request... done.
2291 21:57:47.294983
2292 21:57:47.298624 Waiting for the transfer...
2293 21:57:47.298710
2294 21:57:47.301398 00000000 # done.
2295 21:57:47.301523
2296 21:57:47.308407 Command line loaded dynamically from TFTP file: 8926127/tftp-deploy-cyc6ogma/kernel/cmdline
2297 21:57:47.308492
2298 21:57:47.321343 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2299 21:57:47.321434
2300 21:57:47.330426 Shutting down all USB controllers.
2301 21:57:47.330511
2302 21:57:47.330583 Removing current net device
2303 21:57:47.330647
2304 21:57:47.333489 Finalizing coreboot
2305 21:57:47.333589
2306 21:57:47.340419 Exiting depthcharge with code 4 at timestamp: 19064355
2307 21:57:47.340504
2308 21:57:47.340571
2309 21:57:47.340631 Starting kernel ...
2310 21:57:47.340690
2311 21:57:47.340746
2312 21:57:47.340803
2313 21:57:47.341178 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2314 21:57:47.341276 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2315 21:57:47.341351 Setting prompt string to ['Linux version [0-9]']
2316 21:57:47.341424 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2317 21:57:47.341523 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2319 22:02:20.342455 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2321 22:02:20.343593 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2323 22:02:20.344444 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2326 22:02:20.345930 end: 2 depthcharge-action (duration 00:05:00) [common]
2328 22:02:20.346967 Cleaning after the job
2329 22:02:20.347051 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/ramdisk
2330 22:02:20.347726 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/kernel
2331 22:02:20.348416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926127/tftp-deploy-cyc6ogma/modules
2332 22:02:20.348605 start: 5.1 power-off (timeout 00:00:30) [common]
2333 22:02:20.348753 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2334 22:02:20.367645 >> Command sent successfully.
2335 22:02:20.369761 Returned 0 in 0 seconds
2336 22:02:20.470962 end: 5.1 power-off (duration 00:00:00) [common]
2338 22:02:20.472546 start: 5.2 read-feedback (timeout 00:10:00) [common]
2339 22:02:20.473814 Listened to connection for namespace 'common' for up to 1s
2340 22:02:21.478489 Finalising connection for namespace 'common'
2341 22:02:21.479276 Disconnecting from shell: Finalise
2342 22:02:21.580749 end: 5.2 read-feedback (duration 00:00:01) [common]
2343 22:02:21.581380 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8926127
2344 22:02:21.589911 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8926127
2345 22:02:21.590035 JobError: Your job cannot terminate cleanly.