Boot log: asus-C436FA-Flip-hatch

    1 21:57:15.465589  lava-dispatcher, installed at version: 2022.11
    2 21:57:15.465842  start: 0 validate
    3 21:57:15.465986  Start time: 2023-01-29 21:57:15.465978+00:00 (UTC)
    4 21:57:15.466131  Using caching service: 'http://localhost/cache/?uri=%s'
    5 21:57:15.466272  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
    6 21:57:15.757634  Using caching service: 'http://localhost/cache/?uri=%s'
    7 21:57:15.757820  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 21:57:16.049439  Using caching service: 'http://localhost/cache/?uri=%s'
    9 21:57:16.050157  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 21:57:16.346771  Using caching service: 'http://localhost/cache/?uri=%s'
   11 21:57:16.347472  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 21:57:16.650838  validate duration: 1.18
   14 21:57:16.652108  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 21:57:16.652655  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 21:57:16.653118  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 21:57:16.653611  Not decompressing ramdisk as can be used compressed.
   18 21:57:16.654032  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/initrd.cpio.gz
   19 21:57:16.654366  saving as /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/ramdisk/initrd.cpio.gz
   20 21:57:16.654706  total size: 5432079 (5MB)
   21 21:57:16.659613  progress   0% (0MB)
   22 21:57:16.667359  progress   5% (0MB)
   23 21:57:16.674395  progress  10% (0MB)
   24 21:57:16.679672  progress  15% (0MB)
   25 21:57:16.684125  progress  20% (1MB)
   26 21:57:16.687281  progress  25% (1MB)
   27 21:57:16.690139  progress  30% (1MB)
   28 21:57:16.692888  progress  35% (1MB)
   29 21:57:16.695264  progress  40% (2MB)
   30 21:57:16.697345  progress  45% (2MB)
   31 21:57:16.699387  progress  50% (2MB)
   32 21:57:16.701527  progress  55% (2MB)
   33 21:57:16.703306  progress  60% (3MB)
   34 21:57:16.705093  progress  65% (3MB)
   35 21:57:16.706956  progress  70% (3MB)
   36 21:57:16.708555  progress  75% (3MB)
   37 21:57:16.710144  progress  80% (4MB)
   38 21:57:16.711619  progress  85% (4MB)
   39 21:57:16.713231  progress  90% (4MB)
   40 21:57:16.714666  progress  95% (4MB)
   41 21:57:16.716133  progress 100% (5MB)
   42 21:57:16.716424  5MB downloaded in 0.06s (83.93MB/s)
   43 21:57:16.716586  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 21:57:16.716871  end: 1.1 download-retry (duration 00:00:00) [common]
   46 21:57:16.716970  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 21:57:16.717066  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 21:57:16.717180  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 21:57:16.717254  saving as /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/kernel/bzImage
   50 21:57:16.717321  total size: 9707520 (9MB)
   51 21:57:16.717387  No compression specified
   52 21:57:18.718759  progress   0% (0MB)
   53 21:57:18.722997  progress   5% (0MB)
   54 21:57:18.727296  progress  10% (0MB)
   55 21:57:18.730242  progress  15% (1MB)
   56 21:57:18.733025  progress  20% (1MB)
   57 21:57:18.735763  progress  25% (2MB)
   58 21:57:18.738259  progress  30% (2MB)
   59 21:57:18.740914  progress  35% (3MB)
   60 21:57:18.743534  progress  40% (3MB)
   61 21:57:18.746189  progress  45% (4MB)
   62 21:57:18.748840  progress  50% (4MB)
   63 21:57:18.751272  progress  55% (5MB)
   64 21:57:18.753879  progress  60% (5MB)
   65 21:57:18.756483  progress  65% (6MB)
   66 21:57:18.759029  progress  70% (6MB)
   67 21:57:18.761612  progress  75% (6MB)
   68 21:57:18.763995  progress  80% (7MB)
   69 21:57:18.766571  progress  85% (7MB)
   70 21:57:18.769194  progress  90% (8MB)
   71 21:57:18.771762  progress  95% (8MB)
   72 21:57:18.774370  progress 100% (9MB)
   73 21:57:18.774570  9MB downloaded in 2.06s (4.50MB/s)
   74 21:57:18.774730  end: 1.2.1 http-download (duration 00:00:02) [common]
   76 21:57:18.774990  end: 1.2 download-retry (duration 00:00:02) [common]
   77 21:57:18.775088  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 21:57:18.775185  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 21:57:18.775299  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/full.rootfs.tar.xz
   80 21:57:18.775400  saving as /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/nfsrootfs/full.rootfs.tar
   81 21:57:18.775497  total size: 133327304 (127MB)
   82 21:57:18.775594  Using unxz to decompress xz
   83 21:57:18.779100  progress   0% (0MB)
   84 21:57:19.149756  progress   5% (6MB)
   85 21:57:19.558663  progress  10% (12MB)
   86 21:57:19.879478  progress  15% (19MB)
   87 21:57:20.109863  progress  20% (25MB)
   88 21:57:20.401249  progress  25% (31MB)
   89 21:57:20.786178  progress  30% (38MB)
   90 21:57:21.184593  progress  35% (44MB)
   91 21:57:21.629251  progress  40% (50MB)
   92 21:57:22.053242  progress  45% (57MB)
   93 21:57:22.452746  progress  50% (63MB)
   94 21:57:22.872466  progress  55% (69MB)
   95 21:57:23.281172  progress  60% (76MB)
   96 21:57:23.685853  progress  65% (82MB)
   97 21:57:24.095810  progress  70% (89MB)
   98 21:57:24.504223  progress  75% (95MB)
   99 21:57:24.992664  progress  80% (101MB)
  100 21:57:25.474626  progress  85% (108MB)
  101 21:57:25.782333  progress  90% (114MB)
  102 21:57:26.171517  progress  95% (120MB)
  103 21:57:26.614174  progress 100% (127MB)
  104 21:57:26.621293  127MB downloaded in 7.85s (16.21MB/s)
  105 21:57:26.621577  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 21:57:26.621871  end: 1.3 download-retry (duration 00:00:08) [common]
  108 21:57:26.621979  start: 1.4 download-retry (timeout 00:09:50) [common]
  109 21:57:26.622081  start: 1.4.1 http-download (timeout 00:09:50) [common]
  110 21:57:26.622211  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 21:57:26.622292  saving as /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/modules/modules.tar
  112 21:57:26.622363  total size: 64732 (0MB)
  113 21:57:26.622433  Using unxz to decompress xz
  114 21:57:26.625932  progress  50% (0MB)
  115 21:57:26.626337  progress 100% (0MB)
  116 21:57:26.630963  0MB downloaded in 0.01s (7.18MB/s)
  117 21:57:26.631208  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 21:57:26.631490  end: 1.4 download-retry (duration 00:00:00) [common]
  120 21:57:26.631595  start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
  121 21:57:26.631705  start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
  122 21:57:27.992218  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8926102/extract-nfsrootfs-2vuf1wdg
  123 21:57:27.992450  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  124 21:57:27.992567  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  125 21:57:27.992719  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x
  126 21:57:27.992835  makedir: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin
  127 21:57:27.992930  makedir: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/tests
  128 21:57:27.993022  makedir: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/results
  129 21:57:27.993130  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-add-keys
  130 21:57:27.993276  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-add-sources
  131 21:57:27.993406  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-background-process-start
  132 21:57:27.993534  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-background-process-stop
  133 21:57:27.993659  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-common-functions
  134 21:57:27.993784  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-echo-ipv4
  135 21:57:27.993908  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-install-packages
  136 21:57:27.994030  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-installed-packages
  137 21:57:27.994151  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-os-build
  138 21:57:27.994278  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-probe-channel
  139 21:57:27.994460  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-probe-ip
  140 21:57:27.994603  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-target-ip
  141 21:57:27.994734  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-target-mac
  142 21:57:27.994859  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-target-storage
  143 21:57:27.994985  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-case
  144 21:57:27.995112  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-event
  145 21:57:27.995234  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-feedback
  146 21:57:27.995356  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-raise
  147 21:57:27.995477  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-reference
  148 21:57:27.995599  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-runner
  149 21:57:27.995720  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-set
  150 21:57:27.995841  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-test-shell
  151 21:57:27.995965  Updating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-install-packages (oe)
  152 21:57:27.996101  Updating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/bin/lava-installed-packages (oe)
  153 21:57:27.996213  Creating /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/environment
  154 21:57:27.996309  LAVA metadata
  155 21:57:27.996384  - LAVA_JOB_ID=8926102
  156 21:57:27.996456  - LAVA_DISPATCHER_IP=192.168.201.1
  157 21:57:27.996597  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  158 21:57:27.996703  skipped lava-vland-overlay
  159 21:57:27.996796  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 21:57:27.996891  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  161 21:57:27.996963  skipped lava-multinode-overlay
  162 21:57:27.997048  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 21:57:27.997142  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  164 21:57:27.997225  Loading test definitions
  165 21:57:27.997327  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  166 21:57:27.997408  Using /lava-8926102 at stage 0
  167 21:57:27.997698  uuid=8926102_1.5.2.3.1 testdef=None
  168 21:57:27.997800  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  169 21:57:27.997898  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  170 21:57:27.998425  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  172 21:57:27.998704  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  173 21:57:27.999346  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  175 21:57:27.999617  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  176 21:57:28.000305  runner path: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/0/tests/0_dmesg test_uuid 8926102_1.5.2.3.1
  177 21:57:28.000470  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  179 21:57:28.000761  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
  180 21:57:28.000847  Using /lava-8926102 at stage 1
  181 21:57:28.001119  uuid=8926102_1.5.2.3.5 testdef=None
  182 21:57:28.001220  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  183 21:57:28.001320  start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
  184 21:57:28.001817  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  186 21:57:28.002075  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
  187 21:57:28.002748  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  189 21:57:28.003018  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
  190 21:57:28.003634  runner path: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/1/tests/1_bootrr test_uuid 8926102_1.5.2.3.5
  191 21:57:28.003793  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  193 21:57:28.004034  Creating lava-test-runner.conf files
  194 21:57:28.004118  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/0 for stage 0
  195 21:57:28.004212  - 0_dmesg
  196 21:57:28.004296  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926102/lava-overlay-4d27o57x/lava-8926102/1 for stage 1
  197 21:57:28.004389  - 1_bootrr
  198 21:57:28.004492  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  199 21:57:28.004611  start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
  200 21:57:28.010763  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  201 21:57:28.010883  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
  202 21:57:28.010984  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  203 21:57:28.011085  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  204 21:57:28.011184  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
  205 21:57:28.124854  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  206 21:57:28.125228  start: 1.5.4 extract-modules (timeout 00:09:49) [common]
  207 21:57:28.125358  extracting modules file /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926102/extract-nfsrootfs-2vuf1wdg
  208 21:57:28.129808  extracting modules file /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926102/extract-overlay-ramdisk-iqoqp3ch/ramdisk
  209 21:57:28.134017  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  210 21:57:28.134145  start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
  211 21:57:28.134242  [common] Applying overlay to NFS
  212 21:57:28.134322  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8926102/compress-overlay-q90fw4dg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8926102/extract-nfsrootfs-2vuf1wdg
  213 21:57:28.138551  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  214 21:57:28.138676  start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
  215 21:57:28.138782  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  216 21:57:28.138885  start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
  217 21:57:28.138973  Building ramdisk /var/lib/lava/dispatcher/tmp/8926102/extract-overlay-ramdisk-iqoqp3ch/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8926102/extract-overlay-ramdisk-iqoqp3ch/ramdisk
  218 21:57:28.176012  >> 24777 blocks

  219 21:57:28.693376  rename /var/lib/lava/dispatcher/tmp/8926102/extract-overlay-ramdisk-iqoqp3ch/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
  220 21:57:28.693819  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  221 21:57:28.693958  start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
  222 21:57:28.694074  start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
  223 21:57:28.694188  No mkimage arch provided, not using FIT.
  224 21:57:28.694292  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  225 21:57:28.694391  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  226 21:57:28.694500  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  227 21:57:28.694602  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
  228 21:57:28.694691  No LXC device requested
  229 21:57:28.694781  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  230 21:57:28.694882  start: 1.7 deploy-device-env (timeout 00:09:48) [common]
  231 21:57:28.694972  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  232 21:57:28.695051  Checking files for TFTP limit of 4294967296 bytes.
  233 21:57:28.695478  end: 1 tftp-deploy (duration 00:00:12) [common]
  234 21:57:28.695601  start: 2 depthcharge-action (timeout 00:05:00) [common]
  235 21:57:28.695709  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  236 21:57:28.695851  substitutions:
  237 21:57:28.695928  - {DTB}: None
  238 21:57:28.696000  - {INITRD}: 8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
  239 21:57:28.696081  - {KERNEL}: 8926102/tftp-deploy-crtlhq1u/kernel/bzImage
  240 21:57:28.696153  - {LAVA_MAC}: None
  241 21:57:28.696219  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8926102/extract-nfsrootfs-2vuf1wdg
  242 21:57:28.696287  - {NFS_SERVER_IP}: 192.168.201.1
  243 21:57:28.696354  - {PRESEED_CONFIG}: None
  244 21:57:28.696434  - {PRESEED_LOCAL}: None
  245 21:57:28.696500  - {RAMDISK}: 8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
  246 21:57:28.696564  - {ROOT_PART}: None
  247 21:57:28.696629  - {ROOT}: None
  248 21:57:28.696692  - {SERVER_IP}: 192.168.201.1
  249 21:57:28.696755  - {TEE}: None
  250 21:57:28.696818  Parsed boot commands:
  251 21:57:28.696881  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  252 21:57:28.697055  Parsed boot commands: tftpboot 192.168.201.1 8926102/tftp-deploy-crtlhq1u/kernel/bzImage 8926102/tftp-deploy-crtlhq1u/kernel/cmdline 8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
  253 21:57:28.697161  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  254 21:57:28.697263  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  255 21:57:28.697369  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  256 21:57:28.697469  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  257 21:57:28.697553  Not connected, no need to disconnect.
  258 21:57:28.697644  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  259 21:57:28.697743  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  260 21:57:28.697821  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
  261 21:57:28.701059  Setting prompt string to ['lava-test: # ']
  262 21:57:28.701446  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  263 21:57:28.701568  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  264 21:57:28.701683  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  265 21:57:28.701792  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  266 21:57:28.701999  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  267 21:57:28.723861  >> Command sent successfully.

  268 21:57:28.726145  Returned 0 in 0 seconds
  269 21:57:28.826951  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  271 21:57:28.827315  end: 2.2.2 reset-device (duration 00:00:00) [common]
  272 21:57:28.827431  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  273 21:57:28.827531  Setting prompt string to 'Starting depthcharge on Helios...'
  274 21:57:28.827607  Changing prompt to 'Starting depthcharge on Helios...'
  275 21:57:28.827693  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  276 21:57:28.828004  [Enter `^Ec?' for help]
  277 21:57:35.575333  
  278 21:57:35.575511  
  279 21:57:35.584952  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  280 21:57:35.587938  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  281 21:57:35.594782  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  282 21:57:35.598363  CPU: AES supported, TXT NOT supported, VT supported
  283 21:57:35.604882  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  284 21:57:35.608442  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  285 21:57:35.614887  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  286 21:57:35.618547  VBOOT: Loading verstage.
  287 21:57:35.621346  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  288 21:57:35.628045  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  289 21:57:35.631482  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  290 21:57:35.635215  CBFS @ c08000 size 3f8000
  291 21:57:35.641696  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  292 21:57:35.644757  CBFS: Locating 'fallback/verstage'
  293 21:57:35.648164  CBFS: Found @ offset 10fb80 size 1072c
  294 21:57:35.651635  
  295 21:57:35.651736  
  296 21:57:35.661908  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  297 21:57:35.676197  Probing TPM: . done!
  298 21:57:35.679669  TPM ready after 0 ms
  299 21:57:35.682596  Connected to device vid:did:rid of 1ae0:0028:00
  300 21:57:35.693209  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  301 21:57:35.696064  Initialized TPM device CR50 revision 0
  302 21:57:35.739188  tlcl_send_startup: Startup return code is 0
  303 21:57:35.739302  TPM: setup succeeded
  304 21:57:35.751574  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  305 21:57:35.755754  Chrome EC: UHEPI supported
  306 21:57:35.758983  Phase 1
  307 21:57:35.761903  FMAP: area GBB found @ c05000 (12288 bytes)
  308 21:57:35.768879  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  309 21:57:35.768978  Phase 2
  310 21:57:35.772325  
  311 21:57:35.772422  Phase 3
  312 21:57:35.775338  FMAP: area GBB found @ c05000 (12288 bytes)
  313 21:57:35.782289  VB2:vb2_report_dev_firmware() This is developer signed firmware
  314 21:57:35.788561  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  315 21:57:35.792045  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  316 21:57:35.798320  VB2:vb2_verify_keyblock() Checking keyblock signature...
  317 21:57:35.814335  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  318 21:57:35.817369  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  319 21:57:35.824353  VB2:vb2_verify_fw_preamble() Verifying preamble.
  320 21:57:35.828350  Phase 4
  321 21:57:35.831497  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  322 21:57:35.838465  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  323 21:57:36.018167  VB2:vb2_rsa_verify_digest() Digest check failed!
  324 21:57:36.021098  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  325 21:57:36.024634  
  326 21:57:36.024729  Saving nvdata
  327 21:57:36.027703  Reboot requested (10020007)
  328 21:57:36.031215  board_reset() called!
  329 21:57:36.031309  full_reset() called!
  330 21:57:40.542235  
  331 21:57:40.542430  
  332 21:57:40.551683  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  333 21:57:40.555109  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  334 21:57:40.561589  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  335 21:57:40.565220  CPU: AES supported, TXT NOT supported, VT supported
  336 21:57:40.571680  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  337 21:57:40.574506  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  338 21:57:40.581335  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  339 21:57:40.584869  VBOOT: Loading verstage.
  340 21:57:40.587922  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  341 21:57:40.594633  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  342 21:57:40.601148  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  343 21:57:40.601275  CBFS @ c08000 size 3f8000
  344 21:57:40.608095  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  345 21:57:40.611220  CBFS: Locating 'fallback/verstage'
  346 21:57:40.614716  CBFS: Found @ offset 10fb80 size 1072c
  347 21:57:40.618891  
  348 21:57:40.618988  
  349 21:57:40.628351  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  350 21:57:40.642547  Probing TPM: . done!
  351 21:57:40.646044  TPM ready after 0 ms
  352 21:57:40.649296  Connected to device vid:did:rid of 1ae0:0028:00
  353 21:57:40.659412  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  354 21:57:40.663143  Initialized TPM device CR50 revision 0
  355 21:57:40.705620  tlcl_send_startup: Startup return code is 0
  356 21:57:40.705783  TPM: setup succeeded
  357 21:57:40.718506  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  358 21:57:40.722200  Chrome EC: UHEPI supported
  359 21:57:40.725563  Phase 1
  360 21:57:40.728552  FMAP: area GBB found @ c05000 (12288 bytes)
  361 21:57:40.735205  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  362 21:57:40.742332  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  363 21:57:40.745238  Recovery requested (1009000e)
  364 21:57:40.745334  Saving nvdata
  365 21:57:40.751378  
  366 21:57:40.757490  tlcl_extend: response is 0
  367 21:57:40.765864  tlcl_extend: response is 0
  368 21:57:40.773245  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  369 21:57:40.776090  CBFS @ c08000 size 3f8000
  370 21:57:40.782573  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  371 21:57:40.786411  CBFS: Locating 'fallback/romstage'
  372 21:57:40.789489  CBFS: Found @ offset 80 size 145fc
  373 21:57:40.793025  Accumulated console time in verstage 98 ms
  374 21:57:40.793121  
  375 21:57:40.793197  
  376 21:57:40.805996  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  377 21:57:40.812729  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  378 21:57:40.815998  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  379 21:57:40.819679  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  380 21:57:40.826249  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  381 21:57:40.829043  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  382 21:57:40.832556  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  383 21:57:40.836149  TCO_STS:   0000 0000
  384 21:57:40.839109  GEN_PMCON: e0015238 00000200
  385 21:57:40.842498  GBLRST_CAUSE: 00000000 00000000
  386 21:57:40.842597  prev_sleep_state 5
  387 21:57:40.846278  Boot Count incremented to 43513
  388 21:57:40.853234  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  389 21:57:40.855760  CBFS @ c08000 size 3f8000
  390 21:57:40.859344  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  391 21:57:40.862984  
  392 21:57:40.863080  CBFS: Locating 'fspm.bin'
  393 21:57:40.866304  CBFS: Found @ offset 5ffc0 size 71000
  394 21:57:40.870331  Chrome EC: UHEPI supported
  395 21:57:40.877162  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  396 21:57:40.882436  Probing TPM:  done!
  397 21:57:40.889476  Connected to device vid:did:rid of 1ae0:0028:00
  398 21:57:40.899286  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  399 21:57:40.905225  Initialized TPM device CR50 revision 0
  400 21:57:40.914508  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  401 21:57:40.920645  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  402 21:57:40.924155  MRC cache found, size 1948
  403 21:57:40.927157  bootmode is set to: 2
  404 21:57:40.930821  PRMRR disabled by config.
  405 21:57:40.930917  SPD INDEX = 1
  406 21:57:40.937500  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  407 21:57:40.940340  CBFS @ c08000 size 3f8000
  408 21:57:40.943914  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  409 21:57:40.947566  
  410 21:57:40.947663  CBFS: Locating 'spd.bin'
  411 21:57:40.950529  CBFS: Found @ offset 5fb80 size 400
  412 21:57:40.953962  SPD: module type is LPDDR3
  413 21:57:40.956944  SPD: module part is 
  414 21:57:40.963614  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  415 21:57:40.967548  SPD: device width 4 bits, bus width 8 bits
  416 21:57:40.970388  SPD: module size is 4096 MB (per channel)
  417 21:57:40.974085  memory slot: 0 configuration done.
  418 21:57:40.976721  memory slot: 2 configuration done.
  419 21:57:41.029244  CBMEM:
  420 21:57:41.032164  IMD: root @ 99fff000 254 entries.
  421 21:57:41.035810  IMD: root @ 99ffec00 62 entries.
  422 21:57:41.038747  External stage cache:
  423 21:57:41.042211  IMD: root @ 9abff000 254 entries.
  424 21:57:41.045265  IMD: root @ 9abfec00 62 entries.
  425 21:57:41.048823  Chrome EC: clear events_b mask to 0x0000000020004000
  426 21:57:41.052473  
  427 21:57:41.064612  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  428 21:57:41.075364  tlcl_write: response is 0
  429 21:57:41.087203  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  430 21:57:41.093593  MRC: TPM MRC hash updated successfully.
  431 21:57:41.093692  2 DIMMs found
  432 21:57:41.097102  SMM Memory Map
  433 21:57:41.100017  SMRAM       : 0x9a000000 0x1000000
  434 21:57:41.103577   Subregion 0: 0x9a000000 0xa00000
  435 21:57:41.107141   Subregion 1: 0x9aa00000 0x200000
  436 21:57:41.110793   Subregion 2: 0x9ac00000 0x400000
  437 21:57:41.114012  top_of_ram = 0x9a000000
  438 21:57:41.116989  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  439 21:57:41.123605  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  440 21:57:41.126945  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  441 21:57:41.133637  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  442 21:57:41.137074  CBFS @ c08000 size 3f8000
  443 21:57:41.140324  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  444 21:57:41.143710  CBFS: Locating 'fallback/postcar'
  445 21:57:41.147365  CBFS: Found @ offset 107000 size 4b44
  446 21:57:41.153353  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  447 21:57:41.165417  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  448 21:57:41.169038  Processing 180 relocs. Offset value of 0x97c0c000
  449 21:57:41.177130  Accumulated console time in romstage 286 ms
  450 21:57:41.177228  
  451 21:57:41.177306  
  452 21:57:41.187197  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  453 21:57:41.193851  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  454 21:57:41.197545  CBFS @ c08000 size 3f8000
  455 21:57:41.200215  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  456 21:57:41.207254  CBFS: Locating 'fallback/ramstage'
  457 21:57:41.210463  CBFS: Found @ offset 43380 size 1b9e8
  458 21:57:41.216757  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  459 21:57:41.249016  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  460 21:57:41.252031  Processing 3976 relocs. Offset value of 0x98db0000
  461 21:57:41.258783  Accumulated console time in postcar 52 ms
  462 21:57:41.258881  
  463 21:57:41.258959  
  464 21:57:41.268886  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  465 21:57:41.275573  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  466 21:57:41.279297  WARNING: RO_VPD is uninitialized or empty.
  467 21:57:41.282024  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  468 21:57:41.289002  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  469 21:57:41.289100  Normal boot.
  470 21:57:41.295520  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  471 21:57:41.299088  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  472 21:57:41.301961  CBFS @ c08000 size 3f8000
  473 21:57:41.308489  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  474 21:57:41.311948  CBFS: Locating 'cpu_microcode_blob.bin'
  475 21:57:41.315415  CBFS: Found @ offset 14700 size 2ec00
  476 21:57:41.318840  microcode: sig=0x806ec pf=0x4 revision=0xc9
  477 21:57:41.322256  Skip microcode update
  478 21:57:41.325082  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 21:57:41.328577  
  480 21:57:41.328675  CBFS @ c08000 size 3f8000
  481 21:57:41.335133  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  482 21:57:41.338219  CBFS: Locating 'fsps.bin'
  483 21:57:41.341802  CBFS: Found @ offset d1fc0 size 35000
  484 21:57:41.367146  Detected 4 core, 8 thread CPU.
  485 21:57:41.370628  Setting up SMI for CPU
  486 21:57:41.373479  IED base = 0x9ac00000
  487 21:57:41.373576  IED size = 0x00400000
  488 21:57:41.377133  Will perform SMM setup.
  489 21:57:41.383604  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  490 21:57:41.390042  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  491 21:57:41.393517  Processing 16 relocs. Offset value of 0x00030000
  492 21:57:41.397006  Attempting to start 7 APs
  493 21:57:41.400723  Waiting for 10ms after sending INIT.
  494 21:57:41.416728  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
  495 21:57:41.416836  done.
  496 21:57:41.420104  AP: slot 4 apic_id 2.
  497 21:57:41.423650  AP: slot 1 apic_id 3.
  498 21:57:41.423746  AP: slot 6 apic_id 5.
  499 21:57:41.426665  AP: slot 5 apic_id 4.
  500 21:57:41.430086  AP: slot 7 apic_id 7.
  501 21:57:41.430183  AP: slot 3 apic_id 6.
  502 21:57:41.436834  Waiting for 2nd SIPI to complete...done.
  503 21:57:41.443272  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  504 21:57:41.446360  Processing 13 relocs. Offset value of 0x00038000
  505 21:57:41.449926  
  506 21:57:41.452955  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  507 21:57:41.459970  Installing SMM handler to 0x9a000000
  508 21:57:41.466477  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  509 21:57:41.469955  Processing 658 relocs. Offset value of 0x9a010000
  510 21:57:41.479848  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  511 21:57:41.482851  Processing 13 relocs. Offset value of 0x9a008000
  512 21:57:41.489545  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  513 21:57:41.496443  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  514 21:57:41.499488  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  515 21:57:41.506646  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  516 21:57:41.513180  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  517 21:57:41.519674  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  518 21:57:41.523102  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  519 21:57:41.529484  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  520 21:57:41.533034  Clearing SMI status registers
  521 21:57:41.536172  SMI_STS: PM1 
  522 21:57:41.536272  PM1_STS: PWRBTN 
  523 21:57:41.539728  TCO_STS: SECOND_TO 
  524 21:57:41.542832  New SMBASE 0x9a000000
  525 21:57:41.546321  In relocation handler: CPU 0
  526 21:57:41.549213  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  527 21:57:41.552857  Writing SMRR. base = 0x9a000006, mask=0xff000800
  528 21:57:41.556015  Relocation complete.
  529 21:57:41.559669  New SMBASE 0x99fff800
  530 21:57:41.559765  In relocation handler: CPU 2
  531 21:57:41.566111  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  532 21:57:41.569212  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 21:57:41.572775  Relocation complete.
  534 21:57:41.576276  New SMBASE 0x99ffec00
  535 21:57:41.576373  In relocation handler: CPU 5
  536 21:57:41.582985  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  537 21:57:41.585950  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 21:57:41.589280  Relocation complete.
  539 21:57:41.589375  New SMBASE 0x99ffe800
  540 21:57:41.592781  In relocation handler: CPU 6
  541 21:57:41.599368  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  542 21:57:41.602305  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 21:57:41.605973  Relocation complete.
  544 21:57:41.606096  New SMBASE 0x99fff000
  545 21:57:41.609063  In relocation handler: CPU 4
  546 21:57:41.615952  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  547 21:57:41.619146  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 21:57:41.622370  Relocation complete.
  549 21:57:41.622466  New SMBASE 0x99fffc00
  550 21:57:41.626048  In relocation handler: CPU 1
  551 21:57:41.628825  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  552 21:57:41.635563  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 21:57:41.639098  Relocation complete.
  554 21:57:41.639195  New SMBASE 0x99ffe400
  555 21:57:41.642070  In relocation handler: CPU 7
  556 21:57:41.645443  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  557 21:57:41.652342  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 21:57:41.655325  Relocation complete.
  559 21:57:41.655420  New SMBASE 0x99fff400
  560 21:57:41.658900  In relocation handler: CPU 3
  561 21:57:41.661868  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  562 21:57:41.668963  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 21:57:41.669059  Relocation complete.
  564 21:57:41.672006  Initializing CPU #0
  565 21:57:41.675490  CPU: vendor Intel device 806ec
  566 21:57:41.678499  CPU: family 06, model 8e, stepping 0c
  567 21:57:41.682104  Clearing out pending MCEs
  568 21:57:41.685663  Setting up local APIC...
  569 21:57:41.685758   apic_id: 0x00 done.
  570 21:57:41.688562  Turbo is available but hidden
  571 21:57:41.691989  Turbo is available and visible
  572 21:57:41.695086  VMX status: enabled
  573 21:57:41.698382  IA32_FEATURE_CONTROL status: locked
  574 21:57:41.702084  Skip microcode update
  575 21:57:41.702181  CPU #0 initialized
  576 21:57:41.704936  Initializing CPU #2
  577 21:57:41.708509  Initializing CPU #4
  578 21:57:41.708605  Initializing CPU #1
  579 21:57:41.711504  CPU: vendor Intel device 806ec
  580 21:57:41.714920  CPU: family 06, model 8e, stepping 0c
  581 21:57:41.718384  CPU: vendor Intel device 806ec
  582 21:57:41.722059  CPU: family 06, model 8e, stepping 0c
  583 21:57:41.724838  Clearing out pending MCEs
  584 21:57:41.728352  Clearing out pending MCEs
  585 21:57:41.731783  Setting up local APIC...
  586 21:57:41.731892  Initializing CPU #5
  587 21:57:41.735114  Initializing CPU #6
  588 21:57:41.738030  CPU: vendor Intel device 806ec
  589 21:57:41.741681  CPU: family 06, model 8e, stepping 0c
  590 21:57:41.744806  CPU: vendor Intel device 806ec
  591 21:57:41.748362  CPU: family 06, model 8e, stepping 0c
  592 21:57:41.751301  Clearing out pending MCEs
  593 21:57:41.754836  Clearing out pending MCEs
  594 21:57:41.754936  Setting up local APIC...
  595 21:57:41.757936  CPU: vendor Intel device 806ec
  596 21:57:41.764507  CPU: family 06, model 8e, stepping 0c
  597 21:57:41.764617  Clearing out pending MCEs
  598 21:57:41.768196   apic_id: 0x04 done.
  599 21:57:41.771220  Setting up local APIC...
  600 21:57:41.771319  Initializing CPU #7
  601 21:57:41.774756  Initializing CPU #3
  602 21:57:41.777721  CPU: vendor Intel device 806ec
  603 21:57:41.781077  CPU: family 06, model 8e, stepping 0c
  604 21:57:41.784651   apic_id: 0x05 done.
  605 21:57:41.784751  VMX status: enabled
  606 21:57:41.787762  VMX status: enabled
  607 21:57:41.791246  IA32_FEATURE_CONTROL status: locked
  608 21:57:41.794721  IA32_FEATURE_CONTROL status: locked
  609 21:57:41.797646  Skip microcode update
  610 21:57:41.797753  Skip microcode update
  611 21:57:41.801091  CPU #5 initialized
  612 21:57:41.804569  CPU #6 initialized
  613 21:57:41.804680  Setting up local APIC...
  614 21:57:41.807544  Clearing out pending MCEs
  615 21:57:41.811183  CPU: vendor Intel device 806ec
  616 21:57:41.814621  CPU: family 06, model 8e, stepping 0c
  617 21:57:41.817644  Setting up local APIC...
  618 21:57:41.821205   apic_id: 0x01 done.
  619 21:57:41.821323   apic_id: 0x07 done.
  620 21:57:41.824141  Clearing out pending MCEs
  621 21:57:41.827772  VMX status: enabled
  622 21:57:41.827866  Setting up local APIC...
  623 21:57:41.831101  
  624 21:57:41.831198  VMX status: enabled
  625 21:57:41.834653  IA32_FEATURE_CONTROL status: locked
  626 21:57:41.837821   apic_id: 0x06 done.
  627 21:57:41.841197  Skip microcode update
  628 21:57:41.841297  VMX status: enabled
  629 21:57:41.844170  CPU #7 initialized
  630 21:57:41.847788  IA32_FEATURE_CONTROL status: locked
  631 21:57:41.847886   apic_id: 0x02 done.
  632 21:57:41.851257  Setting up local APIC...
  633 21:57:41.854199  Skip microcode update
  634 21:57:41.854294  VMX status: enabled
  635 21:57:41.857721  
  636 21:57:41.857818   apic_id: 0x03 done.
  637 21:57:41.860671  IA32_FEATURE_CONTROL status: locked
  638 21:57:41.864316  VMX status: enabled
  639 21:57:41.867404  Skip microcode update
  640 21:57:41.870899  IA32_FEATURE_CONTROL status: locked
  641 21:57:41.870996  CPU #4 initialized
  642 21:57:41.874725  Skip microcode update
  643 21:57:41.877971  IA32_FEATURE_CONTROL status: locked
  644 21:57:41.880817  CPU #3 initialized
  645 21:57:41.880914  CPU #1 initialized
  646 21:57:41.884272  Skip microcode update
  647 21:57:41.884384  CPU #2 initialized
  648 21:57:41.890957  bsp_do_flight_plan done after 452 msecs.
  649 21:57:41.893990  CPU: frequency set to 4200 MHz
  650 21:57:41.894105  Enabling SMIs.
  651 21:57:41.894182  Locking SMM.
  652 21:57:41.897315  
  653 21:57:41.910921  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  654 21:57:41.913867  CBFS @ c08000 size 3f8000
  655 21:57:41.920427  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  656 21:57:41.920528  CBFS: Locating 'vbt.bin'
  657 21:57:41.924033  CBFS: Found @ offset 5f5c0 size 499
  658 21:57:41.930831  Found a VBT of 4608 bytes after decompression
  659 21:57:42.112767  Display FSP Version Info HOB
  660 21:57:42.116025  Reference Code - CPU = 9.0.1e.30
  661 21:57:42.119100  uCode Version = 0.0.0.ca
  662 21:57:42.122540  TXT ACM version = ff.ff.ff.ffff
  663 21:57:42.126140  Display FSP Version Info HOB
  664 21:57:42.129173  Reference Code - ME = 9.0.1e.30
  665 21:57:42.132574  MEBx version = 0.0.0.0
  666 21:57:42.136073  ME Firmware Version = Consumer SKU
  667 21:57:42.139178  Display FSP Version Info HOB
  668 21:57:42.142478  Reference Code - CML PCH = 9.0.1e.30
  669 21:57:42.142576  PCH-CRID Status = Disabled
  670 21:57:42.146297  
  671 21:57:42.149192  PCH-CRID Original Value = ff.ff.ff.ffff
  672 21:57:42.152655  PCH-CRID New Value = ff.ff.ff.ffff
  673 21:57:42.155617  OPROM - RST - RAID = ff.ff.ff.ffff
  674 21:57:42.159375  ChipsetInit Base Version = ff.ff.ff.ffff
  675 21:57:42.162290  ChipsetInit Oem Version = ff.ff.ff.ffff
  676 21:57:42.165956  Display FSP Version Info HOB
  677 21:57:42.172079  Reference Code - SA - System Agent = 9.0.1e.30
  678 21:57:42.175620  Reference Code - MRC = 0.7.1.6c
  679 21:57:42.175718  SA - PCIe Version = 9.0.1e.30
  680 21:57:42.179219  SA-CRID Status = Disabled
  681 21:57:42.182468  SA-CRID Original Value = 0.0.0.c
  682 21:57:42.185866  SA-CRID New Value = 0.0.0.c
  683 21:57:42.188796  OPROM - VBIOS = ff.ff.ff.ffff
  684 21:57:42.192333  RTC Init
  685 21:57:42.195236  Set power on after power failure.
  686 21:57:42.195333  Disabling Deep S3
  687 21:57:42.198726  Disabling Deep S3
  688 21:57:42.198822  Disabling Deep S4
  689 21:57:42.202254  Disabling Deep S4
  690 21:57:42.202351  Disabling Deep S5
  691 21:57:42.205291  Disabling Deep S5
  692 21:57:42.211998  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
  693 21:57:42.212109  Enumerating buses...
  694 21:57:42.218427  Show all devs... Before device enumeration.
  695 21:57:42.218571  Root Device: enabled 1
  696 21:57:42.222027  CPU_CLUSTER: 0: enabled 1
  697 21:57:42.225077  DOMAIN: 0000: enabled 1
  698 21:57:42.228595  APIC: 00: enabled 1
  699 21:57:42.228693  PCI: 00:00.0: enabled 1
  700 21:57:42.231987  PCI: 00:02.0: enabled 1
  701 21:57:42.234934  PCI: 00:04.0: enabled 0
  702 21:57:42.238483  PCI: 00:05.0: enabled 0
  703 21:57:42.238584  PCI: 00:12.0: enabled 1
  704 21:57:42.241678  PCI: 00:12.5: enabled 0
  705 21:57:42.245217  PCI: 00:12.6: enabled 0
  706 21:57:42.245316  PCI: 00:14.0: enabled 1
  707 21:57:42.248914  PCI: 00:14.1: enabled 0
  708 21:57:42.251787  PCI: 00:14.3: enabled 1
  709 21:57:42.255520  PCI: 00:14.5: enabled 0
  710 21:57:42.255619  PCI: 00:15.0: enabled 1
  711 21:57:42.258684  PCI: 00:15.1: enabled 1
  712 21:57:42.262061  PCI: 00:15.2: enabled 0
  713 21:57:42.265160  PCI: 00:15.3: enabled 0
  714 21:57:42.265256  PCI: 00:16.0: enabled 1
  715 21:57:42.268072  PCI: 00:16.1: enabled 0
  716 21:57:42.271551  PCI: 00:16.2: enabled 0
  717 21:57:42.275193  PCI: 00:16.3: enabled 0
  718 21:57:42.275289  PCI: 00:16.4: enabled 0
  719 21:57:42.278396  PCI: 00:16.5: enabled 0
  720 21:57:42.281943  PCI: 00:17.0: enabled 1
  721 21:57:42.282038  PCI: 00:19.0: enabled 1
  722 21:57:42.284920  PCI: 00:19.1: enabled 0
  723 21:57:42.288420  PCI: 00:19.2: enabled 0
  724 21:57:42.291597  PCI: 00:1a.0: enabled 0
  725 21:57:42.291693  PCI: 00:1c.0: enabled 0
  726 21:57:42.294955  PCI: 00:1c.1: enabled 0
  727 21:57:42.298676  PCI: 00:1c.2: enabled 0
  728 21:57:42.301702  PCI: 00:1c.3: enabled 0
  729 21:57:42.301826  PCI: 00:1c.4: enabled 0
  730 21:57:42.304815  PCI: 00:1c.5: enabled 0
  731 21:57:42.308371  PCI: 00:1c.6: enabled 0
  732 21:57:42.311472  PCI: 00:1c.7: enabled 0
  733 21:57:42.311568  PCI: 00:1d.0: enabled 1
  734 21:57:42.314924  PCI: 00:1d.1: enabled 0
  735 21:57:42.318405  PCI: 00:1d.2: enabled 0
  736 21:57:42.318501  PCI: 00:1d.3: enabled 0
  737 21:57:42.321435  PCI: 00:1d.4: enabled 0
  738 21:57:42.325026  PCI: 00:1d.5: enabled 1
  739 21:57:42.327906  PCI: 00:1e.0: enabled 1
  740 21:57:42.328004  PCI: 00:1e.1: enabled 0
  741 21:57:42.331463  PCI: 00:1e.2: enabled 1
  742 21:57:42.334407  PCI: 00:1e.3: enabled 1
  743 21:57:42.337930  PCI: 00:1f.0: enabled 1
  744 21:57:42.338027  PCI: 00:1f.1: enabled 1
  745 21:57:42.341631  PCI: 00:1f.2: enabled 1
  746 21:57:42.344354  PCI: 00:1f.3: enabled 1
  747 21:57:42.347967  PCI: 00:1f.4: enabled 1
  748 21:57:42.348071  PCI: 00:1f.5: enabled 1
  749 21:57:42.350901  PCI: 00:1f.6: enabled 0
  750 21:57:42.354532  USB0 port 0: enabled 1
  751 21:57:42.354629  I2C: 00:15: enabled 1
  752 21:57:42.357551  I2C: 00:5d: enabled 1
  753 21:57:42.361119  GENERIC: 0.0: enabled 1
  754 21:57:42.361215  I2C: 00:1a: enabled 1
  755 21:57:42.364656  
  756 21:57:42.364753  I2C: 00:38: enabled 1
  757 21:57:42.367782  I2C: 00:39: enabled 1
  758 21:57:42.371443  I2C: 00:3a: enabled 1
  759 21:57:42.371540  I2C: 00:3b: enabled 1
  760 21:57:42.374469  PCI: 00:00.0: enabled 1
  761 21:57:42.377529  SPI: 00: enabled 1
  762 21:57:42.377625  SPI: 01: enabled 1
  763 21:57:42.381118  PNP: 0c09.0: enabled 1
  764 21:57:42.384207  USB2 port 0: enabled 1
  765 21:57:42.384303  USB2 port 1: enabled 1
  766 21:57:42.387838  USB2 port 2: enabled 0
  767 21:57:42.391255  USB2 port 3: enabled 0
  768 21:57:42.391350  USB2 port 5: enabled 0
  769 21:57:42.394381  USB2 port 6: enabled 1
  770 21:57:42.397675  USB2 port 9: enabled 1
  771 21:57:42.397771  USB3 port 0: enabled 1
  772 21:57:42.400730  USB3 port 1: enabled 1
  773 21:57:42.404373  USB3 port 2: enabled 1
  774 21:57:42.407793  USB3 port 3: enabled 1
  775 21:57:42.407891  USB3 port 4: enabled 0
  776 21:57:42.410715  APIC: 03: enabled 1
  777 21:57:42.414240  APIC: 01: enabled 1
  778 21:57:42.414337  APIC: 06: enabled 1
  779 21:57:42.417221  APIC: 02: enabled 1
  780 21:57:42.417318  APIC: 04: enabled 1
  781 21:57:42.420946  APIC: 05: enabled 1
  782 21:57:42.423795  APIC: 07: enabled 1
  783 21:57:42.423891  Compare with tree...
  784 21:57:42.427441  Root Device: enabled 1
  785 21:57:42.430405   CPU_CLUSTER: 0: enabled 1
  786 21:57:42.430501    APIC: 00: enabled 1
  787 21:57:42.433919    APIC: 03: enabled 1
  788 21:57:42.437174    APIC: 01: enabled 1
  789 21:57:42.437271    APIC: 06: enabled 1
  790 21:57:42.440650  
  791 21:57:42.440748    APIC: 02: enabled 1
  792 21:57:42.443876    APIC: 04: enabled 1
  793 21:57:42.447531    APIC: 05: enabled 1
  794 21:57:42.447627    APIC: 07: enabled 1
  795 21:57:42.450514   DOMAIN: 0000: enabled 1
  796 21:57:42.454097    PCI: 00:00.0: enabled 1
  797 21:57:42.457220    PCI: 00:02.0: enabled 1
  798 21:57:42.457317    PCI: 00:04.0: enabled 0
  799 21:57:42.460614    PCI: 00:05.0: enabled 0
  800 21:57:42.463739    PCI: 00:12.0: enabled 1
  801 21:57:42.467137    PCI: 00:12.5: enabled 0
  802 21:57:42.470135    PCI: 00:12.6: enabled 0
  803 21:57:42.470231    PCI: 00:14.0: enabled 1
  804 21:57:42.473705     USB0 port 0: enabled 1
  805 21:57:42.476892      USB2 port 0: enabled 1
  806 21:57:42.480533      USB2 port 1: enabled 1
  807 21:57:42.483586      USB2 port 2: enabled 0
  808 21:57:42.483683      USB2 port 3: enabled 0
  809 21:57:42.487296      USB2 port 5: enabled 0
  810 21:57:42.490412      USB2 port 6: enabled 1
  811 21:57:42.493463      USB2 port 9: enabled 1
  812 21:57:42.497134      USB3 port 0: enabled 1
  813 21:57:42.497231      USB3 port 1: enabled 1
  814 21:57:42.499955  
  815 21:57:42.500056      USB3 port 2: enabled 1
  816 21:57:42.503484      USB3 port 3: enabled 1
  817 21:57:42.506674      USB3 port 4: enabled 0
  818 21:57:42.510168    PCI: 00:14.1: enabled 0
  819 21:57:42.513715    PCI: 00:14.3: enabled 1
  820 21:57:42.513812    PCI: 00:14.5: enabled 0
  821 21:57:42.516650    PCI: 00:15.0: enabled 1
  822 21:57:42.520058     I2C: 00:15: enabled 1
  823 21:57:42.523174    PCI: 00:15.1: enabled 1
  824 21:57:42.523272     I2C: 00:5d: enabled 1
  825 21:57:42.526672     GENERIC: 0.0: enabled 1
  826 21:57:42.529766    PCI: 00:15.2: enabled 0
  827 21:57:42.533055    PCI: 00:15.3: enabled 0
  828 21:57:42.536655    PCI: 00:16.0: enabled 1
  829 21:57:42.536752    PCI: 00:16.1: enabled 0
  830 21:57:42.540196    PCI: 00:16.2: enabled 0
  831 21:57:42.543155    PCI: 00:16.3: enabled 0
  832 21:57:42.546372    PCI: 00:16.4: enabled 0
  833 21:57:42.549983    PCI: 00:16.5: enabled 0
  834 21:57:42.550082    PCI: 00:17.0: enabled 1
  835 21:57:42.553508    PCI: 00:19.0: enabled 1
  836 21:57:42.556891     I2C: 00:1a: enabled 1
  837 21:57:42.559965     I2C: 00:38: enabled 1
  838 21:57:42.560072     I2C: 00:39: enabled 1
  839 21:57:42.563620     I2C: 00:3a: enabled 1
  840 21:57:42.566545     I2C: 00:3b: enabled 1
  841 21:57:42.570127    PCI: 00:19.1: enabled 0
  842 21:57:42.573252    PCI: 00:19.2: enabled 0
  843 21:57:42.573350    PCI: 00:1a.0: enabled 0
  844 21:57:42.576395    PCI: 00:1c.0: enabled 0
  845 21:57:42.579958    PCI: 00:1c.1: enabled 0
  846 21:57:42.583566    PCI: 00:1c.2: enabled 0
  847 21:57:42.586647    PCI: 00:1c.3: enabled 0
  848 21:57:42.586745    PCI: 00:1c.4: enabled 0
  849 21:57:42.590432    PCI: 00:1c.5: enabled 0
  850 21:57:42.593059    PCI: 00:1c.6: enabled 0
  851 21:57:42.596306    PCI: 00:1c.7: enabled 0
  852 21:57:42.596404    PCI: 00:1d.0: enabled 1
  853 21:57:42.599781  
  854 21:57:42.599911    PCI: 00:1d.1: enabled 0
  855 21:57:42.603245    PCI: 00:1d.2: enabled 0
  856 21:57:42.606492    PCI: 00:1d.3: enabled 0
  857 21:57:42.609729    PCI: 00:1d.4: enabled 0
  858 21:57:42.609828    PCI: 00:1d.5: enabled 1
  859 21:57:42.613512     PCI: 00:00.0: enabled 1
  860 21:57:42.616219    PCI: 00:1e.0: enabled 1
  861 21:57:42.619584    PCI: 00:1e.1: enabled 0
  862 21:57:42.622799    PCI: 00:1e.2: enabled 1
  863 21:57:42.622908     SPI: 00: enabled 1
  864 21:57:42.626214    PCI: 00:1e.3: enabled 1
  865 21:57:42.629736     SPI: 01: enabled 1
  866 21:57:42.633258    PCI: 00:1f.0: enabled 1
  867 21:57:42.633356     PNP: 0c09.0: enabled 1
  868 21:57:42.636325    PCI: 00:1f.1: enabled 1
  869 21:57:42.639371    PCI: 00:1f.2: enabled 1
  870 21:57:42.642977    PCI: 00:1f.3: enabled 1
  871 21:57:42.646185    PCI: 00:1f.4: enabled 1
  872 21:57:42.646286    PCI: 00:1f.5: enabled 1
  873 21:57:42.649248    PCI: 00:1f.6: enabled 0
  874 21:57:42.652794  Root Device scanning...
  875 21:57:42.656387  scan_static_bus for Root Device
  876 21:57:42.660057  CPU_CLUSTER: 0 enabled
  877 21:57:42.660155  DOMAIN: 0000 enabled
  878 21:57:42.662957  DOMAIN: 0000 scanning...
  879 21:57:42.666664  PCI: pci_scan_bus for bus 00
  880 21:57:42.669698  PCI: 00:00.0 [8086/0000] ops
  881 21:57:42.672675  PCI: 00:00.0 [8086/9b61] enabled
  882 21:57:42.676046  PCI: 00:02.0 [8086/0000] bus ops
  883 21:57:42.679417  PCI: 00:02.0 [8086/9b41] enabled
  884 21:57:42.683013  PCI: 00:04.0 [8086/1903] disabled
  885 21:57:42.686014  PCI: 00:08.0 [8086/1911] enabled
  886 21:57:42.689459  PCI: 00:12.0 [8086/02f9] enabled
  887 21:57:42.692689  PCI: 00:14.0 [8086/0000] bus ops
  888 21:57:42.696142  PCI: 00:14.0 [8086/02ed] enabled
  889 21:57:42.699642  PCI: 00:14.2 [8086/02ef] enabled
  890 21:57:42.702976  PCI: 00:14.3 [8086/02f0] enabled
  891 21:57:42.706199  PCI: 00:15.0 [8086/0000] bus ops
  892 21:57:42.709724  PCI: 00:15.0 [8086/02e8] enabled
  893 21:57:42.712593  PCI: 00:15.1 [8086/0000] bus ops
  894 21:57:42.716165  PCI: 00:15.1 [8086/02e9] enabled
  895 21:57:42.719136  PCI: 00:16.0 [8086/0000] ops
  896 21:57:42.722564  PCI: 00:16.0 [8086/02e0] enabled
  897 21:57:42.725870  PCI: 00:17.0 [8086/0000] ops
  898 21:57:42.729576  PCI: 00:17.0 [8086/02d3] enabled
  899 21:57:42.732517  PCI: 00:19.0 [8086/0000] bus ops
  900 21:57:42.736016  PCI: 00:19.0 [8086/02c5] enabled
  901 21:57:42.739602  PCI: 00:1d.0 [8086/0000] bus ops
  902 21:57:42.742434  PCI: 00:1d.0 [8086/02b0] enabled
  903 21:57:42.746166  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  904 21:57:42.749196  PCI: 00:1e.0 [8086/0000] ops
  905 21:57:42.752539  PCI: 00:1e.0 [8086/02a8] enabled
  906 21:57:42.756227  PCI: 00:1e.2 [8086/0000] bus ops
  907 21:57:42.759074  PCI: 00:1e.2 [8086/02aa] enabled
  908 21:57:42.762496  PCI: 00:1e.3 [8086/0000] bus ops
  909 21:57:42.766163  PCI: 00:1e.3 [8086/02ab] enabled
  910 21:57:42.769390  PCI: 00:1f.0 [8086/0000] bus ops
  911 21:57:42.772377  PCI: 00:1f.0 [8086/0284] enabled
  912 21:57:42.778879  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  913 21:57:42.785466  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  914 21:57:42.789079  PCI: 00:1f.3 [8086/0000] bus ops
  915 21:57:42.792423  PCI: 00:1f.3 [8086/02c8] enabled
  916 21:57:42.795591  PCI: 00:1f.4 [8086/0000] bus ops
  917 21:57:42.798863  PCI: 00:1f.4 [8086/02a3] enabled
  918 21:57:42.802568  PCI: 00:1f.5 [8086/0000] bus ops
  919 21:57:42.805471  PCI: 00:1f.5 [8086/02a4] enabled
  920 21:57:42.808950  PCI: Leftover static devices:
  921 21:57:42.809104  PCI: 00:05.0
  922 21:57:42.812565  PCI: 00:12.5
  923 21:57:42.812674  PCI: 00:12.6
  924 21:57:42.812767  PCI: 00:14.1
  925 21:57:42.815253  PCI: 00:14.5
  926 21:57:42.815351  PCI: 00:15.2
  927 21:57:42.818796  PCI: 00:15.3
  928 21:57:42.818899  PCI: 00:16.1
  929 21:57:42.818976  PCI: 00:16.2
  930 21:57:42.822474  PCI: 00:16.3
  931 21:57:42.822578  PCI: 00:16.4
  932 21:57:42.825478  PCI: 00:16.5
  933 21:57:42.825576  PCI: 00:19.1
  934 21:57:42.825652  PCI: 00:19.2
  935 21:57:42.829136  PCI: 00:1a.0
  936 21:57:42.829252  PCI: 00:1c.0
  937 21:57:42.832269  PCI: 00:1c.1
  938 21:57:42.832367  PCI: 00:1c.2
  939 21:57:42.832443  PCI: 00:1c.3
  940 21:57:42.835506  
  941 21:57:42.835603  PCI: 00:1c.4
  942 21:57:42.835678  PCI: 00:1c.5
  943 21:57:42.838443  PCI: 00:1c.6
  944 21:57:42.838538  PCI: 00:1c.7
  945 21:57:42.842083  PCI: 00:1d.1
  946 21:57:42.842179  PCI: 00:1d.2
  947 21:57:42.842255  PCI: 00:1d.3
  948 21:57:42.845452  PCI: 00:1d.4
  949 21:57:42.845548  PCI: 00:1d.5
  950 21:57:42.848594  PCI: 00:1e.1
  951 21:57:42.848690  PCI: 00:1f.1
  952 21:57:42.848765  PCI: 00:1f.2
  953 21:57:42.852016  PCI: 00:1f.6
  954 21:57:42.855057  PCI: Check your devicetree.cb.
  955 21:57:42.858589  PCI: 00:02.0 scanning...
  956 21:57:42.862079  scan_generic_bus for PCI: 00:02.0
  957 21:57:42.865069  scan_generic_bus for PCI: 00:02.0 done
  958 21:57:42.872178  scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
  959 21:57:42.872277  PCI: 00:14.0 scanning...
  960 21:57:42.875182  scan_static_bus for PCI: 00:14.0
  961 21:57:42.878809  USB0 port 0 enabled
  962 21:57:42.881713  USB0 port 0 scanning...
  963 21:57:42.884935  scan_static_bus for USB0 port 0
  964 21:57:42.885073  USB2 port 0 enabled
  965 21:57:42.888571  USB2 port 1 enabled
  966 21:57:42.891569  USB2 port 2 disabled
  967 21:57:42.891667  USB2 port 3 disabled
  968 21:57:42.894961  USB2 port 5 disabled
  969 21:57:42.898853  USB2 port 6 enabled
  970 21:57:42.898948  USB2 port 9 enabled
  971 21:57:42.901669  USB3 port 0 enabled
  972 21:57:42.901798  USB3 port 1 enabled
  973 21:57:42.905143  USB3 port 2 enabled
  974 21:57:42.908179  USB3 port 3 enabled
  975 21:57:42.908281  USB3 port 4 disabled
  976 21:57:42.911533  USB2 port 0 scanning...
  977 21:57:42.915210  scan_static_bus for USB2 port 0
  978 21:57:42.918454  scan_static_bus for USB2 port 0 done
  979 21:57:42.924991  scan_bus: scanning of bus USB2 port 0 took 9695 usecs
  980 21:57:42.928575  USB2 port 1 scanning...
  981 21:57:42.931476  scan_static_bus for USB2 port 1
  982 21:57:42.935122  scan_static_bus for USB2 port 1 done
  983 21:57:42.937964  scan_bus: scanning of bus USB2 port 1 took 9709 usecs
  984 21:57:42.941550  USB2 port 6 scanning...
  985 21:57:42.944928  scan_static_bus for USB2 port 6
  986 21:57:42.947929  scan_static_bus for USB2 port 6 done
  987 21:57:42.955138  scan_bus: scanning of bus USB2 port 6 took 9704 usecs
  988 21:57:42.957979  USB2 port 9 scanning...
  989 21:57:42.961528  scan_static_bus for USB2 port 9
  990 21:57:42.964483  scan_static_bus for USB2 port 9 done
  991 21:57:42.967959  scan_bus: scanning of bus USB2 port 9 took 9703 usecs
  992 21:57:42.971081  USB3 port 0 scanning...
  993 21:57:42.974434  scan_static_bus for USB3 port 0
  994 21:57:42.978139  scan_static_bus for USB3 port 0 done
  995 21:57:42.984700  scan_bus: scanning of bus USB3 port 0 took 9701 usecs
  996 21:57:42.987612  USB3 port 1 scanning...
  997 21:57:42.991282  scan_static_bus for USB3 port 1
  998 21:57:42.994314  scan_static_bus for USB3 port 1 done
  999 21:57:42.997813  scan_bus: scanning of bus USB3 port 1 took 9710 usecs
 1000 21:57:43.001450  
 1001 21:57:43.001547  USB3 port 2 scanning...
 1002 21:57:43.004516  scan_static_bus for USB3 port 2
 1003 21:57:43.007702  scan_static_bus for USB3 port 2 done
 1004 21:57:43.014072  scan_bus: scanning of bus USB3 port 2 took 9701 usecs
 1005 21:57:43.017523  USB3 port 3 scanning...
 1006 21:57:43.021000  scan_static_bus for USB3 port 3
 1007 21:57:43.024583  scan_static_bus for USB3 port 3 done
 1008 21:57:43.030639  scan_bus: scanning of bus USB3 port 3 took 9702 usecs
 1009 21:57:43.034386  scan_static_bus for USB0 port 0 done
 1010 21:57:43.037791  scan_bus: scanning of bus USB0 port 0 took 155397 usecs
 1011 21:57:43.040878  scan_static_bus for PCI: 00:14.0 done
 1012 21:57:43.047490  scan_bus: scanning of bus PCI: 00:14.0 took 173016 usecs
 1013 21:57:43.050811  PCI: 00:15.0 scanning...
 1014 21:57:43.054037  scan_generic_bus for PCI: 00:15.0
 1015 21:57:43.057188  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1016 21:57:43.060751  scan_generic_bus for PCI: 00:15.0 done
 1017 21:57:43.067403  scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
 1018 21:57:43.070490  PCI: 00:15.1 scanning...
 1019 21:57:43.074130  scan_generic_bus for PCI: 00:15.1
 1020 21:57:43.077563  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1021 21:57:43.084025  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1022 21:57:43.087133  scan_generic_bus for PCI: 00:15.1 done
 1023 21:57:43.090788  scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
 1024 21:57:43.093885  PCI: 00:19.0 scanning...
 1025 21:57:43.097428  scan_generic_bus for PCI: 00:19.0
 1026 21:57:43.100521  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1027 21:57:43.103892  
 1028 21:57:43.107513  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1029 21:57:43.110810  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1030 21:57:43.113934  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1031 21:57:43.116974  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1032 21:57:43.123985  scan_generic_bus for PCI: 00:19.0 done
 1033 21:57:43.126877  scan_bus: scanning of bus PCI: 00:19.0 took 30737 usecs
 1034 21:57:43.130396  PCI: 00:1d.0 scanning...
 1035 21:57:43.133833  do_pci_scan_bridge for PCI: 00:1d.0
 1036 21:57:43.136895  PCI: pci_scan_bus for bus 01
 1037 21:57:43.140509  PCI: 01:00.0 [1c5c/1327] enabled
 1038 21:57:43.143417  Enabling Common Clock Configuration
 1039 21:57:43.150271  L1 Sub-State supported from root port 29
 1040 21:57:43.150368  L1 Sub-State Support = 0xf
 1041 21:57:43.153919  CommonModeRestoreTime = 0x28
 1042 21:57:43.160316  Power On Value = 0x16, Power On Scale = 0x0
 1043 21:57:43.160412  ASPM: Enabled L1
 1044 21:57:43.166696  scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
 1045 21:57:43.170506  PCI: 00:1e.2 scanning...
 1046 21:57:43.173356  scan_generic_bus for PCI: 00:1e.2
 1047 21:57:43.177000  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1048 21:57:43.179802  scan_generic_bus for PCI: 00:1e.2 done
 1049 21:57:43.186485  scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs
 1050 21:57:43.186584  PCI: 00:1e.3 scanning...
 1051 21:57:43.189969  scan_generic_bus for PCI: 00:1e.3
 1052 21:57:43.194038  
 1053 21:57:43.196939  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1054 21:57:43.199977  scan_generic_bus for PCI: 00:1e.3 done
 1055 21:57:43.203538  scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
 1056 21:57:43.206628  
 1057 21:57:43.206725  PCI: 00:1f.0 scanning...
 1058 21:57:43.210107  scan_static_bus for PCI: 00:1f.0
 1059 21:57:43.213461  PNP: 0c09.0 enabled
 1060 21:57:43.216504  scan_static_bus for PCI: 00:1f.0 done
 1061 21:57:43.223242  scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
 1062 21:57:43.226891  PCI: 00:1f.3 scanning...
 1063 21:57:43.229868  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
 1064 21:57:43.233390  PCI: 00:1f.4 scanning...
 1065 21:57:43.236506  scan_generic_bus for PCI: 00:1f.4
 1066 21:57:43.239918  scan_generic_bus for PCI: 00:1f.4 done
 1067 21:57:43.246510  scan_bus: scanning of bus PCI: 00:1f.4 took 10200 usecs
 1068 21:57:43.249808  PCI: 00:1f.5 scanning...
 1069 21:57:43.252982  scan_generic_bus for PCI: 00:1f.5
 1070 21:57:43.256361  scan_generic_bus for PCI: 00:1f.5 done
 1071 21:57:43.263163  scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
 1072 21:57:43.269550  scan_bus: scanning of bus DOMAIN: 0000 took 605148 usecs
 1073 21:57:43.272804  scan_static_bus for Root Device done
 1074 21:57:43.276309  scan_bus: scanning of bus Root Device took 625036 usecs
 1075 21:57:43.279279  done
 1076 21:57:43.279377  Chrome EC: UHEPI supported
 1077 21:57:43.283123  
 1078 21:57:43.286386  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1079 21:57:43.293123  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1080 21:57:43.299125  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1081 21:57:43.305819  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1082 21:57:43.309224  SPI flash protection: WPSW=0 SRP0=0
 1083 21:57:43.315746  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1084 21:57:43.319370  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1085 21:57:43.322389  found VGA at PCI: 00:02.0
 1086 21:57:43.325880  Setting up VGA for PCI: 00:02.0
 1087 21:57:43.332444  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1088 21:57:43.336025  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1089 21:57:43.339640  Allocating resources...
 1090 21:57:43.339768  Reading resources...
 1091 21:57:43.346075  Root Device read_resources bus 0 link: 0
 1092 21:57:43.348997  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1093 21:57:43.356223  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1094 21:57:43.359024  DOMAIN: 0000 read_resources bus 0 link: 0
 1095 21:57:43.366114  PCI: 00:14.0 read_resources bus 0 link: 0
 1096 21:57:43.369714  USB0 port 0 read_resources bus 0 link: 0
 1097 21:57:43.377463  USB0 port 0 read_resources bus 0 link: 0 done
 1098 21:57:43.380947  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1099 21:57:43.388152  PCI: 00:15.0 read_resources bus 1 link: 0
 1100 21:57:43.391021  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1101 21:57:43.397660  PCI: 00:15.1 read_resources bus 2 link: 0
 1102 21:57:43.401470  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1103 21:57:43.408442  PCI: 00:19.0 read_resources bus 3 link: 0
 1104 21:57:43.415426  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1105 21:57:43.418929  PCI: 00:1d.0 read_resources bus 1 link: 0
 1106 21:57:43.425587  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1107 21:57:43.429131  PCI: 00:1e.2 read_resources bus 4 link: 0
 1108 21:57:43.435413  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1109 21:57:43.438889  PCI: 00:1e.3 read_resources bus 5 link: 0
 1110 21:57:43.445452  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1111 21:57:43.448451  PCI: 00:1f.0 read_resources bus 0 link: 0
 1112 21:57:43.455297  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1113 21:57:43.461834  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1114 21:57:43.465420  Root Device read_resources bus 0 link: 0 done
 1115 21:57:43.468213  Done reading resources.
 1116 21:57:43.471849  Show resources in subtree (Root Device)...After reading.
 1117 21:57:43.478257   Root Device child on link 0 CPU_CLUSTER: 0
 1118 21:57:43.482037    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1119 21:57:43.482133     APIC: 00
 1120 21:57:43.485509     APIC: 03
 1121 21:57:43.485605     APIC: 01
 1122 21:57:43.488586     APIC: 06
 1123 21:57:43.488682     APIC: 02
 1124 21:57:43.488758     APIC: 04
 1125 21:57:43.491969     APIC: 05
 1126 21:57:43.492072     APIC: 07
 1127 21:57:43.495106    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1128 21:57:43.504870    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1129 21:57:43.514886    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1130 21:57:43.564774     PCI: 00:00.0
 1131 21:57:43.565127     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1132 21:57:43.565250     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1133 21:57:43.565993     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1134 21:57:43.566283     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1135 21:57:43.567120     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1136 21:57:43.615080     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1137 21:57:43.615709     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1138 21:57:43.616000     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1139 21:57:43.616091     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1140 21:57:43.616949     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1141 21:57:43.664425     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1142 21:57:43.664767     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1143 21:57:43.665043     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1144 21:57:43.665845     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1145 21:57:43.665940     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1146 21:57:43.692676     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1147 21:57:43.692784     PCI: 00:02.0
 1148 21:57:43.693055     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1149 21:57:43.693137     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1150 21:57:43.699581     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1151 21:57:43.699678     PCI: 00:04.0
 1152 21:57:43.699752     PCI: 00:08.0
 1153 21:57:43.709741     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1154 21:57:43.712938     PCI: 00:12.0
 1155 21:57:43.722994     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1156 21:57:43.725973     PCI: 00:14.0 child on link 0 USB0 port 0
 1157 21:57:43.736018     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1158 21:57:43.739641      USB0 port 0 child on link 0 USB2 port 0
 1159 21:57:43.742494  
 1160 21:57:43.742592       USB2 port 0
 1161 21:57:43.745969       USB2 port 1
 1162 21:57:43.746066       USB2 port 2
 1163 21:57:43.749609       USB2 port 3
 1164 21:57:43.749705       USB2 port 5
 1165 21:57:43.752541       USB2 port 6
 1166 21:57:43.752636       USB2 port 9
 1167 21:57:43.755980       USB3 port 0
 1168 21:57:43.756082       USB3 port 1
 1169 21:57:43.759425       USB3 port 2
 1170 21:57:43.759521       USB3 port 3
 1171 21:57:43.762586       USB3 port 4
 1172 21:57:43.762682     PCI: 00:14.2
 1173 21:57:43.772629     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1174 21:57:43.782764     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1175 21:57:43.786304     PCI: 00:14.3
 1176 21:57:43.795723     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1177 21:57:43.799411     PCI: 00:15.0 child on link 0 I2C: 01:15
 1178 21:57:43.809026     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1179 21:57:43.812408      I2C: 01:15
 1180 21:57:43.815886     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1181 21:57:43.825750     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1182 21:57:43.825853      I2C: 02:5d
 1183 21:57:43.828875      GENERIC: 0.0
 1184 21:57:43.828971     PCI: 00:16.0
 1185 21:57:43.839245     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1186 21:57:43.842321     PCI: 00:17.0
 1187 21:57:43.852426     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1188 21:57:43.858854     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1189 21:57:43.868691     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1190 21:57:43.875133     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1191 21:57:43.885149     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1192 21:57:43.895261     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1193 21:57:43.898325     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1194 21:57:43.908325     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 21:57:43.908431      I2C: 03:1a
 1196 21:57:43.911892      I2C: 03:38
 1197 21:57:43.911990      I2C: 03:39
 1198 21:57:43.914868      I2C: 03:3a
 1199 21:57:43.914963      I2C: 03:3b
 1200 21:57:43.921972     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1201 21:57:43.928357     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1202 21:57:43.938495     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1203 21:57:43.948161     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1204 21:57:43.948269      PCI: 01:00.0
 1205 21:57:43.958417      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1206 21:57:43.961258     PCI: 00:1e.0
 1207 21:57:43.971245     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1208 21:57:43.981333     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1209 21:57:43.987686     PCI: 00:1e.2 child on link 0 SPI: 00
 1210 21:57:43.998250     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1211 21:57:43.998359      SPI: 00
 1212 21:57:44.001313     PCI: 00:1e.3 child on link 0 SPI: 01
 1213 21:57:44.011020     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1214 21:57:44.011125      SPI: 01
 1215 21:57:44.017636     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1216 21:57:44.024492     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1217 21:57:44.034154     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1218 21:57:44.037614      PNP: 0c09.0
 1219 21:57:44.044033      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1220 21:57:44.047539     PCI: 00:1f.3
 1221 21:57:44.057720     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1222 21:57:44.067643     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1223 21:57:44.067748     PCI: 00:1f.4
 1224 21:57:44.077005     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1225 21:57:44.087084     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1226 21:57:44.090179     PCI: 00:1f.5
 1227 21:57:44.096782     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1228 21:57:44.103372  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1229 21:57:44.110600  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1230 21:57:44.117299  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1231 21:57:44.120374  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1232 21:57:44.123861  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1233 21:57:44.126665  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1234 21:57:44.134110  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1235 21:57:44.140118  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1236 21:57:44.146607  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1237 21:57:44.153051  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1238 21:57:44.163469  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1239 21:57:44.169757  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1240 21:57:44.173353  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1241 21:57:44.179821  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1242 21:57:44.186180  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1243 21:57:44.189743  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1244 21:57:44.192714  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1245 21:57:44.196521  
 1246 21:57:44.199376  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1247 21:57:44.203178  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1248 21:57:44.209609  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1249 21:57:44.212577  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1250 21:57:44.219385  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1251 21:57:44.222698  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1252 21:57:44.229095  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1253 21:57:44.232596  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1254 21:57:44.239048  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1255 21:57:44.242568  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1256 21:57:44.249088  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1257 21:57:44.252443  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1258 21:57:44.259051  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1259 21:57:44.262659  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1260 21:57:44.269073  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1261 21:57:44.272560  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1262 21:57:44.275581  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1263 21:57:44.279016  
 1264 21:57:44.281940  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1265 21:57:44.285638  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1266 21:57:44.291906  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1267 21:57:44.298608  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1268 21:57:44.305307  avoid_fixed_resources: DOMAIN: 0000
 1269 21:57:44.308691  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1270 21:57:44.315419  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1271 21:57:44.322156  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1272 21:57:44.331950  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1273 21:57:44.338489  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1274 21:57:44.345287  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1275 21:57:44.355342  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1276 21:57:44.361880  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1277 21:57:44.368447  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1278 21:57:44.378565  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1279 21:57:44.385149  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1280 21:57:44.391851  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1281 21:57:44.394671  Setting resources...
 1282 21:57:44.401647  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1283 21:57:44.404671  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1284 21:57:44.408424  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1285 21:57:44.411639  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1286 21:57:44.414715  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1287 21:57:44.421211  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1288 21:57:44.427780  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1289 21:57:44.434392  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1290 21:57:44.441408  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1291 21:57:44.447842  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1292 21:57:44.450900  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1293 21:57:44.457739  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1294 21:57:44.461399  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1295 21:57:44.467775  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1296 21:57:44.470798  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1297 21:57:44.477349  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1298 21:57:44.480851  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1299 21:57:44.487286  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1300 21:57:44.490872  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1301 21:57:44.497392  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1302 21:57:44.500596  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1303 21:57:44.507731  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1304 21:57:44.510961  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1305 21:57:44.517659  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1306 21:57:44.520688  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1307 21:57:44.523689  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1308 21:57:44.530397  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1309 21:57:44.534030  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1310 21:57:44.540430  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1311 21:57:44.543373  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1312 21:57:44.550471  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1313 21:57:44.553410  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1314 21:57:44.563546  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1315 21:57:44.570178  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1316 21:57:44.576566  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1317 21:57:44.583146  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1318 21:57:44.589737  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1319 21:57:44.596794  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1320 21:57:44.599883  Root Device assign_resources, bus 0 link: 0
 1321 21:57:44.606381  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1322 21:57:44.613218  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1323 21:57:44.623433  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1324 21:57:44.629849  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1325 21:57:44.639662  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1326 21:57:44.646337  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1327 21:57:44.656064  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1328 21:57:44.659698  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1329 21:57:44.662637  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1330 21:57:44.672860  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1331 21:57:44.679811  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1332 21:57:44.689624  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1333 21:57:44.696054  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1334 21:57:44.703156  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1335 21:57:44.706119  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1336 21:57:44.716167  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1337 21:57:44.719923  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1338 21:57:44.722935  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1339 21:57:44.732983  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1340 21:57:44.739512  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1341 21:57:44.749312  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1342 21:57:44.756223  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1343 21:57:44.762555  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1344 21:57:44.772498  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1345 21:57:44.778879  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1346 21:57:44.785982  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1347 21:57:44.788929  
 1348 21:57:44.792428  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1349 21:57:44.795519  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1350 21:57:44.805562  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1351 21:57:44.815163  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1352 21:57:44.822220  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1353 21:57:44.828263  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1354 21:57:44.835548  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1355 21:57:44.838526  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1356 21:57:44.848557  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1357 21:57:44.855356  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1358 21:57:44.862387  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1359 21:57:44.865225  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1360 21:57:44.875206  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1361 21:57:44.878741  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1362 21:57:44.885249  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1363 21:57:44.888005  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1364 21:57:44.894827  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1365 21:57:44.898245  LPC: Trying to open IO window from 800 size 1ff
 1366 21:57:44.904775  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1367 21:57:44.908369  
 1368 21:57:44.914508  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1369 21:57:44.921280  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1370 21:57:44.931495  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1371 21:57:44.934594  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1372 21:57:44.941619  Root Device assign_resources, bus 0 link: 0
 1373 21:57:44.941720  Done setting resources.
 1374 21:57:44.948244  Show resources in subtree (Root Device)...After assigning values.
 1375 21:57:44.954577   Root Device child on link 0 CPU_CLUSTER: 0
 1376 21:57:44.957665    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1377 21:57:44.957763     APIC: 00
 1378 21:57:44.961006     APIC: 03
 1379 21:57:44.961103     APIC: 01
 1380 21:57:44.964410     APIC: 06
 1381 21:57:44.964508     APIC: 02
 1382 21:57:44.964585     APIC: 04
 1383 21:57:44.968110     APIC: 05
 1384 21:57:44.968207     APIC: 07
 1385 21:57:44.970866    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1386 21:57:44.980987    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1387 21:57:44.994034    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1388 21:57:44.994137     PCI: 00:00.0
 1389 21:57:45.004082     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1390 21:57:45.013861     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1391 21:57:45.023751     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1392 21:57:45.033862     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1393 21:57:45.040431     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1394 21:57:45.050269     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1395 21:57:45.060307     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1396 21:57:45.070245     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1397 21:57:45.080265     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1398 21:57:45.086554     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1399 21:57:45.096581     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1400 21:57:45.106632     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1401 21:57:45.116185     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1402 21:57:45.126714     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1403 21:57:45.136280     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1404 21:57:45.146235     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1405 21:57:45.146391     PCI: 00:02.0
 1406 21:57:45.156498     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1407 21:57:45.169122     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1408 21:57:45.176309     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1409 21:57:45.179285     PCI: 00:04.0
 1410 21:57:45.179384     PCI: 00:08.0
 1411 21:57:45.189227     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1412 21:57:45.192259     PCI: 00:12.0
 1413 21:57:45.202361     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1414 21:57:45.205709     PCI: 00:14.0 child on link 0 USB0 port 0
 1415 21:57:45.215861     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1416 21:57:45.218856  
 1417 21:57:45.222185      USB0 port 0 child on link 0 USB2 port 0
 1418 21:57:45.222283       USB2 port 0
 1419 21:57:45.225331       USB2 port 1
 1420 21:57:45.225429       USB2 port 2
 1421 21:57:45.228927       USB2 port 3
 1422 21:57:45.229024       USB2 port 5
 1423 21:57:45.231940  
 1424 21:57:45.232038       USB2 port 6
 1425 21:57:45.235561       USB2 port 9
 1426 21:57:45.235658       USB3 port 0
 1427 21:57:45.238470       USB3 port 1
 1428 21:57:45.238568       USB3 port 2
 1429 21:57:45.242312       USB3 port 3
 1430 21:57:45.242410       USB3 port 4
 1431 21:57:45.245236     PCI: 00:14.2
 1432 21:57:45.255326     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1433 21:57:45.265688     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1434 21:57:45.265786     PCI: 00:14.3
 1435 21:57:45.278411     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1436 21:57:45.281987     PCI: 00:15.0 child on link 0 I2C: 01:15
 1437 21:57:45.291576     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1438 21:57:45.291675      I2C: 01:15
 1439 21:57:45.297977     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1440 21:57:45.307947     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1441 21:57:45.308046      I2C: 02:5d
 1442 21:57:45.311481      GENERIC: 0.0
 1443 21:57:45.311577     PCI: 00:16.0
 1444 21:57:45.321484     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1445 21:57:45.324779  
 1446 21:57:45.324885     PCI: 00:17.0
 1447 21:57:45.334613     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1448 21:57:45.344432     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1449 21:57:45.354339     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1450 21:57:45.364370     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1451 21:57:45.371264     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1452 21:57:45.380742     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1453 21:57:45.384340  
 1454 21:57:45.387269     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1455 21:57:45.397192     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1456 21:57:45.397307      I2C: 03:1a
 1457 21:57:45.400757      I2C: 03:38
 1458 21:57:45.400855      I2C: 03:39
 1459 21:57:45.403798      I2C: 03:3a
 1460 21:57:45.403896      I2C: 03:3b
 1461 21:57:45.410972     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1462 21:57:45.417379     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1463 21:57:45.430423     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1464 21:57:45.439940     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1465 21:57:45.440046      PCI: 01:00.0
 1466 21:57:45.449635      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1467 21:57:45.453639     PCI: 00:1e.0
 1468 21:57:45.462986     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1469 21:57:45.472768     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1470 21:57:45.479466     PCI: 00:1e.2 child on link 0 SPI: 00
 1471 21:57:45.489570     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1472 21:57:45.489673      SPI: 00
 1473 21:57:45.492640     PCI: 00:1e.3 child on link 0 SPI: 01
 1474 21:57:45.502688     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1475 21:57:45.506154      SPI: 01
 1476 21:57:45.509174     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1477 21:57:45.518919     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1478 21:57:45.525646     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1479 21:57:45.529313  
 1480 21:57:45.529443      PNP: 0c09.0
 1481 21:57:45.538867      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1482 21:57:45.539011     PCI: 00:1f.3
 1483 21:57:45.548693     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1484 21:57:45.558628     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1485 21:57:45.562118     PCI: 00:1f.4
 1486 21:57:45.572001     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1487 21:57:45.581568     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1488 21:57:45.581699     PCI: 00:1f.5
 1489 21:57:45.591680     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1490 21:57:45.595169  Done allocating resources.
 1491 21:57:45.601600  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1492 21:57:45.604879  Enabling resources...
 1493 21:57:45.608037  PCI: 00:00.0 subsystem <- 8086/9b61
 1494 21:57:45.611587  PCI: 00:00.0 cmd <- 06
 1495 21:57:45.615049  PCI: 00:02.0 subsystem <- 8086/9b41
 1496 21:57:45.618110  PCI: 00:02.0 cmd <- 03
 1497 21:57:45.621713  PCI: 00:08.0 cmd <- 06
 1498 21:57:45.624653  PCI: 00:12.0 subsystem <- 8086/02f9
 1499 21:57:45.624775  PCI: 00:12.0 cmd <- 02
 1500 21:57:45.631844  PCI: 00:14.0 subsystem <- 8086/02ed
 1501 21:57:45.631945  PCI: 00:14.0 cmd <- 02
 1502 21:57:45.634735  PCI: 00:14.2 cmd <- 02
 1503 21:57:45.638402  PCI: 00:14.3 subsystem <- 8086/02f0
 1504 21:57:45.641844  PCI: 00:14.3 cmd <- 02
 1505 21:57:45.644908  PCI: 00:15.0 subsystem <- 8086/02e8
 1506 21:57:45.647810  PCI: 00:15.0 cmd <- 02
 1507 21:57:45.651516  PCI: 00:15.1 subsystem <- 8086/02e9
 1508 21:57:45.654663  PCI: 00:15.1 cmd <- 02
 1509 21:57:45.658179  PCI: 00:16.0 subsystem <- 8086/02e0
 1510 21:57:45.661040  PCI: 00:16.0 cmd <- 02
 1511 21:57:45.664615  PCI: 00:17.0 subsystem <- 8086/02d3
 1512 21:57:45.667686  PCI: 00:17.0 cmd <- 03
 1513 21:57:45.671206  PCI: 00:19.0 subsystem <- 8086/02c5
 1514 21:57:45.671304  PCI: 00:19.0 cmd <- 02
 1515 21:57:45.674789  PCI: 00:1d.0 bridge ctrl <- 0013
 1516 21:57:45.681785  PCI: 00:1d.0 subsystem <- 8086/02b0
 1517 21:57:45.681882  PCI: 00:1d.0 cmd <- 06
 1518 21:57:45.684649  PCI: 00:1e.0 subsystem <- 8086/02a8
 1519 21:57:45.688298  PCI: 00:1e.0 cmd <- 06
 1520 21:57:45.691205  PCI: 00:1e.2 subsystem <- 8086/02aa
 1521 21:57:45.694821  PCI: 00:1e.2 cmd <- 06
 1522 21:57:45.698091  PCI: 00:1e.3 subsystem <- 8086/02ab
 1523 21:57:45.701073  PCI: 00:1e.3 cmd <- 02
 1524 21:57:45.704802  PCI: 00:1f.0 subsystem <- 8086/0284
 1525 21:57:45.707787  PCI: 00:1f.0 cmd <- 407
 1526 21:57:45.711220  PCI: 00:1f.3 subsystem <- 8086/02c8
 1527 21:57:45.714334  PCI: 00:1f.3 cmd <- 02
 1528 21:57:45.717638  PCI: 00:1f.4 subsystem <- 8086/02a3
 1529 21:57:45.721072  PCI: 00:1f.4 cmd <- 03
 1530 21:57:45.724159  PCI: 00:1f.5 subsystem <- 8086/02a4
 1531 21:57:45.727642  PCI: 00:1f.5 cmd <- 406
 1532 21:57:45.735304  PCI: 01:00.0 cmd <- 02
 1533 21:57:45.740664  done.
 1534 21:57:45.752814  ME: Version: 14.0.39.1367
 1535 21:57:45.759162  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
 1536 21:57:45.762676  Initializing devices...
 1537 21:57:45.762770  Root Device init ...
 1538 21:57:45.769358  Chrome EC: Set SMI mask to 0x0000000000000000
 1539 21:57:45.773050  Chrome EC: clear events_b mask to 0x0000000000000000
 1540 21:57:45.779263  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1541 21:57:45.785758  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1542 21:57:45.792531  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1543 21:57:45.795952  Chrome EC: Set WAKE mask to 0x0000000000000000
 1544 21:57:45.798760  Root Device init finished in 35177 usecs
 1545 21:57:45.802630  CPU_CLUSTER: 0 init ...
 1546 21:57:45.806336  CPU_CLUSTER: 0 init finished in 2447 usecs
 1547 21:57:45.809192  
 1548 21:57:45.813432  PCI: 00:00.0 init ...
 1549 21:57:45.816727  CPU TDP: 15 Watts
 1550 21:57:45.820203  CPU PL2 = 64 Watts
 1551 21:57:45.823209  PCI: 00:00.0 init finished in 7080 usecs
 1552 21:57:45.826835  PCI: 00:02.0 init ...
 1553 21:57:45.829799  PCI: 00:02.0 init finished in 2254 usecs
 1554 21:57:45.833321  PCI: 00:08.0 init ...
 1555 21:57:45.837080  PCI: 00:08.0 init finished in 2253 usecs
 1556 21:57:45.839737  PCI: 00:12.0 init ...
 1557 21:57:45.843331  PCI: 00:12.0 init finished in 2253 usecs
 1558 21:57:45.846507  PCI: 00:14.0 init ...
 1559 21:57:45.850163  PCI: 00:14.0 init finished in 2253 usecs
 1560 21:57:45.853267  PCI: 00:14.2 init ...
 1561 21:57:45.857015  PCI: 00:14.2 init finished in 2252 usecs
 1562 21:57:45.859831  PCI: 00:14.3 init ...
 1563 21:57:45.863089  PCI: 00:14.3 init finished in 2262 usecs
 1564 21:57:45.866600  PCI: 00:15.0 init ...
 1565 21:57:45.869699  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1566 21:57:45.873050  PCI: 00:15.0 init finished in 5977 usecs
 1567 21:57:45.876686  PCI: 00:15.1 init ...
 1568 21:57:45.879665  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1569 21:57:45.882973  PCI: 00:15.1 init finished in 5976 usecs
 1570 21:57:45.886543  PCI: 00:16.0 init ...
 1571 21:57:45.890151  PCI: 00:16.0 init finished in 2243 usecs
 1572 21:57:45.894230  PCI: 00:19.0 init ...
 1573 21:57:45.897364  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1574 21:57:45.900793  PCI: 00:19.0 init finished in 5975 usecs
 1575 21:57:45.904184  
 1576 21:57:45.904357  PCI: 00:1d.0 init ...
 1577 21:57:45.907189  Initializing PCH PCIe bridge.
 1578 21:57:45.910100  PCI: 00:1d.0 init finished in 5285 usecs
 1579 21:57:45.915654  PCI: 00:1f.0 init ...
 1580 21:57:45.918436  IOAPIC: Initializing IOAPIC at 0xfec00000
 1581 21:57:45.925604  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1582 21:57:45.925816  IOAPIC: ID = 0x02
 1583 21:57:45.928453  IOAPIC: Dumping registers
 1584 21:57:45.932227    reg 0x0000: 0x02000000
 1585 21:57:45.935055    reg 0x0001: 0x00770020
 1586 21:57:45.935151    reg 0x0002: 0x00000000
 1587 21:57:45.942029  PCI: 00:1f.0 init finished in 23557 usecs
 1588 21:57:45.945210  PCI: 00:1f.4 init ...
 1589 21:57:45.948699  PCI: 00:1f.4 init finished in 2263 usecs
 1590 21:57:45.959957  PCI: 01:00.0 init ...
 1591 21:57:45.962846  PCI: 01:00.0 init finished in 2253 usecs
 1592 21:57:45.966992  PNP: 0c09.0 init ...
 1593 21:57:45.970229  Google Chrome EC uptime: 11.060 seconds
 1594 21:57:45.977564  Google Chrome AP resets since EC boot: 0
 1595 21:57:45.980398  Google Chrome most recent AP reset causes:
 1596 21:57:45.987315  Google Chrome EC reset flags at last EC boot: reset-pin
 1597 21:57:45.990354  PNP: 0c09.0 init finished in 20570 usecs
 1598 21:57:45.993914  Devices initialized
 1599 21:57:45.994012  Show all devs... After init.
 1600 21:57:45.996906  Root Device: enabled 1
 1601 21:57:46.000436  CPU_CLUSTER: 0: enabled 1
 1602 21:57:46.003452  DOMAIN: 0000: enabled 1
 1603 21:57:46.003568  APIC: 00: enabled 1
 1604 21:57:46.007005  PCI: 00:00.0: enabled 1
 1605 21:57:46.010033  PCI: 00:02.0: enabled 1
 1606 21:57:46.013506  PCI: 00:04.0: enabled 0
 1607 21:57:46.013690  PCI: 00:05.0: enabled 0
 1608 21:57:46.017354  PCI: 00:12.0: enabled 1
 1609 21:57:46.020059  PCI: 00:12.5: enabled 0
 1610 21:57:46.020170  PCI: 00:12.6: enabled 0
 1611 21:57:46.023850  PCI: 00:14.0: enabled 1
 1612 21:57:46.026715  PCI: 00:14.1: enabled 0
 1613 21:57:46.030275  PCI: 00:14.3: enabled 1
 1614 21:57:46.030402  PCI: 00:14.5: enabled 0
 1615 21:57:46.033177  PCI: 00:15.0: enabled 1
 1616 21:57:46.036868  PCI: 00:15.1: enabled 1
 1617 21:57:46.039919  PCI: 00:15.2: enabled 0
 1618 21:57:46.040015  PCI: 00:15.3: enabled 0
 1619 21:57:46.043401  PCI: 00:16.0: enabled 1
 1620 21:57:46.046397  PCI: 00:16.1: enabled 0
 1621 21:57:46.049911  PCI: 00:16.2: enabled 0
 1622 21:57:46.050007  PCI: 00:16.3: enabled 0
 1623 21:57:46.052892  PCI: 00:16.4: enabled 0
 1624 21:57:46.056640  PCI: 00:16.5: enabled 0
 1625 21:57:46.059675  PCI: 00:17.0: enabled 1
 1626 21:57:46.059771  PCI: 00:19.0: enabled 1
 1627 21:57:46.063170  PCI: 00:19.1: enabled 0
 1628 21:57:46.066965  PCI: 00:19.2: enabled 0
 1629 21:57:46.067061  PCI: 00:1a.0: enabled 0
 1630 21:57:46.069807  PCI: 00:1c.0: enabled 0
 1631 21:57:46.072911  PCI: 00:1c.1: enabled 0
 1632 21:57:46.076679  PCI: 00:1c.2: enabled 0
 1633 21:57:46.076776  PCI: 00:1c.3: enabled 0
 1634 21:57:46.079373  PCI: 00:1c.4: enabled 0
 1635 21:57:46.083042  PCI: 00:1c.5: enabled 0
 1636 21:57:46.086347  PCI: 00:1c.6: enabled 0
 1637 21:57:46.086444  PCI: 00:1c.7: enabled 0
 1638 21:57:46.089634  PCI: 00:1d.0: enabled 1
 1639 21:57:46.092834  PCI: 00:1d.1: enabled 0
 1640 21:57:46.096464  PCI: 00:1d.2: enabled 0
 1641 21:57:46.096579  PCI: 00:1d.3: enabled 0
 1642 21:57:46.099302  PCI: 00:1d.4: enabled 0
 1643 21:57:46.102748  PCI: 00:1d.5: enabled 0
 1644 21:57:46.102844  PCI: 00:1e.0: enabled 1
 1645 21:57:46.106375  
 1646 21:57:46.106472  PCI: 00:1e.1: enabled 0
 1647 21:57:46.109151  PCI: 00:1e.2: enabled 1
 1648 21:57:46.112860  PCI: 00:1e.3: enabled 1
 1649 21:57:46.112955  PCI: 00:1f.0: enabled 1
 1650 21:57:46.115812  PCI: 00:1f.1: enabled 0
 1651 21:57:46.119058  PCI: 00:1f.2: enabled 0
 1652 21:57:46.122498  PCI: 00:1f.3: enabled 1
 1653 21:57:46.122594  PCI: 00:1f.4: enabled 1
 1654 21:57:46.125996  PCI: 00:1f.5: enabled 1
 1655 21:57:46.129131  PCI: 00:1f.6: enabled 0
 1656 21:57:46.132457  USB0 port 0: enabled 1
 1657 21:57:46.132554  I2C: 01:15: enabled 1
 1658 21:57:46.135533  I2C: 02:5d: enabled 1
 1659 21:57:46.139228  GENERIC: 0.0: enabled 1
 1660 21:57:46.139323  I2C: 03:1a: enabled 1
 1661 21:57:46.142270  I2C: 03:38: enabled 1
 1662 21:57:46.145820  I2C: 03:39: enabled 1
 1663 21:57:46.145916  I2C: 03:3a: enabled 1
 1664 21:57:46.148968  I2C: 03:3b: enabled 1
 1665 21:57:46.152636  PCI: 00:00.0: enabled 1
 1666 21:57:46.152731  SPI: 00: enabled 1
 1667 21:57:46.155490  SPI: 01: enabled 1
 1668 21:57:46.159214  PNP: 0c09.0: enabled 1
 1669 21:57:46.159310  USB2 port 0: enabled 1
 1670 21:57:46.162424  USB2 port 1: enabled 1
 1671 21:57:46.165784  USB2 port 2: enabled 0
 1672 21:57:46.168576  USB2 port 3: enabled 0
 1673 21:57:46.168673  USB2 port 5: enabled 0
 1674 21:57:46.172158  USB2 port 6: enabled 1
 1675 21:57:46.175619  USB2 port 9: enabled 1
 1676 21:57:46.175718  USB3 port 0: enabled 1
 1677 21:57:46.178791  USB3 port 1: enabled 1
 1678 21:57:46.181837  USB3 port 2: enabled 1
 1679 21:57:46.185056  USB3 port 3: enabled 1
 1680 21:57:46.185153  USB3 port 4: enabled 0
 1681 21:57:46.188459  APIC: 03: enabled 1
 1682 21:57:46.188556  APIC: 01: enabled 1
 1683 21:57:46.191914  APIC: 06: enabled 1
 1684 21:57:46.195014  APIC: 02: enabled 1
 1685 21:57:46.195111  APIC: 04: enabled 1
 1686 21:57:46.198696  APIC: 05: enabled 1
 1687 21:57:46.201479  APIC: 07: enabled 1
 1688 21:57:46.201576  PCI: 00:08.0: enabled 1
 1689 21:57:46.204614  PCI: 00:14.2: enabled 1
 1690 21:57:46.207888  PCI: 01:00.0: enabled 1
 1691 21:57:46.211359  Disabling ACPI via APMC:
 1692 21:57:46.215100  done.
 1693 21:57:46.218071  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1694 21:57:46.221534  ELOG: NV offset 0xaf0000 size 0x4000
 1695 21:57:46.228613  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1696 21:57:46.235691  ELOG: Event(17) added with size 13 at 2023-01-29 21:57:46 UTC
 1697 21:57:46.241774  ELOG: Event(92) added with size 9 at 2023-01-29 21:57:46 UTC
 1698 21:57:46.248691  ELOG: Event(93) added with size 9 at 2023-01-29 21:57:46 UTC
 1699 21:57:46.255499  ELOG: Event(9A) added with size 9 at 2023-01-29 21:57:46 UTC
 1700 21:57:46.262120  ELOG: Event(9E) added with size 10 at 2023-01-29 21:57:46 UTC
 1701 21:57:46.268669  ELOG: Event(9F) added with size 14 at 2023-01-29 21:57:46 UTC
 1702 21:57:46.271998  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1703 21:57:46.279053  ELOG: Event(A1) added with size 10 at 2023-01-29 21:57:46 UTC
 1704 21:57:46.289565  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1705 21:57:46.295502  ELOG: Event(A0) added with size 9 at 2023-01-29 21:57:46 UTC
 1706 21:57:46.299229  elog_add_boot_reason: Logged dev mode boot
 1707 21:57:46.302028  Finalize devices...
 1708 21:57:46.302125  PCI: 00:17.0 final
 1709 21:57:46.305681  Devices finalized
 1710 21:57:46.309128  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1711 21:57:46.315492  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1712 21:57:46.318839  ME: HFSTS1                  : 0x90000245
 1713 21:57:46.321756  ME: HFSTS2                  : 0x3B850126
 1714 21:57:46.329027  ME: HFSTS3                  : 0x00000020
 1715 21:57:46.331908  ME: HFSTS4                  : 0x00004800
 1716 21:57:46.335497  ME: HFSTS5                  : 0x00000000
 1717 21:57:46.338585  ME: HFSTS6                  : 0x40400006
 1718 21:57:46.342131  ME: Manufacturing Mode      : NO
 1719 21:57:46.345056  ME: FW Partition Table      : OK
 1720 21:57:46.348752  ME: Bringup Loader Failure  : NO
 1721 21:57:46.351860  ME: Firmware Init Complete  : YES
 1722 21:57:46.355060  ME: Boot Options Present    : NO
 1723 21:57:46.358504  ME: Update In Progress      : NO
 1724 21:57:46.361522  ME: D0i3 Support            : YES
 1725 21:57:46.365155  ME: Low Power State Enabled : NO
 1726 21:57:46.368251  ME: CPU Replaced            : NO
 1727 21:57:46.371923  ME: CPU Replacement Valid   : YES
 1728 21:57:46.374740  ME: Current Working State   : 5
 1729 21:57:46.378267  ME: Current Operation State : 1
 1730 21:57:46.381930  ME: Current Operation Mode  : 0
 1731 21:57:46.384709  ME: Error Code              : 0
 1732 21:57:46.388074  ME: CPU Debug Disabled      : YES
 1733 21:57:46.391638  ME: TXT Support             : NO
 1734 21:57:46.398351  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1735 21:57:46.404939  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1736 21:57:46.405035  CBFS @ c08000 size 3f8000
 1737 21:57:46.411528  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1738 21:57:46.414443  CBFS: Locating 'fallback/dsdt.aml'
 1739 21:57:46.418035  CBFS: Found @ offset 10bb80 size 3fa5
 1740 21:57:46.424258  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 21:57:46.427859  CBFS @ c08000 size 3f8000
 1742 21:57:46.431500  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 21:57:46.434400  CBFS: Locating 'fallback/slic'
 1744 21:57:46.439769  CBFS: 'fallback/slic' not found.
 1745 21:57:46.446420  ACPI: Writing ACPI tables at 99b3e000.
 1746 21:57:46.446521  ACPI:    * FACS
 1747 21:57:46.450146  ACPI:    * DSDT
 1748 21:57:46.453034  Ramoops buffer: 0x100000@0x99a3d000.
 1749 21:57:46.456463  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1750 21:57:46.462616  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1751 21:57:46.466439  Google Chrome EC: version:
 1752 21:57:46.469438  	ro: helios_v2.0.2659-56403530b
 1753 21:57:46.472425  	rw: helios_v2.0.2849-c41de27e7d
 1754 21:57:46.472520    running image: 1
 1755 21:57:46.477044  ACPI:    * FADT
 1756 21:57:46.477138  SCI is IRQ9
 1757 21:57:46.483444  ACPI: added table 1/32, length now 40
 1758 21:57:46.483541  ACPI:     * SSDT
 1759 21:57:46.486572  Found 1 CPU(s) with 8 core(s) each.
 1760 21:57:46.490020  Error: Could not locate 'wifi_sar' in VPD.
 1761 21:57:46.496789  Checking CBFS for default SAR values
 1762 21:57:46.499842  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1763 21:57:46.503420  CBFS @ c08000 size 3f8000
 1764 21:57:46.510136  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1765 21:57:46.513144  CBFS: Locating 'wifi_sar_defaults.hex'
 1766 21:57:46.516509  CBFS: Found @ offset 5fac0 size 77
 1767 21:57:46.520029  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1768 21:57:46.526609  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1769 21:57:46.529442  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1770 21:57:46.536617  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1771 21:57:46.539784  failed to find key in VPD: dsm_calib_r0_0
 1772 21:57:46.549703  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1773 21:57:46.552635  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1774 21:57:46.559099  failed to find key in VPD: dsm_calib_r0_1
 1775 21:57:46.565755  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1776 21:57:46.572377  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1777 21:57:46.576005  failed to find key in VPD: dsm_calib_r0_2
 1778 21:57:46.586090  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1779 21:57:46.589075  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1780 21:57:46.595745  failed to find key in VPD: dsm_calib_r0_3
 1781 21:57:46.602662  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1782 21:57:46.608908  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1783 21:57:46.611918  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1784 21:57:46.619005  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1785 21:57:46.622630  EC returned error result code 1
 1786 21:57:46.625953  EC returned error result code 1
 1787 21:57:46.629606  EC returned error result code 1
 1788 21:57:46.632930  PS2K: Bad resp from EC. Vivaldi disabled!
 1789 21:57:46.638997  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1790 21:57:46.645894  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1791 21:57:46.649351  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1792 21:57:46.655863  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1793 21:57:46.658808  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1794 21:57:46.665432  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1795 21:57:46.671974  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1796 21:57:46.678500  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1797 21:57:46.682219  ACPI: added table 2/32, length now 44
 1798 21:57:46.682316  ACPI:    * MCFG
 1799 21:57:46.688782  ACPI: added table 3/32, length now 48
 1800 21:57:46.688878  ACPI:    * TPM2
 1801 21:57:46.691782  TPM2 log created at 99a2d000
 1802 21:57:46.695280  ACPI: added table 4/32, length now 52
 1803 21:57:46.698476  ACPI:    * MADT
 1804 21:57:46.698573  SCI is IRQ9
 1805 21:57:46.701964  ACPI: added table 5/32, length now 56
 1806 21:57:46.705436  current = 99b43ac0
 1807 21:57:46.705532  ACPI:    * DMAR
 1808 21:57:46.708534  ACPI: added table 6/32, length now 60
 1809 21:57:46.712062  ACPI:    * IGD OpRegion
 1810 21:57:46.714917  GMA: Found VBT in CBFS
 1811 21:57:46.718478  GMA: Found valid VBT in CBFS
 1812 21:57:46.721520  ACPI: added table 7/32, length now 64
 1813 21:57:46.721616  ACPI:    * HPET
 1814 21:57:46.727876  ACPI: added table 8/32, length now 68
 1815 21:57:46.727972  ACPI: done.
 1816 21:57:46.731305  ACPI tables: 31744 bytes.
 1817 21:57:46.734816  smbios_write_tables: 99a2c000
 1818 21:57:46.738410  EC returned error result code 3
 1819 21:57:46.741370  Couldn't obtain OEM name from CBI
 1820 21:57:46.744723  Create SMBIOS type 17
 1821 21:57:46.748395  PCI: 00:00.0 (Intel Cannonlake)
 1822 21:57:46.748490  PCI: 00:14.3 (Intel WiFi)
 1823 21:57:46.751919  SMBIOS tables: 939 bytes.
 1824 21:57:46.754676  Writing table forward entry at 0x00000500
 1825 21:57:46.758229  
 1826 21:57:46.761633  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1827 21:57:46.764622  Writing coreboot table at 0x99b62000
 1828 21:57:46.771275   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1829 21:57:46.777760   1. 0000000000001000-000000000009ffff: RAM
 1830 21:57:46.781287   2. 00000000000a0000-00000000000fffff: RESERVED
 1831 21:57:46.784223   3. 0000000000100000-0000000099a2bfff: RAM
 1832 21:57:46.790894   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1833 21:57:46.797504   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1834 21:57:46.801081   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1835 21:57:46.807753   7. 000000009a000000-000000009f7fffff: RESERVED
 1836 21:57:46.811321   8. 00000000e0000000-00000000efffffff: RESERVED
 1837 21:57:46.817833   9. 00000000fc000000-00000000fc000fff: RESERVED
 1838 21:57:46.820953  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1839 21:57:46.827558  11. 00000000fed10000-00000000fed17fff: RESERVED
 1840 21:57:46.831263  12. 00000000fed80000-00000000fed83fff: RESERVED
 1841 21:57:46.834313  13. 00000000fed90000-00000000fed91fff: RESERVED
 1842 21:57:46.840766  14. 00000000feda0000-00000000feda1fff: RESERVED
 1843 21:57:46.844163  15. 0000000100000000-000000045e7fffff: RAM
 1844 21:57:46.847131  Graphics framebuffer located at 0xc0000000
 1845 21:57:46.851213  Passing 5 GPIOs to payload:
 1846 21:57:46.857225              NAME |       PORT | POLARITY |     VALUE
 1847 21:57:46.860871     write protect |  undefined |     high |       low
 1848 21:57:46.864230  
 1849 21:57:46.867671               lid |  undefined |     high |      high
 1850 21:57:46.874642             power |  undefined |     high |       low
 1851 21:57:46.877415             oprom |  undefined |     high |       low
 1852 21:57:46.884112          EC in RW | 0x000000cb |     high |       low
 1853 21:57:46.884602  Board ID: 4
 1854 21:57:46.890585  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1855 21:57:46.894273  CBFS @ c08000 size 3f8000
 1856 21:57:46.897025  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1857 21:57:46.903738  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
 1858 21:57:46.907088  coreboot table: 1492 bytes.
 1859 21:57:46.910206  IMD ROOT    0. 99fff000 00001000
 1860 21:57:46.913539  IMD SMALL   1. 99ffe000 00001000
 1861 21:57:46.917301  FSP MEMORY  2. 99c4e000 003b0000
 1862 21:57:46.920486  CONSOLE     3. 99c2e000 00020000
 1863 21:57:46.923937  FMAP        4. 99c2d000 0000054e
 1864 21:57:46.927057  TIME STAMP  5. 99c2c000 00000910
 1865 21:57:46.930750  VBOOT WORK  6. 99c18000 00014000
 1866 21:57:46.933964  MRC DATA    7. 99c16000 00001958
 1867 21:57:46.937227  ROMSTG STCK 8. 99c15000 00001000
 1868 21:57:46.940538  AFTER CAR   9. 99c0b000 0000a000
 1869 21:57:46.943954  RAMSTAGE   10. 99baf000 0005c000
 1870 21:57:46.947065  REFCODE    11. 99b7a000 00035000
 1871 21:57:46.950845  SMM BACKUP 12. 99b6a000 00010000
 1872 21:57:46.953746  COREBOOT   13. 99b62000 00008000
 1873 21:57:46.957391  ACPI       14. 99b3e000 00024000
 1874 21:57:46.960279  ACPI GNVS  15. 99b3d000 00001000
 1875 21:57:46.963576  RAMOOPS    16. 99a3d000 00100000
 1876 21:57:46.967059  TPM2 TCGLOG17. 99a2d000 00010000
 1877 21:57:46.970386  SMBIOS     18. 99a2c000 00000800
 1878 21:57:46.974070  IMD small region:
 1879 21:57:46.977087    IMD ROOT    0. 99ffec00 00000400
 1880 21:57:46.980012    FSP RUNTIME 1. 99ffebe0 00000004
 1881 21:57:46.983794    EC HOSTEVENT 2. 99ffebc0 00000008
 1882 21:57:46.987032    POWER STATE 3. 99ffeb80 00000040
 1883 21:57:46.990378    ROMSTAGE    4. 99ffeb60 00000004
 1884 21:57:46.993208    MEM INFO    5. 99ffe9a0 000001b9
 1885 21:57:46.996587    VPD         6. 99ffe920 0000006c
 1886 21:57:46.999757  MTRR: Physical address space:
 1887 21:57:47.007129  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1888 21:57:47.013718  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1889 21:57:47.020117  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1890 21:57:47.026469  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1891 21:57:47.030074  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1892 21:57:47.036611  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1893 21:57:47.043380  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1894 21:57:47.046362  MTRR: Fixed MSR 0x250 0x0606060606060606
 1895 21:57:47.052926  MTRR: Fixed MSR 0x258 0x0606060606060606
 1896 21:57:47.056706  MTRR: Fixed MSR 0x259 0x0000000000000000
 1897 21:57:47.059656  MTRR: Fixed MSR 0x268 0x0606060606060606
 1898 21:57:47.062787  MTRR: Fixed MSR 0x269 0x0606060606060606
 1899 21:57:47.069377  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1900 21:57:47.073146  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1901 21:57:47.076385  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1902 21:57:47.079333  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1903 21:57:47.086053  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1904 21:57:47.089475  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1905 21:57:47.092578  call enable_fixed_mtrr()
 1906 21:57:47.096246  CPU physical address size: 39 bits
 1907 21:57:47.099273  MTRR: default type WB/UC MTRR counts: 6/8.
 1908 21:57:47.102700  MTRR: WB selected as default type.
 1909 21:57:47.109190  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1910 21:57:47.116163  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1911 21:57:47.122491  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1912 21:57:47.129044  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1913 21:57:47.135828  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1914 21:57:47.142263  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1915 21:57:47.145671  MTRR: Fixed MSR 0x250 0x0606060606060606
 1916 21:57:47.148590  MTRR: Fixed MSR 0x258 0x0606060606060606
 1917 21:57:47.155369  MTRR: Fixed MSR 0x259 0x0000000000000000
 1918 21:57:47.158798  MTRR: Fixed MSR 0x268 0x0606060606060606
 1919 21:57:47.162062  MTRR: Fixed MSR 0x269 0x0606060606060606
 1920 21:57:47.165652  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1921 21:57:47.168603  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1922 21:57:47.172018  
 1923 21:57:47.175486  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1924 21:57:47.178462  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1925 21:57:47.181888  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1926 21:57:47.185006  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1927 21:57:47.185632  
 1928 21:57:47.188252  
 1929 21:57:47.188759  MTRR check
 1930 21:57:47.191901  Fixed MTRRs   : Enabled
 1931 21:57:47.192442  Variable MTRRs: Enabled
 1932 21:57:47.194780  
 1933 21:57:47.195182  call enable_fixed_mtrr()
 1934 21:57:47.201520  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1935 21:57:47.205048  CPU physical address size: 39 bits
 1936 21:57:47.211829  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1937 21:57:47.215648  MTRR: Fixed MSR 0x250 0x0606060606060606
 1938 21:57:47.218205  MTRR: Fixed MSR 0x250 0x0606060606060606
 1939 21:57:47.221457  MTRR: Fixed MSR 0x258 0x0606060606060606
 1940 21:57:47.227955  MTRR: Fixed MSR 0x259 0x0000000000000000
 1941 21:57:47.231825  MTRR: Fixed MSR 0x268 0x0606060606060606
 1942 21:57:47.234571  MTRR: Fixed MSR 0x269 0x0606060606060606
 1943 21:57:47.238293  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1944 21:57:47.241279  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1945 21:57:47.247872  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1946 21:57:47.251544  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1947 21:57:47.255212  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1948 21:57:47.258215  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1949 21:57:47.264772  MTRR: Fixed MSR 0x258 0x0606060606060606
 1950 21:57:47.267887  MTRR: Fixed MSR 0x259 0x0000000000000000
 1951 21:57:47.271348  MTRR: Fixed MSR 0x268 0x0606060606060606
 1952 21:57:47.274380  MTRR: Fixed MSR 0x269 0x0606060606060606
 1953 21:57:47.278155  
 1954 21:57:47.281187  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1955 21:57:47.284150  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1956 21:57:47.287808  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1957 21:57:47.290722  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1958 21:57:47.297403  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1959 21:57:47.300834  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1960 21:57:47.304515  call enable_fixed_mtrr()
 1961 21:57:47.307461  call enable_fixed_mtrr()
 1962 21:57:47.311061  CPU physical address size: 39 bits
 1963 21:57:47.314087  CPU physical address size: 39 bits
 1964 21:57:47.317364  MTRR: Fixed MSR 0x250 0x0606060606060606
 1965 21:57:47.320517  MTRR: Fixed MSR 0x250 0x0606060606060606
 1966 21:57:47.324100  MTRR: Fixed MSR 0x258 0x0606060606060606
 1967 21:57:47.326895  
 1968 21:57:47.330745  MTRR: Fixed MSR 0x259 0x0000000000000000
 1969 21:57:47.333590  MTRR: Fixed MSR 0x268 0x0606060606060606
 1970 21:57:47.337070  MTRR: Fixed MSR 0x269 0x0606060606060606
 1971 21:57:47.340629  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1972 21:57:47.346976  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1973 21:57:47.350453  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1974 21:57:47.353603  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1975 21:57:47.356840  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1976 21:57:47.363828  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1977 21:57:47.367425  MTRR: Fixed MSR 0x258 0x0606060606060606
 1978 21:57:47.370357  MTRR: Fixed MSR 0x259 0x0000000000000000
 1979 21:57:47.373470  MTRR: Fixed MSR 0x268 0x0606060606060606
 1980 21:57:47.380103  MTRR: Fixed MSR 0x269 0x0606060606060606
 1981 21:57:47.383300  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1982 21:57:47.387083  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1983 21:57:47.389812  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1984 21:57:47.396870  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1985 21:57:47.399654  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1986 21:57:47.403397  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1987 21:57:47.406509  call enable_fixed_mtrr()
 1988 21:57:47.410123  call enable_fixed_mtrr()
 1989 21:57:47.412773  CPU physical address size: 39 bits
 1990 21:57:47.416771  CPU physical address size: 39 bits
 1991 21:57:47.419723  CBFS @ c08000 size 3f8000
 1992 21:57:47.423018  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1993 21:57:47.426049  CBFS: Locating 'fallback/payload'
 1994 21:57:47.429451  
 1995 21:57:47.432559  MTRR: Fixed MSR 0x250 0x0606060606060606
 1996 21:57:47.436264  MTRR: Fixed MSR 0x250 0x0606060606060606
 1997 21:57:47.439756  MTRR: Fixed MSR 0x258 0x0606060606060606
 1998 21:57:47.443105  MTRR: Fixed MSR 0x259 0x0000000000000000
 1999 21:57:47.449647  MTRR: Fixed MSR 0x268 0x0606060606060606
 2000 21:57:47.452682  MTRR: Fixed MSR 0x269 0x0606060606060606
 2001 21:57:47.456206  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2002 21:57:47.459251  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2003 21:57:47.465970  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2004 21:57:47.469463  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2005 21:57:47.472551  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2006 21:57:47.475979  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2007 21:57:47.482906  MTRR: Fixed MSR 0x258 0x0606060606060606
 2008 21:57:47.483475  call enable_fixed_mtrr()
 2009 21:57:47.489036  MTRR: Fixed MSR 0x259 0x0000000000000000
 2010 21:57:47.492633  MTRR: Fixed MSR 0x268 0x0606060606060606
 2011 21:57:47.495737  MTRR: Fixed MSR 0x269 0x0606060606060606
 2012 21:57:47.498659  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2013 21:57:47.505661  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2014 21:57:47.509029  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2015 21:57:47.512098  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2016 21:57:47.515786  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2017 21:57:47.522136  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2018 21:57:47.525088  CPU physical address size: 39 bits
 2019 21:57:47.528676  call enable_fixed_mtrr()
 2020 21:57:47.531892  CBFS: Found @ offset 1c96c0 size 3f798
 2021 21:57:47.535606  CPU physical address size: 39 bits
 2022 21:57:47.538335  Checking segment from ROM address 0xffdd16f8
 2023 21:57:47.545002  Checking segment from ROM address 0xffdd1714
 2024 21:57:47.548714  Loading segment from ROM address 0xffdd16f8
 2025 21:57:47.551580    code (compression=0)
 2026 21:57:47.558684    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 2027 21:57:47.568282  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 2028 21:57:47.568821  it's not compressed!
 2029 21:57:47.662145  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2030 21:57:47.668681  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2031 21:57:47.671759  Loading segment from ROM address 0xffdd1714
 2032 21:57:47.675266    Entry Point 0x30000000
 2033 21:57:47.678031  Loaded segments
 2034 21:57:47.684317  Finalizing chipset.
 2035 21:57:47.687166  Finalizing SMM.
 2036 21:57:47.690277  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2037 21:57:47.694224  mp_park_aps done after 0 msecs.
 2038 21:57:47.700392  Jumping to boot code at 30000000(99b62000)
 2039 21:57:47.706962  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2040 21:57:47.707510  
 2041 21:57:47.707862  
 2042 21:57:47.708219  
 2043 21:57:47.710389  Starting depthcharge on Helios...
 2044 21:57:47.710929  
 2045 21:57:47.711960  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2046 21:57:47.712500  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2047 21:57:47.712917  Setting prompt string to ['hatch:']
 2048 21:57:47.713316  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2049 21:57:47.719887  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2050 21:57:47.720457  
 2051 21:57:47.726818  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2052 21:57:47.727404  
 2053 21:57:47.733914  board_setup: Info: eMMC controller not present; skipping
 2054 21:57:47.734468  
 2055 21:57:47.736570  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2056 21:57:47.737045  
 2057 21:57:47.743130  board_setup: Info: SDHCI controller not present; skipping
 2058 21:57:47.743576  
 2059 21:57:47.749736  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2060 21:57:47.750190  
 2061 21:57:47.750543  Wipe memory regions:
 2062 21:57:47.750877  
 2063 21:57:47.753385  	[0x00000000001000, 0x000000000a0000)
 2064 21:57:47.753825  
 2065 21:57:47.759246  	[0x00000000100000, 0x00000030000000)
 2066 21:57:47.759372  
 2067 21:57:47.825973  	[0x00000030657430, 0x00000099a2c000)
 2068 21:57:47.826142  
 2069 21:57:47.976315  	[0x00000100000000, 0x0000045e800000)
 2070 21:57:47.976872  
 2071 21:57:49.432536  R8152: Initializing
 2072 21:57:49.433119  
 2073 21:57:49.435242  Version 9 (ocp_data = 6010)
 2074 21:57:49.435727  
 2075 21:57:49.439641  R8152: Done initializing
 2076 21:57:49.440112  
 2077 21:57:49.442822  Adding net device
 2078 21:57:49.443361  
 2079 21:57:49.925487  R8152: Initializing
 2080 21:57:49.926013  
 2081 21:57:49.929399  Version 6 (ocp_data = 5c30)
 2082 21:57:49.929838  
 2083 21:57:49.932414  R8152: Done initializing
 2084 21:57:49.932952  
 2085 21:57:49.935452  net_add_device: Attemp to include the same device
 2086 21:57:49.938939  
 2087 21:57:49.945730  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2088 21:57:49.946152  
 2089 21:57:49.946491  
 2090 21:57:49.946818  
 2091 21:57:49.947528  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2093 21:57:50.049149  hatch: tftpboot 192.168.201.1 8926102/tftp-deploy-crtlhq1u/kernel/bzImage 8926102/tftp-deploy-crtlhq1u/kernel/cmdline 8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
 2094 21:57:50.049969  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2095 21:57:50.050396  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2096 21:57:50.055479  tftpboot 192.168.201.1 8926102/tftp-deploy-crtlhq1u/kernel/bzImoy-crtlhq1u/kernel/cmdline 8926102/tftp-deploy-crtlhq1u/ramdisk/ramdisk.cpio.gz
 2097 21:57:50.056077  
 2098 21:57:50.056453  Waiting for link
 2099 21:57:50.056782  
 2100 21:57:50.256026  done.
 2101 21:57:50.256860  
 2102 21:57:50.257507  MAC: 00:24:32:50:1a:59
 2103 21:57:50.257958  
 2104 21:57:50.259993  Sending DHCP discover... done.
 2105 21:57:50.260646  
 2106 21:57:50.263080  Waiting for reply... done.
 2107 21:57:50.263694  
 2108 21:57:50.265886  Sending DHCP request... done.
 2109 21:57:50.266486  
 2110 21:57:50.269526  Waiting for reply... done.
 2111 21:57:50.270036  
 2112 21:57:50.272536  My ip is 192.168.201.14
 2113 21:57:50.272981  
 2114 21:57:50.276488  The DHCP server ip is 192.168.201.1
 2115 21:57:50.277046  
 2116 21:57:50.279169  TFTP server IP predefined by user: 192.168.201.1
 2117 21:57:50.279631  
 2118 21:57:50.289158  Bootfile predefined by user: 8926102/tftp-deploy-crtlhq1u/kernel/bzImage
 2119 21:57:50.289678  
 2120 21:57:50.292193  Sending tftp read request... done.
 2121 21:57:50.292641  
 2122 21:57:50.295901  Waiting for the transfer... 
 2123 21:57:50.296472  
 2124 21:57:51.012131  00000000 ################################################################
 2125 21:57:51.012676  
 2126 21:57:51.721470  00080000 ################################################################
 2127 21:57:51.722033  
 2128 21:57:52.417477  00100000 ################################################################
 2129 21:57:52.417994  
 2130 21:57:53.108406  00180000 ################################################################
 2131 21:57:53.108632  
 2132 21:57:53.802962  00200000 ################################################################
 2133 21:57:53.803485  
 2134 21:57:54.493263  00280000 ################################################################
 2135 21:57:54.493901  
 2136 21:57:55.170123  00300000 ################################################################
 2137 21:57:55.170339  
 2138 21:57:55.737263  00380000 ################################################################
 2139 21:57:55.737454  
 2140 21:57:56.400317  00400000 ################################################################
 2141 21:57:56.400864  
 2142 21:57:57.092684  00480000 ################################################################
 2143 21:57:57.093237  
 2144 21:57:57.765720  00500000 ################################################################
 2145 21:57:57.765877  
 2146 21:57:58.305557  00580000 ################################################################
 2147 21:57:58.305707  
 2148 21:57:58.844595  00600000 ################################################################
 2149 21:57:58.844757  
 2150 21:57:59.410221  00680000 ################################################################
 2151 21:57:59.410370  
 2152 21:57:59.968653  00700000 ################################################################
 2153 21:57:59.968799  
 2154 21:58:00.510297  00780000 ################################################################
 2155 21:58:00.510450  
 2156 21:58:01.046277  00800000 ################################################################
 2157 21:58:01.046429  
 2158 21:58:01.586262  00880000 ################################################################
 2159 21:58:01.586432  
 2160 21:58:01.862186  00900000 ################################## done.
 2161 21:58:01.862341  
 2162 21:58:01.865846  The bootfile was 9707520 bytes long.
 2163 21:58:01.865972  
 2164 21:58:01.868815  Sending tftp read request... done.
 2165 21:58:01.868914  
 2166 21:58:01.872426  Waiting for the transfer... 
 2167 21:58:01.872539  
 2168 21:58:02.394728  00000000 ################################################################
 2169 21:58:02.394894  
 2170 21:58:02.906288  00080000 ################################################################
 2171 21:58:02.906434  
 2172 21:58:03.414972  00100000 ################################################################
 2173 21:58:03.415134  
 2174 21:58:03.921624  00180000 ################################################################
 2175 21:58:03.921779  
 2176 21:58:04.433527  00200000 ################################################################
 2177 21:58:04.433689  
 2178 21:58:04.959273  00280000 ################################################################
 2179 21:58:04.959437  
 2180 21:58:05.477058  00300000 ################################################################
 2181 21:58:05.477219  
 2182 21:58:05.986911  00380000 ################################################################
 2183 21:58:05.987067  
 2184 21:58:06.516439  00400000 ################################################################
 2185 21:58:06.516596  
 2186 21:58:07.031028  00480000 ################################################################
 2187 21:58:07.031177  
 2188 21:58:07.309496  00500000 ################################### done.
 2189 21:58:07.309655  
 2190 21:58:07.312481  Sending tftp read request... done.
 2191 21:58:07.312572  
 2192 21:58:07.316289  Waiting for the transfer... 
 2193 21:58:07.316380  
 2194 21:58:07.316457  00000000 # done.
 2195 21:58:07.319639  
 2196 21:58:07.325988  Command line loaded dynamically from TFTP file: 8926102/tftp-deploy-crtlhq1u/kernel/cmdline
 2197 21:58:07.326081  
 2198 21:58:07.349222  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8926102/extract-nfsrootfs-2vuf1wdg,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2199 21:58:07.349332  
 2200 21:58:07.355507  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2201 21:58:07.355607  
 2202 21:58:07.363846  Shutting down all USB controllers.
 2203 21:58:07.363940  
 2204 21:58:07.364017  Removing current net device
 2205 21:58:07.364105  
 2206 21:58:07.367604  Finalizing coreboot
 2207 21:58:07.367691  
 2208 21:58:07.374325  Exiting depthcharge with code 4 at timestamp: 26998693
 2209 21:58:07.374418  
 2210 21:58:07.374501  
 2211 21:58:07.374572  Starting kernel ...
 2212 21:58:07.374639  
 2213 21:58:07.374704  
 2214 21:58:07.374767  
 2215 21:58:07.375160  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2216 21:58:07.375274  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2217 21:58:07.375361  Setting prompt string to ['Linux version [0-9]']
 2218 21:58:07.375439  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2219 21:58:07.375525  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2221 22:02:28.375551  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2223 22:02:28.375783  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2225 22:02:28.375958  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2228 22:02:28.376266  end: 2 depthcharge-action (duration 00:05:00) [common]
 2230 22:02:28.376521  Cleaning after the job
 2231 22:02:28.376617  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/ramdisk
 2232 22:02:28.377131  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/kernel
 2233 22:02:28.377881  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/nfsrootfs
 2234 22:02:28.412697  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926102/tftp-deploy-crtlhq1u/modules
 2235 22:02:28.413030  start: 5.1 power-off (timeout 00:00:30) [common]
 2236 22:02:28.413216  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2237 22:02:28.434521  >> Command sent successfully.

 2238 22:02:28.436531  Returned 0 in 0 seconds
 2239 22:02:28.537349  end: 5.1 power-off (duration 00:00:00) [common]
 2241 22:02:28.537703  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2242 22:02:28.537992  Listened to connection for namespace 'common' for up to 1s
 2243 22:02:29.473973  Listened to connection for namespace 'common' for up to 1s
 2244 22:02:29.477664  Listened to connection for namespace 'common' for up to 1s
 2245 22:02:29.480378  Listened to connection for namespace 'common' for up to 1s
 2246 22:02:29.483835  Listened to connection for namespace 'common' for up to 1s
 2247 22:02:29.487467  Listened to connection for namespace 'common' for up to 1s
 2248 22:02:29.490367  Listened to connection for namespace 'common' for up to 1s
 2249 22:02:29.493850  Listened to connection for namespace 'common' for up to 1s
 2250 22:02:29.497350  Listened to connection for namespace 'common' for up to 1s
 2251 22:02:29.500530  Listened to connection for namespace 'common' for up to 1s
 2252 22:02:29.504045  Listened to connection for namespace 'common' for up to 1s
 2253 22:02:29.506913  Listened to connection for namespace 'common' for up to 1s
 2254 22:02:29.510554  Listened to connection for namespace 'common' for up to 1s
 2255 22:02:29.513724  Listened to connection for namespace 'common' for up to 1s
 2256 22:02:29.517072  Listened to connection for namespace 'common' for up to 1s
 2257 22:02:29.520457  Listened to connection for namespace 'common' for up to 1s
 2258 22:02:29.525032  Listened to connection for namespace 'common' for up to 1s
 2259 22:02:29.529207  Listened to connection for namespace 'common' for up to 1s
 2260 22:02:29.538239  Finalising connection for namespace 'common'
 2261 22:02:29.538855  Disconnecting from shell: Finalise
 2262 22:02:29.539312  
 2263 22:02:29.640442  end: 5.2 read-feedback (duration 00:00:01) [common]
 2264 22:02:29.640978  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8926102
 2265 22:02:29.745866  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8926102
 2266 22:02:29.746072  JobError: Your job cannot terminate cleanly.