Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 21:57:24.232324 lava-dispatcher, installed at version: 2022.11
2 21:57:24.232515 start: 0 validate
3 21:57:24.232648 Start time: 2023-01-29 21:57:24.232641+00:00 (UTC)
4 21:57:24.232793 Using caching service: 'http://localhost/cache/?uri=%s'
5 21:57:24.232934 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 21:57:24.252592 Using caching service: 'http://localhost/cache/?uri=%s'
7 21:57:24.252739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 21:57:24.266733 Using caching service: 'http://localhost/cache/?uri=%s'
9 21:57:24.266848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 21:57:24.283762 Using caching service: 'http://localhost/cache/?uri=%s'
11 21:57:24.283885 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 21:57:24.293228 validate duration: 0.06
14 21:57:24.293527 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 21:57:24.293636 start: 1.1 download-retry (timeout 00:10:00) [common]
16 21:57:24.293726 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 21:57:24.293833 Not decompressing ramdisk as can be used compressed.
18 21:57:24.293915 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/initrd.cpio.gz
19 21:57:24.293985 saving as /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/ramdisk/initrd.cpio.gz
20 21:57:24.294046 total size: 5432079 (5MB)
21 21:57:24.356442 progress 0% (0MB)
22 21:57:24.424765 progress 5% (0MB)
23 21:57:24.464169 progress 10% (0MB)
24 21:57:24.497642 progress 15% (0MB)
25 21:57:24.557171 progress 20% (1MB)
26 21:57:24.599368 progress 25% (1MB)
27 21:57:24.629917 progress 30% (1MB)
28 21:57:24.675465 progress 35% (1MB)
29 21:57:24.715554 progress 40% (2MB)
30 21:57:24.766451 progress 45% (2MB)
31 21:57:24.811926 progress 50% (2MB)
32 21:57:24.853883 progress 55% (2MB)
33 21:57:24.907862 progress 60% (3MB)
34 21:57:24.951375 progress 65% (3MB)
35 21:57:24.986876 progress 70% (3MB)
36 21:57:25.038592 progress 75% (3MB)
37 21:57:25.084629 progress 80% (4MB)
38 21:57:25.132115 progress 85% (4MB)
39 21:57:25.187374 progress 90% (4MB)
40 21:57:25.221275 progress 95% (4MB)
41 21:57:25.265227 progress 100% (5MB)
42 21:57:25.266632 5MB downloaded in 0.97s (5.33MB/s)
43 21:57:25.267545 end: 1.1.1 http-download (duration 00:00:01) [common]
45 21:57:25.269480 end: 1.1 download-retry (duration 00:00:01) [common]
46 21:57:25.270031 start: 1.2 download-retry (timeout 00:09:59) [common]
47 21:57:25.270494 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 21:57:25.271010 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 21:57:25.271376 saving as /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/kernel/bzImage
50 21:57:25.271710 total size: 9707520 (9MB)
51 21:57:25.272050 No compression specified
52 21:57:25.401603 progress 0% (0MB)
53 21:57:25.797537 progress 5% (0MB)
54 21:57:25.931577 progress 10% (0MB)
55 21:57:26.001278 progress 15% (1MB)
56 21:57:26.076509 progress 20% (1MB)
57 21:57:26.151874 progress 25% (2MB)
58 21:57:26.226875 progress 30% (2MB)
59 21:57:26.313561 progress 35% (3MB)
60 21:57:26.378181 progress 40% (3MB)
61 21:57:26.442702 progress 45% (4MB)
62 21:57:26.510161 progress 50% (4MB)
63 21:57:26.566467 progress 55% (5MB)
64 21:57:26.622517 progress 60% (5MB)
65 21:57:26.674200 progress 65% (6MB)
66 21:57:26.749144 progress 70% (6MB)
67 21:57:26.826982 progress 75% (6MB)
68 21:57:26.881633 progress 80% (7MB)
69 21:57:26.943488 progress 85% (7MB)
70 21:57:27.016501 progress 90% (8MB)
71 21:57:27.084181 progress 95% (8MB)
72 21:57:27.140982 progress 100% (9MB)
73 21:57:27.142007 9MB downloaded in 1.87s (4.95MB/s)
74 21:57:27.142767 end: 1.2.1 http-download (duration 00:00:02) [common]
76 21:57:27.144193 end: 1.2 download-retry (duration 00:00:02) [common]
77 21:57:27.144680 start: 1.3 download-retry (timeout 00:09:57) [common]
78 21:57:27.145138 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 21:57:27.145789 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230120.0/amd64/full.rootfs.tar.xz
80 21:57:27.146222 saving as /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/nfsrootfs/full.rootfs.tar
81 21:57:27.146619 total size: 133327304 (127MB)
82 21:57:27.146998 Using unxz to decompress xz
83 21:57:27.377930 progress 0% (0MB)
84 21:57:32.806422 progress 5% (6MB)
85 21:57:35.968748 progress 10% (12MB)
86 21:57:38.487452 progress 15% (19MB)
87 21:57:38.836660 progress 20% (25MB)
88 21:57:39.196284 progress 25% (31MB)
89 21:57:39.568861 progress 30% (38MB)
90 21:57:39.961820 progress 35% (44MB)
91 21:57:40.386973 progress 40% (50MB)
92 21:57:40.882400 progress 45% (57MB)
93 21:57:41.387025 progress 50% (63MB)
94 21:57:41.902577 progress 55% (69MB)
95 21:57:42.447106 progress 60% (76MB)
96 21:57:43.050246 progress 65% (82MB)
97 21:57:43.535997 progress 70% (89MB)
98 21:57:43.913750 progress 75% (95MB)
99 21:57:44.379925 progress 80% (101MB)
100 21:57:44.841257 progress 85% (108MB)
101 21:57:45.134929 progress 90% (114MB)
102 21:57:45.492019 progress 95% (120MB)
103 21:57:45.894170 progress 100% (127MB)
104 21:57:45.900540 127MB downloaded in 18.75s (6.78MB/s)
105 21:57:45.900832 end: 1.3.1 http-download (duration 00:00:19) [common]
107 21:57:45.901103 end: 1.3 download-retry (duration 00:00:19) [common]
108 21:57:45.901198 start: 1.4 download-retry (timeout 00:09:38) [common]
109 21:57:45.901290 start: 1.4.1 http-download (timeout 00:09:38) [common]
110 21:57:45.901419 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 21:57:45.901492 saving as /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/modules/modules.tar
112 21:57:45.901557 total size: 64732 (0MB)
113 21:57:45.901623 Using unxz to decompress xz
114 21:57:45.905821 progress 50% (0MB)
115 21:57:45.906207 progress 100% (0MB)
116 21:57:45.910582 0MB downloaded in 0.01s (6.85MB/s)
117 21:57:45.910836 end: 1.4.1 http-download (duration 00:00:00) [common]
119 21:57:45.911106 end: 1.4 download-retry (duration 00:00:00) [common]
120 21:57:45.911204 start: 1.5 prepare-tftp-overlay (timeout 00:09:38) [common]
121 21:57:45.911303 start: 1.5.1 extract-nfsrootfs (timeout 00:09:38) [common]
122 21:57:47.199114 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8926122/extract-nfsrootfs-p18rxcsl
123 21:57:47.199331 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 21:57:47.199440 start: 1.5.2 lava-overlay (timeout 00:09:37) [common]
125 21:57:47.199582 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu
126 21:57:47.199689 makedir: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin
127 21:57:47.199780 makedir: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/tests
128 21:57:47.199868 makedir: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/results
129 21:57:47.199971 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-add-keys
130 21:57:47.200107 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-add-sources
131 21:57:47.200228 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-background-process-start
132 21:57:47.200346 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-background-process-stop
133 21:57:47.200461 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-common-functions
134 21:57:47.200576 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-echo-ipv4
135 21:57:47.200691 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-install-packages
136 21:57:47.200804 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-installed-packages
137 21:57:47.200916 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-os-build
138 21:57:47.201029 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-probe-channel
139 21:57:47.201141 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-probe-ip
140 21:57:47.201253 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-target-ip
141 21:57:47.201368 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-target-mac
142 21:57:47.201481 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-target-storage
143 21:57:47.201596 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-case
144 21:57:47.201710 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-event
145 21:57:47.201823 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-feedback
146 21:57:47.201934 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-raise
147 21:57:47.202047 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-reference
148 21:57:47.202159 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-runner
149 21:57:47.202270 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-set
150 21:57:47.202385 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-test-shell
151 21:57:47.202499 Updating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-install-packages (oe)
152 21:57:47.202616 Updating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/bin/lava-installed-packages (oe)
153 21:57:47.202717 Creating /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/environment
154 21:57:47.202806 LAVA metadata
155 21:57:47.202878 - LAVA_JOB_ID=8926122
156 21:57:47.202946 - LAVA_DISPATCHER_IP=192.168.201.1
157 21:57:47.203049 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:37) [common]
158 21:57:47.203119 skipped lava-vland-overlay
159 21:57:47.203200 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 21:57:47.203285 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:37) [common]
161 21:57:47.203351 skipped lava-multinode-overlay
162 21:57:47.203429 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 21:57:47.203516 start: 1.5.2.3 test-definition (timeout 00:09:37) [common]
164 21:57:47.203590 Loading test definitions
165 21:57:47.203686 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:37) [common]
166 21:57:47.203760 Using /lava-8926122 at stage 0
167 21:57:47.204023 uuid=8926122_1.5.2.3.1 testdef=None
168 21:57:47.204117 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 21:57:47.204208 start: 1.5.2.3.2 test-overlay (timeout 00:09:37) [common]
170 21:57:47.204689 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 21:57:47.204931 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:37) [common]
173 21:57:47.205518 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 21:57:47.205766 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:37) [common]
176 21:57:47.206320 runner path: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/0/tests/0_dmesg test_uuid 8926122_1.5.2.3.1
177 21:57:47.206469 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 21:57:47.206712 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:37) [common]
180 21:57:47.206790 Using /lava-8926122 at stage 1
181 21:57:47.207037 uuid=8926122_1.5.2.3.5 testdef=None
182 21:57:47.207131 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 21:57:47.207222 start: 1.5.2.3.6 test-overlay (timeout 00:09:37) [common]
184 21:57:47.207673 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 21:57:47.207908 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:37) [common]
187 21:57:47.208495 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 21:57:47.208742 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:37) [common]
190 21:57:47.209304 runner path: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/1/tests/1_bootrr test_uuid 8926122_1.5.2.3.5
191 21:57:47.209574 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 21:57:47.209797 Creating lava-test-runner.conf files
194 21:57:47.209865 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/0 for stage 0
195 21:57:47.209952 - 0_dmesg
196 21:57:47.210030 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926122/lava-overlay-t0bmqhgu/lava-8926122/1 for stage 1
197 21:57:47.210120 - 1_bootrr
198 21:57:47.210217 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 21:57:47.210307 start: 1.5.2.4 compress-overlay (timeout 00:09:37) [common]
200 21:57:47.215855 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 21:57:47.215973 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
202 21:57:47.216067 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 21:57:47.216161 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 21:57:47.216253 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
205 21:57:47.319283 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 21:57:47.319643 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
207 21:57:47.319762 extracting modules file /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926122/extract-nfsrootfs-p18rxcsl
208 21:57:47.323895 extracting modules file /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926122/extract-overlay-ramdisk-6xfc17zt/ramdisk
209 21:57:47.327762 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 21:57:47.327881 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
211 21:57:47.327969 [common] Applying overlay to NFS
212 21:57:47.328041 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8926122/compress-overlay-rfuy61lk/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8926122/extract-nfsrootfs-p18rxcsl
213 21:57:47.331807 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 21:57:47.331921 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
215 21:57:47.332016 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 21:57:47.332119 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
217 21:57:47.332200 Building ramdisk /var/lib/lava/dispatcher/tmp/8926122/extract-overlay-ramdisk-6xfc17zt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8926122/extract-overlay-ramdisk-6xfc17zt/ramdisk
218 21:57:47.366094 >> 24777 blocks
219 21:57:47.837825 rename /var/lib/lava/dispatcher/tmp/8926122/extract-overlay-ramdisk-6xfc17zt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
220 21:57:47.838244 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 21:57:47.838374 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
222 21:57:47.838482 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
223 21:57:47.838582 No mkimage arch provided, not using FIT.
224 21:57:47.838674 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 21:57:47.838763 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 21:57:47.838863 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 21:57:47.838957 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
228 21:57:47.839035 No LXC device requested
229 21:57:47.839119 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 21:57:47.839209 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
231 21:57:47.839295 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 21:57:47.839366 Checking files for TFTP limit of 4294967296 bytes.
233 21:57:47.839752 end: 1 tftp-deploy (duration 00:00:24) [common]
234 21:57:47.839875 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 21:57:47.839968 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 21:57:47.840099 substitutions:
237 21:57:47.840170 - {DTB}: None
238 21:57:47.840240 - {INITRD}: 8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
239 21:57:47.840303 - {KERNEL}: 8926122/tftp-deploy-h61r98ft/kernel/bzImage
240 21:57:47.840365 - {LAVA_MAC}: None
241 21:57:47.840424 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8926122/extract-nfsrootfs-p18rxcsl
242 21:57:47.840484 - {NFS_SERVER_IP}: 192.168.201.1
243 21:57:47.840544 - {PRESEED_CONFIG}: None
244 21:57:47.840601 - {PRESEED_LOCAL}: None
245 21:57:47.840659 - {RAMDISK}: 8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
246 21:57:47.840716 - {ROOT_PART}: None
247 21:57:47.840773 - {ROOT}: None
248 21:57:47.840829 - {SERVER_IP}: 192.168.201.1
249 21:57:47.840885 - {TEE}: None
250 21:57:47.840941 Parsed boot commands:
251 21:57:47.840997 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 21:57:47.841155 Parsed boot commands: tftpboot 192.168.201.1 8926122/tftp-deploy-h61r98ft/kernel/bzImage 8926122/tftp-deploy-h61r98ft/kernel/cmdline 8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
253 21:57:47.841250 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 21:57:47.841351 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 21:57:47.841449 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 21:57:47.841539 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 21:57:47.841611 Not connected, no need to disconnect.
258 21:57:47.841690 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 21:57:47.841790 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 21:57:47.841894 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
261 21:57:47.844743 Setting prompt string to ['lava-test: # ']
262 21:57:47.845060 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 21:57:47.845187 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 21:57:47.845287 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 21:57:47.845450 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 21:57:47.845672 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
267 21:57:47.866336 >> Command sent successfully.
268 21:57:47.868455 Returned 0 in 0 seconds
269 21:57:47.969242 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 21:57:47.969714 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 21:57:47.969825 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 21:57:47.969916 Setting prompt string to 'Starting depthcharge on Voema...'
274 21:57:47.969984 Changing prompt to 'Starting depthcharge on Voema...'
275 21:57:47.970054 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 21:57:47.970378 [Enter `^Ec?' for help]
277 21:57:55.154978
278 21:57:55.155142
279 21:57:55.165186 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 21:57:55.168168 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 21:57:55.175025 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 21:57:55.178406 CPU: AES supported, TXT NOT supported, VT supported
283 21:57:55.185423 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 21:57:55.188638 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 21:57:55.195312 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 21:57:55.198440 VBOOT: Loading verstage.
287 21:57:55.201698 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 21:57:55.208492 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 21:57:55.211759 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 21:57:55.222684 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 21:57:55.228464 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 21:57:55.228551
293 21:57:55.228619
294 21:57:55.242548 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 21:57:55.255699 Probing TPM: . done!
296 21:57:55.259507 TPM ready after 0 ms
297 21:57:55.262154 Connected to device vid:did:rid of 1ae0:0028:00
298 21:57:55.273717 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 21:57:55.280271 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 21:57:55.283508 Initialized TPM device CR50 revision 0
301 21:57:55.340402 tlcl_send_startup: Startup return code is 0
302 21:57:55.340500 TPM: setup succeeded
303 21:57:55.354101 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 21:57:55.368416 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 21:57:55.381464 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 21:57:55.391329 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 21:57:55.394583 Chrome EC: UHEPI supported
308 21:57:55.398317 Phase 1
309 21:57:55.401754 FMAP: area GBB found @ 1805000 (458752 bytes)
310 21:57:55.411594 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 21:57:55.418646 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 21:57:55.424668 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 21:57:55.430952 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 21:57:55.434400 Recovery requested (1009000e)
315 21:57:55.437954 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 21:57:55.449692 tlcl_extend: response is 0
317 21:57:55.456908 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 21:57:55.466056 tlcl_extend: response is 0
319 21:57:55.472359 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 21:57:55.479166 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 21:57:55.486186 BS: verstage times (exec / console): total (unknown) / 142 ms
322 21:57:55.486273
323 21:57:55.486341
324 21:57:55.498969 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 21:57:55.505586 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 21:57:55.508887 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 21:57:55.511985 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 21:57:55.519177 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 21:57:55.521967 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 21:57:55.525496 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 21:57:55.528425 TCO_STS: 0000 0000
332 21:57:55.532089 GEN_PMCON: d0015038 00002200
333 21:57:55.535333 GBLRST_CAUSE: 00000000 00000000
334 21:57:55.538249 HPR_CAUSE0: 00000000
335 21:57:55.538335 prev_sleep_state 5
336 21:57:55.542007 Boot Count incremented to 13337
337 21:57:55.548506 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 21:57:55.554890 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 21:57:55.564892 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 21:57:55.571869 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 21:57:55.575204 Chrome EC: UHEPI supported
342 21:57:55.581481 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 21:57:55.592633 Probing TPM: done!
344 21:57:55.599616 Connected to device vid:did:rid of 1ae0:0028:00
345 21:57:55.609229 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 21:57:55.612774 Initialized TPM device CR50 revision 0
347 21:57:55.627998 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 21:57:55.634442 MRC: Hash idx 0x100b comparison successful.
349 21:57:55.637228 MRC cache found, size faa8
350 21:57:55.637315 bootmode is set to: 2
351 21:57:55.640620 SPD index = 2
352 21:57:55.647283 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 21:57:55.650957 SPD: module type is LPDDR4X
354 21:57:55.654024 SPD: module part number is MT53D1G64D4NW-046
355 21:57:55.660550 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 21:57:55.664021 SPD: device width 16 bits, bus width 16 bits
357 21:57:55.670796 SPD: module size is 2048 MB (per channel)
358 21:57:56.099102 CBMEM:
359 21:57:56.102983 IMD: root @ 0x76fff000 254 entries.
360 21:57:56.106161 IMD: root @ 0x76ffec00 62 entries.
361 21:57:56.109240 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 21:57:56.115532 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 21:57:56.118949 External stage cache:
364 21:57:56.122310 IMD: root @ 0x7b3ff000 254 entries.
365 21:57:56.125618 IMD: root @ 0x7b3fec00 62 entries.
366 21:57:56.140615 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 21:57:56.147112 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 21:57:56.153825 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 21:57:56.167247 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 21:57:56.173708 cse_lite: Skip switching to RW in the recovery path
371 21:57:56.173795 8 DIMMs found
372 21:57:56.173865 SMM Memory Map
373 21:57:56.177134
374 21:57:56.180796 SMRAM : 0x7b000000 0x800000
375 21:57:56.183940 Subregion 0: 0x7b000000 0x200000
376 21:57:56.187030 Subregion 1: 0x7b200000 0x200000
377 21:57:56.190866 Subregion 2: 0x7b400000 0x400000
378 21:57:56.190952 top_of_ram = 0x77000000
379 21:57:56.196890 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
380 21:57:56.203550 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
381 21:57:56.206941 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
382 21:57:56.213621 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 21:57:56.220274 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
384 21:57:56.226810 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
385 21:57:56.237202 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
386 21:57:56.240405 Processing 211 relocs. Offset value of 0x74c0b000
387 21:57:56.243908
388 21:57:56.250385 BS: romstage times (exec / console): total (unknown) / 277 ms
389 21:57:56.256510
390 21:57:56.256597
391 21:57:56.266935 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 21:57:56.270327 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 21:57:56.276627 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 21:57:56.286878 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 21:57:56.293490 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 21:57:56.300051 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 21:57:56.342922 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 21:57:56.349780 Processing 5008 relocs. Offset value of 0x75d98000
399 21:57:56.352763 BS: postcar times (exec / console): total (unknown) / 59 ms
400 21:57:56.356184
401 21:57:56.356269
402 21:57:56.365590 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
403 21:57:56.365679 Normal boot
404 21:57:56.369252 FW_CONFIG value is 0x804c02
405 21:57:56.372575 PCI: 00:07.0 disabled by fw_config
406 21:57:56.375685 PCI: 00:07.1 disabled by fw_config
407 21:57:56.378852 PCI: 00:0d.2 disabled by fw_config
408 21:57:56.385643 PCI: 00:1c.7 disabled by fw_config
409 21:57:56.389071 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 21:57:56.395993 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 21:57:56.398945 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 21:57:56.405326 GENERIC: 0.0 disabled by fw_config
413 21:57:56.408644 GENERIC: 1.0 disabled by fw_config
414 21:57:56.411912 fw_config match found: DB_USB=USB3_ACTIVE
415 21:57:56.415336 fw_config match found: DB_USB=USB3_ACTIVE
416 21:57:56.418534 fw_config match found: DB_USB=USB3_ACTIVE
417 21:57:56.425297 fw_config match found: DB_USB=USB3_ACTIVE
418 21:57:56.428715 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
419 21:57:56.434988 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 21:57:56.438752
421 21:57:56.445264 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
422 21:57:56.452677 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
423 21:57:56.455092 microcode: sig=0x806c1 pf=0x80 revision=0x86
424 21:57:56.462116 microcode: Update skipped, already up-to-date
425 21:57:56.468404 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
426 21:57:56.495993 Detected 4 core, 8 thread CPU.
427 21:57:56.499340 Setting up SMI for CPU
428 21:57:56.502840 IED base = 0x7b400000
429 21:57:56.502925 IED size = 0x00400000
430 21:57:56.506438 Will perform SMM setup.
431 21:57:56.512600 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
432 21:57:56.519485 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
433 21:57:56.525965 Processing 16 relocs. Offset value of 0x00030000
434 21:57:56.529417 Attempting to start 7 APs
435 21:57:56.532842 Waiting for 10ms after sending INIT.
436 21:57:56.548242 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
437 21:57:56.548328 done.
438 21:57:56.551351 AP: slot 5 apic_id 5.
439 21:57:56.554826 AP: slot 2 apic_id 4.
440 21:57:56.554911 AP: slot 3 apic_id 7.
441 21:57:56.558147 AP: slot 6 apic_id 6.
442 21:57:56.561196 AP: slot 7 apic_id 3.
443 21:57:56.561284 AP: slot 4 apic_id 2.
444 21:57:56.568301 Waiting for 2nd SIPI to complete...done.
445 21:57:56.574860 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
446 21:57:56.581445 Processing 13 relocs. Offset value of 0x00038000
447 21:57:56.581532 Unable to locate Global NVS
448 21:57:56.584805
449 21:57:56.591218 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
450 21:57:56.594975 Installing permanent SMM handler to 0x7b000000
451 21:57:56.604232 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
452 21:57:56.607627 Processing 794 relocs. Offset value of 0x7b010000
453 21:57:56.617913 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 21:57:56.620847 Processing 13 relocs. Offset value of 0x7b008000
455 21:57:56.627967 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 21:57:56.634291 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
457 21:57:56.637352 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
458 21:57:56.644004 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 21:57:56.651549 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 21:57:56.657273 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 21:57:56.663762 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 21:57:56.667716 Unable to locate Global NVS
463 21:57:56.673658 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
464 21:57:56.676891 Clearing SMI status registers
465 21:57:56.676976 SMI_STS: PM1
466 21:57:56.680548 PM1_STS: PWRBTN
467 21:57:56.687137 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
468 21:57:56.690388 In relocation handler: CPU 0
469 21:57:56.693474 New SMBASE=0x7b000000 IEDBASE=0x7b400000
470 21:57:56.700181 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 21:57:56.700267 Relocation complete.
472 21:57:56.710396 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
473 21:57:56.710495 In relocation handler: CPU 1
474 21:57:56.713351
475 21:57:56.717031 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 21:57:56.717119 Relocation complete.
477 21:57:56.727061 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
478 21:57:56.727154 In relocation handler: CPU 4
479 21:57:56.729735
480 21:57:56.733518 New SMBASE=0x7afff000 IEDBASE=0x7b400000
481 21:57:56.736316 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 21:57:56.739566 Relocation complete.
483 21:57:56.746283 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
484 21:57:56.749927 In relocation handler: CPU 2
485 21:57:56.753007 New SMBASE=0x7afff800 IEDBASE=0x7b400000
486 21:57:56.759792 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 21:57:56.759892 Relocation complete.
488 21:57:56.769672 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
489 21:57:56.769773 In relocation handler: CPU 5
490 21:57:56.776113 New SMBASE=0x7affec00 IEDBASE=0x7b400000
491 21:57:56.776204 Relocation complete.
492 21:57:56.783120 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
493 21:57:56.786492
494 21:57:56.786581 In relocation handler: CPU 7
495 21:57:56.792872 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 21:57:56.792996 Relocation complete.
497 21:57:56.799850 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
498 21:57:56.802687
499 21:57:56.802774 In relocation handler: CPU 6
500 21:57:56.809196 New SMBASE=0x7affe800 IEDBASE=0x7b400000
501 21:57:56.812507 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 21:57:56.815876 Relocation complete.
503 21:57:56.822836 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
504 21:57:56.825780 In relocation handler: CPU 3
505 21:57:56.828927 New SMBASE=0x7afff400 IEDBASE=0x7b400000
506 21:57:56.832798 Relocation complete.
507 21:57:56.832885 Initializing CPU #0
508 21:57:56.835676 CPU: vendor Intel device 806c1
509 21:57:56.842584 CPU: family 06, model 8c, stepping 01
510 21:57:56.842671 Clearing out pending MCEs
511 21:57:56.845840 Setting up local APIC...
512 21:57:56.848666 apic_id: 0x00 done.
513 21:57:56.852070 Turbo is available but hidden
514 21:57:56.855197 Turbo is available and visible
515 21:57:56.858876 microcode: Update skipped, already up-to-date
516 21:57:56.861987 CPU #0 initialized
517 21:57:56.862074 Initializing CPU #5
518 21:57:56.865568 Initializing CPU #2
519 21:57:56.869261 CPU: vendor Intel device 806c1
520 21:57:56.872857 CPU: family 06, model 8c, stepping 01
521 21:57:56.875952 CPU: vendor Intel device 806c1
522 21:57:56.878669 CPU: family 06, model 8c, stepping 01
523 21:57:56.881968 Clearing out pending MCEs
524 21:57:56.885514 Clearing out pending MCEs
525 21:57:56.885599 Initializing CPU #7
526 21:57:56.888288 Initializing CPU #4
527 21:57:56.891709 CPU: vendor Intel device 806c1
528 21:57:56.894837 CPU: family 06, model 8c, stepping 01
529 21:57:56.899332 CPU: vendor Intel device 806c1
530 21:57:56.902343 CPU: family 06, model 8c, stepping 01
531 21:57:56.905136 Clearing out pending MCEs
532 21:57:56.908407 Clearing out pending MCEs
533 21:57:56.911612 Setting up local APIC...
534 21:57:56.911697 Setting up local APIC...
535 21:57:56.915889 Initializing CPU #1
536 21:57:56.918667 Setting up local APIC...
537 21:57:56.921330 Setting up local APIC...
538 21:57:56.921416 Initializing CPU #3
539 21:57:56.925665 Initializing CPU #6
540 21:57:56.929456 CPU: vendor Intel device 806c1
541 21:57:56.932733 CPU: family 06, model 8c, stepping 01
542 21:57:56.932820 CPU: vendor Intel device 806c1
543 21:57:56.939181 CPU: family 06, model 8c, stepping 01
544 21:57:56.939267 Clearing out pending MCEs
545 21:57:56.942876 Clearing out pending MCEs
546 21:57:56.946595 Setting up local APIC...
547 21:57:56.949210 CPU: vendor Intel device 806c1
548 21:57:56.952919 CPU: family 06, model 8c, stepping 01
549 21:57:56.956020 apic_id: 0x02 done.
550 21:57:56.956107 apic_id: 0x03 done.
551 21:57:56.962692 microcode: Update skipped, already up-to-date
552 21:57:56.965841 microcode: Update skipped, already up-to-date
553 21:57:56.968988 CPU #4 initialized
554 21:57:56.969107 CPU #7 initialized
555 21:57:56.972703 apic_id: 0x05 done.
556 21:57:56.975492 apic_id: 0x04 done.
557 21:57:56.975609 apic_id: 0x07 done.
558 21:57:56.978821 Setting up local APIC...
559 21:57:56.982765 microcode: Update skipped, already up-to-date
560 21:57:56.988741 microcode: Update skipped, already up-to-date
561 21:57:56.988909 CPU #2 initialized
562 21:57:56.991978 CPU #5 initialized
563 21:57:56.995553 Clearing out pending MCEs
564 21:57:56.999134 microcode: Update skipped, already up-to-date
565 21:57:57.002218 apic_id: 0x06 done.
566 21:57:57.002333 CPU #3 initialized
567 21:57:57.009230 microcode: Update skipped, already up-to-date
568 21:57:57.011920 Setting up local APIC...
569 21:57:57.012041 CPU #6 initialized
570 21:57:57.016095 apic_id: 0x01 done.
571 21:57:57.018913 microcode: Update skipped, already up-to-date
572 21:57:57.022098 CPU #1 initialized
573 21:57:57.025929 bsp_do_flight_plan done after 454 msecs.
574 21:57:57.028973 CPU: frequency set to 4400 MHz
575 21:57:57.029087 Enabling SMIs.
576 21:57:57.032294
577 21:57:57.035184 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
578 21:57:57.052631 SATAXPCIE1 indicates PCIe NVMe is present
579 21:57:57.055975 Probing TPM: done!
580 21:57:57.059724 Connected to device vid:did:rid of 1ae0:0028:00
581 21:57:57.070015 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
582 21:57:57.073162 Initialized TPM device CR50 revision 0
583 21:57:57.076521 Enabling S0i3.4
584 21:57:57.083864 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
585 21:57:57.086618 Found a VBT of 8704 bytes after decompression
586 21:57:57.093112 cse_lite: CSE RO boot. HybridStorageMode disabled
587 21:57:57.099825 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
588 21:57:57.175267 FSPS returned 0
589 21:57:57.177986 Executing Phase 1 of FspMultiPhaseSiInit
590 21:57:57.188144 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
591 21:57:57.191399 port C0 DISC req: usage 1 usb3 1 usb2 5
592 21:57:57.195833 Raw Buffer output 0 00000511
593 21:57:57.197815 Raw Buffer output 1 00000000
594 21:57:57.201773 pmc_send_ipc_cmd succeeded
595 21:57:57.208304 port C1 DISC req: usage 1 usb3 2 usb2 3
596 21:57:57.208433 Raw Buffer output 0 00000321
597 21:57:57.211406 Raw Buffer output 1 00000000
598 21:57:57.215918 pmc_send_ipc_cmd succeeded
599 21:57:57.220751 Detected 4 core, 8 thread CPU.
600 21:57:57.224049 Detected 4 core, 8 thread CPU.
601 21:57:57.424751 Display FSP Version Info HOB
602 21:57:57.428074 Reference Code - CPU = a.0.4c.31
603 21:57:57.431663 uCode Version = 0.0.0.86
604 21:57:57.434586 TXT ACM version = ff.ff.ff.ffff
605 21:57:57.437510 Reference Code - ME = a.0.4c.31
606 21:57:57.441245 MEBx version = 0.0.0.0
607 21:57:57.444741 ME Firmware Version = Consumer SKU
608 21:57:57.447592 Reference Code - PCH = a.0.4c.31
609 21:57:57.450899 PCH-CRID Status = Disabled
610 21:57:57.454375 PCH-CRID Original Value = ff.ff.ff.ffff
611 21:57:57.457333 PCH-CRID New Value = ff.ff.ff.ffff
612 21:57:57.461110 OPROM - RST - RAID = ff.ff.ff.ffff
613 21:57:57.464436 PCH Hsio Version = 4.0.0.0
614 21:57:57.467266 Reference Code - SA - System Agent = a.0.4c.31
615 21:57:57.471324 Reference Code - MRC = 2.0.0.1
616 21:57:57.474461 SA - PCIe Version = a.0.4c.31
617 21:57:57.477747 SA-CRID Status = Disabled
618 21:57:57.480829 SA-CRID Original Value = 0.0.0.1
619 21:57:57.484303 SA-CRID New Value = 0.0.0.1
620 21:57:57.487578 OPROM - VBIOS = ff.ff.ff.ffff
621 21:57:57.490803 IO Manageability Engine FW Version = 11.1.4.0
622 21:57:57.493782 PHY Build Version = 0.0.0.e0
623 21:57:57.497644 Thunderbolt(TM) FW Version = 0.0.0.0
624 21:57:57.504141 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
625 21:57:57.507993 ITSS IRQ Polarities Before:
626 21:57:57.508078 IPC0: 0xffffffff
627 21:57:57.511652 IPC1: 0xffffffff
628 21:57:57.511742 IPC2: 0xffffffff
629 21:57:57.511810 IPC3: 0xffffffff
630 21:57:57.515452
631 21:57:57.515539 ITSS IRQ Polarities After:
632 21:57:57.518334 IPC0: 0xffffffff
633 21:57:57.518418 IPC1: 0xffffffff
634 21:57:57.521535 IPC2: 0xffffffff
635 21:57:57.521619 IPC3: 0xffffffff
636 21:57:57.525114
637 21:57:57.528423 Found PCIe Root Port #9 at PCI: 00:1d.0.
638 21:57:57.538609 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
639 21:57:57.551370 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
640 21:57:57.565038 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
641 21:57:57.571031 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
642 21:57:57.571120 Enumerating buses...
643 21:57:57.577800 Show all devs... Before device enumeration.
644 21:57:57.577885 Root Device: enabled 1
645 21:57:57.581269 DOMAIN: 0000: enabled 1
646 21:57:57.584463 CPU_CLUSTER: 0: enabled 1
647 21:57:57.587744 PCI: 00:00.0: enabled 1
648 21:57:57.587829 PCI: 00:02.0: enabled 1
649 21:57:57.591240 PCI: 00:04.0: enabled 1
650 21:57:57.594760 PCI: 00:05.0: enabled 1
651 21:57:57.594862 PCI: 00:06.0: enabled 0
652 21:57:57.598070
653 21:57:57.598156 PCI: 00:07.0: enabled 0
654 21:57:57.600902 PCI: 00:07.1: enabled 0
655 21:57:57.604169 PCI: 00:07.2: enabled 0
656 21:57:57.604254 PCI: 00:07.3: enabled 0
657 21:57:57.607506
658 21:57:57.607591 PCI: 00:08.0: enabled 1
659 21:57:57.610932 PCI: 00:09.0: enabled 0
660 21:57:57.614394 PCI: 00:0a.0: enabled 0
661 21:57:57.614479 PCI: 00:0d.0: enabled 1
662 21:57:57.617806 PCI: 00:0d.1: enabled 0
663 21:57:57.621097 PCI: 00:0d.2: enabled 0
664 21:57:57.625188 PCI: 00:0d.3: enabled 0
665 21:57:57.625272 PCI: 00:0e.0: enabled 0
666 21:57:57.627744 PCI: 00:10.2: enabled 1
667 21:57:57.631267 PCI: 00:10.6: enabled 0
668 21:57:57.634154 PCI: 00:10.7: enabled 0
669 21:57:57.634239 PCI: 00:12.0: enabled 0
670 21:57:57.637125 PCI: 00:12.6: enabled 0
671 21:57:57.640279 PCI: 00:13.0: enabled 0
672 21:57:57.643842 PCI: 00:14.0: enabled 1
673 21:57:57.643928 PCI: 00:14.1: enabled 0
674 21:57:57.646996 PCI: 00:14.2: enabled 1
675 21:57:57.650504 PCI: 00:14.3: enabled 1
676 21:57:57.653511 PCI: 00:15.0: enabled 1
677 21:57:57.653595 PCI: 00:15.1: enabled 1
678 21:57:57.657025 PCI: 00:15.2: enabled 1
679 21:57:57.660420 PCI: 00:15.3: enabled 1
680 21:57:57.660505 PCI: 00:16.0: enabled 1
681 21:57:57.663820
682 21:57:57.663909 PCI: 00:16.1: enabled 0
683 21:57:57.667218 PCI: 00:16.2: enabled 0
684 21:57:57.670132 PCI: 00:16.3: enabled 0
685 21:57:57.670217 PCI: 00:16.4: enabled 0
686 21:57:57.673522
687 21:57:57.673607 PCI: 00:16.5: enabled 0
688 21:57:57.676912 PCI: 00:17.0: enabled 1
689 21:57:57.680178 PCI: 00:19.0: enabled 0
690 21:57:57.680263 PCI: 00:19.1: enabled 1
691 21:57:57.683283 PCI: 00:19.2: enabled 0
692 21:57:57.686755 PCI: 00:1c.0: enabled 1
693 21:57:57.690367 PCI: 00:1c.1: enabled 0
694 21:57:57.690454 PCI: 00:1c.2: enabled 0
695 21:57:57.693219 PCI: 00:1c.3: enabled 0
696 21:57:57.696810 PCI: 00:1c.4: enabled 0
697 21:57:57.699898 PCI: 00:1c.5: enabled 0
698 21:57:57.699983 PCI: 00:1c.6: enabled 1
699 21:57:57.703107 PCI: 00:1c.7: enabled 0
700 21:57:57.706612 PCI: 00:1d.0: enabled 1
701 21:57:57.709521 PCI: 00:1d.1: enabled 0
702 21:57:57.709607 PCI: 00:1d.2: enabled 1
703 21:57:57.713370 PCI: 00:1d.3: enabled 0
704 21:57:57.716371 PCI: 00:1e.0: enabled 1
705 21:57:57.719889 PCI: 00:1e.1: enabled 0
706 21:57:57.719999 PCI: 00:1e.2: enabled 1
707 21:57:57.723129 PCI: 00:1e.3: enabled 1
708 21:57:57.726486 PCI: 00:1f.0: enabled 1
709 21:57:57.726575 PCI: 00:1f.1: enabled 0
710 21:57:57.729366 PCI: 00:1f.2: enabled 1
711 21:57:57.732977 PCI: 00:1f.3: enabled 1
712 21:57:57.736192 PCI: 00:1f.4: enabled 0
713 21:57:57.736290 PCI: 00:1f.5: enabled 1
714 21:57:57.739344 PCI: 00:1f.6: enabled 0
715 21:57:57.742854 PCI: 00:1f.7: enabled 0
716 21:57:57.746324 APIC: 00: enabled 1
717 21:57:57.746410 GENERIC: 0.0: enabled 1
718 21:57:57.749983 GENERIC: 0.0: enabled 1
719 21:57:57.752696 GENERIC: 1.0: enabled 1
720 21:57:57.752781 GENERIC: 0.0: enabled 1
721 21:57:57.756934
722 21:57:57.757020 GENERIC: 1.0: enabled 1
723 21:57:57.759683 USB0 port 0: enabled 1
724 21:57:57.763163 GENERIC: 0.0: enabled 1
725 21:57:57.763249 USB0 port 0: enabled 1
726 21:57:57.765828 GENERIC: 0.0: enabled 1
727 21:57:57.769737 I2C: 00:1a: enabled 1
728 21:57:57.772718 I2C: 00:31: enabled 1
729 21:57:57.772803 I2C: 00:32: enabled 1
730 21:57:57.775746 I2C: 00:10: enabled 1
731 21:57:57.779036 I2C: 00:15: enabled 1
732 21:57:57.779126 GENERIC: 0.0: enabled 0
733 21:57:57.782084 GENERIC: 1.0: enabled 0
734 21:57:57.785574 GENERIC: 0.0: enabled 1
735 21:57:57.785659 SPI: 00: enabled 1
736 21:57:57.788716 SPI: 00: enabled 1
737 21:57:57.792015 PNP: 0c09.0: enabled 1
738 21:57:57.792101 GENERIC: 0.0: enabled 1
739 21:57:57.795362 USB3 port 0: enabled 1
740 21:57:57.798706 USB3 port 1: enabled 1
741 21:57:57.802306 USB3 port 2: enabled 0
742 21:57:57.802391 USB3 port 3: enabled 0
743 21:57:57.805298 USB2 port 0: enabled 0
744 21:57:57.809079 USB2 port 1: enabled 1
745 21:57:57.809185 USB2 port 2: enabled 1
746 21:57:57.811928 USB2 port 3: enabled 0
747 21:57:57.815782 USB2 port 4: enabled 1
748 21:57:57.818513 USB2 port 5: enabled 0
749 21:57:57.818598 USB2 port 6: enabled 0
750 21:57:57.821941 USB2 port 7: enabled 0
751 21:57:57.825343 USB2 port 8: enabled 0
752 21:57:57.825442 USB2 port 9: enabled 0
753 21:57:57.828426 USB3 port 0: enabled 0
754 21:57:57.831896 USB3 port 1: enabled 1
755 21:57:57.831982 USB3 port 2: enabled 0
756 21:57:57.835164 USB3 port 3: enabled 0
757 21:57:57.838211 GENERIC: 0.0: enabled 1
758 21:57:57.841935 GENERIC: 1.0: enabled 1
759 21:57:57.842020 APIC: 01: enabled 1
760 21:57:57.845678 APIC: 04: enabled 1
761 21:57:57.848594 APIC: 07: enabled 1
762 21:57:57.848679 APIC: 02: enabled 1
763 21:57:57.851823 APIC: 05: enabled 1
764 21:57:57.851908 APIC: 06: enabled 1
765 21:57:57.854733 APIC: 03: enabled 1
766 21:57:57.858109 Compare with tree...
767 21:57:57.858195 Root Device: enabled 1
768 21:57:57.861734 DOMAIN: 0000: enabled 1
769 21:57:57.864807 PCI: 00:00.0: enabled 1
770 21:57:57.868402 PCI: 00:02.0: enabled 1
771 21:57:57.871580 PCI: 00:04.0: enabled 1
772 21:57:57.871666 GENERIC: 0.0: enabled 1
773 21:57:57.874534 PCI: 00:05.0: enabled 1
774 21:57:57.878122 PCI: 00:06.0: enabled 0
775 21:57:57.881885 PCI: 00:07.0: enabled 0
776 21:57:57.884755 GENERIC: 0.0: enabled 1
777 21:57:57.884841 PCI: 00:07.1: enabled 0
778 21:57:57.887991 GENERIC: 1.0: enabled 1
779 21:57:57.891162 PCI: 00:07.2: enabled 0
780 21:57:57.894398 GENERIC: 0.0: enabled 1
781 21:57:57.897727 PCI: 00:07.3: enabled 0
782 21:57:57.897813 GENERIC: 1.0: enabled 1
783 21:57:57.901063 PCI: 00:08.0: enabled 1
784 21:57:57.904320 PCI: 00:09.0: enabled 0
785 21:57:57.907873 PCI: 00:0a.0: enabled 0
786 21:57:57.910781 PCI: 00:0d.0: enabled 1
787 21:57:57.910867 USB0 port 0: enabled 1
788 21:57:57.914549
789 21:57:57.914636 USB3 port 0: enabled 1
790 21:57:57.917620 USB3 port 1: enabled 1
791 21:57:57.921189 USB3 port 2: enabled 0
792 21:57:57.924467 USB3 port 3: enabled 0
793 21:57:57.927510 PCI: 00:0d.1: enabled 0
794 21:57:57.927595 PCI: 00:0d.2: enabled 0
795 21:57:57.931008 GENERIC: 0.0: enabled 1
796 21:57:57.934161 PCI: 00:0d.3: enabled 0
797 21:57:57.937509 PCI: 00:0e.0: enabled 0
798 21:57:57.940993 PCI: 00:10.2: enabled 1
799 21:57:57.941076 PCI: 00:10.6: enabled 0
800 21:57:57.944130 PCI: 00:10.7: enabled 0
801 21:57:57.947870 PCI: 00:12.0: enabled 0
802 21:57:57.951007 PCI: 00:12.6: enabled 0
803 21:57:57.954300 PCI: 00:13.0: enabled 0
804 21:57:57.954384 PCI: 00:14.0: enabled 1
805 21:57:57.957607 USB0 port 0: enabled 1
806 21:57:57.960526 USB2 port 0: enabled 0
807 21:57:57.964391 USB2 port 1: enabled 1
808 21:57:57.967313 USB2 port 2: enabled 1
809 21:57:57.967397 USB2 port 3: enabled 0
810 21:57:57.970781 USB2 port 4: enabled 1
811 21:57:57.973837 USB2 port 5: enabled 0
812 21:57:57.977658 USB2 port 6: enabled 0
813 21:57:57.980872 USB2 port 7: enabled 0
814 21:57:57.983753 USB2 port 8: enabled 0
815 21:57:57.983837 USB2 port 9: enabled 0
816 21:57:57.987101 USB3 port 0: enabled 0
817 21:57:57.990519 USB3 port 1: enabled 1
818 21:57:57.993623 USB3 port 2: enabled 0
819 21:57:57.997260 USB3 port 3: enabled 0
820 21:57:58.000321 PCI: 00:14.1: enabled 0
821 21:57:58.000403 PCI: 00:14.2: enabled 1
822 21:57:58.003732 PCI: 00:14.3: enabled 1
823 21:57:58.007297 GENERIC: 0.0: enabled 1
824 21:57:58.010848 PCI: 00:15.0: enabled 1
825 21:57:58.010931 I2C: 00:1a: enabled 1
826 21:57:58.013893
827 21:57:58.013976 I2C: 00:31: enabled 1
828 21:57:58.017289 I2C: 00:32: enabled 1
829 21:57:58.020283 PCI: 00:15.1: enabled 1
830 21:57:58.023611 I2C: 00:10: enabled 1
831 21:57:58.023694 PCI: 00:15.2: enabled 1
832 21:57:58.027292 PCI: 00:15.3: enabled 1
833 21:57:58.030845 PCI: 00:16.0: enabled 1
834 21:57:58.033243 PCI: 00:16.1: enabled 0
835 21:57:58.036652 PCI: 00:16.2: enabled 0
836 21:57:58.036736 PCI: 00:16.3: enabled 0
837 21:57:58.039912 PCI: 00:16.4: enabled 0
838 21:57:58.043064 PCI: 00:16.5: enabled 0
839 21:57:58.046389 PCI: 00:17.0: enabled 1
840 21:57:58.049961 PCI: 00:19.0: enabled 0
841 21:57:58.050044 PCI: 00:19.1: enabled 1
842 21:57:58.053372 I2C: 00:15: enabled 1
843 21:57:58.056787 PCI: 00:19.2: enabled 0
844 21:57:58.059712 PCI: 00:1d.0: enabled 1
845 21:57:58.063071 GENERIC: 0.0: enabled 1
846 21:57:58.063154 PCI: 00:1e.0: enabled 1
847 21:57:58.066733 PCI: 00:1e.1: enabled 0
848 21:57:58.069829 PCI: 00:1e.2: enabled 1
849 21:57:58.073167 SPI: 00: enabled 1
850 21:57:58.073251 PCI: 00:1e.3: enabled 1
851 21:57:58.076242 SPI: 00: enabled 1
852 21:57:58.079777 PCI: 00:1f.0: enabled 1
853 21:57:58.083764 PNP: 0c09.0: enabled 1
854 21:57:58.083848 PCI: 00:1f.1: enabled 0
855 21:57:58.086953
856 21:57:58.087036 PCI: 00:1f.2: enabled 1
857 21:57:58.089848 GENERIC: 0.0: enabled 1
858 21:57:58.092840 GENERIC: 0.0: enabled 1
859 21:57:58.096441 GENERIC: 1.0: enabled 1
860 21:57:58.099941 PCI: 00:1f.3: enabled 1
861 21:57:58.100025 PCI: 00:1f.4: enabled 0
862 21:57:58.103244 PCI: 00:1f.5: enabled 1
863 21:57:58.106539 PCI: 00:1f.6: enabled 0
864 21:57:58.109779 PCI: 00:1f.7: enabled 0
865 21:57:58.161468 CPU_CLUSTER: 0: enabled 1
866 21:57:58.161552 APIC: 00: enabled 1
867 21:57:58.161618 APIC: 01: enabled 1
868 21:57:58.162197 APIC: 04: enabled 1
869 21:57:58.162280 APIC: 07: enabled 1
870 21:57:58.162347 APIC: 02: enabled 1
871 21:57:58.162925 APIC: 05: enabled 1
872 21:57:58.163009 APIC: 06: enabled 1
873 21:57:58.163107 APIC: 03: enabled 1
874 21:57:58.163354 Root Device scanning...
875 21:57:58.163418 scan_static_bus for Root Device
876 21:57:58.163480 DOMAIN: 0000 enabled
877 21:57:58.163537 CPU_CLUSTER: 0 enabled
878 21:57:58.163625 DOMAIN: 0000 scanning...
879 21:57:58.163888 PCI: pci_scan_bus for bus 00
880 21:57:58.163956 PCI: 00:00.0 [8086/0000] ops
881 21:57:58.164015 PCI: 00:00.0 [8086/9a12] enabled
882 21:57:58.164072 PCI: 00:02.0 [8086/0000] bus ops
883 21:57:58.164310 PCI: 00:02.0 [8086/9a40] enabled
884 21:57:58.211932 PCI: 00:04.0 [8086/0000] bus ops
885 21:57:58.212025 PCI: 00:04.0 [8086/9a03] enabled
886 21:57:58.212280 PCI: 00:05.0 [8086/9a19] enabled
887 21:57:58.212351 PCI: 00:07.0 [0000/0000] hidden
888 21:57:58.212601 PCI: 00:08.0 [8086/9a11] enabled
889 21:57:58.212698 PCI: 00:0a.0 [8086/9a0d] disabled
890 21:57:58.212991 PCI: 00:0d.0 [8086/0000] bus ops
891 21:57:58.213103 PCI: 00:0d.0 [8086/9a13] enabled
892 21:57:58.213438 PCI: 00:14.0 [8086/0000] bus ops
893 21:57:58.213552 PCI: 00:14.0 [8086/a0ed] enabled
894 21:57:58.213867 PCI: 00:14.2 [8086/a0ef] enabled
895 21:57:58.213978 PCI: 00:14.3 [8086/0000] bus ops
896 21:57:58.214667 PCI: 00:14.3 [8086/a0f0] enabled
897 21:57:58.214755 PCI: 00:15.0 [8086/0000] bus ops
898 21:57:58.215027 PCI: 00:15.0 [8086/a0e8] enabled
899 21:57:58.215100 PCI: 00:15.1 [8086/0000] bus ops
900 21:57:58.261524
901 21:57:58.261612 PCI: 00:15.1 [8086/a0e9] enabled
902 21:57:58.262092 PCI: 00:15.2 [8086/0000] bus ops
903 21:57:58.262179 PCI: 00:15.2 [8086/a0ea] enabled
904 21:57:58.262945 PCI: 00:15.3 [8086/0000] bus ops
905 21:57:58.263032 PCI: 00:15.3 [8086/a0eb] enabled
906 21:57:58.263673 PCI: 00:16.0 [8086/0000] ops
907 21:57:58.263786 PCI: 00:16.0 [8086/a0e0] enabled
908 21:57:58.263859 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 21:57:58.264111 PCI: 00:19.0 [8086/0000] bus ops
910 21:57:58.264181 PCI: 00:19.0 [8086/a0c5] disabled
911 21:57:58.264243 PCI: 00:19.1 [8086/0000] bus ops
912 21:57:58.264303 PCI: 00:19.1 [8086/a0c6] enabled
913 21:57:58.264705 PCI: 00:1d.0 [8086/0000] bus ops
914 21:57:58.264791 PCI: 00:1d.0 [8086/a0b0] enabled
915 21:57:58.289231 PCI: 00:1e.0 [8086/0000] ops
916 21:57:58.289324 PCI: 00:1e.0 [8086/a0a8] enabled
917 21:57:58.289410 PCI: 00:1e.2 [8086/0000] bus ops
918 21:57:58.289491 PCI: 00:1e.2 [8086/a0aa] enabled
919 21:57:58.289784 PCI: 00:1e.3 [8086/0000] bus ops
920 21:57:58.289853 PCI: 00:1e.3 [8086/a0ab] enabled
921 21:57:58.290094 PCI: 00:1f.0 [8086/0000] bus ops
922 21:57:58.290158 PCI: 00:1f.0 [8086/a087] enabled
923 21:57:58.293295 RTC Init
924 21:57:58.293401 Set power on after power failure.
925 21:57:58.295958 Disabling Deep S3
926 21:57:58.296043 Disabling Deep S3
927 21:57:58.299625 Disabling Deep S4
928 21:57:58.299710 Disabling Deep S4
929 21:57:58.302887 Disabling Deep S5
930 21:57:58.302972 Disabling Deep S5
931 21:57:58.306180 PCI: 00:1f.2 [0000/0000] hidden
932 21:57:58.309512 PCI: 00:1f.3 [8086/0000] bus ops
933 21:57:58.312886 PCI: 00:1f.3 [8086/a0c8] enabled
934 21:57:58.315873 PCI: 00:1f.5 [8086/0000] bus ops
935 21:57:58.319439 PCI: 00:1f.5 [8086/a0a4] enabled
936 21:57:58.322775 PCI: Leftover static devices:
937 21:57:58.326017 PCI: 00:10.2
938 21:57:58.326101 PCI: 00:10.6
939 21:57:58.329116 PCI: 00:10.7
940 21:57:58.329215 PCI: 00:06.0
941 21:57:58.329310 PCI: 00:07.1
942 21:57:58.332942 PCI: 00:07.2
943 21:57:58.333025 PCI: 00:07.3
944 21:57:58.336226 PCI: 00:09.0
945 21:57:58.336310 PCI: 00:0d.1
946 21:57:58.339276 PCI: 00:0d.2
947 21:57:58.339360 PCI: 00:0d.3
948 21:57:58.339426 PCI: 00:0e.0
949 21:57:58.342882 PCI: 00:12.0
950 21:57:58.342966 PCI: 00:12.6
951 21:57:58.345946 PCI: 00:13.0
952 21:57:58.346030 PCI: 00:14.1
953 21:57:58.346096 PCI: 00:16.1
954 21:57:58.349143 PCI: 00:16.2
955 21:57:58.349226 PCI: 00:16.3
956 21:57:58.352306 PCI: 00:16.4
957 21:57:58.352390 PCI: 00:16.5
958 21:57:58.352456 PCI: 00:17.0
959 21:57:58.355589
960 21:57:58.355673 PCI: 00:19.2
961 21:57:58.355740 PCI: 00:1e.1
962 21:57:58.359535 PCI: 00:1f.1
963 21:57:58.359619 PCI: 00:1f.4
964 21:57:58.362338 PCI: 00:1f.6
965 21:57:58.362425 PCI: 00:1f.7
966 21:57:58.365526 PCI: Check your devicetree.cb.
967 21:57:58.368946 PCI: 00:02.0 scanning...
968 21:57:58.372389 scan_generic_bus for PCI: 00:02.0
969 21:57:58.375349 scan_generic_bus for PCI: 00:02.0 done
970 21:57:58.378950 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
971 21:57:58.382492 PCI: 00:04.0 scanning...
972 21:57:58.385450 scan_generic_bus for PCI: 00:04.0
973 21:57:58.388683 GENERIC: 0.0 enabled
974 21:57:58.395258 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
975 21:57:58.399207 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
976 21:57:58.401783 PCI: 00:0d.0 scanning...
977 21:57:58.405286 scan_static_bus for PCI: 00:0d.0
978 21:57:58.408833 USB0 port 0 enabled
979 21:57:58.408933 USB0 port 0 scanning...
980 21:57:58.412223 scan_static_bus for USB0 port 0
981 21:57:58.415578 USB3 port 0 enabled
982 21:57:58.418343 USB3 port 1 enabled
983 21:57:58.418429 USB3 port 2 disabled
984 21:57:58.422005 USB3 port 3 disabled
985 21:57:58.425487 USB3 port 0 scanning...
986 21:57:58.428584 scan_static_bus for USB3 port 0
987 21:57:58.431881 scan_static_bus for USB3 port 0 done
988 21:57:58.435014 scan_bus: bus USB3 port 0 finished in 6 msecs
989 21:57:58.438166 USB3 port 1 scanning...
990 21:57:58.442023 scan_static_bus for USB3 port 1
991 21:57:58.445214 scan_static_bus for USB3 port 1 done
992 21:57:58.451335 scan_bus: bus USB3 port 1 finished in 6 msecs
993 21:57:58.454794 scan_static_bus for USB0 port 0 done
994 21:57:58.458671 scan_bus: bus USB0 port 0 finished in 43 msecs
995 21:57:58.461276 scan_static_bus for PCI: 00:0d.0 done
996 21:57:58.468223 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
997 21:57:58.468311 PCI: 00:14.0 scanning...
998 21:57:58.472037 scan_static_bus for PCI: 00:14.0
999 21:57:58.474806 USB0 port 0 enabled
1000 21:57:58.478321 USB0 port 0 scanning...
1001 21:57:58.481579 scan_static_bus for USB0 port 0
1002 21:57:58.484769 USB2 port 0 disabled
1003 21:57:58.484853 USB2 port 1 enabled
1004 21:57:58.488272 USB2 port 2 enabled
1005 21:57:58.488356 USB2 port 3 disabled
1006 21:57:58.491905 USB2 port 4 enabled
1007 21:57:58.495001 USB2 port 5 disabled
1008 21:57:58.495090 USB2 port 6 disabled
1009 21:57:58.498174 USB2 port 7 disabled
1010 21:57:58.501188 USB2 port 8 disabled
1011 21:57:58.501272 USB2 port 9 disabled
1012 21:57:58.504581 USB3 port 0 disabled
1013 21:57:58.508063 USB3 port 1 enabled
1014 21:57:58.508170 USB3 port 2 disabled
1015 21:57:58.511387 USB3 port 3 disabled
1016 21:57:58.514884 USB2 port 1 scanning...
1017 21:57:58.517763 scan_static_bus for USB2 port 1
1018 21:57:58.521076 scan_static_bus for USB2 port 1 done
1019 21:57:58.524620 scan_bus: bus USB2 port 1 finished in 6 msecs
1020 21:57:58.527642 USB2 port 2 scanning...
1021 21:57:58.531035 scan_static_bus for USB2 port 2
1022 21:57:58.534110 scan_static_bus for USB2 port 2 done
1023 21:57:58.537740 scan_bus: bus USB2 port 2 finished in 6 msecs
1024 21:57:58.541201 USB2 port 4 scanning...
1025 21:57:58.544543 scan_static_bus for USB2 port 4
1026 21:57:58.547411 scan_static_bus for USB2 port 4 done
1027 21:57:58.554297 scan_bus: bus USB2 port 4 finished in 6 msecs
1028 21:57:58.554383 USB3 port 1 scanning...
1029 21:57:58.557551
1030 21:57:58.560734 scan_static_bus for USB3 port 1
1031 21:57:58.563976 scan_static_bus for USB3 port 1 done
1032 21:57:58.568151 scan_bus: bus USB3 port 1 finished in 6 msecs
1033 21:57:58.570775 scan_static_bus for USB0 port 0 done
1034 21:57:58.577173 scan_bus: bus USB0 port 0 finished in 93 msecs
1035 21:57:58.580794 scan_static_bus for PCI: 00:14.0 done
1036 21:57:58.583942 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1037 21:57:58.587157 PCI: 00:14.3 scanning...
1038 21:57:58.590757 scan_static_bus for PCI: 00:14.3
1039 21:57:58.594040 GENERIC: 0.0 enabled
1040 21:57:58.597095 scan_static_bus for PCI: 00:14.3 done
1041 21:57:58.600513 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1042 21:57:58.603764 PCI: 00:15.0 scanning...
1043 21:57:58.607328 scan_static_bus for PCI: 00:15.0
1044 21:57:58.610131 I2C: 00:1a enabled
1045 21:57:58.610217 I2C: 00:31 enabled
1046 21:57:58.614304 I2C: 00:32 enabled
1047 21:57:58.617116 scan_static_bus for PCI: 00:15.0 done
1048 21:57:58.620487 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1049 21:57:58.623819
1050 21:57:58.623905 PCI: 00:15.1 scanning...
1051 21:57:58.627125 scan_static_bus for PCI: 00:15.1
1052 21:57:58.630527 I2C: 00:10 enabled
1053 21:57:58.633825 scan_static_bus for PCI: 00:15.1 done
1054 21:57:58.636712 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1055 21:57:58.640238
1056 21:57:58.640324 PCI: 00:15.2 scanning...
1057 21:57:58.643675 scan_static_bus for PCI: 00:15.2
1058 21:57:58.646855 scan_static_bus for PCI: 00:15.2 done
1059 21:57:58.650632
1060 21:57:58.653563 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1061 21:57:58.656618 PCI: 00:15.3 scanning...
1062 21:57:58.659722 scan_static_bus for PCI: 00:15.3
1063 21:57:58.663307 scan_static_bus for PCI: 00:15.3 done
1064 21:57:58.666330 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1065 21:57:58.669848 PCI: 00:19.1 scanning...
1066 21:57:58.673177 scan_static_bus for PCI: 00:19.1
1067 21:57:58.676823 I2C: 00:15 enabled
1068 21:57:58.680004 scan_static_bus for PCI: 00:19.1 done
1069 21:57:58.683435 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1070 21:57:58.686482 PCI: 00:1d.0 scanning...
1071 21:57:58.689845 do_pci_scan_bridge for PCI: 00:1d.0
1072 21:57:58.692908 PCI: pci_scan_bus for bus 01
1073 21:57:58.696637 PCI: 01:00.0 [15b7/5009] enabled
1074 21:57:58.699699 GENERIC: 0.0 enabled
1075 21:57:58.703227 Enabling Common Clock Configuration
1076 21:57:58.705958 L1 Sub-State supported from root port 29
1077 21:57:58.709486 L1 Sub-State Support = 0x5
1078 21:57:58.712799 CommonModeRestoreTime = 0x28
1079 21:57:58.715941 Power On Value = 0x16, Power On Scale = 0x0
1080 21:57:58.719498 ASPM: Enabled L1
1081 21:57:58.722301 PCIe: Max_Payload_Size adjusted to 128
1082 21:57:58.728884 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1083 21:57:58.728968 PCI: 00:1e.2 scanning...
1084 21:57:58.732313 scan_generic_bus for PCI: 00:1e.2
1085 21:57:58.735713 SPI: 00 enabled
1086 21:57:58.742203 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1087 21:57:58.745761 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1088 21:57:58.748722 PCI: 00:1e.3 scanning...
1089 21:57:58.752763 scan_generic_bus for PCI: 00:1e.3
1090 21:57:58.752848 SPI: 00 enabled
1091 21:57:58.759389 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1092 21:57:58.766254 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1093 21:57:58.766363 PCI: 00:1f.0 scanning...
1094 21:57:58.769830 scan_static_bus for PCI: 00:1f.0
1095 21:57:58.772910 PNP: 0c09.0 enabled
1096 21:57:58.776389 PNP: 0c09.0 scanning...
1097 21:57:58.779902 scan_static_bus for PNP: 0c09.0
1098 21:57:58.782674 scan_static_bus for PNP: 0c09.0 done
1099 21:57:58.786328 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1100 21:57:58.792800 scan_static_bus for PCI: 00:1f.0 done
1101 21:57:58.796334 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1102 21:57:58.799529 PCI: 00:1f.2 scanning...
1103 21:57:58.803734 scan_static_bus for PCI: 00:1f.2
1104 21:57:58.803818 GENERIC: 0.0 enabled
1105 21:57:58.805802 GENERIC: 0.0 scanning...
1106 21:57:58.809072 scan_static_bus for GENERIC: 0.0
1107 21:57:58.812591 GENERIC: 0.0 enabled
1108 21:57:58.816042 GENERIC: 1.0 enabled
1109 21:57:58.819096 scan_static_bus for GENERIC: 0.0 done
1110 21:57:58.822846 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1111 21:57:58.825566 scan_static_bus for PCI: 00:1f.2 done
1112 21:57:58.832548 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1113 21:57:58.835386 PCI: 00:1f.3 scanning...
1114 21:57:58.839215 scan_static_bus for PCI: 00:1f.3
1115 21:57:58.842330 scan_static_bus for PCI: 00:1f.3 done
1116 21:57:58.845308 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1117 21:57:58.848993 PCI: 00:1f.5 scanning...
1118 21:57:58.851930 scan_generic_bus for PCI: 00:1f.5
1119 21:57:58.855863 scan_generic_bus for PCI: 00:1f.5 done
1120 21:57:58.861785 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1121 21:57:58.865260 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1122 21:57:58.868759 scan_static_bus for Root Device done
1123 21:57:58.875515 scan_bus: bus Root Device finished in 735 msecs
1124 21:57:58.875600 done
1125 21:57:58.881844 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1126 21:57:58.884929 Chrome EC: UHEPI supported
1127 21:57:58.891573 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1128 21:57:58.898164 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1129 21:57:58.902294 SPI flash protection: WPSW=0 SRP0=1
1130 21:57:58.905290 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1131 21:57:58.911507 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1132 21:57:58.915155 found VGA at PCI: 00:02.0
1133 21:57:58.917940 Setting up VGA for PCI: 00:02.0
1134 21:57:58.921502 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1135 21:57:58.928137 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1136 21:57:58.928226 Allocating resources...
1137 21:57:58.931641 Reading resources...
1138 21:57:58.934851 Root Device read_resources bus 0 link: 0
1139 21:57:58.941489 DOMAIN: 0000 read_resources bus 0 link: 0
1140 21:57:58.944900 PCI: 00:04.0 read_resources bus 1 link: 0
1141 21:57:58.951245 PCI: 00:04.0 read_resources bus 1 link: 0 done
1142 21:57:58.954449 PCI: 00:0d.0 read_resources bus 0 link: 0
1143 21:57:58.961170 USB0 port 0 read_resources bus 0 link: 0
1144 21:57:58.964557 USB0 port 0 read_resources bus 0 link: 0 done
1145 21:57:58.970724 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1146 21:57:58.974210 PCI: 00:14.0 read_resources bus 0 link: 0
1147 21:57:58.977531 USB0 port 0 read_resources bus 0 link: 0
1148 21:57:58.984956 USB0 port 0 read_resources bus 0 link: 0 done
1149 21:57:58.987827 PCI: 00:14.0 read_resources bus 0 link: 0 done
1150 21:57:58.995223 PCI: 00:14.3 read_resources bus 0 link: 0
1151 21:57:58.998527 PCI: 00:14.3 read_resources bus 0 link: 0 done
1152 21:57:59.005026 PCI: 00:15.0 read_resources bus 0 link: 0
1153 21:57:59.008213 PCI: 00:15.0 read_resources bus 0 link: 0 done
1154 21:57:59.015268 PCI: 00:15.1 read_resources bus 0 link: 0
1155 21:57:59.018092 PCI: 00:15.1 read_resources bus 0 link: 0 done
1156 21:57:59.025297 PCI: 00:19.1 read_resources bus 0 link: 0
1157 21:57:59.029217 PCI: 00:19.1 read_resources bus 0 link: 0 done
1158 21:57:59.035162 PCI: 00:1d.0 read_resources bus 1 link: 0
1159 21:57:59.038813 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1160 21:57:59.045737 PCI: 00:1e.2 read_resources bus 2 link: 0
1161 21:57:59.048365 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1162 21:57:59.054888 PCI: 00:1e.3 read_resources bus 3 link: 0
1163 21:57:59.058568 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1164 21:57:59.065334 PCI: 00:1f.0 read_resources bus 0 link: 0
1165 21:57:59.068411 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1166 21:57:59.075124 PCI: 00:1f.2 read_resources bus 0 link: 0
1167 21:57:59.078360 GENERIC: 0.0 read_resources bus 0 link: 0
1168 21:57:59.081497 GENERIC: 0.0 read_resources bus 0 link: 0 done
1169 21:57:59.084748
1170 21:57:59.088025 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1171 21:57:59.094963 DOMAIN: 0000 read_resources bus 0 link: 0 done
1172 21:57:59.097997 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1173 21:57:59.104328 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1174 21:57:59.107950 Root Device read_resources bus 0 link: 0 done
1175 21:57:59.111591 Done reading resources.
1176 21:57:59.117943 Show resources in subtree (Root Device)...After reading.
1177 21:57:59.121279 Root Device child on link 0 DOMAIN: 0000
1178 21:57:59.124365 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1179 21:57:59.134430 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1180 21:57:59.144500 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1181 21:57:59.144589 PCI: 00:00.0
1182 21:57:59.154699 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1183 21:57:59.164467 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1184 21:57:59.174158 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1185 21:57:59.184600 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1186 21:57:59.193980 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1187 21:57:59.201165 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1188 21:57:59.204470
1189 21:57:59.210627 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 21:57:59.220600 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 21:57:59.230542 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 21:57:59.240501 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 21:57:59.250775 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 21:57:59.257011 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 21:57:59.267218 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 21:57:59.277238 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 21:57:59.287044 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 21:57:59.296795 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 21:57:59.306748 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 21:57:59.313218 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 21:57:59.316919
1202 21:57:59.323148 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1203 21:57:59.333270 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1204 21:57:59.336860 PCI: 00:02.0
1205 21:57:59.346507 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1206 21:57:59.356261 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1207 21:57:59.366417 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1208 21:57:59.369460 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1209 21:57:59.379295 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1210 21:57:59.379381 GENERIC: 0.0
1211 21:57:59.382822 PCI: 00:05.0
1212 21:57:59.393046 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1213 21:57:59.395922 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1214 21:57:59.399195 GENERIC: 0.0
1215 21:57:59.399281 PCI: 00:08.0
1216 21:57:59.409298 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 21:57:59.412472 PCI: 00:0a.0
1218 21:57:59.415630 PCI: 00:0d.0 child on link 0 USB0 port 0
1219 21:57:59.426006 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1220 21:57:59.432279 USB0 port 0 child on link 0 USB3 port 0
1221 21:57:59.432364 USB3 port 0
1222 21:57:59.435775 USB3 port 1
1223 21:57:59.435859 USB3 port 2
1224 21:57:59.438840 USB3 port 3
1225 21:57:59.442256 PCI: 00:14.0 child on link 0 USB0 port 0
1226 21:57:59.452042 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1227 21:57:59.459169 USB0 port 0 child on link 0 USB2 port 0
1228 21:57:59.459253 USB2 port 0
1229 21:57:59.462058 USB2 port 1
1230 21:57:59.462143 USB2 port 2
1231 21:57:59.465615 USB2 port 3
1232 21:57:59.465728 USB2 port 4
1233 21:57:59.469144 USB2 port 5
1234 21:57:59.469241 USB2 port 6
1235 21:57:59.472346 USB2 port 7
1236 21:57:59.472456 USB2 port 8
1237 21:57:59.475569 USB2 port 9
1238 21:57:59.475652 USB3 port 0
1239 21:57:59.478695 USB3 port 1
1240 21:57:59.478803 USB3 port 2
1241 21:57:59.481609 USB3 port 3
1242 21:57:59.481703 PCI: 00:14.2
1243 21:57:59.485127
1244 21:57:59.492150 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 21:57:59.495170
1246 21:57:59.501866 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1247 21:57:59.504874
1248 21:57:59.508585 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1249 21:57:59.517938 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 21:57:59.518044 GENERIC: 0.0
1251 21:57:59.525034 PCI: 00:15.0 child on link 0 I2C: 00:1a
1252 21:57:59.534944 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1253 21:57:59.535051 I2C: 00:1a
1254 21:57:59.537998 I2C: 00:31
1255 21:57:59.538093 I2C: 00:32
1256 21:57:59.541343 PCI: 00:15.1 child on link 0 I2C: 00:10
1257 21:57:59.544578
1258 21:57:59.550987 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 21:57:59.554596
1260 21:57:59.554700 I2C: 00:10
1261 21:57:59.554769 PCI: 00:15.2
1262 21:57:59.564484 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 21:57:59.567699 PCI: 00:15.3
1264 21:57:59.577663 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 21:57:59.577772 PCI: 00:16.0
1266 21:57:59.580929
1267 21:57:59.587350 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1268 21:57:59.590964
1269 21:57:59.591051 PCI: 00:19.0
1270 21:57:59.594381 PCI: 00:19.1 child on link 0 I2C: 00:15
1271 21:57:59.604156 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1272 21:57:59.607944 I2C: 00:15
1273 21:57:59.610774 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1274 21:57:59.620887 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1275 21:57:59.630842 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1276 21:57:59.637111 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1277 21:57:59.640442 GENERIC: 0.0
1278 21:57:59.643846 PCI: 01:00.0
1279 21:57:59.653894 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 21:57:59.663880 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1281 21:57:59.663970 PCI: 00:1e.0
1282 21:57:59.673299 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1283 21:57:59.680390 PCI: 00:1e.2 child on link 0 SPI: 00
1284 21:57:59.690172 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1285 21:57:59.690262 SPI: 00
1286 21:57:59.693743 PCI: 00:1e.3 child on link 0 SPI: 00
1287 21:57:59.703286 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1288 21:57:59.706546 SPI: 00
1289 21:57:59.709867 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1290 21:57:59.719754 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1291 21:57:59.719841 PNP: 0c09.0
1292 21:57:59.729254 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1293 21:57:59.732621 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1294 21:57:59.742762 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1295 21:57:59.752506 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1296 21:57:59.755926 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1297 21:57:59.759424 GENERIC: 0.0
1298 21:57:59.759511 GENERIC: 1.0
1299 21:57:59.762650 PCI: 00:1f.3
1300 21:57:59.772745 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1301 21:57:59.782479 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1302 21:57:59.782569 PCI: 00:1f.5
1303 21:57:59.792313 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1304 21:57:59.795580 CPU_CLUSTER: 0 child on link 0 APIC: 00
1305 21:57:59.798765 APIC: 00
1306 21:57:59.798854 APIC: 01
1307 21:57:59.802693 APIC: 04
1308 21:57:59.802810 APIC: 07
1309 21:57:59.802940 APIC: 02
1310 21:57:59.805457 APIC: 05
1311 21:57:59.805560 APIC: 06
1312 21:57:59.809005 APIC: 03
1313 21:57:59.815564 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1314 21:57:59.822122 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1315 21:57:59.825567 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1316 21:57:59.828715
1317 21:57:59.831958 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1318 21:57:59.838319 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1319 21:57:59.842205 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1320 21:57:59.848710 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1321 21:57:59.854831 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1322 21:57:59.864980 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1323 21:57:59.871452 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1324 21:57:59.878524 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1325 21:57:59.885228 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1326 21:57:59.891315 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1327 21:57:59.897906 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1328 21:57:59.901410
1329 21:57:59.901495 DOMAIN: 0000: Resource ranges:
1330 21:57:59.908067 * Base: 1000, Size: 800, Tag: 100
1331 21:57:59.911352 * Base: 1900, Size: e700, Tag: 100
1332 21:57:59.914509 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1333 21:57:59.921062 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1334 21:57:59.928032 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1335 21:57:59.937980 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1336 21:57:59.943960 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1337 21:57:59.950596 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1338 21:57:59.960850 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1339 21:57:59.968170 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1340 21:57:59.973908 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1341 21:57:59.983738 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1342 21:57:59.990375 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1343 21:57:59.997755 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1344 21:58:00.006904 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1345 21:58:00.013616 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1346 21:58:00.020245 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1347 21:58:00.030605 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1348 21:58:00.036527 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1349 21:58:00.043649 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1350 21:58:00.053923 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1351 21:58:00.060322 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1352 21:58:00.066308 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1353 21:58:00.076935 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1354 21:58:00.083283 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1355 21:58:00.089598 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1356 21:58:00.099565 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1357 21:58:00.103002 DOMAIN: 0000: Resource ranges:
1358 21:58:00.106282 * Base: 7fc00000, Size: 40400000, Tag: 200
1359 21:58:00.109816 * Base: d0000000, Size: 28000000, Tag: 200
1360 21:58:00.116096 * Base: fa000000, Size: 1000000, Tag: 200
1361 21:58:00.119877 * Base: fb001000, Size: 2fff000, Tag: 200
1362 21:58:00.122501 * Base: fe010000, Size: 2e000, Tag: 200
1363 21:58:00.125988 * Base: fe03f000, Size: d41000, Tag: 200
1364 21:58:00.132916 * Base: fed88000, Size: 8000, Tag: 200
1365 21:58:00.136126 * Base: fed93000, Size: d000, Tag: 200
1366 21:58:00.139489 * Base: feda2000, Size: 1e000, Tag: 200
1367 21:58:00.142416 * Base: fede0000, Size: 1220000, Tag: 200
1368 21:58:00.148859 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1369 21:58:00.155605 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1370 21:58:00.162340 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1371 21:58:00.168797 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1372 21:58:00.175376 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1373 21:58:00.182099 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1374 21:58:00.188515 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1375 21:58:00.195300 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1376 21:58:00.202296 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1377 21:58:00.208404 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1378 21:58:00.215261 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1379 21:58:00.221573 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1380 21:58:00.228387 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1381 21:58:00.234977 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1382 21:58:00.241642 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1383 21:58:00.248260 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1384 21:58:00.254730 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1385 21:58:00.261511 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1386 21:58:00.267898 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1387 21:58:00.274904 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1388 21:58:00.281606 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1389 21:58:00.288491 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1390 21:58:00.294808 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1391 21:58:00.301219 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1392 21:58:00.311221 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1393 21:58:00.314221 PCI: 00:1d.0: Resource ranges:
1394 21:58:00.318305 * Base: 7fc00000, Size: 100000, Tag: 200
1395 21:58:00.324127 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1396 21:58:00.331030 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1397 21:58:00.341268 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1398 21:58:00.347415 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1399 21:58:00.351262 Root Device assign_resources, bus 0 link: 0
1400 21:58:00.354453 DOMAIN: 0000 assign_resources, bus 0 link: 0
1401 21:58:00.357300
1402 21:58:00.364106 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1403 21:58:00.373750 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1404 21:58:00.380345 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1405 21:58:00.387293 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1406 21:58:00.393515 PCI: 00:04.0 assign_resources, bus 1 link: 0
1407 21:58:00.396688 PCI: 00:04.0 assign_resources, bus 1 link: 0
1408 21:58:00.406852 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1409 21:58:00.413498 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1410 21:58:00.423359 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1411 21:58:00.426447 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1412 21:58:00.430625 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1413 21:58:00.439789 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1414 21:58:00.443616 PCI: 00:14.0 assign_resources, bus 0 link: 0
1415 21:58:00.450025 PCI: 00:14.0 assign_resources, bus 0 link: 0
1416 21:58:00.456671 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1417 21:58:00.466763 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1418 21:58:00.473351 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1419 21:58:00.476177 PCI: 00:14.3 assign_resources, bus 0 link: 0
1420 21:58:00.483309 PCI: 00:14.3 assign_resources, bus 0 link: 0
1421 21:58:00.489794 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1422 21:58:00.496326 PCI: 00:15.0 assign_resources, bus 0 link: 0
1423 21:58:00.499627 PCI: 00:15.0 assign_resources, bus 0 link: 0
1424 21:58:00.510015 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1425 21:58:00.512929 PCI: 00:15.1 assign_resources, bus 0 link: 0
1426 21:58:00.516004 PCI: 00:15.1 assign_resources, bus 0 link: 0
1427 21:58:00.526373 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1428 21:58:00.532435 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1429 21:58:00.542408 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1430 21:58:00.549251 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1431 21:58:00.556332 PCI: 00:19.1 assign_resources, bus 0 link: 0
1432 21:58:00.559246 PCI: 00:19.1 assign_resources, bus 0 link: 0
1433 21:58:00.568531 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1434 21:58:00.578876 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1435 21:58:00.586134 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1436 21:58:00.591836 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1437 21:58:00.598662 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1438 21:58:00.608605 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1439 21:58:00.612059 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1440 21:58:00.621593 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1441 21:58:00.624881 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1442 21:58:00.627954 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1443 21:58:00.631566
1444 21:58:00.638376 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1445 21:58:00.641139 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1446 21:58:00.648021 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1447 21:58:00.651773 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1448 21:58:00.657736 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1449 21:58:00.661096 LPC: Trying to open IO window from 800 size 1ff
1450 21:58:00.671036 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1451 21:58:00.677461 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1452 21:58:00.687402 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1453 21:58:00.690537 DOMAIN: 0000 assign_resources, bus 0 link: 0
1454 21:58:00.694298 Root Device assign_resources, bus 0 link: 0
1455 21:58:00.697617 Done setting resources.
1456 21:58:00.703696 Show resources in subtree (Root Device)...After assigning values.
1457 21:58:00.707672 Root Device child on link 0 DOMAIN: 0000
1458 21:58:00.713708 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1459 21:58:00.724103 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1460 21:58:00.733768 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1461 21:58:00.733858 PCI: 00:00.0
1462 21:58:00.743720 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1463 21:58:00.753434 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1464 21:58:00.763298 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1465 21:58:00.769910 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1466 21:58:00.773590
1467 21:58:00.780401 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1468 21:58:00.789765 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1469 21:58:00.799956 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1470 21:58:00.809884 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1471 21:58:00.819730 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1472 21:58:00.826539 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1473 21:58:00.836730 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1474 21:58:00.846459 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1475 21:58:00.856147 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1476 21:58:00.865872 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1477 21:58:00.872436 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1478 21:58:00.882468 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1479 21:58:00.892888 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1480 21:58:00.902703 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1481 21:58:00.912392 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1482 21:58:00.922247 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1483 21:58:00.922334 PCI: 00:02.0
1484 21:58:00.935341 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1485 21:58:00.945491 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1486 21:58:00.954970 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1487 21:58:00.958789 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1488 21:58:00.968569 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1489 21:58:00.971543 GENERIC: 0.0
1490 21:58:00.971630 PCI: 00:05.0
1491 21:58:00.981809 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1492 21:58:00.984992
1493 21:58:00.988281 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1494 21:58:00.988368 GENERIC: 0.0
1495 21:58:00.991426 PCI: 00:08.0
1496 21:58:01.001666 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1497 21:58:01.004394 PCI: 00:0a.0
1498 21:58:01.007750 PCI: 00:0d.0 child on link 0 USB0 port 0
1499 21:58:01.018329 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1500 21:58:01.021484 USB0 port 0 child on link 0 USB3 port 0
1501 21:58:01.024899 USB3 port 0
1502 21:58:01.024984 USB3 port 1
1503 21:58:01.027858 USB3 port 2
1504 21:58:01.027943 USB3 port 3
1505 21:58:01.031454
1506 21:58:01.034668 PCI: 00:14.0 child on link 0 USB0 port 0
1507 21:58:01.044236 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1508 21:58:01.047715 USB0 port 0 child on link 0 USB2 port 0
1509 21:58:01.050619 USB2 port 0
1510 21:58:01.050705 USB2 port 1
1511 21:58:01.053862 USB2 port 2
1512 21:58:01.053948 USB2 port 3
1513 21:58:01.057246 USB2 port 4
1514 21:58:01.060713 USB2 port 5
1515 21:58:01.060836 USB2 port 6
1516 21:58:01.064204 USB2 port 7
1517 21:58:01.064320 USB2 port 8
1518 21:58:01.067209 USB2 port 9
1519 21:58:01.067297 USB3 port 0
1520 21:58:01.070507 USB3 port 1
1521 21:58:01.070596 USB3 port 2
1522 21:58:01.074331 USB3 port 3
1523 21:58:01.074418 PCI: 00:14.2
1524 21:58:01.084166 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1525 21:58:01.097357 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1526 21:58:01.101006 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1527 21:58:01.110462 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1528 21:58:01.113450 GENERIC: 0.0
1529 21:58:01.116912 PCI: 00:15.0 child on link 0 I2C: 00:1a
1530 21:58:01.126864 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1531 21:58:01.126951 I2C: 00:1a
1532 21:58:01.130008
1533 21:58:01.130094 I2C: 00:31
1534 21:58:01.130162 I2C: 00:32
1535 21:58:01.136591 PCI: 00:15.1 child on link 0 I2C: 00:10
1536 21:58:01.146535 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1537 21:58:01.146625 I2C: 00:10
1538 21:58:01.150007 PCI: 00:15.2
1539 21:58:01.159796 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1540 21:58:01.159883 PCI: 00:15.3
1541 21:58:01.163649
1542 21:58:01.172937 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1543 21:58:01.173025 PCI: 00:16.0
1544 21:58:01.182717 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1545 21:58:01.186112 PCI: 00:19.0
1546 21:58:01.189381 PCI: 00:19.1 child on link 0 I2C: 00:15
1547 21:58:01.200222 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1548 21:58:01.202822 I2C: 00:15
1549 21:58:01.206224 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1550 21:58:01.216005 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1551 21:58:01.225844 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1552 21:58:01.239005 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1553 21:58:01.239112 GENERIC: 0.0
1554 21:58:01.242380 PCI: 01:00.0
1555 21:58:01.252677 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1556 21:58:01.262292 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1557 21:58:01.262382 PCI: 00:1e.0
1558 21:58:01.275319 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1559 21:58:01.278960 PCI: 00:1e.2 child on link 0 SPI: 00
1560 21:58:01.288624 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1561 21:58:01.288716 SPI: 00
1562 21:58:01.295334 PCI: 00:1e.3 child on link 0 SPI: 00
1563 21:58:01.305589 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1564 21:58:01.305686 SPI: 00
1565 21:58:01.308342 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1566 21:58:01.312126
1567 21:58:01.318383 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1568 21:58:01.321753 PNP: 0c09.0
1569 21:58:01.328638 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1570 21:58:01.334747 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1571 21:58:01.344828 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1572 21:58:01.351454 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1573 21:58:01.358014 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1574 21:58:01.358111 GENERIC: 0.0
1575 21:58:01.361383 GENERIC: 1.0
1576 21:58:01.361471 PCI: 00:1f.3
1577 21:58:01.371269 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1578 21:58:01.384440 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1579 21:58:01.384553 PCI: 00:1f.5
1580 21:58:01.394555 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1581 21:58:01.400762 CPU_CLUSTER: 0 child on link 0 APIC: 00
1582 21:58:01.400857 APIC: 00
1583 21:58:01.400928 APIC: 01
1584 21:58:01.404462 APIC: 04
1585 21:58:01.404550 APIC: 07
1586 21:58:01.404619 APIC: 02
1587 21:58:01.407308
1588 21:58:01.407395 APIC: 05
1589 21:58:01.407464 APIC: 06
1590 21:58:01.410920 APIC: 03
1591 21:58:01.411008 Done allocating resources.
1592 21:58:01.414172
1593 21:58:01.417406 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1594 21:58:01.424142 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1595 21:58:01.427414 Configure GPIOs for I2S audio on UP4.
1596 21:58:01.434856 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1597 21:58:01.437964 Enabling resources...
1598 21:58:01.441358 PCI: 00:00.0 subsystem <- 8086/9a12
1599 21:58:01.444672 PCI: 00:00.0 cmd <- 06
1600 21:58:01.448155 PCI: 00:02.0 subsystem <- 8086/9a40
1601 21:58:01.451371 PCI: 00:02.0 cmd <- 03
1602 21:58:01.454734 PCI: 00:04.0 subsystem <- 8086/9a03
1603 21:58:01.458091 PCI: 00:04.0 cmd <- 02
1604 21:58:01.460979 PCI: 00:05.0 subsystem <- 8086/9a19
1605 21:58:01.461065 PCI: 00:05.0 cmd <- 02
1606 21:58:01.467759 PCI: 00:08.0 subsystem <- 8086/9a11
1607 21:58:01.467847 PCI: 00:08.0 cmd <- 06
1608 21:58:01.471139 PCI: 00:0d.0 subsystem <- 8086/9a13
1609 21:58:01.474305 PCI: 00:0d.0 cmd <- 02
1610 21:58:01.477682 PCI: 00:14.0 subsystem <- 8086/a0ed
1611 21:58:01.480953 PCI: 00:14.0 cmd <- 02
1612 21:58:01.483884 PCI: 00:14.2 subsystem <- 8086/a0ef
1613 21:58:01.487502 PCI: 00:14.2 cmd <- 02
1614 21:58:01.490627 PCI: 00:14.3 subsystem <- 8086/a0f0
1615 21:58:01.494209 PCI: 00:14.3 cmd <- 02
1616 21:58:01.496954 PCI: 00:15.0 subsystem <- 8086/a0e8
1617 21:58:01.500290 PCI: 00:15.0 cmd <- 02
1618 21:58:01.503728 PCI: 00:15.1 subsystem <- 8086/a0e9
1619 21:58:01.506956 PCI: 00:15.1 cmd <- 02
1620 21:58:01.510084 PCI: 00:15.2 subsystem <- 8086/a0ea
1621 21:58:01.513502 PCI: 00:15.2 cmd <- 02
1622 21:58:01.516888 PCI: 00:15.3 subsystem <- 8086/a0eb
1623 21:58:01.516974 PCI: 00:15.3 cmd <- 02
1624 21:58:01.523629 PCI: 00:16.0 subsystem <- 8086/a0e0
1625 21:58:01.523716 PCI: 00:16.0 cmd <- 02
1626 21:58:01.526913 PCI: 00:19.1 subsystem <- 8086/a0c6
1627 21:58:01.530072
1628 21:58:01.530158 PCI: 00:19.1 cmd <- 02
1629 21:58:01.533533 PCI: 00:1d.0 bridge ctrl <- 0013
1630 21:58:01.536339 PCI: 00:1d.0 subsystem <- 8086/a0b0
1631 21:58:01.540005 PCI: 00:1d.0 cmd <- 06
1632 21:58:01.543026 PCI: 00:1e.0 subsystem <- 8086/a0a8
1633 21:58:01.546366 PCI: 00:1e.0 cmd <- 06
1634 21:58:01.549921 PCI: 00:1e.2 subsystem <- 8086/a0aa
1635 21:58:01.552777 PCI: 00:1e.2 cmd <- 06
1636 21:58:01.556356 PCI: 00:1e.3 subsystem <- 8086/a0ab
1637 21:58:01.559524 PCI: 00:1e.3 cmd <- 02
1638 21:58:01.562726 PCI: 00:1f.0 subsystem <- 8086/a087
1639 21:58:01.565979 PCI: 00:1f.0 cmd <- 407
1640 21:58:01.569283 PCI: 00:1f.3 subsystem <- 8086/a0c8
1641 21:58:01.572784 PCI: 00:1f.3 cmd <- 02
1642 21:58:01.575747 PCI: 00:1f.5 subsystem <- 8086/a0a4
1643 21:58:01.575836 PCI: 00:1f.5 cmd <- 406
1644 21:58:01.579348
1645 21:58:01.582493 PCI: 01:00.0 cmd <- 02
1646 21:58:01.586201 done.
1647 21:58:01.589816 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1648 21:58:01.593082 Initializing devices...
1649 21:58:01.596469 Root Device init
1650 21:58:01.599491 Chrome EC: Set SMI mask to 0x0000000000000000
1651 21:58:01.605955 Chrome EC: clear events_b mask to 0x0000000000000000
1652 21:58:01.613000 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1653 21:58:01.616111 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1654 21:58:01.622611 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1655 21:58:01.629524 Chrome EC: Set WAKE mask to 0x0000000000000000
1656 21:58:01.632780 fw_config match found: DB_USB=USB3_ACTIVE
1657 21:58:01.639307 Configure Right Type-C port orientation for retimer
1658 21:58:01.642555 Root Device init finished in 43 msecs
1659 21:58:01.645799 PCI: 00:00.0 init
1660 21:58:01.649495 CPU TDP = 9 Watts
1661 21:58:01.649581 CPU PL1 = 9 Watts
1662 21:58:01.652554 CPU PL2 = 40 Watts
1663 21:58:01.652640 CPU PL4 = 83 Watts
1664 21:58:01.655940
1665 21:58:01.658925 PCI: 00:00.0 init finished in 8 msecs
1666 21:58:01.659010 PCI: 00:02.0 init
1667 21:58:01.662189 GMA: Found VBT in CBFS
1668 21:58:01.666128 GMA: Found valid VBT in CBFS
1669 21:58:01.672503 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1670 21:58:01.678853 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1671 21:58:01.682233 PCI: 00:02.0 init finished in 18 msecs
1672 21:58:01.685726 PCI: 00:05.0 init
1673 21:58:01.689262 PCI: 00:05.0 init finished in 0 msecs
1674 21:58:01.692548 PCI: 00:08.0 init
1675 21:58:01.695587 PCI: 00:08.0 init finished in 0 msecs
1676 21:58:01.698906 PCI: 00:14.0 init
1677 21:58:01.701920 PCI: 00:14.0 init finished in 0 msecs
1678 21:58:01.705578 PCI: 00:14.2 init
1679 21:58:01.708588 PCI: 00:14.2 init finished in 0 msecs
1680 21:58:01.708674 PCI: 00:15.0 init
1681 21:58:01.711995
1682 21:58:01.712083 I2C bus 0 version 0x3230302a
1683 21:58:01.718892 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1684 21:58:01.722136 PCI: 00:15.0 init finished in 6 msecs
1685 21:58:01.722223 PCI: 00:15.1 init
1686 21:58:01.724998 I2C bus 1 version 0x3230302a
1687 21:58:01.728400 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1688 21:58:01.731783 PCI: 00:15.1 init finished in 6 msecs
1689 21:58:01.734754
1690 21:58:01.734841 PCI: 00:15.2 init
1691 21:58:01.739092 I2C bus 2 version 0x3230302a
1692 21:58:01.741373 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1693 21:58:01.745007 PCI: 00:15.2 init finished in 6 msecs
1694 21:58:01.748043 PCI: 00:15.3 init
1695 21:58:01.751869 I2C bus 3 version 0x3230302a
1696 21:58:01.754849 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1697 21:58:01.758027 PCI: 00:15.3 init finished in 6 msecs
1698 21:58:01.761445 PCI: 00:16.0 init
1699 21:58:01.764623 PCI: 00:16.0 init finished in 0 msecs
1700 21:58:01.768186 PCI: 00:19.1 init
1701 21:58:01.771361 I2C bus 5 version 0x3230302a
1702 21:58:01.774480 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1703 21:58:01.778134 PCI: 00:19.1 init finished in 6 msecs
1704 21:58:01.781082 PCI: 00:1d.0 init
1705 21:58:01.781167 Initializing PCH PCIe bridge.
1706 21:58:01.787608 PCI: 00:1d.0 init finished in 3 msecs
1707 21:58:01.790873 PCI: 00:1f.0 init
1708 21:58:01.794220 IOAPIC: Initializing IOAPIC at 0xfec00000
1709 21:58:01.797783 IOAPIC: Bootstrap Processor Local APIC = 0x00
1710 21:58:01.801069 IOAPIC: ID = 0x02
1711 21:58:01.804707 IOAPIC: Dumping registers
1712 21:58:01.804801 reg 0x0000: 0x02000000
1713 21:58:01.807737 reg 0x0001: 0x00770020
1714 21:58:01.810923 reg 0x0002: 0x00000000
1715 21:58:01.814234 PCI: 00:1f.0 init finished in 21 msecs
1716 21:58:01.817297 PCI: 00:1f.2 init
1717 21:58:01.820913 Disabling ACPI via APMC.
1718 21:58:01.824522 APMC done.
1719 21:58:01.827150 PCI: 00:1f.2 init finished in 6 msecs
1720 21:58:01.839214 PCI: 01:00.0 init
1721 21:58:01.842947 PCI: 01:00.0 init finished in 0 msecs
1722 21:58:01.845934 PNP: 0c09.0 init
1723 21:58:01.849526 Google Chrome EC uptime: 8.253 seconds
1724 21:58:01.855442 Google Chrome AP resets since EC boot: 1
1725 21:58:01.859226 Google Chrome most recent AP reset causes:
1726 21:58:01.863049 0.451: 32775 shutdown: entering G3
1727 21:58:01.869102 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1728 21:58:01.872016 PNP: 0c09.0 init finished in 22 msecs
1729 21:58:01.878420 Devices initialized
1730 21:58:01.881111 Show all devs... After init.
1731 21:58:01.884383 Root Device: enabled 1
1732 21:58:01.884469 DOMAIN: 0000: enabled 1
1733 21:58:01.887868 CPU_CLUSTER: 0: enabled 1
1734 21:58:01.891203 PCI: 00:00.0: enabled 1
1735 21:58:01.894898 PCI: 00:02.0: enabled 1
1736 21:58:01.894983 PCI: 00:04.0: enabled 1
1737 21:58:01.897598 PCI: 00:05.0: enabled 1
1738 21:58:01.901167 PCI: 00:06.0: enabled 0
1739 21:58:01.904877 PCI: 00:07.0: enabled 0
1740 21:58:01.904963 PCI: 00:07.1: enabled 0
1741 21:58:01.907543 PCI: 00:07.2: enabled 0
1742 21:58:01.911499 PCI: 00:07.3: enabled 0
1743 21:58:01.914373 PCI: 00:08.0: enabled 1
1744 21:58:01.914458 PCI: 00:09.0: enabled 0
1745 21:58:01.917794 PCI: 00:0a.0: enabled 0
1746 21:58:01.920910 PCI: 00:0d.0: enabled 1
1747 21:58:01.924116 PCI: 00:0d.1: enabled 0
1748 21:58:01.924202 PCI: 00:0d.2: enabled 0
1749 21:58:01.927503 PCI: 00:0d.3: enabled 0
1750 21:58:01.930770 PCI: 00:0e.0: enabled 0
1751 21:58:01.934016 PCI: 00:10.2: enabled 1
1752 21:58:01.934102 PCI: 00:10.6: enabled 0
1753 21:58:01.937509 PCI: 00:10.7: enabled 0
1754 21:58:01.940768 PCI: 00:12.0: enabled 0
1755 21:58:01.940854 PCI: 00:12.6: enabled 0
1756 21:58:01.944027 PCI: 00:13.0: enabled 0
1757 21:58:01.947502 PCI: 00:14.0: enabled 1
1758 21:58:01.951043 PCI: 00:14.1: enabled 0
1759 21:58:01.951128 PCI: 00:14.2: enabled 1
1760 21:58:01.954115 PCI: 00:14.3: enabled 1
1761 21:58:01.957534 PCI: 00:15.0: enabled 1
1762 21:58:01.960913 PCI: 00:15.1: enabled 1
1763 21:58:01.960998 PCI: 00:15.2: enabled 1
1764 21:58:01.964523 PCI: 00:15.3: enabled 1
1765 21:58:01.967542 PCI: 00:16.0: enabled 1
1766 21:58:01.970855 PCI: 00:16.1: enabled 0
1767 21:58:01.970940 PCI: 00:16.2: enabled 0
1768 21:58:01.974008 PCI: 00:16.3: enabled 0
1769 21:58:01.978020 PCI: 00:16.4: enabled 0
1770 21:58:01.978106 PCI: 00:16.5: enabled 0
1771 21:58:01.980360
1772 21:58:01.980445 PCI: 00:17.0: enabled 0
1773 21:58:01.984104 PCI: 00:19.0: enabled 0
1774 21:58:01.987107 PCI: 00:19.1: enabled 1
1775 21:58:01.987192 PCI: 00:19.2: enabled 0
1776 21:58:01.990265 PCI: 00:1c.0: enabled 1
1777 21:58:01.993743 PCI: 00:1c.1: enabled 0
1778 21:58:01.997374 PCI: 00:1c.2: enabled 0
1779 21:58:01.997460 PCI: 00:1c.3: enabled 0
1780 21:58:02.000535 PCI: 00:1c.4: enabled 0
1781 21:58:02.004237 PCI: 00:1c.5: enabled 0
1782 21:58:02.006890 PCI: 00:1c.6: enabled 1
1783 21:58:02.006975 PCI: 00:1c.7: enabled 0
1784 21:58:02.010226 PCI: 00:1d.0: enabled 1
1785 21:58:02.013550 PCI: 00:1d.1: enabled 0
1786 21:58:02.017273 PCI: 00:1d.2: enabled 1
1787 21:58:02.017364 PCI: 00:1d.3: enabled 0
1788 21:58:02.020696 PCI: 00:1e.0: enabled 1
1789 21:58:02.023964 PCI: 00:1e.1: enabled 0
1790 21:58:02.024050 PCI: 00:1e.2: enabled 1
1791 21:58:02.026858
1792 21:58:02.026943 PCI: 00:1e.3: enabled 1
1793 21:58:02.030619 PCI: 00:1f.0: enabled 1
1794 21:58:02.033976 PCI: 00:1f.1: enabled 0
1795 21:58:02.034061 PCI: 00:1f.2: enabled 1
1796 21:58:02.037183 PCI: 00:1f.3: enabled 1
1797 21:58:02.040353 PCI: 00:1f.4: enabled 0
1798 21:58:02.043840 PCI: 00:1f.5: enabled 1
1799 21:58:02.043926 PCI: 00:1f.6: enabled 0
1800 21:58:02.046924 PCI: 00:1f.7: enabled 0
1801 21:58:02.050082 APIC: 00: enabled 1
1802 21:58:02.050168 GENERIC: 0.0: enabled 1
1803 21:58:02.053305 GENERIC: 0.0: enabled 1
1804 21:58:02.056874 GENERIC: 1.0: enabled 1
1805 21:58:02.060516 GENERIC: 0.0: enabled 1
1806 21:58:02.060602 GENERIC: 1.0: enabled 1
1807 21:58:02.063255 USB0 port 0: enabled 1
1808 21:58:02.066556 GENERIC: 0.0: enabled 1
1809 21:58:02.069742 USB0 port 0: enabled 1
1810 21:58:02.069829 GENERIC: 0.0: enabled 1
1811 21:58:02.073504 I2C: 00:1a: enabled 1
1812 21:58:02.076643 I2C: 00:31: enabled 1
1813 21:58:02.076728 I2C: 00:32: enabled 1
1814 21:58:02.079611 I2C: 00:10: enabled 1
1815 21:58:02.083217 I2C: 00:15: enabled 1
1816 21:58:02.083302 GENERIC: 0.0: enabled 0
1817 21:58:02.086608 GENERIC: 1.0: enabled 0
1818 21:58:02.089572 GENERIC: 0.0: enabled 1
1819 21:58:02.093258 SPI: 00: enabled 1
1820 21:58:02.093381 SPI: 00: enabled 1
1821 21:58:02.096164 PNP: 0c09.0: enabled 1
1822 21:58:02.099571 GENERIC: 0.0: enabled 1
1823 21:58:02.099654 USB3 port 0: enabled 1
1824 21:58:02.102658 USB3 port 1: enabled 1
1825 21:58:02.106026 USB3 port 2: enabled 0
1826 21:58:02.106110 USB3 port 3: enabled 0
1827 21:58:02.109855 USB2 port 0: enabled 0
1828 21:58:02.112967 USB2 port 1: enabled 1
1829 21:58:02.116017 USB2 port 2: enabled 1
1830 21:58:02.116101 USB2 port 3: enabled 0
1831 21:58:02.119263 USB2 port 4: enabled 1
1832 21:58:02.122615 USB2 port 5: enabled 0
1833 21:58:02.122699 USB2 port 6: enabled 0
1834 21:58:02.126605 USB2 port 7: enabled 0
1835 21:58:02.129607 USB2 port 8: enabled 0
1836 21:58:02.129691 USB2 port 9: enabled 0
1837 21:58:02.132728
1838 21:58:02.132812 USB3 port 0: enabled 0
1839 21:58:02.136047 USB3 port 1: enabled 1
1840 21:58:02.139571 USB3 port 2: enabled 0
1841 21:58:02.139654 USB3 port 3: enabled 0
1842 21:58:02.142414 GENERIC: 0.0: enabled 1
1843 21:58:02.145954 GENERIC: 1.0: enabled 1
1844 21:58:02.146038 APIC: 01: enabled 1
1845 21:58:02.149234 APIC: 04: enabled 1
1846 21:58:02.153026 APIC: 07: enabled 1
1847 21:58:02.153109 APIC: 02: enabled 1
1848 21:58:02.155920 APIC: 05: enabled 1
1849 21:58:02.159397 APIC: 06: enabled 1
1850 21:58:02.159481 APIC: 03: enabled 1
1851 21:58:02.162680 PCI: 01:00.0: enabled 1
1852 21:58:02.169726 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1853 21:58:02.172729 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1854 21:58:02.175355 ELOG: NV offset 0xf30000 size 0x1000
1855 21:58:02.183286 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1856 21:58:02.189949 ELOG: Event(17) added with size 13 at 2023-01-29 21:58:02 UTC
1857 21:58:02.196282 ELOG: Event(92) added with size 9 at 2023-01-29 21:58:02 UTC
1858 21:58:02.203274 ELOG: Event(93) added with size 9 at 2023-01-29 21:58:02 UTC
1859 21:58:02.209508 ELOG: Event(9E) added with size 10 at 2023-01-29 21:58:02 UTC
1860 21:58:02.216247 ELOG: Event(9F) added with size 14 at 2023-01-29 21:58:02 UTC
1861 21:58:02.222610 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1862 21:58:02.229137 ELOG: Event(A1) added with size 10 at 2023-01-29 21:58:02 UTC
1863 21:58:02.235805 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1864 21:58:02.242429 ELOG: Event(A0) added with size 9 at 2023-01-29 21:58:02 UTC
1865 21:58:02.245591 elog_add_boot_reason: Logged dev mode boot
1866 21:58:02.252190 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1867 21:58:02.255311 Finalize devices...
1868 21:58:02.255395 Devices finalized
1869 21:58:02.262051 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1870 21:58:02.265286 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1871 21:58:02.272059 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1872 21:58:02.275741 ME: HFSTS1 : 0x80030055
1873 21:58:02.282323 ME: HFSTS2 : 0x30280116
1874 21:58:02.285267 ME: HFSTS3 : 0x00000050
1875 21:58:02.291517 ME: HFSTS4 : 0x00004000
1876 21:58:02.295420 ME: HFSTS5 : 0x00000000
1877 21:58:02.298091 ME: HFSTS6 : 0x40400006
1878 21:58:02.301512 ME: Manufacturing Mode : YES
1879 21:58:02.308402 ME: SPI Protection Mode Enabled : NO
1880 21:58:02.311584 ME: FW Partition Table : OK
1881 21:58:02.314934 ME: Bringup Loader Failure : NO
1882 21:58:02.317901 ME: Firmware Init Complete : NO
1883 21:58:02.321480 ME: Boot Options Present : NO
1884 21:58:02.324894 ME: Update In Progress : NO
1885 21:58:02.328424 ME: D0i3 Support : YES
1886 21:58:02.331283 ME: Low Power State Enabled : NO
1887 21:58:02.337767 ME: CPU Replaced : YES
1888 21:58:02.341362 ME: CPU Replacement Valid : YES
1889 21:58:02.344829 ME: Current Working State : 5
1890 21:58:02.347875 ME: Current Operation State : 1
1891 21:58:02.351714 ME: Current Operation Mode : 3
1892 21:58:02.354512 ME: Error Code : 0
1893 21:58:02.357800 ME: Enhanced Debug Mode : NO
1894 21:58:02.361294 ME: CPU Debug Disabled : YES
1895 21:58:02.364431 ME: TXT Support : NO
1896 21:58:02.371247 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1897 21:58:02.381120 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1898 21:58:02.384517 CBFS: 'fallback/slic' not found.
1899 21:58:02.387759 ACPI: Writing ACPI tables at 76b01000.
1900 21:58:02.387993 ACPI: * FACS
1901 21:58:02.390815 ACPI: * DSDT
1902 21:58:02.394202 Ramoops buffer: 0x100000@0x76a00000.
1903 21:58:02.397578 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1904 21:58:02.404448 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1905 21:58:02.408289 Google Chrome EC: version:
1906 21:58:02.411263 ro: voema_v2.0.10114-a447f03e46
1907 21:58:02.414408 rw: voema_v2.0.10114-a447f03e46
1908 21:58:02.414889 running image: 2
1909 21:58:02.421462 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1910 21:58:02.426531 ACPI: * FADT
1911 21:58:02.427006 SCI is IRQ9
1912 21:58:02.433124 ACPI: added table 1/32, length now 40
1913 21:58:02.433676 ACPI: * SSDT
1914 21:58:02.435763 Found 1 CPU(s) with 8 core(s) each.
1915 21:58:02.442855 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1916 21:58:02.445993 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1917 21:58:02.449178 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1918 21:58:02.452670 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1919 21:58:02.460043 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1920 21:58:02.465996 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1921 21:58:02.469438 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1922 21:58:02.475595 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1923 21:58:02.482511 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1924 21:58:02.485789 \_SB.PCI0.RP09: Added StorageD3Enable property
1925 21:58:02.493058 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1926 21:58:02.495425 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1927 21:58:02.501820 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1928 21:58:02.506020 PS2K: Passing 80 keymaps to kernel
1929 21:58:02.512041 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1930 21:58:02.518878 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1931 21:58:02.525919 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1932 21:58:02.532821 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1933 21:58:02.538599 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1934 21:58:02.545824 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1935 21:58:02.551925 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1936 21:58:02.558824 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1937 21:58:02.561830 ACPI: added table 2/32, length now 44
1938 21:58:02.562367 ACPI: * MCFG
1939 21:58:02.565278 ACPI: added table 3/32, length now 48
1940 21:58:02.568026
1941 21:58:02.568434 ACPI: * TPM2
1942 21:58:02.571179 TPM2 log created at 0x769f0000
1943 21:58:02.575246 ACPI: added table 4/32, length now 52
1944 21:58:02.578640 ACPI: * MADT
1945 21:58:02.579075 SCI is IRQ9
1946 21:58:02.581575 ACPI: added table 5/32, length now 56
1947 21:58:02.584801 current = 76b09850
1948 21:58:02.585170 ACPI: * DMAR
1949 21:58:02.588240 ACPI: added table 6/32, length now 60
1950 21:58:02.594590 ACPI: added table 7/32, length now 64
1951 21:58:02.594961 ACPI: * HPET
1952 21:58:02.597965 ACPI: added table 8/32, length now 68
1953 21:58:02.601167 ACPI: done.
1954 21:58:02.601604 ACPI tables: 35216 bytes.
1955 21:58:02.604968 smbios_write_tables: 769ef000
1956 21:58:02.607947 EC returned error result code 3
1957 21:58:02.611236 Couldn't obtain OEM name from CBI
1958 21:58:02.614883 Create SMBIOS type 16
1959 21:58:02.618142 Create SMBIOS type 17
1960 21:58:02.621957 GENERIC: 0.0 (WIFI Device)
1961 21:58:02.625234 SMBIOS tables: 1734 bytes.
1962 21:58:02.628574 Writing table forward entry at 0x00000500
1963 21:58:02.634695 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1964 21:58:02.638266 Writing coreboot table at 0x76b25000
1965 21:58:02.645021 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1966 21:58:02.648301 1. 0000000000001000-000000000009ffff: RAM
1967 21:58:02.651389 2. 00000000000a0000-00000000000fffff: RESERVED
1968 21:58:02.658618 3. 0000000000100000-00000000769eefff: RAM
1969 21:58:02.661542 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1970 21:58:02.668265 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1971 21:58:02.674704 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1972 21:58:02.677747 7. 0000000077000000-000000007fbfffff: RESERVED
1973 21:58:02.684502 8. 00000000c0000000-00000000cfffffff: RESERVED
1974 21:58:02.687701 9. 00000000f8000000-00000000f9ffffff: RESERVED
1975 21:58:02.691439 10. 00000000fb000000-00000000fb000fff: RESERVED
1976 21:58:02.697876 11. 00000000fe000000-00000000fe00ffff: RESERVED
1977 21:58:02.700941 12. 00000000fed80000-00000000fed87fff: RESERVED
1978 21:58:02.707833 13. 00000000fed90000-00000000fed92fff: RESERVED
1979 21:58:02.710866 14. 00000000feda0000-00000000feda1fff: RESERVED
1980 21:58:02.717671 15. 00000000fedc0000-00000000feddffff: RESERVED
1981 21:58:02.721018 16. 0000000100000000-00000004803fffff: RAM
1982 21:58:02.724663 Passing 4 GPIOs to payload:
1983 21:58:02.728120 NAME | PORT | POLARITY | VALUE
1984 21:58:02.734820 lid | undefined | high | high
1985 21:58:02.740702 power | undefined | high | low
1986 21:58:02.744358 oprom | undefined | high | low
1987 21:58:02.751229 EC in RW | 0x000000e5 | high | high
1988 21:58:02.757546 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1989 21:58:02.761127 coreboot table: 1576 bytes.
1990 21:58:02.763900 IMD ROOT 0. 0x76fff000 0x00001000
1991 21:58:02.767372 IMD SMALL 1. 0x76ffe000 0x00001000
1992 21:58:02.770601 FSP MEMORY 2. 0x76c4e000 0x003b0000
1993 21:58:02.774052 VPD 3. 0x76c4d000 0x00000367
1994 21:58:02.777277 RO MCACHE 4. 0x76c4c000 0x00000fdc
1995 21:58:02.780334 CONSOLE 5. 0x76c2c000 0x00020000
1996 21:58:02.783546 FMAP 6. 0x76c2b000 0x00000578
1997 21:58:02.790528 TIME STAMP 7. 0x76c2a000 0x00000910
1998 21:58:02.793483 VBOOT WORK 8. 0x76c16000 0x00014000
1999 21:58:02.796928 ROMSTG STCK 9. 0x76c15000 0x00001000
2000 21:58:02.801050 AFTER CAR 10. 0x76c0a000 0x0000b000
2001 21:58:02.803651 RAMSTAGE 11. 0x76b97000 0x00073000
2002 21:58:02.806703 REFCODE 12. 0x76b42000 0x00055000
2003 21:58:02.810016 SMM BACKUP 13. 0x76b32000 0x00010000
2004 21:58:02.813490 4f444749 14. 0x76b30000 0x00002000
2005 21:58:02.817179
2006 21:58:02.817730 EXT VBT15. 0x76b2d000 0x0000219f
2007 21:58:02.820492
2008 21:58:02.823789 COREBOOT 16. 0x76b25000 0x00008000
2009 21:58:02.826954 ACPI 17. 0x76b01000 0x00024000
2010 21:58:02.830341 ACPI GNVS 18. 0x76b00000 0x00001000
2011 21:58:02.833505 RAMOOPS 19. 0x76a00000 0x00100000
2012 21:58:02.836932 TPM2 TCGLOG20. 0x769f0000 0x00010000
2013 21:58:02.840396 SMBIOS 21. 0x769ef000 0x00000800
2014 21:58:02.843447 IMD small region:
2015 21:58:02.847245 IMD ROOT 0. 0x76ffec00 0x00000400
2016 21:58:02.850383 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2017 21:58:02.853501 POWER STATE 2. 0x76ffeb80 0x00000044
2018 21:58:02.860647 ROMSTAGE 3. 0x76ffeb60 0x00000004
2019 21:58:02.863195 MEM INFO 4. 0x76ffe980 0x000001e0
2020 21:58:02.870108 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2021 21:58:02.870663 MTRR: Physical address space:
2022 21:58:02.876517 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2023 21:58:02.882706 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2024 21:58:02.889613 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2025 21:58:02.896399 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2026 21:58:02.903024 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2027 21:58:02.909253 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2028 21:58:02.915981 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2029 21:58:02.919573 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 21:58:02.922868 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 21:58:02.925883 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 21:58:02.933164 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 21:58:02.936167 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 21:58:02.939242 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 21:58:02.942677 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 21:58:02.949371 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 21:58:02.952678 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 21:58:02.956345 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 21:58:02.959038 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 21:58:02.964057 call enable_fixed_mtrr()
2041 21:58:02.967562 CPU physical address size: 39 bits
2042 21:58:02.973450 MTRR: default type WB/UC MTRR counts: 6/7.
2043 21:58:02.976738 MTRR: WB selected as default type.
2044 21:58:02.983403 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2045 21:58:02.986878 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2046 21:58:02.989867
2047 21:58:02.993247 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2048 21:58:02.999685 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2049 21:58:03.007039 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2050 21:58:03.013140 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2051 21:58:03.020907 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 21:58:03.023794 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 21:58:03.027145 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 21:58:03.030581 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 21:58:03.037075 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 21:58:03.040704 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 21:58:03.043763 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 21:58:03.046999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 21:58:03.053977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 21:58:03.057239 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 21:58:03.060061 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 21:58:03.060603
2063 21:58:03.064186 MTRR check
2064 21:58:03.067579 call enable_fixed_mtrr()
2065 21:58:03.068117 Fixed MTRRs : Enabled
2066 21:58:03.070546 Variable MTRRs: Enabled
2067 21:58:03.070995
2068 21:58:03.074073 CPU physical address size: 39 bits
2069 21:58:03.081473 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2070 21:58:03.085152 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 21:58:03.091655 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 21:58:03.094907 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 21:58:03.098459 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 21:58:03.101740 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 21:58:03.108335 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 21:58:03.111733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 21:58:03.115325 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 21:58:03.118399 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 21:58:03.124986 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 21:58:03.128140 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 21:58:03.131496 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 21:58:03.139000 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 21:58:03.142072 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 21:58:03.145374 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 21:58:03.148432 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 21:58:03.155267 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 21:58:03.158652 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 21:58:03.162247 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 21:58:03.165293 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 21:58:03.172482 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 21:58:03.174754 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 21:58:03.178327 call enable_fixed_mtrr()
2093 21:58:03.181457 call enable_fixed_mtrr()
2094 21:58:03.185077 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 21:58:03.188147 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 21:58:03.194757 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 21:58:03.198263 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 21:58:03.201487 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 21:58:03.204832 MTRR: Fixed MSR 0x269 0x0606060606060606
2100 21:58:03.211483 MTRR: Fixed MSR 0x26a 0x0606060606060606
2101 21:58:03.214418 MTRR: Fixed MSR 0x26b 0x0606060606060606
2102 21:58:03.217763 MTRR: Fixed MSR 0x26c 0x0606060606060606
2103 21:58:03.221252 MTRR: Fixed MSR 0x26d 0x0606060606060606
2104 21:58:03.227954 MTRR: Fixed MSR 0x26e 0x0606060606060606
2105 21:58:03.231409 MTRR: Fixed MSR 0x26f 0x0606060606060606
2106 21:58:03.237802 MTRR: Fixed MSR 0x258 0x0606060606060606
2107 21:58:03.238222 call enable_fixed_mtrr()
2108 21:58:03.244239 MTRR: Fixed MSR 0x259 0x0000000000000000
2109 21:58:03.247700 MTRR: Fixed MSR 0x268 0x0606060606060606
2110 21:58:03.251157 MTRR: Fixed MSR 0x269 0x0606060606060606
2111 21:58:03.253772 MTRR: Fixed MSR 0x26a 0x0606060606060606
2112 21:58:03.260817 MTRR: Fixed MSR 0x26b 0x0606060606060606
2113 21:58:03.263906 MTRR: Fixed MSR 0x26c 0x0606060606060606
2114 21:58:03.267202 MTRR: Fixed MSR 0x26d 0x0606060606060606
2115 21:58:03.270314 MTRR: Fixed MSR 0x26e 0x0606060606060606
2116 21:58:03.276842 MTRR: Fixed MSR 0x26f 0x0606060606060606
2117 21:58:03.280768 CPU physical address size: 39 bits
2118 21:58:03.284693 call enable_fixed_mtrr()
2119 21:58:03.287674 CPU physical address size: 39 bits
2120 21:58:03.292078 CPU physical address size: 39 bits
2121 21:58:03.298746 MTRR: Fixed MSR 0x250 0x0606060606060606
2122 21:58:03.301810 MTRR: Fixed MSR 0x250 0x0606060606060606
2123 21:58:03.305202 MTRR: Fixed MSR 0x258 0x0606060606060606
2124 21:58:03.308836 MTRR: Fixed MSR 0x259 0x0000000000000000
2125 21:58:03.315686 MTRR: Fixed MSR 0x268 0x0606060606060606
2126 21:58:03.318647 MTRR: Fixed MSR 0x269 0x0606060606060606
2127 21:58:03.321772 MTRR: Fixed MSR 0x26a 0x0606060606060606
2128 21:58:03.326432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2129 21:58:03.331884 MTRR: Fixed MSR 0x26c 0x0606060606060606
2130 21:58:03.335303 MTRR: Fixed MSR 0x26d 0x0606060606060606
2131 21:58:03.338432 MTRR: Fixed MSR 0x26e 0x0606060606060606
2132 21:58:03.342206 MTRR: Fixed MSR 0x26f 0x0606060606060606
2133 21:58:03.349918 MTRR: Fixed MSR 0x258 0x0606060606060606
2134 21:58:03.350423 call enable_fixed_mtrr()
2135 21:58:03.356723 MTRR: Fixed MSR 0x259 0x0000000000000000
2136 21:58:03.359904 MTRR: Fixed MSR 0x268 0x0606060606060606
2137 21:58:03.363262 MTRR: Fixed MSR 0x269 0x0606060606060606
2138 21:58:03.366593 MTRR: Fixed MSR 0x26a 0x0606060606060606
2139 21:58:03.373004 MTRR: Fixed MSR 0x26b 0x0606060606060606
2140 21:58:03.376258 MTRR: Fixed MSR 0x26c 0x0606060606060606
2141 21:58:03.379659 MTRR: Fixed MSR 0x26d 0x0606060606060606
2142 21:58:03.383061 MTRR: Fixed MSR 0x26e 0x0606060606060606
2143 21:58:03.389738 MTRR: Fixed MSR 0x26f 0x0606060606060606
2144 21:58:03.393043 CPU physical address size: 39 bits
2145 21:58:03.397453 call enable_fixed_mtrr()
2146 21:58:03.400322 CPU physical address size: 39 bits
2147 21:58:03.404335 Checking cr50 for pending updates
2148 21:58:03.408519 CPU physical address size: 39 bits
2149 21:58:03.412100 Reading cr50 TPM mode
2150 21:58:03.422184 BS: BS_PAYLOAD_LOAD entry times (exec / console): 328 / 6 ms
2151 21:58:03.431843 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2152 21:58:03.435503 Checking segment from ROM address 0xffc02b38
2153 21:58:03.438441 Checking segment from ROM address 0xffc02b54
2154 21:58:03.444613 Loading segment from ROM address 0xffc02b38
2155 21:58:03.444733 code (compression=0)
2156 21:58:03.454808 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2157 21:58:03.464212 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2158 21:58:03.464333 it's not compressed!
2159 21:58:03.605545 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2160 21:58:03.612050 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2161 21:58:03.618871 Loading segment from ROM address 0xffc02b54
2162 21:58:03.622951 Entry Point 0x30000000
2163 21:58:03.623372 Loaded segments
2164 21:58:03.629062 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2165 21:58:03.673793 Finalizing chipset.
2166 21:58:03.677045 Finalizing SMM.
2167 21:58:03.677552 APMC done.
2168 21:58:03.683840 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2169 21:58:03.687437 mp_park_aps done after 0 msecs.
2170 21:58:03.690500 Jumping to boot code at 0x30000000(0x76b25000)
2171 21:58:03.700255 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2172 21:58:03.700827
2173 21:58:03.701343
2174 21:58:03.703754
2175 21:58:03.704173
2176 21:58:03.705254 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2177 21:58:03.705841 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2178 21:58:03.706320 Setting prompt string to ['volteer:']
2179 21:58:03.706802 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2180 21:58:03.707603 Starting depthcharge on Voema...
2181 21:58:03.708000
2182 21:58:03.713307 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2183 21:58:03.713762
2184 21:58:03.720663 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2185 21:58:03.721103
2186 21:58:03.726774 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2187 21:58:03.727192
2188 21:58:03.729997 Failed to find eMMC card reader
2189 21:58:03.730409
2190 21:58:03.733294 Wipe memory regions:
2191 21:58:03.733745
2192 21:58:03.736682 [0x00000000001000, 0x000000000a0000)
2193 21:58:03.737092
2194 21:58:03.739724 [0x00000000100000, 0x00000030000000)
2195 21:58:03.740135
2196 21:58:03.777499 [0x00000032662db0, 0x000000769ef000)
2197 21:58:03.778127
2198 21:58:03.828377 [0x00000100000000, 0x00000480400000)
2199 21:58:03.828888
2200 21:58:04.475520 ec_init: CrosEC protocol v3 supported (256, 256)
2201 21:58:04.476034
2202 21:58:04.907160 R8152: Initializing
2203 21:58:04.907694
2204 21:58:04.910357 Version 6 (ocp_data = 5c30)
2205 21:58:04.910899
2206 21:58:04.913762 R8152: Done initializing
2207 21:58:04.914206
2208 21:58:04.916893 Adding net device
2209 21:58:04.917461
2210 21:58:05.221713 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2211 21:58:05.222314
2212 21:58:05.222709
2213 21:58:05.223072
2214 21:58:05.225440 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2216 21:58:05.327171 volteer: tftpboot 192.168.201.1 8926122/tftp-deploy-h61r98ft/kernel/bzImage 8926122/tftp-deploy-h61r98ft/kernel/cmdline 8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
2217 21:58:05.327831 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2218 21:58:05.328256 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2219 21:58:05.333132 tftpboot 192.168.201.1 8926122/tftp-deploy-h61r98ft/kernel/bzImoy-h61r98ft/kernel/cmdline 8926122/tftp-deploy-h61r98ft/ramdisk/ramdisk.cpio.gz
2220 21:58:05.333741
2221 21:58:05.334104 Waiting for link
2222 21:58:05.334433
2223 21:58:05.535795 done.
2224 21:58:05.536375
2225 21:58:05.536762 MAC: 00:24:32:30:7d:ab
2226 21:58:05.537123
2227 21:58:05.538892 Sending DHCP discover... done.
2228 21:58:05.539382
2229 21:58:05.542229 Waiting for reply... done.
2230 21:58:05.542718
2231 21:58:05.545973 Sending DHCP request... done.
2232 21:58:05.546448
2233 21:58:05.552564 Waiting for reply... done.
2234 21:58:05.553099
2235 21:58:05.553617 My ip is 192.168.201.20
2236 21:58:05.553991
2237 21:58:05.558875 The DHCP server ip is 192.168.201.1
2238 21:58:05.559386
2239 21:58:05.562700 TFTP server IP predefined by user: 192.168.201.1
2240 21:58:05.563140
2241 21:58:05.569403 Bootfile predefined by user: 8926122/tftp-deploy-h61r98ft/kernel/bzImage
2242 21:58:05.569845
2243 21:58:05.572243 Sending tftp read request... done.
2244 21:58:05.572744
2245 21:58:05.579273 Waiting for the transfer...
2246 21:58:05.579708
2247 21:58:06.219025 00000000 ################################################################
2248 21:58:06.219164
2249 21:58:06.773407 00080000 ################################################################
2250 21:58:06.773547
2251 21:58:07.352156 00100000 ################################################################
2252 21:58:07.352292
2253 21:58:07.931345 00180000 ################################################################
2254 21:58:07.931484
2255 21:58:08.523467 00200000 ################################################################
2256 21:58:08.523622
2257 21:58:09.158396 00280000 ################################################################
2258 21:58:09.158534
2259 21:58:09.741637 00300000 ################################################################
2260 21:58:09.741777
2261 21:58:10.307775 00380000 ################################################################
2262 21:58:10.307919
2263 21:58:10.858908 00400000 ################################################################
2264 21:58:10.859047
2265 21:58:11.390929 00480000 ################################################################
2266 21:58:11.391069
2267 21:58:11.937442 00500000 ################################################################
2268 21:58:11.937605
2269 21:58:12.459500 00580000 ################################################################
2270 21:58:12.459635
2271 21:58:12.992432 00600000 ################################################################
2272 21:58:12.992569
2273 21:58:13.516886 00680000 ################################################################
2274 21:58:13.517021
2275 21:58:14.043442 00700000 ################################################################
2276 21:58:14.043578
2277 21:58:14.569637 00780000 ################################################################
2278 21:58:14.569783
2279 21:58:15.095381 00800000 ################################################################
2280 21:58:15.095523
2281 21:58:15.650961 00880000 ################################################################
2282 21:58:15.651106
2283 21:58:15.953314 00900000 ################################## done.
2284 21:58:15.953489
2285 21:58:15.956816 The bootfile was 9707520 bytes long.
2286 21:58:15.956904
2287 21:58:15.959720 Sending tftp read request... done.
2288 21:58:15.959812
2289 21:58:15.963032 Waiting for the transfer...
2290 21:58:15.963121
2291 21:58:16.488409 00000000 ################################################################
2292 21:58:16.488548
2293 21:58:16.999385 00080000 ################################################################
2294 21:58:16.999523
2295 21:58:17.511544 00100000 ################################################################
2296 21:58:17.511683
2297 21:58:18.033447 00180000 ################################################################
2298 21:58:18.033589
2299 21:58:18.562154 00200000 ################################################################
2300 21:58:18.562290
2301 21:58:19.096249 00280000 ################################################################
2302 21:58:19.096403
2303 21:58:19.609137 00300000 ################################################################
2304 21:58:19.609294
2305 21:58:20.119303 00380000 ################################################################
2306 21:58:20.119441
2307 21:58:20.637695 00400000 ################################################################
2308 21:58:20.637833
2309 21:58:21.157316 00480000 ################################################################
2310 21:58:21.157474
2311 21:58:21.434224 00500000 ################################### done.
2312 21:58:21.434360
2313 21:58:21.438168 Sending tftp read request... done.
2314 21:58:21.438250
2315 21:58:21.441179 Waiting for the transfer...
2316 21:58:21.441263
2317 21:58:21.444944 00000000 # done.
2318 21:58:21.445031
2319 21:58:21.450708 Command line loaded dynamically from TFTP file: 8926122/tftp-deploy-h61r98ft/kernel/cmdline
2320 21:58:21.450795
2321 21:58:21.470934 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8926122/extract-nfsrootfs-p18rxcsl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2322 21:58:21.471022
2323 21:58:21.478729 Shutting down all USB controllers.
2324 21:58:21.478812
2325 21:58:21.478883 Removing current net device
2326 21:58:21.478988
2327 21:58:21.481521 Finalizing coreboot
2328 21:58:21.481596
2329 21:58:21.488621 Exiting depthcharge with code 4 at timestamp: 26360426
2330 21:58:21.488713
2331 21:58:21.488790
2332 21:58:21.488855 Starting kernel ...
2333 21:58:21.488917
2334 21:58:21.489009
2335 21:58:21.489076
2336 21:58:21.489488 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2337 21:58:21.489600 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2338 21:58:21.489679 Setting prompt string to ['Linux version [0-9]']
2339 21:58:21.489809 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2340 21:58:21.489915 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2342 22:02:47.490541 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2344 22:02:47.491696 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2346 22:02:47.492580 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2349 22:02:47.494153 end: 2 depthcharge-action (duration 00:05:00) [common]
2351 22:02:47.494906 Cleaning after the job
2352 22:02:47.494997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/ramdisk
2353 22:02:47.495463 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/kernel
2354 22:02:47.496151 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/nfsrootfs
2355 22:02:47.528096 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926122/tftp-deploy-h61r98ft/modules
2356 22:02:47.528422 start: 5.1 power-off (timeout 00:00:30) [common]
2357 22:02:47.528586 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2358 22:02:47.547870 >> Command sent successfully.
2359 22:02:47.549849 Returned 0 in 0 seconds
2360 22:02:47.651011 end: 5.1 power-off (duration 00:00:00) [common]
2362 22:02:47.652618 start: 5.2 read-feedback (timeout 00:10:00) [common]
2363 22:02:47.653861 Listened to connection for namespace 'common' for up to 1s
2364 22:02:48.657632 Finalising connection for namespace 'common'
2365 22:02:48.658344 Disconnecting from shell: Finalise
2366 22:02:48.759860 end: 5.2 read-feedback (duration 00:00:01) [common]
2367 22:02:48.760507 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8926122
2368 22:02:48.854743 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8926122
2369 22:02:48.854936 JobError: Your job cannot terminate cleanly.