Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 21:57:11.287798 lava-dispatcher, installed at version: 2022.11
2 21:57:11.287995 start: 0 validate
3 21:57:11.288131 Start time: 2023-01-29 21:57:11.288123+00:00 (UTC)
4 21:57:11.288271 Using caching service: 'http://localhost/cache/?uri=%s'
5 21:57:11.288397 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Finitrd.cpio.gz exists
6 21:57:11.615080 Using caching service: 'http://localhost/cache/?uri=%s'
7 21:57:11.615256 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 21:57:11.915671 Using caching service: 'http://localhost/cache/?uri=%s'
9 21:57:11.915892 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230120.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 21:57:12.210476 Using caching service: 'http://localhost/cache/?uri=%s'
11 21:57:12.211226 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.271-cip90%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 21:57:12.513836 validate duration: 1.23
14 21:57:12.514131 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 21:57:12.514228 start: 1.1 download-retry (timeout 00:10:00) [common]
16 21:57:12.514314 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 21:57:12.514406 Not decompressing ramdisk as can be used compressed.
18 21:57:12.514577 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/initrd.cpio.gz
19 21:57:12.514642 saving as /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/ramdisk/initrd.cpio.gz
20 21:57:12.514702 total size: 5432102 (5MB)
21 21:57:12.517468 progress 0% (0MB)
22 21:57:12.520015 progress 5% (0MB)
23 21:57:12.522172 progress 10% (0MB)
24 21:57:12.524410 progress 15% (0MB)
25 21:57:12.527413 progress 20% (1MB)
26 21:57:12.529024 progress 25% (1MB)
27 21:57:12.531358 progress 30% (1MB)
28 21:57:12.533905 progress 35% (1MB)
29 21:57:12.536495 progress 40% (2MB)
30 21:57:12.538223 progress 45% (2MB)
31 21:57:12.540492 progress 50% (2MB)
32 21:57:12.543303 progress 55% (2MB)
33 21:57:12.545382 progress 60% (3MB)
34 21:57:12.547417 progress 65% (3MB)
35 21:57:12.549946 progress 70% (3MB)
36 21:57:12.552210 progress 75% (3MB)
37 21:57:12.554525 progress 80% (4MB)
38 21:57:12.556599 progress 85% (4MB)
39 21:57:12.559138 progress 90% (4MB)
40 21:57:12.561437 progress 95% (4MB)
41 21:57:12.563583 progress 100% (5MB)
42 21:57:12.563837 5MB downloaded in 0.05s (105.44MB/s)
43 21:57:12.563985 end: 1.1.1 http-download (duration 00:00:00) [common]
45 21:57:12.564223 end: 1.1 download-retry (duration 00:00:00) [common]
46 21:57:12.564310 start: 1.2 download-retry (timeout 00:10:00) [common]
47 21:57:12.564394 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 21:57:12.564494 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 21:57:12.564564 saving as /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/kernel/bzImage
50 21:57:12.564624 total size: 9707520 (9MB)
51 21:57:12.564683 No compression specified
52 21:57:15.072687 progress 0% (0MB)
53 21:57:15.077978 progress 5% (0MB)
54 21:57:15.080599 progress 10% (0MB)
55 21:57:15.084676 progress 15% (1MB)
56 21:57:15.088900 progress 20% (1MB)
57 21:57:15.093503 progress 25% (2MB)
58 21:57:15.096917 progress 30% (2MB)
59 21:57:15.101172 progress 35% (3MB)
60 21:57:15.105405 progress 40% (3MB)
61 21:57:15.110051 progress 45% (4MB)
62 21:57:15.114498 progress 50% (4MB)
63 21:57:15.119471 progress 55% (5MB)
64 21:57:15.124192 progress 60% (5MB)
65 21:57:15.129411 progress 65% (6MB)
66 21:57:15.134557 progress 70% (6MB)
67 21:57:15.139642 progress 75% (6MB)
68 21:57:15.144299 progress 80% (7MB)
69 21:57:15.149870 progress 85% (7MB)
70 21:57:15.155131 progress 90% (8MB)
71 21:57:15.161265 progress 95% (8MB)
72 21:57:15.166367 progress 100% (9MB)
73 21:57:15.166562 9MB downloaded in 2.60s (3.56MB/s)
74 21:57:15.166713 end: 1.2.1 http-download (duration 00:00:03) [common]
76 21:57:15.166954 end: 1.2 download-retry (duration 00:00:03) [common]
77 21:57:15.167045 start: 1.3 download-retry (timeout 00:09:57) [common]
78 21:57:15.167134 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 21:57:15.167240 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230120.0/amd64/full.rootfs.tar.xz
80 21:57:15.167308 saving as /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/nfsrootfs/full.rootfs.tar
81 21:57:15.167370 total size: 207188056 (197MB)
82 21:57:15.167431 Using unxz to decompress xz
83 21:57:15.171820 progress 0% (0MB)
84 21:57:15.753809 progress 5% (9MB)
85 21:57:16.314410 progress 10% (19MB)
86 21:57:16.930183 progress 15% (29MB)
87 21:57:17.315302 progress 20% (39MB)
88 21:57:17.693091 progress 25% (49MB)
89 21:57:18.280034 progress 30% (59MB)
90 21:57:18.825436 progress 35% (69MB)
91 21:57:19.417815 progress 40% (79MB)
92 21:57:19.967517 progress 45% (88MB)
93 21:57:20.542991 progress 50% (98MB)
94 21:57:21.155467 progress 55% (108MB)
95 21:57:21.833799 progress 60% (118MB)
96 21:57:21.984913 progress 65% (128MB)
97 21:57:22.136133 progress 70% (138MB)
98 21:57:22.231922 progress 75% (148MB)
99 21:57:22.303701 progress 80% (158MB)
100 21:57:22.372738 progress 85% (167MB)
101 21:57:22.470551 progress 90% (177MB)
102 21:57:22.738510 progress 95% (187MB)
103 21:57:23.321084 progress 100% (197MB)
104 21:57:23.327517 197MB downloaded in 8.16s (24.21MB/s)
105 21:57:23.327780 end: 1.3.1 http-download (duration 00:00:08) [common]
107 21:57:23.328051 end: 1.3 download-retry (duration 00:00:08) [common]
108 21:57:23.328144 start: 1.4 download-retry (timeout 00:09:49) [common]
109 21:57:23.328234 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 21:57:23.328353 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.271-cip90/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 21:57:23.328421 saving as /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/modules/modules.tar
112 21:57:23.328484 total size: 64732 (0MB)
113 21:57:23.328547 Using unxz to decompress xz
114 21:57:23.634040 progress 50% (0MB)
115 21:57:23.636050 progress 100% (0MB)
116 21:57:23.644411 0MB downloaded in 0.32s (0.20MB/s)
117 21:57:23.644648 end: 1.4.1 http-download (duration 00:00:00) [common]
119 21:57:23.644918 end: 1.4 download-retry (duration 00:00:00) [common]
120 21:57:23.645015 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 21:57:23.645117 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 21:57:25.655410 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8926115/extract-nfsrootfs-ugxtksh8
123 21:57:25.655615 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 21:57:25.655719 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
125 21:57:25.655857 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s
126 21:57:25.655960 makedir: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin
127 21:57:25.656046 makedir: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/tests
128 21:57:25.656127 makedir: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/results
129 21:57:25.656224 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-add-keys
130 21:57:25.656355 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-add-sources
131 21:57:25.656470 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-background-process-start
132 21:57:25.656584 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-background-process-stop
133 21:57:25.656702 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-common-functions
134 21:57:25.656810 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-echo-ipv4
135 21:57:25.656920 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-install-packages
136 21:57:25.657033 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-installed-packages
137 21:57:25.657142 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-os-build
138 21:57:25.657250 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-probe-channel
139 21:57:25.657359 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-probe-ip
140 21:57:25.657467 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-target-ip
141 21:57:25.657574 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-target-mac
142 21:57:25.657681 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-target-storage
143 21:57:25.657937 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-case
144 21:57:25.658050 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-event
145 21:57:25.658160 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-feedback
146 21:57:25.658269 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-raise
147 21:57:25.658377 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-reference
148 21:57:25.658485 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-runner
149 21:57:25.658594 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-set
150 21:57:25.658700 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-test-shell
151 21:57:25.658810 Updating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-add-keys (debian)
152 21:57:25.658927 Updating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-add-sources (debian)
153 21:57:25.659038 Updating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-install-packages (debian)
154 21:57:25.659148 Updating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-installed-packages (debian)
155 21:57:25.659257 Updating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/bin/lava-os-build (debian)
156 21:57:25.659351 Creating /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/environment
157 21:57:25.659436 LAVA metadata
158 21:57:25.659501 - LAVA_JOB_ID=8926115
159 21:57:25.659564 - LAVA_DISPATCHER_IP=192.168.201.1
160 21:57:25.659659 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
161 21:57:25.659722 skipped lava-vland-overlay
162 21:57:25.659796 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 21:57:25.659876 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
164 21:57:25.659937 skipped lava-multinode-overlay
165 21:57:25.660011 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 21:57:25.660090 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
167 21:57:25.660160 Loading test definitions
168 21:57:25.660247 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
169 21:57:25.660316 Using /lava-8926115 at stage 0
170 21:57:25.660543 uuid=8926115_1.5.2.3.1 testdef=None
171 21:57:25.660630 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 21:57:25.660717 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
173 21:57:25.661121 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 21:57:25.661354 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
176 21:57:25.661836 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 21:57:25.662070 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
179 21:57:25.662521 runner path: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/0/tests/0_timesync-off test_uuid 8926115_1.5.2.3.1
180 21:57:25.662663 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 21:57:25.662892 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
183 21:57:25.662965 Using /lava-8926115 at stage 0
184 21:57:25.663060 Fetching tests from https://github.com/kernelci/test-definitions.git
185 21:57:25.663139 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/0/tests/1_kselftest-alsa'
186 21:57:28.369301 Running '/usr/bin/git checkout kernelci.org
187 21:57:28.504606 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 21:57:28.505293 uuid=8926115_1.5.2.3.5 testdef=None
189 21:57:28.505465 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
191 21:57:28.505762 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
192 21:57:28.506476 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 21:57:28.506720 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
195 21:57:28.507620 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 21:57:28.507868 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
198 21:57:28.508791 runner path: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/0/tests/1_kselftest-alsa test_uuid 8926115_1.5.2.3.5
199 21:57:28.508881 BOARD='asus-C436FA-Flip-hatch'
200 21:57:28.508953 BRANCH='cip'
201 21:57:28.509018 SKIPFILE='skipfile-lkft.yaml'
202 21:57:28.509081 SKIP_INSTALL='True'
203 21:57:28.509140 TESTPROG_URL='None'
204 21:57:28.509198 TST_CASENAME=''
205 21:57:28.509256 TST_CMDFILES='alsa'
206 21:57:28.509390 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
208 21:57:28.509602 Creating lava-test-runner.conf files
209 21:57:28.509669 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8926115/lava-overlay-5w05pd9s/lava-8926115/0 for stage 0
210 21:57:28.509802 - 0_timesync-off
211 21:57:28.509872 - 1_kselftest-alsa
212 21:57:28.509965 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
213 21:57:28.510053 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
214 21:57:35.897656 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
215 21:57:35.897878 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
216 21:57:35.897976 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 21:57:35.898076 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
218 21:57:35.898168 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
219 21:57:36.002237 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 21:57:36.002607 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
221 21:57:36.002746 extracting modules file /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926115/extract-nfsrootfs-ugxtksh8
222 21:57:36.007296 extracting modules file /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8926115/extract-overlay-ramdisk-fa3ombh0/ramdisk
223 21:57:36.011613 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 21:57:36.011732 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
225 21:57:36.011821 [common] Applying overlay to NFS
226 21:57:36.011894 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8926115/compress-overlay-el6tydxe/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8926115/extract-nfsrootfs-ugxtksh8
227 21:57:36.477346 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 21:57:36.477513 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
229 21:57:36.477615 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 21:57:36.477714 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
231 21:57:36.477799 Building ramdisk /var/lib/lava/dispatcher/tmp/8926115/extract-overlay-ramdisk-fa3ombh0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8926115/extract-overlay-ramdisk-fa3ombh0/ramdisk
232 21:57:36.511868 >> 24777 blocks
233 21:57:36.997861 rename /var/lib/lava/dispatcher/tmp/8926115/extract-overlay-ramdisk-fa3ombh0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
234 21:57:36.998295 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 21:57:36.998423 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
236 21:57:36.998526 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
237 21:57:36.998621 No mkimage arch provided, not using FIT.
238 21:57:36.998710 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 21:57:36.998798 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 21:57:36.998900 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
241 21:57:36.998995 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
242 21:57:36.999074 No LXC device requested
243 21:57:36.999158 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 21:57:36.999250 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
245 21:57:36.999335 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 21:57:36.999404 Checking files for TFTP limit of 4294967296 bytes.
247 21:57:36.999792 end: 1 tftp-deploy (duration 00:00:24) [common]
248 21:57:36.999896 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 21:57:37.000033 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 21:57:37.000200 substitutions:
251 21:57:37.000270 - {DTB}: None
252 21:57:37.000336 - {INITRD}: 8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
253 21:57:37.000397 - {KERNEL}: 8926115/tftp-deploy-lwgg61w0/kernel/bzImage
254 21:57:37.000457 - {LAVA_MAC}: None
255 21:57:37.000516 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8926115/extract-nfsrootfs-ugxtksh8
256 21:57:37.000574 - {NFS_SERVER_IP}: 192.168.201.1
257 21:57:37.000631 - {PRESEED_CONFIG}: None
258 21:57:37.000689 - {PRESEED_LOCAL}: None
259 21:57:37.000746 - {RAMDISK}: 8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
260 21:57:37.000803 - {ROOT_PART}: None
261 21:57:37.000860 - {ROOT}: None
262 21:57:37.000916 - {SERVER_IP}: 192.168.201.1
263 21:57:37.000973 - {TEE}: None
264 21:57:37.001029 Parsed boot commands:
265 21:57:37.001084 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 21:57:37.001244 Parsed boot commands: tftpboot 192.168.201.1 8926115/tftp-deploy-lwgg61w0/kernel/bzImage 8926115/tftp-deploy-lwgg61w0/kernel/cmdline 8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
267 21:57:37.001338 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 21:57:37.001427 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 21:57:37.001520 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 21:57:37.001613 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 21:57:37.001687 Not connected, no need to disconnect.
272 21:57:37.001776 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 21:57:37.001860 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 21:57:37.001928 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
275 21:57:37.004891 Setting prompt string to ['lava-test: # ']
276 21:57:37.005250 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 21:57:37.005365 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 21:57:37.005464 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 21:57:37.005563 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 21:57:37.005778 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
281 21:57:37.025617 >> Command sent successfully.
282 21:57:37.027748 Returned 0 in 0 seconds
283 21:57:37.128524 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
285 21:57:37.128860 end: 2.2.2 reset-device (duration 00:00:00) [common]
286 21:57:37.128961 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
287 21:57:37.129053 Setting prompt string to 'Starting depthcharge on Helios...'
288 21:57:37.129125 Changing prompt to 'Starting depthcharge on Helios...'
289 21:57:37.129195 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
290 21:57:37.129476 [Enter `^Ec?' for help]
291 21:57:44.478961
292 21:57:44.479123
293 21:57:44.488935 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 21:57:44.492387 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 21:57:44.498580 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 21:57:44.502252 CPU: AES supported, TXT NOT supported, VT supported
297 21:57:44.508903 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 21:57:44.511994 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 21:57:44.518811 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 21:57:44.521915 VBOOT: Loading verstage.
301 21:57:44.525435 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 21:57:44.531751 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 21:57:44.538559 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 21:57:44.538646 CBFS @ c08000 size 3f8000
305 21:57:44.544965 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 21:57:44.548493 CBFS: Locating 'fallback/verstage'
307 21:57:44.551531 CBFS: Found @ offset 10fb80 size 1072c
308 21:57:44.555808
309 21:57:44.555894
310 21:57:44.565548 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 21:57:44.579790 Probing TPM: . done!
312 21:57:44.583586 TPM ready after 0 ms
313 21:57:44.586533 Connected to device vid:did:rid of 1ae0:0028:00
314 21:57:44.596971 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 21:57:44.600001 Initialized TPM device CR50 revision 0
316 21:57:44.642932 tlcl_send_startup: Startup return code is 0
317 21:57:44.643023 TPM: setup succeeded
318 21:57:44.655268 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 21:57:44.659202 Chrome EC: UHEPI supported
320 21:57:44.662374 Phase 1
321 21:57:44.665811 FMAP: area GBB found @ c05000 (12288 bytes)
322 21:57:44.672333 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
323 21:57:44.675415 Phase 2
324 21:57:44.675500 Phase 3
325 21:57:44.678858 FMAP: area GBB found @ c05000 (12288 bytes)
326 21:57:44.685379 VB2:vb2_report_dev_firmware() This is developer signed firmware
327 21:57:44.691835 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 21:57:44.694817 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
329 21:57:44.701392 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 21:57:44.718033 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 21:57:44.721100 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
332 21:57:44.727790 VB2:vb2_verify_fw_preamble() Verifying preamble.
333 21:57:44.731958 Phase 4
334 21:57:44.735313 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
335 21:57:44.741946 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
336 21:57:44.921207 VB2:vb2_rsa_verify_digest() Digest check failed!
337 21:57:44.928052 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
338 21:57:44.928144 Saving nvdata
339 21:57:44.931113 Reboot requested (10020007)
340 21:57:44.934278 board_reset() called!
341 21:57:44.934364 full_reset() called!
342 21:57:49.445028
343 21:57:49.445187
344 21:57:49.455200 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
345 21:57:49.458263 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
346 21:57:49.464842 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
347 21:57:49.468213 CPU: AES supported, TXT NOT supported, VT supported
348 21:57:49.474811 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
349 21:57:49.477859 PCH: device id 0284 (rev 00) is Cometlake-U Premium
350 21:57:49.484434 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
351 21:57:49.487886 VBOOT: Loading verstage.
352 21:57:49.491423 FMAP: Found "FLASH" version 1.1 at 0xc04000.
353 21:57:49.497880 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
354 21:57:49.504530 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 21:57:49.504603 CBFS @ c08000 size 3f8000
356 21:57:49.510781 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 21:57:49.514370 CBFS: Locating 'fallback/verstage'
358 21:57:49.517533 CBFS: Found @ offset 10fb80 size 1072c
359 21:57:49.521763
360 21:57:49.521842
361 21:57:49.531517 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
362 21:57:49.546122 Probing TPM: . done!
363 21:57:49.549796 TPM ready after 0 ms
364 21:57:49.552847 Connected to device vid:did:rid of 1ae0:0028:00
365 21:57:49.562787 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
366 21:57:49.566373 Initialized TPM device CR50 revision 0
367 21:57:49.608845 tlcl_send_startup: Startup return code is 0
368 21:57:49.608943 TPM: setup succeeded
369 21:57:49.621673 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
370 21:57:49.625314 Chrome EC: UHEPI supported
371 21:57:49.628359 Phase 1
372 21:57:49.632016 FMAP: area GBB found @ c05000 (12288 bytes)
373 21:57:49.638242 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
374 21:57:49.644943 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
375 21:57:49.648061 Recovery requested (1009000e)
376 21:57:49.654371 Saving nvdata
377 21:57:49.660183 tlcl_extend: response is 0
378 21:57:49.668886 tlcl_extend: response is 0
379 21:57:49.675844 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 21:57:49.679345 CBFS @ c08000 size 3f8000
381 21:57:49.685882 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 21:57:49.689396 CBFS: Locating 'fallback/romstage'
383 21:57:49.692529 CBFS: Found @ offset 80 size 145fc
384 21:57:49.695568 Accumulated console time in verstage 98 ms
385 21:57:49.695640
386 21:57:49.695703
387 21:57:49.708837 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
388 21:57:49.715431 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
389 21:57:49.718653 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
390 21:57:49.722261 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
391 21:57:49.728557 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
392 21:57:49.731778 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
393 21:57:49.735430 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
394 21:57:49.738573 TCO_STS: 0000 0000
395 21:57:49.741732 GEN_PMCON: e0015238 00000200
396 21:57:49.745361 GBLRST_CAUSE: 00000000 00000000
397 21:57:49.745438 prev_sleep_state 5
398 21:57:49.749053 Boot Count incremented to 45106
399 21:57:49.755791 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 21:57:49.758827 CBFS @ c08000 size 3f8000
401 21:57:49.765311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
402 21:57:49.765385 CBFS: Locating 'fspm.bin'
403 21:57:49.772132 CBFS: Found @ offset 5ffc0 size 71000
404 21:57:49.775595 Chrome EC: UHEPI supported
405 21:57:49.781710 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
406 21:57:49.785854 Probing TPM: done!
407 21:57:49.792352 Connected to device vid:did:rid of 1ae0:0028:00
408 21:57:49.802178 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
409 21:57:49.808227 Initialized TPM device CR50 revision 0
410 21:57:49.817268 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
411 21:57:49.824063 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
412 21:57:49.827226 MRC cache found, size 1948
413 21:57:49.830319 bootmode is set to: 2
414 21:57:49.833950 PRMRR disabled by config.
415 21:57:49.834028 SPD INDEX = 1
416 21:57:49.837008
417 21:57:49.840302 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
418 21:57:49.843445 CBFS @ c08000 size 3f8000
419 21:57:49.850202 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
420 21:57:49.850286 CBFS: Locating 'spd.bin'
421 21:57:49.853279 CBFS: Found @ offset 5fb80 size 400
422 21:57:49.856914 SPD: module type is LPDDR3
423 21:57:49.859976 SPD: module part is
424 21:57:49.866543 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
425 21:57:49.869791 SPD: device width 4 bits, bus width 8 bits
426 21:57:49.873298 SPD: module size is 4096 MB (per channel)
427 21:57:49.876367 memory slot: 0 configuration done.
428 21:57:49.879886 memory slot: 2 configuration done.
429 21:57:49.882856
430 21:57:49.931260 CBMEM:
431 21:57:49.934319 IMD: root @ 99fff000 254 entries.
432 21:57:49.937441 IMD: root @ 99ffec00 62 entries.
433 21:57:49.940994 External stage cache:
434 21:57:49.944198 IMD: root @ 9abff000 254 entries.
435 21:57:49.947353 IMD: root @ 9abfec00 62 entries.
436 21:57:49.954100 Chrome EC: clear events_b mask to 0x0000000020004000
437 21:57:49.966747 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
438 21:57:49.979765 tlcl_write: response is 0
439 21:57:49.988919 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
440 21:57:49.995414 MRC: TPM MRC hash updated successfully.
441 21:57:49.995493 2 DIMMs found
442 21:57:49.998980 SMM Memory Map
443 21:57:50.002032 SMRAM : 0x9a000000 0x1000000
444 21:57:50.005637 Subregion 0: 0x9a000000 0xa00000
445 21:57:50.008655 Subregion 1: 0x9aa00000 0x200000
446 21:57:50.012212 Subregion 2: 0x9ac00000 0x400000
447 21:57:50.015295 top_of_ram = 0x9a000000
448 21:57:50.018862 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
449 21:57:50.025087 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
450 21:57:50.028371 MTRR Range: Start=ff000000 End=0 (Size 1000000)
451 21:57:50.035022 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
452 21:57:50.038666 CBFS @ c08000 size 3f8000
453 21:57:50.041748 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
454 21:57:50.044910 CBFS: Locating 'fallback/postcar'
455 21:57:50.048062
456 21:57:50.051754 CBFS: Found @ offset 107000 size 4b44
457 21:57:50.057978 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
458 21:57:50.068191 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
459 21:57:50.071315 Processing 180 relocs. Offset value of 0x97c0c000
460 21:57:50.079769 Accumulated console time in romstage 286 ms
461 21:57:50.079855
462 21:57:50.079924
463 21:57:50.089518 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
464 21:57:50.096150 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 21:57:50.099680 CBFS @ c08000 size 3f8000
466 21:57:50.106355 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 21:57:50.109412 CBFS: Locating 'fallback/ramstage'
468 21:57:50.112822 CBFS: Found @ offset 43380 size 1b9e8
469 21:57:50.119527 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
470 21:57:50.151433 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
471 21:57:50.155226 Processing 3976 relocs. Offset value of 0x98db0000
472 21:57:50.161887 Accumulated console time in postcar 52 ms
473 21:57:50.161972
474 21:57:50.162037
475 21:57:50.171358 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
476 21:57:50.178079 FMAP: area RO_VPD found @ c00000 (16384 bytes)
477 21:57:50.181186 WARNING: RO_VPD is uninitialized or empty.
478 21:57:50.184697 FMAP: area RW_VPD found @ af8000 (8192 bytes)
479 21:57:50.191288 FMAP: area RW_VPD found @ af8000 (8192 bytes)
480 21:57:50.191372 Normal boot.
481 21:57:50.197876 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
482 21:57:50.200852 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
483 21:57:50.204452 CBFS @ c08000 size 3f8000
484 21:57:50.210889 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
485 21:57:50.214312 CBFS: Locating 'cpu_microcode_blob.bin'
486 21:57:50.217415 CBFS: Found @ offset 14700 size 2ec00
487 21:57:50.220425 microcode: sig=0x806ec pf=0x4 revision=0xc9
488 21:57:50.223912
489 21:57:50.223996 Skip microcode update
490 21:57:50.230701 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
491 21:57:50.230786 CBFS @ c08000 size 3f8000
492 21:57:50.233797
493 21:57:50.237390 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
494 21:57:50.240375 CBFS: Locating 'fsps.bin'
495 21:57:50.243953 CBFS: Found @ offset d1fc0 size 35000
496 21:57:50.269952 Detected 4 core, 8 thread CPU.
497 21:57:50.273484 Setting up SMI for CPU
498 21:57:50.276657 IED base = 0x9ac00000
499 21:57:50.276741 IED size = 0x00400000
500 21:57:50.279745 Will perform SMM setup.
501 21:57:50.286306 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
502 21:57:50.292986 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
503 21:57:50.296406 Processing 16 relocs. Offset value of 0x00030000
504 21:57:50.299412
505 21:57:50.299532 Attempting to start 7 APs
506 21:57:50.306081 Waiting for 10ms after sending INIT.
507 21:57:50.319370 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
508 21:57:50.319457 done.
509 21:57:50.323029 AP: slot 5 apic_id 4.
510 21:57:50.326095 AP: slot 4 apic_id 5.
511 21:57:50.326180 AP: slot 7 apic_id 7.
512 21:57:50.329681 AP: slot 6 apic_id 6.
513 21:57:50.332862 Waiting for 2nd SIPI to complete...done.
514 21:57:50.335920 AP: slot 1 apic_id 3.
515 21:57:50.339557 AP: slot 3 apic_id 2.
516 21:57:50.346046 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 21:57:50.352351 Processing 13 relocs. Offset value of 0x00038000
518 21:57:50.359088 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 21:57:50.362295 Installing SMM handler to 0x9a000000
520 21:57:50.368920 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 21:57:50.375705 Processing 658 relocs. Offset value of 0x9a010000
522 21:57:50.382051 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 21:57:50.385587 Processing 13 relocs. Offset value of 0x9a008000
524 21:57:50.392129 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 21:57:50.398767 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 21:57:50.405288 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 21:57:50.408742 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 21:57:50.415299 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 21:57:50.421863 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 21:57:50.428378 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 21:57:50.435073 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 21:57:50.438207 Clearing SMI status registers
533 21:57:50.438292 SMI_STS: PM1
534 21:57:50.441794 PM1_STS: PWRBTN
535 21:57:50.441878 TCO_STS: SECOND_TO
536 21:57:50.444762 New SMBASE 0x9a000000
537 21:57:50.447879 In relocation handler: CPU 0
538 21:57:50.451578 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 21:57:50.457881 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 21:57:50.457966 Relocation complete.
541 21:57:50.460943 New SMBASE 0x99fff800
542 21:57:50.464620 In relocation handler: CPU 2
543 21:57:50.467732 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 21:57:50.474351 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 21:57:50.474446 Relocation complete.
546 21:57:50.477800 New SMBASE 0x99fffc00
547 21:57:50.480804 In relocation handler: CPU 1
548 21:57:50.484406 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
549 21:57:50.490749 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 21:57:50.490829 Relocation complete.
551 21:57:50.493839 New SMBASE 0x99fff400
552 21:57:50.497411 In relocation handler: CPU 3
553 21:57:50.500440 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
554 21:57:50.507345 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 21:57:50.507421 Relocation complete.
556 21:57:50.510379 New SMBASE 0x99ffe400
557 21:57:50.513845 In relocation handler: CPU 7
558 21:57:50.516870 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
559 21:57:50.523338 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 21:57:50.523412 Relocation complete.
561 21:57:50.526824 New SMBASE 0x99ffe800
562 21:57:50.529935 In relocation handler: CPU 6
563 21:57:50.533515 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
564 21:57:50.539782 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 21:57:50.539870 Relocation complete.
566 21:57:50.543379 New SMBASE 0x99ffec00
567 21:57:50.546391 In relocation handler: CPU 5
568 21:57:50.549630 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
569 21:57:50.556637 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 21:57:50.556721 Relocation complete.
571 21:57:50.559793 New SMBASE 0x99fff000
572 21:57:50.562904 In relocation handler: CPU 4
573 21:57:50.566547 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
574 21:57:50.572721 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 21:57:50.572806 Relocation complete.
576 21:57:50.576308 Initializing CPU #0
577 21:57:50.579246 CPU: vendor Intel device 806ec
578 21:57:50.582958 CPU: family 06, model 8e, stepping 0c
579 21:57:50.586137 Clearing out pending MCEs
580 21:57:50.589178 Setting up local APIC...
581 21:57:50.589262 apic_id: 0x00 done.
582 21:57:50.592612 Turbo is available but hidden
583 21:57:50.595778 Turbo is available and visible
584 21:57:50.598906 VMX status: enabled
585 21:57:50.602412 IA32_FEATURE_CONTROL status: locked
586 21:57:50.602496 Skip microcode update
587 21:57:50.605871
588 21:57:50.605956 CPU #0 initialized
589 21:57:50.609000 Initializing CPU #2
590 21:57:50.609084 Initializing CPU #1
591 21:57:50.612373 Initializing CPU #3
592 21:57:50.615426 CPU: vendor Intel device 806ec
593 21:57:50.618956 CPU: family 06, model 8e, stepping 0c
594 21:57:50.622030 CPU: vendor Intel device 806ec
595 21:57:50.625442 CPU: family 06, model 8e, stepping 0c
596 21:57:50.628513 Clearing out pending MCEs
597 21:57:50.632008 Clearing out pending MCEs
598 21:57:50.635159 Setting up local APIC...
599 21:57:50.638345 CPU: vendor Intel device 806ec
600 21:57:50.641878 CPU: family 06, model 8e, stepping 0c
601 21:57:50.645004 Clearing out pending MCEs
602 21:57:50.645090 Initializing CPU #4
603 21:57:50.648222 Initializing CPU #5
604 21:57:50.651395 CPU: vendor Intel device 806ec
605 21:57:50.655016 CPU: family 06, model 8e, stepping 0c
606 21:57:50.658281 CPU: vendor Intel device 806ec
607 21:57:50.661426 CPU: family 06, model 8e, stepping 0c
608 21:57:50.664557 Clearing out pending MCEs
609 21:57:50.668248 Clearing out pending MCEs
610 21:57:50.668349 Setting up local APIC...
611 21:57:50.671459 Setting up local APIC...
612 21:57:50.674632 Initializing CPU #6
613 21:57:50.674716 Initializing CPU #7
614 21:57:50.677814 CPU: vendor Intel device 806ec
615 21:57:50.681292 CPU: family 06, model 8e, stepping 0c
616 21:57:50.684349 CPU: vendor Intel device 806ec
617 21:57:50.690957 CPU: family 06, model 8e, stepping 0c
618 21:57:50.691042 Clearing out pending MCEs
619 21:57:50.694306 Clearing out pending MCEs
620 21:57:50.697891 Setting up local APIC...
621 21:57:50.700936 apic_id: 0x03 done.
622 21:57:50.701050 Setting up local APIC...
623 21:57:50.704444 apic_id: 0x05 done.
624 21:57:50.707420 Setting up local APIC...
625 21:57:50.707504 apic_id: 0x02 done.
626 21:57:50.710774 VMX status: enabled
627 21:57:50.714336 VMX status: enabled
628 21:57:50.717253 IA32_FEATURE_CONTROL status: locked
629 21:57:50.720812 IA32_FEATURE_CONTROL status: locked
630 21:57:50.723742 Skip microcode update
631 21:57:50.723821 Skip microcode update
632 21:57:50.727270 CPU #1 initialized
633 21:57:50.727347 CPU #3 initialized
634 21:57:50.730335 apic_id: 0x04 done.
635 21:57:50.733848 VMX status: enabled
636 21:57:50.733926 VMX status: enabled
637 21:57:50.737441 IA32_FEATURE_CONTROL status: locked
638 21:57:50.740582 IA32_FEATURE_CONTROL status: locked
639 21:57:50.743837
640 21:57:50.743919 Skip microcode update
641 21:57:50.746904 Skip microcode update
642 21:57:50.746984 CPU #4 initialized
643 21:57:50.750374 CPU #5 initialized
644 21:57:50.753434 apic_id: 0x01 done.
645 21:57:50.753514 apic_id: 0x06 done.
646 21:57:50.757208 Setting up local APIC...
647 21:57:50.760279 VMX status: enabled
648 21:57:50.760358 VMX status: enabled
649 21:57:50.763371 apic_id: 0x07 done.
650 21:57:50.766953 IA32_FEATURE_CONTROL status: locked
651 21:57:50.770036 VMX status: enabled
652 21:57:50.770117 Skip microcode update
653 21:57:50.773631 IA32_FEATURE_CONTROL status: locked
654 21:57:50.776768 CPU #6 initialized
655 21:57:50.779902 Skip microcode update
656 21:57:50.783334 IA32_FEATURE_CONTROL status: locked
657 21:57:50.783412 CPU #7 initialized
658 21:57:50.786449 Skip microcode update
659 21:57:50.790055 CPU #2 initialized
660 21:57:50.793075 bsp_do_flight_plan done after 457 msecs.
661 21:57:50.796499 CPU: frequency set to 4200 MHz
662 21:57:50.796574 Enabling SMIs.
663 21:57:50.799593 Locking SMM.
664 21:57:50.814151 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
665 21:57:50.817305 CBFS @ c08000 size 3f8000
666 21:57:50.824300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
667 21:57:50.824379 CBFS: Locating 'vbt.bin'
668 21:57:50.827309 CBFS: Found @ offset 5f5c0 size 499
669 21:57:50.834361 Found a VBT of 4608 bytes after decompression
670 21:57:51.018969 Display FSP Version Info HOB
671 21:57:51.022096 Reference Code - CPU = 9.0.1e.30
672 21:57:51.025202 uCode Version = 0.0.0.ca
673 21:57:51.028648 TXT ACM version = ff.ff.ff.ffff
674 21:57:51.032103 Display FSP Version Info HOB
675 21:57:51.035211 Reference Code - ME = 9.0.1e.30
676 21:57:51.038225 MEBx version = 0.0.0.0
677 21:57:51.041809 ME Firmware Version = Consumer SKU
678 21:57:51.044932 Display FSP Version Info HOB
679 21:57:51.048173 Reference Code - CML PCH = 9.0.1e.30
680 21:57:51.051223 PCH-CRID Status = Disabled
681 21:57:51.054798 PCH-CRID Original Value = ff.ff.ff.ffff
682 21:57:51.057927 PCH-CRID New Value = ff.ff.ff.ffff
683 21:57:51.061081 OPROM - RST - RAID = ff.ff.ff.ffff
684 21:57:51.064268 ChipsetInit Base Version = ff.ff.ff.ffff
685 21:57:51.067851 ChipsetInit Oem Version = ff.ff.ff.ffff
686 21:57:51.070986 Display FSP Version Info HOB
687 21:57:51.077840 Reference Code - SA - System Agent = 9.0.1e.30
688 21:57:51.080915 Reference Code - MRC = 0.7.1.6c
689 21:57:51.084144 SA - PCIe Version = 9.0.1e.30
690 21:57:51.087260 SA-CRID Status = Disabled
691 21:57:51.090621 SA-CRID Original Value = 0.0.0.c
692 21:57:51.090699 SA-CRID New Value = 0.0.0.c
693 21:57:51.093678 OPROM - VBIOS = ff.ff.ff.ffff
694 21:57:51.097310 RTC Init
695 21:57:51.100762 Set power on after power failure.
696 21:57:51.100836 Disabling Deep S3
697 21:57:51.103754 Disabling Deep S3
698 21:57:51.107333 Disabling Deep S4
699 21:57:51.107409 Disabling Deep S4
700 21:57:51.110355 Disabling Deep S5
701 21:57:51.110450 Disabling Deep S5
702 21:57:51.116970 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
703 21:57:51.120575 Enumerating buses...
704 21:57:51.123791 Show all devs... Before device enumeration.
705 21:57:51.127360 Root Device: enabled 1
706 21:57:51.130367 CPU_CLUSTER: 0: enabled 1
707 21:57:51.130459 DOMAIN: 0000: enabled 1
708 21:57:51.134010 APIC: 00: enabled 1
709 21:57:51.136885 PCI: 00:00.0: enabled 1
710 21:57:51.136971 PCI: 00:02.0: enabled 1
711 21:57:51.140417 PCI: 00:04.0: enabled 0
712 21:57:51.143409 PCI: 00:05.0: enabled 0
713 21:57:51.146657 PCI: 00:12.0: enabled 1
714 21:57:51.146748 PCI: 00:12.5: enabled 0
715 21:57:51.150340 PCI: 00:12.6: enabled 0
716 21:57:51.153496 PCI: 00:14.0: enabled 1
717 21:57:51.156528 PCI: 00:14.1: enabled 0
718 21:57:51.156666 PCI: 00:14.3: enabled 1
719 21:57:51.159562 PCI: 00:14.5: enabled 0
720 21:57:51.162762 PCI: 00:15.0: enabled 1
721 21:57:51.166427 PCI: 00:15.1: enabled 1
722 21:57:51.166549 PCI: 00:15.2: enabled 0
723 21:57:51.169565 PCI: 00:15.3: enabled 0
724 21:57:51.172787 PCI: 00:16.0: enabled 1
725 21:57:51.175907 PCI: 00:16.1: enabled 0
726 21:57:51.175995 PCI: 00:16.2: enabled 0
727 21:57:51.179011 PCI: 00:16.3: enabled 0
728 21:57:51.182196 PCI: 00:16.4: enabled 0
729 21:57:51.185893 PCI: 00:16.5: enabled 0
730 21:57:51.185980 PCI: 00:17.0: enabled 1
731 21:57:51.189029 PCI: 00:19.0: enabled 1
732 21:57:51.192449 PCI: 00:19.1: enabled 0
733 21:57:51.195600 PCI: 00:19.2: enabled 0
734 21:57:51.195689 PCI: 00:1a.0: enabled 0
735 21:57:51.198694 PCI: 00:1c.0: enabled 0
736 21:57:51.202270 PCI: 00:1c.1: enabled 0
737 21:57:51.205286 PCI: 00:1c.2: enabled 0
738 21:57:51.205376 PCI: 00:1c.3: enabled 0
739 21:57:51.208473 PCI: 00:1c.4: enabled 0
740 21:57:51.212003 PCI: 00:1c.5: enabled 0
741 21:57:51.212093 PCI: 00:1c.6: enabled 0
742 21:57:51.215068
743 21:57:51.215162 PCI: 00:1c.7: enabled 0
744 21:57:51.218705 PCI: 00:1d.0: enabled 1
745 21:57:51.221625 PCI: 00:1d.1: enabled 0
746 21:57:51.221736 PCI: 00:1d.2: enabled 0
747 21:57:51.225283 PCI: 00:1d.3: enabled 0
748 21:57:51.228248 PCI: 00:1d.4: enabled 0
749 21:57:51.231807 PCI: 00:1d.5: enabled 1
750 21:57:51.231896 PCI: 00:1e.0: enabled 1
751 21:57:51.235379 PCI: 00:1e.1: enabled 0
752 21:57:51.238245 PCI: 00:1e.2: enabled 1
753 21:57:51.241695 PCI: 00:1e.3: enabled 1
754 21:57:51.241820 PCI: 00:1f.0: enabled 1
755 21:57:51.244855 PCI: 00:1f.1: enabled 1
756 21:57:51.248005 PCI: 00:1f.2: enabled 1
757 21:57:51.251111 PCI: 00:1f.3: enabled 1
758 21:57:51.251202 PCI: 00:1f.4: enabled 1
759 21:57:51.254759 PCI: 00:1f.5: enabled 1
760 21:57:51.257986 PCI: 00:1f.6: enabled 0
761 21:57:51.261002 USB0 port 0: enabled 1
762 21:57:51.261087 I2C: 00:15: enabled 1
763 21:57:51.264187 I2C: 00:5d: enabled 1
764 21:57:51.267809 GENERIC: 0.0: enabled 1
765 21:57:51.267930 I2C: 00:1a: enabled 1
766 21:57:51.271003 I2C: 00:38: enabled 1
767 21:57:51.274216 I2C: 00:39: enabled 1
768 21:57:51.274369 I2C: 00:3a: enabled 1
769 21:57:51.277356 I2C: 00:3b: enabled 1
770 21:57:51.280437 PCI: 00:00.0: enabled 1
771 21:57:51.280537 SPI: 00: enabled 1
772 21:57:51.284111 SPI: 01: enabled 1
773 21:57:51.287273 PNP: 0c09.0: enabled 1
774 21:57:51.287402 USB2 port 0: enabled 1
775 21:57:51.290444 USB2 port 1: enabled 1
776 21:57:51.293934 USB2 port 2: enabled 0
777 21:57:51.296850 USB2 port 3: enabled 0
778 21:57:51.296941 USB2 port 5: enabled 0
779 21:57:51.299986 USB2 port 6: enabled 1
780 21:57:51.303493 USB2 port 9: enabled 1
781 21:57:51.303596 USB3 port 0: enabled 1
782 21:57:51.306528
783 21:57:51.306616 USB3 port 1: enabled 1
784 21:57:51.310237 USB3 port 2: enabled 1
785 21:57:51.313342 USB3 port 3: enabled 1
786 21:57:51.313439 USB3 port 4: enabled 0
787 21:57:51.316424 APIC: 03: enabled 1
788 21:57:51.319857 APIC: 01: enabled 1
789 21:57:51.319952 APIC: 02: enabled 1
790 21:57:51.322907 APIC: 05: enabled 1
791 21:57:51.322995 APIC: 04: enabled 1
792 21:57:51.326464
793 21:57:51.326553 APIC: 06: enabled 1
794 21:57:51.329512 APIC: 07: enabled 1
795 21:57:51.329601 Compare with tree...
796 21:57:51.332670 Root Device: enabled 1
797 21:57:51.336010 CPU_CLUSTER: 0: enabled 1
798 21:57:51.339157 APIC: 00: enabled 1
799 21:57:51.339247 APIC: 03: enabled 1
800 21:57:51.342742 APIC: 01: enabled 1
801 21:57:51.345753 APIC: 02: enabled 1
802 21:57:51.345839 APIC: 05: enabled 1
803 21:57:51.348862 APIC: 04: enabled 1
804 21:57:51.352532 APIC: 06: enabled 1
805 21:57:51.352612 APIC: 07: enabled 1
806 21:57:51.355639 DOMAIN: 0000: enabled 1
807 21:57:51.358814 PCI: 00:00.0: enabled 1
808 21:57:51.361916 PCI: 00:02.0: enabled 1
809 21:57:51.365528 PCI: 00:04.0: enabled 0
810 21:57:51.365635 PCI: 00:05.0: enabled 0
811 21:57:51.368765 PCI: 00:12.0: enabled 1
812 21:57:51.371842 PCI: 00:12.5: enabled 0
813 21:57:51.375523 PCI: 00:12.6: enabled 0
814 21:57:51.378690 PCI: 00:14.0: enabled 1
815 21:57:51.378787 USB0 port 0: enabled 1
816 21:57:51.381739 USB2 port 0: enabled 1
817 21:57:51.384836 USB2 port 1: enabled 1
818 21:57:51.388438 USB2 port 2: enabled 0
819 21:57:51.391609 USB2 port 3: enabled 0
820 21:57:51.394718 USB2 port 5: enabled 0
821 21:57:51.394803 USB2 port 6: enabled 1
822 21:57:51.398260 USB2 port 9: enabled 1
823 21:57:51.401377 USB3 port 0: enabled 1
824 21:57:51.404422 USB3 port 1: enabled 1
825 21:57:51.407725 USB3 port 2: enabled 1
826 21:57:51.410871 USB3 port 3: enabled 1
827 21:57:51.410965 USB3 port 4: enabled 0
828 21:57:51.414334 PCI: 00:14.1: enabled 0
829 21:57:51.417414 PCI: 00:14.3: enabled 1
830 21:57:51.420944 PCI: 00:14.5: enabled 0
831 21:57:51.424151 PCI: 00:15.0: enabled 1
832 21:57:51.424241 I2C: 00:15: enabled 1
833 21:57:51.427529 PCI: 00:15.1: enabled 1
834 21:57:51.430725 I2C: 00:5d: enabled 1
835 21:57:51.433801 GENERIC: 0.0: enabled 1
836 21:57:51.437260 PCI: 00:15.2: enabled 0
837 21:57:51.437341 PCI: 00:15.3: enabled 0
838 21:57:51.440359 PCI: 00:16.0: enabled 1
839 21:57:51.443995 PCI: 00:16.1: enabled 0
840 21:57:51.447019 PCI: 00:16.2: enabled 0
841 21:57:51.450188 PCI: 00:16.3: enabled 0
842 21:57:51.450274 PCI: 00:16.4: enabled 0
843 21:57:51.453206
844 21:57:51.453286 PCI: 00:16.5: enabled 0
845 21:57:51.456758 PCI: 00:17.0: enabled 1
846 21:57:51.459853 PCI: 00:19.0: enabled 1
847 21:57:51.463133 I2C: 00:1a: enabled 1
848 21:57:51.463214 I2C: 00:38: enabled 1
849 21:57:51.466853 I2C: 00:39: enabled 1
850 21:57:51.469956 I2C: 00:3a: enabled 1
851 21:57:51.473032 I2C: 00:3b: enabled 1
852 21:57:51.476261 PCI: 00:19.1: enabled 0
853 21:57:51.476375 PCI: 00:19.2: enabled 0
854 21:57:51.479550 PCI: 00:1a.0: enabled 0
855 21:57:51.482664 PCI: 00:1c.0: enabled 0
856 21:57:51.486425 PCI: 00:1c.1: enabled 0
857 21:57:51.489442 PCI: 00:1c.2: enabled 0
858 21:57:51.489515 PCI: 00:1c.3: enabled 0
859 21:57:51.492592 PCI: 00:1c.4: enabled 0
860 21:57:51.496163 PCI: 00:1c.5: enabled 0
861 21:57:51.499144 PCI: 00:1c.6: enabled 0
862 21:57:51.502441 PCI: 00:1c.7: enabled 0
863 21:57:51.502546 PCI: 00:1d.0: enabled 1
864 21:57:51.506051 PCI: 00:1d.1: enabled 0
865 21:57:51.509026 PCI: 00:1d.2: enabled 0
866 21:57:51.512572 PCI: 00:1d.3: enabled 0
867 21:57:51.515685 PCI: 00:1d.4: enabled 0
868 21:57:51.515769 PCI: 00:1d.5: enabled 1
869 21:57:51.518778 PCI: 00:00.0: enabled 1
870 21:57:51.522348 PCI: 00:1e.0: enabled 1
871 21:57:51.525300 PCI: 00:1e.1: enabled 0
872 21:57:51.528824 PCI: 00:1e.2: enabled 1
873 21:57:51.528908 SPI: 00: enabled 1
874 21:57:51.531882 PCI: 00:1e.3: enabled 1
875 21:57:51.535477 SPI: 01: enabled 1
876 21:57:51.538484 PCI: 00:1f.0: enabled 1
877 21:57:51.538568 PNP: 0c09.0: enabled 1
878 21:57:51.541817
879 21:57:51.541902 PCI: 00:1f.1: enabled 1
880 21:57:51.544876 PCI: 00:1f.2: enabled 1
881 21:57:51.548413 PCI: 00:1f.3: enabled 1
882 21:57:51.551464 PCI: 00:1f.4: enabled 1
883 21:57:51.551549 PCI: 00:1f.5: enabled 1
884 21:57:51.554584
885 21:57:51.554668 PCI: 00:1f.6: enabled 0
886 21:57:51.557755 Root Device scanning...
887 21:57:51.561419 scan_static_bus for Root Device
888 21:57:51.564431 CPU_CLUSTER: 0 enabled
889 21:57:51.567902 DOMAIN: 0000 enabled
890 21:57:51.567986 DOMAIN: 0000 scanning...
891 21:57:51.571145 PCI: pci_scan_bus for bus 00
892 21:57:51.574297 PCI: 00:00.0 [8086/0000] ops
893 21:57:51.577448 PCI: 00:00.0 [8086/9b61] enabled
894 21:57:51.580577 PCI: 00:02.0 [8086/0000] bus ops
895 21:57:51.584281 PCI: 00:02.0 [8086/9b41] enabled
896 21:57:51.587466 PCI: 00:04.0 [8086/1903] disabled
897 21:57:51.590766 PCI: 00:08.0 [8086/1911] enabled
898 21:57:51.593765 PCI: 00:12.0 [8086/02f9] enabled
899 21:57:51.597273 PCI: 00:14.0 [8086/0000] bus ops
900 21:57:51.600232 PCI: 00:14.0 [8086/02ed] enabled
901 21:57:51.603779 PCI: 00:14.2 [8086/02ef] enabled
902 21:57:51.606880 PCI: 00:14.3 [8086/02f0] enabled
903 21:57:51.610322 PCI: 00:15.0 [8086/0000] bus ops
904 21:57:51.613381 PCI: 00:15.0 [8086/02e8] enabled
905 21:57:51.616974 PCI: 00:15.1 [8086/0000] bus ops
906 21:57:51.619903 PCI: 00:15.1 [8086/02e9] enabled
907 21:57:51.623497
908 21:57:51.623584 PCI: 00:16.0 [8086/0000] ops
909 21:57:51.626559 PCI: 00:16.0 [8086/02e0] enabled
910 21:57:51.629563 PCI: 00:17.0 [8086/0000] ops
911 21:57:51.633162 PCI: 00:17.0 [8086/02d3] enabled
912 21:57:51.636202 PCI: 00:19.0 [8086/0000] bus ops
913 21:57:51.639329 PCI: 00:19.0 [8086/02c5] enabled
914 21:57:51.642696 PCI: 00:1d.0 [8086/0000] bus ops
915 21:57:51.646253 PCI: 00:1d.0 [8086/02b0] enabled
916 21:57:51.652928 PCI: Static device PCI: 00:1d.5 not found, disabling it.
917 21:57:51.656234 PCI: 00:1e.0 [8086/0000] ops
918 21:57:51.659297 PCI: 00:1e.0 [8086/02a8] enabled
919 21:57:51.662348 PCI: 00:1e.2 [8086/0000] bus ops
920 21:57:51.665384 PCI: 00:1e.2 [8086/02aa] enabled
921 21:57:51.668907 PCI: 00:1e.3 [8086/0000] bus ops
922 21:57:51.671984 PCI: 00:1e.3 [8086/02ab] enabled
923 21:57:51.675161 PCI: 00:1f.0 [8086/0000] bus ops
924 21:57:51.678806 PCI: 00:1f.0 [8086/0284] enabled
925 21:57:51.685180 PCI: Static device PCI: 00:1f.1 not found, disabling it.
926 21:57:51.691801 PCI: Static device PCI: 00:1f.2 not found, disabling it.
927 21:57:51.694894 PCI: 00:1f.3 [8086/0000] bus ops
928 21:57:51.698432 PCI: 00:1f.3 [8086/02c8] enabled
929 21:57:51.701788 PCI: 00:1f.4 [8086/0000] bus ops
930 21:57:51.704776 PCI: 00:1f.4 [8086/02a3] enabled
931 21:57:51.708353 PCI: 00:1f.5 [8086/0000] bus ops
932 21:57:51.711298 PCI: 00:1f.5 [8086/02a4] enabled
933 21:57:51.714744 PCI: Leftover static devices:
934 21:57:51.714828 PCI: 00:05.0
935 21:57:51.714894 PCI: 00:12.5
936 21:57:51.717777 PCI: 00:12.6
937 21:57:51.717861 PCI: 00:14.1
938 21:57:51.721328 PCI: 00:14.5
939 21:57:51.721412 PCI: 00:15.2
940 21:57:51.724366 PCI: 00:15.3
941 21:57:51.724460 PCI: 00:16.1
942 21:57:51.724527 PCI: 00:16.2
943 21:57:51.727803 PCI: 00:16.3
944 21:57:51.727888 PCI: 00:16.4
945 21:57:51.731249 PCI: 00:16.5
946 21:57:51.731333 PCI: 00:19.1
947 21:57:51.731399 PCI: 00:19.2
948 21:57:51.734269 PCI: 00:1a.0
949 21:57:51.734354 PCI: 00:1c.0
950 21:57:51.737847 PCI: 00:1c.1
951 21:57:51.737931 PCI: 00:1c.2
952 21:57:51.740975 PCI: 00:1c.3
953 21:57:51.741061 PCI: 00:1c.4
954 21:57:51.741126 PCI: 00:1c.5
955 21:57:51.743965 PCI: 00:1c.6
956 21:57:51.744050 PCI: 00:1c.7
957 21:57:51.747496 PCI: 00:1d.1
958 21:57:51.747580 PCI: 00:1d.2
959 21:57:51.747645 PCI: 00:1d.3
960 21:57:51.750624 PCI: 00:1d.4
961 21:57:51.750708 PCI: 00:1d.5
962 21:57:51.754210 PCI: 00:1e.1
963 21:57:51.754294 PCI: 00:1f.1
964 21:57:51.757278 PCI: 00:1f.2
965 21:57:51.757362 PCI: 00:1f.6
966 21:57:51.760448 PCI: Check your devicetree.cb.
967 21:57:51.763562 PCI: 00:02.0 scanning...
968 21:57:51.767279 scan_generic_bus for PCI: 00:02.0
969 21:57:51.770245 scan_generic_bus for PCI: 00:02.0 done
970 21:57:51.776872 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
971 21:57:51.776957 PCI: 00:14.0 scanning...
972 21:57:51.779993
973 21:57:51.783198 scan_static_bus for PCI: 00:14.0
974 21:57:51.783281 USB0 port 0 enabled
975 21:57:51.786386 USB0 port 0 scanning...
976 21:57:51.789514 scan_static_bus for USB0 port 0
977 21:57:51.793159 USB2 port 0 enabled
978 21:57:51.793257 USB2 port 1 enabled
979 21:57:51.796206 USB2 port 2 disabled
980 21:57:51.799329 USB2 port 3 disabled
981 21:57:51.799413 USB2 port 5 disabled
982 21:57:51.802803 USB2 port 6 enabled
983 21:57:51.806199 USB2 port 9 enabled
984 21:57:51.806282 USB3 port 0 enabled
985 21:57:51.809298 USB3 port 1 enabled
986 21:57:51.809382 USB3 port 2 enabled
987 21:57:51.812318 USB3 port 3 enabled
988 21:57:51.815831 USB3 port 4 disabled
989 21:57:51.815915 USB2 port 0 scanning...
990 21:57:51.818779
991 21:57:51.822381 scan_static_bus for USB2 port 0
992 21:57:51.825382 scan_static_bus for USB2 port 0 done
993 21:57:51.828839 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
994 21:57:51.832320 USB2 port 1 scanning...
995 21:57:51.835201 scan_static_bus for USB2 port 1
996 21:57:51.838889 scan_static_bus for USB2 port 1 done
997 21:57:51.845347 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
998 21:57:51.848292 USB2 port 6 scanning...
999 21:57:51.851809 scan_static_bus for USB2 port 6
1000 21:57:51.854932 scan_static_bus for USB2 port 6 done
1001 21:57:51.858330 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
1002 21:57:51.861502
1003 21:57:51.861581 USB2 port 9 scanning...
1004 21:57:51.865189 scan_static_bus for USB2 port 9
1005 21:57:51.868229 scan_static_bus for USB2 port 9 done
1006 21:57:51.874326 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
1007 21:57:51.878013 USB3 port 0 scanning...
1008 21:57:51.881179 scan_static_bus for USB3 port 0
1009 21:57:51.884198 scan_static_bus for USB3 port 0 done
1010 21:57:51.890987 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
1011 21:57:51.891068 USB3 port 1 scanning...
1012 21:57:51.894618 scan_static_bus for USB3 port 1
1013 21:57:51.900762 scan_static_bus for USB3 port 1 done
1014 21:57:51.904174 scan_bus: scanning of bus USB3 port 1 took 9689 usecs
1015 21:57:51.907545 USB3 port 2 scanning...
1016 21:57:51.910615 scan_static_bus for USB3 port 2
1017 21:57:51.913685 scan_static_bus for USB3 port 2 done
1018 21:57:51.920709 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
1019 21:57:51.923805 USB3 port 3 scanning...
1020 21:57:51.926904 scan_static_bus for USB3 port 3
1021 21:57:51.930335 scan_static_bus for USB3 port 3 done
1022 21:57:51.933432 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
1023 21:57:51.940252 scan_static_bus for USB0 port 0 done
1024 21:57:51.943178 scan_bus: scanning of bus USB0 port 0 took 155309 usecs
1025 21:57:51.946655 scan_static_bus for PCI: 00:14.0 done
1026 21:57:51.953063 scan_bus: scanning of bus PCI: 00:14.0 took 172916 usecs
1027 21:57:51.956333 PCI: 00:15.0 scanning...
1028 21:57:51.959838 scan_generic_bus for PCI: 00:15.0
1029 21:57:51.962856 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1030 21:57:51.965913 scan_generic_bus for PCI: 00:15.0 done
1031 21:57:51.969625
1032 21:57:51.972813 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
1033 21:57:51.975844 PCI: 00:15.1 scanning...
1034 21:57:51.979017 scan_generic_bus for PCI: 00:15.1
1035 21:57:51.982697 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1036 21:57:51.988940 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1037 21:57:51.992542 scan_generic_bus for PCI: 00:15.1 done
1038 21:57:51.998853 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
1039 21:57:51.998931 PCI: 00:19.0 scanning...
1040 21:57:52.001945 scan_generic_bus for PCI: 00:19.0
1041 21:57:52.008724 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1042 21:57:52.011818 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1043 21:57:52.014868 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1044 21:57:52.018531 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1045 21:57:52.024670 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1046 21:57:52.028200 scan_generic_bus for PCI: 00:19.0 done
1047 21:57:52.034737 scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs
1048 21:57:52.034814 PCI: 00:1d.0 scanning...
1049 21:57:52.041564 do_pci_scan_bridge for PCI: 00:1d.0
1050 21:57:52.041641 PCI: pci_scan_bus for bus 01
1051 21:57:52.044581 PCI: 01:00.0 [1c5c/1327] enabled
1052 21:57:52.051296 Enabling Common Clock Configuration
1053 21:57:52.054745 L1 Sub-State supported from root port 29
1054 21:57:52.057766 L1 Sub-State Support = 0xf
1055 21:57:52.061227 CommonModeRestoreTime = 0x28
1056 21:57:52.064396 Power On Value = 0x16, Power On Scale = 0x0
1057 21:57:52.064480 ASPM: Enabled L1
1058 21:57:52.067955
1059 21:57:52.071012 scan_bus: scanning of bus PCI: 00:1d.0 took 32786 usecs
1060 21:57:52.074217 PCI: 00:1e.2 scanning...
1061 21:57:52.077165 scan_generic_bus for PCI: 00:1e.2
1062 21:57:52.080746 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1063 21:57:52.083929 scan_generic_bus for PCI: 00:1e.2 done
1064 21:57:52.087459
1065 21:57:52.090699 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
1066 21:57:52.093721 PCI: 00:1e.3 scanning...
1067 21:57:52.096853 scan_generic_bus for PCI: 00:1e.3
1068 21:57:52.100464 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1069 21:57:52.103684 scan_generic_bus for PCI: 00:1e.3 done
1070 21:57:52.109907 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1071 21:57:52.113347 PCI: 00:1f.0 scanning...
1072 21:57:52.116435 scan_static_bus for PCI: 00:1f.0
1073 21:57:52.120127 PNP: 0c09.0 enabled
1074 21:57:52.123158 scan_static_bus for PCI: 00:1f.0 done
1075 21:57:52.129857 scan_bus: scanning of bus PCI: 00:1f.0 took 12084 usecs
1076 21:57:52.129945 PCI: 00:1f.3 scanning...
1077 21:57:52.136424 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1078 21:57:52.139482 PCI: 00:1f.4 scanning...
1079 21:57:52.142844 scan_generic_bus for PCI: 00:1f.4
1080 21:57:52.145979 scan_generic_bus for PCI: 00:1f.4 done
1081 21:57:52.152616 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1082 21:57:52.155627 PCI: 00:1f.5 scanning...
1083 21:57:52.159349 scan_generic_bus for PCI: 00:1f.5
1084 21:57:52.162421 scan_generic_bus for PCI: 00:1f.5 done
1085 21:57:52.169109 scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
1086 21:57:52.172158 scan_bus: scanning of bus DOMAIN: 0000 took 604875 usecs
1087 21:57:52.178374 scan_static_bus for Root Device done
1088 21:57:52.181545 scan_bus: scanning of bus Root Device took 624754 usecs
1089 21:57:52.184750 done
1090 21:57:52.184830 Chrome EC: UHEPI supported
1091 21:57:52.192249 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1092 21:57:52.198372 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1093 21:57:52.205139 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1094 21:57:52.211362 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1095 21:57:52.214817 SPI flash protection: WPSW=0 SRP0=0
1096 21:57:52.221620 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1097 21:57:52.224791 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1098 21:57:52.228302 found VGA at PCI: 00:02.0
1099 21:57:52.231334 Setting up VGA for PCI: 00:02.0
1100 21:57:52.238287 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1101 21:57:52.241275 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1102 21:57:52.244273 Allocating resources...
1103 21:57:52.247802 Reading resources...
1104 21:57:52.250856 Root Device read_resources bus 0 link: 0
1105 21:57:52.254339 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1106 21:57:52.260404 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1107 21:57:52.263890 DOMAIN: 0000 read_resources bus 0 link: 0
1108 21:57:52.271260 PCI: 00:14.0 read_resources bus 0 link: 0
1109 21:57:52.274354 USB0 port 0 read_resources bus 0 link: 0
1110 21:57:52.282712 USB0 port 0 read_resources bus 0 link: 0 done
1111 21:57:52.285871 PCI: 00:14.0 read_resources bus 0 link: 0 done
1112 21:57:52.293173 PCI: 00:15.0 read_resources bus 1 link: 0
1113 21:57:52.296882 PCI: 00:15.0 read_resources bus 1 link: 0 done
1114 21:57:52.303140 PCI: 00:15.1 read_resources bus 2 link: 0
1115 21:57:52.306204 PCI: 00:15.1 read_resources bus 2 link: 0 done
1116 21:57:52.313915 PCI: 00:19.0 read_resources bus 3 link: 0
1117 21:57:52.320462 PCI: 00:19.0 read_resources bus 3 link: 0 done
1118 21:57:52.323617 PCI: 00:1d.0 read_resources bus 1 link: 0
1119 21:57:52.330211 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1120 21:57:52.333743 PCI: 00:1e.2 read_resources bus 4 link: 0
1121 21:57:52.340349 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1122 21:57:52.343371 PCI: 00:1e.3 read_resources bus 5 link: 0
1123 21:57:52.349823 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1124 21:57:52.353367 PCI: 00:1f.0 read_resources bus 0 link: 0
1125 21:57:52.359945 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1126 21:57:52.366448 DOMAIN: 0000 read_resources bus 0 link: 0 done
1127 21:57:52.369581 Root Device read_resources bus 0 link: 0 done
1128 21:57:52.372680 Done reading resources.
1129 21:57:52.379430 Show resources in subtree (Root Device)...After reading.
1130 21:57:52.382481 Root Device child on link 0 CPU_CLUSTER: 0
1131 21:57:52.385669 CPU_CLUSTER: 0 child on link 0 APIC: 00
1132 21:57:52.389269 APIC: 00
1133 21:57:52.389356 APIC: 03
1134 21:57:52.392450 APIC: 01
1135 21:57:52.392531 APIC: 02
1136 21:57:52.392601 APIC: 05
1137 21:57:52.395999 APIC: 04
1138 21:57:52.396082 APIC: 06
1139 21:57:52.396153 APIC: 07
1140 21:57:52.399190
1141 21:57:52.448428 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1142 21:57:52.448772 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1143 21:57:52.448856 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1144 21:57:52.448929 PCI: 00:00.0
1145 21:57:52.449517 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1146 21:57:52.449793 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1147 21:57:52.453230 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1148 21:57:52.459760 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1149 21:57:52.469569 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1150 21:57:52.479352 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1151 21:57:52.489247 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1152 21:57:52.498694 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1153 21:57:52.505421 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1154 21:57:52.514824 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1155 21:57:52.524961 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1156 21:57:52.534555 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1157 21:57:52.544318 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1158 21:57:52.554391 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1159 21:57:52.564120 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1160 21:57:52.570928 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1161 21:57:52.573952 PCI: 00:02.0
1162 21:57:52.583837 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1163 21:57:52.593643 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1164 21:57:52.603502 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1165 21:57:52.603633 PCI: 00:04.0
1166 21:57:52.606602 PCI: 00:08.0
1167 21:57:52.616406 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 21:57:52.616531 PCI: 00:12.0
1169 21:57:52.626090 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 21:57:52.632736 PCI: 00:14.0 child on link 0 USB0 port 0
1171 21:57:52.642405 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1172 21:57:52.645386 USB0 port 0 child on link 0 USB2 port 0
1173 21:57:52.648917 USB2 port 0
1174 21:57:52.649043 USB2 port 1
1175 21:57:52.652090 USB2 port 2
1176 21:57:52.652195 USB2 port 3
1177 21:57:52.655253 USB2 port 5
1178 21:57:52.655352 USB2 port 6
1179 21:57:52.658704
1180 21:57:52.658800 USB2 port 9
1181 21:57:52.661673 USB3 port 0
1182 21:57:52.661770 USB3 port 1
1183 21:57:52.665275 USB3 port 2
1184 21:57:52.665384 USB3 port 3
1185 21:57:52.668391 USB3 port 4
1186 21:57:52.668472 PCI: 00:14.2
1187 21:57:52.678453 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1188 21:57:52.688249 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1189 21:57:52.691369 PCI: 00:14.3
1190 21:57:52.700854 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 21:57:52.704461 PCI: 00:15.0 child on link 0 I2C: 01:15
1192 21:57:52.714386 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 21:57:52.717455 I2C: 01:15
1194 21:57:52.720574 PCI: 00:15.1 child on link 0 I2C: 02:5d
1195 21:57:52.730356 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 21:57:52.733723 I2C: 02:5d
1197 21:57:52.733824 GENERIC: 0.0
1198 21:57:52.737124 PCI: 00:16.0
1199 21:57:52.746852 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 21:57:52.746969 PCI: 00:17.0
1201 21:57:52.756303 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1202 21:57:52.766256 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1203 21:57:52.773017 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1204 21:57:52.782796 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1205 21:57:52.789149 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1206 21:57:52.798909 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1207 21:57:52.801978 PCI: 00:19.0 child on link 0 I2C: 03:1a
1208 21:57:52.811869 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 21:57:52.815159 I2C: 03:1a
1210 21:57:52.815296 I2C: 03:38
1211 21:57:52.818224 I2C: 03:39
1212 21:57:52.818356 I2C: 03:3a
1213 21:57:52.821844 I2C: 03:3b
1214 21:57:52.824825 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1215 21:57:52.834915 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 21:57:52.844561 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 21:57:52.854351 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 21:57:52.854488 PCI: 01:00.0
1219 21:57:52.863983 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 21:57:52.867352 PCI: 00:1e.0
1221 21:57:52.877176 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1222 21:57:52.887258 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 21:57:52.890311 PCI: 00:1e.2 child on link 0 SPI: 00
1224 21:57:52.900104 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 21:57:52.903245 SPI: 00
1226 21:57:52.906300 PCI: 00:1e.3 child on link 0 SPI: 01
1227 21:57:52.916279 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 21:57:52.916392 SPI: 01
1229 21:57:52.922970 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1230 21:57:52.929363 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1231 21:57:52.939175 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1232 21:57:52.942304 PNP: 0c09.0
1233 21:57:52.948931 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1234 21:57:52.952352 PCI: 00:1f.3
1235 21:57:52.962247 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 21:57:52.971701 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 21:57:52.974842 PCI: 00:1f.4
1238 21:57:52.981380 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1239 21:57:52.991248 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1240 21:57:52.994394 PCI: 00:1f.5
1241 21:57:53.004287 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1242 21:57:53.011103 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1243 21:57:53.017382 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1244 21:57:53.024145 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1245 21:57:53.027201 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1246 21:57:53.030585 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1247 21:57:53.033760 PCI: 00:17.0 18 * [0x60 - 0x67] io
1248 21:57:53.036865 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1249 21:57:53.043795 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1250 21:57:53.050355 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1251 21:57:53.059818 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1252 21:57:53.066366 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1253 21:57:53.072853 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1254 21:57:53.076515 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1255 21:57:53.086365 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 21:57:53.089447 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1257 21:57:53.096143 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1258 21:57:53.099241 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1259 21:57:53.105983 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1260 21:57:53.109132 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1261 21:57:53.115416 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1262 21:57:53.119106 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1263 21:57:53.125391 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1264 21:57:53.128496 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1265 21:57:53.135136 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1266 21:57:53.138241 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1267 21:57:53.144778 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1268 21:57:53.147878 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1269 21:57:53.154577 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1270 21:57:53.158257 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1271 21:57:53.161280 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1272 21:57:53.164337
1273 21:57:53.167851 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1274 21:57:53.171324 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1275 21:57:53.177347 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1276 21:57:53.180900 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1277 21:57:53.187445 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1278 21:57:53.190636 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1279 21:57:53.196929 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1280 21:57:53.206734 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1281 21:57:53.210357 avoid_fixed_resources: DOMAIN: 0000
1282 21:57:53.213473 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1283 21:57:53.219833 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1284 21:57:53.229747 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1285 21:57:53.236340 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1286 21:57:53.242952 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1287 21:57:53.252563 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1288 21:57:53.259209 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1289 21:57:53.265700 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1290 21:57:53.275806 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1291 21:57:53.282093 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1292 21:57:53.288706 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1293 21:57:53.294958 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1294 21:57:53.298602 Setting resources...
1295 21:57:53.304793 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1296 21:57:53.308378 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1297 21:57:53.311560 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1298 21:57:53.314700
1299 21:57:53.317850 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1300 21:57:53.321455 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1301 21:57:53.327777 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1302 21:57:53.334335 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1303 21:57:53.340887 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1304 21:57:53.346984 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1305 21:57:53.353604 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1306 21:57:53.357246 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1307 21:57:53.363741 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1308 21:57:53.366669 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1309 21:57:53.373407 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1310 21:57:53.376396 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1311 21:57:53.382984 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1312 21:57:53.386497 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1313 21:57:53.392734 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1314 21:57:53.396271 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1315 21:57:53.402949 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1316 21:57:53.406024 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1317 21:57:53.412307 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1318 21:57:53.415892 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1319 21:57:53.422156 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1320 21:57:53.425822 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1321 21:57:53.428859 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1322 21:57:53.432123
1323 21:57:53.435129 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1324 21:57:53.438512 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1325 21:57:53.442145
1326 21:57:53.445236 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1327 21:57:53.448184 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1328 21:57:53.454766 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1329 21:57:53.458423 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1330 21:57:53.468106 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1331 21:57:53.474831 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1332 21:57:53.481300 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1333 21:57:53.491016 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1334 21:57:53.494172 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1335 21:57:53.500521 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1336 21:57:53.507246 Root Device assign_resources, bus 0 link: 0
1337 21:57:53.510296 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 21:57:53.520219 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1339 21:57:53.526919 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1340 21:57:53.536323 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1341 21:57:53.543275 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1342 21:57:53.553052 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1343 21:57:53.559261 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1344 21:57:53.565960 PCI: 00:14.0 assign_resources, bus 0 link: 0
1345 21:57:53.569436 PCI: 00:14.0 assign_resources, bus 0 link: 0
1346 21:57:53.579007 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1347 21:57:53.585587 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1348 21:57:53.595390 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1349 21:57:53.601716 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1350 21:57:53.608480 PCI: 00:15.0 assign_resources, bus 1 link: 0
1351 21:57:53.611510 PCI: 00:15.0 assign_resources, bus 1 link: 0
1352 21:57:53.621567 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1353 21:57:53.624685 PCI: 00:15.1 assign_resources, bus 2 link: 0
1354 21:57:53.627859 PCI: 00:15.1 assign_resources, bus 2 link: 0
1355 21:57:53.637686 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1356 21:57:53.644264 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1357 21:57:53.653806 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1358 21:57:53.660448 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1359 21:57:53.666995 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1360 21:57:53.670049
1361 21:57:53.676769 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1362 21:57:53.683190 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1363 21:57:53.693348 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1364 21:57:53.696264 PCI: 00:19.0 assign_resources, bus 3 link: 0
1365 21:57:53.702920 PCI: 00:19.0 assign_resources, bus 3 link: 0
1366 21:57:53.709615 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1367 21:57:53.719461 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1368 21:57:53.728927 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1369 21:57:53.732205 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 21:57:53.738866 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1371 21:57:53.745463 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1372 21:57:53.752293 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1373 21:57:53.761853 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1374 21:57:53.765419 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1375 21:57:53.771991 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1376 21:57:53.778526 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1377 21:57:53.784968 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1378 21:57:53.788472 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1379 21:57:53.794719 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1380 21:57:53.797689 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1381 21:57:53.804532 LPC: Trying to open IO window from 800 size 1ff
1382 21:57:53.810727 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1383 21:57:53.820562 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1384 21:57:53.827374 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1385 21:57:53.837263 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1386 21:57:53.840350 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 21:57:53.846988 Root Device assign_resources, bus 0 link: 0
1388 21:57:53.847103 Done setting resources.
1389 21:57:53.853399 Show resources in subtree (Root Device)...After assigning values.
1390 21:57:53.859829 Root Device child on link 0 CPU_CLUSTER: 0
1391 21:57:53.862875 CPU_CLUSTER: 0 child on link 0 APIC: 00
1392 21:57:53.862977 APIC: 00
1393 21:57:53.866468 APIC: 03
1394 21:57:53.866555 APIC: 01
1395 21:57:53.866621 APIC: 02
1396 21:57:53.869568 APIC: 05
1397 21:57:53.869643 APIC: 04
1398 21:57:53.873123 APIC: 06
1399 21:57:53.873216 APIC: 07
1400 21:57:53.876161 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1401 21:57:53.886174 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1402 21:57:53.899189 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1403 21:57:53.899302 PCI: 00:00.0
1404 21:57:53.908659 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1405 21:57:53.918609 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1406 21:57:53.928407 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1407 21:57:53.937936 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1408 21:57:53.947754 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1409 21:57:53.954292 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1410 21:57:53.964409 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1411 21:57:53.974027 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1412 21:57:53.983762 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1413 21:57:53.993631 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1414 21:57:54.003366 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1415 21:57:54.013132 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1416 21:57:54.022882 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1417 21:57:54.032944 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1418 21:57:54.039243 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1419 21:57:54.049128 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1420 21:57:54.052135 PCI: 00:02.0
1421 21:57:54.062405 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1422 21:57:54.072145 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1423 21:57:54.081683 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1424 21:57:54.081801 PCI: 00:04.0
1425 21:57:54.085330 PCI: 00:08.0
1426 21:57:54.095125 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1427 21:57:54.098283 PCI: 00:12.0
1428 21:57:54.107951 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1429 21:57:54.111131 PCI: 00:14.0 child on link 0 USB0 port 0
1430 21:57:54.120794 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1431 21:57:54.127535 USB0 port 0 child on link 0 USB2 port 0
1432 21:57:54.127629 USB2 port 0
1433 21:57:54.130690 USB2 port 1
1434 21:57:54.130777 USB2 port 2
1435 21:57:54.133860 USB2 port 3
1436 21:57:54.133947 USB2 port 5
1437 21:57:54.136998 USB2 port 6
1438 21:57:54.137076 USB2 port 9
1439 21:57:54.140212 USB3 port 0
1440 21:57:54.143847 USB3 port 1
1441 21:57:54.143931 USB3 port 2
1442 21:57:54.146900 USB3 port 3
1443 21:57:54.146973 USB3 port 4
1444 21:57:54.150348 PCI: 00:14.2
1445 21:57:54.160116 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1446 21:57:54.169819 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1447 21:57:54.169925 PCI: 00:14.3
1448 21:57:54.173326
1449 21:57:54.183320 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1450 21:57:54.186229 PCI: 00:15.0 child on link 0 I2C: 01:15
1451 21:57:54.196153 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1452 21:57:54.199237 I2C: 01:15
1453 21:57:54.202352 PCI: 00:15.1 child on link 0 I2C: 02:5d
1454 21:57:54.212511 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1455 21:57:54.215668 I2C: 02:5d
1456 21:57:54.215754 GENERIC: 0.0
1457 21:57:54.218821 PCI: 00:16.0
1458 21:57:54.228518 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1459 21:57:54.228609 PCI: 00:17.0
1460 21:57:54.238444 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1461 21:57:54.248283 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1462 21:57:54.258000 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1463 21:57:54.268233 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1464 21:57:54.277732 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1465 21:57:54.287354 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1466 21:57:54.290445 PCI: 00:19.0 child on link 0 I2C: 03:1a
1467 21:57:54.300303 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1468 21:57:54.303448 I2C: 03:1a
1469 21:57:54.303543 I2C: 03:38
1470 21:57:54.307014 I2C: 03:39
1471 21:57:54.307106 I2C: 03:3a
1472 21:57:54.310175 I2C: 03:3b
1473 21:57:54.313351 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1474 21:57:54.323203 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1475 21:57:54.332933 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1476 21:57:54.342907 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1477 21:57:54.345973 PCI: 01:00.0
1478 21:57:54.355826 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1479 21:57:54.355936 PCI: 00:1e.0
1480 21:57:54.359299
1481 21:57:54.369079 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1482 21:57:54.378854 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1483 21:57:54.381952 PCI: 00:1e.2 child on link 0 SPI: 00
1484 21:57:54.391909 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1485 21:57:54.394866 SPI: 00
1486 21:57:54.398287 PCI: 00:1e.3 child on link 0 SPI: 01
1487 21:57:54.408442 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1488 21:57:54.411442 SPI: 01
1489 21:57:54.414631 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 21:57:54.424609 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 21:57:54.431313 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1492 21:57:54.434446 PNP: 0c09.0
1493 21:57:54.440698 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 21:57:54.443860
1495 21:57:54.443945 PCI: 00:1f.3
1496 21:57:54.453720 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1497 21:57:54.463899 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1498 21:57:54.467132 PCI: 00:1f.4
1499 21:57:54.476646 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1500 21:57:54.486716 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1501 21:57:54.486822 PCI: 00:1f.5
1502 21:57:54.496362 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1503 21:57:54.499212 Done allocating resources.
1504 21:57:54.505845 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1505 21:57:54.509399 Enabling resources...
1506 21:57:54.512604 PCI: 00:00.0 subsystem <- 8086/9b61
1507 21:57:54.515701 PCI: 00:00.0 cmd <- 06
1508 21:57:54.518797 PCI: 00:02.0 subsystem <- 8086/9b41
1509 21:57:54.522469 PCI: 00:02.0 cmd <- 03
1510 21:57:54.525637 PCI: 00:08.0 cmd <- 06
1511 21:57:54.528690 PCI: 00:12.0 subsystem <- 8086/02f9
1512 21:57:54.531850 PCI: 00:12.0 cmd <- 02
1513 21:57:54.535516 PCI: 00:14.0 subsystem <- 8086/02ed
1514 21:57:54.535599 PCI: 00:14.0 cmd <- 02
1515 21:57:54.538671
1516 21:57:54.538752 PCI: 00:14.2 cmd <- 02
1517 21:57:54.544942 PCI: 00:14.3 subsystem <- 8086/02f0
1518 21:57:54.545028 PCI: 00:14.3 cmd <- 02
1519 21:57:54.548192 PCI: 00:15.0 subsystem <- 8086/02e8
1520 21:57:54.551842 PCI: 00:15.0 cmd <- 02
1521 21:57:54.554958 PCI: 00:15.1 subsystem <- 8086/02e9
1522 21:57:54.558100 PCI: 00:15.1 cmd <- 02
1523 21:57:54.561613 PCI: 00:16.0 subsystem <- 8086/02e0
1524 21:57:54.564710 PCI: 00:16.0 cmd <- 02
1525 21:57:54.567897 PCI: 00:17.0 subsystem <- 8086/02d3
1526 21:57:54.571472 PCI: 00:17.0 cmd <- 03
1527 21:57:54.574454 PCI: 00:19.0 subsystem <- 8086/02c5
1528 21:57:54.578000 PCI: 00:19.0 cmd <- 02
1529 21:57:54.581187 PCI: 00:1d.0 bridge ctrl <- 0013
1530 21:57:54.584202 PCI: 00:1d.0 subsystem <- 8086/02b0
1531 21:57:54.587840 PCI: 00:1d.0 cmd <- 06
1532 21:57:54.590872 PCI: 00:1e.0 subsystem <- 8086/02a8
1533 21:57:54.593829 PCI: 00:1e.0 cmd <- 06
1534 21:57:54.597321 PCI: 00:1e.2 subsystem <- 8086/02aa
1535 21:57:54.600314 PCI: 00:1e.2 cmd <- 06
1536 21:57:54.603650 PCI: 00:1e.3 subsystem <- 8086/02ab
1537 21:57:54.603740 PCI: 00:1e.3 cmd <- 02
1538 21:57:54.607225
1539 21:57:54.610387 PCI: 00:1f.0 subsystem <- 8086/0284
1540 21:57:54.610470 PCI: 00:1f.0 cmd <- 407
1541 21:57:54.617174 PCI: 00:1f.3 subsystem <- 8086/02c8
1542 21:57:54.617279 PCI: 00:1f.3 cmd <- 02
1543 21:57:54.620276 PCI: 00:1f.4 subsystem <- 8086/02a3
1544 21:57:54.623444 PCI: 00:1f.4 cmd <- 03
1545 21:57:54.627173 PCI: 00:1f.5 subsystem <- 8086/02a4
1546 21:57:54.630279 PCI: 00:1f.5 cmd <- 406
1547 21:57:54.639697 PCI: 01:00.0 cmd <- 02
1548 21:57:54.644832 done.
1549 21:57:54.653318 ME: Version: 14.0.39.1367
1550 21:57:54.659443 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1551 21:57:54.662817 Initializing devices...
1552 21:57:54.662904 Root Device init ...
1553 21:57:54.669566 Chrome EC: Set SMI mask to 0x0000000000000000
1554 21:57:54.672677 Chrome EC: clear events_b mask to 0x0000000000000000
1555 21:57:54.679726 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 21:57:54.685753 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1557 21:57:54.692354 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1558 21:57:54.695805 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 21:57:54.702375 Root Device init finished in 35164 usecs
1560 21:57:54.702464 CPU_CLUSTER: 0 init ...
1561 21:57:54.708859 CPU_CLUSTER: 0 init finished in 2446 usecs
1562 21:57:54.713944 PCI: 00:00.0 init ...
1563 21:57:54.716899 CPU TDP: 15 Watts
1564 21:57:54.720004 CPU PL2 = 64 Watts
1565 21:57:54.723174 PCI: 00:00.0 init finished in 7079 usecs
1566 21:57:54.726881 PCI: 00:02.0 init ...
1567 21:57:54.730010 PCI: 00:02.0 init finished in 2251 usecs
1568 21:57:54.733179 PCI: 00:08.0 init ...
1569 21:57:54.736372 PCI: 00:08.0 init finished in 2252 usecs
1570 21:57:54.739538 PCI: 00:12.0 init ...
1571 21:57:54.743229 PCI: 00:12.0 init finished in 2251 usecs
1572 21:57:54.746371 PCI: 00:14.0 init ...
1573 21:57:54.749353 PCI: 00:14.0 init finished in 2251 usecs
1574 21:57:54.752841 PCI: 00:14.2 init ...
1575 21:57:54.755972 PCI: 00:14.2 init finished in 2243 usecs
1576 21:57:54.759209 PCI: 00:14.3 init ...
1577 21:57:54.762680 PCI: 00:14.3 init finished in 2269 usecs
1578 21:57:54.766112 PCI: 00:15.0 init ...
1579 21:57:54.769214 DW I2C bus 0 at 0xd121f000 (400 KHz)
1580 21:57:54.775863 PCI: 00:15.0 init finished in 5972 usecs
1581 21:57:54.775946 PCI: 00:15.1 init ...
1582 21:57:54.779322 DW I2C bus 1 at 0xd1220000 (400 KHz)
1583 21:57:54.785914 PCI: 00:15.1 init finished in 5975 usecs
1584 21:57:54.789101 PCI: 00:16.0 init ...
1585 21:57:54.792197 PCI: 00:16.0 init finished in 2252 usecs
1586 21:57:54.795286 PCI: 00:19.0 init ...
1587 21:57:54.798811 DW I2C bus 4 at 0xd1222000 (400 KHz)
1588 21:57:54.801808 PCI: 00:19.0 init finished in 5974 usecs
1589 21:57:54.805358 PCI: 00:1d.0 init ...
1590 21:57:54.808325 Initializing PCH PCIe bridge.
1591 21:57:54.811915 PCI: 00:1d.0 init finished in 5274 usecs
1592 21:57:54.815607 PCI: 00:1f.0 init ...
1593 21:57:54.818642 IOAPIC: Initializing IOAPIC at 0xfec00000
1594 21:57:54.825285 IOAPIC: Bootstrap Processor Local APIC = 0x00
1595 21:57:54.825365 IOAPIC: ID = 0x02
1596 21:57:54.828478 IOAPIC: Dumping registers
1597 21:57:54.831575 reg 0x0000: 0x02000000
1598 21:57:54.835133 reg 0x0001: 0x00770020
1599 21:57:54.838326 reg 0x0002: 0x00000000
1600 21:57:54.841522 PCI: 00:1f.0 init finished in 23528 usecs
1601 21:57:54.844713 PCI: 00:1f.4 init ...
1602 21:57:54.847876 PCI: 00:1f.4 init finished in 2261 usecs
1603 21:57:54.859718 PCI: 01:00.0 init ...
1604 21:57:54.862987 PCI: 01:00.0 init finished in 2251 usecs
1605 21:57:54.867506 PNP: 0c09.0 init ...
1606 21:57:54.870587 Google Chrome EC uptime: 11.153 seconds
1607 21:57:54.877185 Google Chrome AP resets since EC boot: 0
1608 21:57:54.880613 Google Chrome most recent AP reset causes:
1609 21:57:54.886813 Google Chrome EC reset flags at last EC boot: reset-pin
1610 21:57:54.890269 PNP: 0c09.0 init finished in 20548 usecs
1611 21:57:54.893387 Devices initialized
1612 21:57:54.896469 Show all devs... After init.
1613 21:57:54.896560 Root Device: enabled 1
1614 21:57:54.899896 CPU_CLUSTER: 0: enabled 1
1615 21:57:54.902832 DOMAIN: 0000: enabled 1
1616 21:57:54.906377 APIC: 00: enabled 1
1617 21:57:54.906464 PCI: 00:00.0: enabled 1
1618 21:57:54.909369 PCI: 00:02.0: enabled 1
1619 21:57:54.913108 PCI: 00:04.0: enabled 0
1620 21:57:54.913191 PCI: 00:05.0: enabled 0
1621 21:57:54.916261
1622 21:57:54.916340 PCI: 00:12.0: enabled 1
1623 21:57:54.919250 PCI: 00:12.5: enabled 0
1624 21:57:54.922868 PCI: 00:12.6: enabled 0
1625 21:57:54.922947 PCI: 00:14.0: enabled 1
1626 21:57:54.926143 PCI: 00:14.1: enabled 0
1627 21:57:54.929454 PCI: 00:14.3: enabled 1
1628 21:57:54.932447 PCI: 00:14.5: enabled 0
1629 21:57:54.932532 PCI: 00:15.0: enabled 1
1630 21:57:54.935612 PCI: 00:15.1: enabled 1
1631 21:57:54.938744 PCI: 00:15.2: enabled 0
1632 21:57:54.942362 PCI: 00:15.3: enabled 0
1633 21:57:54.942447 PCI: 00:16.0: enabled 1
1634 21:57:54.945487 PCI: 00:16.1: enabled 0
1635 21:57:54.948599 PCI: 00:16.2: enabled 0
1636 21:57:54.951756 PCI: 00:16.3: enabled 0
1637 21:57:54.951838 PCI: 00:16.4: enabled 0
1638 21:57:54.955368 PCI: 00:16.5: enabled 0
1639 21:57:54.958508 PCI: 00:17.0: enabled 1
1640 21:57:54.961536 PCI: 00:19.0: enabled 1
1641 21:57:54.961618 PCI: 00:19.1: enabled 0
1642 21:57:54.964715 PCI: 00:19.2: enabled 0
1643 21:57:54.968286 PCI: 00:1a.0: enabled 0
1644 21:57:54.971249 PCI: 00:1c.0: enabled 0
1645 21:57:54.971336 PCI: 00:1c.1: enabled 0
1646 21:57:54.975121 PCI: 00:1c.2: enabled 0
1647 21:57:54.978217 PCI: 00:1c.3: enabled 0
1648 21:57:54.981281 PCI: 00:1c.4: enabled 0
1649 21:57:54.981361 PCI: 00:1c.5: enabled 0
1650 21:57:54.984790 PCI: 00:1c.6: enabled 0
1651 21:57:54.987883 PCI: 00:1c.7: enabled 0
1652 21:57:54.990928 PCI: 00:1d.0: enabled 1
1653 21:57:54.991005 PCI: 00:1d.1: enabled 0
1654 21:57:54.994561 PCI: 00:1d.2: enabled 0
1655 21:57:54.997690 PCI: 00:1d.3: enabled 0
1656 21:57:55.001202 PCI: 00:1d.4: enabled 0
1657 21:57:55.001290 PCI: 00:1d.5: enabled 0
1658 21:57:55.004257 PCI: 00:1e.0: enabled 1
1659 21:57:55.007690 PCI: 00:1e.1: enabled 0
1660 21:57:55.010643 PCI: 00:1e.2: enabled 1
1661 21:57:55.010729 PCI: 00:1e.3: enabled 1
1662 21:57:55.014159 PCI: 00:1f.0: enabled 1
1663 21:57:55.017294 PCI: 00:1f.1: enabled 0
1664 21:57:55.020355 PCI: 00:1f.2: enabled 0
1665 21:57:55.020442 PCI: 00:1f.3: enabled 1
1666 21:57:55.023849 PCI: 00:1f.4: enabled 1
1667 21:57:55.026880 PCI: 00:1f.5: enabled 1
1668 21:57:55.030095 PCI: 00:1f.6: enabled 0
1669 21:57:55.030182 USB0 port 0: enabled 1
1670 21:57:55.033640 I2C: 01:15: enabled 1
1671 21:57:55.036791 I2C: 02:5d: enabled 1
1672 21:57:55.036877 GENERIC: 0.0: enabled 1
1673 21:57:55.040340 I2C: 03:1a: enabled 1
1674 21:57:55.043538 I2C: 03:38: enabled 1
1675 21:57:55.043619 I2C: 03:39: enabled 1
1676 21:57:55.046682 I2C: 03:3a: enabled 1
1677 21:57:55.049909 I2C: 03:3b: enabled 1
1678 21:57:55.052942 PCI: 00:00.0: enabled 1
1679 21:57:55.053035 SPI: 00: enabled 1
1680 21:57:55.056170 SPI: 01: enabled 1
1681 21:57:55.056249 PNP: 0c09.0: enabled 1
1682 21:57:55.059774 USB2 port 0: enabled 1
1683 21:57:55.062903 USB2 port 1: enabled 1
1684 21:57:55.066041 USB2 port 2: enabled 0
1685 21:57:55.066121 USB2 port 3: enabled 0
1686 21:57:55.069206 USB2 port 5: enabled 0
1687 21:57:55.072631 USB2 port 6: enabled 1
1688 21:57:55.072723 USB2 port 9: enabled 1
1689 21:57:55.075749
1690 21:57:55.075830 USB3 port 0: enabled 1
1691 21:57:55.078982 USB3 port 1: enabled 1
1692 21:57:55.082434 USB3 port 2: enabled 1
1693 21:57:55.082518 USB3 port 3: enabled 1
1694 21:57:55.085388 USB3 port 4: enabled 0
1695 21:57:55.089014 APIC: 03: enabled 1
1696 21:57:55.089096 APIC: 01: enabled 1
1697 21:57:55.092094 APIC: 02: enabled 1
1698 21:57:55.095220 APIC: 05: enabled 1
1699 21:57:55.095302 APIC: 04: enabled 1
1700 21:57:55.098733 APIC: 06: enabled 1
1701 21:57:55.098812 APIC: 07: enabled 1
1702 21:57:55.101705 PCI: 00:08.0: enabled 1
1703 21:57:55.105198 PCI: 00:14.2: enabled 1
1704 21:57:55.108783 PCI: 01:00.0: enabled 1
1705 21:57:55.111689 Disabling ACPI via APMC:
1706 21:57:55.115165 done.
1707 21:57:55.118295 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1708 21:57:55.121821 ELOG: NV offset 0xaf0000 size 0x4000
1709 21:57:55.128429 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1710 21:57:55.135267 ELOG: Event(17) added with size 13 at 2023-01-29 21:57:55 UTC
1711 21:57:55.141978 ELOG: Event(92) added with size 9 at 2023-01-29 21:57:55 UTC
1712 21:57:55.148330 ELOG: Event(93) added with size 9 at 2023-01-29 21:57:55 UTC
1713 21:57:55.154745 ELOG: Event(9A) added with size 9 at 2023-01-29 21:57:55 UTC
1714 21:57:55.161206 ELOG: Event(9E) added with size 10 at 2023-01-29 21:57:55 UTC
1715 21:57:55.167901 ELOG: Event(9F) added with size 14 at 2023-01-29 21:57:55 UTC
1716 21:57:55.174570 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1717 21:57:55.180788 ELOG: Event(A1) added with size 10 at 2023-01-29 21:57:55 UTC
1718 21:57:55.187767 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1719 21:57:55.193931 ELOG: Event(A0) added with size 9 at 2023-01-29 21:57:55 UTC
1720 21:57:55.197421 elog_add_boot_reason: Logged dev mode boot
1721 21:57:55.200476 Finalize devices...
1722 21:57:55.204089 PCI: 00:17.0 final
1723 21:57:55.204172 Devices finalized
1724 21:57:55.210243 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1725 21:57:55.213784 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1726 21:57:55.220125 ME: HFSTS1 : 0x90000245
1727 21:57:55.223284 ME: HFSTS2 : 0x3B850126
1728 21:57:55.226750 ME: HFSTS3 : 0x00000020
1729 21:57:55.230325 ME: HFSTS4 : 0x00004800
1730 21:57:55.236687 ME: HFSTS5 : 0x00000000
1731 21:57:55.239866 ME: HFSTS6 : 0x40400006
1732 21:57:55.242960 ME: Manufacturing Mode : NO
1733 21:57:55.246135 ME: FW Partition Table : OK
1734 21:57:55.249797 ME: Bringup Loader Failure : NO
1735 21:57:55.252857 ME: Firmware Init Complete : YES
1736 21:57:55.256022 ME: Boot Options Present : NO
1737 21:57:55.259303 ME: Update In Progress : NO
1738 21:57:55.262909 ME: D0i3 Support : YES
1739 21:57:55.266106 ME: Low Power State Enabled : NO
1740 21:57:55.269288 ME: CPU Replaced : NO
1741 21:57:55.272397 ME: CPU Replacement Valid : YES
1742 21:57:55.275755 ME: Current Working State : 5
1743 21:57:55.278912 ME: Current Operation State : 1
1744 21:57:55.282157 ME: Current Operation Mode : 0
1745 21:57:55.285722 ME: Error Code : 0
1746 21:57:55.288655 ME: CPU Debug Disabled : YES
1747 21:57:55.292205 ME: TXT Support : NO
1748 21:57:55.298850 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1749 21:57:55.301792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1750 21:57:55.305274 CBFS @ c08000 size 3f8000
1751 21:57:55.311968 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1752 21:57:55.314983 CBFS: Locating 'fallback/dsdt.aml'
1753 21:57:55.318345 CBFS: Found @ offset 10bb80 size 3fa5
1754 21:57:55.324773 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 21:57:55.327877 CBFS @ c08000 size 3f8000
1756 21:57:55.331474 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 21:57:55.334625 CBFS: Locating 'fallback/slic'
1758 21:57:55.339390 CBFS: 'fallback/slic' not found.
1759 21:57:55.342456
1760 21:57:55.346203 ACPI: Writing ACPI tables at 99b3e000.
1761 21:57:55.346294 ACPI: * FACS
1762 21:57:55.349269 ACPI: * DSDT
1763 21:57:55.352414 Ramoops buffer: 0x100000@0x99a3d000.
1764 21:57:55.355566 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1765 21:57:55.362404 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1766 21:57:55.365435 Google Chrome EC: version:
1767 21:57:55.368686 ro: helios_v2.0.2659-56403530b
1768 21:57:55.371838 rw: helios_v2.0.2849-c41de27e7d
1769 21:57:55.371922 running image: 1
1770 21:57:55.376869 ACPI: * FADT
1771 21:57:55.376954 SCI is IRQ9
1772 21:57:55.382970 ACPI: added table 1/32, length now 40
1773 21:57:55.383055 ACPI: * SSDT
1774 21:57:55.386593 Found 1 CPU(s) with 8 core(s) each.
1775 21:57:55.389648 Error: Could not locate 'wifi_sar' in VPD.
1776 21:57:55.393209
1777 21:57:55.396289 Checking CBFS for default SAR values
1778 21:57:55.399455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1779 21:57:55.402601 CBFS @ c08000 size 3f8000
1780 21:57:55.409210 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1781 21:57:55.412279 CBFS: Locating 'wifi_sar_defaults.hex'
1782 21:57:55.415733 CBFS: Found @ offset 5fac0 size 77
1783 21:57:55.418723 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1784 21:57:55.425598 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1785 21:57:55.428564 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1786 21:57:55.435307 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1787 21:57:55.438375 failed to find key in VPD: dsm_calib_r0_0
1788 21:57:55.448276 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1789 21:57:55.454625 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1790 21:57:55.457804 failed to find key in VPD: dsm_calib_r0_1
1791 21:57:55.467860 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1792 21:57:55.471005 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1793 21:57:55.474310 failed to find key in VPD: dsm_calib_r0_2
1794 21:57:55.477419
1795 21:57:55.484465 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1796 21:57:55.490665 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1797 21:57:55.493733 failed to find key in VPD: dsm_calib_r0_3
1798 21:57:55.503568 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1799 21:57:55.510115 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1800 21:57:55.513111 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1801 21:57:55.516668 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1802 21:57:55.519737 EC returned error result code 1
1803 21:57:55.523232 EC returned error result code 1
1804 21:57:55.526248
1805 21:57:55.529827 EC returned error result code 1
1806 21:57:55.532803 PS2K: Bad resp from EC. Vivaldi disabled!
1807 21:57:55.539531 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1808 21:57:55.545847 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1809 21:57:55.549454 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1810 21:57:55.552606 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1811 21:57:55.555777
1812 21:57:55.559385 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1813 21:57:55.565772 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1814 21:57:55.572504 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1815 21:57:55.578844 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1816 21:57:55.582385 ACPI: added table 2/32, length now 44
1817 21:57:55.582481 ACPI: * MCFG
1818 21:57:55.588626 ACPI: added table 3/32, length now 48
1819 21:57:55.588712 ACPI: * TPM2
1820 21:57:55.591729 TPM2 log created at 99a2d000
1821 21:57:55.595236 ACPI: added table 4/32, length now 52
1822 21:57:55.598350 ACPI: * MADT
1823 21:57:55.598437 SCI is IRQ9
1824 21:57:55.601405 ACPI: added table 5/32, length now 56
1825 21:57:55.604949 current = 99b43ac0
1826 21:57:55.605034 ACPI: * DMAR
1827 21:57:55.608150 ACPI: added table 6/32, length now 60
1828 21:57:55.611210 ACPI: * IGD OpRegion
1829 21:57:55.614761 GMA: Found VBT in CBFS
1830 21:57:55.617782 GMA: Found valid VBT in CBFS
1831 21:57:55.621285 ACPI: added table 7/32, length now 64
1832 21:57:55.621396 ACPI: * HPET
1833 21:57:55.627907 ACPI: added table 8/32, length now 68
1834 21:57:55.627990 ACPI: done.
1835 21:57:55.630925 ACPI tables: 31744 bytes.
1836 21:57:55.634467 smbios_write_tables: 99a2c000
1837 21:57:55.637973 EC returned error result code 3
1838 21:57:55.640983 Couldn't obtain OEM name from CBI
1839 21:57:55.644186 Create SMBIOS type 17
1840 21:57:55.647800 PCI: 00:00.0 (Intel Cannonlake)
1841 21:57:55.647883 PCI: 00:14.3 (Intel WiFi)
1842 21:57:55.650886 SMBIOS tables: 939 bytes.
1843 21:57:55.657241 Writing table forward entry at 0x00000500
1844 21:57:55.660861 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1845 21:57:55.667236 Writing coreboot table at 0x99b62000
1846 21:57:55.670414 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1847 21:57:55.677230 1. 0000000000001000-000000000009ffff: RAM
1848 21:57:55.680380 2. 00000000000a0000-00000000000fffff: RESERVED
1849 21:57:55.683381 3. 0000000000100000-0000000099a2bfff: RAM
1850 21:57:55.689859 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1851 21:57:55.696496 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1852 21:57:55.703140 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1853 21:57:55.706258 7. 000000009a000000-000000009f7fffff: RESERVED
1854 21:57:55.709800 8. 00000000e0000000-00000000efffffff: RESERVED
1855 21:57:55.716344 9. 00000000fc000000-00000000fc000fff: RESERVED
1856 21:57:55.719382 10. 00000000fe000000-00000000fe00ffff: RESERVED
1857 21:57:55.726076 11. 00000000fed10000-00000000fed17fff: RESERVED
1858 21:57:55.729085 12. 00000000fed80000-00000000fed83fff: RESERVED
1859 21:57:55.735932 13. 00000000fed90000-00000000fed91fff: RESERVED
1860 21:57:55.738866 14. 00000000feda0000-00000000feda1fff: RESERVED
1861 21:57:55.742219 15. 0000000100000000-000000045e7fffff: RAM
1862 21:57:55.745323
1863 21:57:55.749001 Graphics framebuffer located at 0xc0000000
1864 21:57:55.752204 Passing 5 GPIOs to payload:
1865 21:57:55.755336 NAME | PORT | POLARITY | VALUE
1866 21:57:55.762161 write protect | undefined | high | low
1867 21:57:55.765386 lid | undefined | high | high
1868 21:57:55.768476
1869 21:57:55.771605 power | undefined | high | low
1870 21:57:55.777923 oprom | undefined | high | low
1871 21:57:55.781576 EC in RW | 0x000000cb | high | low
1872 21:57:55.784565 Board ID: 4
1873 21:57:55.787976 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 21:57:55.791163 CBFS @ c08000 size 3f8000
1875 21:57:55.797762 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1876 21:57:55.804491 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56
1877 21:57:55.807525 coreboot table: 1492 bytes.
1878 21:57:55.810705 IMD ROOT 0. 99fff000 00001000
1879 21:57:55.814282 IMD SMALL 1. 99ffe000 00001000
1880 21:57:55.817192 FSP MEMORY 2. 99c4e000 003b0000
1881 21:57:55.820859 CONSOLE 3. 99c2e000 00020000
1882 21:57:55.823859 FMAP 4. 99c2d000 0000054e
1883 21:57:55.827287 TIME STAMP 5. 99c2c000 00000910
1884 21:57:55.830387 VBOOT WORK 6. 99c18000 00014000
1885 21:57:55.833394 MRC DATA 7. 99c16000 00001958
1886 21:57:55.837103 ROMSTG STCK 8. 99c15000 00001000
1887 21:57:55.840008 AFTER CAR 9. 99c0b000 0000a000
1888 21:57:55.843531 RAMSTAGE 10. 99baf000 0005c000
1889 21:57:55.846654 REFCODE 11. 99b7a000 00035000
1890 21:57:55.849814 SMM BACKUP 12. 99b6a000 00010000
1891 21:57:55.852964 COREBOOT 13. 99b62000 00008000
1892 21:57:55.856588 ACPI 14. 99b3e000 00024000
1893 21:57:55.859753 ACPI GNVS 15. 99b3d000 00001000
1894 21:57:55.862835 RAMOOPS 16. 99a3d000 00100000
1895 21:57:55.866411 TPM2 TCGLOG17. 99a2d000 00010000
1896 21:57:55.869615 SMBIOS 18. 99a2c000 00000800
1897 21:57:55.872761 IMD small region:
1898 21:57:55.875848 IMD ROOT 0. 99ffec00 00000400
1899 21:57:55.879399 FSP RUNTIME 1. 99ffebe0 00000004
1900 21:57:55.882592 EC HOSTEVENT 2. 99ffebc0 00000008
1901 21:57:55.885738 POWER STATE 3. 99ffeb80 00000040
1902 21:57:55.889074 ROMSTAGE 4. 99ffeb60 00000004
1903 21:57:55.892251 MEM INFO 5. 99ffe9a0 000001b9
1904 21:57:55.895349 VPD 6. 99ffe920 0000006c
1905 21:57:55.898856 MTRR: Physical address space:
1906 21:57:55.905431 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1907 21:57:55.911685 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1908 21:57:55.918128 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1909 21:57:55.924629 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1910 21:57:55.931598 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1911 21:57:55.934610 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1912 21:57:55.938240
1913 21:57:55.941345 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1914 21:57:55.947803 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 21:57:55.950885 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 21:57:55.954525 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 21:57:55.957740 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 21:57:55.964015 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 21:57:55.967231 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 21:57:55.970886 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 21:57:55.973981 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 21:57:55.980275 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 21:57:55.983896 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 21:57:55.987009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 21:57:55.990227 call enable_fixed_mtrr()
1926 21:57:55.993474 CPU physical address size: 39 bits
1927 21:57:56.000197 MTRR: default type WB/UC MTRR counts: 6/8.
1928 21:57:56.003372 MTRR: WB selected as default type.
1929 21:57:56.009914 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1930 21:57:56.012957 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1931 21:57:56.016572
1932 21:57:56.019674 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1933 21:57:56.026160 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1934 21:57:56.032731 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1935 21:57:56.039251 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1936 21:57:56.045904 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 21:57:56.048890 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 21:57:56.052086 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 21:57:56.055681 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 21:57:56.061921 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 21:57:56.065108 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 21:57:56.068752 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 21:57:56.071903 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 21:57:56.078248 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 21:57:56.081304 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 21:57:56.084531 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 21:57:56.084615
1948 21:57:56.088233 MTRR check
1949 21:57:56.088314 call enable_fixed_mtrr()
1950 21:57:56.091268 Fixed MTRRs : Enabled
1951 21:57:56.094575 Variable MTRRs: Enabled
1952 21:57:56.094662
1953 21:57:56.097777 CPU physical address size: 39 bits
1954 21:57:56.104376 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1955 21:57:56.107855 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 21:57:56.110939 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 21:57:56.117698 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 21:57:56.120791 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 21:57:56.123880 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 21:57:56.127330 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 21:57:56.133900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 21:57:56.137286 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 21:57:56.140394 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 21:57:56.143521 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 21:57:56.150157 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 21:57:56.153213 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 21:57:56.156443 call enable_fixed_mtrr()
1968 21:57:56.160042 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 21:57:56.163236 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 21:57:56.166346 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 21:57:56.170113
1972 21:57:56.173208 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 21:57:56.176374 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 21:57:56.179464 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 21:57:56.182645 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 21:57:56.186370
1977 21:57:56.189372 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 21:57:56.192747 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 21:57:56.196189 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 21:57:56.199254 CPU physical address size: 39 bits
1981 21:57:56.202874 call enable_fixed_mtrr()
1982 21:57:56.209331 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1983 21:57:56.212415 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 21:57:56.215936 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 21:57:56.222096 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 21:57:56.225663 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 21:57:56.229147 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 21:57:56.232164 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 21:57:56.238703 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 21:57:56.241711 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 21:57:56.245351 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 21:57:56.248391 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 21:57:56.254888 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 21:57:56.258484 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 21:57:56.261695 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 21:57:56.264793 call enable_fixed_mtrr()
1997 21:57:56.267936 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 21:57:56.271108 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 21:57:56.277849 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 21:57:56.280981 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 21:57:56.284142 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 21:57:56.287839 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 21:57:56.294114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 21:57:56.297507 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 21:57:56.300500 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 21:57:56.304154 CPU physical address size: 39 bits
2007 21:57:56.307189 call enable_fixed_mtrr()
2008 21:57:56.310652 CBFS @ c08000 size 3f8000
2009 21:57:56.316848 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2010 21:57:56.320358 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 21:57:56.323396 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 21:57:56.330333 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 21:57:56.333497 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 21:57:56.336613 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 21:57:56.340009 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 21:57:56.346304 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 21:57:56.349439 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 21:57:56.352950 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 21:57:56.355865 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 21:57:56.362793 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 21:57:56.365867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 21:57:56.369005 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 21:57:56.372742 call enable_fixed_mtrr()
2024 21:57:56.375869 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 21:57:56.379041 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 21:57:56.385342 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 21:57:56.389015 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 21:57:56.392256 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 21:57:56.395316 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 21:57:56.401634 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 21:57:56.405309 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 21:57:56.408354 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 21:57:56.411762 CPU physical address size: 39 bits
2034 21:57:56.414801 call enable_fixed_mtrr()
2035 21:57:56.418468 CPU physical address size: 39 bits
2036 21:57:56.421497 CPU physical address size: 39 bits
2037 21:57:56.424606 CBFS: Locating 'fallback/payload'
2038 21:57:56.431201 CPU physical address size: 39 bits
2039 21:57:56.434678 CBFS: Found @ offset 1c96c0 size 3f798
2040 21:57:56.437828 Checking segment from ROM address 0xffdd16f8
2041 21:57:56.441296 Checking segment from ROM address 0xffdd1714
2042 21:57:56.447406 Loading segment from ROM address 0xffdd16f8
2043 21:57:56.451206 code (compression=0)
2044 21:57:56.457217 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2045 21:57:56.467237 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2046 21:57:56.467365 it's not compressed!
2047 21:57:56.560628 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2048 21:57:56.567020 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2049 21:57:56.570146 Loading segment from ROM address 0xffdd1714
2050 21:57:56.573859
2051 21:57:56.573973 Entry Point 0x30000000
2052 21:57:56.576909 Loaded segments
2053 21:57:56.582604 Finalizing chipset.
2054 21:57:56.585772 Finalizing SMM.
2055 21:57:56.589454 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2056 21:57:56.592608 mp_park_aps done after 0 msecs.
2057 21:57:56.598884 Jumping to boot code at 30000000(99b62000)
2058 21:57:56.605326 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2059 21:57:56.605444
2060 21:57:56.605547
2061 21:57:56.605644
2062 21:57:56.608900 Starting depthcharge on Helios...
2063 21:57:56.609014
2064 21:57:56.609439 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2065 21:57:56.609589 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2066 21:57:56.609713 Setting prompt string to ['hatch:']
2067 21:57:56.609830 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2068 21:57:56.618722 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2069 21:57:56.618842
2070 21:57:56.625234 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2071 21:57:56.625352
2072 21:57:56.631627 board_setup: Info: eMMC controller not present; skipping
2073 21:57:56.631748
2074 21:57:56.635187 New NVMe Controller 0x30053ac0 @ 00:1d:00
2075 21:57:56.635302
2076 21:57:56.641611 board_setup: Info: SDHCI controller not present; skipping
2077 21:57:56.641735
2078 21:57:56.648085 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2079 21:57:56.648203
2080 21:57:56.648304 Wipe memory regions:
2081 21:57:56.648402
2082 21:57:56.654734 [0x00000000001000, 0x000000000a0000)
2083 21:57:56.654855
2084 21:57:56.657818 [0x00000000100000, 0x00000030000000)
2085 21:57:56.657934
2086 21:57:56.721872 [0x00000030657430, 0x00000099a2c000)
2087 21:57:56.722011
2088 21:57:56.855388 [0x00000100000000, 0x0000045e800000)
2089 21:57:56.855524
2090 21:57:58.774071 R8152: Initializing
2091 21:57:58.774228
2092 21:57:58.777118 Version 6 (ocp_data = 5c30)
2093 21:57:58.777210
2094 21:57:58.780262 R8152: Done initializing
2095 21:57:58.780349
2096 21:57:58.783901 Adding net device
2097 21:57:58.783988
2098 21:57:58.790758 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2099 21:57:58.790857
2100 21:57:58.790929
2101 21:57:58.790993
2102 21:57:58.791279 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2104 21:57:58.892023 hatch: tftpboot 192.168.201.1 8926115/tftp-deploy-lwgg61w0/kernel/bzImage 8926115/tftp-deploy-lwgg61w0/kernel/cmdline 8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
2105 21:57:58.892194 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2106 21:57:58.892282 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2107 21:57:58.896031 tftpboot 192.168.201.1 8926115/tftp-deploy-lwgg61w0/kernel/bzIoy-lwgg61w0/kernel/cmdline 8926115/tftp-deploy-lwgg61w0/ramdisk/ramdisk.cpio.gz
2108 21:57:58.896143
2109 21:57:58.896211 Waiting for link
2110 21:57:58.896276
2111 21:57:59.096844 done.
2112 21:57:59.097002
2113 21:57:59.097075 MAC: 00:24:32:50:21:91
2114 21:57:59.097140
2115 21:57:59.100071 Sending DHCP discover... done.
2116 21:57:59.100156
2117 21:57:59.103623 Waiting for reply... done.
2118 21:57:59.103724
2119 21:57:59.106642 Sending DHCP request... done.
2120 21:57:59.106721
2121 21:57:59.110337 Waiting for reply... done.
2122 21:57:59.110416
2123 21:57:59.113525 My ip is 192.168.201.14
2124 21:57:59.113601
2125 21:57:59.116736 The DHCP server ip is 192.168.201.1
2126 21:57:59.116822
2127 21:57:59.119840 TFTP server IP predefined by user: 192.168.201.1
2128 21:57:59.119927
2129 21:57:59.126164 Bootfile predefined by user: 8926115/tftp-deploy-lwgg61w0/kernel/bzImage
2130 21:57:59.129751
2131 21:57:59.132861 Sending tftp read request... done.
2132 21:57:59.132942
2133 21:57:59.136630 Waiting for the transfer...
2134 21:57:59.136711
2135 21:57:59.672073 00000000 ################################################################
2136 21:57:59.672216
2137 21:58:00.201226 00080000 ################################################################
2138 21:58:00.201404
2139 21:58:00.725814 00100000 ################################################################
2140 21:58:00.725963
2141 21:58:01.247183 00180000 ################################################################
2142 21:58:01.247334
2143 21:58:01.779173 00200000 ################################################################
2144 21:58:01.779329
2145 21:58:02.310645 00280000 ################################################################
2146 21:58:02.310797
2147 21:58:02.841485 00300000 ################################################################
2148 21:58:02.841638
2149 21:58:03.374600 00380000 ################################################################
2150 21:58:03.374750
2151 21:58:03.908825 00400000 ################################################################
2152 21:58:03.908990
2153 21:58:04.535785 00480000 ################################################################
2154 21:58:04.536193
2155 21:58:05.103398 00500000 ################################################################
2156 21:58:05.103538
2157 21:58:05.635223 00580000 ################################################################
2158 21:58:05.635364
2159 21:58:06.179689 00600000 ################################################################
2160 21:58:06.179830
2161 21:58:06.723667 00680000 ################################################################
2162 21:58:06.723889
2163 21:58:07.262425 00700000 ################################################################
2164 21:58:07.262568
2165 21:58:07.839616 00780000 ################################################################
2166 21:58:07.839754
2167 21:58:08.427149 00800000 ################################################################
2168 21:58:08.427287
2169 21:58:08.983527 00880000 ################################################################
2170 21:58:08.983665
2171 21:58:09.263478 00900000 ################################## done.
2172 21:58:09.263617
2173 21:58:09.266447 The bootfile was 9707520 bytes long.
2174 21:58:09.266534
2175 21:58:09.270186 Sending tftp read request... done.
2176 21:58:09.270271
2177 21:58:09.273334 Waiting for the transfer...
2178 21:58:09.273420
2179 21:58:09.824127 00000000 ################################################################
2180 21:58:09.824266
2181 21:58:10.338738 00080000 ################################################################
2182 21:58:10.338879
2183 21:58:10.891735 00100000 ################################################################
2184 21:58:10.891877
2185 21:58:11.417135 00180000 ################################################################
2186 21:58:11.417273
2187 21:58:11.952257 00200000 ################################################################
2188 21:58:11.952398
2189 21:58:12.515217 00280000 ################################################################
2190 21:58:12.515350
2191 21:58:13.064382 00300000 ################################################################
2192 21:58:13.064531
2193 21:58:13.612740 00380000 ################################################################
2194 21:58:13.612885
2195 21:58:14.148118 00400000 ################################################################
2196 21:58:14.148257
2197 21:58:14.695099 00480000 ################################################################
2198 21:58:14.695307
2199 21:58:14.973886 00500000 ################################### done.
2200 21:58:14.974029
2201 21:58:14.977002 Sending tftp read request... done.
2202 21:58:14.977089
2203 21:58:14.980098 Waiting for the transfer...
2204 21:58:14.980187
2205 21:58:14.983723 00000000 # done.
2206 21:58:14.983811
2207 21:58:14.990005 Command line loaded dynamically from TFTP file: 8926115/tftp-deploy-lwgg61w0/kernel/cmdline
2208 21:58:14.990092
2209 21:58:15.012869 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8926115/extract-nfsrootfs-ugxtksh8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2210 21:58:15.012976
2211 21:58:15.019541 ec_init(0): CrosEC protocol v3 supported (256, 256)
2212 21:58:15.019629
2213 21:58:15.027829 Shutting down all USB controllers.
2214 21:58:15.027917
2215 21:58:15.032173 Removing current net device
2216 21:58:15.032258
2217 21:58:15.035795 Finalizing coreboot
2218 21:58:15.035881
2219 21:58:15.042440 Exiting depthcharge with code 4 at timestamp: 25756707
2220 21:58:15.042528
2221 21:58:15.042595
2222 21:58:15.042662 Starting kernel ...
2223 21:58:15.042722
2224 21:58:15.042780
2225 21:58:15.042837
2226 21:58:15.043205 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2227 21:58:15.043304 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2228 21:58:15.043381 Setting prompt string to ['Linux version [0-9]']
2229 21:58:15.043451 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2230 21:58:15.043521 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2232 22:02:37.044232 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2234 22:02:37.045285 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2236 22:02:37.046103 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2239 22:02:37.047427 end: 2 depthcharge-action (duration 00:05:00) [common]
2241 22:02:37.048551 Cleaning after the job
2242 22:02:37.048977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/ramdisk
2243 22:02:37.049661 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/kernel
2244 22:02:37.050389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/nfsrootfs
2245 22:02:37.087674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8926115/tftp-deploy-lwgg61w0/modules
2246 22:02:37.087980 start: 4.1 power-off (timeout 00:00:30) [common]
2247 22:02:37.088147 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2248 22:02:37.107093 >> Command sent successfully.
2249 22:02:37.108840 Returned 0 in 0 seconds
2250 22:02:37.210084 end: 4.1 power-off (duration 00:00:00) [common]
2252 22:02:37.211572 start: 4.2 read-feedback (timeout 00:10:00) [common]
2253 22:02:37.212744 Listened to connection for namespace 'common' for up to 1s
2254 22:02:38.216491 Finalising connection for namespace 'common'
2255 22:02:38.217260 Disconnecting from shell: Finalise
2256 22:02:38.318696 end: 4.2 read-feedback (duration 00:00:01) [common]
2257 22:02:38.319295 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8926115
2258 22:02:38.486452 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8926115
2259 22:02:38.486654 JobError: Your job cannot terminate cleanly.