Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 10:27:16.779349 lava-dispatcher, installed at version: 2022.11
2 10:27:16.779573 start: 0 validate
3 10:27:16.779722 Start time: 2023-02-10 10:27:16.779714+00:00 (UTC)
4 10:27:16.779865 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:27:16.780007 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
6 10:27:17.074841 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:27:17.075038 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:27:17.077298 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:27:17.077424 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:27:17.080998 validate duration: 0.30
12 10:27:17.081312 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:27:17.081439 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:27:17.081541 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:27:17.081642 Not decompressing ramdisk as can be used compressed.
16 10:27:17.081841 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
17 10:27:17.081918 saving as /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/ramdisk/rootfs.cpio.gz
18 10:27:17.081986 total size: 8423718 (8MB)
19 10:27:17.084947 progress 0% (0MB)
20 10:27:17.088574 progress 5% (0MB)
21 10:27:17.092402 progress 10% (0MB)
22 10:27:17.095735 progress 15% (1MB)
23 10:27:17.099253 progress 20% (1MB)
24 10:27:17.103123 progress 25% (2MB)
25 10:27:17.106770 progress 30% (2MB)
26 10:27:17.110028 progress 35% (2MB)
27 10:27:17.114085 progress 40% (3MB)
28 10:27:17.117322 progress 45% (3MB)
29 10:27:17.121151 progress 50% (4MB)
30 10:27:17.125019 progress 55% (4MB)
31 10:27:17.128301 progress 60% (4MB)
32 10:27:17.132519 progress 65% (5MB)
33 10:27:17.135380 progress 70% (5MB)
34 10:27:17.139036 progress 75% (6MB)
35 10:27:17.142670 progress 80% (6MB)
36 10:27:17.146326 progress 85% (6MB)
37 10:27:17.149969 progress 90% (7MB)
38 10:27:17.153608 progress 95% (7MB)
39 10:27:17.157077 progress 100% (8MB)
40 10:27:17.157267 8MB downloaded in 0.08s (106.72MB/s)
41 10:27:17.157441 end: 1.1.1 http-download (duration 00:00:00) [common]
43 10:27:17.157715 end: 1.1 download-retry (duration 00:00:00) [common]
44 10:27:17.157814 start: 1.2 download-retry (timeout 00:10:00) [common]
45 10:27:17.157911 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 10:27:17.158027 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:27:17.158102 saving as /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/kernel/bzImage
48 10:27:17.158168 total size: 9707520 (9MB)
49 10:27:17.158235 No compression specified
50 10:27:17.160252 progress 0% (0MB)
51 10:27:17.164632 progress 5% (0MB)
52 10:27:17.168856 progress 10% (0MB)
53 10:27:17.172885 progress 15% (1MB)
54 10:27:17.177103 progress 20% (1MB)
55 10:27:17.181364 progress 25% (2MB)
56 10:27:17.185153 progress 30% (2MB)
57 10:27:17.189408 progress 35% (3MB)
58 10:27:17.193817 progress 40% (3MB)
59 10:27:17.198053 progress 45% (4MB)
60 10:27:17.202280 progress 50% (4MB)
61 10:27:17.206268 progress 55% (5MB)
62 10:27:17.210341 progress 60% (5MB)
63 10:27:17.214764 progress 65% (6MB)
64 10:27:17.219103 progress 70% (6MB)
65 10:27:17.223545 progress 75% (6MB)
66 10:27:17.227199 progress 80% (7MB)
67 10:27:17.231233 progress 85% (7MB)
68 10:27:17.235457 progress 90% (8MB)
69 10:27:17.239680 progress 95% (8MB)
70 10:27:17.243946 progress 100% (9MB)
71 10:27:17.244166 9MB downloaded in 0.09s (107.66MB/s)
72 10:27:17.244333 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:27:17.244595 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:27:17.244693 start: 1.3 download-retry (timeout 00:10:00) [common]
76 10:27:17.244788 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 10:27:17.244902 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:27:17.244975 saving as /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/modules/modules.tar
79 10:27:17.245044 total size: 64776 (0MB)
80 10:27:17.245111 Using unxz to decompress xz
81 10:27:17.249309 progress 50% (0MB)
82 10:27:17.249728 progress 100% (0MB)
83 10:27:17.254354 0MB downloaded in 0.01s (6.64MB/s)
84 10:27:17.254593 end: 1.3.1 http-download (duration 00:00:00) [common]
86 10:27:17.254879 end: 1.3 download-retry (duration 00:00:00) [common]
87 10:27:17.254986 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 10:27:17.255093 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 10:27:17.255185 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 10:27:17.255282 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 10:27:17.255469 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_
92 10:27:17.255592 makedir: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin
93 10:27:17.255690 makedir: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/tests
94 10:27:17.255782 makedir: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/results
95 10:27:17.255905 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-add-keys
96 10:27:17.256052 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-add-sources
97 10:27:17.256185 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-background-process-start
98 10:27:17.256310 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-background-process-stop
99 10:27:17.256436 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-common-functions
100 10:27:17.256558 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-echo-ipv4
101 10:27:17.256682 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-install-packages
102 10:27:17.256808 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-installed-packages
103 10:27:17.256928 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-os-build
104 10:27:17.257049 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-probe-channel
105 10:27:17.257173 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-probe-ip
106 10:27:17.257309 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-target-ip
107 10:27:17.257431 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-target-mac
108 10:27:17.257552 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-target-storage
109 10:27:17.257676 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-case
110 10:27:17.257798 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-event
111 10:27:17.257920 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-feedback
112 10:27:17.258041 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-raise
113 10:27:17.258167 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-reference
114 10:27:17.258288 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-runner
115 10:27:17.258408 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-set
116 10:27:17.258535 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-test-shell
117 10:27:17.258659 Updating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-install-packages (oe)
118 10:27:17.258783 Updating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/bin/lava-installed-packages (oe)
119 10:27:17.258894 Creating /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/environment
120 10:27:17.258993 LAVA metadata
121 10:27:17.259070 - LAVA_JOB_ID=9097742
122 10:27:17.259143 - LAVA_DISPATCHER_IP=192.168.201.1
123 10:27:17.259256 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 10:27:17.259328 skipped lava-vland-overlay
125 10:27:17.259414 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 10:27:17.259510 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 10:27:17.259581 skipped lava-multinode-overlay
128 10:27:17.259665 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 10:27:17.259756 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 10:27:17.259840 Loading test definitions
131 10:27:17.259947 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 10:27:17.260029 Using /lava-9097742 at stage 0
133 10:27:17.260317 uuid=9097742_1.4.2.3.1 testdef=None
134 10:27:17.260418 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 10:27:17.260517 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 10:27:17.261055 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 10:27:17.261340 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 10:27:17.261968 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 10:27:17.262237 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 10:27:17.262832 runner path: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/0/tests/0_dmesg test_uuid 9097742_1.4.2.3.1
143 10:27:17.262992 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 10:27:17.263248 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 10:27:17.263329 Using /lava-9097742 at stage 1
147 10:27:17.263602 uuid=9097742_1.4.2.3.5 testdef=None
148 10:27:17.263701 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 10:27:17.263801 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 10:27:17.264293 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 10:27:17.264542 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 10:27:17.265177 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 10:27:17.265448 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 10:27:17.266061 runner path: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/1/tests/1_bootrr test_uuid 9097742_1.4.2.3.5
157 10:27:17.266215 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 10:27:17.266451 Creating lava-test-runner.conf files
160 10:27:17.266523 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/0 for stage 0
161 10:27:17.266612 - 0_dmesg
162 10:27:17.266692 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097742/lava-overlay-t7rb03r_/lava-9097742/1 for stage 1
163 10:27:17.266782 - 1_bootrr
164 10:27:17.266882 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 10:27:17.266976 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 10:27:17.273625 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 10:27:17.273743 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 10:27:17.273843 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 10:27:17.273938 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 10:27:17.274033 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 10:27:17.479813 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 10:27:17.480210 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 10:27:17.480348 extracting modules file /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097742/extract-overlay-ramdisk-_vr65wbu/ramdisk
174 10:27:17.485330 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 10:27:17.485468 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 10:27:17.485578 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097742/compress-overlay-qme7o97s/overlay-1.4.2.4.tar.gz to ramdisk
177 10:27:17.485661 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097742/compress-overlay-qme7o97s/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9097742/extract-overlay-ramdisk-_vr65wbu/ramdisk
178 10:27:17.490320 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 10:27:17.490445 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 10:27:17.490565 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 10:27:17.490671 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 10:27:17.490775 Building ramdisk /var/lib/lava/dispatcher/tmp/9097742/extract-overlay-ramdisk-_vr65wbu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9097742/extract-overlay-ramdisk-_vr65wbu/ramdisk
183 10:27:17.562482 >> 48350 blocks
184 10:27:18.396168 rename /var/lib/lava/dispatcher/tmp/9097742/extract-overlay-ramdisk-_vr65wbu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
185 10:27:18.396615 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 10:27:18.396754 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 10:27:18.396872 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 10:27:18.396976 No mkimage arch provided, not using FIT.
189 10:27:18.397078 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 10:27:18.397176 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 10:27:18.397298 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 10:27:18.397409 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 10:27:18.397498 No LXC device requested
194 10:27:18.397590 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 10:27:18.397693 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 10:27:18.397788 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 10:27:18.397875 Checking files for TFTP limit of 4294967296 bytes.
198 10:27:18.398307 end: 1 tftp-deploy (duration 00:00:01) [common]
199 10:27:18.398433 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 10:27:18.398540 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 10:27:18.398681 substitutions:
202 10:27:18.398756 - {DTB}: None
203 10:27:18.398831 - {INITRD}: 9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
204 10:27:18.398900 - {KERNEL}: 9097742/tftp-deploy-v_x3sqb4/kernel/bzImage
205 10:27:18.398967 - {LAVA_MAC}: None
206 10:27:18.399032 - {PRESEED_CONFIG}: None
207 10:27:18.399097 - {PRESEED_LOCAL}: None
208 10:27:18.399160 - {RAMDISK}: 9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
209 10:27:18.399224 - {ROOT_PART}: None
210 10:27:18.399286 - {ROOT}: None
211 10:27:18.399349 - {SERVER_IP}: 192.168.201.1
212 10:27:18.399412 - {TEE}: None
213 10:27:18.399475 Parsed boot commands:
214 10:27:18.399537 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 10:27:18.399704 Parsed boot commands: tftpboot 192.168.201.1 9097742/tftp-deploy-v_x3sqb4/kernel/bzImage 9097742/tftp-deploy-v_x3sqb4/kernel/cmdline 9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
216 10:27:18.399810 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 10:27:18.399911 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 10:27:18.400017 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 10:27:18.400120 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 10:27:18.400202 Not connected, no need to disconnect.
221 10:27:18.400289 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 10:27:18.400385 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 10:27:18.400461 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
224 10:27:18.403679 Setting prompt string to ['lava-test: # ']
225 10:27:18.404002 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 10:27:18.404128 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 10:27:18.404241 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 10:27:18.404345 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 10:27:18.404788 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
230 10:27:27.758211 >> Command sent successfully.
231 10:27:27.764579 Returned 0 in 9 seconds
232 10:27:27.865731 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 10:27:27.867186 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 10:27:27.867715 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 10:27:27.868157 Setting prompt string to 'Starting depthcharge on Voema...'
237 10:27:27.868503 Changing prompt to 'Starting depthcharge on Voema...'
238 10:27:27.868855 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 10:27:27.870128 [Enter `^Ec?' for help]
240 10:27:27.870612
241 10:27:27.871025
242 10:27:27.871378 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 10:27:27.871812 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 10:27:27.872140 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 10:27:27.872501 CPU: AES supported, TXT NOT supported, VT supported
246 10:27:27.872815 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 10:27:27.873123 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 10:27:27.873464 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 10:27:27.873770 VBOOT: Loading verstage.
250 10:27:27.874072 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 10:27:27.874375 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 10:27:27.874697 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 10:27:27.874998 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 10:27:27.875298 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 10:27:27.875594
256 10:27:27.875887
257 10:27:27.876182 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 10:27:27.876484 Probing TPM: . done!
259 10:27:27.876777 TPM ready after 0 ms
260 10:27:27.877074 Connected to device vid:did:rid of 1ae0:0028:00
261 10:27:27.877410 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 10:27:27.877726 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 10:27:27.878020 Initialized TPM device CR50 revision 0
264 10:27:27.878315 tlcl_send_startup: Startup return code is 0
265 10:27:27.878616 TPM: setup succeeded
266 10:27:27.878910 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 10:27:27.879209 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 10:27:27.879502 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 10:27:27.879796 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 10:27:27.880089 Chrome EC: UHEPI supported
271 10:27:27.880382 Phase 1
272 10:27:27.880675 FMAP: area GBB found @ 1805000 (458752 bytes)
273 10:27:27.880971 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 10:27:27.881299 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 10:27:27.881603 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 10:27:27.881970 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 10:27:27.882273 Recovery requested (1009000e)
278 10:27:27.882565 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 10:27:27.882864 tlcl_extend: response is 0
280 10:27:27.883158 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 10:27:27.883453 tlcl_extend: response is 0
282 10:27:27.883749 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 10:27:27.884044 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 10:27:27.884342 BS: verstage times (exec / console): total (unknown) / 142 ms
285 10:27:27.884694
286 10:27:27.885004
287 10:27:27.885341 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 10:27:27.885645 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 10:27:27.885939 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 10:27:27.886234 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 10:27:27.886529 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 10:27:27.886822 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 10:27:27.887116 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 10:27:27.887406 TCO_STS: 0000 0000
295 10:27:27.887698 GEN_PMCON: d0015038 00002200
296 10:27:27.887989 GBLRST_CAUSE: 00000000 00000000
297 10:27:27.888279 HPR_CAUSE0: 00000000
298 10:27:27.888657 prev_sleep_state 5
299 10:27:27.888971 Boot Count incremented to 13621
300 10:27:27.889303 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 10:27:27.889610 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 10:27:27.889905 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 10:27:27.890201 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 10:27:27.890495 Chrome EC: UHEPI supported
305 10:27:27.890788 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 10:27:27.891085 Probing TPM: done!
307 10:27:27.891374 Connected to device vid:did:rid of 1ae0:0028:00
308 10:27:27.891723 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 10:27:27.892361 Initialized TPM device CR50 revision 0
310 10:27:27.892686 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 10:27:27.892990 MRC: Hash idx 0x100b comparison successful.
312 10:27:27.895624 MRC cache found, size faa8
313 10:27:27.896070 bootmode is set to: 2
314 10:27:27.898044 SPD index = 2
315 10:27:27.905230 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 10:27:27.908210 SPD: module type is LPDDR4X
317 10:27:27.911897 SPD: module part number is MT53D1G64D4NW-046
318 10:27:27.918500 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 10:27:27.921804 SPD: device width 16 bits, bus width 16 bits
320 10:27:27.928155 SPD: module size is 2048 MB (per channel)
321 10:27:28.357274 CBMEM:
322 10:27:28.360640 IMD: root @ 0x76fff000 254 entries.
323 10:27:28.363967 IMD: root @ 0x76ffec00 62 entries.
324 10:27:28.366966 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 10:27:28.373843 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 10:27:28.377492 External stage cache:
327 10:27:28.380879 IMD: root @ 0x7b3ff000 254 entries.
328 10:27:28.383782 IMD: root @ 0x7b3fec00 62 entries.
329 10:27:28.398661 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 10:27:28.405495 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 10:27:28.412252 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 10:27:28.425886 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 10:27:28.432147 cse_lite: Skip switching to RW in the recovery path
334 10:27:28.432587 8 DIMMs found
335 10:27:28.432940 SMM Memory Map
336 10:27:28.438824 SMRAM : 0x7b000000 0x800000
337 10:27:28.442231 Subregion 0: 0x7b000000 0x200000
338 10:27:28.445090 Subregion 1: 0x7b200000 0x200000
339 10:27:28.449099 Subregion 2: 0x7b400000 0x400000
340 10:27:28.449683 top_of_ram = 0x77000000
341 10:27:28.454953 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 10:27:28.461807 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 10:27:28.465098 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 10:27:28.471863 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 10:27:28.478697 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 10:27:28.484896 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 10:27:28.495423 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 10:27:28.502149 Processing 211 relocs. Offset value of 0x74c0b000
349 10:27:28.508503 BS: romstage times (exec / console): total (unknown) / 277 ms
350 10:27:28.514731
351 10:27:28.515263
352 10:27:28.524146 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 10:27:28.527959 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 10:27:28.537865 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 10:27:28.544378 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 10:27:28.550948 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 10:27:28.557302 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 10:27:28.601561 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 10:27:28.607580 Processing 5008 relocs. Offset value of 0x75d98000
360 10:27:28.610688 BS: postcar times (exec / console): total (unknown) / 59 ms
361 10:27:28.614152
362 10:27:28.614694
363 10:27:28.623929 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 10:27:28.624485 Normal boot
365 10:27:28.627580 FW_CONFIG value is 0x804c02
366 10:27:28.630703 PCI: 00:07.0 disabled by fw_config
367 10:27:28.634049 PCI: 00:07.1 disabled by fw_config
368 10:27:28.637358 PCI: 00:0d.2 disabled by fw_config
369 10:27:28.643808 PCI: 00:1c.7 disabled by fw_config
370 10:27:28.647021 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 10:27:28.654021 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 10:27:28.660262 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 10:27:28.663790 GENERIC: 0.0 disabled by fw_config
374 10:27:28.667004 GENERIC: 1.0 disabled by fw_config
375 10:27:28.670641 fw_config match found: DB_USB=USB3_ACTIVE
376 10:27:28.673839 fw_config match found: DB_USB=USB3_ACTIVE
377 10:27:28.680348 fw_config match found: DB_USB=USB3_ACTIVE
378 10:27:28.683651 fw_config match found: DB_USB=USB3_ACTIVE
379 10:27:28.686729 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 10:27:28.697015 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 10:27:28.703169 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 10:27:28.709727 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 10:27:28.716326 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 10:27:28.719622 microcode: Update skipped, already up-to-date
385 10:27:28.726123 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 10:27:28.754844 Detected 4 core, 8 thread CPU.
387 10:27:28.758054 Setting up SMI for CPU
388 10:27:28.761353 IED base = 0x7b400000
389 10:27:28.762029 IED size = 0x00400000
390 10:27:28.764676 Will perform SMM setup.
391 10:27:28.771450 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 10:27:28.777919 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 10:27:28.784654 Processing 16 relocs. Offset value of 0x00030000
394 10:27:28.787823 Attempting to start 7 APs
395 10:27:28.791029 Waiting for 10ms after sending INIT.
396 10:27:28.806671 Waiting for 1st SIPI to complete...AP: slot 6 apic_id 1.
397 10:27:28.807255 done.
398 10:27:28.809727 AP: slot 1 apic_id 5.
399 10:27:28.813689 AP: slot 5 apic_id 4.
400 10:27:28.814273 AP: slot 3 apic_id 6.
401 10:27:28.816624 AP: slot 4 apic_id 7.
402 10:27:28.819602 Waiting for 2nd SIPI to complete...done.
403 10:27:28.823042 AP: slot 2 apic_id 3.
404 10:27:28.826757 AP: slot 7 apic_id 2.
405 10:27:28.833033 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 10:27:28.839451 Processing 13 relocs. Offset value of 0x00038000
407 10:27:28.839894 Unable to locate Global NVS
408 10:27:28.849740 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 10:27:28.852536 Installing permanent SMM handler to 0x7b000000
410 10:27:28.863155 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 10:27:28.866538 Processing 794 relocs. Offset value of 0x7b010000
412 10:27:28.876209 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 10:27:28.879279 Processing 13 relocs. Offset value of 0x7b008000
414 10:27:28.885943 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 10:27:28.893047 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 10:27:28.896201 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 10:27:28.902449 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 10:27:28.909473 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 10:27:28.915894 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 10:27:28.922865 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 10:27:28.923410 Unable to locate Global NVS
422 10:27:28.932170 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 10:27:28.935350 Clearing SMI status registers
424 10:27:28.935799 SMI_STS: PM1
425 10:27:28.938830 PM1_STS: PWRBTN
426 10:27:28.945820 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 10:27:28.948851 In relocation handler: CPU 0
428 10:27:28.952119 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 10:27:28.959164 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 10:27:28.959728 Relocation complete.
431 10:27:28.968919 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
432 10:27:28.969515 In relocation handler: CPU 6
433 10:27:28.975324 New SMBASE=0x7affe800 IEDBASE=0x7b400000
434 10:27:28.975866 Relocation complete.
435 10:27:28.985802 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
436 10:27:28.986354 In relocation handler: CPU 2
437 10:27:28.992258 New SMBASE=0x7afff800 IEDBASE=0x7b400000
438 10:27:28.992803 Relocation complete.
439 10:27:29.001702 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
440 10:27:29.002242 In relocation handler: CPU 7
441 10:27:29.008729 New SMBASE=0x7affe400 IEDBASE=0x7b400000
442 10:27:29.011998 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 10:27:29.015219 Relocation complete.
444 10:27:29.021877 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 10:27:29.025742 In relocation handler: CPU 1
446 10:27:29.028377 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 10:27:29.031816 Relocation complete.
448 10:27:29.038287 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
449 10:27:29.042085 In relocation handler: CPU 5
450 10:27:29.045268 New SMBASE=0x7affec00 IEDBASE=0x7b400000
451 10:27:29.051777 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 10:27:29.052352 Relocation complete.
453 10:27:29.058469 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 10:27:29.061105 In relocation handler: CPU 3
455 10:27:29.068150 New SMBASE=0x7afff400 IEDBASE=0x7b400000
456 10:27:29.071693 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 10:27:29.075028 Relocation complete.
458 10:27:29.081686 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
459 10:27:29.085025 In relocation handler: CPU 4
460 10:27:29.088521 New SMBASE=0x7afff000 IEDBASE=0x7b400000
461 10:27:29.091631 Relocation complete.
462 10:27:29.092172 Initializing CPU #0
463 10:27:29.094594 CPU: vendor Intel device 806c1
464 10:27:29.097652 CPU: family 06, model 8c, stepping 01
465 10:27:29.100901 Clearing out pending MCEs
466 10:27:29.104724 Setting up local APIC...
467 10:27:29.108114 apic_id: 0x00 done.
468 10:27:29.111305 Turbo is available but hidden
469 10:27:29.114761 Turbo is available and visible
470 10:27:29.117911 microcode: Update skipped, already up-to-date
471 10:27:29.121127 CPU #0 initialized
472 10:27:29.121709 Initializing CPU #2
473 10:27:29.124837 Initializing CPU #7
474 10:27:29.127816 CPU: vendor Intel device 806c1
475 10:27:29.131146 CPU: family 06, model 8c, stepping 01
476 10:27:29.134438 CPU: vendor Intel device 806c1
477 10:27:29.137729 CPU: family 06, model 8c, stepping 01
478 10:27:29.140982 Clearing out pending MCEs
479 10:27:29.144510 Clearing out pending MCEs
480 10:27:29.144957 Setting up local APIC...
481 10:27:29.147587 Initializing CPU #4
482 10:27:29.150902 Initializing CPU #3
483 10:27:29.154687 CPU: vendor Intel device 806c1
484 10:27:29.157431 CPU: family 06, model 8c, stepping 01
485 10:27:29.160746 CPU: vendor Intel device 806c1
486 10:27:29.164194 CPU: family 06, model 8c, stepping 01
487 10:27:29.167810 Setting up local APIC...
488 10:27:29.168252 Initializing CPU #6
489 10:27:29.170549 Initializing CPU #5
490 10:27:29.171034 Initializing CPU #1
491 10:27:29.174036 CPU: vendor Intel device 806c1
492 10:27:29.177963 CPU: family 06, model 8c, stepping 01
493 10:27:29.181758 Clearing out pending MCEs
494 10:27:29.185359 Clearing out pending MCEs
495 10:27:29.185804 apic_id: 0x02 done.
496 10:27:29.188759 apic_id: 0x03 done.
497 10:27:29.191928 microcode: Update skipped, already up-to-date
498 10:27:29.198217 microcode: Update skipped, already up-to-date
499 10:27:29.198681 CPU #7 initialized
500 10:27:29.201486 CPU #2 initialized
501 10:27:29.205457 CPU: vendor Intel device 806c1
502 10:27:29.208752 CPU: family 06, model 8c, stepping 01
503 10:27:29.211566 Clearing out pending MCEs
504 10:27:29.215557 Clearing out pending MCEs
505 10:27:29.216104 Setting up local APIC...
506 10:27:29.218804 Setting up local APIC...
507 10:27:29.222101 Setting up local APIC...
508 10:27:29.225086 Setting up local APIC...
509 10:27:29.225672 apic_id: 0x06 done.
510 10:27:29.228705 apic_id: 0x07 done.
511 10:27:29.231786 microcode: Update skipped, already up-to-date
512 10:27:29.238026 microcode: Update skipped, already up-to-date
513 10:27:29.238471 CPU #3 initialized
514 10:27:29.241940 CPU #4 initialized
515 10:27:29.244921 apic_id: 0x04 done.
516 10:27:29.245390 apic_id: 0x05 done.
517 10:27:29.251591 microcode: Update skipped, already up-to-date
518 10:27:29.254597 microcode: Update skipped, already up-to-date
519 10:27:29.258023 CPU #5 initialized
520 10:27:29.258565 CPU #1 initialized
521 10:27:29.261392 CPU: vendor Intel device 806c1
522 10:27:29.264800 CPU: family 06, model 8c, stepping 01
523 10:27:29.268216 Clearing out pending MCEs
524 10:27:29.271614 Setting up local APIC...
525 10:27:29.274870 apic_id: 0x01 done.
526 10:27:29.278017 microcode: Update skipped, already up-to-date
527 10:27:29.281168 CPU #6 initialized
528 10:27:29.284718 bsp_do_flight_plan done after 459 msecs.
529 10:27:29.288226 CPU: frequency set to 4400 MHz
530 10:27:29.288779 Enabling SMIs.
531 10:27:29.294765 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 10:27:29.311580 SATAXPCIE1 indicates PCIe NVMe is present
533 10:27:29.314340 Probing TPM: done!
534 10:27:29.317872 Connected to device vid:did:rid of 1ae0:0028:00
535 10:27:29.328410 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 10:27:29.331979 Initialized TPM device CR50 revision 0
537 10:27:29.335881 Enabling S0i3.4
538 10:27:29.342131 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 10:27:29.344919 Found a VBT of 8704 bytes after decompression
540 10:27:29.352024 cse_lite: CSE RO boot. HybridStorageMode disabled
541 10:27:29.358286 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 10:27:29.433910 FSPS returned 0
543 10:27:29.436854 Executing Phase 1 of FspMultiPhaseSiInit
544 10:27:29.446897 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 10:27:29.450076 port C0 DISC req: usage 1 usb3 1 usb2 5
546 10:27:29.453099 Raw Buffer output 0 00000511
547 10:27:29.456741 Raw Buffer output 1 00000000
548 10:27:29.460299 pmc_send_ipc_cmd succeeded
549 10:27:29.466939 port C1 DISC req: usage 1 usb3 2 usb2 3
550 10:27:29.467392 Raw Buffer output 0 00000321
551 10:27:29.470368 Raw Buffer output 1 00000000
552 10:27:29.474720 pmc_send_ipc_cmd succeeded
553 10:27:29.479859 Detected 4 core, 8 thread CPU.
554 10:27:29.483305 Detected 4 core, 8 thread CPU.
555 10:27:29.683552 Display FSP Version Info HOB
556 10:27:29.686382 Reference Code - CPU = a.0.4c.31
557 10:27:29.689539 uCode Version = 0.0.0.86
558 10:27:29.692897 TXT ACM version = ff.ff.ff.ffff
559 10:27:29.696107 Reference Code - ME = a.0.4c.31
560 10:27:29.699397 MEBx version = 0.0.0.0
561 10:27:29.702645 ME Firmware Version = Consumer SKU
562 10:27:29.705880 Reference Code - PCH = a.0.4c.31
563 10:27:29.709682 PCH-CRID Status = Disabled
564 10:27:29.713167 PCH-CRID Original Value = ff.ff.ff.ffff
565 10:27:29.716637 PCH-CRID New Value = ff.ff.ff.ffff
566 10:27:29.719427 OPROM - RST - RAID = ff.ff.ff.ffff
567 10:27:29.722661 PCH Hsio Version = 4.0.0.0
568 10:27:29.726023 Reference Code - SA - System Agent = a.0.4c.31
569 10:27:29.729209 Reference Code - MRC = 2.0.0.1
570 10:27:29.732567 SA - PCIe Version = a.0.4c.31
571 10:27:29.736341 SA-CRID Status = Disabled
572 10:27:29.739565 SA-CRID Original Value = 0.0.0.1
573 10:27:29.742897 SA-CRID New Value = 0.0.0.1
574 10:27:29.746341 OPROM - VBIOS = ff.ff.ff.ffff
575 10:27:29.750019 IO Manageability Engine FW Version = 11.1.4.0
576 10:27:29.752617 PHY Build Version = 0.0.0.e0
577 10:27:29.756681 Thunderbolt(TM) FW Version = 0.0.0.0
578 10:27:29.763762 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 10:27:29.763985 ITSS IRQ Polarities Before:
580 10:27:29.767249 IPC0: 0xffffffff
581 10:27:29.767448 IPC1: 0xffffffff
582 10:27:29.770564 IPC2: 0xffffffff
583 10:27:29.770731 IPC3: 0xffffffff
584 10:27:29.773847 ITSS IRQ Polarities After:
585 10:27:29.777319 IPC0: 0xffffffff
586 10:27:29.777554 IPC1: 0xffffffff
587 10:27:29.780796 IPC2: 0xffffffff
588 10:27:29.780989 IPC3: 0xffffffff
589 10:27:29.787328 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 10:27:29.797230 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 10:27:29.810746 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 10:27:29.823859 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 10:27:29.827495 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 10:27:29.831168 Enumerating buses...
595 10:27:29.834321 Show all devs... Before device enumeration.
596 10:27:29.837698 Root Device: enabled 1
597 10:27:29.840740 DOMAIN: 0000: enabled 1
598 10:27:29.843820 CPU_CLUSTER: 0: enabled 1
599 10:27:29.844269 PCI: 00:00.0: enabled 1
600 10:27:29.847706 PCI: 00:02.0: enabled 1
601 10:27:29.850664 PCI: 00:04.0: enabled 1
602 10:27:29.853790 PCI: 00:05.0: enabled 1
603 10:27:29.854347 PCI: 00:06.0: enabled 0
604 10:27:29.857324 PCI: 00:07.0: enabled 0
605 10:27:29.860919 PCI: 00:07.1: enabled 0
606 10:27:29.864169 PCI: 00:07.2: enabled 0
607 10:27:29.864723 PCI: 00:07.3: enabled 0
608 10:27:29.867287 PCI: 00:08.0: enabled 1
609 10:27:29.870690 PCI: 00:09.0: enabled 0
610 10:27:29.873567 PCI: 00:0a.0: enabled 0
611 10:27:29.874015 PCI: 00:0d.0: enabled 1
612 10:27:29.877301 PCI: 00:0d.1: enabled 0
613 10:27:29.880733 PCI: 00:0d.2: enabled 0
614 10:27:29.881346 PCI: 00:0d.3: enabled 0
615 10:27:29.884068 PCI: 00:0e.0: enabled 0
616 10:27:29.887604 PCI: 00:10.2: enabled 1
617 10:27:29.890764 PCI: 00:10.6: enabled 0
618 10:27:29.891306 PCI: 00:10.7: enabled 0
619 10:27:29.893691 PCI: 00:12.0: enabled 0
620 10:27:29.896971 PCI: 00:12.6: enabled 0
621 10:27:29.900721 PCI: 00:13.0: enabled 0
622 10:27:29.901488 PCI: 00:14.0: enabled 1
623 10:27:29.903856 PCI: 00:14.1: enabled 0
624 10:27:29.907333 PCI: 00:14.2: enabled 1
625 10:27:29.910631 PCI: 00:14.3: enabled 1
626 10:27:29.911174 PCI: 00:15.0: enabled 1
627 10:27:29.913656 PCI: 00:15.1: enabled 1
628 10:27:29.916754 PCI: 00:15.2: enabled 1
629 10:27:29.917226 PCI: 00:15.3: enabled 1
630 10:27:29.920263 PCI: 00:16.0: enabled 1
631 10:27:29.923871 PCI: 00:16.1: enabled 0
632 10:27:29.927021 PCI: 00:16.2: enabled 0
633 10:27:29.927564 PCI: 00:16.3: enabled 0
634 10:27:29.930113 PCI: 00:16.4: enabled 0
635 10:27:29.933579 PCI: 00:16.5: enabled 0
636 10:27:29.937196 PCI: 00:17.0: enabled 1
637 10:27:29.937809 PCI: 00:19.0: enabled 0
638 10:27:29.940144 PCI: 00:19.1: enabled 1
639 10:27:29.943292 PCI: 00:19.2: enabled 0
640 10:27:29.947140 PCI: 00:1c.0: enabled 1
641 10:27:29.947683 PCI: 00:1c.1: enabled 0
642 10:27:29.950048 PCI: 00:1c.2: enabled 0
643 10:27:29.953495 PCI: 00:1c.3: enabled 0
644 10:27:29.956746 PCI: 00:1c.4: enabled 0
645 10:27:29.957195 PCI: 00:1c.5: enabled 0
646 10:27:29.959899 PCI: 00:1c.6: enabled 1
647 10:27:29.963105 PCI: 00:1c.7: enabled 0
648 10:27:29.963554 PCI: 00:1d.0: enabled 1
649 10:27:29.966439 PCI: 00:1d.1: enabled 0
650 10:27:29.969830 PCI: 00:1d.2: enabled 1
651 10:27:29.973331 PCI: 00:1d.3: enabled 0
652 10:27:29.973781 PCI: 00:1e.0: enabled 1
653 10:27:29.976504 PCI: 00:1e.1: enabled 0
654 10:27:29.980354 PCI: 00:1e.2: enabled 1
655 10:27:29.983546 PCI: 00:1e.3: enabled 1
656 10:27:29.983999 PCI: 00:1f.0: enabled 1
657 10:27:29.987211 PCI: 00:1f.1: enabled 0
658 10:27:29.989733 PCI: 00:1f.2: enabled 1
659 10:27:29.993495 PCI: 00:1f.3: enabled 1
660 10:27:29.994051 PCI: 00:1f.4: enabled 0
661 10:27:29.996503 PCI: 00:1f.5: enabled 1
662 10:27:29.999621 PCI: 00:1f.6: enabled 0
663 10:27:30.000072 PCI: 00:1f.7: enabled 0
664 10:27:30.003566 APIC: 00: enabled 1
665 10:27:30.006721 GENERIC: 0.0: enabled 1
666 10:27:30.009866 GENERIC: 0.0: enabled 1
667 10:27:30.010564 GENERIC: 1.0: enabled 1
668 10:27:30.012877 GENERIC: 0.0: enabled 1
669 10:27:30.017196 GENERIC: 1.0: enabled 1
670 10:27:30.017808 USB0 port 0: enabled 1
671 10:27:30.020288 GENERIC: 0.0: enabled 1
672 10:27:30.023373 USB0 port 0: enabled 1
673 10:27:30.026445 GENERIC: 0.0: enabled 1
674 10:27:30.026899 I2C: 00:1a: enabled 1
675 10:27:30.029705 I2C: 00:31: enabled 1
676 10:27:30.032984 I2C: 00:32: enabled 1
677 10:27:30.033465 I2C: 00:10: enabled 1
678 10:27:30.036471 I2C: 00:15: enabled 1
679 10:27:30.039414 GENERIC: 0.0: enabled 0
680 10:27:30.042753 GENERIC: 1.0: enabled 0
681 10:27:30.043203 GENERIC: 0.0: enabled 1
682 10:27:30.046682 SPI: 00: enabled 1
683 10:27:30.047273 SPI: 00: enabled 1
684 10:27:30.050123 PNP: 0c09.0: enabled 1
685 10:27:30.053063 GENERIC: 0.0: enabled 1
686 10:27:30.056140 USB3 port 0: enabled 1
687 10:27:30.056586 USB3 port 1: enabled 1
688 10:27:30.059347 USB3 port 2: enabled 0
689 10:27:30.063011 USB3 port 3: enabled 0
690 10:27:30.063459 USB2 port 0: enabled 0
691 10:27:30.065993 USB2 port 1: enabled 1
692 10:27:30.069535 USB2 port 2: enabled 1
693 10:27:30.073028 USB2 port 3: enabled 0
694 10:27:30.073569 USB2 port 4: enabled 1
695 10:27:30.076420 USB2 port 5: enabled 0
696 10:27:30.079647 USB2 port 6: enabled 0
697 10:27:30.080188 USB2 port 7: enabled 0
698 10:27:30.082871 USB2 port 8: enabled 0
699 10:27:30.086236 USB2 port 9: enabled 0
700 10:27:30.086686 USB3 port 0: enabled 0
701 10:27:30.089160 USB3 port 1: enabled 1
702 10:27:30.092834 USB3 port 2: enabled 0
703 10:27:30.096194 USB3 port 3: enabled 0
704 10:27:30.096748 GENERIC: 0.0: enabled 1
705 10:27:30.099511 GENERIC: 1.0: enabled 1
706 10:27:30.102913 APIC: 05: enabled 1
707 10:27:30.103452 APIC: 03: enabled 1
708 10:27:30.106070 APIC: 06: enabled 1
709 10:27:30.109653 APIC: 07: enabled 1
710 10:27:30.110203 APIC: 04: enabled 1
711 10:27:30.112867 APIC: 01: enabled 1
712 10:27:30.113348 APIC: 02: enabled 1
713 10:27:30.116379 Compare with tree...
714 10:27:30.119174 Root Device: enabled 1
715 10:27:30.122407 DOMAIN: 0000: enabled 1
716 10:27:30.122856 PCI: 00:00.0: enabled 1
717 10:27:30.126188 PCI: 00:02.0: enabled 1
718 10:27:30.128889 PCI: 00:04.0: enabled 1
719 10:27:30.132441 GENERIC: 0.0: enabled 1
720 10:27:30.135814 PCI: 00:05.0: enabled 1
721 10:27:30.136263 PCI: 00:06.0: enabled 0
722 10:27:30.138874 PCI: 00:07.0: enabled 0
723 10:27:30.142399 GENERIC: 0.0: enabled 1
724 10:27:30.146107 PCI: 00:07.1: enabled 0
725 10:27:30.149721 GENERIC: 1.0: enabled 1
726 10:27:30.150266 PCI: 00:07.2: enabled 0
727 10:27:30.152573 GENERIC: 0.0: enabled 1
728 10:27:30.155854 PCI: 00:07.3: enabled 0
729 10:27:30.159213 GENERIC: 1.0: enabled 1
730 10:27:30.162202 PCI: 00:08.0: enabled 1
731 10:27:30.162652 PCI: 00:09.0: enabled 0
732 10:27:30.166488 PCI: 00:0a.0: enabled 0
733 10:27:30.169373 PCI: 00:0d.0: enabled 1
734 10:27:30.172681 USB0 port 0: enabled 1
735 10:27:30.176117 USB3 port 0: enabled 1
736 10:27:30.176701 USB3 port 1: enabled 1
737 10:27:30.178831 USB3 port 2: enabled 0
738 10:27:30.182262 USB3 port 3: enabled 0
739 10:27:30.185671 PCI: 00:0d.1: enabled 0
740 10:27:30.188914 PCI: 00:0d.2: enabled 0
741 10:27:30.189401 GENERIC: 0.0: enabled 1
742 10:27:30.192781 PCI: 00:0d.3: enabled 0
743 10:27:30.196092 PCI: 00:0e.0: enabled 0
744 10:27:30.198709 PCI: 00:10.2: enabled 1
745 10:27:30.202423 PCI: 00:10.6: enabled 0
746 10:27:30.202873 PCI: 00:10.7: enabled 0
747 10:27:30.206045 PCI: 00:12.0: enabled 0
748 10:27:30.209082 PCI: 00:12.6: enabled 0
749 10:27:30.212379 PCI: 00:13.0: enabled 0
750 10:27:30.215219 PCI: 00:14.0: enabled 1
751 10:27:30.215692 USB0 port 0: enabled 1
752 10:27:30.218831 USB2 port 0: enabled 0
753 10:27:30.222208 USB2 port 1: enabled 1
754 10:27:30.225880 USB2 port 2: enabled 1
755 10:27:30.229091 USB2 port 3: enabled 0
756 10:27:30.232169 USB2 port 4: enabled 1
757 10:27:30.232623 USB2 port 5: enabled 0
758 10:27:30.235406 USB2 port 6: enabled 0
759 10:27:30.238904 USB2 port 7: enabled 0
760 10:27:30.242257 USB2 port 8: enabled 0
761 10:27:30.245699 USB2 port 9: enabled 0
762 10:27:30.246145 USB3 port 0: enabled 0
763 10:27:30.248852 USB3 port 1: enabled 1
764 10:27:30.251970 USB3 port 2: enabled 0
765 10:27:30.255395 USB3 port 3: enabled 0
766 10:27:30.258765 PCI: 00:14.1: enabled 0
767 10:27:30.261940 PCI: 00:14.2: enabled 1
768 10:27:30.262350 PCI: 00:14.3: enabled 1
769 10:27:30.265100 GENERIC: 0.0: enabled 1
770 10:27:30.268562 PCI: 00:15.0: enabled 1
771 10:27:30.271981 I2C: 00:1a: enabled 1
772 10:27:30.272426 I2C: 00:31: enabled 1
773 10:27:30.275164 I2C: 00:32: enabled 1
774 10:27:30.278353 PCI: 00:15.1: enabled 1
775 10:27:30.282199 I2C: 00:10: enabled 1
776 10:27:30.285560 PCI: 00:15.2: enabled 1
777 10:27:30.286006 PCI: 00:15.3: enabled 1
778 10:27:30.288755 PCI: 00:16.0: enabled 1
779 10:27:30.292051 PCI: 00:16.1: enabled 0
780 10:27:30.295475 PCI: 00:16.2: enabled 0
781 10:27:30.298248 PCI: 00:16.3: enabled 0
782 10:27:30.298713 PCI: 00:16.4: enabled 0
783 10:27:30.302141 PCI: 00:16.5: enabled 0
784 10:27:30.305249 PCI: 00:17.0: enabled 1
785 10:27:30.308455 PCI: 00:19.0: enabled 0
786 10:27:30.311915 PCI: 00:19.1: enabled 1
787 10:27:30.312486 I2C: 00:15: enabled 1
788 10:27:30.315189 PCI: 00:19.2: enabled 0
789 10:27:30.318676 PCI: 00:1d.0: enabled 1
790 10:27:30.321568 GENERIC: 0.0: enabled 1
791 10:27:30.322015 PCI: 00:1e.0: enabled 1
792 10:27:30.325645 PCI: 00:1e.1: enabled 0
793 10:27:30.328987 PCI: 00:1e.2: enabled 1
794 10:27:30.331781 SPI: 00: enabled 1
795 10:27:30.335492 PCI: 00:1e.3: enabled 1
796 10:27:30.336045 SPI: 00: enabled 1
797 10:27:30.338458 PCI: 00:1f.0: enabled 1
798 10:27:30.341962 PNP: 0c09.0: enabled 1
799 10:27:30.345282 PCI: 00:1f.1: enabled 0
800 10:27:30.345725 PCI: 00:1f.2: enabled 1
801 10:27:30.348574 GENERIC: 0.0: enabled 1
802 10:27:30.351725 GENERIC: 0.0: enabled 1
803 10:27:30.355289 GENERIC: 1.0: enabled 1
804 10:27:30.358535 PCI: 00:1f.3: enabled 1
805 10:27:30.361673 PCI: 00:1f.4: enabled 0
806 10:27:30.362115 PCI: 00:1f.5: enabled 1
807 10:27:30.364937 PCI: 00:1f.6: enabled 0
808 10:27:30.368328 PCI: 00:1f.7: enabled 0
809 10:27:30.371209 CPU_CLUSTER: 0: enabled 1
810 10:27:30.371655 APIC: 00: enabled 1
811 10:27:30.423091 APIC: 05: enabled 1
812 10:27:30.423673 APIC: 03: enabled 1
813 10:27:30.424070 APIC: 06: enabled 1
814 10:27:30.424444 APIC: 07: enabled 1
815 10:27:30.424787 APIC: 04: enabled 1
816 10:27:30.425459 APIC: 01: enabled 1
817 10:27:30.425805 APIC: 02: enabled 1
818 10:27:30.426121 Root Device scanning...
819 10:27:30.426430 scan_static_bus for Root Device
820 10:27:30.426735 DOMAIN: 0000 enabled
821 10:27:30.427036 CPU_CLUSTER: 0 enabled
822 10:27:30.427337 DOMAIN: 0000 scanning...
823 10:27:30.427635 PCI: pci_scan_bus for bus 00
824 10:27:30.427934 PCI: 00:00.0 [8086/0000] ops
825 10:27:30.428231 PCI: 00:00.0 [8086/9a12] enabled
826 10:27:30.428529 PCI: 00:02.0 [8086/0000] bus ops
827 10:27:30.428826 PCI: 00:02.0 [8086/9a40] enabled
828 10:27:30.429120 PCI: 00:04.0 [8086/0000] bus ops
829 10:27:30.436386 PCI: 00:04.0 [8086/9a03] enabled
830 10:27:30.436879 PCI: 00:05.0 [8086/9a19] enabled
831 10:27:30.437642 PCI: 00:07.0 [0000/0000] hidden
832 10:27:30.438044 PCI: 00:08.0 [8086/9a11] enabled
833 10:27:30.439697 PCI: 00:0a.0 [8086/9a0d] disabled
834 10:27:30.443008 PCI: 00:0d.0 [8086/0000] bus ops
835 10:27:30.446393 PCI: 00:0d.0 [8086/9a13] enabled
836 10:27:30.449601 PCI: 00:14.0 [8086/0000] bus ops
837 10:27:30.452567 PCI: 00:14.0 [8086/a0ed] enabled
838 10:27:30.456397 PCI: 00:14.2 [8086/a0ef] enabled
839 10:27:30.459343 PCI: 00:14.3 [8086/0000] bus ops
840 10:27:30.462587 PCI: 00:14.3 [8086/a0f0] enabled
841 10:27:30.466349 PCI: 00:15.0 [8086/0000] bus ops
842 10:27:30.469263 PCI: 00:15.0 [8086/a0e8] enabled
843 10:27:30.472518 PCI: 00:15.1 [8086/0000] bus ops
844 10:27:30.475808 PCI: 00:15.1 [8086/a0e9] enabled
845 10:27:30.479292 PCI: 00:15.2 [8086/0000] bus ops
846 10:27:30.482467 PCI: 00:15.2 [8086/a0ea] enabled
847 10:27:30.486024 PCI: 00:15.3 [8086/0000] bus ops
848 10:27:30.489413 PCI: 00:15.3 [8086/a0eb] enabled
849 10:27:30.492468 PCI: 00:16.0 [8086/0000] ops
850 10:27:30.496025 PCI: 00:16.0 [8086/a0e0] enabled
851 10:27:30.499179 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 10:27:30.502689 PCI: 00:19.0 [8086/0000] bus ops
853 10:27:30.509063 PCI: 00:19.0 [8086/a0c5] disabled
854 10:27:30.512560 PCI: 00:19.1 [8086/0000] bus ops
855 10:27:30.515875 PCI: 00:19.1 [8086/a0c6] enabled
856 10:27:30.518975 PCI: 00:1d.0 [8086/0000] bus ops
857 10:27:30.522636 PCI: 00:1d.0 [8086/a0b0] enabled
858 10:27:30.523204 PCI: 00:1e.0 [8086/0000] ops
859 10:27:30.525860 PCI: 00:1e.0 [8086/a0a8] enabled
860 10:27:30.529290 PCI: 00:1e.2 [8086/0000] bus ops
861 10:27:30.532244 PCI: 00:1e.2 [8086/a0aa] enabled
862 10:27:30.535500 PCI: 00:1e.3 [8086/0000] bus ops
863 10:27:30.539191 PCI: 00:1e.3 [8086/a0ab] enabled
864 10:27:30.542506 PCI: 00:1f.0 [8086/0000] bus ops
865 10:27:30.545778 PCI: 00:1f.0 [8086/a087] enabled
866 10:27:30.549018 RTC Init
867 10:27:30.552624 Set power on after power failure.
868 10:27:30.553197 Disabling Deep S3
869 10:27:30.555651 Disabling Deep S3
870 10:27:30.559170 Disabling Deep S4
871 10:27:30.559638 Disabling Deep S4
872 10:27:30.561896 Disabling Deep S5
873 10:27:30.562385 Disabling Deep S5
874 10:27:30.565293 PCI: 00:1f.2 [0000/0000] hidden
875 10:27:30.568730 PCI: 00:1f.3 [8086/0000] bus ops
876 10:27:30.572160 PCI: 00:1f.3 [8086/a0c8] enabled
877 10:27:30.575478 PCI: 00:1f.5 [8086/0000] bus ops
878 10:27:30.578717 PCI: 00:1f.5 [8086/a0a4] enabled
879 10:27:30.581918 PCI: Leftover static devices:
880 10:27:30.585401 PCI: 00:10.2
881 10:27:30.585850 PCI: 00:10.6
882 10:27:30.586201 PCI: 00:10.7
883 10:27:30.589040 PCI: 00:06.0
884 10:27:30.589513 PCI: 00:07.1
885 10:27:30.592595 PCI: 00:07.2
886 10:27:30.593133 PCI: 00:07.3
887 10:27:30.595438 PCI: 00:09.0
888 10:27:30.595880 PCI: 00:0d.1
889 10:27:30.596234 PCI: 00:0d.2
890 10:27:30.598515 PCI: 00:0d.3
891 10:27:30.599027 PCI: 00:0e.0
892 10:27:30.601873 PCI: 00:12.0
893 10:27:30.602368 PCI: 00:12.6
894 10:27:30.602768 PCI: 00:13.0
895 10:27:30.605722 PCI: 00:14.1
896 10:27:30.606333 PCI: 00:16.1
897 10:27:30.608639 PCI: 00:16.2
898 10:27:30.609132 PCI: 00:16.3
899 10:27:30.609573 PCI: 00:16.4
900 10:27:30.612276 PCI: 00:16.5
901 10:27:30.612918 PCI: 00:17.0
902 10:27:30.615630 PCI: 00:19.2
903 10:27:30.616238 PCI: 00:1e.1
904 10:27:30.618868 PCI: 00:1f.1
905 10:27:30.619363 PCI: 00:1f.4
906 10:27:30.619761 PCI: 00:1f.6
907 10:27:30.622247 PCI: 00:1f.7
908 10:27:30.625658 PCI: Check your devicetree.cb.
909 10:27:30.626293 PCI: 00:02.0 scanning...
910 10:27:30.631835 scan_generic_bus for PCI: 00:02.0
911 10:27:30.635622 scan_generic_bus for PCI: 00:02.0 done
912 10:27:30.638843 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 10:27:30.641950 PCI: 00:04.0 scanning...
914 10:27:30.645279 scan_generic_bus for PCI: 00:04.0
915 10:27:30.648412 GENERIC: 0.0 enabled
916 10:27:30.652122 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 10:27:30.658690 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 10:27:30.661923 PCI: 00:0d.0 scanning...
919 10:27:30.665165 scan_static_bus for PCI: 00:0d.0
920 10:27:30.665809 USB0 port 0 enabled
921 10:27:30.668262 USB0 port 0 scanning...
922 10:27:30.671786 scan_static_bus for USB0 port 0
923 10:27:30.674992 USB3 port 0 enabled
924 10:27:30.675485 USB3 port 1 enabled
925 10:27:30.678283 USB3 port 2 disabled
926 10:27:30.681517 USB3 port 3 disabled
927 10:27:30.681948 USB3 port 0 scanning...
928 10:27:30.685134 scan_static_bus for USB3 port 0
929 10:27:30.692041 scan_static_bus for USB3 port 0 done
930 10:27:30.695041 scan_bus: bus USB3 port 0 finished in 6 msecs
931 10:27:30.697956 USB3 port 1 scanning...
932 10:27:30.701297 scan_static_bus for USB3 port 1
933 10:27:30.704671 scan_static_bus for USB3 port 1 done
934 10:27:30.708507 scan_bus: bus USB3 port 1 finished in 6 msecs
935 10:27:30.711518 scan_static_bus for USB0 port 0 done
936 10:27:30.718256 scan_bus: bus USB0 port 0 finished in 43 msecs
937 10:27:30.721325 scan_static_bus for PCI: 00:0d.0 done
938 10:27:30.724483 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 10:27:30.728123 PCI: 00:14.0 scanning...
940 10:27:30.731144 scan_static_bus for PCI: 00:14.0
941 10:27:30.734168 USB0 port 0 enabled
942 10:27:30.738341 USB0 port 0 scanning...
943 10:27:30.740893 scan_static_bus for USB0 port 0
944 10:27:30.741519 USB2 port 0 disabled
945 10:27:30.744699 USB2 port 1 enabled
946 10:27:30.747783 USB2 port 2 enabled
947 10:27:30.748390 USB2 port 3 disabled
948 10:27:30.750915 USB2 port 4 enabled
949 10:27:30.751413 USB2 port 5 disabled
950 10:27:30.754662 USB2 port 6 disabled
951 10:27:30.757737 USB2 port 7 disabled
952 10:27:30.758233 USB2 port 8 disabled
953 10:27:30.761465 USB2 port 9 disabled
954 10:27:30.764671 USB3 port 0 disabled
955 10:27:30.765312 USB3 port 1 enabled
956 10:27:30.767580 USB3 port 2 disabled
957 10:27:30.770953 USB3 port 3 disabled
958 10:27:30.771397 USB2 port 1 scanning...
959 10:27:30.774296 scan_static_bus for USB2 port 1
960 10:27:30.780789 scan_static_bus for USB2 port 1 done
961 10:27:30.784463 scan_bus: bus USB2 port 1 finished in 6 msecs
962 10:27:30.787484 USB2 port 2 scanning...
963 10:27:30.790663 scan_static_bus for USB2 port 2
964 10:27:30.793875 scan_static_bus for USB2 port 2 done
965 10:27:30.797488 scan_bus: bus USB2 port 2 finished in 6 msecs
966 10:27:30.800477 USB2 port 4 scanning...
967 10:27:30.803842 scan_static_bus for USB2 port 4
968 10:27:30.807151 scan_static_bus for USB2 port 4 done
969 10:27:30.813571 scan_bus: bus USB2 port 4 finished in 6 msecs
970 10:27:30.814144 USB3 port 1 scanning...
971 10:27:30.816579 scan_static_bus for USB3 port 1
972 10:27:30.823511 scan_static_bus for USB3 port 1 done
973 10:27:30.826988 scan_bus: bus USB3 port 1 finished in 6 msecs
974 10:27:30.830447 scan_static_bus for USB0 port 0 done
975 10:27:30.833490 scan_bus: bus USB0 port 0 finished in 93 msecs
976 10:27:30.839998 scan_static_bus for PCI: 00:14.0 done
977 10:27:30.843331 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 10:27:30.846666 PCI: 00:14.3 scanning...
979 10:27:30.849773 scan_static_bus for PCI: 00:14.3
980 10:27:30.853743 GENERIC: 0.0 enabled
981 10:27:30.856485 scan_static_bus for PCI: 00:14.3 done
982 10:27:30.860205 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 10:27:30.863180 PCI: 00:15.0 scanning...
984 10:27:30.866205 scan_static_bus for PCI: 00:15.0
985 10:27:30.869699 I2C: 00:1a enabled
986 10:27:30.870204 I2C: 00:31 enabled
987 10:27:30.872932 I2C: 00:32 enabled
988 10:27:30.876650 scan_static_bus for PCI: 00:15.0 done
989 10:27:30.879803 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 10:27:30.882964 PCI: 00:15.1 scanning...
991 10:27:30.886357 scan_static_bus for PCI: 00:15.1
992 10:27:30.889463 I2C: 00:10 enabled
993 10:27:30.893005 scan_static_bus for PCI: 00:15.1 done
994 10:27:30.896445 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 10:27:30.899460 PCI: 00:15.2 scanning...
996 10:27:30.902883 scan_static_bus for PCI: 00:15.2
997 10:27:30.905829 scan_static_bus for PCI: 00:15.2 done
998 10:27:30.913028 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 10:27:30.916374 PCI: 00:15.3 scanning...
1000 10:27:30.919649 scan_static_bus for PCI: 00:15.3
1001 10:27:30.922331 scan_static_bus for PCI: 00:15.3 done
1002 10:27:30.925840 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 10:27:30.929454 PCI: 00:19.1 scanning...
1004 10:27:30.932547 scan_static_bus for PCI: 00:19.1
1005 10:27:30.935997 I2C: 00:15 enabled
1006 10:27:30.939291 scan_static_bus for PCI: 00:19.1 done
1007 10:27:30.942558 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 10:27:30.945882 PCI: 00:1d.0 scanning...
1009 10:27:30.949641 do_pci_scan_bridge for PCI: 00:1d.0
1010 10:27:30.952479 PCI: pci_scan_bus for bus 01
1011 10:27:30.955535 PCI: 01:00.0 [15b7/5009] enabled
1012 10:27:30.958983 GENERIC: 0.0 enabled
1013 10:27:30.962453 Enabling Common Clock Configuration
1014 10:27:30.965515 L1 Sub-State supported from root port 29
1015 10:27:30.968872 L1 Sub-State Support = 0x5
1016 10:27:30.972091 CommonModeRestoreTime = 0x28
1017 10:27:30.975495 Power On Value = 0x16, Power On Scale = 0x0
1018 10:27:30.978643 ASPM: Enabled L1
1019 10:27:30.981921 PCIe: Max_Payload_Size adjusted to 128
1020 10:27:30.985223 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 10:27:30.988869 PCI: 00:1e.2 scanning...
1022 10:27:30.991863 scan_generic_bus for PCI: 00:1e.2
1023 10:27:30.995295 SPI: 00 enabled
1024 10:27:31.001701 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 10:27:31.005771 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 10:27:31.008994 PCI: 00:1e.3 scanning...
1027 10:27:31.012432 scan_generic_bus for PCI: 00:1e.3
1028 10:27:31.012977 SPI: 00 enabled
1029 10:27:31.019268 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 10:27:31.022379 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 10:27:31.025755 PCI: 00:1f.0 scanning...
1032 10:27:31.028908 scan_static_bus for PCI: 00:1f.0
1033 10:27:31.032329 PNP: 0c09.0 enabled
1034 10:27:31.035375 PNP: 0c09.0 scanning...
1035 10:27:31.038656 scan_static_bus for PNP: 0c09.0
1036 10:27:31.042727 scan_static_bus for PNP: 0c09.0 done
1037 10:27:31.045574 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 10:27:31.048905 scan_static_bus for PCI: 00:1f.0 done
1039 10:27:31.055474 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 10:27:31.058792 PCI: 00:1f.2 scanning...
1041 10:27:31.061664 scan_static_bus for PCI: 00:1f.2
1042 10:27:31.062161 GENERIC: 0.0 enabled
1043 10:27:31.065145 GENERIC: 0.0 scanning...
1044 10:27:31.068721 scan_static_bus for GENERIC: 0.0
1045 10:27:31.072137 GENERIC: 0.0 enabled
1046 10:27:31.072587 GENERIC: 1.0 enabled
1047 10:27:31.078388 scan_static_bus for GENERIC: 0.0 done
1048 10:27:31.081847 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 10:27:31.085098 scan_static_bus for PCI: 00:1f.2 done
1050 10:27:31.091637 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 10:27:31.092195 PCI: 00:1f.3 scanning...
1052 10:27:31.095559 scan_static_bus for PCI: 00:1f.3
1053 10:27:31.101573 scan_static_bus for PCI: 00:1f.3 done
1054 10:27:31.104887 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 10:27:31.108564 PCI: 00:1f.5 scanning...
1056 10:27:31.111919 scan_generic_bus for PCI: 00:1f.5
1057 10:27:31.115029 scan_generic_bus for PCI: 00:1f.5 done
1058 10:27:31.121788 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 10:27:31.124763 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 10:27:31.128063 scan_static_bus for Root Device done
1061 10:27:31.134490 scan_bus: bus Root Device finished in 735 msecs
1062 10:27:31.134945 done
1063 10:27:31.141667 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 10:27:31.145001 Chrome EC: UHEPI supported
1065 10:27:31.151485 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 10:27:31.157709 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 10:27:31.161382 SPI flash protection: WPSW=0 SRP0=1
1068 10:27:31.164803 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 10:27:31.171120 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 10:27:31.174523 found VGA at PCI: 00:02.0
1071 10:27:31.177913 Setting up VGA for PCI: 00:02.0
1072 10:27:31.181307 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 10:27:31.187509 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 10:27:31.187963 Allocating resources...
1075 10:27:31.191383 Reading resources...
1076 10:27:31.194512 Root Device read_resources bus 0 link: 0
1077 10:27:31.200960 DOMAIN: 0000 read_resources bus 0 link: 0
1078 10:27:31.204050 PCI: 00:04.0 read_resources bus 1 link: 0
1079 10:27:31.210685 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 10:27:31.214389 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 10:27:31.220667 USB0 port 0 read_resources bus 0 link: 0
1082 10:27:31.224147 USB0 port 0 read_resources bus 0 link: 0 done
1083 10:27:31.230724 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 10:27:31.234021 PCI: 00:14.0 read_resources bus 0 link: 0
1085 10:27:31.237526 USB0 port 0 read_resources bus 0 link: 0
1086 10:27:31.244300 USB0 port 0 read_resources bus 0 link: 0 done
1087 10:27:31.248154 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 10:27:31.254971 PCI: 00:14.3 read_resources bus 0 link: 0
1089 10:27:31.257982 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 10:27:31.264641 PCI: 00:15.0 read_resources bus 0 link: 0
1091 10:27:31.267922 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 10:27:31.274639 PCI: 00:15.1 read_resources bus 0 link: 0
1093 10:27:31.277726 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 10:27:31.284792 PCI: 00:19.1 read_resources bus 0 link: 0
1095 10:27:31.288439 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 10:27:31.294783 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 10:27:31.297792 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 10:27:31.304512 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 10:27:31.308330 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 10:27:31.314731 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 10:27:31.318463 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 10:27:31.324956 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 10:27:31.328487 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 10:27:31.334221 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 10:27:31.337644 GENERIC: 0.0 read_resources bus 0 link: 0
1106 10:27:31.341008 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 10:27:31.348027 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 10:27:31.355020 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 10:27:31.357656 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 10:27:31.364411 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 10:27:31.367867 Root Device read_resources bus 0 link: 0 done
1112 10:27:31.370872 Done reading resources.
1113 10:27:31.374110 Show resources in subtree (Root Device)...After reading.
1114 10:27:31.380934 Root Device child on link 0 DOMAIN: 0000
1115 10:27:31.384355 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 10:27:31.394596 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 10:27:31.404666 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 10:27:31.405124 PCI: 00:00.0
1119 10:27:31.414344 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 10:27:31.424062 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 10:27:31.434392 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 10:27:31.444269 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 10:27:31.453942 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 10:27:31.460716 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 10:27:31.470671 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 10:27:31.480541 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 10:27:31.490276 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 10:27:31.500944 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 10:27:31.506936 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 10:27:31.517242 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 10:27:31.527506 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 10:27:31.536643 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 10:27:31.546964 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 10:27:31.556555 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 10:27:31.566723 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 10:27:31.573415 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 10:27:31.583604 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 10:27:31.593350 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 10:27:31.596285 PCI: 00:02.0
1140 10:27:31.606478 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 10:27:31.616869 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 10:27:31.622849 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 10:27:31.629628 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 10:27:31.639639 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 10:27:31.640081 GENERIC: 0.0
1146 10:27:31.643206 PCI: 00:05.0
1147 10:27:31.652390 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 10:27:31.656052 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 10:27:31.659385 GENERIC: 0.0
1150 10:27:31.659827 PCI: 00:08.0
1151 10:27:31.669117 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 10:27:31.672478 PCI: 00:0a.0
1153 10:27:31.675909 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 10:27:31.686162 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 10:27:31.692389 USB0 port 0 child on link 0 USB3 port 0
1156 10:27:31.692849 USB3 port 0
1157 10:27:31.695898 USB3 port 1
1158 10:27:31.696359 USB3 port 2
1159 10:27:31.699039 USB3 port 3
1160 10:27:31.702345 PCI: 00:14.0 child on link 0 USB0 port 0
1161 10:27:31.712735 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 10:27:31.715622 USB0 port 0 child on link 0 USB2 port 0
1163 10:27:31.718965 USB2 port 0
1164 10:27:31.719412 USB2 port 1
1165 10:27:31.722417 USB2 port 2
1166 10:27:31.722865 USB2 port 3
1167 10:27:31.725571 USB2 port 4
1168 10:27:31.728833 USB2 port 5
1169 10:27:31.729310 USB2 port 6
1170 10:27:31.732256 USB2 port 7
1171 10:27:31.732733 USB2 port 8
1172 10:27:31.735858 USB2 port 9
1173 10:27:31.736308 USB3 port 0
1174 10:27:31.739253 USB3 port 1
1175 10:27:31.739730 USB3 port 2
1176 10:27:31.741900 USB3 port 3
1177 10:27:31.742369 PCI: 00:14.2
1178 10:27:31.751982 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 10:27:31.761777 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 10:27:31.769059 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 10:27:31.778868 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 10:27:31.779330 GENERIC: 0.0
1183 10:27:31.781771 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 10:27:31.792292 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 10:27:31.795454 I2C: 00:1a
1186 10:27:31.795900 I2C: 00:31
1187 10:27:31.798241 I2C: 00:32
1188 10:27:31.801971 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 10:27:31.811605 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 10:27:31.814867 I2C: 00:10
1191 10:27:31.815309 PCI: 00:15.2
1192 10:27:31.824890 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 10:27:31.828479 PCI: 00:15.3
1194 10:27:31.838622 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 10:27:31.839071 PCI: 00:16.0
1196 10:27:31.848218 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 10:27:31.851746 PCI: 00:19.0
1198 10:27:31.854839 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 10:27:31.865122 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 10:27:31.865753 I2C: 00:15
1201 10:27:31.871879 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 10:27:31.878318 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 10:27:31.888247 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 10:27:31.897663 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 10:27:31.901134 GENERIC: 0.0
1206 10:27:31.901618 PCI: 01:00.0
1207 10:27:31.911224 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 10:27:31.921273 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 10:27:31.924747 PCI: 00:1e.0
1210 10:27:31.934521 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 10:27:31.938017 PCI: 00:1e.2 child on link 0 SPI: 00
1212 10:27:31.947748 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 10:27:31.951343 SPI: 00
1214 10:27:31.954626 PCI: 00:1e.3 child on link 0 SPI: 00
1215 10:27:31.964180 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 10:27:31.964857 SPI: 00
1217 10:27:31.971008 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 10:27:31.977649 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 10:27:31.981190 PNP: 0c09.0
1220 10:27:31.987253 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 10:27:31.993844 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 10:27:32.003932 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 10:27:32.010958 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 10:27:32.017179 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 10:27:32.017753 GENERIC: 0.0
1226 10:27:32.020739 GENERIC: 1.0
1227 10:27:32.021199 PCI: 00:1f.3
1228 10:27:32.031088 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 10:27:32.040796 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 10:27:32.043981 PCI: 00:1f.5
1231 10:27:32.053935 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 10:27:32.057418 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 10:27:32.058000 APIC: 00
1234 10:27:32.060772 APIC: 05
1235 10:27:32.061393 APIC: 03
1236 10:27:32.063855 APIC: 06
1237 10:27:32.064294 APIC: 07
1238 10:27:32.064709 APIC: 04
1239 10:27:32.067135 APIC: 01
1240 10:27:32.067577 APIC: 02
1241 10:27:32.073652 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 10:27:32.080175 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 10:27:32.086840 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 10:27:32.093649 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 10:27:32.097120 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 10:27:32.099893 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 10:27:32.106682 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 10:27:32.116447 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 10:27:32.123538 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 10:27:32.130149 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 10:27:32.136700 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 10:27:32.143109 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 10:27:32.153173 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 10:27:32.160067 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 10:27:32.163117 DOMAIN: 0000: Resource ranges:
1256 10:27:32.166414 * Base: 1000, Size: 800, Tag: 100
1257 10:27:32.169762 * Base: 1900, Size: e700, Tag: 100
1258 10:27:32.176608 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 10:27:32.183004 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 10:27:32.189848 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 10:27:32.196600 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 10:27:32.202961 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 10:27:32.213010 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 10:27:32.219578 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 10:27:32.225981 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 10:27:32.236261 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 10:27:32.242749 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 10:27:32.249657 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 10:27:32.259091 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 10:27:32.265929 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 10:27:32.272601 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 10:27:32.282345 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 10:27:32.288888 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 10:27:32.295708 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 10:27:32.305667 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 10:27:32.312070 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 10:27:32.319038 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 10:27:32.328644 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 10:27:32.335468 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 10:27:32.342102 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 10:27:32.352178 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 10:27:32.358853 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 10:27:32.361643 DOMAIN: 0000: Resource ranges:
1284 10:27:32.365478 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 10:27:32.371817 * Base: d0000000, Size: 28000000, Tag: 200
1286 10:27:32.375287 * Base: fa000000, Size: 1000000, Tag: 200
1287 10:27:32.378363 * Base: fb001000, Size: 2fff000, Tag: 200
1288 10:27:32.381929 * Base: fe010000, Size: 2e000, Tag: 200
1289 10:27:32.388656 * Base: fe03f000, Size: d41000, Tag: 200
1290 10:27:32.391410 * Base: fed88000, Size: 8000, Tag: 200
1291 10:27:32.395507 * Base: fed93000, Size: d000, Tag: 200
1292 10:27:32.398230 * Base: feda2000, Size: 1e000, Tag: 200
1293 10:27:32.404988 * Base: fede0000, Size: 1220000, Tag: 200
1294 10:27:32.408055 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 10:27:32.414904 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 10:27:32.421740 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 10:27:32.428623 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 10:27:32.434557 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 10:27:32.441521 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 10:27:32.448136 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 10:27:32.454636 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 10:27:32.461226 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 10:27:32.467549 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 10:27:32.474291 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 10:27:32.481279 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 10:27:32.487873 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 10:27:32.494339 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 10:27:32.501307 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 10:27:32.507646 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 10:27:32.514117 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 10:27:32.520903 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 10:27:32.527526 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 10:27:32.534437 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 10:27:32.540937 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 10:27:32.548106 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 10:27:32.554540 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 10:27:32.560826 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 10:27:32.570429 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 10:27:32.573697 PCI: 00:1d.0: Resource ranges:
1320 10:27:32.577302 * Base: 7fc00000, Size: 100000, Tag: 200
1321 10:27:32.583936 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 10:27:32.590819 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 10:27:32.600554 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 10:27:32.607225 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 10:27:32.610327 Root Device assign_resources, bus 0 link: 0
1326 10:27:32.617253 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 10:27:32.623630 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 10:27:32.633766 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 10:27:32.640692 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 10:27:32.646532 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 10:27:32.653408 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 10:27:32.656987 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 10:27:32.666754 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 10:27:32.673186 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 10:27:32.682923 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 10:27:32.686332 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 10:27:32.689850 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 10:27:32.699695 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 10:27:32.702990 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 10:27:32.709389 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 10:27:32.716620 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 10:27:32.725987 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 10:27:32.733184 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 10:27:32.736284 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 10:27:32.742866 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 10:27:32.749762 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 10:27:32.756496 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 10:27:32.759356 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 10:27:32.769646 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 10:27:32.772703 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 10:27:32.776270 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 10:27:32.786097 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 10:27:32.792504 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 10:27:32.802611 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 10:27:32.809319 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 10:27:32.816192 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 10:27:32.818932 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 10:27:32.829186 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 10:27:32.838736 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 10:27:32.845715 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 10:27:32.852209 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 10:27:32.858287 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 10:27:32.868674 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 10:27:32.872577 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 10:27:32.881985 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 10:27:32.885069 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 10:27:32.888420 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 10:27:32.898603 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 10:27:32.901665 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 10:27:32.908356 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 10:27:32.911500 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 10:27:32.918140 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 10:27:32.921777 LPC: Trying to open IO window from 800 size 1ff
1374 10:27:32.931758 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 10:27:32.937889 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 10:27:32.944676 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 10:27:32.951463 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 10:27:32.954661 Root Device assign_resources, bus 0 link: 0
1379 10:27:32.957957 Done setting resources.
1380 10:27:32.964906 Show resources in subtree (Root Device)...After assigning values.
1381 10:27:32.968355 Root Device child on link 0 DOMAIN: 0000
1382 10:27:32.975221 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 10:27:32.981009 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 10:27:32.990914 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 10:27:32.994403 PCI: 00:00.0
1386 10:27:33.004500 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 10:27:33.014266 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 10:27:33.021059 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 10:27:33.031283 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 10:27:33.040741 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 10:27:33.050636 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 10:27:33.061150 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 10:27:33.070369 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 10:27:33.077822 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 10:27:33.087378 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 10:27:33.097488 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 10:27:33.107486 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 10:27:33.117571 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 10:27:33.124272 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 10:27:33.133670 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 10:27:33.143474 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 10:27:33.153672 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 10:27:33.163703 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 10:27:33.173645 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 10:27:33.183507 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 10:27:33.184079 PCI: 00:02.0
1407 10:27:33.193384 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 10:27:33.206801 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 10:27:33.213267 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 10:27:33.219887 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 10:27:33.230091 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 10:27:33.230638 GENERIC: 0.0
1413 10:27:33.233164 PCI: 00:05.0
1414 10:27:33.243536 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 10:27:33.246878 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 10:27:33.249847 GENERIC: 0.0
1417 10:27:33.253093 PCI: 00:08.0
1418 10:27:33.263434 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 10:27:33.263984 PCI: 00:0a.0
1420 10:27:33.266589 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 10:27:33.280338 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 10:27:33.283286 USB0 port 0 child on link 0 USB3 port 0
1423 10:27:33.283765 USB3 port 0
1424 10:27:33.285898 USB3 port 1
1425 10:27:33.289539 USB3 port 2
1426 10:27:33.290078 USB3 port 3
1427 10:27:33.292681 PCI: 00:14.0 child on link 0 USB0 port 0
1428 10:27:33.306079 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 10:27:33.309510 USB0 port 0 child on link 0 USB2 port 0
1430 10:27:33.310060 USB2 port 0
1431 10:27:33.312796 USB2 port 1
1432 10:27:33.315608 USB2 port 2
1433 10:27:33.316048 USB2 port 3
1434 10:27:33.319104 USB2 port 4
1435 10:27:33.319624 USB2 port 5
1436 10:27:33.322606 USB2 port 6
1437 10:27:33.323151 USB2 port 7
1438 10:27:33.325903 USB2 port 8
1439 10:27:33.326440 USB2 port 9
1440 10:27:33.329320 USB3 port 0
1441 10:27:33.329861 USB3 port 1
1442 10:27:33.332846 USB3 port 2
1443 10:27:33.333421 USB3 port 3
1444 10:27:33.335962 PCI: 00:14.2
1445 10:27:33.345826 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 10:27:33.355490 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 10:27:33.358512 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 10:27:33.372325 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 10:27:33.372871 GENERIC: 0.0
1450 10:27:33.375607 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 10:27:33.388805 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 10:27:33.389444 I2C: 00:1a
1453 10:27:33.392227 I2C: 00:31
1454 10:27:33.392780 I2C: 00:32
1455 10:27:33.395218 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 10:27:33.405318 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 10:27:33.409299 I2C: 00:10
1458 10:27:33.409848 PCI: 00:15.2
1459 10:27:33.418802 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 10:27:33.422211 PCI: 00:15.3
1461 10:27:33.432523 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 10:27:33.435303 PCI: 00:16.0
1463 10:27:33.445112 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 10:27:33.445833 PCI: 00:19.0
1465 10:27:33.452050 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 10:27:33.461716 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 10:27:33.462259 I2C: 00:15
1468 10:27:33.465305 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 10:27:33.475169 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 10:27:33.487957 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 10:27:33.498139 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 10:27:33.498686 GENERIC: 0.0
1473 10:27:33.501092 PCI: 01:00.0
1474 10:27:33.511386 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 10:27:33.521436 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 10:27:33.524994 PCI: 00:1e.0
1477 10:27:33.535022 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 10:27:33.538376 PCI: 00:1e.2 child on link 0 SPI: 00
1479 10:27:33.547938 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 10:27:33.551732 SPI: 00
1481 10:27:33.554890 PCI: 00:1e.3 child on link 0 SPI: 00
1482 10:27:33.564873 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 10:27:33.565520 SPI: 00
1484 10:27:33.571048 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 10:27:33.578199 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 10:27:33.581577 PNP: 0c09.0
1487 10:27:33.590750 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 10:27:33.594653 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 10:27:33.604341 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 10:27:33.613979 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 10:27:33.617426 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 10:27:33.620690 GENERIC: 0.0
1493 10:27:33.621133 GENERIC: 1.0
1494 10:27:33.624118 PCI: 00:1f.3
1495 10:27:33.634377 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 10:27:33.644615 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 10:27:33.645168 PCI: 00:1f.5
1498 10:27:33.657548 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 10:27:33.660520 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 10:27:33.661067 APIC: 00
1501 10:27:33.664345 APIC: 05
1502 10:27:33.664911 APIC: 03
1503 10:27:33.665301 APIC: 06
1504 10:27:33.666971 APIC: 07
1505 10:27:33.667501 APIC: 04
1506 10:27:33.670299 APIC: 01
1507 10:27:33.670740 APIC: 02
1508 10:27:33.674315 Done allocating resources.
1509 10:27:33.680416 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1510 10:27:33.683563 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 10:27:33.690227 Configure GPIOs for I2S audio on UP4.
1512 10:27:33.697110 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 10:27:33.697711 Enabling resources...
1514 10:27:33.703524 PCI: 00:00.0 subsystem <- 8086/9a12
1515 10:27:33.704071 PCI: 00:00.0 cmd <- 06
1516 10:27:33.706673 PCI: 00:02.0 subsystem <- 8086/9a40
1517 10:27:33.709652 PCI: 00:02.0 cmd <- 03
1518 10:27:33.713594 PCI: 00:04.0 subsystem <- 8086/9a03
1519 10:27:33.716224 PCI: 00:04.0 cmd <- 02
1520 10:27:33.719490 PCI: 00:05.0 subsystem <- 8086/9a19
1521 10:27:33.723011 PCI: 00:05.0 cmd <- 02
1522 10:27:33.726704 PCI: 00:08.0 subsystem <- 8086/9a11
1523 10:27:33.729836 PCI: 00:08.0 cmd <- 06
1524 10:27:33.733176 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 10:27:33.736129 PCI: 00:0d.0 cmd <- 02
1526 10:27:33.739812 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 10:27:33.743218 PCI: 00:14.0 cmd <- 02
1528 10:27:33.745804 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 10:27:33.746322 PCI: 00:14.2 cmd <- 02
1530 10:27:33.752959 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 10:27:33.753539 PCI: 00:14.3 cmd <- 02
1532 10:27:33.756356 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 10:27:33.759753 PCI: 00:15.0 cmd <- 02
1534 10:27:33.762848 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 10:27:33.766226 PCI: 00:15.1 cmd <- 02
1536 10:27:33.769642 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 10:27:33.772981 PCI: 00:15.2 cmd <- 02
1538 10:27:33.776001 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 10:27:33.779475 PCI: 00:15.3 cmd <- 02
1540 10:27:33.782557 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 10:27:33.785930 PCI: 00:16.0 cmd <- 02
1542 10:27:33.789292 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 10:27:33.792415 PCI: 00:19.1 cmd <- 02
1544 10:27:33.795756 PCI: 00:1d.0 bridge ctrl <- 0013
1545 10:27:33.798781 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 10:27:33.799260 PCI: 00:1d.0 cmd <- 06
1547 10:27:33.805524 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 10:27:33.805966 PCI: 00:1e.0 cmd <- 06
1549 10:27:33.808919 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 10:27:33.812406 PCI: 00:1e.2 cmd <- 06
1551 10:27:33.815655 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 10:27:33.818957 PCI: 00:1e.3 cmd <- 02
1553 10:27:33.822407 PCI: 00:1f.0 subsystem <- 8086/a087
1554 10:27:33.825860 PCI: 00:1f.0 cmd <- 407
1555 10:27:33.828879 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 10:27:33.832657 PCI: 00:1f.3 cmd <- 02
1557 10:27:33.835372 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 10:27:33.838646 PCI: 00:1f.5 cmd <- 406
1559 10:27:33.842218 PCI: 01:00.0 cmd <- 02
1560 10:27:33.846781 done.
1561 10:27:33.850316 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 10:27:33.853381 Initializing devices...
1563 10:27:33.857032 Root Device init
1564 10:27:33.859848 Chrome EC: Set SMI mask to 0x0000000000000000
1565 10:27:33.866537 Chrome EC: clear events_b mask to 0x0000000000000000
1566 10:27:33.873633 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 10:27:33.880215 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 10:27:33.886171 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 10:27:33.889670 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 10:27:33.897257 fw_config match found: DB_USB=USB3_ACTIVE
1571 10:27:33.900139 Configure Right Type-C port orientation for retimer
1572 10:27:33.903734 Root Device init finished in 45 msecs
1573 10:27:33.908261 PCI: 00:00.0 init
1574 10:27:33.911330 CPU TDP = 9 Watts
1575 10:27:33.911819 CPU PL1 = 9 Watts
1576 10:27:33.914315 CPU PL2 = 40 Watts
1577 10:27:33.917905 CPU PL4 = 83 Watts
1578 10:27:33.920903 PCI: 00:00.0 init finished in 8 msecs
1579 10:27:33.921374 PCI: 00:02.0 init
1580 10:27:33.924877 GMA: Found VBT in CBFS
1581 10:27:33.928095 GMA: Found valid VBT in CBFS
1582 10:27:33.934174 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 10:27:33.940923 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 10:27:33.944485 PCI: 00:02.0 init finished in 18 msecs
1585 10:27:33.947568 PCI: 00:05.0 init
1586 10:27:33.950675 PCI: 00:05.0 init finished in 0 msecs
1587 10:27:33.954011 PCI: 00:08.0 init
1588 10:27:33.957598 PCI: 00:08.0 init finished in 0 msecs
1589 10:27:33.960714 PCI: 00:14.0 init
1590 10:27:33.963953 PCI: 00:14.0 init finished in 0 msecs
1591 10:27:33.967248 PCI: 00:14.2 init
1592 10:27:33.970537 PCI: 00:14.2 init finished in 0 msecs
1593 10:27:33.973879 PCI: 00:15.0 init
1594 10:27:33.977267 I2C bus 0 version 0x3230302a
1595 10:27:33.981114 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 10:27:33.983855 PCI: 00:15.0 init finished in 6 msecs
1597 10:27:33.984549 PCI: 00:15.1 init
1598 10:27:33.986934 I2C bus 1 version 0x3230302a
1599 10:27:33.990172 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 10:27:33.997155 PCI: 00:15.1 init finished in 6 msecs
1601 10:27:33.997744 PCI: 00:15.2 init
1602 10:27:34.000389 I2C bus 2 version 0x3230302a
1603 10:27:34.003609 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 10:27:34.007155 PCI: 00:15.2 init finished in 6 msecs
1605 10:27:34.010370 PCI: 00:15.3 init
1606 10:27:34.013662 I2C bus 3 version 0x3230302a
1607 10:27:34.017261 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 10:27:34.020894 PCI: 00:15.3 init finished in 6 msecs
1609 10:27:34.023581 PCI: 00:16.0 init
1610 10:27:34.027382 PCI: 00:16.0 init finished in 0 msecs
1611 10:27:34.030287 PCI: 00:19.1 init
1612 10:27:34.033483 I2C bus 5 version 0x3230302a
1613 10:27:34.037503 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 10:27:34.040462 PCI: 00:19.1 init finished in 6 msecs
1615 10:27:34.044051 PCI: 00:1d.0 init
1616 10:27:34.044604 Initializing PCH PCIe bridge.
1617 10:27:34.050310 PCI: 00:1d.0 init finished in 3 msecs
1618 10:27:34.053580 PCI: 00:1f.0 init
1619 10:27:34.057020 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 10:27:34.060535 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 10:27:34.063281 IOAPIC: ID = 0x02
1622 10:27:34.066495 IOAPIC: Dumping registers
1623 10:27:34.066975 reg 0x0000: 0x02000000
1624 10:27:34.069608 reg 0x0001: 0x00770020
1625 10:27:34.072959 reg 0x0002: 0x00000000
1626 10:27:34.076948 PCI: 00:1f.0 init finished in 21 msecs
1627 10:27:34.079708 PCI: 00:1f.2 init
1628 10:27:34.083745 Disabling ACPI via APMC.
1629 10:27:34.084329 APMC done.
1630 10:27:34.086838 PCI: 00:1f.2 init finished in 5 msecs
1631 10:27:34.099529 PCI: 01:00.0 init
1632 10:27:34.102822 PCI: 01:00.0 init finished in 0 msecs
1633 10:27:34.106043 PNP: 0c09.0 init
1634 10:27:34.109079 Google Chrome EC uptime: 8.268 seconds
1635 10:27:34.115790 Google Chrome AP resets since EC boot: 1
1636 10:27:34.119188 Google Chrome most recent AP reset causes:
1637 10:27:34.122510 0.451: 32775 shutdown: entering G3
1638 10:27:34.129030 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 10:27:34.132183 PNP: 0c09.0 init finished in 23 msecs
1640 10:27:34.138550 Devices initialized
1641 10:27:34.141812 Show all devs... After init.
1642 10:27:34.145027 Root Device: enabled 1
1643 10:27:34.145621 DOMAIN: 0000: enabled 1
1644 10:27:34.148007 CPU_CLUSTER: 0: enabled 1
1645 10:27:34.151316 PCI: 00:00.0: enabled 1
1646 10:27:34.154432 PCI: 00:02.0: enabled 1
1647 10:27:34.154978 PCI: 00:04.0: enabled 1
1648 10:27:34.158229 PCI: 00:05.0: enabled 1
1649 10:27:34.161433 PCI: 00:06.0: enabled 0
1650 10:27:34.164551 PCI: 00:07.0: enabled 0
1651 10:27:34.165139 PCI: 00:07.1: enabled 0
1652 10:27:34.167687 PCI: 00:07.2: enabled 0
1653 10:27:34.171123 PCI: 00:07.3: enabled 0
1654 10:27:34.174575 PCI: 00:08.0: enabled 1
1655 10:27:34.175122 PCI: 00:09.0: enabled 0
1656 10:27:34.177834 PCI: 00:0a.0: enabled 0
1657 10:27:34.181540 PCI: 00:0d.0: enabled 1
1658 10:27:34.184677 PCI: 00:0d.1: enabled 0
1659 10:27:34.185513 PCI: 00:0d.2: enabled 0
1660 10:27:34.187985 PCI: 00:0d.3: enabled 0
1661 10:27:34.191381 PCI: 00:0e.0: enabled 0
1662 10:27:34.191824 PCI: 00:10.2: enabled 1
1663 10:27:34.195125 PCI: 00:10.6: enabled 0
1664 10:27:34.197604 PCI: 00:10.7: enabled 0
1665 10:27:34.201253 PCI: 00:12.0: enabled 0
1666 10:27:34.201816 PCI: 00:12.6: enabled 0
1667 10:27:34.204213 PCI: 00:13.0: enabled 0
1668 10:27:34.207512 PCI: 00:14.0: enabled 1
1669 10:27:34.210938 PCI: 00:14.1: enabled 0
1670 10:27:34.211381 PCI: 00:14.2: enabled 1
1671 10:27:34.214481 PCI: 00:14.3: enabled 1
1672 10:27:34.217430 PCI: 00:15.0: enabled 1
1673 10:27:34.220915 PCI: 00:15.1: enabled 1
1674 10:27:34.221518 PCI: 00:15.2: enabled 1
1675 10:27:34.224403 PCI: 00:15.3: enabled 1
1676 10:27:34.228417 PCI: 00:16.0: enabled 1
1677 10:27:34.228967 PCI: 00:16.1: enabled 0
1678 10:27:34.230746 PCI: 00:16.2: enabled 0
1679 10:27:34.234605 PCI: 00:16.3: enabled 0
1680 10:27:34.237398 PCI: 00:16.4: enabled 0
1681 10:27:34.237840 PCI: 00:16.5: enabled 0
1682 10:27:34.240864 PCI: 00:17.0: enabled 0
1683 10:27:34.244439 PCI: 00:19.0: enabled 0
1684 10:27:34.247465 PCI: 00:19.1: enabled 1
1685 10:27:34.247912 PCI: 00:19.2: enabled 0
1686 10:27:34.251175 PCI: 00:1c.0: enabled 1
1687 10:27:34.254429 PCI: 00:1c.1: enabled 0
1688 10:27:34.257871 PCI: 00:1c.2: enabled 0
1689 10:27:34.258452 PCI: 00:1c.3: enabled 0
1690 10:27:34.261269 PCI: 00:1c.4: enabled 0
1691 10:27:34.264392 PCI: 00:1c.5: enabled 0
1692 10:27:34.267591 PCI: 00:1c.6: enabled 1
1693 10:27:34.268038 PCI: 00:1c.7: enabled 0
1694 10:27:34.271207 PCI: 00:1d.0: enabled 1
1695 10:27:34.274577 PCI: 00:1d.1: enabled 0
1696 10:27:34.275131 PCI: 00:1d.2: enabled 1
1697 10:27:34.277795 PCI: 00:1d.3: enabled 0
1698 10:27:34.280960 PCI: 00:1e.0: enabled 1
1699 10:27:34.284361 PCI: 00:1e.1: enabled 0
1700 10:27:34.284905 PCI: 00:1e.2: enabled 1
1701 10:27:34.287903 PCI: 00:1e.3: enabled 1
1702 10:27:34.290852 PCI: 00:1f.0: enabled 1
1703 10:27:34.293911 PCI: 00:1f.1: enabled 0
1704 10:27:34.294358 PCI: 00:1f.2: enabled 1
1705 10:27:34.297678 PCI: 00:1f.3: enabled 1
1706 10:27:34.301088 PCI: 00:1f.4: enabled 0
1707 10:27:34.304470 PCI: 00:1f.5: enabled 1
1708 10:27:34.305016 PCI: 00:1f.6: enabled 0
1709 10:27:34.307282 PCI: 00:1f.7: enabled 0
1710 10:27:34.311018 APIC: 00: enabled 1
1711 10:27:34.311571 GENERIC: 0.0: enabled 1
1712 10:27:34.314097 GENERIC: 0.0: enabled 1
1713 10:27:34.317295 GENERIC: 1.0: enabled 1
1714 10:27:34.320611 GENERIC: 0.0: enabled 1
1715 10:27:34.321154 GENERIC: 1.0: enabled 1
1716 10:27:34.323831 USB0 port 0: enabled 1
1717 10:27:34.327682 GENERIC: 0.0: enabled 1
1718 10:27:34.328234 USB0 port 0: enabled 1
1719 10:27:34.330647 GENERIC: 0.0: enabled 1
1720 10:27:34.334058 I2C: 00:1a: enabled 1
1721 10:27:34.337233 I2C: 00:31: enabled 1
1722 10:27:34.337779 I2C: 00:32: enabled 1
1723 10:27:34.340306 I2C: 00:10: enabled 1
1724 10:27:34.343871 I2C: 00:15: enabled 1
1725 10:27:34.344418 GENERIC: 0.0: enabled 0
1726 10:27:34.347039 GENERIC: 1.0: enabled 0
1727 10:27:34.350889 GENERIC: 0.0: enabled 1
1728 10:27:34.351448 SPI: 00: enabled 1
1729 10:27:34.353612 SPI: 00: enabled 1
1730 10:27:34.357278 PNP: 0c09.0: enabled 1
1731 10:27:34.357827 GENERIC: 0.0: enabled 1
1732 10:27:34.360745 USB3 port 0: enabled 1
1733 10:27:34.363857 USB3 port 1: enabled 1
1734 10:27:34.366993 USB3 port 2: enabled 0
1735 10:27:34.367479 USB3 port 3: enabled 0
1736 10:27:34.370370 USB2 port 0: enabled 0
1737 10:27:34.373815 USB2 port 1: enabled 1
1738 10:27:34.374370 USB2 port 2: enabled 1
1739 10:27:34.377284 USB2 port 3: enabled 0
1740 10:27:34.380556 USB2 port 4: enabled 1
1741 10:27:34.381101 USB2 port 5: enabled 0
1742 10:27:34.383962 USB2 port 6: enabled 0
1743 10:27:34.387463 USB2 port 7: enabled 0
1744 10:27:34.390314 USB2 port 8: enabled 0
1745 10:27:34.390756 USB2 port 9: enabled 0
1746 10:27:34.393526 USB3 port 0: enabled 0
1747 10:27:34.397074 USB3 port 1: enabled 1
1748 10:27:34.397655 USB3 port 2: enabled 0
1749 10:27:34.400600 USB3 port 3: enabled 0
1750 10:27:34.403800 GENERIC: 0.0: enabled 1
1751 10:27:34.407400 GENERIC: 1.0: enabled 1
1752 10:27:34.407952 APIC: 05: enabled 1
1753 10:27:34.410263 APIC: 03: enabled 1
1754 10:27:34.410731 APIC: 06: enabled 1
1755 10:27:34.413299 APIC: 07: enabled 1
1756 10:27:34.417367 APIC: 04: enabled 1
1757 10:27:34.417957 APIC: 01: enabled 1
1758 10:27:34.420212 APIC: 02: enabled 1
1759 10:27:34.423829 PCI: 01:00.0: enabled 1
1760 10:27:34.427412 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1761 10:27:34.433528 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 10:27:34.437150 ELOG: NV offset 0xf30000 size 0x1000
1763 10:27:34.443341 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 10:27:34.449742 ELOG: Event(17) added with size 13 at 2023-02-10 10:27:33 UTC
1765 10:27:34.456880 ELOG: Event(92) added with size 9 at 2023-02-10 10:27:33 UTC
1766 10:27:34.463051 ELOG: Event(93) added with size 9 at 2023-02-10 10:27:33 UTC
1767 10:27:34.469763 ELOG: Event(9E) added with size 10 at 2023-02-10 10:27:33 UTC
1768 10:27:34.476299 ELOG: Event(9F) added with size 14 at 2023-02-10 10:27:33 UTC
1769 10:27:34.482876 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 10:27:34.489262 ELOG: Event(A1) added with size 10 at 2023-02-10 10:27:33 UTC
1771 10:27:34.496940 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 10:27:34.502691 ELOG: Event(A0) added with size 9 at 2023-02-10 10:27:33 UTC
1773 10:27:34.505885 elog_add_boot_reason: Logged dev mode boot
1774 10:27:34.512593 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1775 10:27:34.513141 Finalize devices...
1776 10:27:34.516082 Devices finalized
1777 10:27:34.522692 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 10:27:34.526189 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 10:27:34.532918 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 10:27:34.536191 ME: HFSTS1 : 0x80030055
1781 10:27:34.542365 ME: HFSTS2 : 0x30280116
1782 10:27:34.546272 ME: HFSTS3 : 0x00000050
1783 10:27:34.549434 ME: HFSTS4 : 0x00004000
1784 10:27:34.556103 ME: HFSTS5 : 0x00000000
1785 10:27:34.559501 ME: HFSTS6 : 0x40400006
1786 10:27:34.562791 ME: Manufacturing Mode : YES
1787 10:27:34.565830 ME: SPI Protection Mode Enabled : NO
1788 10:27:34.572249 ME: FW Partition Table : OK
1789 10:27:34.575372 ME: Bringup Loader Failure : NO
1790 10:27:34.579039 ME: Firmware Init Complete : NO
1791 10:27:34.582222 ME: Boot Options Present : NO
1792 10:27:34.585339 ME: Update In Progress : NO
1793 10:27:34.588598 ME: D0i3 Support : YES
1794 10:27:34.591988 ME: Low Power State Enabled : NO
1795 10:27:34.595921 ME: CPU Replaced : YES
1796 10:27:34.601913 ME: CPU Replacement Valid : YES
1797 10:27:34.605485 ME: Current Working State : 5
1798 10:27:34.609173 ME: Current Operation State : 1
1799 10:27:34.612059 ME: Current Operation Mode : 3
1800 10:27:34.615158 ME: Error Code : 0
1801 10:27:34.618460 ME: Enhanced Debug Mode : NO
1802 10:27:34.622153 ME: CPU Debug Disabled : YES
1803 10:27:34.625644 ME: TXT Support : NO
1804 10:27:34.631971 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 10:27:34.638453 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 10:27:34.642060 CBFS: 'fallback/slic' not found.
1807 10:27:34.648471 ACPI: Writing ACPI tables at 76b01000.
1808 10:27:34.648918 ACPI: * FACS
1809 10:27:34.651686 ACPI: * DSDT
1810 10:27:34.654841 Ramoops buffer: 0x100000@0x76a00000.
1811 10:27:34.658201 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 10:27:34.665388 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 10:27:34.668374 Google Chrome EC: version:
1814 10:27:34.672166 ro: voema_v2.0.10114-a447f03e46
1815 10:27:34.674597 rw: voema_v2.0.10114-a447f03e46
1816 10:27:34.675047 running image: 2
1817 10:27:34.681856 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 10:27:34.686467 ACPI: * FADT
1819 10:27:34.687028 SCI is IRQ9
1820 10:27:34.692876 ACPI: added table 1/32, length now 40
1821 10:27:34.693358 ACPI: * SSDT
1822 10:27:34.696246 Found 1 CPU(s) with 8 core(s) each.
1823 10:27:34.702655 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 10:27:34.705869 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 10:27:34.709548 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 10:27:34.712570 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 10:27:34.719443 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 10:27:34.726011 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 10:27:34.729306 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 10:27:34.735560 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 10:27:34.742512 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 10:27:34.745790 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 10:27:34.752127 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 10:27:34.755259 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 10:27:34.762774 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 10:27:34.765313 PS2K: Passing 80 keymaps to kernel
1837 10:27:34.772374 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 10:27:34.779064 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 10:27:34.785406 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 10:27:34.791750 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 10:27:34.798807 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 10:27:34.805180 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 10:27:34.812036 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 10:27:34.818423 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 10:27:34.821692 ACPI: added table 2/32, length now 44
1846 10:27:34.822191 ACPI: * MCFG
1847 10:27:34.829102 ACPI: added table 3/32, length now 48
1848 10:27:34.829722 ACPI: * TPM2
1849 10:27:34.832107 TPM2 log created at 0x769f0000
1850 10:27:34.835100 ACPI: added table 4/32, length now 52
1851 10:27:34.838601 ACPI: * MADT
1852 10:27:34.839185 SCI is IRQ9
1853 10:27:34.841925 ACPI: added table 5/32, length now 56
1854 10:27:34.844917 current = 76b09850
1855 10:27:34.845403 ACPI: * DMAR
1856 10:27:34.848808 ACPI: added table 6/32, length now 60
1857 10:27:34.854811 ACPI: added table 7/32, length now 64
1858 10:27:34.855265 ACPI: * HPET
1859 10:27:34.858944 ACPI: added table 8/32, length now 68
1860 10:27:34.861893 ACPI: done.
1861 10:27:34.862435 ACPI tables: 35216 bytes.
1862 10:27:34.865266 smbios_write_tables: 769ef000
1863 10:27:34.868204 EC returned error result code 3
1864 10:27:34.871586 Couldn't obtain OEM name from CBI
1865 10:27:34.876108 Create SMBIOS type 16
1866 10:27:34.879277 Create SMBIOS type 17
1867 10:27:34.882234 GENERIC: 0.0 (WIFI Device)
1868 10:27:34.882769 SMBIOS tables: 1734 bytes.
1869 10:27:34.889181 Writing table forward entry at 0x00000500
1870 10:27:34.895729 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 10:27:34.899476 Writing coreboot table at 0x76b25000
1872 10:27:34.905787 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 10:27:34.909287 1. 0000000000001000-000000000009ffff: RAM
1874 10:27:34.913002 2. 00000000000a0000-00000000000fffff: RESERVED
1875 10:27:34.919113 3. 0000000000100000-00000000769eefff: RAM
1876 10:27:34.922496 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 10:27:34.929328 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 10:27:34.935889 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 10:27:34.939247 7. 0000000077000000-000000007fbfffff: RESERVED
1880 10:27:34.942649 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 10:27:34.948974 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 10:27:34.952068 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 10:27:34.958893 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 10:27:34.962118 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 10:27:34.968830 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 10:27:34.972072 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 10:27:34.978844 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 10:27:34.982291 16. 0000000100000000-00000004803fffff: RAM
1889 10:27:34.985499 Passing 4 GPIOs to payload:
1890 10:27:34.988685 NAME | PORT | POLARITY | VALUE
1891 10:27:34.995370 lid | undefined | high | high
1892 10:27:35.002147 power | undefined | high | low
1893 10:27:35.004873 oprom | undefined | high | low
1894 10:27:35.011849 EC in RW | 0x000000e5 | high | high
1895 10:27:35.018458 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1896 10:27:35.019016 coreboot table: 1576 bytes.
1897 10:27:35.025161 IMD ROOT 0. 0x76fff000 0x00001000
1898 10:27:35.028336 IMD SMALL 1. 0x76ffe000 0x00001000
1899 10:27:35.031966 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 10:27:35.034754 VPD 3. 0x76c4d000 0x00000367
1901 10:27:35.038323 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 10:27:35.041540 CONSOLE 5. 0x76c2c000 0x00020000
1903 10:27:35.045290 FMAP 6. 0x76c2b000 0x00000578
1904 10:27:35.048086 TIME STAMP 7. 0x76c2a000 0x00000910
1905 10:27:35.055177 VBOOT WORK 8. 0x76c16000 0x00014000
1906 10:27:35.058328 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 10:27:35.061602 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 10:27:35.064738 RAMSTAGE 11. 0x76b97000 0x00073000
1909 10:27:35.068260 REFCODE 12. 0x76b42000 0x00055000
1910 10:27:35.071203 SMM BACKUP 13. 0x76b32000 0x00010000
1911 10:27:35.074750 4f444749 14. 0x76b30000 0x00002000
1912 10:27:35.078175 EXT VBT15. 0x76b2d000 0x0000219f
1913 10:27:35.085072 COREBOOT 16. 0x76b25000 0x00008000
1914 10:27:35.088010 ACPI 17. 0x76b01000 0x00024000
1915 10:27:35.091272 ACPI GNVS 18. 0x76b00000 0x00001000
1916 10:27:35.094344 RAMOOPS 19. 0x76a00000 0x00100000
1917 10:27:35.097566 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 10:27:35.101276 SMBIOS 21. 0x769ef000 0x00000800
1919 10:27:35.104258 IMD small region:
1920 10:27:35.108069 IMD ROOT 0. 0x76ffec00 0x00000400
1921 10:27:35.111652 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 10:27:35.114443 POWER STATE 2. 0x76ffeb80 0x00000044
1923 10:27:35.117703 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 10:27:35.124795 MEM INFO 4. 0x76ffe980 0x000001e0
1925 10:27:35.127373 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1926 10:27:35.131533 MTRR: Physical address space:
1927 10:27:35.137654 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 10:27:35.144011 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 10:27:35.150804 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 10:27:35.157753 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 10:27:35.164340 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 10:27:35.171203 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 10:27:35.174147 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 10:27:35.181152 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 10:27:35.183974 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 10:27:35.187535 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 10:27:35.190403 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 10:27:35.197793 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 10:27:35.200711 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 10:27:35.204468 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 10:27:35.207371 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 10:27:35.214407 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 10:27:35.217664 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 10:27:35.220361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 10:27:35.224806 call enable_fixed_mtrr()
1946 10:27:35.228135 CPU physical address size: 39 bits
1947 10:27:35.234701 MTRR: default type WB/UC MTRR counts: 6/7.
1948 10:27:35.238743 MTRR: WB selected as default type.
1949 10:27:35.244859 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 10:27:35.248410 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 10:27:35.254698 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 10:27:35.261662 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 10:27:35.268133 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 10:27:35.274581 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 10:27:35.278460
1956 10:27:35.278909 MTRR check
1957 10:27:35.281862 Fixed MTRRs : Enabled
1958 10:27:35.282315 Variable MTRRs: Enabled
1959 10:27:35.282672
1960 10:27:35.288714 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 10:27:35.291922 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 10:27:35.294893 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 10:27:35.298370 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 10:27:35.305292 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 10:27:35.308201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 10:27:35.311303 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 10:27:35.314946 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 10:27:35.321422 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 10:27:35.324764 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 10:27:35.328463 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 10:27:35.335571 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1972 10:27:35.339468 call enable_fixed_mtrr()
1973 10:27:35.342464 Checking cr50 for pending updates
1974 10:27:35.345766 CPU physical address size: 39 bits
1975 10:27:35.349390 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 10:27:35.352846 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 10:27:35.359559 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 10:27:35.362115 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 10:27:35.365780 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 10:27:35.368880 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 10:27:35.376040 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 10:27:35.379168 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 10:27:35.382761 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 10:27:35.385438 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 10:27:35.392010 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 10:27:35.395992 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 10:27:35.399146 call enable_fixed_mtrr()
1988 10:27:35.402579 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 10:27:35.409018 MTRR: Fixed MSR 0x250 0x0606060606060606
1990 10:27:35.412239 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 10:27:35.415889 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 10:27:35.419201 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 10:27:35.425802 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 10:27:35.428859 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 10:27:35.431995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 10:27:35.435548 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 10:27:35.442160 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 10:27:35.445220 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 10:27:35.448911 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 10:27:35.456798 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 10:27:35.457541 call enable_fixed_mtrr()
2002 10:27:35.462951 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 10:27:35.466036 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 10:27:35.469295 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 10:27:35.472788 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 10:27:35.479395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 10:27:35.482745 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 10:27:35.486362 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 10:27:35.490005 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 10:27:35.495809 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 10:27:35.499132 CPU physical address size: 39 bits
2012 10:27:35.504403 call enable_fixed_mtrr()
2013 10:27:35.507205 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 10:27:35.511096 CPU physical address size: 39 bits
2015 10:27:35.517343 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 10:27:35.520842 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 10:27:35.523915 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 10:27:35.527496 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 10:27:35.534140 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 10:27:35.537837 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 10:27:35.541060 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 10:27:35.544086 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 10:27:35.550413 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 10:27:35.554179 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 10:27:35.557526 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 10:27:35.560699 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 10:27:35.568980 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 10:27:35.569488 call enable_fixed_mtrr()
2029 10:27:35.576170 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 10:27:35.579315 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 10:27:35.582462 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 10:27:35.585588 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 10:27:35.592217 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 10:27:35.595249 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 10:27:35.598715 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 10:27:35.602008 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 10:27:35.607251 CPU physical address size: 39 bits
2038 10:27:35.614139 call enable_fixed_mtrr()
2039 10:27:35.616859 CPU physical address size: 39 bits
2040 10:27:35.624371 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 10:27:35.627519 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 10:27:35.630965 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 10:27:35.634337 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 10:27:35.641233 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 10:27:35.644331 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 10:27:35.647371 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 10:27:35.650789 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 10:27:35.657334 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 10:27:35.660925 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 10:27:35.663961 CPU physical address size: 39 bits
2051 10:27:35.668384 call enable_fixed_mtrr()
2052 10:27:35.668932 Reading cr50 TPM mode
2053 10:27:35.672107 CPU physical address size: 39 bits
2054 10:27:35.678375 BS: BS_PAYLOAD_LOAD entry times (exec / console): 331 / 6 ms
2055 10:27:35.688896 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 10:27:35.691823 Checking segment from ROM address 0xffc02b38
2057 10:27:35.695212 Checking segment from ROM address 0xffc02b54
2058 10:27:35.701526 Loading segment from ROM address 0xffc02b38
2059 10:27:35.701992 code (compression=0)
2060 10:27:35.711489 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 10:27:35.721683 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 10:27:35.722183 it's not compressed!
2063 10:27:35.871449 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 10:27:35.878193 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 10:27:35.884959 Loading segment from ROM address 0xffc02b54
2066 10:27:35.888680 Entry Point 0x30000000
2067 10:27:35.889260 Loaded segments
2068 10:27:35.894955 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2069 10:27:35.941852 Finalizing chipset.
2070 10:27:35.944514 Finalizing SMM.
2071 10:27:35.945003 APMC done.
2072 10:27:35.951044 BS: BS_PAYLOAD_LOAD exit times (exec / console): 45 / 5 ms
2073 10:27:35.954420 mp_park_aps done after 0 msecs.
2074 10:27:35.958069 Jumping to boot code at 0x30000000(0x76b25000)
2075 10:27:35.967760 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 10:27:35.968288
2077 10:27:35.968682
2078 10:27:35.971059
2079 10:27:35.971519 Starting depthcharge on Voema...
2080 10:27:35.972642 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2081 10:27:35.973164 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2082 10:27:35.973621 Setting prompt string to ['volteer:']
2083 10:27:35.974021 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2084 10:27:35.974762
2085 10:27:35.981108 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 10:27:35.981651
2087 10:27:35.987987 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 10:27:35.988542
2089 10:27:35.993982 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 10:27:35.994454
2091 10:27:35.997692 Failed to find eMMC card reader
2092 10:27:35.998143
2093 10:27:35.998501 Wipe memory regions:
2094 10:27:36.000883
2095 10:27:36.004359 [0x00000000001000, 0x000000000a0000)
2096 10:27:36.004808
2097 10:27:36.007585 [0x00000000100000, 0x00000030000000)
2098 10:27:36.046591
2099 10:27:36.049501 [0x00000032662db0, 0x000000769ef000)
2100 10:27:36.104432
2101 10:27:36.107234 [0x00000100000000, 0x00000480400000)
2102 10:27:36.789895
2103 10:27:36.792931 ec_init: CrosEC protocol v3 supported (256, 256)
2104 10:27:37.225311
2105 10:27:37.225823 R8152: Initializing
2106 10:27:37.226199
2107 10:27:37.228056 Version 6 (ocp_data = 5c30)
2108 10:27:37.228607
2109 10:27:37.231387 R8152: Done initializing
2110 10:27:37.231826
2111 10:27:37.235209 Adding net device
2112 10:27:37.536117
2113 10:27:37.539107 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2114 10:27:37.539584
2115 10:27:37.539945
2116 10:27:37.540271
2117 10:27:37.543265 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2119 10:27:37.645145 volteer: tftpboot 192.168.201.1 9097742/tftp-deploy-v_x3sqb4/kernel/bzImage 9097742/tftp-deploy-v_x3sqb4/kernel/cmdline 9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
2120 10:27:37.645847 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 10:27:37.646343 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2122 10:27:37.651353 tftpboot 192.168.201.1 9097742/tftp-deploy-v_x3sqb4/kernel/bzImaoy-v_x3sqb4/kernel/cmdline 9097742/tftp-deploy-v_x3sqb4/ramdisk/ramdisk.cpio.gz
2123 10:27:37.651994
2124 10:27:37.652357 Waiting for link
2125 10:27:37.854190
2126 10:27:37.854700 done.
2127 10:27:37.855071
2128 10:27:37.855583 MAC: 00:24:32:30:77:d1
2129 10:27:37.856014
2130 10:27:37.857361 Sending DHCP discover... done.
2131 10:27:37.857767
2132 10:27:37.860642 Waiting for reply... done.
2133 10:27:37.861077
2134 10:27:37.863926 Sending DHCP request... done.
2135 10:27:37.864360
2136 10:27:37.871109 Waiting for reply... done.
2137 10:27:37.871541
2138 10:27:37.871884 My ip is 192.168.201.13
2139 10:27:37.872206
2140 10:27:37.874560 The DHCP server ip is 192.168.201.1
2141 10:27:37.878045
2142 10:27:37.881335 TFTP server IP predefined by user: 192.168.201.1
2143 10:27:37.881798
2144 10:27:37.887674 Bootfile predefined by user: 9097742/tftp-deploy-v_x3sqb4/kernel/bzImage
2145 10:27:37.888181
2146 10:27:37.891075 Sending tftp read request... done.
2147 10:27:37.891506
2148 10:27:37.898305 Waiting for the transfer...
2149 10:27:37.898734
2150 10:27:38.471647 00000000 ################################################################
2151 10:27:38.471801
2152 10:27:39.008391 00080000 ################################################################
2153 10:27:39.008542
2154 10:27:39.542724 00100000 ################################################################
2155 10:27:39.542879
2156 10:27:40.075650 00180000 ################################################################
2157 10:27:40.075817
2158 10:27:40.610392 00200000 ################################################################
2159 10:27:40.610554
2160 10:27:41.171674 00280000 ################################################################
2161 10:27:41.171841
2162 10:27:41.727627 00300000 ################################################################
2163 10:27:41.727793
2164 10:27:42.274936 00380000 ################################################################
2165 10:27:42.275208
2166 10:27:42.836568 00400000 ################################################################
2167 10:27:42.836736
2168 10:27:43.399264 00480000 ################################################################
2169 10:27:43.399429
2170 10:27:43.953497 00500000 ################################################################
2171 10:27:43.953709
2172 10:27:44.498130 00580000 ################################################################
2173 10:27:44.498323
2174 10:27:45.046067 00600000 ################################################################
2175 10:27:45.046263
2176 10:27:45.598384 00680000 ################################################################
2177 10:27:45.598552
2178 10:27:46.160968 00700000 ################################################################
2179 10:27:46.161133
2180 10:27:46.714045 00780000 ################################################################
2181 10:27:46.714200
2182 10:27:47.260947 00800000 ################################################################
2183 10:27:47.261094
2184 10:27:47.817724 00880000 ################################################################
2185 10:27:47.817876
2186 10:27:48.098283 00900000 ################################## done.
2187 10:27:48.098435
2188 10:27:48.101807 The bootfile was 9707520 bytes long.
2189 10:27:48.101904
2190 10:27:48.105123 Sending tftp read request... done.
2191 10:27:48.105225
2192 10:27:48.108325 Waiting for the transfer...
2193 10:27:48.108430
2194 10:27:48.654604 00000000 ################################################################
2195 10:27:48.654762
2196 10:27:49.186984 00080000 ################################################################
2197 10:27:49.187146
2198 10:27:49.717871 00100000 ################################################################
2199 10:27:49.718028
2200 10:27:50.283237 00180000 ################################################################
2201 10:27:50.283396
2202 10:27:50.837052 00200000 ################################################################
2203 10:27:50.837212
2204 10:27:51.390863 00280000 ################################################################
2205 10:27:51.391027
2206 10:27:51.935285 00300000 ################################################################
2207 10:27:51.935448
2208 10:27:52.473660 00380000 ################################################################
2209 10:27:52.473826
2210 10:27:53.037843 00400000 ################################################################
2211 10:27:53.038005
2212 10:27:53.581270 00480000 ################################################################
2213 10:27:53.581440
2214 10:27:54.110937 00500000 ################################################################
2215 10:27:54.111103
2216 10:27:54.641781 00580000 ################################################################
2217 10:27:54.641969
2218 10:27:55.186040 00600000 ################################################################
2219 10:27:55.186214
2220 10:27:55.747312 00680000 ################################################################
2221 10:27:55.747487
2222 10:27:56.312007 00700000 ################################################################
2223 10:27:56.312195
2224 10:27:56.859844 00780000 ################################################################
2225 10:27:56.860008
2226 10:27:57.065621 00800000 ######################## done.
2227 10:27:57.065787
2228 10:27:57.068931 Sending tftp read request... done.
2229 10:27:57.069032
2230 10:27:57.072555 Waiting for the transfer...
2231 10:27:57.072658
2232 10:27:57.072734 00000000 # done.
2233 10:27:57.072807
2234 10:27:57.082152 Command line loaded dynamically from TFTP file: 9097742/tftp-deploy-v_x3sqb4/kernel/cmdline
2235 10:27:57.082287
2236 10:27:57.095155 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2237 10:27:57.099212
2238 10:27:57.102389 Shutting down all USB controllers.
2239 10:27:57.102493
2240 10:27:57.102598 Removing current net device
2241 10:27:57.102695
2242 10:27:57.105741 Finalizing coreboot
2243 10:27:57.105839
2244 10:27:57.112266 Exiting depthcharge with code 4 at timestamp: 29729706
2245 10:27:57.112378
2246 10:27:57.112456
2247 10:27:57.112527 Starting kernel ...
2248 10:27:57.112596
2249 10:27:57.112662
2250 10:27:57.113068 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2251 10:27:57.113181 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2252 10:27:57.113276 Setting prompt string to ['Linux version [0-9]']
2253 10:27:57.113359 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2254 10:27:57.113437 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2256 10:32:18.113492 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2258 10:32:18.113789 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2260 10:32:18.113960 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2263 10:32:18.114307 end: 2 depthcharge-action (duration 00:05:00) [common]
2265 10:32:18.114586 Cleaning after the job
2266 10:32:18.114676 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/ramdisk
2267 10:32:18.115354 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/kernel
2268 10:32:18.116079 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097742/tftp-deploy-v_x3sqb4/modules
2269 10:32:18.116289 start: 5.1 power-off (timeout 00:00:30) [common]
2270 10:32:18.116453 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2271 10:32:20.297023 >> Command sent successfully.
2272 10:32:20.299463 Returned 0 in 2 seconds
2273 10:32:20.400260 end: 5.1 power-off (duration 00:00:02) [common]
2275 10:32:20.400594 start: 5.2 read-feedback (timeout 00:09:58) [common]
2276 10:32:20.400927 Listened to connection for namespace 'common' for up to 1s
2277 10:32:21.405341 Finalising connection for namespace 'common'
2278 10:32:21.405535 Disconnecting from shell: Finalise
2279 10:32:21.405625
2280 10:32:21.506337 end: 5.2 read-feedback (duration 00:00:01) [common]
2281 10:32:21.506483 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9097742
2282 10:32:21.511832 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9097742
2283 10:32:21.511975 JobError: Your job cannot terminate cleanly.