Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 10:27:38.159782 lava-dispatcher, installed at version: 2022.11
2 10:27:38.159996 start: 0 validate
3 10:27:38.160148 Start time: 2023-02-10 10:27:38.160141+00:00 (UTC)
4 10:27:38.160302 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:27:38.160465 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
6 10:27:38.450283 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:27:38.450477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:27:38.742046 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:27:38.742237 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:27:39.035620 validate duration: 0.88
12 10:27:39.035947 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:27:39.036071 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:27:39.036173 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:27:39.036307 Not decompressing ramdisk as can be used compressed.
16 10:27:39.036403 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
17 10:27:39.036495 saving as /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/ramdisk/rootfs.cpio.gz
18 10:27:39.036567 total size: 8423718 (8MB)
19 10:27:39.037815 progress 0% (0MB)
20 10:27:39.040135 progress 5% (0MB)
21 10:27:39.042546 progress 10% (0MB)
22 10:27:39.044930 progress 15% (1MB)
23 10:27:39.047287 progress 20% (1MB)
24 10:27:39.049650 progress 25% (2MB)
25 10:27:39.051991 progress 30% (2MB)
26 10:27:39.054165 progress 35% (2MB)
27 10:27:39.056525 progress 40% (3MB)
28 10:27:39.058856 progress 45% (3MB)
29 10:27:39.061170 progress 50% (4MB)
30 10:27:39.063477 progress 55% (4MB)
31 10:27:39.065797 progress 60% (4MB)
32 10:27:39.068084 progress 65% (5MB)
33 10:27:39.070228 progress 70% (5MB)
34 10:27:39.072539 progress 75% (6MB)
35 10:27:39.074824 progress 80% (6MB)
36 10:27:39.077125 progress 85% (6MB)
37 10:27:39.079416 progress 90% (7MB)
38 10:27:39.081770 progress 95% (7MB)
39 10:27:39.084107 progress 100% (8MB)
40 10:27:39.084319 8MB downloaded in 0.05s (168.26MB/s)
41 10:27:39.084505 end: 1.1.1 http-download (duration 00:00:00) [common]
43 10:27:39.084799 end: 1.1 download-retry (duration 00:00:00) [common]
44 10:27:39.084901 start: 1.2 download-retry (timeout 00:10:00) [common]
45 10:27:39.085001 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 10:27:39.085135 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:27:39.085215 saving as /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/kernel/bzImage
48 10:27:39.085288 total size: 9707520 (9MB)
49 10:27:39.085358 No compression specified
50 10:27:39.086546 progress 0% (0MB)
51 10:27:39.089216 progress 5% (0MB)
52 10:27:39.091980 progress 10% (0MB)
53 10:27:39.094695 progress 15% (1MB)
54 10:27:39.097449 progress 20% (1MB)
55 10:27:39.100160 progress 25% (2MB)
56 10:27:39.102687 progress 30% (2MB)
57 10:27:39.105379 progress 35% (3MB)
58 10:27:39.108071 progress 40% (3MB)
59 10:27:39.110745 progress 45% (4MB)
60 10:27:39.113441 progress 50% (4MB)
61 10:27:39.115943 progress 55% (5MB)
62 10:27:39.118600 progress 60% (5MB)
63 10:27:39.121256 progress 65% (6MB)
64 10:27:39.123885 progress 70% (6MB)
65 10:27:39.126531 progress 75% (6MB)
66 10:27:39.129011 progress 80% (7MB)
67 10:27:39.131635 progress 85% (7MB)
68 10:27:39.134297 progress 90% (8MB)
69 10:27:39.136942 progress 95% (8MB)
70 10:27:39.139605 progress 100% (9MB)
71 10:27:39.139829 9MB downloaded in 0.05s (169.76MB/s)
72 10:27:39.140002 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:27:39.140273 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:27:39.140389 start: 1.3 download-retry (timeout 00:10:00) [common]
76 10:27:39.140506 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 10:27:39.140632 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:27:39.140710 saving as /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/modules/modules.tar
79 10:27:39.140782 total size: 64776 (0MB)
80 10:27:39.140852 Using unxz to decompress xz
81 10:27:39.144295 progress 50% (0MB)
82 10:27:39.144732 progress 100% (0MB)
83 10:27:39.149476 0MB downloaded in 0.01s (7.11MB/s)
84 10:27:39.149771 end: 1.3.1 http-download (duration 00:00:00) [common]
86 10:27:39.150083 end: 1.3 download-retry (duration 00:00:00) [common]
87 10:27:39.150204 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 10:27:39.150318 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 10:27:39.150416 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 10:27:39.150520 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 10:27:39.150720 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg
92 10:27:39.150844 makedir: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin
93 10:27:39.150943 makedir: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/tests
94 10:27:39.151036 makedir: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/results
95 10:27:39.151158 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-add-keys
96 10:27:39.151311 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-add-sources
97 10:27:39.151454 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-background-process-start
98 10:27:39.151587 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-background-process-stop
99 10:27:39.151716 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-common-functions
100 10:27:39.151844 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-echo-ipv4
101 10:27:39.151972 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-install-packages
102 10:27:39.152101 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-installed-packages
103 10:27:39.152224 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-os-build
104 10:27:39.152349 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-probe-channel
105 10:27:39.152486 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-probe-ip
106 10:27:39.152613 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-target-ip
107 10:27:39.152737 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-target-mac
108 10:27:39.152861 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-target-storage
109 10:27:39.152991 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-case
110 10:27:39.153118 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-event
111 10:27:39.153244 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-feedback
112 10:27:39.153368 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-raise
113 10:27:39.153501 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-reference
114 10:27:39.153624 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-runner
115 10:27:39.153747 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-set
116 10:27:39.153893 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-test-shell
117 10:27:39.154023 Updating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-install-packages (oe)
118 10:27:39.154155 Updating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/bin/lava-installed-packages (oe)
119 10:27:39.154271 Creating /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/environment
120 10:27:39.154373 LAVA metadata
121 10:27:39.154456 - LAVA_JOB_ID=9097772
122 10:27:39.154534 - LAVA_DISPATCHER_IP=192.168.201.1
123 10:27:39.154658 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 10:27:39.154734 skipped lava-vland-overlay
125 10:27:39.154823 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 10:27:39.154923 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 10:27:39.154995 skipped lava-multinode-overlay
128 10:27:39.155083 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 10:27:39.155177 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 10:27:39.155266 Loading test definitions
131 10:27:39.155376 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 10:27:39.155462 Using /lava-9097772 at stage 0
133 10:27:39.155770 uuid=9097772_1.4.2.3.1 testdef=None
134 10:27:39.155877 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 10:27:39.155983 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 10:27:39.156551 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 10:27:39.156822 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 10:27:39.157496 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 10:27:39.157776 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 10:27:39.158392 runner path: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/0/tests/0_dmesg test_uuid 9097772_1.4.2.3.1
143 10:27:39.158561 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 10:27:39.158827 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 10:27:39.158913 Using /lava-9097772 at stage 1
147 10:27:39.159194 uuid=9097772_1.4.2.3.5 testdef=None
148 10:27:39.159298 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 10:27:39.159398 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 10:27:39.159910 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 10:27:39.160184 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 10:27:39.160852 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 10:27:39.161127 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 10:27:39.161754 runner path: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/1/tests/1_bootrr test_uuid 9097772_1.4.2.3.5
157 10:27:39.161918 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 10:27:39.162162 Creating lava-test-runner.conf files
160 10:27:39.162237 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/0 for stage 0
161 10:27:39.162333 - 0_dmesg
162 10:27:39.162420 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097772/lava-overlay-2iqnlnyg/lava-9097772/1 for stage 1
163 10:27:39.162516 - 1_bootrr
164 10:27:39.162621 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 10:27:39.162724 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 10:27:39.169761 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 10:27:39.169913 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 10:27:39.170021 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 10:27:39.170124 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 10:27:39.170233 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 10:27:39.375900 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 10:27:39.376276 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 10:27:39.376402 extracting modules file /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097772/extract-overlay-ramdisk-uw0b1xd0/ramdisk
174 10:27:39.381039 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 10:27:39.381177 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 10:27:39.381279 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097772/compress-overlay-9auvl9sf/overlay-1.4.2.4.tar.gz to ramdisk
177 10:27:39.381364 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097772/compress-overlay-9auvl9sf/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9097772/extract-overlay-ramdisk-uw0b1xd0/ramdisk
178 10:27:39.385787 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 10:27:39.385926 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 10:27:39.386033 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 10:27:39.386142 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 10:27:39.386247 Building ramdisk /var/lib/lava/dispatcher/tmp/9097772/extract-overlay-ramdisk-uw0b1xd0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9097772/extract-overlay-ramdisk-uw0b1xd0/ramdisk
183 10:27:39.456477 >> 48350 blocks
184 10:27:40.282706 rename /var/lib/lava/dispatcher/tmp/9097772/extract-overlay-ramdisk-uw0b1xd0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
185 10:27:40.283171 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 10:27:40.283313 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 10:27:40.283444 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 10:27:40.283614 No mkimage arch provided, not using FIT.
189 10:27:40.283754 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 10:27:40.283856 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 10:27:40.283974 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 10:27:40.284097 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 10:27:40.284189 No LXC device requested
194 10:27:40.284284 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 10:27:40.284387 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 10:27:40.284497 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 10:27:40.284579 Checking files for TFTP limit of 4294967296 bytes.
198 10:27:40.285034 end: 1 tftp-deploy (duration 00:00:01) [common]
199 10:27:40.285162 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 10:27:40.285275 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 10:27:40.285422 substitutions:
202 10:27:40.285503 - {DTB}: None
203 10:27:40.285581 - {INITRD}: 9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
204 10:27:40.285662 - {KERNEL}: 9097772/tftp-deploy-3uoc6t3g/kernel/bzImage
205 10:27:40.285735 - {LAVA_MAC}: None
206 10:27:40.285803 - {PRESEED_CONFIG}: None
207 10:27:40.285910 - {PRESEED_LOCAL}: None
208 10:27:40.286017 - {RAMDISK}: 9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
209 10:27:40.286092 - {ROOT_PART}: None
210 10:27:40.286176 - {ROOT}: None
211 10:27:40.286278 - {SERVER_IP}: 192.168.201.1
212 10:27:40.286352 - {TEE}: None
213 10:27:40.286422 Parsed boot commands:
214 10:27:40.286488 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 10:27:40.286669 Parsed boot commands: tftpboot 192.168.201.1 9097772/tftp-deploy-3uoc6t3g/kernel/bzImage 9097772/tftp-deploy-3uoc6t3g/kernel/cmdline 9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
216 10:27:40.286780 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 10:27:40.286897 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 10:27:40.287012 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 10:27:40.287126 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 10:27:40.287212 Not connected, no need to disconnect.
221 10:27:40.287302 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 10:27:40.287397 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 10:27:40.287476 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
224 10:27:40.290452 Setting prompt string to ['lava-test: # ']
225 10:27:40.290778 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 10:27:40.290918 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 10:27:40.291032 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 10:27:40.291138 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 10:27:40.291352 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
230 10:27:49.637109 >> Command sent successfully.
231 10:27:49.639414 Returned 0 in 9 seconds
232 10:27:49.740207 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 10:27:49.740897 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 10:27:49.741015 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 10:27:49.741113 Setting prompt string to 'Starting depthcharge on Helios...'
237 10:27:49.741190 Changing prompt to 'Starting depthcharge on Helios...'
238 10:27:49.741271 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 10:27:49.741557 [Enter `^Ec?' for help]
240 10:27:49.741648
241 10:27:49.741726
242 10:27:49.741797 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 10:27:49.741870 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 10:27:49.741940 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 10:27:49.742007 CPU: AES supported, TXT NOT supported, VT supported
246 10:27:49.742075 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 10:27:49.742142 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 10:27:49.742207 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 10:27:49.742272 VBOOT: Loading verstage.
250 10:27:49.742338 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 10:27:49.742403 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 10:27:49.742469 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 10:27:49.742535 CBFS @ c08000 size 3f8000
254 10:27:49.742599 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 10:27:49.742664 CBFS: Locating 'fallback/verstage'
256 10:27:49.742729 CBFS: Found @ offset 10fb80 size 1072c
257 10:27:49.742801
258 10:27:49.742868
259 10:27:49.742932 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 10:27:49.742999 Probing TPM: . done!
261 10:27:49.743063 TPM ready after 0 ms
262 10:27:49.743127 Connected to device vid:did:rid of 1ae0:0028:00
263 10:27:49.743192 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 10:27:49.743260 Initialized TPM device CR50 revision 0
265 10:27:49.743324 tlcl_send_startup: Startup return code is 0
266 10:27:49.743389 TPM: setup succeeded
267 10:27:49.743453 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 10:27:49.743519 Chrome EC: UHEPI supported
269 10:27:49.743582 Phase 1
270 10:27:49.743645 FMAP: area GBB found @ c05000 (12288 bytes)
271 10:27:49.743710 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 10:27:49.743775 Phase 2
273 10:27:49.743860 Phase 3
274 10:27:49.743953 FMAP: area GBB found @ c05000 (12288 bytes)
275 10:27:49.744023 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 10:27:49.744089 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 10:27:49.744153 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 10:27:49.744224 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 10:27:49.744288 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 10:27:49.744354 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 10:27:49.744426 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 10:27:49.744493 Phase 4
283 10:27:49.744557 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 10:27:49.744622 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 10:27:49.744686 VB2:vb2_rsa_verify_digest() Digest check failed!
286 10:27:49.744750 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 10:27:49.744814 Saving nvdata
288 10:27:49.744878 Reboot requested (10020007)
289 10:27:49.744943 board_reset() called!
290 10:27:49.745007 full_reset() called!
291 10:27:53.319055
292 10:27:53.319661
293 10:27:53.328819 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 10:27:53.332135 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 10:27:53.338676 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 10:27:53.342109 CPU: AES supported, TXT NOT supported, VT supported
297 10:27:53.348536 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 10:27:53.351935 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 10:27:53.358332 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 10:27:53.362325 VBOOT: Loading verstage.
301 10:27:53.365341 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 10:27:53.371800 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 10:27:53.378864 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 10:27:53.379350 CBFS @ c08000 size 3f8000
305 10:27:53.385630 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 10:27:53.388796 CBFS: Locating 'fallback/verstage'
307 10:27:53.391798 CBFS: Found @ offset 10fb80 size 1072c
308 10:27:53.396123
309 10:27:53.396630
310 10:27:53.405600 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 10:27:53.420244 Probing TPM: . done!
312 10:27:53.423444 TPM ready after 0 ms
313 10:27:53.426497 Connected to device vid:did:rid of 1ae0:0028:00
314 10:27:53.436690 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
315 10:27:53.439964 Initialized TPM device CR50 revision 0
316 10:27:53.482481 tlcl_send_startup: Startup return code is 0
317 10:27:53.482601 TPM: setup succeeded
318 10:27:53.494879 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 10:27:53.498709 Chrome EC: UHEPI supported
320 10:27:53.502171 Phase 1
321 10:27:53.505651 FMAP: area GBB found @ c05000 (12288 bytes)
322 10:27:53.512098 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 10:27:53.518828 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 10:27:53.522189 Recovery requested (1009000e)
325 10:27:53.527803 Saving nvdata
326 10:27:53.533734 tlcl_extend: response is 0
327 10:27:53.542404 tlcl_extend: response is 0
328 10:27:53.549754 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 10:27:53.553034 CBFS @ c08000 size 3f8000
330 10:27:53.559849 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 10:27:53.563038 CBFS: Locating 'fallback/romstage'
332 10:27:53.566061 CBFS: Found @ offset 80 size 145fc
333 10:27:53.569229 Accumulated console time in verstage 98 ms
334 10:27:53.569332
335 10:27:53.569411
336 10:27:53.582717 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 10:27:53.589732 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 10:27:53.593083 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 10:27:53.596264 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 10:27:53.602790 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 10:27:53.606132 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 10:27:53.609318 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 10:27:53.612699 TCO_STS: 0000 0000
344 10:27:53.616158 GEN_PMCON: e0015238 00000200
345 10:27:53.619462 GBLRST_CAUSE: 00000000 00000000
346 10:27:53.619551 prev_sleep_state 5
347 10:27:53.623347 Boot Count incremented to 44778
348 10:27:53.629275 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 10:27:53.632685 CBFS @ c08000 size 3f8000
350 10:27:53.639320 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 10:27:53.639421 CBFS: Locating 'fspm.bin'
352 10:27:53.645825 CBFS: Found @ offset 5ffc0 size 71000
353 10:27:53.649034 Chrome EC: UHEPI supported
354 10:27:53.655690 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 10:27:53.659169 Probing TPM: done!
356 10:27:53.665943 Connected to device vid:did:rid of 1ae0:0028:00
357 10:27:53.675795 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 10:27:53.681954 Initialized TPM device CR50 revision 0
359 10:27:53.690995 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 10:27:53.697793 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 10:27:53.700962 MRC cache found, size 1948
362 10:27:53.704237 bootmode is set to: 2
363 10:27:53.707642 PRMRR disabled by config.
364 10:27:53.710544 SPD INDEX = 1
365 10:27:53.714455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 10:27:53.717166 CBFS @ c08000 size 3f8000
367 10:27:53.723805 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 10:27:53.723906 CBFS: Locating 'spd.bin'
369 10:27:53.727452 CBFS: Found @ offset 5fb80 size 400
370 10:27:53.730457 SPD: module type is LPDDR3
371 10:27:53.733824 SPD: module part is
372 10:27:53.740414 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 10:27:53.743740 SPD: device width 4 bits, bus width 8 bits
374 10:27:53.747229 SPD: module size is 4096 MB (per channel)
375 10:27:53.750566 memory slot: 0 configuration done.
376 10:27:53.753816 memory slot: 2 configuration done.
377 10:27:53.805588 CBMEM:
378 10:27:53.809041 IMD: root @ 99fff000 254 entries.
379 10:27:53.812090 IMD: root @ 99ffec00 62 entries.
380 10:27:53.815203 External stage cache:
381 10:27:53.818682 IMD: root @ 9abff000 254 entries.
382 10:27:53.821970 IMD: root @ 9abfec00 62 entries.
383 10:27:53.828513 Chrome EC: clear events_b mask to 0x0000000020004000
384 10:27:53.845915 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 10:27:53.854330 tlcl_write: response is 0
386 10:27:53.863436 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 10:27:53.870008 MRC: TPM MRC hash updated successfully.
388 10:27:53.870111 2 DIMMs found
389 10:27:53.873296 SMM Memory Map
390 10:27:53.877081 SMRAM : 0x9a000000 0x1000000
391 10:27:53.879839 Subregion 0: 0x9a000000 0xa00000
392 10:27:53.883518 Subregion 1: 0x9aa00000 0x200000
393 10:27:53.886715 Subregion 2: 0x9ac00000 0x400000
394 10:27:53.889862 top_of_ram = 0x9a000000
395 10:27:53.893039 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 10:27:53.899586 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 10:27:53.903501 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 10:27:53.909911 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 10:27:53.913394 CBFS @ c08000 size 3f8000
400 10:27:53.916100 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 10:27:53.919609 CBFS: Locating 'fallback/postcar'
402 10:27:53.926535 CBFS: Found @ offset 107000 size 4b44
403 10:27:53.929842 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 10:27:53.941673 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 10:27:53.945375 Processing 180 relocs. Offset value of 0x97c0c000
406 10:27:53.954086 Accumulated console time in romstage 286 ms
407 10:27:53.954204
408 10:27:53.954307
409 10:27:53.963919 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 10:27:53.970109 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 10:27:53.973619 CBFS @ c08000 size 3f8000
412 10:27:53.980044 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 10:27:53.983397 CBFS: Locating 'fallback/ramstage'
414 10:27:53.986551 CBFS: Found @ offset 43380 size 1b9e8
415 10:27:53.993018 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 10:27:54.025193 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 10:27:54.028624 Processing 3976 relocs. Offset value of 0x98db0000
418 10:27:54.035140 Accumulated console time in postcar 52 ms
419 10:27:54.035249
420 10:27:54.035330
421 10:27:54.045218 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 10:27:54.051871 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 10:27:54.054908 WARNING: RO_VPD is uninitialized or empty.
424 10:27:54.058228 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 10:27:54.065699 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 10:27:54.065805 Normal boot.
427 10:27:54.071879 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 10:27:54.075485 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 10:27:54.078474 CBFS @ c08000 size 3f8000
430 10:27:54.084908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 10:27:54.088201 CBFS: Locating 'cpu_microcode_blob.bin'
432 10:27:54.091402 CBFS: Found @ offset 14700 size 2ec00
433 10:27:54.095014 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 10:27:54.098236 Skip microcode update
435 10:27:54.104748 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 10:27:54.104850 CBFS @ c08000 size 3f8000
437 10:27:54.111303 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 10:27:54.115039 CBFS: Locating 'fsps.bin'
439 10:27:54.118374 CBFS: Found @ offset d1fc0 size 35000
440 10:27:54.143712 Detected 4 core, 8 thread CPU.
441 10:27:54.147272 Setting up SMI for CPU
442 10:27:54.150019 IED base = 0x9ac00000
443 10:27:54.150122 IED size = 0x00400000
444 10:27:54.153303 Will perform SMM setup.
445 10:27:54.159933 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 10:27:54.166876 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 10:27:54.170264 Processing 16 relocs. Offset value of 0x00030000
448 10:27:54.174055 Attempting to start 7 APs
449 10:27:54.177306 Waiting for 10ms after sending INIT.
450 10:27:54.193260 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
451 10:27:54.193362 done.
452 10:27:54.197030 AP: slot 4 apic_id 4.
453 10:27:54.199796 AP: slot 6 apic_id 5.
454 10:27:54.199886 AP: slot 5 apic_id 7.
455 10:27:54.203126 AP: slot 7 apic_id 6.
456 10:27:54.206414 AP: slot 1 apic_id 3.
457 10:27:54.206508 AP: slot 3 apic_id 2.
458 10:27:54.213336 Waiting for 2nd SIPI to complete...done.
459 10:27:54.219871 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 10:27:54.223187 Processing 13 relocs. Offset value of 0x00038000
461 10:27:54.229825 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 10:27:54.236357 Installing SMM handler to 0x9a000000
463 10:27:54.243002 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 10:27:54.246321 Processing 658 relocs. Offset value of 0x9a010000
465 10:27:54.256211 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 10:27:54.260117 Processing 13 relocs. Offset value of 0x9a008000
467 10:27:54.266171 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 10:27:54.272725 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 10:27:54.276041 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 10:27:54.282627 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 10:27:54.289849 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 10:27:54.295665 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 10:27:54.299757 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 10:27:54.306108 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 10:27:54.309302 Clearing SMI status registers
476 10:27:54.312800 SMI_STS: PM1
477 10:27:54.312901 PM1_STS: PWRBTN
478 10:27:54.316193 TCO_STS: SECOND_TO
479 10:27:54.319494 New SMBASE 0x9a000000
480 10:27:54.323231 In relocation handler: CPU 0
481 10:27:54.326381 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 10:27:54.329139 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 10:27:54.332382 Relocation complete.
484 10:27:54.335719 New SMBASE 0x99fff800
485 10:27:54.335819 In relocation handler: CPU 2
486 10:27:54.342552 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 10:27:54.345890 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 10:27:54.349336 Relocation complete.
489 10:27:54.352568 New SMBASE 0x99fff000
490 10:27:54.352668 In relocation handler: CPU 4
491 10:27:54.359268 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
492 10:27:54.362667 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 10:27:54.365942 Relocation complete.
494 10:27:54.366032 New SMBASE 0x99ffe800
495 10:27:54.369398 In relocation handler: CPU 6
496 10:27:54.376049 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
497 10:27:54.378940 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 10:27:54.382275 Relocation complete.
499 10:27:54.382404 New SMBASE 0x99ffec00
500 10:27:54.386165 In relocation handler: CPU 5
501 10:27:54.393018 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
502 10:27:54.395475 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 10:27:54.398991 Relocation complete.
504 10:27:54.399094 New SMBASE 0x99ffe400
505 10:27:54.402392 In relocation handler: CPU 7
506 10:27:54.405645 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
507 10:27:54.412361 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 10:27:54.415708 Relocation complete.
509 10:27:54.415807 New SMBASE 0x99fffc00
510 10:27:54.419266 In relocation handler: CPU 1
511 10:27:54.422444 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
512 10:27:54.429123 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 10:27:54.432471 Relocation complete.
514 10:27:54.432569 New SMBASE 0x99fff400
515 10:27:54.435005 In relocation handler: CPU 3
516 10:27:54.438430 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 10:27:54.445112 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 10:27:54.445228 Relocation complete.
519 10:27:54.448491 Initializing CPU #0
520 10:27:54.451795 CPU: vendor Intel device 806ec
521 10:27:54.455116 CPU: family 06, model 8e, stepping 0c
522 10:27:54.458243 Clearing out pending MCEs
523 10:27:54.461684 Setting up local APIC...
524 10:27:54.461774 apic_id: 0x00 done.
525 10:27:54.465261 Turbo is available but hidden
526 10:27:54.468435 Turbo is available and visible
527 10:27:54.471692 VMX status: enabled
528 10:27:54.475197 IA32_FEATURE_CONTROL status: locked
529 10:27:54.478501 Skip microcode update
530 10:27:54.478594 CPU #0 initialized
531 10:27:54.481690 Initializing CPU #2
532 10:27:54.485146 Initializing CPU #7
533 10:27:54.485236 Initializing CPU #1
534 10:27:54.488206 Initializing CPU #3
535 10:27:54.491537 CPU: vendor Intel device 806ec
536 10:27:54.494775 CPU: family 06, model 8e, stepping 0c
537 10:27:54.498279 CPU: vendor Intel device 806ec
538 10:27:54.501371 CPU: family 06, model 8e, stepping 0c
539 10:27:54.504599 Clearing out pending MCEs
540 10:27:54.507921 Clearing out pending MCEs
541 10:27:54.508021 Setting up local APIC...
542 10:27:54.511327 CPU: vendor Intel device 806ec
543 10:27:54.514360 CPU: family 06, model 8e, stepping 0c
544 10:27:54.517808 Initializing CPU #5
545 10:27:54.521184 Clearing out pending MCEs
546 10:27:54.524528 CPU: vendor Intel device 806ec
547 10:27:54.527937 CPU: family 06, model 8e, stepping 0c
548 10:27:54.531355 Setting up local APIC...
549 10:27:54.534637 CPU: vendor Intel device 806ec
550 10:27:54.537896 CPU: family 06, model 8e, stepping 0c
551 10:27:54.541546 Clearing out pending MCEs
552 10:27:54.541645 Clearing out pending MCEs
553 10:27:54.544726 apic_id: 0x06 done.
554 10:27:54.547993 Setting up local APIC...
555 10:27:54.548091 apic_id: 0x03 done.
556 10:27:54.551219 Setting up local APIC...
557 10:27:54.554225 VMX status: enabled
558 10:27:54.554323 apic_id: 0x07 done.
559 10:27:54.560856 IA32_FEATURE_CONTROL status: locked
560 10:27:54.560954 VMX status: enabled
561 10:27:54.564018 Skip microcode update
562 10:27:54.567547 IA32_FEATURE_CONTROL status: locked
563 10:27:54.570737 CPU #7 initialized
564 10:27:54.570833 Skip microcode update
565 10:27:54.574084 Setting up local APIC...
566 10:27:54.577386 VMX status: enabled
567 10:27:54.577475 apic_id: 0x02 done.
568 10:27:54.580820 IA32_FEATURE_CONTROL status: locked
569 10:27:54.583875 VMX status: enabled
570 10:27:54.587711 Skip microcode update
571 10:27:54.590798 IA32_FEATURE_CONTROL status: locked
572 10:27:54.590919 CPU #1 initialized
573 10:27:54.593997 Skip microcode update
574 10:27:54.597238 apic_id: 0x01 done.
575 10:27:54.597340 CPU #5 initialized
576 10:27:54.600879 CPU #3 initialized
577 10:27:54.600987 VMX status: enabled
578 10:27:54.603970 Initializing CPU #6
579 10:27:54.607035 Initializing CPU #4
580 10:27:54.610378 CPU: vendor Intel device 806ec
581 10:27:54.614457 CPU: family 06, model 8e, stepping 0c
582 10:27:54.617125 CPU: vendor Intel device 806ec
583 10:27:54.620816 CPU: family 06, model 8e, stepping 0c
584 10:27:54.624030 Clearing out pending MCEs
585 10:27:54.624123 Clearing out pending MCEs
586 10:27:54.627321 Setting up local APIC...
587 10:27:54.630647 IA32_FEATURE_CONTROL status: locked
588 10:27:54.634015 apic_id: 0x05 done.
589 10:27:54.637393 Setting up local APIC...
590 10:27:54.637486 VMX status: enabled
591 10:27:54.640553 apic_id: 0x04 done.
592 10:27:54.643801 IA32_FEATURE_CONTROL status: locked
593 10:27:54.647404 VMX status: enabled
594 10:27:54.647513 Skip microcode update
595 10:27:54.650651 IA32_FEATURE_CONTROL status: locked
596 10:27:54.653330 CPU #6 initialized
597 10:27:54.657171 Skip microcode update
598 10:27:54.657272 Skip microcode update
599 10:27:54.660522 CPU #4 initialized
600 10:27:54.663725 CPU #2 initialized
601 10:27:54.667005 bsp_do_flight_plan done after 452 msecs.
602 10:27:54.670522 CPU: frequency set to 4200 MHz
603 10:27:54.670616 Enabling SMIs.
604 10:27:54.673162 Locking SMM.
605 10:27:54.686758 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 10:27:54.690855 CBFS @ c08000 size 3f8000
607 10:27:54.696695 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 10:27:54.696808 CBFS: Locating 'vbt.bin'
609 10:27:54.703140 CBFS: Found @ offset 5f5c0 size 499
610 10:27:54.707141 Found a VBT of 4608 bytes after decompression
611 10:27:54.889576 Display FSP Version Info HOB
612 10:27:54.892699 Reference Code - CPU = 9.0.1e.30
613 10:27:54.896101 uCode Version = 0.0.0.ca
614 10:27:54.899275 TXT ACM version = ff.ff.ff.ffff
615 10:27:54.902967 Display FSP Version Info HOB
616 10:27:54.906533 Reference Code - ME = 9.0.1e.30
617 10:27:54.909701 MEBx version = 0.0.0.0
618 10:27:54.912551 ME Firmware Version = Consumer SKU
619 10:27:54.916421 Display FSP Version Info HOB
620 10:27:54.919021 Reference Code - CML PCH = 9.0.1e.30
621 10:27:54.922330 PCH-CRID Status = Disabled
622 10:27:54.925663 PCH-CRID Original Value = ff.ff.ff.ffff
623 10:27:54.928987 PCH-CRID New Value = ff.ff.ff.ffff
624 10:27:54.932347 OPROM - RST - RAID = ff.ff.ff.ffff
625 10:27:54.935829 ChipsetInit Base Version = ff.ff.ff.ffff
626 10:27:54.939112 ChipsetInit Oem Version = ff.ff.ff.ffff
627 10:27:54.942223 Display FSP Version Info HOB
628 10:27:54.948856 Reference Code - SA - System Agent = 9.0.1e.30
629 10:27:54.952812 Reference Code - MRC = 0.7.1.6c
630 10:27:54.952914 SA - PCIe Version = 9.0.1e.30
631 10:27:54.956043 SA-CRID Status = Disabled
632 10:27:54.959394 SA-CRID Original Value = 0.0.0.c
633 10:27:54.962470 SA-CRID New Value = 0.0.0.c
634 10:27:54.966024 OPROM - VBIOS = ff.ff.ff.ffff
635 10:27:54.969330 RTC Init
636 10:27:54.972624 Set power on after power failure.
637 10:27:54.972724 Disabling Deep S3
638 10:27:54.975727 Disabling Deep S3
639 10:27:54.975830 Disabling Deep S4
640 10:27:54.979243 Disabling Deep S4
641 10:27:54.979344 Disabling Deep S5
642 10:27:54.982585 Disabling Deep S5
643 10:27:54.988775 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
644 10:27:54.988891 Enumerating buses...
645 10:27:54.995623 Show all devs... Before device enumeration.
646 10:27:54.995724 Root Device: enabled 1
647 10:27:54.998905 CPU_CLUSTER: 0: enabled 1
648 10:27:55.001877 DOMAIN: 0000: enabled 1
649 10:27:55.005891 APIC: 00: enabled 1
650 10:27:55.006005 PCI: 00:00.0: enabled 1
651 10:27:55.008646 PCI: 00:02.0: enabled 1
652 10:27:55.012143 PCI: 00:04.0: enabled 0
653 10:27:55.015289 PCI: 00:05.0: enabled 0
654 10:27:55.015389 PCI: 00:12.0: enabled 1
655 10:27:55.018547 PCI: 00:12.5: enabled 0
656 10:27:55.021923 PCI: 00:12.6: enabled 0
657 10:27:55.022061 PCI: 00:14.0: enabled 1
658 10:27:55.024997 PCI: 00:14.1: enabled 0
659 10:27:55.028802 PCI: 00:14.3: enabled 1
660 10:27:55.032116 PCI: 00:14.5: enabled 0
661 10:27:55.032217 PCI: 00:15.0: enabled 1
662 10:27:55.035222 PCI: 00:15.1: enabled 1
663 10:27:55.038645 PCI: 00:15.2: enabled 0
664 10:27:55.042018 PCI: 00:15.3: enabled 0
665 10:27:55.042119 PCI: 00:16.0: enabled 1
666 10:27:55.045091 PCI: 00:16.1: enabled 0
667 10:27:55.048444 PCI: 00:16.2: enabled 0
668 10:27:55.051937 PCI: 00:16.3: enabled 0
669 10:27:55.052038 PCI: 00:16.4: enabled 0
670 10:27:55.055396 PCI: 00:16.5: enabled 0
671 10:27:55.058430 PCI: 00:17.0: enabled 1
672 10:27:55.061510 PCI: 00:19.0: enabled 1
673 10:27:55.061606 PCI: 00:19.1: enabled 0
674 10:27:55.064847 PCI: 00:19.2: enabled 0
675 10:27:55.068063 PCI: 00:1a.0: enabled 0
676 10:27:55.068173 PCI: 00:1c.0: enabled 0
677 10:27:55.071348 PCI: 00:1c.1: enabled 0
678 10:27:55.074507 PCI: 00:1c.2: enabled 0
679 10:27:55.077979 PCI: 00:1c.3: enabled 0
680 10:27:55.078105 PCI: 00:1c.4: enabled 0
681 10:27:55.081341 PCI: 00:1c.5: enabled 0
682 10:27:55.084619 PCI: 00:1c.6: enabled 0
683 10:27:55.087858 PCI: 00:1c.7: enabled 0
684 10:27:55.087971 PCI: 00:1d.0: enabled 1
685 10:27:55.091411 PCI: 00:1d.1: enabled 0
686 10:27:55.094388 PCI: 00:1d.2: enabled 0
687 10:27:55.098022 PCI: 00:1d.3: enabled 0
688 10:27:55.098122 PCI: 00:1d.4: enabled 0
689 10:27:55.101083 PCI: 00:1d.5: enabled 1
690 10:27:55.104405 PCI: 00:1e.0: enabled 1
691 10:27:55.107641 PCI: 00:1e.1: enabled 0
692 10:27:55.107735 PCI: 00:1e.2: enabled 1
693 10:27:55.111245 PCI: 00:1e.3: enabled 1
694 10:27:55.114204 PCI: 00:1f.0: enabled 1
695 10:27:55.114302 PCI: 00:1f.1: enabled 1
696 10:27:55.117620 PCI: 00:1f.2: enabled 1
697 10:27:55.120948 PCI: 00:1f.3: enabled 1
698 10:27:55.124101 PCI: 00:1f.4: enabled 1
699 10:27:55.124195 PCI: 00:1f.5: enabled 1
700 10:27:55.127375 PCI: 00:1f.6: enabled 0
701 10:27:55.130670 USB0 port 0: enabled 1
702 10:27:55.133917 I2C: 00:15: enabled 1
703 10:27:55.134007 I2C: 00:5d: enabled 1
704 10:27:55.137304 GENERIC: 0.0: enabled 1
705 10:27:55.140445 I2C: 00:1a: enabled 1
706 10:27:55.140564 I2C: 00:38: enabled 1
707 10:27:55.143970 I2C: 00:39: enabled 1
708 10:27:55.147454 I2C: 00:3a: enabled 1
709 10:27:55.147545 I2C: 00:3b: enabled 1
710 10:27:55.150676 PCI: 00:00.0: enabled 1
711 10:27:55.154094 SPI: 00: enabled 1
712 10:27:55.154185 SPI: 01: enabled 1
713 10:27:55.157229 PNP: 0c09.0: enabled 1
714 10:27:55.160632 USB2 port 0: enabled 1
715 10:27:55.160731 USB2 port 1: enabled 1
716 10:27:55.163615 USB2 port 2: enabled 0
717 10:27:55.166972 USB2 port 3: enabled 0
718 10:27:55.170434 USB2 port 5: enabled 0
719 10:27:55.170521 USB2 port 6: enabled 1
720 10:27:55.173762 USB2 port 9: enabled 1
721 10:27:55.177008 USB3 port 0: enabled 1
722 10:27:55.177118 USB3 port 1: enabled 1
723 10:27:55.180257 USB3 port 2: enabled 1
724 10:27:55.183623 USB3 port 3: enabled 1
725 10:27:55.183710 USB3 port 4: enabled 0
726 10:27:55.186943 APIC: 03: enabled 1
727 10:27:55.190134 APIC: 01: enabled 1
728 10:27:55.190225 APIC: 02: enabled 1
729 10:27:55.193350 APIC: 04: enabled 1
730 10:27:55.197060 APIC: 07: enabled 1
731 10:27:55.197150 APIC: 05: enabled 1
732 10:27:55.199885 APIC: 06: enabled 1
733 10:27:55.199973 Compare with tree...
734 10:27:55.203883 Root Device: enabled 1
735 10:27:55.206844 CPU_CLUSTER: 0: enabled 1
736 10:27:55.210120 APIC: 00: enabled 1
737 10:27:55.210220 APIC: 03: enabled 1
738 10:27:55.213456 APIC: 01: enabled 1
739 10:27:55.216613 APIC: 02: enabled 1
740 10:27:55.216711 APIC: 04: enabled 1
741 10:27:55.219781 APIC: 07: enabled 1
742 10:27:55.223054 APIC: 05: enabled 1
743 10:27:55.223142 APIC: 06: enabled 1
744 10:27:55.227000 DOMAIN: 0000: enabled 1
745 10:27:55.230382 PCI: 00:00.0: enabled 1
746 10:27:55.233491 PCI: 00:02.0: enabled 1
747 10:27:55.236779 PCI: 00:04.0: enabled 0
748 10:27:55.236880 PCI: 00:05.0: enabled 0
749 10:27:55.240214 PCI: 00:12.0: enabled 1
750 10:27:55.243424 PCI: 00:12.5: enabled 0
751 10:27:55.246728 PCI: 00:12.6: enabled 0
752 10:27:55.249885 PCI: 00:14.0: enabled 1
753 10:27:55.249986 USB0 port 0: enabled 1
754 10:27:55.253237 USB2 port 0: enabled 1
755 10:27:55.256607 USB2 port 1: enabled 1
756 10:27:55.259831 USB2 port 2: enabled 0
757 10:27:55.263242 USB2 port 3: enabled 0
758 10:27:55.263343 USB2 port 5: enabled 0
759 10:27:55.266568 USB2 port 6: enabled 1
760 10:27:55.269620 USB2 port 9: enabled 1
761 10:27:55.273001 USB3 port 0: enabled 1
762 10:27:55.276095 USB3 port 1: enabled 1
763 10:27:55.279356 USB3 port 2: enabled 1
764 10:27:55.279458 USB3 port 3: enabled 1
765 10:27:55.282840 USB3 port 4: enabled 0
766 10:27:55.286295 PCI: 00:14.1: enabled 0
767 10:27:55.289302 PCI: 00:14.3: enabled 1
768 10:27:55.292606 PCI: 00:14.5: enabled 0
769 10:27:55.292706 PCI: 00:15.0: enabled 1
770 10:27:55.295927 I2C: 00:15: enabled 1
771 10:27:55.299117 PCI: 00:15.1: enabled 1
772 10:27:55.302340 I2C: 00:5d: enabled 1
773 10:27:55.306092 GENERIC: 0.0: enabled 1
774 10:27:55.306193 PCI: 00:15.2: enabled 0
775 10:27:55.309457 PCI: 00:15.3: enabled 0
776 10:27:55.312696 PCI: 00:16.0: enabled 1
777 10:27:55.316040 PCI: 00:16.1: enabled 0
778 10:27:55.319266 PCI: 00:16.2: enabled 0
779 10:27:55.319366 PCI: 00:16.3: enabled 0
780 10:27:55.322647 PCI: 00:16.4: enabled 0
781 10:27:55.325850 PCI: 00:16.5: enabled 0
782 10:27:55.328802 PCI: 00:17.0: enabled 1
783 10:27:55.332266 PCI: 00:19.0: enabled 1
784 10:27:55.332364 I2C: 00:1a: enabled 1
785 10:27:55.335511 I2C: 00:38: enabled 1
786 10:27:55.338698 I2C: 00:39: enabled 1
787 10:27:55.341824 I2C: 00:3a: enabled 1
788 10:27:55.341913 I2C: 00:3b: enabled 1
789 10:27:55.345350 PCI: 00:19.1: enabled 0
790 10:27:55.348697 PCI: 00:19.2: enabled 0
791 10:27:55.351966 PCI: 00:1a.0: enabled 0
792 10:27:55.355072 PCI: 00:1c.0: enabled 0
793 10:27:55.355173 PCI: 00:1c.1: enabled 0
794 10:27:55.358419 PCI: 00:1c.2: enabled 0
795 10:27:55.361702 PCI: 00:1c.3: enabled 0
796 10:27:55.365145 PCI: 00:1c.4: enabled 0
797 10:27:55.368306 PCI: 00:1c.5: enabled 0
798 10:27:55.368406 PCI: 00:1c.6: enabled 0
799 10:27:55.372159 PCI: 00:1c.7: enabled 0
800 10:27:55.375549 PCI: 00:1d.0: enabled 1
801 10:27:55.378598 PCI: 00:1d.1: enabled 0
802 10:27:55.378697 PCI: 00:1d.2: enabled 0
803 10:27:55.381853 PCI: 00:1d.3: enabled 0
804 10:27:55.385043 PCI: 00:1d.4: enabled 0
805 10:27:55.388264 PCI: 00:1d.5: enabled 1
806 10:27:55.392448 PCI: 00:00.0: enabled 1
807 10:27:55.392553 PCI: 00:1e.0: enabled 1
808 10:27:55.394951 PCI: 00:1e.1: enabled 0
809 10:27:55.398793 PCI: 00:1e.2: enabled 1
810 10:27:55.401556 SPI: 00: enabled 1
811 10:27:55.401651 PCI: 00:1e.3: enabled 1
812 10:27:55.405320 SPI: 01: enabled 1
813 10:27:55.408788 PCI: 00:1f.0: enabled 1
814 10:27:55.411868 PNP: 0c09.0: enabled 1
815 10:27:55.415077 PCI: 00:1f.1: enabled 1
816 10:27:55.415166 PCI: 00:1f.2: enabled 1
817 10:27:55.418407 PCI: 00:1f.3: enabled 1
818 10:27:55.421545 PCI: 00:1f.4: enabled 1
819 10:27:55.424740 PCI: 00:1f.5: enabled 1
820 10:27:55.428374 PCI: 00:1f.6: enabled 0
821 10:27:55.428474 Root Device scanning...
822 10:27:55.431639 scan_static_bus for Root Device
823 10:27:55.435151 CPU_CLUSTER: 0 enabled
824 10:27:55.438128 DOMAIN: 0000 enabled
825 10:27:55.438217 DOMAIN: 0000 scanning...
826 10:27:55.441600 PCI: pci_scan_bus for bus 00
827 10:27:55.444822 PCI: 00:00.0 [8086/0000] ops
828 10:27:55.448185 PCI: 00:00.0 [8086/9b61] enabled
829 10:27:55.451707 PCI: 00:02.0 [8086/0000] bus ops
830 10:27:55.454705 PCI: 00:02.0 [8086/9b41] enabled
831 10:27:55.458190 PCI: 00:04.0 [8086/1903] disabled
832 10:27:55.461389 PCI: 00:08.0 [8086/1911] enabled
833 10:27:55.464826 PCI: 00:12.0 [8086/02f9] enabled
834 10:27:55.468044 PCI: 00:14.0 [8086/0000] bus ops
835 10:27:55.471290 PCI: 00:14.0 [8086/02ed] enabled
836 10:27:55.475082 PCI: 00:14.2 [8086/02ef] enabled
837 10:27:55.478105 PCI: 00:14.3 [8086/02f0] enabled
838 10:27:55.481451 PCI: 00:15.0 [8086/0000] bus ops
839 10:27:55.484789 PCI: 00:15.0 [8086/02e8] enabled
840 10:27:55.488144 PCI: 00:15.1 [8086/0000] bus ops
841 10:27:55.491457 PCI: 00:15.1 [8086/02e9] enabled
842 10:27:55.494862 PCI: 00:16.0 [8086/0000] ops
843 10:27:55.498253 PCI: 00:16.0 [8086/02e0] enabled
844 10:27:55.501441 PCI: 00:17.0 [8086/0000] ops
845 10:27:55.504764 PCI: 00:17.0 [8086/02d3] enabled
846 10:27:55.508161 PCI: 00:19.0 [8086/0000] bus ops
847 10:27:55.511013 PCI: 00:19.0 [8086/02c5] enabled
848 10:27:55.514377 PCI: 00:1d.0 [8086/0000] bus ops
849 10:27:55.517758 PCI: 00:1d.0 [8086/02b0] enabled
850 10:27:55.524343 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 10:27:55.528009 PCI: 00:1e.0 [8086/0000] ops
852 10:27:55.531294 PCI: 00:1e.0 [8086/02a8] enabled
853 10:27:55.534382 PCI: 00:1e.2 [8086/0000] bus ops
854 10:27:55.537800 PCI: 00:1e.2 [8086/02aa] enabled
855 10:27:55.541055 PCI: 00:1e.3 [8086/0000] bus ops
856 10:27:55.544226 PCI: 00:1e.3 [8086/02ab] enabled
857 10:27:55.547516 PCI: 00:1f.0 [8086/0000] bus ops
858 10:27:55.551287 PCI: 00:1f.0 [8086/0284] enabled
859 10:27:55.554594 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 10:27:55.561112 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 10:27:55.564343 PCI: 00:1f.3 [8086/0000] bus ops
862 10:27:55.567514 PCI: 00:1f.3 [8086/02c8] enabled
863 10:27:55.570771 PCI: 00:1f.4 [8086/0000] bus ops
864 10:27:55.574101 PCI: 00:1f.4 [8086/02a3] enabled
865 10:27:55.577997 PCI: 00:1f.5 [8086/0000] bus ops
866 10:27:55.581283 PCI: 00:1f.5 [8086/02a4] enabled
867 10:27:55.584323 PCI: Leftover static devices:
868 10:27:55.584423 PCI: 00:05.0
869 10:27:55.587725 PCI: 00:12.5
870 10:27:55.587823 PCI: 00:12.6
871 10:27:55.591109 PCI: 00:14.1
872 10:27:55.591202 PCI: 00:14.5
873 10:27:55.594623 PCI: 00:15.2
874 10:27:55.594724 PCI: 00:15.3
875 10:27:55.594813 PCI: 00:16.1
876 10:27:55.597693 PCI: 00:16.2
877 10:27:55.597789 PCI: 00:16.3
878 10:27:55.601014 PCI: 00:16.4
879 10:27:55.601102 PCI: 00:16.5
880 10:27:55.601177 PCI: 00:19.1
881 10:27:55.603843 PCI: 00:19.2
882 10:27:55.603937 PCI: 00:1a.0
883 10:27:55.607568 PCI: 00:1c.0
884 10:27:55.607660 PCI: 00:1c.1
885 10:27:55.607737 PCI: 00:1c.2
886 10:27:55.610663 PCI: 00:1c.3
887 10:27:55.610770 PCI: 00:1c.4
888 10:27:55.613733 PCI: 00:1c.5
889 10:27:55.613844 PCI: 00:1c.6
890 10:27:55.617084 PCI: 00:1c.7
891 10:27:55.617195 PCI: 00:1d.1
892 10:27:55.617274 PCI: 00:1d.2
893 10:27:55.620435 PCI: 00:1d.3
894 10:27:55.620535 PCI: 00:1d.4
895 10:27:55.624333 PCI: 00:1d.5
896 10:27:55.624432 PCI: 00:1e.1
897 10:27:55.624512 PCI: 00:1f.1
898 10:27:55.627455 PCI: 00:1f.2
899 10:27:55.627555 PCI: 00:1f.6
900 10:27:55.630590 PCI: Check your devicetree.cb.
901 10:27:55.633923 PCI: 00:02.0 scanning...
902 10:27:55.637049 scan_generic_bus for PCI: 00:02.0
903 10:27:55.640909 scan_generic_bus for PCI: 00:02.0 done
904 10:27:55.647498 scan_bus: scanning of bus PCI: 00:02.0 took 10174 usecs
905 10:27:55.650681 PCI: 00:14.0 scanning...
906 10:27:55.653827 scan_static_bus for PCI: 00:14.0
907 10:27:55.653931 USB0 port 0 enabled
908 10:27:55.657081 USB0 port 0 scanning...
909 10:27:55.660309 scan_static_bus for USB0 port 0
910 10:27:55.663763 USB2 port 0 enabled
911 10:27:55.663865 USB2 port 1 enabled
912 10:27:55.667031 USB2 port 2 disabled
913 10:27:55.670196 USB2 port 3 disabled
914 10:27:55.670296 USB2 port 5 disabled
915 10:27:55.673554 USB2 port 6 enabled
916 10:27:55.676882 USB2 port 9 enabled
917 10:27:55.676980 USB3 port 0 enabled
918 10:27:55.680136 USB3 port 1 enabled
919 10:27:55.680235 USB3 port 2 enabled
920 10:27:55.683351 USB3 port 3 enabled
921 10:27:55.686814 USB3 port 4 disabled
922 10:27:55.686921 USB2 port 0 scanning...
923 10:27:55.690020 scan_static_bus for USB2 port 0
924 10:27:55.696954 scan_static_bus for USB2 port 0 done
925 10:27:55.700247 scan_bus: scanning of bus USB2 port 0 took 9684 usecs
926 10:27:55.703591 USB2 port 1 scanning...
927 10:27:55.707127 scan_static_bus for USB2 port 1
928 10:27:55.710151 scan_static_bus for USB2 port 1 done
929 10:27:55.717095 scan_bus: scanning of bus USB2 port 1 took 9693 usecs
930 10:27:55.717203 USB2 port 6 scanning...
931 10:27:55.720212 scan_static_bus for USB2 port 6
932 10:27:55.726815 scan_static_bus for USB2 port 6 done
933 10:27:55.729928 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
934 10:27:55.733603 USB2 port 9 scanning...
935 10:27:55.736754 scan_static_bus for USB2 port 9
936 10:27:55.739988 scan_static_bus for USB2 port 9 done
937 10:27:55.747294 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
938 10:27:55.747397 USB3 port 0 scanning...
939 10:27:55.750140 scan_static_bus for USB3 port 0
940 10:27:55.756715 scan_static_bus for USB3 port 0 done
941 10:27:55.760226 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
942 10:27:55.763968 USB3 port 1 scanning...
943 10:27:55.767144 scan_static_bus for USB3 port 1
944 10:27:55.770478 scan_static_bus for USB3 port 1 done
945 10:27:55.776981 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
946 10:27:55.777085 USB3 port 2 scanning...
947 10:27:55.780432 scan_static_bus for USB3 port 2
948 10:27:55.786743 scan_static_bus for USB3 port 2 done
949 10:27:55.790300 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
950 10:27:55.793433 USB3 port 3 scanning...
951 10:27:55.796818 scan_static_bus for USB3 port 3
952 10:27:55.800071 scan_static_bus for USB3 port 3 done
953 10:27:55.806605 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
954 10:27:55.809772 scan_static_bus for USB0 port 0 done
955 10:27:55.817002 scan_bus: scanning of bus USB0 port 0 took 155359 usecs
956 10:27:55.819913 scan_static_bus for PCI: 00:14.0 done
957 10:27:55.823229 scan_bus: scanning of bus PCI: 00:14.0 took 172975 usecs
958 10:27:55.826699 PCI: 00:15.0 scanning...
959 10:27:55.829624 scan_generic_bus for PCI: 00:15.0
960 10:27:55.833104 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 10:27:55.839866 scan_generic_bus for PCI: 00:15.0 done
962 10:27:55.843412 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
963 10:27:55.846163 PCI: 00:15.1 scanning...
964 10:27:55.850080 scan_generic_bus for PCI: 00:15.1
965 10:27:55.852880 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 10:27:55.860013 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 10:27:55.863387 scan_generic_bus for PCI: 00:15.1 done
968 10:27:55.869755 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
969 10:27:55.869855 PCI: 00:19.0 scanning...
970 10:27:55.873156 scan_generic_bus for PCI: 00:19.0
971 10:27:55.879545 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 10:27:55.882827 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 10:27:55.886102 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 10:27:55.889278 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 10:27:55.896012 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 10:27:55.899300 scan_generic_bus for PCI: 00:19.0 done
977 10:27:55.902622 scan_bus: scanning of bus PCI: 00:19.0 took 30708 usecs
978 10:27:55.906441 PCI: 00:1d.0 scanning...
979 10:27:55.909586 do_pci_scan_bridge for PCI: 00:1d.0
980 10:27:55.912804 PCI: pci_scan_bus for bus 01
981 10:27:55.916010 PCI: 01:00.0 [1c5c/1327] enabled
982 10:27:55.919185 Enabling Common Clock Configuration
983 10:27:55.926129 L1 Sub-State supported from root port 29
984 10:27:55.929317 L1 Sub-State Support = 0xf
985 10:27:55.929423 CommonModeRestoreTime = 0x28
986 10:27:55.936239 Power On Value = 0x16, Power On Scale = 0x0
987 10:27:55.936338 ASPM: Enabled L1
988 10:27:55.942800 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
989 10:27:55.946087 PCI: 00:1e.2 scanning...
990 10:27:55.949088 scan_generic_bus for PCI: 00:1e.2
991 10:27:55.952298 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 10:27:55.955618 scan_generic_bus for PCI: 00:1e.2 done
993 10:27:55.962031 scan_bus: scanning of bus PCI: 00:1e.2 took 13983 usecs
994 10:27:55.965241 PCI: 00:1e.3 scanning...
995 10:27:55.968558 scan_generic_bus for PCI: 00:1e.3
996 10:27:55.972125 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 10:27:55.975401 scan_generic_bus for PCI: 00:1e.3 done
998 10:27:55.982500 scan_bus: scanning of bus PCI: 00:1e.3 took 14005 usecs
999 10:27:55.985670 PCI: 00:1f.0 scanning...
1000 10:27:55.988689 scan_static_bus for PCI: 00:1f.0
1001 10:27:55.988778 PNP: 0c09.0 enabled
1002 10:27:55.992083 scan_static_bus for PCI: 00:1f.0 done
1003 10:27:55.998775 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1004 10:27:56.001952 PCI: 00:1f.3 scanning...
1005 10:27:56.009123 scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs
1006 10:27:56.009228 PCI: 00:1f.4 scanning...
1007 10:27:56.012468 scan_generic_bus for PCI: 00:1f.4
1008 10:27:56.018735 scan_generic_bus for PCI: 00:1f.4 done
1009 10:27:56.021879 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1010 10:27:56.025173 PCI: 00:1f.5 scanning...
1011 10:27:56.028316 scan_generic_bus for PCI: 00:1f.5
1012 10:27:56.031873 scan_generic_bus for PCI: 00:1f.5 done
1013 10:27:56.038349 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1014 10:27:56.045581 scan_bus: scanning of bus DOMAIN: 0000 took 604786 usecs
1015 10:27:56.048607 scan_static_bus for Root Device done
1016 10:27:56.055089 scan_bus: scanning of bus Root Device took 624657 usecs
1017 10:27:56.055190 done
1018 10:27:56.058425 Chrome EC: UHEPI supported
1019 10:27:56.065030 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 10:27:56.068282 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 10:27:56.074696 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 10:27:56.082401 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 10:27:56.085775 SPI flash protection: WPSW=0 SRP0=0
1024 10:27:56.092287 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 10:27:56.095337 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1026 10:27:56.098569 found VGA at PCI: 00:02.0
1027 10:27:56.101871 Setting up VGA for PCI: 00:02.0
1028 10:27:56.108496 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 10:27:56.111588 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 10:27:56.115621 Allocating resources...
1031 10:27:56.118689 Reading resources...
1032 10:27:56.121856 Root Device read_resources bus 0 link: 0
1033 10:27:56.125138 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 10:27:56.132087 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 10:27:56.135555 DOMAIN: 0000 read_resources bus 0 link: 0
1036 10:27:56.142178 PCI: 00:14.0 read_resources bus 0 link: 0
1037 10:27:56.145378 USB0 port 0 read_resources bus 0 link: 0
1038 10:27:56.153407 USB0 port 0 read_resources bus 0 link: 0 done
1039 10:27:56.156738 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 10:27:56.164378 PCI: 00:15.0 read_resources bus 1 link: 0
1041 10:27:56.167610 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 10:27:56.174472 PCI: 00:15.1 read_resources bus 2 link: 0
1043 10:27:56.177702 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 10:27:56.184973 PCI: 00:19.0 read_resources bus 3 link: 0
1045 10:27:56.191505 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 10:27:56.194437 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 10:27:56.201630 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 10:27:56.204936 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 10:27:56.211250 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 10:27:56.214472 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 10:27:56.221135 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 10:27:56.224699 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 10:27:56.231025 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 10:27:56.237890 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 10:27:56.241070 Root Device read_resources bus 0 link: 0 done
1056 10:27:56.244770 Done reading resources.
1057 10:27:56.251168 Show resources in subtree (Root Device)...After reading.
1058 10:27:56.254395 Root Device child on link 0 CPU_CLUSTER: 0
1059 10:27:56.257612 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 10:27:56.261019 APIC: 00
1061 10:27:56.261120 APIC: 03
1062 10:27:56.261219 APIC: 01
1063 10:27:56.264081 APIC: 02
1064 10:27:56.264183 APIC: 04
1065 10:27:56.264282 APIC: 07
1066 10:27:56.267367 APIC: 05
1067 10:27:56.267468 APIC: 06
1068 10:27:56.274463 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 10:27:56.280800 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 10:27:56.336738 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 10:27:56.336856 PCI: 00:00.0
1072 10:27:56.337128 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 10:27:56.337394 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 10:27:56.337663 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 10:27:56.337746 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 10:27:56.386646 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 10:27:56.386759 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 10:27:56.387033 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 10:27:56.387304 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 10:27:56.387752 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 10:27:56.387836 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 10:27:56.436296 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 10:27:56.436625 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 10:27:56.436904 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 10:27:56.436987 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 10:27:56.437252 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 10:27:56.457347 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 10:27:56.457661 PCI: 00:02.0
1089 10:27:56.457747 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 10:27:56.464190 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 10:27:56.473997 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 10:27:56.474099 PCI: 00:04.0
1093 10:27:56.477655 PCI: 00:08.0
1094 10:27:56.487053 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 10:27:56.487156 PCI: 00:12.0
1096 10:27:56.496820 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 10:27:56.503701 PCI: 00:14.0 child on link 0 USB0 port 0
1098 10:27:56.513572 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 10:27:56.516927 USB0 port 0 child on link 0 USB2 port 0
1100 10:27:56.520592 USB2 port 0
1101 10:27:56.520713 USB2 port 1
1102 10:27:56.523719 USB2 port 2
1103 10:27:56.523832 USB2 port 3
1104 10:27:56.527203 USB2 port 5
1105 10:27:56.527301 USB2 port 6
1106 10:27:56.530118 USB2 port 9
1107 10:27:56.530216 USB3 port 0
1108 10:27:56.533334 USB3 port 1
1109 10:27:56.533439 USB3 port 2
1110 10:27:56.537281 USB3 port 3
1111 10:27:56.537398 USB3 port 4
1112 10:27:56.540178 PCI: 00:14.2
1113 10:27:56.550038 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 10:27:56.559859 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 10:27:56.559959 PCI: 00:14.3
1116 10:27:56.569631 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 10:27:56.576753 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 10:27:56.586437 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 10:27:56.586547 I2C: 01:15
1120 10:27:56.593283 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 10:27:56.603024 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 10:27:56.603128 I2C: 02:5d
1123 10:27:56.606053 GENERIC: 0.0
1124 10:27:56.606145 PCI: 00:16.0
1125 10:27:56.616048 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 10:27:56.619658 PCI: 00:17.0
1127 10:27:56.626028 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 10:27:56.636352 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 10:27:56.642609 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 10:27:56.652846 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 10:27:56.662292 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 10:27:56.669095 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 10:27:56.676076 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 10:27:56.685853 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 10:27:56.685972 I2C: 03:1a
1136 10:27:56.686055 I2C: 03:38
1137 10:27:56.689090 I2C: 03:39
1138 10:27:56.689190 I2C: 03:3a
1139 10:27:56.692339 I2C: 03:3b
1140 10:27:56.695560 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 10:27:56.705280 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 10:27:56.715656 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 10:27:56.725392 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 10:27:56.725510 PCI: 01:00.0
1145 10:27:56.735207 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 10:27:56.738693 PCI: 00:1e.0
1147 10:27:56.748240 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 10:27:56.758426 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 10:27:56.761431 PCI: 00:1e.2 child on link 0 SPI: 00
1150 10:27:56.771752 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 10:27:56.774800 SPI: 00
1152 10:27:56.778458 PCI: 00:1e.3 child on link 0 SPI: 01
1153 10:27:56.788341 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 10:27:56.788445 SPI: 01
1155 10:27:56.791557 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 10:27:56.801971 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 10:27:56.811386 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 10:27:56.811524 PNP: 0c09.0
1159 10:27:56.821275 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 10:27:56.821380 PCI: 00:1f.3
1161 10:27:56.831408 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 10:27:56.840994 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 10:27:56.844367 PCI: 00:1f.4
1164 10:27:56.854509 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 10:27:56.864194 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 10:27:56.864301 PCI: 00:1f.5
1167 10:27:56.874351 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 10:27:56.880634 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 10:27:56.887151 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 10:27:56.893736 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 10:27:56.897133 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 10:27:56.900874 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 10:27:56.904229 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 10:27:56.907527 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 10:27:56.913863 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 10:27:56.920210 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 10:27:56.930613 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 10:27:56.937103 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 10:27:56.943402 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 10:27:56.947071 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 10:27:56.956666 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 10:27:56.960332 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 10:27:56.966799 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 10:27:56.970605 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 10:27:56.976941 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 10:27:56.980114 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 10:27:56.983366 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 10:27:56.990245 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 10:27:56.993513 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 10:27:57.000039 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 10:27:57.003346 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 10:27:57.009652 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 10:27:57.012798 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 10:27:57.019937 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 10:27:57.023299 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 10:27:57.029546 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 10:27:57.032867 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 10:27:57.039887 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 10:27:57.042791 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 10:27:57.049795 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 10:27:57.052850 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 10:27:57.056198 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 10:27:57.063167 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 10:27:57.066126 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 10:27:57.076216 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 10:27:57.079481 avoid_fixed_resources: DOMAIN: 0000
1207 10:27:57.086066 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 10:27:57.092414 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 10:27:57.099473 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 10:27:57.105830 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 10:27:57.115438 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 10:27:57.122266 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 10:27:57.128749 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 10:27:57.138994 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 10:27:57.145794 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 10:27:57.152327 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 10:27:57.158495 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 10:27:57.168371 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 10:27:57.168484 Setting resources...
1220 10:27:57.175497 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 10:27:57.178434 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 10:27:57.184922 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 10:27:57.188177 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 10:27:57.191373 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 10:27:57.198029 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 10:27:57.205098 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 10:27:57.211505 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 10:27:57.218050 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 10:27:57.224941 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 10:27:57.228059 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 10:27:57.231317 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 10:27:57.237825 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 10:27:57.241188 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 10:27:57.248237 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 10:27:57.251045 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 10:27:57.258132 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 10:27:57.261527 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 10:27:57.268066 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 10:27:57.271224 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 10:27:57.277661 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 10:27:57.281527 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 10:27:57.288089 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 10:27:57.291512 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 10:27:57.297839 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 10:27:57.301315 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 10:27:57.304247 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 10:27:57.311001 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 10:27:57.314148 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 10:27:57.321321 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 10:27:57.323961 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 10:27:57.331145 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 10:27:57.337675 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 10:27:57.344498 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 10:27:57.350933 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 10:27:57.360534 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 10:27:57.363784 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 10:27:57.370224 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 10:27:57.377258 Root Device assign_resources, bus 0 link: 0
1259 10:27:57.380558 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 10:27:57.390564 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 10:27:57.397152 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 10:27:57.406841 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 10:27:57.413443 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 10:27:57.423142 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 10:27:57.430113 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 10:27:57.436359 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 10:27:57.439773 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 10:27:57.450041 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 10:27:57.456625 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 10:27:57.463091 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 10:27:57.472734 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 10:27:57.476600 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 10:27:57.482757 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 10:27:57.489901 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 10:27:57.496355 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 10:27:57.499515 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 10:27:57.509353 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 10:27:57.515841 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 10:27:57.522481 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 10:27:57.532750 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 10:27:57.539411 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 10:27:57.545832 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 10:27:57.555476 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 10:27:57.562025 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 10:27:57.568708 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 10:27:57.572230 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 10:27:57.581726 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 10:27:57.588762 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 10:27:57.598607 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 10:27:57.601867 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 10:27:57.611362 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 10:27:57.615251 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 10:27:57.625060 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 10:27:57.631459 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 10:27:57.638146 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 10:27:57.641286 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 10:27:57.647909 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 10:27:57.654373 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 10:27:57.658193 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 10:27:57.664945 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 10:27:57.667720 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 10:27:57.674274 LPC: Trying to open IO window from 800 size 1ff
1303 10:27:57.681407 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 10:27:57.691013 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 10:27:57.697439 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 10:27:57.707193 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 10:27:57.711074 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 10:27:57.713959 Root Device assign_resources, bus 0 link: 0
1309 10:27:57.717651 Done setting resources.
1310 10:27:57.724235 Show resources in subtree (Root Device)...After assigning values.
1311 10:27:57.730889 Root Device child on link 0 CPU_CLUSTER: 0
1312 10:27:57.734091 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 10:27:57.734189 APIC: 00
1314 10:27:57.737494 APIC: 03
1315 10:27:57.737591 APIC: 01
1316 10:27:57.737670 APIC: 02
1317 10:27:57.740746 APIC: 04
1318 10:27:57.740844 APIC: 07
1319 10:27:57.740921 APIC: 05
1320 10:27:57.744127 APIC: 06
1321 10:27:57.747422 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 10:27:57.757167 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 10:27:57.767128 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 10:27:57.770315 PCI: 00:00.0
1325 10:27:57.780128 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 10:27:57.790163 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 10:27:57.800026 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 10:27:57.806480 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 10:27:57.816103 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 10:27:57.825986 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 10:27:57.835731 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 10:27:57.845741 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 10:27:57.856067 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 10:27:57.862723 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 10:27:57.872250 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 10:27:57.882265 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 10:27:57.892249 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 10:27:57.901971 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 10:27:57.911944 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 10:27:57.918630 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 10:27:57.921742 PCI: 00:02.0
1342 10:27:57.931760 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 10:27:57.941846 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 10:27:57.951799 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 10:27:57.954799 PCI: 00:04.0
1346 10:27:57.954899 PCI: 00:08.0
1347 10:27:57.965086 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 10:27:57.968313 PCI: 00:12.0
1349 10:27:57.978104 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 10:27:57.981242 PCI: 00:14.0 child on link 0 USB0 port 0
1351 10:27:57.991290 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 10:27:57.997842 USB0 port 0 child on link 0 USB2 port 0
1353 10:27:57.997942 USB2 port 0
1354 10:27:58.001692 USB2 port 1
1355 10:27:58.001792 USB2 port 2
1356 10:27:58.005016 USB2 port 3
1357 10:27:58.005118 USB2 port 5
1358 10:27:58.008301 USB2 port 6
1359 10:27:58.008416 USB2 port 9
1360 10:27:58.011215 USB3 port 0
1361 10:27:58.011324 USB3 port 1
1362 10:27:58.014569 USB3 port 2
1363 10:27:58.014689 USB3 port 3
1364 10:27:58.017593 USB3 port 4
1365 10:27:58.021588 PCI: 00:14.2
1366 10:27:58.031055 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 10:27:58.040994 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 10:27:58.041099 PCI: 00:14.3
1369 10:27:58.050771 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 10:27:58.057709 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 10:27:58.067304 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 10:27:58.067401 I2C: 01:15
1373 10:27:58.074287 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 10:27:58.084279 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 10:27:58.084377 I2C: 02:5d
1376 10:27:58.087511 GENERIC: 0.0
1377 10:27:58.087599 PCI: 00:16.0
1378 10:27:58.097216 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 10:27:58.100371 PCI: 00:17.0
1380 10:27:58.110685 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 10:27:58.120131 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 10:27:58.130483 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 10:27:58.137095 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 10:27:58.146710 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 10:27:58.156675 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 10:27:58.163124 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 10:27:58.173317 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 10:27:58.173454 I2C: 03:1a
1389 10:27:58.176406 I2C: 03:38
1390 10:27:58.176533 I2C: 03:39
1391 10:27:58.179832 I2C: 03:3a
1392 10:27:58.179949 I2C: 03:3b
1393 10:27:58.183001 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 10:27:58.193017 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 10:27:58.203398 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 10:27:58.212977 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 10:27:58.216205 PCI: 01:00.0
1398 10:27:58.226284 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 10:27:58.229474 PCI: 00:1e.0
1400 10:27:58.239272 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 10:27:58.249024 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 10:27:58.252355 PCI: 00:1e.2 child on link 0 SPI: 00
1403 10:27:58.262699 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 10:27:58.266058 SPI: 00
1405 10:27:58.268907 PCI: 00:1e.3 child on link 0 SPI: 01
1406 10:27:58.279100 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 10:27:58.282249 SPI: 01
1408 10:27:58.285482 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 10:27:58.291881 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 10:27:58.302134 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 10:27:58.305270 PNP: 0c09.0
1412 10:27:58.311530 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 10:27:58.315631 PCI: 00:1f.3
1414 10:27:58.325137 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 10:27:58.334865 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 10:27:58.338424 PCI: 00:1f.4
1417 10:27:58.344687 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 10:27:58.354670 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 10:27:58.358267 PCI: 00:1f.5
1420 10:27:58.368024 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 10:27:58.371125 Done allocating resources.
1422 10:27:58.377573 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 10:27:58.377677 Enabling resources...
1424 10:27:58.385477 PCI: 00:00.0 subsystem <- 8086/9b61
1425 10:27:58.385574 PCI: 00:00.0 cmd <- 06
1426 10:27:58.388632 PCI: 00:02.0 subsystem <- 8086/9b41
1427 10:27:58.391780 PCI: 00:02.0 cmd <- 03
1428 10:27:58.395098 PCI: 00:08.0 cmd <- 06
1429 10:27:58.398528 PCI: 00:12.0 subsystem <- 8086/02f9
1430 10:27:58.401584 PCI: 00:12.0 cmd <- 02
1431 10:27:58.405166 PCI: 00:14.0 subsystem <- 8086/02ed
1432 10:27:58.408352 PCI: 00:14.0 cmd <- 02
1433 10:27:58.411725 PCI: 00:14.2 cmd <- 02
1434 10:27:58.414779 PCI: 00:14.3 subsystem <- 8086/02f0
1435 10:27:58.414876 PCI: 00:14.3 cmd <- 02
1436 10:27:58.421715 PCI: 00:15.0 subsystem <- 8086/02e8
1437 10:27:58.421811 PCI: 00:15.0 cmd <- 02
1438 10:27:58.424809 PCI: 00:15.1 subsystem <- 8086/02e9
1439 10:27:58.428204 PCI: 00:15.1 cmd <- 02
1440 10:27:58.431270 PCI: 00:16.0 subsystem <- 8086/02e0
1441 10:27:58.435163 PCI: 00:16.0 cmd <- 02
1442 10:27:58.438271 PCI: 00:17.0 subsystem <- 8086/02d3
1443 10:27:58.441776 PCI: 00:17.0 cmd <- 03
1444 10:27:58.445011 PCI: 00:19.0 subsystem <- 8086/02c5
1445 10:27:58.448332 PCI: 00:19.0 cmd <- 02
1446 10:27:58.451515 PCI: 00:1d.0 bridge ctrl <- 0013
1447 10:27:58.454635 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 10:27:58.457942 PCI: 00:1d.0 cmd <- 06
1449 10:27:58.461270 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 10:27:58.464664 PCI: 00:1e.0 cmd <- 06
1451 10:27:58.467675 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 10:27:58.470881 PCI: 00:1e.2 cmd <- 06
1453 10:27:58.474662 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 10:27:58.474764 PCI: 00:1e.3 cmd <- 02
1455 10:27:58.481569 PCI: 00:1f.0 subsystem <- 8086/0284
1456 10:27:58.481680 PCI: 00:1f.0 cmd <- 407
1457 10:27:58.484785 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 10:27:58.487819 PCI: 00:1f.3 cmd <- 02
1459 10:27:58.491098 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 10:27:58.494766 PCI: 00:1f.4 cmd <- 03
1461 10:27:58.497838 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 10:27:58.500908 PCI: 00:1f.5 cmd <- 406
1463 10:27:58.509892 PCI: 01:00.0 cmd <- 02
1464 10:27:58.515084 done.
1465 10:27:58.529288 ME: Version: 14.0.39.1367
1466 10:27:58.535753 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1467 10:27:58.539004 Initializing devices...
1468 10:27:58.539099 Root Device init ...
1469 10:27:58.546067 Chrome EC: Set SMI mask to 0x0000000000000000
1470 10:27:58.549420 Chrome EC: clear events_b mask to 0x0000000000000000
1471 10:27:58.555846 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 10:27:58.562183 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 10:27:58.569151 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 10:27:58.572422 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 10:27:58.575543 Root Device init finished in 35205 usecs
1476 10:27:58.579478 CPU_CLUSTER: 0 init ...
1477 10:27:58.585799 CPU_CLUSTER: 0 init finished in 2440 usecs
1478 10:27:58.590230 PCI: 00:00.0 init ...
1479 10:27:58.593551 CPU TDP: 15 Watts
1480 10:27:58.596517 CPU PL2 = 64 Watts
1481 10:27:58.600490 PCI: 00:00.0 init finished in 7081 usecs
1482 10:27:58.603718 PCI: 00:02.0 init ...
1483 10:27:58.606699 PCI: 00:02.0 init finished in 2253 usecs
1484 10:27:58.609896 PCI: 00:08.0 init ...
1485 10:27:58.613219 PCI: 00:08.0 init finished in 2253 usecs
1486 10:27:58.616430 PCI: 00:12.0 init ...
1487 10:27:58.619526 PCI: 00:12.0 init finished in 2253 usecs
1488 10:27:58.623432 PCI: 00:14.0 init ...
1489 10:27:58.626610 PCI: 00:14.0 init finished in 2253 usecs
1490 10:27:58.629770 PCI: 00:14.2 init ...
1491 10:27:58.632912 PCI: 00:14.2 init finished in 2252 usecs
1492 10:27:58.636224 PCI: 00:14.3 init ...
1493 10:27:58.639440 PCI: 00:14.3 init finished in 2272 usecs
1494 10:27:58.643261 PCI: 00:15.0 init ...
1495 10:27:58.646376 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 10:27:58.649646 PCI: 00:15.0 init finished in 5980 usecs
1497 10:27:58.653086 PCI: 00:15.1 init ...
1498 10:27:58.656247 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 10:27:58.662939 PCI: 00:15.1 init finished in 5976 usecs
1500 10:27:58.663029 PCI: 00:16.0 init ...
1501 10:27:58.669337 PCI: 00:16.0 init finished in 2252 usecs
1502 10:27:58.672511 PCI: 00:19.0 init ...
1503 10:27:58.675875 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 10:27:58.679512 PCI: 00:19.0 init finished in 5979 usecs
1505 10:27:58.682704 PCI: 00:1d.0 init ...
1506 10:27:58.685733 Initializing PCH PCIe bridge.
1507 10:27:58.689531 PCI: 00:1d.0 init finished in 5284 usecs
1508 10:27:58.692616 PCI: 00:1f.0 init ...
1509 10:27:58.695874 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 10:27:58.702180 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 10:27:58.702282 IOAPIC: ID = 0x02
1512 10:27:58.705474 IOAPIC: Dumping registers
1513 10:27:58.709088 reg 0x0000: 0x02000000
1514 10:27:58.712341 reg 0x0001: 0x00770020
1515 10:27:58.712455 reg 0x0002: 0x00000000
1516 10:27:58.718802 PCI: 00:1f.0 init finished in 23550 usecs
1517 10:27:58.722127 PCI: 00:1f.4 init ...
1518 10:27:58.725240 PCI: 00:1f.4 init finished in 2263 usecs
1519 10:27:58.736041 PCI: 01:00.0 init ...
1520 10:27:58.739198 PCI: 01:00.0 init finished in 2243 usecs
1521 10:27:58.743765 PNP: 0c09.0 init ...
1522 10:27:58.747017 Google Chrome EC uptime: 11.059 seconds
1523 10:27:58.753521 Google Chrome AP resets since EC boot: 0
1524 10:27:58.756892 Google Chrome most recent AP reset causes:
1525 10:27:58.763793 Google Chrome EC reset flags at last EC boot: reset-pin
1526 10:27:58.767189 PNP: 0c09.0 init finished in 20577 usecs
1527 10:27:58.769880 Devices initialized
1528 10:27:58.773733 Show all devs... After init.
1529 10:27:58.773829 Root Device: enabled 1
1530 10:27:58.776722 CPU_CLUSTER: 0: enabled 1
1531 10:27:58.779971 DOMAIN: 0000: enabled 1
1532 10:27:58.780063 APIC: 00: enabled 1
1533 10:27:58.783196 PCI: 00:00.0: enabled 1
1534 10:27:58.786267 PCI: 00:02.0: enabled 1
1535 10:27:58.790124 PCI: 00:04.0: enabled 0
1536 10:27:58.790222 PCI: 00:05.0: enabled 0
1537 10:27:58.793301 PCI: 00:12.0: enabled 1
1538 10:27:58.796514 PCI: 00:12.5: enabled 0
1539 10:27:58.799811 PCI: 00:12.6: enabled 0
1540 10:27:58.799905 PCI: 00:14.0: enabled 1
1541 10:27:58.802762 PCI: 00:14.1: enabled 0
1542 10:27:58.806782 PCI: 00:14.3: enabled 1
1543 10:27:58.809794 PCI: 00:14.5: enabled 0
1544 10:27:58.809884 PCI: 00:15.0: enabled 1
1545 10:27:58.812992 PCI: 00:15.1: enabled 1
1546 10:27:58.816182 PCI: 00:15.2: enabled 0
1547 10:27:58.816282 PCI: 00:15.3: enabled 0
1548 10:27:58.819400 PCI: 00:16.0: enabled 1
1549 10:27:58.823381 PCI: 00:16.1: enabled 0
1550 10:27:58.826477 PCI: 00:16.2: enabled 0
1551 10:27:58.826563 PCI: 00:16.3: enabled 0
1552 10:27:58.829811 PCI: 00:16.4: enabled 0
1553 10:27:58.832875 PCI: 00:16.5: enabled 0
1554 10:27:58.836115 PCI: 00:17.0: enabled 1
1555 10:27:58.836205 PCI: 00:19.0: enabled 1
1556 10:27:58.839378 PCI: 00:19.1: enabled 0
1557 10:27:58.842597 PCI: 00:19.2: enabled 0
1558 10:27:58.845885 PCI: 00:1a.0: enabled 0
1559 10:27:58.845975 PCI: 00:1c.0: enabled 0
1560 10:27:58.849712 PCI: 00:1c.1: enabled 0
1561 10:27:58.852733 PCI: 00:1c.2: enabled 0
1562 10:27:58.852838 PCI: 00:1c.3: enabled 0
1563 10:27:58.856014 PCI: 00:1c.4: enabled 0
1564 10:27:58.859519 PCI: 00:1c.5: enabled 0
1565 10:27:58.862689 PCI: 00:1c.6: enabled 0
1566 10:27:58.862776 PCI: 00:1c.7: enabled 0
1567 10:27:58.865913 PCI: 00:1d.0: enabled 1
1568 10:27:58.869107 PCI: 00:1d.1: enabled 0
1569 10:27:58.872289 PCI: 00:1d.2: enabled 0
1570 10:27:58.872385 PCI: 00:1d.3: enabled 0
1571 10:27:58.876106 PCI: 00:1d.4: enabled 0
1572 10:27:58.879413 PCI: 00:1d.5: enabled 0
1573 10:27:58.882559 PCI: 00:1e.0: enabled 1
1574 10:27:58.882654 PCI: 00:1e.1: enabled 0
1575 10:27:58.885566 PCI: 00:1e.2: enabled 1
1576 10:27:58.889011 PCI: 00:1e.3: enabled 1
1577 10:27:58.892125 PCI: 00:1f.0: enabled 1
1578 10:27:58.892211 PCI: 00:1f.1: enabled 0
1579 10:27:58.895493 PCI: 00:1f.2: enabled 0
1580 10:27:58.899221 PCI: 00:1f.3: enabled 1
1581 10:27:58.899308 PCI: 00:1f.4: enabled 1
1582 10:27:58.902445 PCI: 00:1f.5: enabled 1
1583 10:27:58.905519 PCI: 00:1f.6: enabled 0
1584 10:27:58.909279 USB0 port 0: enabled 1
1585 10:27:58.909374 I2C: 01:15: enabled 1
1586 10:27:58.912060 I2C: 02:5d: enabled 1
1587 10:27:58.915624 GENERIC: 0.0: enabled 1
1588 10:27:58.915730 I2C: 03:1a: enabled 1
1589 10:27:58.918783 I2C: 03:38: enabled 1
1590 10:27:58.922162 I2C: 03:39: enabled 1
1591 10:27:58.922251 I2C: 03:3a: enabled 1
1592 10:27:58.925591 I2C: 03:3b: enabled 1
1593 10:27:58.929000 PCI: 00:00.0: enabled 1
1594 10:27:58.929091 SPI: 00: enabled 1
1595 10:27:58.931908 SPI: 01: enabled 1
1596 10:27:58.935471 PNP: 0c09.0: enabled 1
1597 10:27:58.935579 USB2 port 0: enabled 1
1598 10:27:58.938608 USB2 port 1: enabled 1
1599 10:27:58.941757 USB2 port 2: enabled 0
1600 10:27:58.945829 USB2 port 3: enabled 0
1601 10:27:58.945931 USB2 port 5: enabled 0
1602 10:27:58.948811 USB2 port 6: enabled 1
1603 10:27:58.951876 USB2 port 9: enabled 1
1604 10:27:58.951965 USB3 port 0: enabled 1
1605 10:27:58.955091 USB3 port 1: enabled 1
1606 10:27:58.958370 USB3 port 2: enabled 1
1607 10:27:58.958463 USB3 port 3: enabled 1
1608 10:27:58.961829 USB3 port 4: enabled 0
1609 10:27:58.964975 APIC: 03: enabled 1
1610 10:27:58.965065 APIC: 01: enabled 1
1611 10:27:58.968208 APIC: 02: enabled 1
1612 10:27:58.971642 APIC: 04: enabled 1
1613 10:27:58.971734 APIC: 07: enabled 1
1614 10:27:58.975251 APIC: 05: enabled 1
1615 10:27:58.978052 APIC: 06: enabled 1
1616 10:27:58.978156 PCI: 00:08.0: enabled 1
1617 10:27:58.981872 PCI: 00:14.2: enabled 1
1618 10:27:58.985147 PCI: 01:00.0: enabled 1
1619 10:27:58.988255 Disabling ACPI via APMC:
1620 10:27:58.991593 done.
1621 10:27:58.995219 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 10:27:58.998221 ELOG: NV offset 0xaf0000 size 0x4000
1623 10:27:59.005387 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 10:27:59.011773 ELOG: Event(17) added with size 13 at 2023-02-10 10:27:59 UTC
1625 10:27:59.018943 ELOG: Event(92) added with size 9 at 2023-02-10 10:27:59 UTC
1626 10:27:59.025022 ELOG: Event(93) added with size 9 at 2023-02-10 10:27:59 UTC
1627 10:27:59.032042 ELOG: Event(9A) added with size 9 at 2023-02-10 10:27:59 UTC
1628 10:27:59.038489 ELOG: Event(9E) added with size 10 at 2023-02-10 10:27:59 UTC
1629 10:27:59.045077 ELOG: Event(9F) added with size 14 at 2023-02-10 10:27:59 UTC
1630 10:27:59.048372 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1631 10:27:59.055434 ELOG: Event(A1) added with size 10 at 2023-02-10 10:27:59 UTC
1632 10:27:59.065314 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1633 10:27:59.072365 ELOG: Event(A0) added with size 9 at 2023-02-10 10:27:59 UTC
1634 10:27:59.075444 elog_add_boot_reason: Logged dev mode boot
1635 10:27:59.078943 Finalize devices...
1636 10:27:59.079034 PCI: 00:17.0 final
1637 10:27:59.081960 Devices finalized
1638 10:27:59.085315 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1639 10:27:59.092397 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1640 10:27:59.095541 ME: HFSTS1 : 0x90000245
1641 10:27:59.098793 ME: HFSTS2 : 0x3B850126
1642 10:27:59.105198 ME: HFSTS3 : 0x00000020
1643 10:27:59.108151 ME: HFSTS4 : 0x00004800
1644 10:27:59.111448 ME: HFSTS5 : 0x00000000
1645 10:27:59.114682 ME: HFSTS6 : 0x40400006
1646 10:27:59.118310 ME: Manufacturing Mode : NO
1647 10:27:59.121637 ME: FW Partition Table : OK
1648 10:27:59.124832 ME: Bringup Loader Failure : NO
1649 10:27:59.128020 ME: Firmware Init Complete : YES
1650 10:27:59.131371 ME: Boot Options Present : NO
1651 10:27:59.135057 ME: Update In Progress : NO
1652 10:27:59.138290 ME: D0i3 Support : YES
1653 10:27:59.141404 ME: Low Power State Enabled : NO
1654 10:27:59.144826 ME: CPU Replaced : NO
1655 10:27:59.148134 ME: CPU Replacement Valid : YES
1656 10:27:59.151202 ME: Current Working State : 5
1657 10:27:59.154666 ME: Current Operation State : 1
1658 10:27:59.157886 ME: Current Operation Mode : 0
1659 10:27:59.161066 ME: Error Code : 0
1660 10:27:59.164660 ME: CPU Debug Disabled : YES
1661 10:27:59.167934 ME: TXT Support : NO
1662 10:27:59.174355 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1663 10:27:59.181106 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1664 10:27:59.181221 CBFS @ c08000 size 3f8000
1665 10:27:59.187551 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1666 10:27:59.191381 CBFS: Locating 'fallback/dsdt.aml'
1667 10:27:59.194887 CBFS: Found @ offset 10bb80 size 3fa5
1668 10:27:59.201082 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 10:27:59.204192 CBFS @ c08000 size 3f8000
1670 10:27:59.211142 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1671 10:27:59.211261 CBFS: Locating 'fallback/slic'
1672 10:27:59.216253 CBFS: 'fallback/slic' not found.
1673 10:27:59.223021 ACPI: Writing ACPI tables at 99b3e000.
1674 10:27:59.223129 ACPI: * FACS
1675 10:27:59.226209 ACPI: * DSDT
1676 10:27:59.229497 Ramoops buffer: 0x100000@0x99a3d000.
1677 10:27:59.232699 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1678 10:27:59.239616 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1679 10:27:59.242965 Google Chrome EC: version:
1680 10:27:59.245961 ro: helios_v2.0.2659-56403530b
1681 10:27:59.249321 rw: helios_v2.0.2849-c41de27e7d
1682 10:27:59.249420 running image: 1
1683 10:27:59.253791 ACPI: * FADT
1684 10:27:59.253890 SCI is IRQ9
1685 10:27:59.260098 ACPI: added table 1/32, length now 40
1686 10:27:59.260201 ACPI: * SSDT
1687 10:27:59.263350 Found 1 CPU(s) with 8 core(s) each.
1688 10:27:59.266807 Error: Could not locate 'wifi_sar' in VPD.
1689 10:27:59.273228 Checking CBFS for default SAR values
1690 10:27:59.276568 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1691 10:27:59.280425 CBFS @ c08000 size 3f8000
1692 10:27:59.286395 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1693 10:27:59.290128 CBFS: Locating 'wifi_sar_defaults.hex'
1694 10:27:59.293355 CBFS: Found @ offset 5fac0 size 77
1695 10:27:59.296536 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1696 10:27:59.302975 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1697 10:27:59.306267 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1698 10:27:59.313135 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1699 10:27:59.316352 failed to find key in VPD: dsm_calib_r0_0
1700 10:27:59.326599 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1701 10:27:59.329896 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1702 10:27:59.336437 failed to find key in VPD: dsm_calib_r0_1
1703 10:27:59.342803 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1704 10:27:59.349153 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1705 10:27:59.352589 failed to find key in VPD: dsm_calib_r0_2
1706 10:27:59.362796 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1707 10:27:59.365985 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1708 10:27:59.372429 failed to find key in VPD: dsm_calib_r0_3
1709 10:27:59.378856 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1710 10:27:59.385203 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1711 10:27:59.388888 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1712 10:27:59.395931 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1713 10:27:59.398951 EC returned error result code 1
1714 10:27:59.402782 EC returned error result code 1
1715 10:27:59.406384 EC returned error result code 1
1716 10:27:59.409293 PS2K: Bad resp from EC. Vivaldi disabled!
1717 10:27:59.416511 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1718 10:27:59.422880 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1719 10:27:59.426102 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1720 10:27:59.432422 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1721 10:27:59.435711 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1722 10:27:59.442912 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1723 10:27:59.449118 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1724 10:27:59.456078 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1725 10:27:59.459384 ACPI: added table 2/32, length now 44
1726 10:27:59.459494 ACPI: * MCFG
1727 10:27:59.465563 ACPI: added table 3/32, length now 48
1728 10:27:59.465664 ACPI: * TPM2
1729 10:27:59.468642 TPM2 log created at 99a2d000
1730 10:27:59.472578 ACPI: added table 4/32, length now 52
1731 10:27:59.475516 ACPI: * MADT
1732 10:27:59.475616 SCI is IRQ9
1733 10:27:59.478747 ACPI: added table 5/32, length now 56
1734 10:27:59.482024 current = 99b43ac0
1735 10:27:59.482124 ACPI: * DMAR
1736 10:27:59.485230 ACPI: added table 6/32, length now 60
1737 10:27:59.488837 ACPI: * IGD OpRegion
1738 10:27:59.492044 GMA: Found VBT in CBFS
1739 10:27:59.495182 GMA: Found valid VBT in CBFS
1740 10:27:59.498380 ACPI: added table 7/32, length now 64
1741 10:27:59.498481 ACPI: * HPET
1742 10:27:59.505372 ACPI: added table 8/32, length now 68
1743 10:27:59.505474 ACPI: done.
1744 10:27:59.508569 ACPI tables: 31744 bytes.
1745 10:27:59.512074 smbios_write_tables: 99a2c000
1746 10:27:59.515259 EC returned error result code 3
1747 10:27:59.518200 Couldn't obtain OEM name from CBI
1748 10:27:59.521678 Create SMBIOS type 17
1749 10:27:59.524769 PCI: 00:00.0 (Intel Cannonlake)
1750 10:27:59.524869 PCI: 00:14.3 (Intel WiFi)
1751 10:27:59.528422 SMBIOS tables: 939 bytes.
1752 10:27:59.531780 Writing table forward entry at 0x00000500
1753 10:27:59.538362 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1754 10:27:59.541428 Writing coreboot table at 0x99b62000
1755 10:27:59.547924 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1756 10:27:59.554854 1. 0000000000001000-000000000009ffff: RAM
1757 10:27:59.557868 2. 00000000000a0000-00000000000fffff: RESERVED
1758 10:27:59.560990 3. 0000000000100000-0000000099a2bfff: RAM
1759 10:27:59.568329 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1760 10:27:59.571451 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1761 10:27:59.577772 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1762 10:27:59.584210 7. 000000009a000000-000000009f7fffff: RESERVED
1763 10:27:59.587659 8. 00000000e0000000-00000000efffffff: RESERVED
1764 10:27:59.594709 9. 00000000fc000000-00000000fc000fff: RESERVED
1765 10:27:59.597292 10. 00000000fe000000-00000000fe00ffff: RESERVED
1766 10:27:59.603721 11. 00000000fed10000-00000000fed17fff: RESERVED
1767 10:27:59.607128 12. 00000000fed80000-00000000fed83fff: RESERVED
1768 10:27:59.610435 13. 00000000fed90000-00000000fed91fff: RESERVED
1769 10:27:59.617384 14. 00000000feda0000-00000000feda1fff: RESERVED
1770 10:27:59.620227 15. 0000000100000000-000000045e7fffff: RAM
1771 10:27:59.623908 Graphics framebuffer located at 0xc0000000
1772 10:27:59.626901 Passing 5 GPIOs to payload:
1773 10:27:59.633681 NAME | PORT | POLARITY | VALUE
1774 10:27:59.640057 write protect | undefined | high | low
1775 10:27:59.643382 lid | undefined | high | high
1776 10:27:59.649992 power | undefined | high | low
1777 10:27:59.653596 oprom | undefined | high | low
1778 10:27:59.660110 EC in RW | 0x000000cb | high | low
1779 10:27:59.660225 Board ID: 4
1780 10:27:59.666653 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1781 10:27:59.669842 CBFS @ c08000 size 3f8000
1782 10:27:59.673735 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1783 10:27:59.680178 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1784 10:27:59.683536 coreboot table: 1492 bytes.
1785 10:27:59.686627 IMD ROOT 0. 99fff000 00001000
1786 10:27:59.689691 IMD SMALL 1. 99ffe000 00001000
1787 10:27:59.693004 FSP MEMORY 2. 99c4e000 003b0000
1788 10:27:59.696497 CONSOLE 3. 99c2e000 00020000
1789 10:27:59.699597 FMAP 4. 99c2d000 0000054e
1790 10:27:59.703491 TIME STAMP 5. 99c2c000 00000910
1791 10:27:59.706694 VBOOT WORK 6. 99c18000 00014000
1792 10:27:59.709999 MRC DATA 7. 99c16000 00001958
1793 10:27:59.713035 ROMSTG STCK 8. 99c15000 00001000
1794 10:27:59.716693 AFTER CAR 9. 99c0b000 0000a000
1795 10:27:59.719759 RAMSTAGE 10. 99baf000 0005c000
1796 10:27:59.723027 REFCODE 11. 99b7a000 00035000
1797 10:27:59.726190 SMM BACKUP 12. 99b6a000 00010000
1798 10:27:59.729747 COREBOOT 13. 99b62000 00008000
1799 10:27:59.733436 ACPI 14. 99b3e000 00024000
1800 10:27:59.736419 ACPI GNVS 15. 99b3d000 00001000
1801 10:27:59.739949 RAMOOPS 16. 99a3d000 00100000
1802 10:27:59.743051 TPM2 TCGLOG17. 99a2d000 00010000
1803 10:27:59.746101 SMBIOS 18. 99a2c000 00000800
1804 10:27:59.749464 IMD small region:
1805 10:27:59.753268 IMD ROOT 0. 99ffec00 00000400
1806 10:27:59.756231 FSP RUNTIME 1. 99ffebe0 00000004
1807 10:27:59.759377 EC HOSTEVENT 2. 99ffebc0 00000008
1808 10:27:59.763183 POWER STATE 3. 99ffeb80 00000040
1809 10:27:59.766270 ROMSTAGE 4. 99ffeb60 00000004
1810 10:27:59.769546 MEM INFO 5. 99ffe9a0 000001b9
1811 10:27:59.772583 VPD 6. 99ffe920 0000006c
1812 10:27:59.776400 MTRR: Physical address space:
1813 10:27:59.782682 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1814 10:27:59.789132 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1815 10:27:59.795899 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1816 10:27:59.802721 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1817 10:27:59.805911 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1818 10:27:59.812302 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1819 10:27:59.819240 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1820 10:27:59.825398 MTRR: Fixed MSR 0x250 0x0606060606060606
1821 10:27:59.829188 MTRR: Fixed MSR 0x258 0x0606060606060606
1822 10:27:59.832370 MTRR: Fixed MSR 0x259 0x0000000000000000
1823 10:27:59.835382 MTRR: Fixed MSR 0x268 0x0606060606060606
1824 10:27:59.839158 MTRR: Fixed MSR 0x269 0x0606060606060606
1825 10:27:59.845472 MTRR: Fixed MSR 0x26a 0x0606060606060606
1826 10:27:59.848576 MTRR: Fixed MSR 0x26b 0x0606060606060606
1827 10:27:59.852348 MTRR: Fixed MSR 0x26c 0x0606060606060606
1828 10:27:59.855572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1829 10:27:59.861839 MTRR: Fixed MSR 0x26e 0x0606060606060606
1830 10:27:59.865738 MTRR: Fixed MSR 0x26f 0x0606060606060606
1831 10:27:59.868741 call enable_fixed_mtrr()
1832 10:27:59.871700 CPU physical address size: 39 bits
1833 10:27:59.875653 MTRR: default type WB/UC MTRR counts: 6/8.
1834 10:27:59.878737 MTRR: WB selected as default type.
1835 10:27:59.885204 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1836 10:27:59.891769 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1837 10:27:59.898432 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1838 10:27:59.905509 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1839 10:27:59.911767 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1840 10:27:59.918011 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1841 10:27:59.921352 MTRR: Fixed MSR 0x250 0x0606060606060606
1842 10:27:59.925005 MTRR: Fixed MSR 0x258 0x0606060606060606
1843 10:27:59.931147 MTRR: Fixed MSR 0x259 0x0000000000000000
1844 10:27:59.934778 MTRR: Fixed MSR 0x268 0x0606060606060606
1845 10:27:59.937792 MTRR: Fixed MSR 0x269 0x0606060606060606
1846 10:27:59.941332 MTRR: Fixed MSR 0x26a 0x0606060606060606
1847 10:27:59.948071 MTRR: Fixed MSR 0x26b 0x0606060606060606
1848 10:27:59.951067 MTRR: Fixed MSR 0x26c 0x0606060606060606
1849 10:27:59.954453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1850 10:27:59.958083 MTRR: Fixed MSR 0x26e 0x0606060606060606
1851 10:27:59.961356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1852 10:27:59.964440
1853 10:27:59.964540 MTRR check
1854 10:27:59.968141 Fixed MTRRs : Enabled
1855 10:27:59.968242 Variable MTRRs: Enabled
1856 10:27:59.971438
1857 10:27:59.971543 call enable_fixed_mtrr()
1858 10:27:59.977698 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1859 10:27:59.980965 CPU physical address size: 39 bits
1860 10:27:59.987234 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1861 10:27:59.987357 CBFS @ c08000 size 3f8000
1862 10:27:59.994209 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1863 10:27:59.997364 CBFS: Locating 'fallback/payload'
1864 10:28:00.001174 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 10:28:00.007516 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 10:28:00.011100 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 10:28:00.014275 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 10:28:00.017285 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 10:28:00.024296 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 10:28:00.027426 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 10:28:00.030652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 10:28:00.033644 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 10:28:00.040484 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 10:28:00.043497 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 10:28:00.047502 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 10:28:00.050443 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 10:28:00.053549 call enable_fixed_mtrr()
1878 10:28:00.057374 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 10:28:00.063705 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 10:28:00.066936 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 10:28:00.070759 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 10:28:00.073857 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 10:28:00.079945 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 10:28:00.083733 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 10:28:00.087005 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 10:28:00.090167 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 10:28:00.093862 CPU physical address size: 39 bits
1888 10:28:00.097108 call enable_fixed_mtrr()
1889 10:28:00.100029 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 10:28:00.106517 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 10:28:00.110101 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 10:28:00.113414 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 10:28:00.116422 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 10:28:00.122971 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 10:28:00.126691 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 10:28:00.129762 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 10:28:00.132892 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 10:28:00.139652 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 10:28:00.142812 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 10:28:00.146522 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 10:28:00.149685 call enable_fixed_mtrr()
1902 10:28:00.152803 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 10:28:00.156554 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 10:28:00.162738 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 10:28:00.165777 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 10:28:00.169649 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 10:28:00.172676 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 10:28:00.179105 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 10:28:00.182830 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 10:28:00.185851 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 10:28:00.189132 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 10:28:00.196045 CPU physical address size: 39 bits
1913 10:28:00.196150 call enable_fixed_mtrr()
1914 10:28:00.202365 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 10:28:00.205505 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 10:28:00.209390 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 10:28:00.212356 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 10:28:00.219191 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 10:28:00.222308 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 10:28:00.225353 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 10:28:00.229378 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 10:28:00.235403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 10:28:00.238569 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 10:28:00.242226 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 10:28:00.245333 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 10:28:00.252404 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 10:28:00.252521 call enable_fixed_mtrr()
1928 10:28:00.258681 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 10:28:00.261714 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 10:28:00.265417 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 10:28:00.268578 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 10:28:00.271881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 10:28:00.278560 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 10:28:00.281715 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 10:28:00.284914 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 10:28:00.288237 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 10:28:00.294944 CPU physical address size: 39 bits
1938 10:28:00.295044 call enable_fixed_mtrr()
1939 10:28:00.301187 CPU physical address size: 39 bits
1940 10:28:00.305075 CPU physical address size: 39 bits
1941 10:28:00.308290 CBFS: Found @ offset 1c96c0 size 3f798
1942 10:28:00.311292 CPU physical address size: 39 bits
1943 10:28:00.314929 Checking segment from ROM address 0xffdd16f8
1944 10:28:00.321297 Checking segment from ROM address 0xffdd1714
1945 10:28:00.325084 Loading segment from ROM address 0xffdd16f8
1946 10:28:00.328258 code (compression=0)
1947 10:28:00.334390 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1948 10:28:00.344173 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1949 10:28:00.344278 it's not compressed!
1950 10:28:00.437855 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1951 10:28:00.444607 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1952 10:28:00.447936 Loading segment from ROM address 0xffdd1714
1953 10:28:00.451100 Entry Point 0x30000000
1954 10:28:00.454842 Loaded segments
1955 10:28:00.460187 Finalizing chipset.
1956 10:28:00.463571 Finalizing SMM.
1957 10:28:00.466735 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1958 10:28:00.470409 mp_park_aps done after 0 msecs.
1959 10:28:00.476353 Jumping to boot code at 30000000(99b62000)
1960 10:28:00.483309 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1961 10:28:00.483410
1962 10:28:00.483498
1963 10:28:00.483571
1964 10:28:00.486512 Starting depthcharge on Helios...
1965 10:28:00.486611
1966 10:28:00.486984 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1967 10:28:00.487101 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1968 10:28:00.487195 Setting prompt string to ['hatch:']
1969 10:28:00.487283 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1970 10:28:00.496625 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1971 10:28:00.496726
1972 10:28:00.503148 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1973 10:28:00.503248
1974 10:28:00.509428 board_setup: Info: eMMC controller not present; skipping
1975 10:28:00.509527
1976 10:28:00.513160 New NVMe Controller 0x30053ac0 @ 00:1d:00
1977 10:28:00.513262
1978 10:28:00.519609 board_setup: Info: SDHCI controller not present; skipping
1979 10:28:00.519712
1980 10:28:00.526193 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1981 10:28:00.526294
1982 10:28:00.526374 Wipe memory regions:
1983 10:28:00.526450
1984 10:28:00.529451 [0x00000000001000, 0x000000000a0000)
1985 10:28:00.529553
1986 10:28:00.533192 [0x00000000100000, 0x00000030000000)
1987 10:28:00.599449
1988 10:28:00.602700 [0x00000030657430, 0x00000099a2c000)
1989 10:28:00.748912
1990 10:28:00.752193 [0x00000100000000, 0x0000045e800000)
1991 10:28:02.208477
1992 10:28:02.208643 R8152: Initializing
1993 10:28:02.208728
1994 10:28:02.211581 Version 9 (ocp_data = 6010)
1995 10:28:02.215989
1996 10:28:02.216080 R8152: Done initializing
1997 10:28:02.216157
1998 10:28:02.219040 Adding net device
1999 10:28:02.701840
2000 10:28:02.702006 R8152: Initializing
2001 10:28:02.702087
2002 10:28:02.705031 Version 6 (ocp_data = 5c30)
2003 10:28:02.705133
2004 10:28:02.709004 R8152: Done initializing
2005 10:28:02.709104
2006 10:28:02.712029 net_add_device: Attemp to include the same device
2007 10:28:02.715891
2008 10:28:02.722686 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2009 10:28:02.722789
2010 10:28:02.722867
2011 10:28:02.722940
2012 10:28:02.723242 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2014 10:28:02.823861 hatch: tftpboot 192.168.201.1 9097772/tftp-deploy-3uoc6t3g/kernel/bzImage 9097772/tftp-deploy-3uoc6t3g/kernel/cmdline 9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
2015 10:28:02.824029 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2016 10:28:02.824142 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2017 10:28:02.828039 tftpboot 192.168.201.1 9097772/tftp-deploy-3uoc6t3g/kernel/bzImaoy-3uoc6t3g/kernel/cmdline 9097772/tftp-deploy-3uoc6t3g/ramdisk/ramdisk.cpio.gz
2018 10:28:02.828143
2019 10:28:02.828220 Waiting for link
2020 10:28:03.029492
2021 10:28:03.029651 done.
2022 10:28:03.029732
2023 10:28:03.029810 MAC: 00:24:32:50:1a:59
2024 10:28:03.029884
2025 10:28:03.032059 Sending DHCP discover... done.
2026 10:28:03.032159
2027 10:28:03.035585 Waiting for reply... done.
2028 10:28:03.035683
2029 10:28:03.038669 Sending DHCP request... done.
2030 10:28:03.038769
2031 10:28:03.042390 Waiting for reply... done.
2032 10:28:03.042488
2033 10:28:03.045737 My ip is 192.168.201.14
2034 10:28:03.045836
2035 10:28:03.049036 The DHCP server ip is 192.168.201.1
2036 10:28:03.049135
2037 10:28:03.052271 TFTP server IP predefined by user: 192.168.201.1
2038 10:28:03.052369
2039 10:28:03.058743 Bootfile predefined by user: 9097772/tftp-deploy-3uoc6t3g/kernel/bzImage
2040 10:28:03.058842
2041 10:28:03.061889 Sending tftp read request... done.
2042 10:28:03.061993
2043 10:28:03.068928 Waiting for the transfer...
2044 10:28:03.069032
2045 10:28:03.600735 00000000 ################################################################
2046 10:28:03.600892
2047 10:28:04.134072 00080000 ################################################################
2048 10:28:04.134233
2049 10:28:04.666724 00100000 ################################################################
2050 10:28:04.666887
2051 10:28:05.194436 00180000 ################################################################
2052 10:28:05.194597
2053 10:28:05.713853 00200000 ################################################################
2054 10:28:05.714025
2055 10:28:06.238258 00280000 ################################################################
2056 10:28:06.238492
2057 10:28:06.768384 00300000 ################################################################
2058 10:28:06.768560
2059 10:28:07.295248 00380000 ################################################################
2060 10:28:07.295408
2061 10:28:07.823116 00400000 ################################################################
2062 10:28:07.823284
2063 10:28:08.352925 00480000 ################################################################
2064 10:28:08.353083
2065 10:28:08.881124 00500000 ################################################################
2066 10:28:08.881291
2067 10:28:09.402408 00580000 ################################################################
2068 10:28:09.402592
2069 10:28:09.926400 00600000 ################################################################
2070 10:28:09.926583
2071 10:28:10.439166 00680000 ################################################################
2072 10:28:10.439350
2073 10:28:10.951733 00700000 ################################################################
2074 10:28:10.951900
2075 10:28:11.471181 00780000 ################################################################
2076 10:28:11.471358
2077 10:28:11.989742 00800000 ################################################################
2078 10:28:11.989920
2079 10:28:12.520209 00880000 ################################################################
2080 10:28:12.520380
2081 10:28:12.790838 00900000 ################################## done.
2082 10:28:12.791011
2083 10:28:12.793657 The bootfile was 9707520 bytes long.
2084 10:28:12.793772
2085 10:28:12.796888 Sending tftp read request... done.
2086 10:28:12.797000
2087 10:28:12.799958 Waiting for the transfer...
2088 10:28:12.800058
2089 10:28:13.317841 00000000 ################################################################
2090 10:28:13.318019
2091 10:28:13.837526 00080000 ################################################################
2092 10:28:13.837699
2093 10:28:14.358449 00100000 ################################################################
2094 10:28:14.358623
2095 10:28:14.896054 00180000 ################################################################
2096 10:28:14.896215
2097 10:28:15.455302 00200000 ################################################################
2098 10:28:15.455477
2099 10:28:16.015526 00280000 ################################################################
2100 10:28:16.015684
2101 10:28:16.551530 00300000 ################################################################
2102 10:28:16.551689
2103 10:28:17.067203 00380000 ################################################################
2104 10:28:17.067357
2105 10:28:17.587009 00400000 ################################################################
2106 10:28:17.587170
2107 10:28:18.108261 00480000 ################################################################
2108 10:28:18.108423
2109 10:28:18.645939 00500000 ################################################################
2110 10:28:18.646115
2111 10:28:19.199081 00580000 ################################################################
2112 10:28:19.199238
2113 10:28:19.739579 00600000 ################################################################
2114 10:28:19.739733
2115 10:28:20.278782 00680000 ################################################################
2116 10:28:20.278948
2117 10:28:20.847138 00700000 ################################################################
2118 10:28:20.847316
2119 10:28:21.409734 00780000 ################################################################
2120 10:28:21.409903
2121 10:28:21.618126 00800000 ######################## done.
2122 10:28:21.618295
2123 10:28:21.621673 Sending tftp read request... done.
2124 10:28:21.621777
2125 10:28:21.624855 Waiting for the transfer...
2126 10:28:21.624958
2127 10:28:21.625037 00000000 # done.
2128 10:28:21.625114
2129 10:28:21.634893 Command line loaded dynamically from TFTP file: 9097772/tftp-deploy-3uoc6t3g/kernel/cmdline
2130 10:28:21.635001
2131 10:28:21.651328 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2132 10:28:21.651472
2133 10:28:21.658136 ec_init(0): CrosEC protocol v3 supported (256, 256)
2134 10:28:21.662291
2135 10:28:21.665478 Shutting down all USB controllers.
2136 10:28:21.665580
2137 10:28:21.665659 Removing current net device
2138 10:28:21.670386
2139 10:28:21.670488 Finalizing coreboot
2140 10:28:21.670569
2141 10:28:21.676257 Exiting depthcharge with code 4 at timestamp: 28532897
2142 10:28:21.676359
2143 10:28:21.676449
2144 10:28:21.676527 Starting kernel ...
2145 10:28:21.676599
2146 10:28:21.676667
2147 10:28:21.677080 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2148 10:28:21.677193 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2149 10:28:21.677280 Setting prompt string to ['Linux version [0-9]']
2150 10:28:21.677362 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2151 10:28:21.677443 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2153 10:32:40.677441 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2155 10:32:40.677700 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2157 10:32:40.677896 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2160 10:32:40.678209 end: 2 depthcharge-action (duration 00:05:00) [common]
2162 10:32:40.678470 Cleaning after the job
2163 10:32:40.678568 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/ramdisk
2164 10:32:40.679264 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/kernel
2165 10:32:40.679980 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097772/tftp-deploy-3uoc6t3g/modules
2166 10:32:40.680201 start: 5.1 power-off (timeout 00:00:30) [common]
2167 10:32:40.680384 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2168 10:32:42.863716 >> Command sent successfully.
2169 10:32:42.866123 Returned 0 in 2 seconds
2170 10:32:42.966901 end: 5.1 power-off (duration 00:00:02) [common]
2172 10:32:42.967263 start: 5.2 read-feedback (timeout 00:09:58) [common]
2173 10:32:42.967549 Listened to connection for namespace 'common' for up to 1s
2175 10:32:42.967971 Listened to connection for namespace 'common' for up to 1s
2176 10:32:43.968532 Finalising connection for namespace 'common'
2177 10:32:43.968724 Disconnecting from shell: Finalise
2178 10:32:43.968814
2179 10:32:44.069381 end: 5.2 read-feedback (duration 00:00:01) [common]
2180 10:32:44.069554 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9097772
2181 10:32:44.074888 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9097772
2182 10:32:44.075031 JobError: Your job cannot terminate cleanly.