Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 10:27:09.441160 lava-dispatcher, installed at version: 2022.11
2 10:27:09.441342 start: 0 validate
3 10:27:09.441473 Start time: 2023-02-10 10:27:09.441464+00:00 (UTC)
4 10:27:09.441600 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:27:09.441730 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
6 10:27:09.445173 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:27:09.445301 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:27:09.447310 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:27:09.447423 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 10:27:09.449649 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:27:09.449768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:27:09.452965 validate duration: 0.01
14 10:27:09.453220 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:27:09.453327 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:27:09.453418 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:27:09.453512 Not decompressing ramdisk as can be used compressed.
18 10:27:09.453694 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230203.0/amd64/initrd.cpio.gz
19 10:27:09.453764 saving as /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/ramdisk/initrd.cpio.gz
20 10:27:09.453829 total size: 5432090 (5MB)
21 10:27:09.456796 progress 0% (0MB)
22 10:27:09.458779 progress 5% (0MB)
23 10:27:09.460978 progress 10% (0MB)
24 10:27:09.463306 progress 15% (0MB)
25 10:27:09.465783 progress 20% (1MB)
26 10:27:09.467863 progress 25% (1MB)
27 10:27:09.470371 progress 30% (1MB)
28 10:27:09.472690 progress 35% (1MB)
29 10:27:09.475019 progress 40% (2MB)
30 10:27:09.477107 progress 45% (2MB)
31 10:27:09.479422 progress 50% (2MB)
32 10:27:09.481911 progress 55% (2MB)
33 10:27:09.484212 progress 60% (3MB)
34 10:27:09.486329 progress 65% (3MB)
35 10:27:09.489122 progress 70% (3MB)
36 10:27:09.491120 progress 75% (3MB)
37 10:27:09.493465 progress 80% (4MB)
38 10:27:09.495560 progress 85% (4MB)
39 10:27:09.498033 progress 90% (4MB)
40 10:27:09.500408 progress 95% (4MB)
41 10:27:09.502496 progress 100% (5MB)
42 10:27:09.502766 5MB downloaded in 0.05s (105.87MB/s)
43 10:27:09.502926 end: 1.1.1 http-download (duration 00:00:00) [common]
45 10:27:09.503176 end: 1.1 download-retry (duration 00:00:00) [common]
46 10:27:09.503270 start: 1.2 download-retry (timeout 00:10:00) [common]
47 10:27:09.503360 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 10:27:09.503463 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 10:27:09.503532 saving as /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/kernel/bzImage
50 10:27:09.503594 total size: 9707520 (9MB)
51 10:27:09.503655 No compression specified
52 10:27:09.505474 progress 0% (0MB)
53 10:27:09.509397 progress 5% (0MB)
54 10:27:09.513523 progress 10% (0MB)
55 10:27:09.518065 progress 15% (1MB)
56 10:27:09.521978 progress 20% (1MB)
57 10:27:09.526122 progress 25% (2MB)
58 10:27:09.530103 progress 30% (2MB)
59 10:27:09.534394 progress 35% (3MB)
60 10:27:09.538519 progress 40% (3MB)
61 10:27:09.542842 progress 45% (4MB)
62 10:27:09.546818 progress 50% (4MB)
63 10:27:09.550920 progress 55% (5MB)
64 10:27:09.554897 progress 60% (5MB)
65 10:27:09.559196 progress 65% (6MB)
66 10:27:09.563513 progress 70% (6MB)
67 10:27:09.567450 progress 75% (6MB)
68 10:27:09.571759 progress 80% (7MB)
69 10:27:09.575517 progress 85% (7MB)
70 10:27:09.579886 progress 90% (8MB)
71 10:27:09.584103 progress 95% (8MB)
72 10:27:09.588123 progress 100% (9MB)
73 10:27:09.588319 9MB downloaded in 0.08s (109.28MB/s)
74 10:27:09.588473 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:27:09.588712 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:27:09.588802 start: 1.3 download-retry (timeout 00:10:00) [common]
78 10:27:09.588890 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 10:27:09.588998 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230203.0/amd64/full.rootfs.tar.xz
80 10:27:09.589067 saving as /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/nfsrootfs/full.rootfs.tar
81 10:27:09.589129 total size: 133333188 (127MB)
82 10:27:09.589191 Using unxz to decompress xz
83 10:27:09.593210 progress 0% (0MB)
84 10:27:09.930620 progress 5% (6MB)
85 10:27:10.291652 progress 10% (12MB)
86 10:27:10.579166 progress 15% (19MB)
87 10:27:10.791052 progress 20% (25MB)
88 10:27:11.049431 progress 25% (31MB)
89 10:27:11.400977 progress 30% (38MB)
90 10:27:11.761956 progress 35% (44MB)
91 10:27:12.162551 progress 40% (50MB)
92 10:27:12.552246 progress 45% (57MB)
93 10:27:12.910381 progress 50% (63MB)
94 10:27:13.287507 progress 55% (69MB)
95 10:27:13.655179 progress 60% (76MB)
96 10:27:14.019860 progress 65% (82MB)
97 10:27:14.387914 progress 70% (89MB)
98 10:27:14.757577 progress 75% (95MB)
99 10:27:15.204003 progress 80% (101MB)
100 10:27:15.646080 progress 85% (108MB)
101 10:27:15.923750 progress 90% (114MB)
102 10:27:16.276266 progress 95% (120MB)
103 10:27:16.678561 progress 100% (127MB)
104 10:27:16.683323 127MB downloaded in 7.09s (17.92MB/s)
105 10:27:16.683582 end: 1.3.1 http-download (duration 00:00:07) [common]
107 10:27:16.683862 end: 1.3 download-retry (duration 00:00:07) [common]
108 10:27:16.683961 start: 1.4 download-retry (timeout 00:09:53) [common]
109 10:27:16.684057 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 10:27:16.684177 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 10:27:16.684248 saving as /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/modules/modules.tar
112 10:27:16.684312 total size: 64776 (0MB)
113 10:27:16.684377 Using unxz to decompress xz
114 10:27:16.689425 progress 50% (0MB)
115 10:27:16.689836 progress 100% (0MB)
116 10:27:16.694181 0MB downloaded in 0.01s (6.27MB/s)
117 10:27:16.694418 end: 1.4.1 http-download (duration 00:00:00) [common]
119 10:27:16.694703 end: 1.4 download-retry (duration 00:00:00) [common]
120 10:27:16.694808 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 10:27:16.694912 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 10:27:17.979296 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9097758/extract-nfsrootfs-dlk71908
123 10:27:17.979495 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 10:27:17.979607 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 10:27:17.979750 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m
126 10:27:17.979856 makedir: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin
127 10:27:17.979945 makedir: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/tests
128 10:27:17.980029 makedir: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/results
129 10:27:17.980131 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-add-keys
130 10:27:17.980264 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-add-sources
131 10:27:17.980384 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-background-process-start
132 10:27:17.980500 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-background-process-stop
133 10:27:17.980616 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-common-functions
134 10:27:17.980730 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-echo-ipv4
135 10:27:17.980844 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-install-packages
136 10:27:17.980957 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-installed-packages
137 10:27:17.981068 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-os-build
138 10:27:17.981179 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-probe-channel
139 10:27:17.981290 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-probe-ip
140 10:27:17.981400 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-target-ip
141 10:27:17.981510 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-target-mac
142 10:27:17.981620 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-target-storage
143 10:27:17.981733 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-case
144 10:27:17.981847 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-event
145 10:27:17.981959 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-feedback
146 10:27:17.982071 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-raise
147 10:27:17.982198 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-reference
148 10:27:17.982310 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-runner
149 10:27:17.982420 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-set
150 10:27:17.982530 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-test-shell
151 10:27:17.982643 Updating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-install-packages (oe)
152 10:27:17.982758 Updating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/bin/lava-installed-packages (oe)
153 10:27:17.982857 Creating /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/environment
154 10:27:17.982945 LAVA metadata
155 10:27:17.983014 - LAVA_JOB_ID=9097758
156 10:27:17.983080 - LAVA_DISPATCHER_IP=192.168.201.1
157 10:27:17.983179 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 10:27:17.983246 skipped lava-vland-overlay
159 10:27:17.983326 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 10:27:17.983410 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 10:27:17.983474 skipped lava-multinode-overlay
162 10:27:17.983552 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 10:27:17.983635 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 10:27:17.983708 Loading test definitions
165 10:27:17.983802 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 10:27:17.983875 Using /lava-9097758 at stage 0
167 10:27:17.984140 uuid=9097758_1.5.2.3.1 testdef=None
168 10:27:17.984234 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 10:27:17.984326 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 10:27:17.984807 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 10:27:17.985048 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 10:27:17.985622 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 10:27:17.985869 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 10:27:17.986537 runner path: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/0/tests/0_dmesg test_uuid 9097758_1.5.2.3.1
177 10:27:17.986687 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 10:27:17.986931 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 10:27:17.987008 Using /lava-9097758 at stage 1
181 10:27:17.987255 uuid=9097758_1.5.2.3.5 testdef=None
182 10:27:17.987348 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 10:27:17.987441 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 10:27:17.987894 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 10:27:17.988127 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 10:27:17.988709 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 10:27:17.988956 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 10:27:17.989511 runner path: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/1/tests/1_bootrr test_uuid 9097758_1.5.2.3.5
191 10:27:17.989658 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 10:27:17.989877 Creating lava-test-runner.conf files
194 10:27:17.989946 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/0 for stage 0
195 10:27:17.990032 - 0_dmesg
196 10:27:17.990108 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097758/lava-overlay-g49hhq1m/lava-9097758/1 for stage 1
197 10:27:17.990199 - 1_bootrr
198 10:27:17.990294 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 10:27:17.990383 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 10:27:17.995916 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 10:27:17.996027 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 10:27:17.996119 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 10:27:17.996212 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 10:27:17.996304 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 10:27:18.101331 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 10:27:18.101684 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 10:27:18.101799 extracting modules file /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097758/extract-nfsrootfs-dlk71908
208 10:27:18.105930 extracting modules file /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097758/extract-overlay-ramdisk-ktl0dsq9/ramdisk
209 10:27:18.109755 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 10:27:18.109875 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 10:27:18.109963 [common] Applying overlay to NFS
212 10:27:18.110037 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097758/compress-overlay-k9hbgcv8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9097758/extract-nfsrootfs-dlk71908
213 10:27:18.113918 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 10:27:18.114033 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 10:27:18.114134 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 10:27:18.114233 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 10:27:18.114315 Building ramdisk /var/lib/lava/dispatcher/tmp/9097758/extract-overlay-ramdisk-ktl0dsq9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9097758/extract-overlay-ramdisk-ktl0dsq9/ramdisk
218 10:27:18.148277 >> 24777 blocks
219 10:27:18.636607 rename /var/lib/lava/dispatcher/tmp/9097758/extract-overlay-ramdisk-ktl0dsq9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
220 10:27:18.637010 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 10:27:18.637138 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 10:27:18.637273 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 10:27:18.637376 No mkimage arch provided, not using FIT.
224 10:27:18.637469 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 10:27:18.637558 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 10:27:18.637659 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 10:27:18.637753 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 10:27:18.637835 No LXC device requested
229 10:27:18.637918 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 10:27:18.638011 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 10:27:18.638099 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 10:27:18.638215 Checking files for TFTP limit of 4294967296 bytes.
233 10:27:18.638609 end: 1 tftp-deploy (duration 00:00:09) [common]
234 10:27:18.638719 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 10:27:18.638812 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 10:27:18.638944 substitutions:
237 10:27:18.639014 - {DTB}: None
238 10:27:18.639080 - {INITRD}: 9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
239 10:27:18.639142 - {KERNEL}: 9097758/tftp-deploy-pa6wn28j/kernel/bzImage
240 10:27:18.639202 - {LAVA_MAC}: None
241 10:27:18.639261 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9097758/extract-nfsrootfs-dlk71908
242 10:27:18.639321 - {NFS_SERVER_IP}: 192.168.201.1
243 10:27:18.639378 - {PRESEED_CONFIG}: None
244 10:27:18.639438 - {PRESEED_LOCAL}: None
245 10:27:18.639495 - {RAMDISK}: 9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
246 10:27:18.639552 - {ROOT_PART}: None
247 10:27:18.639609 - {ROOT}: None
248 10:27:18.639666 - {SERVER_IP}: 192.168.201.1
249 10:27:18.639723 - {TEE}: None
250 10:27:18.639779 Parsed boot commands:
251 10:27:18.639836 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 10:27:18.639990 Parsed boot commands: tftpboot 192.168.201.1 9097758/tftp-deploy-pa6wn28j/kernel/bzImage 9097758/tftp-deploy-pa6wn28j/kernel/cmdline 9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
253 10:27:18.640090 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 10:27:18.640181 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 10:27:18.640279 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 10:27:18.640368 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 10:27:18.640438 Not connected, no need to disconnect.
258 10:27:18.640519 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 10:27:18.640606 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 10:27:18.640674 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
261 10:27:18.643646 Setting prompt string to ['lava-test: # ']
262 10:27:18.643968 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 10:27:18.644082 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 10:27:18.644187 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 10:27:18.644280 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 10:27:18.644457 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
267 10:27:28.043868 >> Command sent successfully.
268 10:27:28.053909 Returned 0 in 9 seconds
269 10:27:28.155536 end: 2.2.2.1 pdu-reboot (duration 00:00:10) [common]
271 10:27:28.156616 end: 2.2.2 reset-device (duration 00:00:10) [common]
272 10:27:28.157011 start: 2.2.3 depthcharge-start (timeout 00:04:50) [common]
273 10:27:28.157334 Setting prompt string to 'Starting depthcharge on Voema...'
274 10:27:28.157587 Changing prompt to 'Starting depthcharge on Voema...'
275 10:27:28.157853 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 10:27:28.159027 [Enter `^Ec?' for help]
277 10:27:28.159466
278 10:27:28.159929
279 10:27:28.160303 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 10:27:28.160651 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 10:27:28.160962 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 10:27:28.161254 CPU: AES supported, TXT NOT supported, VT supported
283 10:27:28.161541 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 10:27:28.161823 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 10:27:28.162103 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 10:27:28.162431 VBOOT: Loading verstage.
287 10:27:28.162713 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 10:27:28.162994 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 10:27:28.163348 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 10:27:28.163634 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 10:27:28.163992 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 10:27:28.164298
293 10:27:28.164577
294 10:27:28.164857 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 10:27:28.165139 Probing TPM: . done!
296 10:27:28.165413 TPM ready after 0 ms
297 10:27:28.165687 Connected to device vid:did:rid of 1ae0:0028:00
298 10:27:28.165963 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 10:27:28.166291 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 10:27:28.166573 Initialized TPM device CR50 revision 0
301 10:27:28.166880 tlcl_send_startup: Startup return code is 0
302 10:27:28.167226 TPM: setup succeeded
303 10:27:28.167510 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 10:27:28.167789 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 10:27:28.168065 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 10:27:28.168341 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 10:27:28.168616 Chrome EC: UHEPI supported
308 10:27:28.168892 Phase 1
309 10:27:28.169167 FMAP: area GBB found @ 1805000 (458752 bytes)
310 10:27:28.169475 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 10:27:28.169790 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 10:27:28.170069 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 10:27:28.170414 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 10:27:28.170757 Recovery requested (1009000e)
315 10:27:28.171038 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 10:27:28.171317 tlcl_extend: response is 0
317 10:27:28.171593 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 10:27:28.171869 tlcl_extend: response is 0
319 10:27:28.172144 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 10:27:28.172419 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 10:27:28.172693 BS: verstage times (exec / console): total (unknown) / 142 ms
322 10:27:28.172966
323 10:27:28.173237
324 10:27:28.173509 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 10:27:28.173875 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 10:27:28.174189 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 10:27:28.174471 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 10:27:28.174745 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 10:27:28.175020 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 10:27:28.175295 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 10:27:28.175568 TCO_STS: 0000 0000
332 10:27:28.175843 GEN_PMCON: d0015038 00002200
333 10:27:28.176117 GBLRST_CAUSE: 00000000 00000000
334 10:27:28.176435 HPR_CAUSE0: 00000000
335 10:27:28.176725 prev_sleep_state 5
336 10:27:28.177058 Boot Count incremented to 16157
337 10:27:28.177365 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 10:27:28.177644 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 10:27:28.177920 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 10:27:28.178228 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 10:27:28.178517 Chrome EC: UHEPI supported
342 10:27:28.178790 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 10:27:28.179066 Probing TPM: done!
344 10:27:28.179679 Connected to device vid:did:rid of 1ae0:0028:00
345 10:27:28.179998 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 10:27:28.180286 Initialized TPM device CR50 revision 0
347 10:27:28.180877 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 10:27:28.187060 MRC: Hash idx 0x100b comparison successful.
349 10:27:28.189513 MRC cache found, size faa8
350 10:27:28.189929 bootmode is set to: 2
351 10:27:28.192948 SPD index = 0
352 10:27:28.199243 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 10:27:28.202710 SPD: module type is LPDDR4X
354 10:27:28.206574 SPD: module part number is MT53E512M64D4NW-046
355 10:27:28.212740 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 10:27:28.218962 SPD: device width 16 bits, bus width 16 bits
357 10:27:28.222231 SPD: module size is 1024 MB (per channel)
358 10:27:28.653432 CBMEM:
359 10:27:28.656784 IMD: root @ 0x76fff000 254 entries.
360 10:27:28.660087 IMD: root @ 0x76ffec00 62 entries.
361 10:27:28.663535 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 10:27:28.670498 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 10:27:28.673579 External stage cache:
364 10:27:28.676664 IMD: root @ 0x7b3ff000 254 entries.
365 10:27:28.680177 IMD: root @ 0x7b3fec00 62 entries.
366 10:27:28.695614 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 10:27:28.701862 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 10:27:28.708502 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 10:27:28.722865 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 10:27:28.729190 cse_lite: Skip switching to RW in the recovery path
371 10:27:28.729637 8 DIMMs found
372 10:27:28.730010 SMM Memory Map
373 10:27:28.733189 SMRAM : 0x7b000000 0x800000
374 10:27:28.737298 Subregion 0: 0x7b000000 0x200000
375 10:27:28.740232 Subregion 1: 0x7b200000 0x200000
376 10:27:28.743619 Subregion 2: 0x7b400000 0x400000
377 10:27:28.746963 top_of_ram = 0x77000000
378 10:27:28.753671 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 10:27:28.757168 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 10:27:28.763528 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 10:27:28.767021 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 10:27:28.777082 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 10:27:28.783426 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 10:27:28.793048 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 10:27:28.796378 Processing 211 relocs. Offset value of 0x74c0b000
386 10:27:28.805350 BS: romstage times (exec / console): total (unknown) / 277 ms
387 10:27:28.811413
388 10:27:28.811871
389 10:27:28.821644 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 10:27:28.824931 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 10:27:28.834736 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 10:27:28.841133 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 10:27:28.847725 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 10:27:28.854456 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 10:27:28.901804 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 10:27:28.907934 Processing 5008 relocs. Offset value of 0x75d98000
397 10:27:28.911176 BS: postcar times (exec / console): total (unknown) / 59 ms
398 10:27:28.915034
399 10:27:28.915635
400 10:27:28.924800 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 10:27:28.925269 Normal boot
402 10:27:28.928053 FW_CONFIG value is 0x804c02
403 10:27:28.932136 PCI: 00:07.0 disabled by fw_config
404 10:27:28.935262 PCI: 00:07.1 disabled by fw_config
405 10:27:28.938432 PCI: 00:0d.2 disabled by fw_config
406 10:27:28.941784 PCI: 00:1c.7 disabled by fw_config
407 10:27:28.948507 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 10:27:28.955029 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 10:27:28.958332 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 10:27:28.961574 GENERIC: 0.0 disabled by fw_config
411 10:27:28.964773 GENERIC: 1.0 disabled by fw_config
412 10:27:28.971311 fw_config match found: DB_USB=USB3_ACTIVE
413 10:27:28.975205 fw_config match found: DB_USB=USB3_ACTIVE
414 10:27:28.978001 fw_config match found: DB_USB=USB3_ACTIVE
415 10:27:28.984941 fw_config match found: DB_USB=USB3_ACTIVE
416 10:27:28.988285 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 10:27:28.994571 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 10:27:29.004734 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 10:27:29.011394 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 10:27:29.014861 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 10:27:29.021005 microcode: Update skipped, already up-to-date
422 10:27:29.027578 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 10:27:29.055260 Detected 4 core, 8 thread CPU.
424 10:27:29.058629 Setting up SMI for CPU
425 10:27:29.061774 IED base = 0x7b400000
426 10:27:29.062255 IED size = 0x00400000
427 10:27:29.065237 Will perform SMM setup.
428 10:27:29.071308 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 10:27:29.078622 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 10:27:29.085036 Processing 16 relocs. Offset value of 0x00030000
431 10:27:29.087961 Attempting to start 7 APs
432 10:27:29.091327 Waiting for 10ms after sending INIT.
433 10:27:29.107681 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 10:27:29.111125 AP: slot 2 apic_id 3.
435 10:27:29.114399 AP: slot 6 apic_id 2.
436 10:27:29.114865 AP: slot 3 apic_id 7.
437 10:27:29.117123 AP: slot 7 apic_id 6.
438 10:27:29.120811 AP: slot 4 apic_id 5.
439 10:27:29.121261 AP: slot 5 apic_id 4.
440 10:27:29.121619 done.
441 10:27:29.127277 Waiting for 2nd SIPI to complete...done.
442 10:27:29.133833 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 10:27:29.140422 Processing 13 relocs. Offset value of 0x00038000
444 10:27:29.143681 Unable to locate Global NVS
445 10:27:29.150285 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 10:27:29.153665 Installing permanent SMM handler to 0x7b000000
447 10:27:29.163693 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 10:27:29.166596 Processing 794 relocs. Offset value of 0x7b010000
449 10:27:29.176793 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 10:27:29.180092 Processing 13 relocs. Offset value of 0x7b008000
451 10:27:29.186483 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 10:27:29.193362 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 10:27:29.196755 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 10:27:29.202865 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 10:27:29.209549 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 10:27:29.216271 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 10:27:29.223099 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 10:27:29.226121 Unable to locate Global NVS
459 10:27:29.232758 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 10:27:29.236204 Clearing SMI status registers
461 10:27:29.239483 SMI_STS: PM1
462 10:27:29.239992 PM1_STS: PWRBTN
463 10:27:29.246251 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 10:27:29.249549 In relocation handler: CPU 0
465 10:27:29.252805 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 10:27:29.259053 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 10:27:29.262450 Relocation complete.
468 10:27:29.268899 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 10:27:29.272438 In relocation handler: CPU 1
470 10:27:29.275685 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 10:27:29.278680 Relocation complete.
472 10:27:29.285390 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 10:27:29.288953 In relocation handler: CPU 6
474 10:27:29.291801 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 10:27:29.295432 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 10:27:29.298804 Relocation complete.
477 10:27:29.305056 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 10:27:29.308518 In relocation handler: CPU 2
479 10:27:29.311632 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 10:27:29.315470 Relocation complete.
481 10:27:29.321840 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 10:27:29.325607 In relocation handler: CPU 3
483 10:27:29.328485 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 10:27:29.331819 Relocation complete.
485 10:27:29.338452 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 10:27:29.342033 In relocation handler: CPU 7
487 10:27:29.344990 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 10:27:29.351426 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 10:27:29.351512 Relocation complete.
490 10:27:29.361254 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
491 10:27:29.364647 In relocation handler: CPU 4
492 10:27:29.368079 New SMBASE=0x7afff000 IEDBASE=0x7b400000
493 10:27:29.368184 Relocation complete.
494 10:27:29.377761 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 10:27:29.381226 In relocation handler: CPU 5
496 10:27:29.384636 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 10:27:29.387968 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 10:27:29.391218 Relocation complete.
499 10:27:29.394161 Initializing CPU #0
500 10:27:29.398111 CPU: vendor Intel device 806c1
501 10:27:29.401854 CPU: family 06, model 8c, stepping 01
502 10:27:29.401948 Clearing out pending MCEs
503 10:27:29.405744 Setting up local APIC...
504 10:27:29.409145 apic_id: 0x00 done.
505 10:27:29.412065 Turbo is available but hidden
506 10:27:29.412154 Turbo is available and visible
507 10:27:29.418827 microcode: Update skipped, already up-to-date
508 10:27:29.422404 CPU #0 initialized
509 10:27:29.422494 Initializing CPU #7
510 10:27:29.425617 Initializing CPU #3
511 10:27:29.428776 CPU: vendor Intel device 806c1
512 10:27:29.432061 CPU: family 06, model 8c, stepping 01
513 10:27:29.435532 CPU: vendor Intel device 806c1
514 10:27:29.438439 CPU: family 06, model 8c, stepping 01
515 10:27:29.441808 Clearing out pending MCEs
516 10:27:29.445143 Clearing out pending MCEs
517 10:27:29.445237 Setting up local APIC...
518 10:27:29.448924 Initializing CPU #1
519 10:27:29.452113 Initializing CPU #2
520 10:27:29.452212 Initializing CPU #6
521 10:27:29.455443 CPU: vendor Intel device 806c1
522 10:27:29.458312 CPU: family 06, model 8c, stepping 01
523 10:27:29.461701 CPU: vendor Intel device 806c1
524 10:27:29.465317 CPU: family 06, model 8c, stepping 01
525 10:27:29.468393 Clearing out pending MCEs
526 10:27:29.471677 Clearing out pending MCEs
527 10:27:29.474960 Setting up local APIC...
528 10:27:29.478473 Setting up local APIC...
529 10:27:29.478560 Initializing CPU #4
530 10:27:29.481375 Initializing CPU #5
531 10:27:29.484745 CPU: vendor Intel device 806c1
532 10:27:29.488131 CPU: family 06, model 8c, stepping 01
533 10:27:29.491534 CPU: vendor Intel device 806c1
534 10:27:29.495003 CPU: family 06, model 8c, stepping 01
535 10:27:29.498472 Clearing out pending MCEs
536 10:27:29.501278 Clearing out pending MCEs
537 10:27:29.501386 Setting up local APIC...
538 10:27:29.504795 apic_id: 0x07 done.
539 10:27:29.508107 apic_id: 0x06 done.
540 10:27:29.511788 microcode: Update skipped, already up-to-date
541 10:27:29.515025 microcode: Update skipped, already up-to-date
542 10:27:29.518351 CPU #3 initialized
543 10:27:29.521601 CPU #7 initialized
544 10:27:29.521687 apic_id: 0x05 done.
545 10:27:29.524967 Setting up local APIC...
546 10:27:29.528383 Setting up local APIC...
547 10:27:29.528525 apic_id: 0x04 done.
548 10:27:29.534913 microcode: Update skipped, already up-to-date
549 10:27:29.537785 microcode: Update skipped, already up-to-date
550 10:27:29.541556 CPU #4 initialized
551 10:27:29.541645 CPU #5 initialized
552 10:27:29.544942 apic_id: 0x02 done.
553 10:27:29.548433 apic_id: 0x03 done.
554 10:27:29.551195 microcode: Update skipped, already up-to-date
555 10:27:29.554769 CPU: vendor Intel device 806c1
556 10:27:29.558183 CPU: family 06, model 8c, stepping 01
557 10:27:29.561507 Clearing out pending MCEs
558 10:27:29.561596 CPU #6 initialized
559 10:27:29.567619 microcode: Update skipped, already up-to-date
560 10:27:29.571058 Setting up local APIC...
561 10:27:29.571145 CPU #2 initialized
562 10:27:29.574333 apic_id: 0x01 done.
563 10:27:29.577959 microcode: Update skipped, already up-to-date
564 10:27:29.581006 CPU #1 initialized
565 10:27:29.584331 bsp_do_flight_plan done after 455 msecs.
566 10:27:29.588056 CPU: frequency set to 4000 MHz
567 10:27:29.590974 Enabling SMIs.
568 10:27:29.597396 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 10:27:29.612571 SATAXPCIE1 indicates PCIe NVMe is present
570 10:27:29.615563 Probing TPM: done!
571 10:27:29.619057 Connected to device vid:did:rid of 1ae0:0028:00
572 10:27:29.629349 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 10:27:29.632706 Initialized TPM device CR50 revision 0
574 10:27:29.635979 Enabling S0i3.4
575 10:27:29.642239 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 10:27:29.645545 Found a VBT of 8704 bytes after decompression
577 10:27:29.652534 cse_lite: CSE RO boot. HybridStorageMode disabled
578 10:27:29.659107 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 10:27:29.736099 FSPS returned 0
580 10:27:29.739235 Executing Phase 1 of FspMultiPhaseSiInit
581 10:27:29.749780 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 10:27:29.752998 port C0 DISC req: usage 1 usb3 1 usb2 5
583 10:27:29.756231 Raw Buffer output 0 00000511
584 10:27:29.759540 Raw Buffer output 1 00000000
585 10:27:29.763318 pmc_send_ipc_cmd succeeded
586 10:27:29.769453 port C1 DISC req: usage 1 usb3 2 usb2 3
587 10:27:29.769961 Raw Buffer output 0 00000321
588 10:27:29.773266 Raw Buffer output 1 00000000
589 10:27:29.777122 pmc_send_ipc_cmd succeeded
590 10:27:29.782099 Detected 4 core, 8 thread CPU.
591 10:27:29.785530 Detected 4 core, 8 thread CPU.
592 10:27:30.019768 Display FSP Version Info HOB
593 10:27:30.023074 Reference Code - CPU = a.0.4c.31
594 10:27:30.026162 uCode Version = 0.0.0.86
595 10:27:30.029463 TXT ACM version = ff.ff.ff.ffff
596 10:27:30.033107 Reference Code - ME = a.0.4c.31
597 10:27:30.035980 MEBx version = 0.0.0.0
598 10:27:30.039874 ME Firmware Version = Consumer SKU
599 10:27:30.042819 Reference Code - PCH = a.0.4c.31
600 10:27:30.046419 PCH-CRID Status = Disabled
601 10:27:30.049912 PCH-CRID Original Value = ff.ff.ff.ffff
602 10:27:30.053077 PCH-CRID New Value = ff.ff.ff.ffff
603 10:27:30.056813 OPROM - RST - RAID = ff.ff.ff.ffff
604 10:27:30.060380 PCH Hsio Version = 4.0.0.0
605 10:27:30.062585 Reference Code - SA - System Agent = a.0.4c.31
606 10:27:30.065993 Reference Code - MRC = 2.0.0.1
607 10:27:30.069628 SA - PCIe Version = a.0.4c.31
608 10:27:30.072477 SA-CRID Status = Disabled
609 10:27:30.075800 SA-CRID Original Value = 0.0.0.1
610 10:27:30.079220 SA-CRID New Value = 0.0.0.1
611 10:27:30.082401 OPROM - VBIOS = ff.ff.ff.ffff
612 10:27:30.086286 IO Manageability Engine FW Version = 11.1.4.0
613 10:27:30.089370 PHY Build Version = 0.0.0.e0
614 10:27:30.092685 Thunderbolt(TM) FW Version = 0.0.0.0
615 10:27:30.099000 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 10:27:30.102438 ITSS IRQ Polarities Before:
617 10:27:30.102524 IPC0: 0xffffffff
618 10:27:30.105295 IPC1: 0xffffffff
619 10:27:30.105381 IPC2: 0xffffffff
620 10:27:30.108792 IPC3: 0xffffffff
621 10:27:30.112085 ITSS IRQ Polarities After:
622 10:27:30.112170 IPC0: 0xffffffff
623 10:27:30.115643 IPC1: 0xffffffff
624 10:27:30.115728 IPC2: 0xffffffff
625 10:27:30.119371 IPC3: 0xffffffff
626 10:27:30.122666 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 10:27:30.135611 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 10:27:30.145446 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 10:27:30.159049 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 10:27:30.165225 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 10:27:30.168557 Enumerating buses...
632 10:27:30.171751 Show all devs... Before device enumeration.
633 10:27:30.175062 Root Device: enabled 1
634 10:27:30.175510 DOMAIN: 0000: enabled 1
635 10:27:30.178205 CPU_CLUSTER: 0: enabled 1
636 10:27:30.181555 PCI: 00:00.0: enabled 1
637 10:27:30.184841 PCI: 00:02.0: enabled 1
638 10:27:30.185285 PCI: 00:04.0: enabled 1
639 10:27:30.188082 PCI: 00:05.0: enabled 1
640 10:27:30.191558 PCI: 00:06.0: enabled 0
641 10:27:30.194793 PCI: 00:07.0: enabled 0
642 10:27:30.195240 PCI: 00:07.1: enabled 0
643 10:27:30.198554 PCI: 00:07.2: enabled 0
644 10:27:30.202293 PCI: 00:07.3: enabled 0
645 10:27:30.205450 PCI: 00:08.0: enabled 1
646 10:27:30.206001 PCI: 00:09.0: enabled 0
647 10:27:30.208107 PCI: 00:0a.0: enabled 0
648 10:27:30.211492 PCI: 00:0d.0: enabled 1
649 10:27:30.214827 PCI: 00:0d.1: enabled 0
650 10:27:30.215273 PCI: 00:0d.2: enabled 0
651 10:27:30.218242 PCI: 00:0d.3: enabled 0
652 10:27:30.221592 PCI: 00:0e.0: enabled 0
653 10:27:30.222076 PCI: 00:10.2: enabled 1
654 10:27:30.224928 PCI: 00:10.6: enabled 0
655 10:27:30.228451 PCI: 00:10.7: enabled 0
656 10:27:30.231294 PCI: 00:12.0: enabled 0
657 10:27:30.231773 PCI: 00:12.6: enabled 0
658 10:27:30.235246 PCI: 00:13.0: enabled 0
659 10:27:30.238082 PCI: 00:14.0: enabled 1
660 10:27:30.241521 PCI: 00:14.1: enabled 0
661 10:27:30.241969 PCI: 00:14.2: enabled 1
662 10:27:30.244671 PCI: 00:14.3: enabled 1
663 10:27:30.248181 PCI: 00:15.0: enabled 1
664 10:27:30.251368 PCI: 00:15.1: enabled 1
665 10:27:30.251817 PCI: 00:15.2: enabled 1
666 10:27:30.254619 PCI: 00:15.3: enabled 1
667 10:27:30.257817 PCI: 00:16.0: enabled 1
668 10:27:30.261592 PCI: 00:16.1: enabled 0
669 10:27:30.262058 PCI: 00:16.2: enabled 0
670 10:27:30.264447 PCI: 00:16.3: enabled 0
671 10:27:30.267864 PCI: 00:16.4: enabled 0
672 10:27:30.271158 PCI: 00:16.5: enabled 0
673 10:27:30.271608 PCI: 00:17.0: enabled 1
674 10:27:30.274388 PCI: 00:19.0: enabled 0
675 10:27:30.277698 PCI: 00:19.1: enabled 1
676 10:27:30.281263 PCI: 00:19.2: enabled 0
677 10:27:30.281821 PCI: 00:1c.0: enabled 1
678 10:27:30.284322 PCI: 00:1c.1: enabled 0
679 10:27:30.288193 PCI: 00:1c.2: enabled 0
680 10:27:30.291249 PCI: 00:1c.3: enabled 0
681 10:27:30.291724 PCI: 00:1c.4: enabled 0
682 10:27:30.293970 PCI: 00:1c.5: enabled 0
683 10:27:30.297251 PCI: 00:1c.6: enabled 1
684 10:27:30.297700 PCI: 00:1c.7: enabled 0
685 10:27:30.300786 PCI: 00:1d.0: enabled 1
686 10:27:30.304336 PCI: 00:1d.1: enabled 0
687 10:27:30.307423 PCI: 00:1d.2: enabled 1
688 10:27:30.307877 PCI: 00:1d.3: enabled 0
689 10:27:30.310810 PCI: 00:1e.0: enabled 1
690 10:27:30.314164 PCI: 00:1e.1: enabled 0
691 10:27:30.317135 PCI: 00:1e.2: enabled 1
692 10:27:30.317595 PCI: 00:1e.3: enabled 1
693 10:27:30.320505 PCI: 00:1f.0: enabled 1
694 10:27:30.324050 PCI: 00:1f.1: enabled 0
695 10:27:30.327218 PCI: 00:1f.2: enabled 1
696 10:27:30.327672 PCI: 00:1f.3: enabled 1
697 10:27:30.330432 PCI: 00:1f.4: enabled 0
698 10:27:30.333666 PCI: 00:1f.5: enabled 1
699 10:27:30.337470 PCI: 00:1f.6: enabled 0
700 10:27:30.337917 PCI: 00:1f.7: enabled 0
701 10:27:30.340805 APIC: 00: enabled 1
702 10:27:30.343484 GENERIC: 0.0: enabled 1
703 10:27:30.343937 GENERIC: 0.0: enabled 1
704 10:27:30.347009 GENERIC: 1.0: enabled 1
705 10:27:30.350483 GENERIC: 0.0: enabled 1
706 10:27:30.353553 GENERIC: 1.0: enabled 1
707 10:27:30.354003 USB0 port 0: enabled 1
708 10:27:30.356700 GENERIC: 0.0: enabled 1
709 10:27:30.360151 USB0 port 0: enabled 1
710 10:27:30.363219 GENERIC: 0.0: enabled 1
711 10:27:30.363836 I2C: 00:1a: enabled 1
712 10:27:30.366506 I2C: 00:31: enabled 1
713 10:27:30.370365 I2C: 00:32: enabled 1
714 10:27:30.370933 I2C: 00:10: enabled 1
715 10:27:30.373462 I2C: 00:15: enabled 1
716 10:27:30.376926 GENERIC: 0.0: enabled 0
717 10:27:30.377488 GENERIC: 1.0: enabled 0
718 10:27:30.379978 GENERIC: 0.0: enabled 1
719 10:27:30.382847 SPI: 00: enabled 1
720 10:27:30.383299 SPI: 00: enabled 1
721 10:27:30.386201 PNP: 0c09.0: enabled 1
722 10:27:30.389426 GENERIC: 0.0: enabled 1
723 10:27:30.392825 USB3 port 0: enabled 1
724 10:27:30.393277 USB3 port 1: enabled 1
725 10:27:30.396321 USB3 port 2: enabled 0
726 10:27:30.399505 USB3 port 3: enabled 0
727 10:27:30.399953 USB2 port 0: enabled 0
728 10:27:30.402653 USB2 port 1: enabled 1
729 10:27:30.406054 USB2 port 2: enabled 1
730 10:27:30.409687 USB2 port 3: enabled 0
731 10:27:30.410160 USB2 port 4: enabled 1
732 10:27:30.412879 USB2 port 5: enabled 0
733 10:27:30.416280 USB2 port 6: enabled 0
734 10:27:30.416726 USB2 port 7: enabled 0
735 10:27:30.419105 USB2 port 8: enabled 0
736 10:27:30.422442 USB2 port 9: enabled 0
737 10:27:30.425868 USB3 port 0: enabled 0
738 10:27:30.426345 USB3 port 1: enabled 1
739 10:27:30.429064 USB3 port 2: enabled 0
740 10:27:30.432617 USB3 port 3: enabled 0
741 10:27:30.433067 GENERIC: 0.0: enabled 1
742 10:27:30.435956 GENERIC: 1.0: enabled 1
743 10:27:30.439289 APIC: 01: enabled 1
744 10:27:30.439742 APIC: 03: enabled 1
745 10:27:30.442819 APIC: 07: enabled 1
746 10:27:30.445615 APIC: 05: enabled 1
747 10:27:30.446065 APIC: 04: enabled 1
748 10:27:30.449339 APIC: 02: enabled 1
749 10:27:30.449901 APIC: 06: enabled 1
750 10:27:30.452442 Compare with tree...
751 10:27:30.455816 Root Device: enabled 1
752 10:27:30.459064 DOMAIN: 0000: enabled 1
753 10:27:30.459564 PCI: 00:00.0: enabled 1
754 10:27:30.462234 PCI: 00:02.0: enabled 1
755 10:27:30.465853 PCI: 00:04.0: enabled 1
756 10:27:30.469397 GENERIC: 0.0: enabled 1
757 10:27:30.471998 PCI: 00:05.0: enabled 1
758 10:27:30.472455 PCI: 00:06.0: enabled 0
759 10:27:30.475392 PCI: 00:07.0: enabled 0
760 10:27:30.478537 GENERIC: 0.0: enabled 1
761 10:27:30.481990 PCI: 00:07.1: enabled 0
762 10:27:30.485423 GENERIC: 1.0: enabled 1
763 10:27:30.485873 PCI: 00:07.2: enabled 0
764 10:27:30.488751 GENERIC: 0.0: enabled 1
765 10:27:30.492456 PCI: 00:07.3: enabled 0
766 10:27:30.495494 GENERIC: 1.0: enabled 1
767 10:27:30.498702 PCI: 00:08.0: enabled 1
768 10:27:30.502158 PCI: 00:09.0: enabled 0
769 10:27:30.502611 PCI: 00:0a.0: enabled 0
770 10:27:30.505446 PCI: 00:0d.0: enabled 1
771 10:27:30.508645 USB0 port 0: enabled 1
772 10:27:30.511993 USB3 port 0: enabled 1
773 10:27:30.515056 USB3 port 1: enabled 1
774 10:27:30.515499 USB3 port 2: enabled 0
775 10:27:30.518552 USB3 port 3: enabled 0
776 10:27:30.521403 PCI: 00:0d.1: enabled 0
777 10:27:30.524914 PCI: 00:0d.2: enabled 0
778 10:27:30.528302 GENERIC: 0.0: enabled 1
779 10:27:30.528754 PCI: 00:0d.3: enabled 0
780 10:27:30.531642 PCI: 00:0e.0: enabled 0
781 10:27:30.535001 PCI: 00:10.2: enabled 1
782 10:27:30.538310 PCI: 00:10.6: enabled 0
783 10:27:30.541952 PCI: 00:10.7: enabled 0
784 10:27:30.542541 PCI: 00:12.0: enabled 0
785 10:27:30.545038 PCI: 00:12.6: enabled 0
786 10:27:30.548361 PCI: 00:13.0: enabled 0
787 10:27:30.551405 PCI: 00:14.0: enabled 1
788 10:27:30.554771 USB0 port 0: enabled 1
789 10:27:30.555225 USB2 port 0: enabled 0
790 10:27:30.558095 USB2 port 1: enabled 1
791 10:27:30.561626 USB2 port 2: enabled 1
792 10:27:30.564392 USB2 port 3: enabled 0
793 10:27:30.567762 USB2 port 4: enabled 1
794 10:27:30.571104 USB2 port 5: enabled 0
795 10:27:30.571556 USB2 port 6: enabled 0
796 10:27:30.574411 USB2 port 7: enabled 0
797 10:27:30.577943 USB2 port 8: enabled 0
798 10:27:30.581289 USB2 port 9: enabled 0
799 10:27:30.584180 USB3 port 0: enabled 0
800 10:27:30.588006 USB3 port 1: enabled 1
801 10:27:30.588455 USB3 port 2: enabled 0
802 10:27:30.590856 USB3 port 3: enabled 0
803 10:27:30.594437 PCI: 00:14.1: enabled 0
804 10:27:30.597626 PCI: 00:14.2: enabled 1
805 10:27:30.600950 PCI: 00:14.3: enabled 1
806 10:27:30.601401 GENERIC: 0.0: enabled 1
807 10:27:30.604198 PCI: 00:15.0: enabled 1
808 10:27:30.607671 I2C: 00:1a: enabled 1
809 10:27:30.610823 I2C: 00:31: enabled 1
810 10:27:30.614564 I2C: 00:32: enabled 1
811 10:27:30.615013 PCI: 00:15.1: enabled 1
812 10:27:30.617375 I2C: 00:10: enabled 1
813 10:27:30.620861 PCI: 00:15.2: enabled 1
814 10:27:30.623978 PCI: 00:15.3: enabled 1
815 10:27:30.627689 PCI: 00:16.0: enabled 1
816 10:27:30.628261 PCI: 00:16.1: enabled 0
817 10:27:30.630883 PCI: 00:16.2: enabled 0
818 10:27:30.634272 PCI: 00:16.3: enabled 0
819 10:27:30.637026 PCI: 00:16.4: enabled 0
820 10:27:30.640425 PCI: 00:16.5: enabled 0
821 10:27:30.640932 PCI: 00:17.0: enabled 1
822 10:27:30.644191 PCI: 00:19.0: enabled 0
823 10:27:30.648010 PCI: 00:19.1: enabled 1
824 10:27:30.648474 I2C: 00:15: enabled 1
825 10:27:30.651437 PCI: 00:19.2: enabled 0
826 10:27:30.654929 PCI: 00:1d.0: enabled 1
827 10:27:30.657743 GENERIC: 0.0: enabled 1
828 10:27:30.661050 PCI: 00:1e.0: enabled 1
829 10:27:30.661518 PCI: 00:1e.1: enabled 0
830 10:27:30.711461 PCI: 00:1e.2: enabled 1
831 10:27:30.712073 SPI: 00: enabled 1
832 10:27:30.712856 PCI: 00:1e.3: enabled 1
833 10:27:30.713267 SPI: 00: enabled 1
834 10:27:30.713635 PCI: 00:1f.0: enabled 1
835 10:27:30.713990 PNP: 0c09.0: enabled 1
836 10:27:30.714365 PCI: 00:1f.1: enabled 0
837 10:27:30.714766 PCI: 00:1f.2: enabled 1
838 10:27:30.715105 GENERIC: 0.0: enabled 1
839 10:27:30.715442 GENERIC: 0.0: enabled 1
840 10:27:30.715770 GENERIC: 1.0: enabled 1
841 10:27:30.716094 PCI: 00:1f.3: enabled 1
842 10:27:30.716768 PCI: 00:1f.4: enabled 0
843 10:27:30.717139 PCI: 00:1f.5: enabled 1
844 10:27:30.717471 PCI: 00:1f.6: enabled 0
845 10:27:30.717800 PCI: 00:1f.7: enabled 0
846 10:27:30.718150 CPU_CLUSTER: 0: enabled 1
847 10:27:30.718483 APIC: 00: enabled 1
848 10:27:30.718803 APIC: 01: enabled 1
849 10:27:30.763173 APIC: 03: enabled 1
850 10:27:30.763801 APIC: 07: enabled 1
851 10:27:30.764175 APIC: 05: enabled 1
852 10:27:30.764538 APIC: 04: enabled 1
853 10:27:30.764886 APIC: 02: enabled 1
854 10:27:30.765208 APIC: 06: enabled 1
855 10:27:30.765861 Root Device scanning...
856 10:27:30.766272 scan_static_bus for Root Device
857 10:27:30.766601 DOMAIN: 0000 enabled
858 10:27:30.766931 CPU_CLUSTER: 0 enabled
859 10:27:30.767236 DOMAIN: 0000 scanning...
860 10:27:30.767556 PCI: pci_scan_bus for bus 00
861 10:27:30.767856 PCI: 00:00.0 [8086/0000] ops
862 10:27:30.768173 PCI: 00:00.0 [8086/9a12] enabled
863 10:27:30.768477 PCI: 00:02.0 [8086/0000] bus ops
864 10:27:30.768797 PCI: 00:02.0 [8086/9a40] enabled
865 10:27:30.769094 PCI: 00:04.0 [8086/0000] bus ops
866 10:27:30.769391 PCI: 00:04.0 [8086/9a03] enabled
867 10:27:30.813340 PCI: 00:05.0 [8086/9a19] enabled
868 10:27:30.813507 PCI: 00:07.0 [0000/0000] hidden
869 10:27:30.813777 PCI: 00:08.0 [8086/9a11] enabled
870 10:27:30.813851 PCI: 00:0a.0 [8086/9a0d] disabled
871 10:27:30.813917 PCI: 00:0d.0 [8086/0000] bus ops
872 10:27:30.813979 PCI: 00:0d.0 [8086/9a13] enabled
873 10:27:30.814360 PCI: 00:14.0 [8086/0000] bus ops
874 10:27:30.814448 PCI: 00:14.0 [8086/a0ed] enabled
875 10:27:30.814541 PCI: 00:14.2 [8086/a0ef] enabled
876 10:27:30.814622 PCI: 00:14.3 [8086/0000] bus ops
877 10:27:30.814869 PCI: 00:14.3 [8086/a0f0] enabled
878 10:27:30.814939 PCI: 00:15.0 [8086/0000] bus ops
879 10:27:30.815001 PCI: 00:15.0 [8086/a0e8] enabled
880 10:27:30.815243 PCI: 00:15.1 [8086/0000] bus ops
881 10:27:30.815309 PCI: 00:15.1 [8086/a0e9] enabled
882 10:27:30.846407 PCI: 00:15.2 [8086/0000] bus ops
883 10:27:30.846500 PCI: 00:15.2 [8086/a0ea] enabled
884 10:27:30.846572 PCI: 00:15.3 [8086/0000] bus ops
885 10:27:30.846641 PCI: 00:15.3 [8086/a0eb] enabled
886 10:27:30.846892 PCI: 00:16.0 [8086/0000] ops
887 10:27:30.846964 PCI: 00:16.0 [8086/a0e0] enabled
888 10:27:30.847209 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 10:27:30.847457 PCI: 00:19.0 [8086/0000] bus ops
890 10:27:30.847525 PCI: 00:19.0 [8086/a0c5] disabled
891 10:27:30.850415 PCI: 00:19.1 [8086/0000] bus ops
892 10:27:30.850506 PCI: 00:19.1 [8086/a0c6] enabled
893 10:27:30.853719 PCI: 00:1d.0 [8086/0000] bus ops
894 10:27:30.857094 PCI: 00:1d.0 [8086/a0b0] enabled
895 10:27:30.860027 PCI: 00:1e.0 [8086/0000] ops
896 10:27:30.863690 PCI: 00:1e.0 [8086/a0a8] enabled
897 10:27:30.867051 PCI: 00:1e.2 [8086/0000] bus ops
898 10:27:30.870482 PCI: 00:1e.2 [8086/a0aa] enabled
899 10:27:30.873785 PCI: 00:1e.3 [8086/0000] bus ops
900 10:27:30.876987 PCI: 00:1e.3 [8086/a0ab] enabled
901 10:27:30.880611 PCI: 00:1f.0 [8086/0000] bus ops
902 10:27:30.883171 PCI: 00:1f.0 [8086/a087] enabled
903 10:27:30.886914 RTC Init
904 10:27:30.890117 Set power on after power failure.
905 10:27:30.890300 Disabling Deep S3
906 10:27:30.893660 Disabling Deep S3
907 10:27:30.893851 Disabling Deep S4
908 10:27:30.896436 Disabling Deep S4
909 10:27:30.896622 Disabling Deep S5
910 10:27:30.900149 Disabling Deep S5
911 10:27:30.903520 PCI: 00:1f.2 [0000/0000] hidden
912 10:27:30.906815 PCI: 00:1f.3 [8086/0000] bus ops
913 10:27:30.910148 PCI: 00:1f.3 [8086/a0c8] enabled
914 10:27:30.913130 PCI: 00:1f.5 [8086/0000] bus ops
915 10:27:30.916898 PCI: 00:1f.5 [8086/a0a4] enabled
916 10:27:30.920241 PCI: Leftover static devices:
917 10:27:30.920686 PCI: 00:10.2
918 10:27:30.923063 PCI: 00:10.6
919 10:27:30.923504 PCI: 00:10.7
920 10:27:30.926575 PCI: 00:06.0
921 10:27:30.927017 PCI: 00:07.1
922 10:27:30.927371 PCI: 00:07.2
923 10:27:30.930226 PCI: 00:07.3
924 10:27:30.930792 PCI: 00:09.0
925 10:27:30.933265 PCI: 00:0d.1
926 10:27:30.933727 PCI: 00:0d.2
927 10:27:30.936523 PCI: 00:0d.3
928 10:27:30.937099 PCI: 00:0e.0
929 10:27:30.937463 PCI: 00:12.0
930 10:27:30.939724 PCI: 00:12.6
931 10:27:30.940170 PCI: 00:13.0
932 10:27:30.943016 PCI: 00:14.1
933 10:27:30.943457 PCI: 00:16.1
934 10:27:30.943808 PCI: 00:16.2
935 10:27:30.946772 PCI: 00:16.3
936 10:27:30.947216 PCI: 00:16.4
937 10:27:30.949614 PCI: 00:16.5
938 10:27:30.950191 PCI: 00:17.0
939 10:27:30.953092 PCI: 00:19.2
940 10:27:30.953799 PCI: 00:1e.1
941 10:27:30.954208 PCI: 00:1f.1
942 10:27:30.956090 PCI: 00:1f.4
943 10:27:30.956538 PCI: 00:1f.6
944 10:27:30.959723 PCI: 00:1f.7
945 10:27:30.962807 PCI: Check your devicetree.cb.
946 10:27:30.963253 PCI: 00:02.0 scanning...
947 10:27:30.966066 scan_generic_bus for PCI: 00:02.0
948 10:27:30.972707 scan_generic_bus for PCI: 00:02.0 done
949 10:27:30.976219 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 10:27:30.979784 PCI: 00:04.0 scanning...
951 10:27:30.983329 scan_generic_bus for PCI: 00:04.0
952 10:27:30.985841 GENERIC: 0.0 enabled
953 10:27:30.989176 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 10:27:30.996173 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 10:27:30.999145 PCI: 00:0d.0 scanning...
956 10:27:31.002603 scan_static_bus for PCI: 00:0d.0
957 10:27:31.003050 USB0 port 0 enabled
958 10:27:31.006270 USB0 port 0 scanning...
959 10:27:31.009335 scan_static_bus for USB0 port 0
960 10:27:31.012564 USB3 port 0 enabled
961 10:27:31.013005 USB3 port 1 enabled
962 10:27:31.015944 USB3 port 2 disabled
963 10:27:31.018906 USB3 port 3 disabled
964 10:27:31.019348 USB3 port 0 scanning...
965 10:27:31.022426 scan_static_bus for USB3 port 0
966 10:27:31.029341 scan_static_bus for USB3 port 0 done
967 10:27:31.032652 scan_bus: bus USB3 port 0 finished in 6 msecs
968 10:27:31.035538 USB3 port 1 scanning...
969 10:27:31.038879 scan_static_bus for USB3 port 1
970 10:27:31.042177 scan_static_bus for USB3 port 1 done
971 10:27:31.045600 scan_bus: bus USB3 port 1 finished in 6 msecs
972 10:27:31.049423 scan_static_bus for USB0 port 0 done
973 10:27:31.055360 scan_bus: bus USB0 port 0 finished in 43 msecs
974 10:27:31.058691 scan_static_bus for PCI: 00:0d.0 done
975 10:27:31.061976 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 10:27:31.065185 PCI: 00:14.0 scanning...
977 10:27:31.068499 scan_static_bus for PCI: 00:14.0
978 10:27:31.071788 USB0 port 0 enabled
979 10:27:31.075067 USB0 port 0 scanning...
980 10:27:31.078471 scan_static_bus for USB0 port 0
981 10:27:31.078918 USB2 port 0 disabled
982 10:27:31.082201 USB2 port 1 enabled
983 10:27:31.085408 USB2 port 2 enabled
984 10:27:31.085929 USB2 port 3 disabled
985 10:27:31.088657 USB2 port 4 enabled
986 10:27:31.089100 USB2 port 5 disabled
987 10:27:31.091691 USB2 port 6 disabled
988 10:27:31.094833 USB2 port 7 disabled
989 10:27:31.095281 USB2 port 8 disabled
990 10:27:31.098200 USB2 port 9 disabled
991 10:27:31.101715 USB3 port 0 disabled
992 10:27:31.102309 USB3 port 1 enabled
993 10:27:31.105197 USB3 port 2 disabled
994 10:27:31.108611 USB3 port 3 disabled
995 10:27:31.109064 USB2 port 1 scanning...
996 10:27:31.111852 scan_static_bus for USB2 port 1
997 10:27:31.118459 scan_static_bus for USB2 port 1 done
998 10:27:31.121753 scan_bus: bus USB2 port 1 finished in 6 msecs
999 10:27:31.125007 USB2 port 2 scanning...
1000 10:27:31.128308 scan_static_bus for USB2 port 2
1001 10:27:31.131198 scan_static_bus for USB2 port 2 done
1002 10:27:31.134663 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 10:27:31.138234 USB2 port 4 scanning...
1004 10:27:31.141435 scan_static_bus for USB2 port 4
1005 10:27:31.145138 scan_static_bus for USB2 port 4 done
1006 10:27:31.148202 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 10:27:31.151122 USB3 port 1 scanning...
1008 10:27:31.155393 scan_static_bus for USB3 port 1
1009 10:27:31.157733 scan_static_bus for USB3 port 1 done
1010 10:27:31.164434 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 10:27:31.168360 scan_static_bus for USB0 port 0 done
1012 10:27:31.171115 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 10:27:31.174374 scan_static_bus for PCI: 00:14.0 done
1014 10:27:31.181138 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1015 10:27:31.184704 PCI: 00:14.3 scanning...
1016 10:27:31.188143 scan_static_bus for PCI: 00:14.3
1017 10:27:31.188638 GENERIC: 0.0 enabled
1018 10:27:31.194650 scan_static_bus for PCI: 00:14.3 done
1019 10:27:31.197668 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 10:27:31.201079 PCI: 00:15.0 scanning...
1021 10:27:31.204539 scan_static_bus for PCI: 00:15.0
1022 10:27:31.204983 I2C: 00:1a enabled
1023 10:27:31.207297 I2C: 00:31 enabled
1024 10:27:31.210900 I2C: 00:32 enabled
1025 10:27:31.214222 scan_static_bus for PCI: 00:15.0 done
1026 10:27:31.217318 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1027 10:27:31.221254 PCI: 00:15.1 scanning...
1028 10:27:31.224315 scan_static_bus for PCI: 00:15.1
1029 10:27:31.227883 I2C: 00:10 enabled
1030 10:27:31.230861 scan_static_bus for PCI: 00:15.1 done
1031 10:27:31.234422 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 10:27:31.237729 PCI: 00:15.2 scanning...
1033 10:27:31.241271 scan_static_bus for PCI: 00:15.2
1034 10:27:31.244095 scan_static_bus for PCI: 00:15.2 done
1035 10:27:31.250813 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 10:27:31.251261 PCI: 00:15.3 scanning...
1037 10:27:31.254258 scan_static_bus for PCI: 00:15.3
1038 10:27:31.261315 scan_static_bus for PCI: 00:15.3 done
1039 10:27:31.263876 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 10:27:31.267795 PCI: 00:19.1 scanning...
1041 10:27:31.270669 scan_static_bus for PCI: 00:19.1
1042 10:27:31.271160 I2C: 00:15 enabled
1043 10:27:31.276929 scan_static_bus for PCI: 00:19.1 done
1044 10:27:31.279900 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 10:27:31.283180 PCI: 00:1d.0 scanning...
1046 10:27:31.286680 do_pci_scan_bridge for PCI: 00:1d.0
1047 10:27:31.289759 PCI: pci_scan_bus for bus 01
1048 10:27:31.292985 PCI: 01:00.0 [1c5c/174a] enabled
1049 10:27:31.296289 GENERIC: 0.0 enabled
1050 10:27:31.299623 Enabling Common Clock Configuration
1051 10:27:31.303097 L1 Sub-State supported from root port 29
1052 10:27:31.306501 L1 Sub-State Support = 0xf
1053 10:27:31.309958 CommonModeRestoreTime = 0x28
1054 10:27:31.312977 Power On Value = 0x16, Power On Scale = 0x0
1055 10:27:31.316278 ASPM: Enabled L1
1056 10:27:31.319444 PCIe: Max_Payload_Size adjusted to 128
1057 10:27:31.322864 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 10:27:31.326304 PCI: 00:1e.2 scanning...
1059 10:27:31.330329 scan_generic_bus for PCI: 00:1e.2
1060 10:27:31.333332 SPI: 00 enabled
1061 10:27:31.336297 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 10:27:31.342459 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 10:27:31.346252 PCI: 00:1e.3 scanning...
1064 10:27:31.349455 scan_generic_bus for PCI: 00:1e.3
1065 10:27:31.349621 SPI: 00 enabled
1066 10:27:31.356405 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 10:27:31.362628 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 10:27:31.362813 PCI: 00:1f.0 scanning...
1069 10:27:31.366071 scan_static_bus for PCI: 00:1f.0
1070 10:27:31.369404 PNP: 0c09.0 enabled
1071 10:27:31.372169 PNP: 0c09.0 scanning...
1072 10:27:31.375503 scan_static_bus for PNP: 0c09.0
1073 10:27:31.378803 scan_static_bus for PNP: 0c09.0 done
1074 10:27:31.382559 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 10:27:31.389230 scan_static_bus for PCI: 00:1f.0 done
1076 10:27:31.392787 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 10:27:31.395509 PCI: 00:1f.2 scanning...
1078 10:27:31.398871 scan_static_bus for PCI: 00:1f.2
1079 10:27:31.398980 GENERIC: 0.0 enabled
1080 10:27:31.402620 GENERIC: 0.0 scanning...
1081 10:27:31.406225 scan_static_bus for GENERIC: 0.0
1082 10:27:31.408874 GENERIC: 0.0 enabled
1083 10:27:31.412368 GENERIC: 1.0 enabled
1084 10:27:31.416030 scan_static_bus for GENERIC: 0.0 done
1085 10:27:31.419011 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 10:27:31.422007 scan_static_bus for PCI: 00:1f.2 done
1087 10:27:31.428833 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 10:27:31.432687 PCI: 00:1f.3 scanning...
1089 10:27:31.435119 scan_static_bus for PCI: 00:1f.3
1090 10:27:31.438578 scan_static_bus for PCI: 00:1f.3 done
1091 10:27:31.441971 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 10:27:31.445377 PCI: 00:1f.5 scanning...
1093 10:27:31.448327 scan_generic_bus for PCI: 00:1f.5
1094 10:27:31.451589 scan_generic_bus for PCI: 00:1f.5 done
1095 10:27:31.459014 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 10:27:31.461919 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 10:27:31.464893 scan_static_bus for Root Device done
1098 10:27:31.471764 scan_bus: bus Root Device finished in 737 msecs
1099 10:27:31.472211 done
1100 10:27:31.478301 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 10:27:31.481470 Chrome EC: UHEPI supported
1102 10:27:31.488180 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 10:27:31.494482 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 10:27:31.497586 SPI flash protection: WPSW=0 SRP0=0
1105 10:27:31.500985 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 10:27:31.507668 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 10:27:31.510930 found VGA at PCI: 00:02.0
1108 10:27:31.514086 Setting up VGA for PCI: 00:02.0
1109 10:27:31.517482 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 10:27:31.523899 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 10:27:31.527449 Allocating resources...
1112 10:27:31.527535 Reading resources...
1113 10:27:31.534489 Root Device read_resources bus 0 link: 0
1114 10:27:31.537268 DOMAIN: 0000 read_resources bus 0 link: 0
1115 10:27:31.540725 PCI: 00:04.0 read_resources bus 1 link: 0
1116 10:27:31.547545 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 10:27:31.550887 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 10:27:31.557542 USB0 port 0 read_resources bus 0 link: 0
1119 10:27:31.560943 USB0 port 0 read_resources bus 0 link: 0 done
1120 10:27:31.567405 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 10:27:31.570591 PCI: 00:14.0 read_resources bus 0 link: 0
1122 10:27:31.573868 USB0 port 0 read_resources bus 0 link: 0
1123 10:27:31.582126 USB0 port 0 read_resources bus 0 link: 0 done
1124 10:27:31.585360 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 10:27:31.592235 PCI: 00:14.3 read_resources bus 0 link: 0
1126 10:27:31.596004 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 10:27:31.602290 PCI: 00:15.0 read_resources bus 0 link: 0
1128 10:27:31.605580 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 10:27:31.612046 PCI: 00:15.1 read_resources bus 0 link: 0
1130 10:27:31.615294 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 10:27:31.622565 PCI: 00:19.1 read_resources bus 0 link: 0
1132 10:27:31.626076 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 10:27:31.632764 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 10:27:31.636427 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 10:27:31.642707 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 10:27:31.645651 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 10:27:31.652478 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 10:27:31.655797 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 10:27:31.662231 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 10:27:31.665857 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 10:27:31.672213 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 10:27:31.675744 GENERIC: 0.0 read_resources bus 0 link: 0
1143 10:27:31.681917 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 10:27:31.685306 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 10:27:31.691784 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 10:27:31.695086 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 10:27:31.701568 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 10:27:31.705450 Root Device read_resources bus 0 link: 0 done
1149 10:27:31.708253 Done reading resources.
1150 10:27:31.715366 Show resources in subtree (Root Device)...After reading.
1151 10:27:31.718072 Root Device child on link 0 DOMAIN: 0000
1152 10:27:31.722227 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 10:27:31.731713 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 10:27:31.741367 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 10:27:31.744773 PCI: 00:00.0
1156 10:27:31.751209 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 10:27:31.761381 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 10:27:31.771782 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 10:27:31.781233 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 10:27:31.791046 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 10:27:31.800906 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 10:27:31.810703 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 10:27:31.817387 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 10:27:31.826911 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 10:27:31.837128 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 10:27:31.846650 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 10:27:31.856704 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 10:27:31.866670 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 10:27:31.874157 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 10:27:31.883196 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 10:27:31.893050 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 10:27:31.902818 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 10:27:31.912760 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 10:27:31.922907 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 10:27:31.932737 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 10:27:31.932828 PCI: 00:02.0
1177 10:27:31.942667 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 10:27:31.952339 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 10:27:31.962472 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 10:27:31.965940 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 10:27:31.976348 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 10:27:31.979102 GENERIC: 0.0
1183 10:27:31.979191 PCI: 00:05.0
1184 10:27:31.988716 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 10:27:31.995916 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 10:27:31.996005 GENERIC: 0.0
1187 10:27:31.999018 PCI: 00:08.0
1188 10:27:32.008759 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 10:27:32.008848 PCI: 00:0a.0
1190 10:27:32.015230 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 10:27:32.025134 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 10:27:32.028554 USB0 port 0 child on link 0 USB3 port 0
1193 10:27:32.031761 USB3 port 0
1194 10:27:32.031848 USB3 port 1
1195 10:27:32.035091 USB3 port 2
1196 10:27:32.035179 USB3 port 3
1197 10:27:32.038493 PCI: 00:14.0 child on link 0 USB0 port 0
1198 10:27:32.052018 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 10:27:32.054957 USB0 port 0 child on link 0 USB2 port 0
1200 10:27:32.055046 USB2 port 0
1201 10:27:32.058227 USB2 port 1
1202 10:27:32.058315 USB2 port 2
1203 10:27:32.061615 USB2 port 3
1204 10:27:32.064854 USB2 port 4
1205 10:27:32.064942 USB2 port 5
1206 10:27:32.068257 USB2 port 6
1207 10:27:32.068346 USB2 port 7
1208 10:27:32.071663 USB2 port 8
1209 10:27:32.071750 USB2 port 9
1210 10:27:32.074808 USB3 port 0
1211 10:27:32.074896 USB3 port 1
1212 10:27:32.078302 USB3 port 2
1213 10:27:32.078389 USB3 port 3
1214 10:27:32.081477 PCI: 00:14.2
1215 10:27:32.091522 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 10:27:32.101405 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 10:27:32.104755 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 10:27:32.114361 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 10:27:32.117805 GENERIC: 0.0
1220 10:27:32.121003 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 10:27:32.131196 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 10:27:32.134039 I2C: 00:1a
1223 10:27:32.134126 I2C: 00:31
1224 10:27:32.137449 I2C: 00:32
1225 10:27:32.140922 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 10:27:32.150973 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 10:27:32.151062 I2C: 00:10
1228 10:27:32.154411 PCI: 00:15.2
1229 10:27:32.164205 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 10:27:32.164294 PCI: 00:15.3
1231 10:27:32.173882 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 10:27:32.177462 PCI: 00:16.0
1233 10:27:32.187452 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 10:27:32.187540 PCI: 00:19.0
1235 10:27:32.193831 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 10:27:32.203830 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 10:27:32.203919 I2C: 00:15
1238 10:27:32.210120 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 10:27:32.217044 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 10:27:32.226750 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 10:27:32.237028 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 10:27:32.237118 GENERIC: 0.0
1243 10:27:32.240379 PCI: 01:00.0
1244 10:27:32.250104 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 10:27:32.260216 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 10:27:32.269951 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 10:27:32.270040 PCI: 00:1e.0
1248 10:27:32.279801 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 10:27:32.286176 PCI: 00:1e.2 child on link 0 SPI: 00
1250 10:27:32.296518 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 10:27:32.296606 SPI: 00
1252 10:27:32.299329 PCI: 00:1e.3 child on link 0 SPI: 00
1253 10:27:32.309323 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 10:27:32.312660 SPI: 00
1255 10:27:32.316010 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 10:27:32.326007 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 10:27:32.326095 PNP: 0c09.0
1258 10:27:32.336103 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 10:27:32.339423 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 10:27:32.349376 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 10:27:32.359130 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 10:27:32.362492 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 10:27:32.365888 GENERIC: 0.0
1264 10:27:32.365975 GENERIC: 1.0
1265 10:27:32.368859 PCI: 00:1f.3
1266 10:27:32.379105 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 10:27:32.388837 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 10:27:32.388927 PCI: 00:1f.5
1269 10:27:32.399083 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 10:27:32.401962 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 10:27:32.405274 APIC: 00
1272 10:27:32.405360 APIC: 01
1273 10:27:32.408503 APIC: 03
1274 10:27:32.408591 APIC: 07
1275 10:27:32.408660 APIC: 05
1276 10:27:32.412021 APIC: 04
1277 10:27:32.412109 APIC: 02
1278 10:27:32.415452 APIC: 06
1279 10:27:32.422019 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 10:27:32.428450 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 10:27:32.431849 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 10:27:32.438421 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 10:27:32.444740 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 10:27:32.448112 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 10:27:32.451669 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 10:27:32.458099 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 10:27:32.464943 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 10:27:32.474628 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 10:27:32.481718 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 10:27:32.487774 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 10:27:32.494424 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 10:27:32.501245 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 10:27:32.511012 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 10:27:32.514270 DOMAIN: 0000: Resource ranges:
1295 10:27:32.517816 * Base: 1000, Size: 800, Tag: 100
1296 10:27:32.521140 * Base: 1900, Size: e700, Tag: 100
1297 10:27:32.524367 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 10:27:32.534097 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 10:27:32.541030 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 10:27:32.547429 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 10:27:32.554248 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 10:27:32.564037 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 10:27:32.570928 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 10:27:32.577657 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 10:27:32.587417 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 10:27:32.594242 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 10:27:32.600458 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 10:27:32.610757 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 10:27:32.616864 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 10:27:32.623793 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 10:27:32.633556 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 10:27:32.640188 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 10:27:32.646890 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 10:27:32.657085 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 10:27:32.663374 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 10:27:32.670278 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 10:27:32.680056 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 10:27:32.686973 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 10:27:32.692750 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 10:27:32.703267 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 10:27:32.709566 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 10:27:32.712784 DOMAIN: 0000: Resource ranges:
1323 10:27:32.716352 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 10:27:32.722872 * Base: d0000000, Size: 28000000, Tag: 200
1325 10:27:32.726277 * Base: fa000000, Size: 1000000, Tag: 200
1326 10:27:32.729705 * Base: fb001000, Size: 2fff000, Tag: 200
1327 10:27:32.732995 * Base: fe010000, Size: 2e000, Tag: 200
1328 10:27:32.739457 * Base: fe03f000, Size: d41000, Tag: 200
1329 10:27:32.742535 * Base: fed88000, Size: 8000, Tag: 200
1330 10:27:32.745940 * Base: fed93000, Size: d000, Tag: 200
1331 10:27:32.749129 * Base: feda2000, Size: 1e000, Tag: 200
1332 10:27:32.755847 * Base: fede0000, Size: 1220000, Tag: 200
1333 10:27:32.759469 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 10:27:32.765565 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 10:27:32.772238 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 10:27:32.778700 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 10:27:32.785593 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 10:27:32.792183 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 10:27:32.798547 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 10:27:32.805535 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 10:27:32.812380 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 10:27:32.818471 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 10:27:32.825283 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 10:27:32.831617 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 10:27:32.838237 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 10:27:32.846235 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 10:27:32.852158 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 10:27:32.858238 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 10:27:32.864832 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 10:27:32.871485 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 10:27:32.878056 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 10:27:32.884478 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 10:27:32.891219 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 10:27:32.897998 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 10:27:32.904277 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 10:27:32.914386 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 10:27:32.921666 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 10:27:32.924760 PCI: 00:1d.0: Resource ranges:
1359 10:27:32.927761 * Base: 7fc00000, Size: 100000, Tag: 200
1360 10:27:32.934466 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 10:27:32.941088 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 10:27:32.947805 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 10:27:32.957723 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 10:27:32.963922 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 10:27:32.967515 Root Device assign_resources, bus 0 link: 0
1366 10:27:32.974051 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 10:27:32.980880 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 10:27:32.990675 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 10:27:32.997604 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 10:27:33.007502 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 10:27:33.010611 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 10:27:33.017812 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 10:27:33.024128 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 10:27:33.030663 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 10:27:33.040192 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 10:27:33.044049 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 10:27:33.050695 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 10:27:33.057102 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 10:27:33.063575 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 10:27:33.067116 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 10:27:33.077079 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 10:27:33.083280 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 10:27:33.089858 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 10:27:33.096072 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 10:27:33.100174 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 10:27:33.109275 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 10:27:33.112804 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 10:27:33.119680 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 10:27:33.125749 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 10:27:33.128953 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 10:27:33.135639 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 10:27:33.142322 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 10:27:33.152243 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 10:27:33.158999 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 10:27:33.168935 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 10:27:33.172434 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 10:27:33.178438 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 10:27:33.185069 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 10:27:33.194769 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 10:27:33.204964 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 10:27:33.208287 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 10:27:33.218302 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 10:27:33.224638 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 10:27:33.231745 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 10:27:33.238257 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 10:27:33.244845 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 10:27:33.251358 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 10:27:33.254646 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 10:27:33.264538 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 10:27:33.267949 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 10:27:33.271010 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 10:27:33.278006 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 10:27:33.281822 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 10:27:33.288929 LPC: Trying to open IO window from 800 size 1ff
1415 10:27:33.294554 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 10:27:33.304785 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 10:27:33.310933 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 10:27:33.317941 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 10:27:33.320789 Root Device assign_resources, bus 0 link: 0
1420 10:27:33.324632 Done setting resources.
1421 10:27:33.331501 Show resources in subtree (Root Device)...After assigning values.
1422 10:27:33.334136 Root Device child on link 0 DOMAIN: 0000
1423 10:27:33.337375 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 10:27:33.347507 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 10:27:33.357722 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 10:27:33.360976 PCI: 00:00.0
1427 10:27:33.371640 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 10:27:33.378107 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 10:27:33.388412 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 10:27:33.397689 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 10:27:33.408143 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 10:27:33.417424 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 10:27:33.427785 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 10:27:33.434513 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 10:27:33.444111 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 10:27:33.454952 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 10:27:33.463871 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 10:27:33.473903 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 10:27:33.480687 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 10:27:33.490276 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 10:27:33.500540 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 10:27:33.510396 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 10:27:33.520087 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 10:27:33.530296 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 10:27:33.541057 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 10:27:33.546636 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 10:27:33.550019 PCI: 00:02.0
1448 10:27:33.559982 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 10:27:33.569831 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 10:27:33.580489 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 10:27:33.586425 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 10:27:33.596459 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 10:27:33.596547 GENERIC: 0.0
1454 10:27:33.599496 PCI: 00:05.0
1455 10:27:33.609317 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 10:27:33.612538 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 10:27:33.615870 GENERIC: 0.0
1458 10:27:33.615956 PCI: 00:08.0
1459 10:27:33.626427 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 10:27:33.629527 PCI: 00:0a.0
1461 10:27:33.632844 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 10:27:33.642871 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 10:27:33.649122 USB0 port 0 child on link 0 USB3 port 0
1464 10:27:33.649208 USB3 port 0
1465 10:27:33.652359 USB3 port 1
1466 10:27:33.652444 USB3 port 2
1467 10:27:33.655853 USB3 port 3
1468 10:27:33.658919 PCI: 00:14.0 child on link 0 USB0 port 0
1469 10:27:33.668939 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 10:27:33.675996 USB0 port 0 child on link 0 USB2 port 0
1471 10:27:33.676097 USB2 port 0
1472 10:27:33.678721 USB2 port 1
1473 10:27:33.678821 USB2 port 2
1474 10:27:33.682159 USB2 port 3
1475 10:27:33.682267 USB2 port 4
1476 10:27:33.685721 USB2 port 5
1477 10:27:33.685829 USB2 port 6
1478 10:27:33.688883 USB2 port 7
1479 10:27:33.692423 USB2 port 8
1480 10:27:33.692552 USB2 port 9
1481 10:27:33.695610 USB3 port 0
1482 10:27:33.695739 USB3 port 1
1483 10:27:33.698413 USB3 port 2
1484 10:27:33.698555 USB3 port 3
1485 10:27:33.702047 PCI: 00:14.2
1486 10:27:33.711961 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 10:27:33.722158 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 10:27:33.725558 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 10:27:33.735442 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 10:27:33.738657 GENERIC: 0.0
1491 10:27:33.741697 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 10:27:33.752131 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 10:27:33.755179 I2C: 00:1a
1494 10:27:33.755625 I2C: 00:31
1495 10:27:33.758411 I2C: 00:32
1496 10:27:33.761711 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 10:27:33.771857 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 10:27:33.775545 I2C: 00:10
1499 10:27:33.775991 PCI: 00:15.2
1500 10:27:33.784990 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 10:27:33.788318 PCI: 00:15.3
1502 10:27:33.798465 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 10:27:33.801144 PCI: 00:16.0
1504 10:27:33.811451 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 10:27:33.811897 PCI: 00:19.0
1506 10:27:33.814502 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 10:27:33.828463 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 10:27:33.828971 I2C: 00:15
1509 10:27:33.831359 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 10:27:33.841257 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 10:27:33.854277 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 10:27:33.863982 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 10:27:33.864434 GENERIC: 0.0
1514 10:27:33.867353 PCI: 01:00.0
1515 10:27:33.877088 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 10:27:33.887276 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 10:27:33.897148 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 10:27:33.900279 PCI: 00:1e.0
1519 10:27:33.911164 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 10:27:33.916838 PCI: 00:1e.2 child on link 0 SPI: 00
1521 10:27:33.927065 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 10:27:33.927519 SPI: 00
1523 10:27:33.930171 PCI: 00:1e.3 child on link 0 SPI: 00
1524 10:27:33.940198 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 10:27:33.943671 SPI: 00
1526 10:27:33.946555 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 10:27:33.956970 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 10:27:33.957421 PNP: 0c09.0
1529 10:27:33.966350 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 10:27:33.969725 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 10:27:33.980164 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 10:27:33.990492 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 10:27:33.993216 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 10:27:33.996462 GENERIC: 0.0
1535 10:27:33.997056 GENERIC: 1.0
1536 10:27:34.000001 PCI: 00:1f.3
1537 10:27:34.009757 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 10:27:34.019747 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 10:27:34.023158 PCI: 00:1f.5
1540 10:27:34.032909 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 10:27:34.036284 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 10:27:34.039324 APIC: 00
1543 10:27:34.039824 APIC: 01
1544 10:27:34.040269 APIC: 03
1545 10:27:34.042668 APIC: 07
1546 10:27:34.043195 APIC: 05
1547 10:27:34.043584 APIC: 04
1548 10:27:34.046090 APIC: 02
1549 10:27:34.046612 APIC: 06
1550 10:27:34.049803 Done allocating resources.
1551 10:27:34.055679 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 10:27:34.062373 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 10:27:34.065630 Configure GPIOs for I2S audio on UP4.
1554 10:27:34.072386 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 10:27:34.075564 Enabling resources...
1556 10:27:34.079308 PCI: 00:00.0 subsystem <- 8086/9a12
1557 10:27:34.082584 PCI: 00:00.0 cmd <- 06
1558 10:27:34.085413 PCI: 00:02.0 subsystem <- 8086/9a40
1559 10:27:34.088502 PCI: 00:02.0 cmd <- 03
1560 10:27:34.091790 PCI: 00:04.0 subsystem <- 8086/9a03
1561 10:27:34.092241 PCI: 00:04.0 cmd <- 02
1562 10:27:34.098577 PCI: 00:05.0 subsystem <- 8086/9a19
1563 10:27:34.099048 PCI: 00:05.0 cmd <- 02
1564 10:27:34.101751 PCI: 00:08.0 subsystem <- 8086/9a11
1565 10:27:34.105185 PCI: 00:08.0 cmd <- 06
1566 10:27:34.108676 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 10:27:34.112252 PCI: 00:0d.0 cmd <- 02
1568 10:27:34.114952 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 10:27:34.119357 PCI: 00:14.0 cmd <- 02
1570 10:27:34.122115 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 10:27:34.125363 PCI: 00:14.2 cmd <- 02
1572 10:27:34.128231 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 10:27:34.131701 PCI: 00:14.3 cmd <- 02
1574 10:27:34.135457 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 10:27:34.137985 PCI: 00:15.0 cmd <- 02
1576 10:27:34.141539 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 10:27:34.142170 PCI: 00:15.1 cmd <- 02
1578 10:27:34.147994 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 10:27:34.148451 PCI: 00:15.2 cmd <- 02
1580 10:27:34.154436 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 10:27:34.154896 PCI: 00:15.3 cmd <- 02
1582 10:27:34.157976 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 10:27:34.161416 PCI: 00:16.0 cmd <- 02
1584 10:27:34.164416 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 10:27:34.167769 PCI: 00:19.1 cmd <- 02
1586 10:27:34.171364 PCI: 00:1d.0 bridge ctrl <- 0013
1587 10:27:34.174213 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 10:27:34.178000 PCI: 00:1d.0 cmd <- 06
1589 10:27:34.181160 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 10:27:34.184372 PCI: 00:1e.0 cmd <- 06
1591 10:27:34.187601 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 10:27:34.190994 PCI: 00:1e.2 cmd <- 06
1593 10:27:34.194705 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 10:27:34.197602 PCI: 00:1e.3 cmd <- 02
1595 10:27:34.200566 PCI: 00:1f.0 subsystem <- 8086/a087
1596 10:27:34.200899 PCI: 00:1f.0 cmd <- 407
1597 10:27:34.207672 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 10:27:34.207867 PCI: 00:1f.3 cmd <- 02
1599 10:27:34.210873 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 10:27:34.213872 PCI: 00:1f.5 cmd <- 406
1601 10:27:34.218503 PCI: 01:00.0 cmd <- 02
1602 10:27:34.223336 done.
1603 10:27:34.226840 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 10:27:34.230443 Initializing devices...
1605 10:27:34.233356 Root Device init
1606 10:27:34.236693 Chrome EC: Set SMI mask to 0x0000000000000000
1607 10:27:34.243239 Chrome EC: clear events_b mask to 0x0000000000000000
1608 10:27:34.249644 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 10:27:34.253464 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 10:27:34.260308 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 10:27:34.267276 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 10:27:34.270858 fw_config match found: DB_USB=USB3_ACTIVE
1613 10:27:34.277184 Configure Right Type-C port orientation for retimer
1614 10:27:34.280369 Root Device init finished in 44 msecs
1615 10:27:34.283622 PCI: 00:00.0 init
1616 10:27:34.287017 CPU TDP = 9 Watts
1617 10:27:34.287091 CPU PL1 = 9 Watts
1618 10:27:34.290631 CPU PL2 = 40 Watts
1619 10:27:34.294023 CPU PL4 = 83 Watts
1620 10:27:34.297888 PCI: 00:00.0 init finished in 8 msecs
1621 10:27:34.297970 PCI: 00:02.0 init
1622 10:27:34.300301 GMA: Found VBT in CBFS
1623 10:27:34.303625 GMA: Found valid VBT in CBFS
1624 10:27:34.310203 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 10:27:34.316701 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 10:27:34.320369 PCI: 00:02.0 init finished in 18 msecs
1627 10:27:34.324048 PCI: 00:05.0 init
1628 10:27:34.326598 PCI: 00:05.0 init finished in 0 msecs
1629 10:27:34.330505 PCI: 00:08.0 init
1630 10:27:34.333968 PCI: 00:08.0 init finished in 0 msecs
1631 10:27:34.336562 PCI: 00:14.0 init
1632 10:27:34.340254 PCI: 00:14.0 init finished in 0 msecs
1633 10:27:34.343179 PCI: 00:14.2 init
1634 10:27:34.346566 PCI: 00:14.2 init finished in 0 msecs
1635 10:27:34.349775 PCI: 00:15.0 init
1636 10:27:34.349860 I2C bus 0 version 0x3230302a
1637 10:27:34.356399 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 10:27:34.359829 PCI: 00:15.0 init finished in 6 msecs
1639 10:27:34.359905 PCI: 00:15.1 init
1640 10:27:34.363619 I2C bus 1 version 0x3230302a
1641 10:27:34.366457 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 10:27:34.373152 PCI: 00:15.1 init finished in 6 msecs
1643 10:27:34.373241 PCI: 00:15.2 init
1644 10:27:34.376229 I2C bus 2 version 0x3230302a
1645 10:27:34.379606 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 10:27:34.382782 PCI: 00:15.2 init finished in 6 msecs
1647 10:27:34.386479 PCI: 00:15.3 init
1648 10:27:34.390344 I2C bus 3 version 0x3230302a
1649 10:27:34.393567 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 10:27:34.396273 PCI: 00:15.3 init finished in 6 msecs
1651 10:27:34.399686 PCI: 00:16.0 init
1652 10:27:34.402855 PCI: 00:16.0 init finished in 0 msecs
1653 10:27:34.406347 PCI: 00:19.1 init
1654 10:27:34.409686 I2C bus 5 version 0x3230302a
1655 10:27:34.412868 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 10:27:34.416184 PCI: 00:19.1 init finished in 6 msecs
1657 10:27:34.419841 PCI: 00:1d.0 init
1658 10:27:34.422566 Initializing PCH PCIe bridge.
1659 10:27:34.426092 PCI: 00:1d.0 init finished in 3 msecs
1660 10:27:34.429229 PCI: 00:1f.0 init
1661 10:27:34.432966 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 10:27:34.436039 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 10:27:34.439237 IOAPIC: ID = 0x02
1664 10:27:34.442763 IOAPIC: Dumping registers
1665 10:27:34.442850 reg 0x0000: 0x02000000
1666 10:27:34.445976 reg 0x0001: 0x00770020
1667 10:27:34.448973 reg 0x0002: 0x00000000
1668 10:27:34.452421 PCI: 00:1f.0 init finished in 21 msecs
1669 10:27:34.456613 PCI: 00:1f.2 init
1670 10:27:34.459633 Disabling ACPI via APMC.
1671 10:27:34.459732 APMC done.
1672 10:27:34.463047 PCI: 00:1f.2 init finished in 5 msecs
1673 10:27:34.476365 PCI: 01:00.0 init
1674 10:27:34.479288 PCI: 01:00.0 init finished in 0 msecs
1675 10:27:34.482868 PNP: 0c09.0 init
1676 10:27:34.485920 Google Chrome EC uptime: 8.400 seconds
1677 10:27:34.492968 Google Chrome AP resets since EC boot: 1
1678 10:27:34.496121 Google Chrome most recent AP reset causes:
1679 10:27:34.499801 0.347: 32775 shutdown: entering G3
1680 10:27:34.506010 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 10:27:34.509453 PNP: 0c09.0 init finished in 22 msecs
1682 10:27:34.515040 Devices initialized
1683 10:27:34.518466 Show all devs... After init.
1684 10:27:34.521549 Root Device: enabled 1
1685 10:27:34.521640 DOMAIN: 0000: enabled 1
1686 10:27:34.525754 CPU_CLUSTER: 0: enabled 1
1687 10:27:34.528522 PCI: 00:00.0: enabled 1
1688 10:27:34.531460 PCI: 00:02.0: enabled 1
1689 10:27:34.531551 PCI: 00:04.0: enabled 1
1690 10:27:34.535192 PCI: 00:05.0: enabled 1
1691 10:27:34.538107 PCI: 00:06.0: enabled 0
1692 10:27:34.541222 PCI: 00:07.0: enabled 0
1693 10:27:34.541328 PCI: 00:07.1: enabled 0
1694 10:27:34.544882 PCI: 00:07.2: enabled 0
1695 10:27:34.548332 PCI: 00:07.3: enabled 0
1696 10:27:34.551964 PCI: 00:08.0: enabled 1
1697 10:27:34.552082 PCI: 00:09.0: enabled 0
1698 10:27:34.554892 PCI: 00:0a.0: enabled 0
1699 10:27:34.558121 PCI: 00:0d.0: enabled 1
1700 10:27:34.561832 PCI: 00:0d.1: enabled 0
1701 10:27:34.561996 PCI: 00:0d.2: enabled 0
1702 10:27:34.564990 PCI: 00:0d.3: enabled 0
1703 10:27:34.568207 PCI: 00:0e.0: enabled 0
1704 10:27:34.568387 PCI: 00:10.2: enabled 1
1705 10:27:34.571337 PCI: 00:10.6: enabled 0
1706 10:27:34.575298 PCI: 00:10.7: enabled 0
1707 10:27:34.578053 PCI: 00:12.0: enabled 0
1708 10:27:34.578338 PCI: 00:12.6: enabled 0
1709 10:27:34.581741 PCI: 00:13.0: enabled 0
1710 10:27:34.584724 PCI: 00:14.0: enabled 1
1711 10:27:34.588284 PCI: 00:14.1: enabled 0
1712 10:27:34.588690 PCI: 00:14.2: enabled 1
1713 10:27:34.591643 PCI: 00:14.3: enabled 1
1714 10:27:34.595192 PCI: 00:15.0: enabled 1
1715 10:27:34.598065 PCI: 00:15.1: enabled 1
1716 10:27:34.598542 PCI: 00:15.2: enabled 1
1717 10:27:34.601582 PCI: 00:15.3: enabled 1
1718 10:27:34.605133 PCI: 00:16.0: enabled 1
1719 10:27:34.608421 PCI: 00:16.1: enabled 0
1720 10:27:34.608864 PCI: 00:16.2: enabled 0
1721 10:27:34.611355 PCI: 00:16.3: enabled 0
1722 10:27:34.614863 PCI: 00:16.4: enabled 0
1723 10:27:34.615300 PCI: 00:16.5: enabled 0
1724 10:27:34.618092 PCI: 00:17.0: enabled 0
1725 10:27:34.621727 PCI: 00:19.0: enabled 0
1726 10:27:34.624590 PCI: 00:19.1: enabled 1
1727 10:27:34.625029 PCI: 00:19.2: enabled 0
1728 10:27:34.628473 PCI: 00:1c.0: enabled 1
1729 10:27:34.631512 PCI: 00:1c.1: enabled 0
1730 10:27:34.634708 PCI: 00:1c.2: enabled 0
1731 10:27:34.635152 PCI: 00:1c.3: enabled 0
1732 10:27:34.638217 PCI: 00:1c.4: enabled 0
1733 10:27:34.641878 PCI: 00:1c.5: enabled 0
1734 10:27:34.644685 PCI: 00:1c.6: enabled 1
1735 10:27:34.645129 PCI: 00:1c.7: enabled 0
1736 10:27:34.648328 PCI: 00:1d.0: enabled 1
1737 10:27:34.651625 PCI: 00:1d.1: enabled 0
1738 10:27:34.652065 PCI: 00:1d.2: enabled 1
1739 10:27:34.654654 PCI: 00:1d.3: enabled 0
1740 10:27:34.657966 PCI: 00:1e.0: enabled 1
1741 10:27:34.661045 PCI: 00:1e.1: enabled 0
1742 10:27:34.661488 PCI: 00:1e.2: enabled 1
1743 10:27:34.665044 PCI: 00:1e.3: enabled 1
1744 10:27:34.668355 PCI: 00:1f.0: enabled 1
1745 10:27:34.671099 PCI: 00:1f.1: enabled 0
1746 10:27:34.671544 PCI: 00:1f.2: enabled 1
1747 10:27:34.674455 PCI: 00:1f.3: enabled 1
1748 10:27:34.678066 PCI: 00:1f.4: enabled 0
1749 10:27:34.681637 PCI: 00:1f.5: enabled 1
1750 10:27:34.682094 PCI: 00:1f.6: enabled 0
1751 10:27:34.684794 PCI: 00:1f.7: enabled 0
1752 10:27:34.688037 APIC: 00: enabled 1
1753 10:27:34.688483 GENERIC: 0.0: enabled 1
1754 10:27:34.691318 GENERIC: 0.0: enabled 1
1755 10:27:34.694528 GENERIC: 1.0: enabled 1
1756 10:27:34.697743 GENERIC: 0.0: enabled 1
1757 10:27:34.698223 GENERIC: 1.0: enabled 1
1758 10:27:34.701435 USB0 port 0: enabled 1
1759 10:27:34.705471 GENERIC: 0.0: enabled 1
1760 10:27:34.705916 USB0 port 0: enabled 1
1761 10:27:34.708220 GENERIC: 0.0: enabled 1
1762 10:27:34.711143 I2C: 00:1a: enabled 1
1763 10:27:34.714539 I2C: 00:31: enabled 1
1764 10:27:34.714987 I2C: 00:32: enabled 1
1765 10:27:34.717695 I2C: 00:10: enabled 1
1766 10:27:34.721171 I2C: 00:15: enabled 1
1767 10:27:34.721623 GENERIC: 0.0: enabled 0
1768 10:27:34.724167 GENERIC: 1.0: enabled 0
1769 10:27:34.727501 GENERIC: 0.0: enabled 1
1770 10:27:34.727955 SPI: 00: enabled 1
1771 10:27:34.731283 SPI: 00: enabled 1
1772 10:27:34.734218 PNP: 0c09.0: enabled 1
1773 10:27:34.734672 GENERIC: 0.0: enabled 1
1774 10:27:34.738184 USB3 port 0: enabled 1
1775 10:27:34.741554 USB3 port 1: enabled 1
1776 10:27:34.744464 USB3 port 2: enabled 0
1777 10:27:34.744917 USB3 port 3: enabled 0
1778 10:27:34.747772 USB2 port 0: enabled 0
1779 10:27:34.750876 USB2 port 1: enabled 1
1780 10:27:34.751326 USB2 port 2: enabled 1
1781 10:27:34.754202 USB2 port 3: enabled 0
1782 10:27:34.757525 USB2 port 4: enabled 1
1783 10:27:34.757980 USB2 port 5: enabled 0
1784 10:27:34.760733 USB2 port 6: enabled 0
1785 10:27:34.764399 USB2 port 7: enabled 0
1786 10:27:34.767681 USB2 port 8: enabled 0
1787 10:27:34.768131 USB2 port 9: enabled 0
1788 10:27:34.770918 USB3 port 0: enabled 0
1789 10:27:34.773829 USB3 port 1: enabled 1
1790 10:27:34.774321 USB3 port 2: enabled 0
1791 10:27:34.777122 USB3 port 3: enabled 0
1792 10:27:34.780564 GENERIC: 0.0: enabled 1
1793 10:27:34.783758 GENERIC: 1.0: enabled 1
1794 10:27:34.784210 APIC: 01: enabled 1
1795 10:27:34.787135 APIC: 03: enabled 1
1796 10:27:34.790567 APIC: 07: enabled 1
1797 10:27:34.791020 APIC: 05: enabled 1
1798 10:27:34.794106 APIC: 04: enabled 1
1799 10:27:34.794579 APIC: 02: enabled 1
1800 10:27:34.797070 APIC: 06: enabled 1
1801 10:27:34.800348 PCI: 01:00.0: enabled 1
1802 10:27:34.804082 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1803 10:27:34.810208 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 10:27:34.813578 ELOG: NV offset 0xf30000 size 0x1000
1805 10:27:34.820258 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 10:27:34.827421 ELOG: Event(17) added with size 13 at 2023-02-10 10:27:34 UTC
1807 10:27:34.833560 ELOG: Event(92) added with size 9 at 2023-02-10 10:27:34 UTC
1808 10:27:34.840318 ELOG: Event(93) added with size 9 at 2023-02-10 10:27:34 UTC
1809 10:27:34.847127 ELOG: Event(9E) added with size 10 at 2023-02-10 10:27:34 UTC
1810 10:27:34.853934 ELOG: Event(9F) added with size 14 at 2023-02-10 10:27:34 UTC
1811 10:27:34.860180 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 10:27:34.866538 ELOG: Event(A1) added with size 10 at 2023-02-10 10:27:34 UTC
1813 10:27:34.870231 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 10:27:34.876591 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 10:27:34.879954 Finalize devices...
1816 10:27:34.880448 Devices finalized
1817 10:27:34.886475 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 10:27:34.893647 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 10:27:34.896259 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 10:27:34.903082 ME: HFSTS1 : 0x80030055
1821 10:27:34.906639 ME: HFSTS2 : 0x30280116
1822 10:27:34.913041 ME: HFSTS3 : 0x00000050
1823 10:27:34.916112 ME: HFSTS4 : 0x00004000
1824 10:27:34.919521 ME: HFSTS5 : 0x00000000
1825 10:27:34.926329 ME: HFSTS6 : 0x00400006
1826 10:27:34.929975 ME: Manufacturing Mode : YES
1827 10:27:34.932915 ME: SPI Protection Mode Enabled : NO
1828 10:27:34.936559 ME: FW Partition Table : OK
1829 10:27:34.939319 ME: Bringup Loader Failure : NO
1830 10:27:34.942864 ME: Firmware Init Complete : NO
1831 10:27:34.946012 ME: Boot Options Present : NO
1832 10:27:34.952175 ME: Update In Progress : NO
1833 10:27:34.955714 ME: D0i3 Support : YES
1834 10:27:34.959049 ME: Low Power State Enabled : NO
1835 10:27:34.962044 ME: CPU Replaced : YES
1836 10:27:34.965293 ME: CPU Replacement Valid : YES
1837 10:27:34.968614 ME: Current Working State : 5
1838 10:27:34.972030 ME: Current Operation State : 1
1839 10:27:34.975101 ME: Current Operation Mode : 3
1840 10:27:34.978280 ME: Error Code : 0
1841 10:27:34.985285 ME: Enhanced Debug Mode : NO
1842 10:27:34.988662 ME: CPU Debug Disabled : YES
1843 10:27:34.991840 ME: TXT Support : NO
1844 10:27:34.998170 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 10:27:35.004942 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 10:27:35.008342 CBFS: 'fallback/slic' not found.
1847 10:27:35.011220 ACPI: Writing ACPI tables at 76b01000.
1848 10:27:35.015374 ACPI: * FACS
1849 10:27:35.015460 ACPI: * DSDT
1850 10:27:35.018165 Ramoops buffer: 0x100000@0x76a00000.
1851 10:27:35.024636 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 10:27:35.028148 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 10:27:35.032030 Google Chrome EC: version:
1854 10:27:35.035683 ro: voema_v2.0.7540-147f8d37d1
1855 10:27:35.038806 rw: voema_v2.0.7540-147f8d37d1
1856 10:27:35.042038 running image: 2
1857 10:27:35.048576 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 10:27:35.051886 ACPI: * FADT
1859 10:27:35.051973 SCI is IRQ9
1860 10:27:35.055048 ACPI: added table 1/32, length now 40
1861 10:27:35.058603 ACPI: * SSDT
1862 10:27:35.061884 Found 1 CPU(s) with 8 core(s) each.
1863 10:27:35.068526 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 10:27:35.071750 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 10:27:35.074799 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 10:27:35.078368 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 10:27:35.085267 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 10:27:35.091724 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 10:27:35.095679 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 10:27:35.101932 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 10:27:35.108170 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 10:27:35.111995 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 10:27:35.118504 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 10:27:35.121569 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 10:27:35.128868 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 10:27:35.132030 PS2K: Passing 80 keymaps to kernel
1877 10:27:35.138472 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 10:27:35.144662 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 10:27:35.151207 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 10:27:35.157801 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 10:27:35.164564 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 10:27:35.171256 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 10:27:35.177749 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 10:27:35.184544 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 10:27:35.188010 ACPI: added table 2/32, length now 44
1886 10:27:35.188455 ACPI: * MCFG
1887 10:27:35.190977 ACPI: added table 3/32, length now 48
1888 10:27:35.195282 ACPI: * TPM2
1889 10:27:35.197736 TPM2 log created at 0x769f0000
1890 10:27:35.200991 ACPI: added table 4/32, length now 52
1891 10:27:35.201463 ACPI: * MADT
1892 10:27:35.204208 SCI is IRQ9
1893 10:27:35.207640 ACPI: added table 5/32, length now 56
1894 10:27:35.211561 current = 76b09850
1895 10:27:35.212004 ACPI: * DMAR
1896 10:27:35.214469 ACPI: added table 6/32, length now 60
1897 10:27:35.217597 ACPI: added table 7/32, length now 64
1898 10:27:35.221057 ACPI: * HPET
1899 10:27:35.224165 ACPI: added table 8/32, length now 68
1900 10:27:35.224608 ACPI: done.
1901 10:27:35.228061 ACPI tables: 35216 bytes.
1902 10:27:35.230933 smbios_write_tables: 769ef000
1903 10:27:35.234572 EC returned error result code 3
1904 10:27:35.237803 Couldn't obtain OEM name from CBI
1905 10:27:35.240789 Create SMBIOS type 16
1906 10:27:35.244936 Create SMBIOS type 17
1907 10:27:35.247313 GENERIC: 0.0 (WIFI Device)
1908 10:27:35.247757 SMBIOS tables: 1750 bytes.
1909 10:27:35.254043 Writing table forward entry at 0x00000500
1910 10:27:35.260714 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 10:27:35.264014 Writing coreboot table at 0x76b25000
1912 10:27:35.270190 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 10:27:35.274102 1. 0000000000001000-000000000009ffff: RAM
1914 10:27:35.277167 2. 00000000000a0000-00000000000fffff: RESERVED
1915 10:27:35.283639 3. 0000000000100000-00000000769eefff: RAM
1916 10:27:35.287066 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 10:27:35.293902 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 10:27:35.300188 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 10:27:35.303589 7. 0000000077000000-000000007fbfffff: RESERVED
1920 10:27:35.306724 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 10:27:35.313714 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 10:27:35.317193 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 10:27:35.323211 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 10:27:35.326787 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 10:27:35.333434 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 10:27:35.336640 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 10:27:35.344343 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 10:27:35.346878 16. 0000000100000000-00000002803fffff: RAM
1929 10:27:35.350031 Passing 4 GPIOs to payload:
1930 10:27:35.353447 NAME | PORT | POLARITY | VALUE
1931 10:27:35.359960 lid | undefined | high | high
1932 10:27:35.363520 power | undefined | high | low
1933 10:27:35.369894 oprom | undefined | high | low
1934 10:27:35.376762 EC in RW | 0x000000e5 | high | high
1935 10:27:35.382928 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum b43c
1936 10:27:35.383374 coreboot table: 1576 bytes.
1937 10:27:35.390058 IMD ROOT 0. 0x76fff000 0x00001000
1938 10:27:35.392717 IMD SMALL 1. 0x76ffe000 0x00001000
1939 10:27:35.396415 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 10:27:35.399997 VPD 3. 0x76c4d000 0x00000367
1941 10:27:35.403087 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 10:27:35.406578 CONSOLE 5. 0x76c2c000 0x00020000
1943 10:27:35.409390 FMAP 6. 0x76c2b000 0x00000578
1944 10:27:35.413210 TIME STAMP 7. 0x76c2a000 0x00000910
1945 10:27:35.419564 VBOOT WORK 8. 0x76c16000 0x00014000
1946 10:27:35.422761 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 10:27:35.426104 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 10:27:35.429247 RAMSTAGE 11. 0x76b97000 0x00073000
1949 10:27:35.432826 REFCODE 12. 0x76b42000 0x00055000
1950 10:27:35.435996 SMM BACKUP 13. 0x76b32000 0x00010000
1951 10:27:35.439292 4f444749 14. 0x76b30000 0x00002000
1952 10:27:35.442683 EXT VBT15. 0x76b2d000 0x0000219f
1953 10:27:35.448850 COREBOOT 16. 0x76b25000 0x00008000
1954 10:27:35.452130 ACPI 17. 0x76b01000 0x00024000
1955 10:27:35.455558 ACPI GNVS 18. 0x76b00000 0x00001000
1956 10:27:35.459182 RAMOOPS 19. 0x76a00000 0x00100000
1957 10:27:35.462271 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 10:27:35.465359 SMBIOS 21. 0x769ef000 0x00000800
1959 10:27:35.468991 IMD small region:
1960 10:27:35.472034 IMD ROOT 0. 0x76ffec00 0x00000400
1961 10:27:35.475303 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 10:27:35.478696 POWER STATE 2. 0x76ffeb80 0x00000044
1963 10:27:35.485452 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 10:27:35.488342 MEM INFO 4. 0x76ffe980 0x000001e0
1965 10:27:35.495275 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 10:27:35.495719 MTRR: Physical address space:
1967 10:27:35.501703 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 10:27:35.508452 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 10:27:35.515237 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 10:27:35.521852 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 10:27:35.528893 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 10:27:35.534724 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 10:27:35.541648 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 10:27:35.544750 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 10:27:35.548384 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 10:27:35.551744 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 10:27:35.558021 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 10:27:35.561665 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 10:27:35.564508 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 10:27:35.568283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 10:27:35.574929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 10:27:35.578327 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 10:27:35.582499 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 10:27:35.584506 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 10:27:35.588366 call enable_fixed_mtrr()
1986 10:27:35.591639 CPU physical address size: 39 bits
1987 10:27:35.598504 MTRR: default type WB/UC MTRR counts: 6/6.
1988 10:27:35.601656 MTRR: UC selected as default type.
1989 10:27:35.608615 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 10:27:35.611679 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 10:27:35.618459 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 10:27:35.625187 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 10:27:35.631515 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 10:27:35.638108 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 10:27:35.641095
1996 10:27:35.641539 MTRR check
1997 10:27:35.644497 Fixed MTRRs : Enabled
1998 10:27:35.644945 Variable MTRRs: Enabled
1999 10:27:35.645340
2000 10:27:35.651082 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 10:27:35.654838 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 10:27:35.657817 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 10:27:35.660908 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 10:27:35.667542 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 10:27:35.671704 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 10:27:35.674274 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 10:27:35.677655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 10:27:35.684843 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 10:27:35.688055 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 10:27:35.691576 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 10:27:35.697532 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2012 10:27:35.700976 call enable_fixed_mtrr()
2013 10:27:35.705228 Checking cr50 for pending updates
2014 10:27:35.708072 CPU physical address size: 39 bits
2015 10:27:35.711929 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 10:27:35.714556 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 10:27:35.718184 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 10:27:35.725055 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 10:27:35.727736 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 10:27:35.731194 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 10:27:35.734666 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 10:27:35.741228 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 10:27:35.744486 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 10:27:35.747997 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 10:27:35.751008 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 10:27:35.757694 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 10:27:35.761562 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 10:27:35.764522 call enable_fixed_mtrr()
2029 10:27:35.767842 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 10:27:35.770971 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 10:27:35.777948 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 10:27:35.780619 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 10:27:35.784599 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 10:27:35.787577 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 10:27:35.794403 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 10:27:35.797633 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 10:27:35.800631 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 10:27:35.803756 CPU physical address size: 39 bits
2039 10:27:35.810741 call enable_fixed_mtrr()
2040 10:27:35.813766 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 10:27:35.817695 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 10:27:35.820990 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 10:27:35.827685 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 10:27:35.830753 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 10:27:35.834126 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 10:27:35.837249 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 10:27:35.840610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 10:27:35.847032 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 10:27:35.851234 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 10:27:35.853880 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 10:27:35.856865 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 10:27:35.864918 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 10:27:35.868018 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 10:27:35.870953 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 10:27:35.874792 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 10:27:35.881153 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 10:27:35.884901 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 10:27:35.887745 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 10:27:35.891163 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 10:27:35.898426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 10:27:35.901038 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 10:27:35.904201 call enable_fixed_mtrr()
2063 10:27:35.908311 call enable_fixed_mtrr()
2064 10:27:35.911040 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 10:27:35.914526 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 10:27:35.917419 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 10:27:35.924327 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 10:27:35.927479 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 10:27:35.930521 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 10:27:35.933660 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 10:27:35.940789 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 10:27:35.944037 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 10:27:35.947030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 10:27:35.950419 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 10:27:35.957112 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 10:27:35.960537 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 10:27:35.963517 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 10:27:35.970878 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 10:27:35.973342 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 10:27:35.977136 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 10:27:35.980710 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 10:27:35.987063 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 10:27:35.990589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 10:27:35.994016 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 10:27:35.996672 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 10:27:36.000182 call enable_fixed_mtrr()
2087 10:27:36.003717 call enable_fixed_mtrr()
2088 10:27:36.008123 Reading cr50 TPM mode
2089 10:27:36.008223 CPU physical address size: 39 bits
2090 10:27:36.012401 CPU physical address size: 39 bits
2091 10:27:36.019622 BS: BS_PAYLOAD_LOAD entry times (exec / console): 307 / 6 ms
2092 10:27:36.022212 CPU physical address size: 39 bits
2093 10:27:36.029470 CPU physical address size: 39 bits
2094 10:27:36.032950 CPU physical address size: 39 bits
2095 10:27:36.039608 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 10:27:36.042961 Checking segment from ROM address 0xffc02b38
2097 10:27:36.049870 Checking segment from ROM address 0xffc02b54
2098 10:27:36.052659 Loading segment from ROM address 0xffc02b38
2099 10:27:36.056013 code (compression=0)
2100 10:27:36.063224 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 10:27:36.072551 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 10:27:36.075776 it's not compressed!
2103 10:27:36.213657 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 10:27:36.220298 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 10:27:36.226647 Loading segment from ROM address 0xffc02b54
2106 10:27:36.230330 Entry Point 0x30000000
2107 10:27:36.230893 Loaded segments
2108 10:27:36.237366 BS: BS_PAYLOAD_LOAD run times (exec / console): 147 / 63 ms
2109 10:27:36.279958 Finalizing chipset.
2110 10:27:36.282911 Finalizing SMM.
2111 10:27:36.283386 APMC done.
2112 10:27:36.289248 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 10:27:36.293152 mp_park_aps done after 0 msecs.
2114 10:27:36.296422 Jumping to boot code at 0x30000000(0x76b25000)
2115 10:27:36.306125 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 10:27:36.306672
2117 10:27:36.307145
2118 10:27:36.309655
2119 10:27:36.310098 Starting depthcharge on Voema...
2120 10:27:36.311222 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2121 10:27:36.311802 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2122 10:27:36.312307 Setting prompt string to ['volteer:']
2123 10:27:36.312771 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2124 10:27:36.313589
2125 10:27:36.319302 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2126 10:27:36.319770
2127 10:27:36.325870 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2128 10:27:36.326361
2129 10:27:36.332860 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2130 10:27:36.333372
2131 10:27:36.335507 Failed to find eMMC card reader
2132 10:27:36.335956
2133 10:27:36.336305 Wipe memory regions:
2134 10:27:36.339915
2135 10:27:36.342521 [0x00000000001000, 0x000000000a0000)
2136 10:27:36.343142
2137 10:27:36.345756 [0x00000000100000, 0x00000030000000)
2138 10:27:36.371280
2139 10:27:36.374152 [0x00000032662db0, 0x000000769ef000)
2140 10:27:36.410599
2141 10:27:36.414078 [0x00000100000000, 0x00000280400000)
2142 10:27:36.616928
2143 10:27:36.620495 ec_init: CrosEC protocol v3 supported (256, 256)
2144 10:27:36.621110
2145 10:27:36.626821 update_port_state: port C0 state: usb enable 1 mux conn 0
2146 10:27:36.627416
2147 10:27:36.636407 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2148 10:27:36.640744
2149 10:27:36.644568 pmc_check_ipc_sts: STS_BUSY done after 2412 us
2150 10:27:36.645156
2151 10:27:36.647571 send_conn_disc_msg: pmc_send_cmd succeeded
2152 10:27:37.078583
2153 10:27:37.079147 R8152: Initializing
2154 10:27:37.079540
2155 10:27:37.081994 Version 6 (ocp_data = 5c30)
2156 10:27:37.082517
2157 10:27:37.085079 R8152: Done initializing
2158 10:27:37.085570
2159 10:27:37.088833 Adding net device
2160 10:27:37.390837
2161 10:27:37.394100 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2162 10:27:37.394581
2163 10:27:37.394933
2164 10:27:37.395257
2165 10:27:37.397565 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 10:27:37.499292 volteer: tftpboot 192.168.201.1 9097758/tftp-deploy-pa6wn28j/kernel/bzImage 9097758/tftp-deploy-pa6wn28j/kernel/cmdline 9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
2168 10:27:37.499855 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 10:27:37.500262 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2170 10:27:37.504667 tftpboot 192.168.201.1 9097758/tftp-deploy-pa6wn28j/kernel/bzImoy-pa6wn28j/kernel/cmdline 9097758/tftp-deploy-pa6wn28j/ramdisk/ramdisk.cpio.gz
2171 10:27:37.505122
2172 10:27:37.505474 Waiting for link
2173 10:27:37.708886
2174 10:27:37.709439 done.
2175 10:27:37.709793
2176 10:27:37.710153 MAC: 00:24:32:30:7b:ec
2177 10:27:37.710520
2178 10:27:37.711748 Sending DHCP discover... done.
2179 10:27:37.712187
2180 10:27:37.714326 Waiting for reply... done.
2181 10:27:37.714766
2182 10:27:37.717698 Sending DHCP request... done.
2183 10:27:37.718165
2184 10:27:37.720613 Waiting for reply... done.
2185 10:27:37.721073
2186 10:27:37.724461 My ip is 192.168.201.11
2187 10:27:37.724925
2188 10:27:37.727597 The DHCP server ip is 192.168.201.1
2189 10:27:37.728044
2190 10:27:37.730612 TFTP server IP predefined by user: 192.168.201.1
2191 10:27:37.731056
2192 10:27:37.737449 Bootfile predefined by user: 9097758/tftp-deploy-pa6wn28j/kernel/bzImage
2193 10:27:37.737899
2194 10:27:37.741398 Sending tftp read request... done.
2195 10:27:37.743900
2196 10:27:37.748365 Waiting for the transfer...
2197 10:27:37.748843
2198 10:27:38.384701 00000000 ################################################################
2199 10:27:38.384846
2200 10:27:38.973362 00080000 ################################################################
2201 10:27:38.973510
2202 10:27:39.598368 00100000 ################################################################
2203 10:27:39.598989
2204 10:27:40.215599 00180000 ################################################################
2205 10:27:40.215742
2206 10:27:40.888217 00200000 ################################################################
2207 10:27:40.888870
2208 10:27:41.590871 00280000 ################################################################
2209 10:27:41.591436
2210 10:27:42.303514 00300000 ################################################################
2211 10:27:42.304090
2212 10:27:43.017913 00380000 ################################################################
2213 10:27:43.018570
2214 10:27:43.717029 00400000 ################################################################
2215 10:27:43.717211
2216 10:27:44.366288 00480000 ################################################################
2217 10:27:44.366899
2218 10:27:45.064691 00500000 ################################################################
2219 10:27:45.065299
2220 10:27:45.783745 00580000 ################################################################
2221 10:27:45.784413
2222 10:27:46.506472 00600000 ################################################################
2223 10:27:46.507098
2224 10:27:47.209045 00680000 ################################################################
2225 10:27:47.209203
2226 10:27:47.892980 00700000 ################################################################
2227 10:27:47.893543
2228 10:27:48.623629 00780000 ################################################################
2229 10:27:48.624181
2230 10:27:49.328953 00800000 ################################################################
2231 10:27:49.329108
2232 10:27:49.999554 00880000 ################################################################
2233 10:27:50.000129
2234 10:27:50.360804 00900000 ################################## done.
2235 10:27:50.361424
2236 10:27:50.363888 The bootfile was 9707520 bytes long.
2237 10:27:50.364505
2238 10:27:50.368259 Sending tftp read request... done.
2239 10:27:50.368867
2240 10:27:50.370111 Waiting for the transfer...
2241 10:27:50.370637
2242 10:27:51.030923 00000000 ################################################################
2243 10:27:51.031127
2244 10:27:51.570241 00080000 ################################################################
2245 10:27:51.570414
2246 10:27:52.104504 00100000 ################################################################
2247 10:27:52.104662
2248 10:27:52.646255 00180000 ################################################################
2249 10:27:52.646401
2250 10:27:53.208200 00200000 ################################################################
2251 10:27:53.208356
2252 10:27:53.758766 00280000 ################################################################
2253 10:27:53.758924
2254 10:27:54.328837 00300000 ################################################################
2255 10:27:54.328992
2256 10:27:54.870529 00380000 ################################################################
2257 10:27:54.870687
2258 10:27:55.436194 00400000 ################################################################
2259 10:27:55.436352
2260 10:27:55.976259 00480000 ################################################################
2261 10:27:55.976404
2262 10:27:56.274336 00500000 ################################### done.
2263 10:27:56.274491
2264 10:27:56.277928 Sending tftp read request... done.
2265 10:27:56.278018
2266 10:27:56.281082 Waiting for the transfer...
2267 10:27:56.281170
2268 10:27:56.281239 00000000 # done.
2269 10:27:56.281306
2270 10:27:56.290797 Command line loaded dynamically from TFTP file: 9097758/tftp-deploy-pa6wn28j/kernel/cmdline
2271 10:27:56.290886
2272 10:27:56.310545 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9097758/extract-nfsrootfs-dlk71908,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2273 10:27:56.315129
2274 10:27:56.318374 Shutting down all USB controllers.
2275 10:27:56.318463
2276 10:27:56.318532 Removing current net device
2277 10:27:56.318597
2278 10:27:56.321223 Finalizing coreboot
2279 10:27:56.321311
2280 10:27:56.327944 Exiting depthcharge with code 4 at timestamp: 28654656
2281 10:27:56.328033
2282 10:27:56.328102
2283 10:27:56.328167 Starting kernel ...
2284 10:27:56.328234
2285 10:27:56.328295
2286 10:27:56.328670 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2287 10:27:56.328771 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2288 10:27:56.328846 Setting prompt string to ['Linux version [0-9]']
2289 10:27:56.328918 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2290 10:27:56.328988 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2292 10:32:18.329684 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2294 10:32:18.330827 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2296 10:32:18.331762 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2299 10:32:18.333664 end: 2 depthcharge-action (duration 00:05:00) [common]
2301 10:32:18.334883 Cleaning after the job
2302 10:32:18.335418 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/ramdisk
2303 10:32:18.337765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/kernel
2304 10:32:18.341188 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/nfsrootfs
2305 10:32:18.399481 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097758/tftp-deploy-pa6wn28j/modules
2306 10:32:18.399783 start: 5.1 power-off (timeout 00:00:30) [common]
2307 10:32:18.399943 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2308 10:32:20.573554 >> Command sent successfully.
2309 10:32:20.583908 Returned 0 in 2 seconds
2310 10:32:20.685557 end: 5.1 power-off (duration 00:00:02) [common]
2312 10:32:20.687093 start: 5.2 read-feedback (timeout 00:09:58) [common]
2313 10:32:20.688197 Listened to connection for namespace 'common' for up to 1s
2314 10:32:21.691771 Finalising connection for namespace 'common'
2315 10:32:21.692486 Disconnecting from shell: Finalise
2316 10:32:21.692962
2317 10:32:21.794324 end: 5.2 read-feedback (duration 00:00:01) [common]
2318 10:32:21.795708 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9097758
2319 10:32:21.925169 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9097758
2320 10:32:21.925351 JobError: Your job cannot terminate cleanly.