Boot log: asus-cx9400-volteer

    1 10:27:07.708886  lava-dispatcher, installed at version: 2022.11
    2 10:27:07.709074  start: 0 validate
    3 10:27:07.709210  Start time: 2023-02-10 10:27:07.709204+00:00 (UTC)
    4 10:27:07.709352  Using caching service: 'http://localhost/cache/?uri=%s'
    5 10:27:07.709487  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
    6 10:27:08.003637  Using caching service: 'http://localhost/cache/?uri=%s'
    7 10:27:08.003867  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 10:27:08.293314  Using caching service: 'http://localhost/cache/?uri=%s'
    9 10:27:08.294042  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 10:27:08.579385  Using caching service: 'http://localhost/cache/?uri=%s'
   11 10:27:08.579545  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.272-cip91%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 10:27:08.876249  validate duration: 1.17
   14 10:27:08.877537  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 10:27:08.878108  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 10:27:08.878571  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 10:27:08.879089  Not decompressing ramdisk as can be used compressed.
   18 10:27:08.879576  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/initrd.cpio.gz
   19 10:27:08.880030  saving as /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/ramdisk/initrd.cpio.gz
   20 10:27:08.880388  total size: 5432118 (5MB)
   21 10:27:08.885903  progress   0% (0MB)
   22 10:27:08.893683  progress   5% (0MB)
   23 10:27:08.900078  progress  10% (0MB)
   24 10:27:08.904554  progress  15% (0MB)
   25 10:27:08.908667  progress  20% (1MB)
   26 10:27:08.911657  progress  25% (1MB)
   27 10:27:08.914728  progress  30% (1MB)
   28 10:27:08.917451  progress  35% (1MB)
   29 10:27:08.919637  progress  40% (2MB)
   30 10:27:08.921702  progress  45% (2MB)
   31 10:27:08.923706  progress  50% (2MB)
   32 10:27:08.925752  progress  55% (2MB)
   33 10:27:08.927489  progress  60% (3MB)
   34 10:27:08.928832  progress  65% (3MB)
   35 10:27:08.930260  progress  70% (3MB)
   36 10:27:08.931593  progress  75% (3MB)
   37 10:27:08.932927  progress  80% (4MB)
   38 10:27:08.934227  progress  85% (4MB)
   39 10:27:08.935684  progress  90% (4MB)
   40 10:27:08.937027  progress  95% (4MB)
   41 10:27:08.938341  progress 100% (5MB)
   42 10:27:08.938608  5MB downloaded in 0.06s (88.97MB/s)
   43 10:27:08.938763  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 10:27:08.939005  end: 1.1 download-retry (duration 00:00:00) [common]
   46 10:27:08.939097  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 10:27:08.939184  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 10:27:08.939290  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 10:27:08.939364  saving as /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/kernel/bzImage
   50 10:27:08.939427  total size: 9707520 (9MB)
   51 10:27:08.939489  No compression specified
   52 10:27:10.444225  progress   0% (0MB)
   53 10:27:10.456747  progress   5% (0MB)
   54 10:27:10.468655  progress  10% (0MB)
   55 10:27:10.476581  progress  15% (1MB)
   56 10:27:10.482031  progress  20% (1MB)
   57 10:27:10.486618  progress  25% (2MB)
   58 10:27:10.490297  progress  30% (2MB)
   59 10:27:10.493999  progress  35% (3MB)
   60 10:27:10.497463  progress  40% (3MB)
   61 10:27:10.500459  progress  45% (4MB)
   62 10:27:10.503358  progress  50% (4MB)
   63 10:27:10.505910  progress  55% (5MB)
   64 10:27:10.508510  progress  60% (5MB)
   65 10:27:10.510928  progress  65% (6MB)
   66 10:27:10.513375  progress  70% (6MB)
   67 10:27:10.515817  progress  75% (6MB)
   68 10:27:10.518098  progress  80% (7MB)
   69 10:27:10.520520  progress  85% (7MB)
   70 10:27:10.522844  progress  90% (8MB)
   71 10:27:10.525247  progress  95% (8MB)
   72 10:27:10.527588  progress 100% (9MB)
   73 10:27:10.527776  9MB downloaded in 1.59s (5.83MB/s)
   74 10:27:10.527973  end: 1.2.1 http-download (duration 00:00:02) [common]
   76 10:27:10.528214  end: 1.2 download-retry (duration 00:00:02) [common]
   77 10:27:10.528305  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 10:27:10.528393  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 10:27:10.528497  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/full.rootfs.tar.xz
   80 10:27:10.528564  saving as /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/nfsrootfs/full.rootfs.tar
   81 10:27:10.528626  total size: 123901376 (118MB)
   82 10:27:10.528687  Using unxz to decompress xz
   83 10:27:10.531834  progress   0% (0MB)
   84 10:27:10.972611  progress   5% (5MB)
   85 10:27:11.422567  progress  10% (11MB)
   86 10:27:11.873537  progress  15% (17MB)
   87 10:27:12.334104  progress  20% (23MB)
   88 10:27:12.661826  progress  25% (29MB)
   89 10:27:12.995912  progress  30% (35MB)
   90 10:27:13.259502  progress  35% (41MB)
   91 10:27:13.425075  progress  40% (47MB)
   92 10:27:13.781737  progress  45% (53MB)
   93 10:27:14.136358  progress  50% (59MB)
   94 10:27:14.468200  progress  55% (65MB)
   95 10:27:14.812740  progress  60% (70MB)
   96 10:27:15.139121  progress  65% (76MB)
   97 10:27:15.507446  progress  70% (82MB)
   98 10:27:15.911769  progress  75% (88MB)
   99 10:27:16.321207  progress  80% (94MB)
  100 10:27:16.445396  progress  85% (100MB)
  101 10:27:16.601170  progress  90% (106MB)
  102 10:27:16.926943  progress  95% (112MB)
  103 10:27:17.291223  progress 100% (118MB)
  104 10:27:17.296199  118MB downloaded in 6.77s (17.46MB/s)
  105 10:27:17.296457  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 10:27:17.296716  end: 1.3 download-retry (duration 00:00:07) [common]
  108 10:27:17.296808  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 10:27:17.296900  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 10:27:17.297046  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.272-cip91/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 10:27:17.297142  saving as /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/modules/modules.tar
  112 10:27:17.297241  total size: 64776 (0MB)
  113 10:27:17.297332  Using unxz to decompress xz
  114 10:27:17.300393  progress  50% (0MB)
  115 10:27:17.300769  progress 100% (0MB)
  116 10:27:17.305059  0MB downloaded in 0.01s (7.91MB/s)
  117 10:27:17.305301  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 10:27:17.305561  end: 1.4 download-retry (duration 00:00:00) [common]
  120 10:27:17.305656  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 10:27:17.305753  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 10:27:18.963317  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9097764/extract-nfsrootfs-ajiguxqr
  123 10:27:18.963515  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 10:27:18.963621  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 10:27:18.963760  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca
  126 10:27:18.963862  makedir: /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin
  127 10:27:18.963957  makedir: /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/tests
  128 10:27:18.964045  makedir: /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/results
  129 10:27:18.964144  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-add-keys
  130 10:27:18.964273  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-add-sources
  131 10:27:18.964388  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-background-process-start
  132 10:27:18.964501  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-background-process-stop
  133 10:27:18.964611  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-common-functions
  134 10:27:18.964721  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-echo-ipv4
  135 10:27:18.964830  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-install-packages
  136 10:27:18.964938  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-installed-packages
  137 10:27:18.965045  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-os-build
  138 10:27:18.965152  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-probe-channel
  139 10:27:18.965260  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-probe-ip
  140 10:27:18.965367  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-target-ip
  141 10:27:18.965477  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-target-mac
  142 10:27:18.965584  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-target-storage
  143 10:27:18.965694  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-case
  144 10:27:18.965803  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-event
  145 10:27:18.965910  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-feedback
  146 10:27:18.966018  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-raise
  147 10:27:18.966123  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-reference
  148 10:27:18.966230  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-runner
  149 10:27:18.966340  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-set
  150 10:27:18.966447  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-test-shell
  151 10:27:18.966556  Updating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-install-packages (oe)
  152 10:27:18.966672  Updating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/bin/lava-installed-packages (oe)
  153 10:27:18.966770  Creating /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/environment
  154 10:27:18.966854  LAVA metadata
  155 10:27:18.966920  - LAVA_JOB_ID=9097764
  156 10:27:18.966982  - LAVA_DISPATCHER_IP=192.168.201.1
  157 10:27:18.967079  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  158 10:27:18.967142  skipped lava-vland-overlay
  159 10:27:18.967216  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 10:27:18.967295  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  161 10:27:18.967354  skipped lava-multinode-overlay
  162 10:27:18.967426  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 10:27:18.967503  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  164 10:27:18.967574  Loading test definitions
  165 10:27:18.967663  start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
  166 10:27:18.967734  Using /lava-9097764 at stage 0
  167 10:27:18.967837  Fetching tests from https://github.com/kernelci/test-definitions
  168 10:27:18.968223  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/0/tests/0_ltp-ipc'
  169 10:27:23.498713  Running '/usr/bin/git checkout kernelci.org
  170 10:27:23.633462  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  171 10:27:23.634170  uuid=9097764_1.5.2.3.1 testdef=None
  172 10:27:23.634327  end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
  174 10:27:23.634574  start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
  175 10:27:23.635337  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  177 10:27:23.635575  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
  178 10:27:23.636590  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  180 10:27:23.636837  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
  181 10:27:23.637775  runner path: /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/0/tests/0_ltp-ipc test_uuid 9097764_1.5.2.3.1
  182 10:27:23.637870  SKIPFILE='skipfile-lkft.yaml'
  183 10:27:23.637935  SKIP_INSTALL='true'
  184 10:27:23.637994  TST_CMDFILES='ipc'
  185 10:27:23.638129  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  187 10:27:23.638338  Creating lava-test-runner.conf files
  188 10:27:23.638404  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9097764/lava-overlay-q_h320ca/lava-9097764/0 for stage 0
  189 10:27:23.638488  - 0_ltp-ipc
  190 10:27:23.638587  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  191 10:27:23.638674  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  192 10:27:31.099691  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  193 10:27:31.099845  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  194 10:27:31.099960  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  195 10:27:31.100063  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  196 10:27:31.100156  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  197 10:27:31.203373  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  198 10:27:31.203700  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  199 10:27:31.203895  extracting modules file /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097764/extract-nfsrootfs-ajiguxqr
  200 10:27:31.207863  extracting modules file /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9097764/extract-overlay-ramdisk-tr2zn41m/ramdisk
  201 10:27:31.211614  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  202 10:27:31.211727  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  203 10:27:31.211810  [common] Applying overlay to NFS
  204 10:27:31.211882  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9097764/compress-overlay-6uah9rqn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9097764/extract-nfsrootfs-ajiguxqr
  205 10:27:31.669190  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  206 10:27:31.669346  start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
  207 10:27:31.669441  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  208 10:27:31.669531  start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
  209 10:27:31.669613  Building ramdisk /var/lib/lava/dispatcher/tmp/9097764/extract-overlay-ramdisk-tr2zn41m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9097764/extract-overlay-ramdisk-tr2zn41m/ramdisk
  210 10:27:31.702969  >> 24777 blocks

  211 10:27:32.169964  rename /var/lib/lava/dispatcher/tmp/9097764/extract-overlay-ramdisk-tr2zn41m/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz
  212 10:27:32.170359  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  213 10:27:32.170483  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  214 10:27:32.170587  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  215 10:27:32.170683  No mkimage arch provided, not using FIT.
  216 10:27:32.170772  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  217 10:27:32.170858  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  218 10:27:32.170954  end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
  219 10:27:32.171045  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  220 10:27:32.171124  No LXC device requested
  221 10:27:32.171206  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  222 10:27:32.171298  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  223 10:27:32.171380  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  224 10:27:32.171455  Checking files for TFTP limit of 4294967296 bytes.
  225 10:27:32.171840  end: 1 tftp-deploy (duration 00:00:23) [common]
  226 10:27:32.171991  start: 2 depthcharge-action (timeout 00:05:00) [common]
  227 10:27:32.172085  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  228 10:27:32.172210  substitutions:
  229 10:27:32.172280  - {DTB}: None
  230 10:27:32.172346  - {INITRD}: 9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz
  231 10:27:32.172407  - {KERNEL}: 9097764/tftp-deploy-jpo2lelr/kernel/bzImage
  232 10:27:32.172467  - {LAVA_MAC}: None
  233 10:27:32.172525  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9097764/extract-nfsrootfs-ajiguxqr
  234 10:27:32.172583  - {NFS_SERVER_IP}: 192.168.201.1
  235 10:27:32.172640  - {PRESEED_CONFIG}: None
  236 10:27:32.172698  - {PRESEED_LOCAL}: None
  237 10:27:32.172755  - {RAMDISK}: 9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz
  238 10:27:32.172811  - {ROOT_PART}: None
  239 10:27:32.172868  - {ROOT}: None
  240 10:27:32.172924  - {SERVER_IP}: 192.168.201.1
  241 10:27:32.172980  - {TEE}: None
  242 10:27:32.173036  Parsed boot commands:
  243 10:27:32.173091  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  244 10:27:32.173246  Parsed boot commands: tftpboot 192.168.201.1 9097764/tftp-deploy-jpo2lelr/kernel/bzImage 9097764/tftp-deploy-jpo2lelr/kernel/cmdline 9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz
  245 10:27:32.173338  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  246 10:27:32.173428  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  247 10:27:32.173518  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  248 10:27:32.173601  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  249 10:27:32.173670  Not connected, no need to disconnect.
  250 10:27:32.173748  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  251 10:27:32.173831  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  252 10:27:32.173899  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
  253 10:27:32.176618  Setting prompt string to ['lava-test: # ']
  254 10:27:32.176906  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  255 10:27:32.177013  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  256 10:27:32.177117  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  257 10:27:32.177209  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  258 10:27:32.177394  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
  259 10:27:41.509817  >> Command sent successfully.

  260 10:27:41.519204  Returned 0 in 9 seconds
  261 10:27:41.620588  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  263 10:27:41.621936  end: 2.2.2 reset-device (duration 00:00:09) [common]
  264 10:27:41.622501  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  265 10:27:41.622939  Setting prompt string to 'Starting depthcharge on Voema...'
  266 10:27:41.623280  Changing prompt to 'Starting depthcharge on Voema...'
  267 10:27:41.623638  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  268 10:27:41.624911  [Enter `^Ec?' for help]

  269 10:27:41.625326  

  270 10:27:41.625665  

  271 10:27:41.626073  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  272 10:27:41.626425  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz

  273 10:27:41.626744  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  274 10:27:41.627051  CPU: AES supported, TXT NOT supported, VT supported

  275 10:27:41.627351  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  276 10:27:41.627650  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  277 10:27:41.627965  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  278 10:27:41.628267  VBOOT: Loading verstage.

  279 10:27:41.628635  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  280 10:27:41.628943  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  281 10:27:41.629240  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  282 10:27:41.629534  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  283 10:27:41.629829  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  284 10:27:41.630121  

  285 10:27:41.630405  

  286 10:27:41.630692  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  287 10:27:41.630985  Probing TPM: . done!

  288 10:27:41.631273  TPM ready after 0 ms

  289 10:27:41.631563  Connected to device vid:did:rid of 1ae0:0028:00

  290 10:27:41.631854  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  291 10:27:41.632179  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  292 10:27:41.632471  Initialized TPM device CR50 revision 0

  293 10:27:41.632758  tlcl_send_startup: Startup return code is 0

  294 10:27:41.633047  TPM: setup succeeded

  295 10:27:41.633336  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  296 10:27:41.633628  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  297 10:27:41.633917  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  298 10:27:41.634209  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  299 10:27:41.634498  Chrome EC: UHEPI supported

  300 10:27:41.634802  Phase 1

  301 10:27:41.635086  FMAP: area GBB found @ 1805000 (458752 bytes)

  302 10:27:41.635377  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  303 10:27:41.635669  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  304 10:27:41.635993  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  305 10:27:41.636288  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  306 10:27:41.636574  Recovery requested (1009000e)

  307 10:27:41.636860  TPM: Extending digest for VBOOT: boot mode into PCR 0

  308 10:27:41.637148  tlcl_extend: response is 0

  309 10:27:41.637434  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  310 10:27:41.637722  tlcl_extend: response is 0

  311 10:27:41.638006  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  312 10:27:41.638295  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  313 10:27:41.638583  BS: verstage times (exec / console): total (unknown) / 142 ms

  314 10:27:41.638872  

  315 10:27:41.639153  

  316 10:27:41.639438  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  317 10:27:41.639728  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  318 10:27:41.640042  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  319 10:27:41.640335  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  320 10:27:41.640623  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  321 10:27:41.640907  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  322 10:27:41.641194  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  323 10:27:41.641477  TCO_STS:   0000 0000

  324 10:27:41.641763  GEN_PMCON: d0015038 00002200

  325 10:27:41.642049  GBLRST_CAUSE: 00000000 00000000

  326 10:27:41.642337  HPR_CAUSE0: 00000000

  327 10:27:41.642643  prev_sleep_state 5

  328 10:27:41.642930  Boot Count incremented to 3589

  329 10:27:41.643232  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  330 10:27:41.643524  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  331 10:27:41.643812  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  332 10:27:41.644117  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  333 10:27:41.644404  Chrome EC: UHEPI supported

  334 10:27:41.644695  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  335 10:27:41.644989  Probing TPM:  done!

  336 10:27:41.645276  Connected to device vid:did:rid of 1ae0:0028:00

  337 10:27:41.645562  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  338 10:27:41.645854  Initialized TPM device CR50 revision 0

  339 10:27:41.646508  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  340 10:27:41.646848  MRC: Hash idx 0x100b comparison successful.

  341 10:27:41.647145  MRC cache found, size faa8

  342 10:27:41.647508  bootmode is set to: 2

  343 10:27:41.648087  SPD index = 2

  344 10:27:41.653787  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  345 10:27:41.656605  SPD: module type is LPDDR4X

  346 10:27:41.660057  SPD: module part number is MT53D1G64D4NW-046

  347 10:27:41.667278  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb

  348 10:27:41.670110  SPD: device width 16 bits, bus width 16 bits

  349 10:27:41.677704  SPD: module size is 2048 MB (per channel)

  350 10:27:42.105475  CBMEM:

  351 10:27:42.108692  IMD: root @ 0x76fff000 254 entries.

  352 10:27:42.112317  IMD: root @ 0x76ffec00 62 entries.

  353 10:27:42.115765  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  354 10:27:42.121967  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  355 10:27:42.125646  External stage cache:

  356 10:27:42.128811  IMD: root @ 0x7b3ff000 254 entries.

  357 10:27:42.131796  IMD: root @ 0x7b3fec00 62 entries.

  358 10:27:42.146963  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  359 10:27:42.153834  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  360 10:27:42.159873  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  361 10:27:42.173670  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  362 10:27:42.180558  cse_lite: Skip switching to RW in the recovery path

  363 10:27:42.180984  8 DIMMs found

  364 10:27:42.181368  SMM Memory Map

  365 10:27:42.186781  SMRAM       : 0x7b000000 0x800000

  366 10:27:42.190382   Subregion 0: 0x7b000000 0x200000

  367 10:27:42.193922   Subregion 1: 0x7b200000 0x200000

  368 10:27:42.197280   Subregion 2: 0x7b400000 0x400000

  369 10:27:42.197823  top_of_ram = 0x77000000

  370 10:27:42.204059  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  371 10:27:42.210219  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  372 10:27:42.213536  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  373 10:27:42.220452  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  374 10:27:42.227198  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  375 10:27:42.233905  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  376 10:27:42.243743  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  377 10:27:42.250571  Processing 211 relocs. Offset value of 0x74c0b000

  378 10:27:42.257947  BS: romstage times (exec / console): total (unknown) / 276 ms

  379 10:27:42.262782  

  380 10:27:42.263292  

  381 10:27:42.272783  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  382 10:27:42.275534  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  383 10:27:42.285346  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  384 10:27:42.292045  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  385 10:27:42.298720  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  386 10:27:42.305218  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  387 10:27:42.349461  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  388 10:27:42.355683  Processing 5008 relocs. Offset value of 0x75d98000

  389 10:27:42.362337  BS: postcar times (exec / console): total (unknown) / 59 ms

  390 10:27:42.362778  

  391 10:27:42.363128  

  392 10:27:42.371802  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  393 10:27:42.372328  Normal boot

  394 10:27:42.375232  FW_CONFIG value is 0x804c02

  395 10:27:42.378772  PCI: 00:07.0 disabled by fw_config

  396 10:27:42.382354  PCI: 00:07.1 disabled by fw_config

  397 10:27:42.388527  PCI: 00:0d.2 disabled by fw_config

  398 10:27:42.391945  PCI: 00:1c.7 disabled by fw_config

  399 10:27:42.395411  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  400 10:27:42.401861  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  401 10:27:42.408745  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  402 10:27:42.412304  GENERIC: 0.0 disabled by fw_config

  403 10:27:42.415003  GENERIC: 1.0 disabled by fw_config

  404 10:27:42.418307  fw_config match found: DB_USB=USB3_ACTIVE

  405 10:27:42.421893  fw_config match found: DB_USB=USB3_ACTIVE

  406 10:27:42.425070  fw_config match found: DB_USB=USB3_ACTIVE

  407 10:27:42.431792  fw_config match found: DB_USB=USB3_ACTIVE

  408 10:27:42.435340  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  409 10:27:42.445066  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  410 10:27:42.451901  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  411 10:27:42.458858  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  412 10:27:42.465221  microcode: sig=0x806c1 pf=0x80 revision=0x86

  413 10:27:42.468423  microcode: Update skipped, already up-to-date

  414 10:27:42.475089  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  415 10:27:42.502871  Detected 4 core, 8 thread CPU.

  416 10:27:42.506063  Setting up SMI for CPU

  417 10:27:42.509390  IED base = 0x7b400000

  418 10:27:42.509881  IED size = 0x00400000

  419 10:27:42.512852  Will perform SMM setup.

  420 10:27:42.519579  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.

  421 10:27:42.526316  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  422 10:27:42.533123  Processing 16 relocs. Offset value of 0x00030000

  423 10:27:42.536341  Attempting to start 7 APs

  424 10:27:42.539030  Waiting for 10ms after sending INIT.

  425 10:27:42.554563  Waiting for 1st SIPI to complete...done.

  426 10:27:42.555135  AP: slot 1 apic_id 1.

  427 10:27:42.557502  AP: slot 4 apic_id 2.

  428 10:27:42.560869  AP: slot 7 apic_id 3.

  429 10:27:42.560956  AP: slot 2 apic_id 5.

  430 10:27:42.564194  AP: slot 5 apic_id 4.

  431 10:27:42.567561  AP: slot 6 apic_id 6.

  432 10:27:42.567648  AP: slot 3 apic_id 7.

  433 10:27:42.574241  Waiting for 2nd SIPI to complete...done.

  434 10:27:42.580958  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  435 10:27:42.587779  Processing 13 relocs. Offset value of 0x00038000

  436 10:27:42.591144  Unable to locate Global NVS

  437 10:27:42.597300  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  438 10:27:42.600763  Installing permanent SMM handler to 0x7b000000

  439 10:27:42.610986  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  440 10:27:42.614346  Processing 794 relocs. Offset value of 0x7b010000

  441 10:27:42.623838  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  442 10:27:42.627254  Processing 13 relocs. Offset value of 0x7b008000

  443 10:27:42.634101  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  444 10:27:42.640771  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  445 10:27:42.644173  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  446 10:27:42.650144  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  447 10:27:42.657092  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  448 10:27:42.663721  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  449 10:27:42.670836  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  450 10:27:42.673704  Unable to locate Global NVS

  451 10:27:42.680457  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  452 10:27:42.683825  Clearing SMI status registers

  453 10:27:42.684415  SMI_STS: PM1 

  454 10:27:42.687018  PM1_STS: PWRBTN 

  455 10:27:42.693997  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  456 10:27:42.697283  In relocation handler: CPU 0

  457 10:27:42.700781  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  458 10:27:42.706995  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  459 10:27:42.710237  Relocation complete.

  460 10:27:42.716954  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  461 10:27:42.720341  In relocation handler: CPU 1

  462 10:27:42.723733  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  463 10:27:42.724260  Relocation complete.

  464 10:27:42.733852  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  465 10:27:42.737225  In relocation handler: CPU 5

  466 10:27:42.740513  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  467 10:27:42.743388  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  468 10:27:42.746716  Relocation complete.

  469 10:27:42.753652  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  470 10:27:42.756789  In relocation handler: CPU 2

  471 10:27:42.759940  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  472 10:27:42.763421  Relocation complete.

  473 10:27:42.770058  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  474 10:27:42.773440  In relocation handler: CPU 3

  475 10:27:42.776780  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  476 10:27:42.780008  Relocation complete.

  477 10:27:42.786879  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  478 10:27:42.790131  In relocation handler: CPU 6

  479 10:27:42.793481  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  480 10:27:42.800051  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  481 10:27:42.800651  Relocation complete.

  482 10:27:42.806591  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  483 10:27:42.810088  In relocation handler: CPU 7

  484 10:27:42.816581  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  485 10:27:42.817190  Relocation complete.

  486 10:27:42.823187  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  487 10:27:42.825863  In relocation handler: CPU 4

  488 10:27:42.832762  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  489 10:27:42.836279  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  490 10:27:42.839463  Relocation complete.

  491 10:27:42.839983  Initializing CPU #0

  492 10:27:42.842768  CPU: vendor Intel device 806c1

  493 10:27:42.849528  CPU: family 06, model 8c, stepping 01

  494 10:27:42.850017  Clearing out pending MCEs

  495 10:27:42.852737  Setting up local APIC...

  496 10:27:42.856217   apic_id: 0x00 done.

  497 10:27:42.859805  Turbo is available but hidden

  498 10:27:42.862903  Turbo is available and visible

  499 10:27:42.866308  microcode: Update skipped, already up-to-date

  500 10:27:42.869023  CPU #0 initialized

  501 10:27:42.869508  Initializing CPU #7

  502 10:27:42.872364  Initializing CPU #3

  503 10:27:42.875694  Initializing CPU #6

  504 10:27:42.876225  Initializing CPU #2

  505 10:27:42.878970  Initializing CPU #5

  506 10:27:42.882323  CPU: vendor Intel device 806c1

  507 10:27:42.885720  CPU: family 06, model 8c, stepping 01

  508 10:27:42.889148  CPU: vendor Intel device 806c1

  509 10:27:42.892363  CPU: family 06, model 8c, stepping 01

  510 10:27:42.895779  Clearing out pending MCEs

  511 10:27:42.899365  Clearing out pending MCEs

  512 10:27:42.899936  Setting up local APIC...

  513 10:27:42.902461  Initializing CPU #1

  514 10:27:42.906076   apic_id: 0x06 done.

  515 10:27:42.906673  Setting up local APIC...

  516 10:27:42.909236  CPU: vendor Intel device 806c1

  517 10:27:42.912640  CPU: family 06, model 8c, stepping 01

  518 10:27:42.916087  CPU: vendor Intel device 806c1

  519 10:27:42.920220  CPU: family 06, model 8c, stepping 01

  520 10:27:42.923611  Clearing out pending MCEs

  521 10:27:42.927051  Clearing out pending MCEs

  522 10:27:42.930352  Setting up local APIC...

  523 10:27:42.930840  Initializing CPU #4

  524 10:27:42.933697  CPU: vendor Intel device 806c1

  525 10:27:42.937253  CPU: family 06, model 8c, stepping 01

  526 10:27:42.940432  CPU: vendor Intel device 806c1

  527 10:27:42.943164  CPU: family 06, model 8c, stepping 01

  528 10:27:42.947271  Clearing out pending MCEs

  529 10:27:42.949746  Clearing out pending MCEs

  530 10:27:42.953143  Setting up local APIC...

  531 10:27:42.956560  CPU: vendor Intel device 806c1

  532 10:27:42.959802  CPU: family 06, model 8c, stepping 01

  533 10:27:42.963295  Setting up local APIC...

  534 10:27:42.963801   apic_id: 0x04 done.

  535 10:27:42.966604  Setting up local APIC...

  536 10:27:42.970067  microcode: Update skipped, already up-to-date

  537 10:27:42.973417   apic_id: 0x07 done.

  538 10:27:42.976647  CPU #6 initialized

  539 10:27:42.980176  microcode: Update skipped, already up-to-date

  540 10:27:42.983328   apic_id: 0x02 done.

  541 10:27:42.983732   apic_id: 0x03 done.

  542 10:27:42.990171  microcode: Update skipped, already up-to-date

  543 10:27:42.990763   apic_id: 0x05 done.

  544 10:27:42.996858  microcode: Update skipped, already up-to-date

  545 10:27:43.000341  microcode: Update skipped, already up-to-date

  546 10:27:43.003316  CPU #4 initialized

  547 10:27:43.003981  CPU #7 initialized

  548 10:27:43.006271  Clearing out pending MCEs

  549 10:27:43.009759  microcode: Update skipped, already up-to-date

  550 10:27:43.013070  CPU #5 initialized

  551 10:27:43.016270  CPU #2 initialized

  552 10:27:43.016770  CPU #3 initialized

  553 10:27:43.019680  Setting up local APIC...

  554 10:27:43.023236   apic_id: 0x01 done.

  555 10:27:43.026458  microcode: Update skipped, already up-to-date

  556 10:27:43.029865  CPU #1 initialized

  557 10:27:43.033169  bsp_do_flight_plan done after 454 msecs.

  558 10:27:43.036577  CPU: frequency set to 4400 MHz

  559 10:27:43.037087  Enabling SMIs.

  560 10:27:43.042742  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  561 10:27:43.059551  SATAXPCIE1 indicates PCIe NVMe is present

  562 10:27:43.063007  Probing TPM:  done!

  563 10:27:43.066308  Connected to device vid:did:rid of 1ae0:0028:00

  564 10:27:43.077095  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6

  565 10:27:43.080415  Initialized TPM device CR50 revision 0

  566 10:27:43.083936  Enabling S0i3.4

  567 10:27:43.090566  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  568 10:27:43.093775  Found a VBT of 8704 bytes after decompression

  569 10:27:43.099992  cse_lite: CSE RO boot. HybridStorageMode disabled

  570 10:27:43.106660  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  571 10:27:43.180439  FSPS returned 0

  572 10:27:43.183764  Executing Phase 1 of FspMultiPhaseSiInit

  573 10:27:43.193802  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  574 10:27:43.197156  port C0 DISC req: usage 1 usb3 1 usb2 5

  575 10:27:43.200535  Raw Buffer output 0 00000511

  576 10:27:43.203959  Raw Buffer output 1 00000000

  577 10:27:43.207902  pmc_send_ipc_cmd succeeded

  578 10:27:43.214229  port C1 DISC req: usage 1 usb3 2 usb2 3

  579 10:27:43.214674  Raw Buffer output 0 00000321

  580 10:27:43.217516  Raw Buffer output 1 00000000

  581 10:27:43.221675  pmc_send_ipc_cmd succeeded

  582 10:27:43.226816  Detected 4 core, 8 thread CPU.

  583 10:27:43.230266  Detected 4 core, 8 thread CPU.

  584 10:27:43.431150  Display FSP Version Info HOB

  585 10:27:43.433754  Reference Code - CPU = a.0.4c.31

  586 10:27:43.437142  uCode Version = 0.0.0.86

  587 10:27:43.440473  TXT ACM version = ff.ff.ff.ffff

  588 10:27:43.443990  Reference Code - ME = a.0.4c.31

  589 10:27:43.447424  MEBx version = 0.0.0.0

  590 10:27:43.450747  ME Firmware Version = Consumer SKU

  591 10:27:43.454124  Reference Code - PCH = a.0.4c.31

  592 10:27:43.456892  PCH-CRID Status = Disabled

  593 10:27:43.460321  PCH-CRID Original Value = ff.ff.ff.ffff

  594 10:27:43.463669  PCH-CRID New Value = ff.ff.ff.ffff

  595 10:27:43.467005  OPROM - RST - RAID = ff.ff.ff.ffff

  596 10:27:43.470315  PCH Hsio Version = 4.0.0.0

  597 10:27:43.473447  Reference Code - SA - System Agent = a.0.4c.31

  598 10:27:43.476938  Reference Code - MRC = 2.0.0.1

  599 10:27:43.480242  SA - PCIe Version = a.0.4c.31

  600 10:27:43.483691  SA-CRID Status = Disabled

  601 10:27:43.487069  SA-CRID Original Value = 0.0.0.1

  602 10:27:43.490517  SA-CRID New Value = 0.0.0.1

  603 10:27:43.494083  OPROM - VBIOS = ff.ff.ff.ffff

  604 10:27:43.497360  IO Manageability Engine FW Version = 11.1.4.0

  605 10:27:43.501604  PHY Build Version = 0.0.0.e0

  606 10:27:43.504690  Thunderbolt(TM) FW Version = 0.0.0.0

  607 10:27:43.511595  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  608 10:27:43.512085  ITSS IRQ Polarities Before:

  609 10:27:43.515070  IPC0: 0xffffffff

  610 10:27:43.515517  IPC1: 0xffffffff

  611 10:27:43.518366  IPC2: 0xffffffff

  612 10:27:43.521074  IPC3: 0xffffffff

  613 10:27:43.521518  ITSS IRQ Polarities After:

  614 10:27:43.524630  IPC0: 0xffffffff

  615 10:27:43.525091  IPC1: 0xffffffff

  616 10:27:43.527881  IPC2: 0xffffffff

  617 10:27:43.528354  IPC3: 0xffffffff

  618 10:27:43.534487  Found PCIe Root Port #9 at PCI: 00:1d.0.

  619 10:27:43.544527  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  620 10:27:43.558357  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  621 10:27:43.567888  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  622 10:27:43.575264  BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms

  623 10:27:43.577927  Enumerating buses...

  624 10:27:43.581250  Show all devs... Before device enumeration.

  625 10:27:43.584787  Root Device: enabled 1

  626 10:27:43.588080  DOMAIN: 0000: enabled 1

  627 10:27:43.591457  CPU_CLUSTER: 0: enabled 1

  628 10:27:43.591900  PCI: 00:00.0: enabled 1

  629 10:27:43.594920  PCI: 00:02.0: enabled 1

  630 10:27:43.597728  PCI: 00:04.0: enabled 1

  631 10:27:43.601132  PCI: 00:05.0: enabled 1

  632 10:27:43.601634  PCI: 00:06.0: enabled 0

  633 10:27:43.604482  PCI: 00:07.0: enabled 0

  634 10:27:43.607897  PCI: 00:07.1: enabled 0

  635 10:27:43.611490  PCI: 00:07.2: enabled 0

  636 10:27:43.612031  PCI: 00:07.3: enabled 0

  637 10:27:43.614328  PCI: 00:08.0: enabled 1

  638 10:27:43.617780  PCI: 00:09.0: enabled 0

  639 10:27:43.618249  PCI: 00:0a.0: enabled 0

  640 10:27:43.621329  PCI: 00:0d.0: enabled 1

  641 10:27:43.624664  PCI: 00:0d.1: enabled 0

  642 10:27:43.628250  PCI: 00:0d.2: enabled 0

  643 10:27:43.628694  PCI: 00:0d.3: enabled 0

  644 10:27:43.631039  PCI: 00:0e.0: enabled 0

  645 10:27:43.634499  PCI: 00:10.2: enabled 1

  646 10:27:43.637956  PCI: 00:10.6: enabled 0

  647 10:27:43.638407  PCI: 00:10.7: enabled 0

  648 10:27:43.641368  PCI: 00:12.0: enabled 0

  649 10:27:43.644690  PCI: 00:12.6: enabled 0

  650 10:27:43.647359  PCI: 00:13.0: enabled 0

  651 10:27:43.647805  PCI: 00:14.0: enabled 1

  652 10:27:43.650454  PCI: 00:14.1: enabled 0

  653 10:27:43.653815  PCI: 00:14.2: enabled 1

  654 10:27:43.653894  PCI: 00:14.3: enabled 1

  655 10:27:43.657111  PCI: 00:15.0: enabled 1

  656 10:27:43.660533  PCI: 00:15.1: enabled 1

  657 10:27:43.663870  PCI: 00:15.2: enabled 1

  658 10:27:43.664002  PCI: 00:15.3: enabled 1

  659 10:27:43.667281  PCI: 00:16.0: enabled 1

  660 10:27:43.670655  PCI: 00:16.1: enabled 0

  661 10:27:43.673957  PCI: 00:16.2: enabled 0

  662 10:27:43.674044  PCI: 00:16.3: enabled 0

  663 10:27:43.677357  PCI: 00:16.4: enabled 0

  664 10:27:43.680722  PCI: 00:16.5: enabled 0

  665 10:27:43.684023  PCI: 00:17.0: enabled 1

  666 10:27:43.684113  PCI: 00:19.0: enabled 0

  667 10:27:43.686944  PCI: 00:19.1: enabled 1

  668 10:27:43.690276  PCI: 00:19.2: enabled 0

  669 10:27:43.693609  PCI: 00:1c.0: enabled 1

  670 10:27:43.693696  PCI: 00:1c.1: enabled 0

  671 10:27:43.697024  PCI: 00:1c.2: enabled 0

  672 10:27:43.700479  PCI: 00:1c.3: enabled 0

  673 10:27:43.700566  PCI: 00:1c.4: enabled 0

  674 10:27:43.703828  PCI: 00:1c.5: enabled 0

  675 10:27:43.707176  PCI: 00:1c.6: enabled 1

  676 10:27:43.710603  PCI: 00:1c.7: enabled 0

  677 10:27:43.710690  PCI: 00:1d.0: enabled 1

  678 10:27:43.714030  PCI: 00:1d.1: enabled 0

  679 10:27:43.716797  PCI: 00:1d.2: enabled 1

  680 10:27:43.720281  PCI: 00:1d.3: enabled 0

  681 10:27:43.720368  PCI: 00:1e.0: enabled 1

  682 10:27:43.723664  PCI: 00:1e.1: enabled 0

  683 10:27:43.727160  PCI: 00:1e.2: enabled 1

  684 10:27:43.730591  PCI: 00:1e.3: enabled 1

  685 10:27:43.730677  PCI: 00:1f.0: enabled 1

  686 10:27:43.734020  PCI: 00:1f.1: enabled 0

  687 10:27:43.737312  PCI: 00:1f.2: enabled 1

  688 10:27:43.737399  PCI: 00:1f.3: enabled 1

  689 10:27:43.740102  PCI: 00:1f.4: enabled 0

  690 10:27:43.743553  PCI: 00:1f.5: enabled 1

  691 10:27:43.746912  PCI: 00:1f.6: enabled 0

  692 10:27:43.746999  PCI: 00:1f.7: enabled 0

  693 10:27:43.750282  APIC: 00: enabled 1

  694 10:27:43.753700  GENERIC: 0.0: enabled 1

  695 10:27:43.756935  GENERIC: 0.0: enabled 1

  696 10:27:43.757022  GENERIC: 1.0: enabled 1

  697 10:27:43.760170  GENERIC: 0.0: enabled 1

  698 10:27:43.763513  GENERIC: 1.0: enabled 1

  699 10:27:43.763599  USB0 port 0: enabled 1

  700 10:27:43.766969  GENERIC: 0.0: enabled 1

  701 10:27:43.770387  USB0 port 0: enabled 1

  702 10:27:43.773747  GENERIC: 0.0: enabled 1

  703 10:27:43.773835  I2C: 00:1a: enabled 1

  704 10:27:43.777003  I2C: 00:31: enabled 1

  705 10:27:43.780320  I2C: 00:32: enabled 1

  706 10:27:43.780407  I2C: 00:10: enabled 1

  707 10:27:43.783812  I2C: 00:15: enabled 1

  708 10:27:43.786532  GENERIC: 0.0: enabled 0

  709 10:27:43.786619  GENERIC: 1.0: enabled 0

  710 10:27:43.789985  GENERIC: 0.0: enabled 1

  711 10:27:43.793320  SPI: 00: enabled 1

  712 10:27:43.793407  SPI: 00: enabled 1

  713 10:27:43.796657  PNP: 0c09.0: enabled 1

  714 10:27:43.800140  GENERIC: 0.0: enabled 1

  715 10:27:43.800226  USB3 port 0: enabled 1

  716 10:27:43.803573  USB3 port 1: enabled 1

  717 10:27:43.806979  USB3 port 2: enabled 0

  718 10:27:43.810314  USB3 port 3: enabled 0

  719 10:27:43.810400  USB2 port 0: enabled 0

  720 10:27:43.813735  USB2 port 1: enabled 1

  721 10:27:43.816599  USB2 port 2: enabled 1

  722 10:27:43.816686  USB2 port 3: enabled 0

  723 10:27:43.820103  USB2 port 4: enabled 1

  724 10:27:43.823538  USB2 port 5: enabled 0

  725 10:27:43.826387  USB2 port 6: enabled 0

  726 10:27:43.826473  USB2 port 7: enabled 0

  727 10:27:43.829626  USB2 port 8: enabled 0

  728 10:27:43.833096  USB2 port 9: enabled 0

  729 10:27:43.833183  USB3 port 0: enabled 0

  730 10:27:43.836455  USB3 port 1: enabled 1

  731 10:27:43.839824  USB3 port 2: enabled 0

  732 10:27:43.843268  USB3 port 3: enabled 0

  733 10:27:43.843354  GENERIC: 0.0: enabled 1

  734 10:27:43.846693  GENERIC: 1.0: enabled 1

  735 10:27:43.849535  APIC: 01: enabled 1

  736 10:27:43.849621  APIC: 05: enabled 1

  737 10:27:43.852695  APIC: 07: enabled 1

  738 10:27:43.856194  APIC: 02: enabled 1

  739 10:27:43.856280  APIC: 04: enabled 1

  740 10:27:43.859433  APIC: 06: enabled 1

  741 10:27:43.859519  APIC: 03: enabled 1

  742 10:27:43.862866  Compare with tree...

  743 10:27:43.866384  Root Device: enabled 1

  744 10:27:43.869796   DOMAIN: 0000: enabled 1

  745 10:27:43.869877    PCI: 00:00.0: enabled 1

  746 10:27:43.872545    PCI: 00:02.0: enabled 1

  747 10:27:43.875834    PCI: 00:04.0: enabled 1

  748 10:27:43.879182     GENERIC: 0.0: enabled 1

  749 10:27:43.882610    PCI: 00:05.0: enabled 1

  750 10:27:43.882697    PCI: 00:06.0: enabled 0

  751 10:27:43.886126    PCI: 00:07.0: enabled 0

  752 10:27:43.889653     GENERIC: 0.0: enabled 1

  753 10:27:43.892273    PCI: 00:07.1: enabled 0

  754 10:27:43.895692     GENERIC: 1.0: enabled 1

  755 10:27:43.895778    PCI: 00:07.2: enabled 0

  756 10:27:43.899065     GENERIC: 0.0: enabled 1

  757 10:27:43.902549    PCI: 00:07.3: enabled 0

  758 10:27:43.905799     GENERIC: 1.0: enabled 1

  759 10:27:43.909299    PCI: 00:08.0: enabled 1

  760 10:27:43.909385    PCI: 00:09.0: enabled 0

  761 10:27:43.912707    PCI: 00:0a.0: enabled 0

  762 10:27:43.916033    PCI: 00:0d.0: enabled 1

  763 10:27:43.919571     USB0 port 0: enabled 1

  764 10:27:43.922894      USB3 port 0: enabled 1

  765 10:27:43.922980      USB3 port 1: enabled 1

  766 10:27:43.925498      USB3 port 2: enabled 0

  767 10:27:43.928980      USB3 port 3: enabled 0

  768 10:27:43.932284    PCI: 00:0d.1: enabled 0

  769 10:27:43.935804    PCI: 00:0d.2: enabled 0

  770 10:27:43.935913     GENERIC: 0.0: enabled 1

  771 10:27:43.939235    PCI: 00:0d.3: enabled 0

  772 10:27:43.942591    PCI: 00:0e.0: enabled 0

  773 10:27:43.946016    PCI: 00:10.2: enabled 1

  774 10:27:43.948791    PCI: 00:10.6: enabled 0

  775 10:27:43.948878    PCI: 00:10.7: enabled 0

  776 10:27:43.952166    PCI: 00:12.0: enabled 0

  777 10:27:43.955604    PCI: 00:12.6: enabled 0

  778 10:27:43.958943    PCI: 00:13.0: enabled 0

  779 10:27:43.962310    PCI: 00:14.0: enabled 1

  780 10:27:43.962397     USB0 port 0: enabled 1

  781 10:27:43.965553      USB2 port 0: enabled 0

  782 10:27:43.968873      USB2 port 1: enabled 1

  783 10:27:43.972298      USB2 port 2: enabled 1

  784 10:27:43.975704      USB2 port 3: enabled 0

  785 10:27:43.979100      USB2 port 4: enabled 1

  786 10:27:43.979187      USB2 port 5: enabled 0

  787 10:27:43.982359      USB2 port 6: enabled 0

  788 10:27:43.985122      USB2 port 7: enabled 0

  789 10:27:43.988546      USB2 port 8: enabled 0

  790 10:27:43.991819      USB2 port 9: enabled 0

  791 10:27:43.995193      USB3 port 0: enabled 0

  792 10:27:43.995280      USB3 port 1: enabled 1

  793 10:27:43.998476      USB3 port 2: enabled 0

  794 10:27:44.001930      USB3 port 3: enabled 0

  795 10:27:44.005270    PCI: 00:14.1: enabled 0

  796 10:27:44.008751    PCI: 00:14.2: enabled 1

  797 10:27:44.008837    PCI: 00:14.3: enabled 1

  798 10:27:44.012085     GENERIC: 0.0: enabled 1

  799 10:27:44.015424    PCI: 00:15.0: enabled 1

  800 10:27:44.018694     I2C: 00:1a: enabled 1

  801 10:27:44.022064     I2C: 00:31: enabled 1

  802 10:27:44.022151     I2C: 00:32: enabled 1

  803 10:27:44.025554    PCI: 00:15.1: enabled 1

  804 10:27:44.028950     I2C: 00:10: enabled 1

  805 10:27:44.031752    PCI: 00:15.2: enabled 1

  806 10:27:44.031838    PCI: 00:15.3: enabled 1

  807 10:27:44.035088    PCI: 00:16.0: enabled 1

  808 10:27:44.038580    PCI: 00:16.1: enabled 0

  809 10:27:44.041890    PCI: 00:16.2: enabled 0

  810 10:27:44.045210    PCI: 00:16.3: enabled 0

  811 10:27:44.045296    PCI: 00:16.4: enabled 0

  812 10:27:44.048554    PCI: 00:16.5: enabled 0

  813 10:27:44.051929    PCI: 00:17.0: enabled 1

  814 10:27:44.054766    PCI: 00:19.0: enabled 0

  815 10:27:44.058147    PCI: 00:19.1: enabled 1

  816 10:27:44.058233     I2C: 00:15: enabled 1

  817 10:27:44.061546    PCI: 00:19.2: enabled 0

  818 10:27:44.064802    PCI: 00:1d.0: enabled 1

  819 10:27:44.068322     GENERIC: 0.0: enabled 1

  820 10:27:44.071739    PCI: 00:1e.0: enabled 1

  821 10:27:44.071826    PCI: 00:1e.1: enabled 0

  822 10:27:44.075126    PCI: 00:1e.2: enabled 1

  823 10:27:44.078488     SPI: 00: enabled 1

  824 10:27:44.081886    PCI: 00:1e.3: enabled 1

  825 10:27:44.081973     SPI: 00: enabled 1

  826 10:27:44.085161    PCI: 00:1f.0: enabled 1

  827 10:27:44.088562     PNP: 0c09.0: enabled 1

  828 10:27:44.091858    PCI: 00:1f.1: enabled 0

  829 10:27:44.091974    PCI: 00:1f.2: enabled 1

  830 10:27:44.095324     GENERIC: 0.0: enabled 1

  831 10:27:44.098676      GENERIC: 0.0: enabled 1

  832 10:27:44.150027      GENERIC: 1.0: enabled 1

  833 10:27:44.150125    PCI: 00:1f.3: enabled 1

  834 10:27:44.150386    PCI: 00:1f.4: enabled 0

  835 10:27:44.150457    PCI: 00:1f.5: enabled 1

  836 10:27:44.150553    PCI: 00:1f.6: enabled 0

  837 10:27:44.150614    PCI: 00:1f.7: enabled 0

  838 10:27:44.150674   CPU_CLUSTER: 0: enabled 1

  839 10:27:44.150919    APIC: 00: enabled 1

  840 10:27:44.150985    APIC: 01: enabled 1

  841 10:27:44.151045    APIC: 05: enabled 1

  842 10:27:44.151284    APIC: 07: enabled 1

  843 10:27:44.151350    APIC: 02: enabled 1

  844 10:27:44.151410    APIC: 04: enabled 1

  845 10:27:44.151657    APIC: 06: enabled 1

  846 10:27:44.151723    APIC: 03: enabled 1

  847 10:27:44.151783  Root Device scanning...

  848 10:27:44.151842  scan_static_bus for Root Device

  849 10:27:44.151925  DOMAIN: 0000 enabled

  850 10:27:44.152184  CPU_CLUSTER: 0 enabled

  851 10:27:44.152248  DOMAIN: 0000 scanning...

  852 10:27:44.200250  PCI: pci_scan_bus for bus 00

  853 10:27:44.200357  PCI: 00:00.0 [8086/0000] ops

  854 10:27:44.200926  PCI: 00:00.0 [8086/9a12] enabled

  855 10:27:44.201013  PCI: 00:02.0 [8086/0000] bus ops

  856 10:27:44.201571  PCI: 00:02.0 [8086/9a40] enabled

  857 10:27:44.201657  PCI: 00:04.0 [8086/0000] bus ops

  858 10:27:44.202323  PCI: 00:04.0 [8086/9a03] enabled

  859 10:27:44.202410  PCI: 00:05.0 [8086/9a19] enabled

  860 10:27:44.202671  PCI: 00:07.0 [0000/0000] hidden

  861 10:27:44.202764  PCI: 00:08.0 [8086/9a11] enabled

  862 10:27:44.202849  PCI: 00:0a.0 [8086/9a0d] disabled

  863 10:27:44.202914  PCI: 00:0d.0 [8086/0000] bus ops

  864 10:27:44.203159  PCI: 00:0d.0 [8086/9a13] enabled

  865 10:27:44.203225  PCI: 00:14.0 [8086/0000] bus ops

  866 10:27:44.203285  PCI: 00:14.0 [8086/a0ed] enabled

  867 10:27:44.240977  PCI: 00:14.2 [8086/a0ef] enabled

  868 10:27:44.241068  PCI: 00:14.3 [8086/0000] bus ops

  869 10:27:44.241327  PCI: 00:14.3 [8086/a0f0] enabled

  870 10:27:44.241401  PCI: 00:15.0 [8086/0000] bus ops

  871 10:27:44.241479  PCI: 00:15.0 [8086/a0e8] enabled

  872 10:27:44.241542  PCI: 00:15.1 [8086/0000] bus ops

  873 10:27:44.241788  PCI: 00:15.1 [8086/a0e9] enabled

  874 10:27:44.241858  PCI: 00:15.2 [8086/0000] bus ops

  875 10:27:44.242111  PCI: 00:15.2 [8086/a0ea] enabled

  876 10:27:44.242179  PCI: 00:15.3 [8086/0000] bus ops

  877 10:27:44.242426  PCI: 00:15.3 [8086/a0eb] enabled

  878 10:27:44.242493  PCI: 00:16.0 [8086/0000] ops

  879 10:27:44.244905  PCI: 00:16.0 [8086/a0e0] enabled

  880 10:27:44.248242  PCI: Static device PCI: 00:17.0 not found, disabling it.

  881 10:27:44.251607  PCI: 00:19.0 [8086/0000] bus ops

  882 10:27:44.254905  PCI: 00:19.0 [8086/a0c5] disabled

  883 10:27:44.258221  PCI: 00:19.1 [8086/0000] bus ops

  884 10:27:44.261666  PCI: 00:19.1 [8086/a0c6] enabled

  885 10:27:44.265087  PCI: 00:1d.0 [8086/0000] bus ops

  886 10:27:44.267777  PCI: 00:1d.0 [8086/a0b0] enabled

  887 10:27:44.271190  PCI: 00:1e.0 [8086/0000] ops

  888 10:27:44.274551  PCI: 00:1e.0 [8086/a0a8] enabled

  889 10:27:44.277924  PCI: 00:1e.2 [8086/0000] bus ops

  890 10:27:44.281262  PCI: 00:1e.2 [8086/a0aa] enabled

  891 10:27:44.284810  PCI: 00:1e.3 [8086/0000] bus ops

  892 10:27:44.288054  PCI: 00:1e.3 [8086/a0ab] enabled

  893 10:27:44.291343  PCI: 00:1f.0 [8086/0000] bus ops

  894 10:27:44.294088  PCI: 00:1f.0 [8086/a087] enabled

  895 10:27:44.294174  RTC Init

  896 10:27:44.297509  Set power on after power failure.

  897 10:27:44.300751  Disabling Deep S3

  898 10:27:44.300837  Disabling Deep S3

  899 10:27:44.304107  Disabling Deep S4

  900 10:27:44.307465  Disabling Deep S4

  901 10:27:44.307552  Disabling Deep S5

  902 10:27:44.310748  Disabling Deep S5

  903 10:27:44.314074  PCI: 00:1f.2 [0000/0000] hidden

  904 10:27:44.317540  PCI: 00:1f.3 [8086/0000] bus ops

  905 10:27:44.320868  PCI: 00:1f.3 [8086/a0c8] enabled

  906 10:27:44.324268  PCI: 00:1f.5 [8086/0000] bus ops

  907 10:27:44.327695  PCI: 00:1f.5 [8086/a0a4] enabled

  908 10:27:44.331062  PCI: Leftover static devices:

  909 10:27:44.331148  PCI: 00:10.2

  910 10:27:44.331216  PCI: 00:10.6

  911 10:27:44.334513  PCI: 00:10.7

  912 10:27:44.334600  PCI: 00:06.0

  913 10:27:44.337239  PCI: 00:07.1

  914 10:27:44.337326  PCI: 00:07.2

  915 10:27:44.340578  PCI: 00:07.3

  916 10:27:44.340664  PCI: 00:09.0

  917 10:27:44.340733  PCI: 00:0d.1

  918 10:27:44.344056  PCI: 00:0d.2

  919 10:27:44.344143  PCI: 00:0d.3

  920 10:27:44.347274  PCI: 00:0e.0

  921 10:27:44.347361  PCI: 00:12.0

  922 10:27:44.347429  PCI: 00:12.6

  923 10:27:44.350514  PCI: 00:13.0

  924 10:27:44.350601  PCI: 00:14.1

  925 10:27:44.353915  PCI: 00:16.1

  926 10:27:44.354002  PCI: 00:16.2

  927 10:27:44.357185  PCI: 00:16.3

  928 10:27:44.357271  PCI: 00:16.4

  929 10:27:44.357339  PCI: 00:16.5

  930 10:27:44.360633  PCI: 00:17.0

  931 10:27:44.360720  PCI: 00:19.2

  932 10:27:44.364001  PCI: 00:1e.1

  933 10:27:44.364088  PCI: 00:1f.1

  934 10:27:44.364156  PCI: 00:1f.4

  935 10:27:44.367355  PCI: 00:1f.6

  936 10:27:44.367442  PCI: 00:1f.7

  937 10:27:44.370738  PCI: Check your devicetree.cb.

  938 10:27:44.374210  PCI: 00:02.0 scanning...

  939 10:27:44.377017  scan_generic_bus for PCI: 00:02.0

  940 10:27:44.380284  scan_generic_bus for PCI: 00:02.0 done

  941 10:27:44.387088  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  942 10:27:44.387176  PCI: 00:04.0 scanning...

  943 10:27:44.393735  scan_generic_bus for PCI: 00:04.0

  944 10:27:44.393823  GENERIC: 0.0 enabled

  945 10:27:44.400544  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  946 10:27:44.403892  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  947 10:27:44.406687  PCI: 00:0d.0 scanning...

  948 10:27:44.410038  scan_static_bus for PCI: 00:0d.0

  949 10:27:44.413923  USB0 port 0 enabled

  950 10:27:44.416614  USB0 port 0 scanning...

  951 10:27:44.419949  scan_static_bus for USB0 port 0

  952 10:27:44.420051  USB3 port 0 enabled

  953 10:27:44.423343  USB3 port 1 enabled

  954 10:27:44.426826  USB3 port 2 disabled

  955 10:27:44.426912  USB3 port 3 disabled

  956 10:27:44.430169  USB3 port 0 scanning...

  957 10:27:44.433587  scan_static_bus for USB3 port 0

  958 10:27:44.436891  scan_static_bus for USB3 port 0 done

  959 10:27:44.442917  scan_bus: bus USB3 port 0 finished in 6 msecs

  960 10:27:44.443000  USB3 port 1 scanning...

  961 10:27:44.446266  scan_static_bus for USB3 port 1

  962 10:27:44.449533  scan_static_bus for USB3 port 1 done

  963 10:27:44.456129  scan_bus: bus USB3 port 1 finished in 6 msecs

  964 10:27:44.459513  scan_static_bus for USB0 port 0 done

  965 10:27:44.462846  scan_bus: bus USB0 port 0 finished in 43 msecs

  966 10:27:44.469517  scan_static_bus for PCI: 00:0d.0 done

  967 10:27:44.472895  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  968 10:27:44.476214  PCI: 00:14.0 scanning...

  969 10:27:44.479537  scan_static_bus for PCI: 00:14.0

  970 10:27:44.479625  USB0 port 0 enabled

  971 10:27:44.483027  USB0 port 0 scanning...

  972 10:27:44.486266  scan_static_bus for USB0 port 0

  973 10:27:44.489660  USB2 port 0 disabled

  974 10:27:44.489742  USB2 port 1 enabled

  975 10:27:44.492987  USB2 port 2 enabled

  976 10:27:44.496392  USB2 port 3 disabled

  977 10:27:44.496483  USB2 port 4 enabled

  978 10:27:44.499658  USB2 port 5 disabled

  979 10:27:44.502520  USB2 port 6 disabled

  980 10:27:44.502598  USB2 port 7 disabled

  981 10:27:44.505830  USB2 port 8 disabled

  982 10:27:44.509172  USB2 port 9 disabled

  983 10:27:44.509253  USB3 port 0 disabled

  984 10:27:44.512618  USB3 port 1 enabled

  985 10:27:44.516068  USB3 port 2 disabled

  986 10:27:44.516148  USB3 port 3 disabled

  987 10:27:44.519505  USB2 port 1 scanning...

  988 10:27:44.522909  scan_static_bus for USB2 port 1

  989 10:27:44.525630  scan_static_bus for USB2 port 1 done

  990 10:27:44.529121  scan_bus: bus USB2 port 1 finished in 6 msecs

  991 10:27:44.532685  USB2 port 2 scanning...

  992 10:27:44.536038  scan_static_bus for USB2 port 2

  993 10:27:44.539537  scan_static_bus for USB2 port 2 done

  994 10:27:44.545402  scan_bus: bus USB2 port 2 finished in 6 msecs

  995 10:27:44.548940  USB2 port 4 scanning...

  996 10:27:44.552126  scan_static_bus for USB2 port 4

  997 10:27:44.555481  scan_static_bus for USB2 port 4 done

  998 10:27:44.558815  scan_bus: bus USB2 port 4 finished in 6 msecs

  999 10:27:44.562236  USB3 port 1 scanning...

 1000 10:27:44.565672  scan_static_bus for USB3 port 1

 1001 10:27:44.569043  scan_static_bus for USB3 port 1 done

 1002 10:27:44.572423  scan_bus: bus USB3 port 1 finished in 6 msecs

 1003 10:27:44.575294  scan_static_bus for USB0 port 0 done

 1004 10:27:44.581996  scan_bus: bus USB0 port 0 finished in 93 msecs

 1005 10:27:44.585295  scan_static_bus for PCI: 00:14.0 done

 1006 10:27:44.591909  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

 1007 10:27:44.592027  PCI: 00:14.3 scanning...

 1008 10:27:44.595322  scan_static_bus for PCI: 00:14.3

 1009 10:27:44.598819  GENERIC: 0.0 enabled

 1010 10:27:44.602140  scan_static_bus for PCI: 00:14.3 done

 1011 10:27:44.608913  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1012 10:27:44.609002  PCI: 00:15.0 scanning...

 1013 10:27:44.612213  scan_static_bus for PCI: 00:15.0

 1014 10:27:44.615574  I2C: 00:1a enabled

 1015 10:27:44.618292  I2C: 00:31 enabled

 1016 10:27:44.618378  I2C: 00:32 enabled

 1017 10:27:44.621543  scan_static_bus for PCI: 00:15.0 done

 1018 10:27:44.628364  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1019 10:27:44.631689  PCI: 00:15.1 scanning...

 1020 10:27:44.635105  scan_static_bus for PCI: 00:15.1

 1021 10:27:44.635192  I2C: 00:10 enabled

 1022 10:27:44.638489  scan_static_bus for PCI: 00:15.1 done

 1023 10:27:44.645289  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1024 10:27:44.648054  PCI: 00:15.2 scanning...

 1025 10:27:44.651433  scan_static_bus for PCI: 00:15.2

 1026 10:27:44.654671  scan_static_bus for PCI: 00:15.2 done

 1027 10:27:44.657910  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1028 10:27:44.661246  PCI: 00:15.3 scanning...

 1029 10:27:44.664605  scan_static_bus for PCI: 00:15.3

 1030 10:27:44.668054  scan_static_bus for PCI: 00:15.3 done

 1031 10:27:44.674820  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1032 10:27:44.674904  PCI: 00:19.1 scanning...

 1033 10:27:44.678144  scan_static_bus for PCI: 00:19.1

 1034 10:27:44.681594  I2C: 00:15 enabled

 1035 10:27:44.684381  scan_static_bus for PCI: 00:19.1 done

 1036 10:27:44.691140  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1037 10:27:44.691221  PCI: 00:1d.0 scanning...

 1038 10:27:44.697886  do_pci_scan_bridge for PCI: 00:1d.0

 1039 10:27:44.697976  PCI: pci_scan_bus for bus 01

 1040 10:27:44.701202  PCI: 01:00.0 [15b7/5009] enabled

 1041 10:27:44.704663  GENERIC: 0.0 enabled

 1042 10:27:44.708005  Enabling Common Clock Configuration

 1043 10:27:44.714114  L1 Sub-State supported from root port 29

 1044 10:27:44.714202  L1 Sub-State Support = 0x5

 1045 10:27:44.717513  CommonModeRestoreTime = 0x28

 1046 10:27:44.724185  Power On Value = 0x16, Power On Scale = 0x0

 1047 10:27:44.724267  ASPM: Enabled L1

 1048 10:27:44.727609  PCIe: Max_Payload_Size adjusted to 128

 1049 10:27:44.734570  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1050 10:27:44.734653  PCI: 00:1e.2 scanning...

 1051 10:27:44.738651  scan_generic_bus for PCI: 00:1e.2

 1052 10:27:44.742128  SPI: 00 enabled

 1053 10:27:44.748305  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1054 10:27:44.751629  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1055 10:27:44.755085  PCI: 00:1e.3 scanning...

 1056 10:27:44.758455  scan_generic_bus for PCI: 00:1e.3

 1057 10:27:44.758552  SPI: 00 enabled

 1058 10:27:44.765049  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1059 10:27:44.771972  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1060 10:27:44.774694  PCI: 00:1f.0 scanning...

 1061 10:27:44.777989  scan_static_bus for PCI: 00:1f.0

 1062 10:27:44.778080  PNP: 0c09.0 enabled

 1063 10:27:44.781270  PNP: 0c09.0 scanning...

 1064 10:27:44.784535  scan_static_bus for PNP: 0c09.0

 1065 10:27:44.787837  scan_static_bus for PNP: 0c09.0 done

 1066 10:27:44.794555  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1067 10:27:44.797913  scan_static_bus for PCI: 00:1f.0 done

 1068 10:27:44.801172  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1069 10:27:44.804551  PCI: 00:1f.2 scanning...

 1070 10:27:44.807970  scan_static_bus for PCI: 00:1f.2

 1071 10:27:44.811255  GENERIC: 0.0 enabled

 1072 10:27:44.811344  GENERIC: 0.0 scanning...

 1073 10:27:44.814585  scan_static_bus for GENERIC: 0.0

 1074 10:27:44.817973  GENERIC: 0.0 enabled

 1075 10:27:44.821342  GENERIC: 1.0 enabled

 1076 10:27:44.824082  scan_static_bus for GENERIC: 0.0 done

 1077 10:27:44.827590  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1078 10:27:44.834225  scan_static_bus for PCI: 00:1f.2 done

 1079 10:27:44.837693  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1080 10:27:44.841086  PCI: 00:1f.3 scanning...

 1081 10:27:44.844511  scan_static_bus for PCI: 00:1f.3

 1082 10:27:44.847829  scan_static_bus for PCI: 00:1f.3 done

 1083 10:27:44.851193  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1084 10:27:44.853917  PCI: 00:1f.5 scanning...

 1085 10:27:44.857210  scan_generic_bus for PCI: 00:1f.5

 1086 10:27:44.860612  scan_generic_bus for PCI: 00:1f.5 done

 1087 10:27:44.867375  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1088 10:27:44.870684  scan_bus: bus DOMAIN: 0000 finished in 716 msecs

 1089 10:27:44.874074  scan_static_bus for Root Device done

 1090 10:27:44.880750  scan_bus: bus Root Device finished in 735 msecs

 1091 10:27:44.880844  done

 1092 10:27:44.887498  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms

 1093 10:27:44.890849  Chrome EC: UHEPI supported

 1094 10:27:44.896847  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1095 10:27:44.904143  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1096 10:27:44.906881  SPI flash protection: WPSW=0 SRP0=1

 1097 10:27:44.910273  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1098 10:27:44.917053  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1099 10:27:44.920481  found VGA at PCI: 00:02.0

 1100 10:27:44.923879  Setting up VGA for PCI: 00:02.0

 1101 10:27:44.927258  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1102 10:27:44.933427  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1103 10:27:44.936861  Allocating resources...

 1104 10:27:44.936947  Reading resources...

 1105 10:27:44.943615  Root Device read_resources bus 0 link: 0

 1106 10:27:44.946916  DOMAIN: 0000 read_resources bus 0 link: 0

 1107 10:27:44.950269  PCI: 00:04.0 read_resources bus 1 link: 0

 1108 10:27:44.956944  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1109 10:27:44.960353  PCI: 00:0d.0 read_resources bus 0 link: 0

 1110 10:27:44.966964  USB0 port 0 read_resources bus 0 link: 0

 1111 10:27:44.970394  USB0 port 0 read_resources bus 0 link: 0 done

 1112 10:27:44.977033  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1113 10:27:44.979786  PCI: 00:14.0 read_resources bus 0 link: 0

 1114 10:27:44.986455  USB0 port 0 read_resources bus 0 link: 0

 1115 10:27:44.989921  USB0 port 0 read_resources bus 0 link: 0 done

 1116 10:27:44.996681  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1117 10:27:45.000044  PCI: 00:14.3 read_resources bus 0 link: 0

 1118 10:27:45.006688  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1119 10:27:45.010144  PCI: 00:15.0 read_resources bus 0 link: 0

 1120 10:27:45.016284  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1121 10:27:45.019650  PCI: 00:15.1 read_resources bus 0 link: 0

 1122 10:27:45.026479  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1123 10:27:45.029827  PCI: 00:19.1 read_resources bus 0 link: 0

 1124 10:27:45.036706  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1125 10:27:45.039479  PCI: 00:1d.0 read_resources bus 1 link: 0

 1126 10:27:45.046288  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1127 10:27:45.049559  PCI: 00:1e.2 read_resources bus 2 link: 0

 1128 10:27:45.056247  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1129 10:27:45.059622  PCI: 00:1e.3 read_resources bus 3 link: 0

 1130 10:27:45.066437  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1131 10:27:45.069794  PCI: 00:1f.0 read_resources bus 0 link: 0

 1132 10:27:45.076015  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1133 10:27:45.079250  PCI: 00:1f.2 read_resources bus 0 link: 0

 1134 10:27:45.082682  GENERIC: 0.0 read_resources bus 0 link: 0

 1135 10:27:45.090078  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1136 10:27:45.093458  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1137 10:27:45.100286  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1138 10:27:45.103559  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1139 10:27:45.110339  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1140 10:27:45.113786  Root Device read_resources bus 0 link: 0 done

 1141 10:27:45.117149  Done reading resources.

 1142 10:27:45.123854  Show resources in subtree (Root Device)...After reading.

 1143 10:27:45.126602   Root Device child on link 0 DOMAIN: 0000

 1144 10:27:45.129930    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1145 10:27:45.140139    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1146 10:27:45.150347    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1147 10:27:45.153258     PCI: 00:00.0

 1148 10:27:45.163431     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1149 10:27:45.169590     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1150 10:27:45.179596     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1151 10:27:45.189705     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1152 10:27:45.199817     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1153 10:27:45.209868     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1154 10:27:45.219436     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1155 10:27:45.226089     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1156 10:27:45.236272     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1157 10:27:45.245841     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1158 10:27:45.256054     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1159 10:27:45.266079     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1160 10:27:45.276060     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1161 10:27:45.282262     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1162 10:27:45.292434     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1163 10:27:45.302642     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1164 10:27:45.312639     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1165 10:27:45.322158     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1166 10:27:45.332172     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1167 10:27:45.338914     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1168 10:27:45.342493     PCI: 00:02.0

 1169 10:27:45.351880     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1170 10:27:45.362047     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1171 10:27:45.372104     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1172 10:27:45.375477     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1173 10:27:45.385635     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1174 10:27:45.389087      GENERIC: 0.0

 1175 10:27:45.389175     PCI: 00:05.0

 1176 10:27:45.398367     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1177 10:27:45.405170     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1178 10:27:45.405259      GENERIC: 0.0

 1179 10:27:45.408486     PCI: 00:08.0

 1180 10:27:45.418519     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1181 10:27:45.418604     PCI: 00:0a.0

 1182 10:27:45.421916     PCI: 00:0d.0 child on link 0 USB0 port 0

 1183 10:27:45.431997     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1184 10:27:45.438729      USB0 port 0 child on link 0 USB3 port 0

 1185 10:27:45.438811       USB3 port 0

 1186 10:27:45.441505       USB3 port 1

 1187 10:27:45.441586       USB3 port 2

 1188 10:27:45.444906       USB3 port 3

 1189 10:27:45.448241     PCI: 00:14.0 child on link 0 USB0 port 0

 1190 10:27:45.458265     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1191 10:27:45.465027      USB0 port 0 child on link 0 USB2 port 0

 1192 10:27:45.465106       USB2 port 0

 1193 10:27:45.468399       USB2 port 1

 1194 10:27:45.468477       USB2 port 2

 1195 10:27:45.471831       USB2 port 3

 1196 10:27:45.471952       USB2 port 4

 1197 10:27:45.474600       USB2 port 5

 1198 10:27:45.474676       USB2 port 6

 1199 10:27:45.478483       USB2 port 7

 1200 10:27:45.478564       USB2 port 8

 1201 10:27:45.481212       USB2 port 9

 1202 10:27:45.481285       USB3 port 0

 1203 10:27:45.484559       USB3 port 1

 1204 10:27:45.488057       USB3 port 2

 1205 10:27:45.488134       USB3 port 3

 1206 10:27:45.491322     PCI: 00:14.2

 1207 10:27:45.501567     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1208 10:27:45.510940     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1209 10:27:45.514258     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1210 10:27:45.524623     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1211 10:27:45.527846      GENERIC: 0.0

 1212 10:27:45.531282     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1213 10:27:45.540809     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1214 10:27:45.540894      I2C: 00:1a

 1215 10:27:45.544302      I2C: 00:31

 1216 10:27:45.544379      I2C: 00:32

 1217 10:27:45.551042     PCI: 00:15.1 child on link 0 I2C: 00:10

 1218 10:27:45.560533     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 10:27:45.560613      I2C: 00:10

 1220 10:27:45.563983     PCI: 00:15.2

 1221 10:27:45.574155     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1222 10:27:45.574241     PCI: 00:15.3

 1223 10:27:45.584245     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1224 10:27:45.586993     PCI: 00:16.0

 1225 10:27:45.597135     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1226 10:27:45.597223     PCI: 00:19.0

 1227 10:27:45.600633     PCI: 00:19.1 child on link 0 I2C: 00:15

 1228 10:27:45.610631     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 10:27:45.613396      I2C: 00:15

 1230 10:27:45.617237     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1231 10:27:45.626842     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1232 10:27:45.637022     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1233 10:27:45.646626     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1234 10:27:45.646709      GENERIC: 0.0

 1235 10:27:45.649917      PCI: 01:00.0

 1236 10:27:45.660251      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1237 10:27:45.670286      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1238 10:27:45.670381     PCI: 00:1e.0

 1239 10:27:45.679888     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1240 10:27:45.686640     PCI: 00:1e.2 child on link 0 SPI: 00

 1241 10:27:45.696850     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1242 10:27:45.696938      SPI: 00

 1243 10:27:45.700237     PCI: 00:1e.3 child on link 0 SPI: 00

 1244 10:27:45.709733     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1245 10:27:45.713141      SPI: 00

 1246 10:27:45.716505     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1247 10:27:45.726565     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1248 10:27:45.726654      PNP: 0c09.0

 1249 10:27:45.736725      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1250 10:27:45.739622     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1251 10:27:45.749809     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1252 10:27:45.760094     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1253 10:27:45.762807      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1254 10:27:45.766135       GENERIC: 0.0

 1255 10:27:45.766221       GENERIC: 1.0

 1256 10:27:45.769351     PCI: 00:1f.3

 1257 10:27:45.779586     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1258 10:27:45.789158     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1259 10:27:45.789248     PCI: 00:1f.5

 1260 10:27:45.799286     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1261 10:27:45.802506    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1262 10:27:45.805898     APIC: 00

 1263 10:27:45.805984     APIC: 01

 1264 10:27:45.806059     APIC: 05

 1265 10:27:45.809270     APIC: 07

 1266 10:27:45.809344     APIC: 02

 1267 10:27:45.812599     APIC: 04

 1268 10:27:45.812673     APIC: 06

 1269 10:27:45.812741     APIC: 03

 1270 10:27:45.822635  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1271 10:27:45.826114   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1272 10:27:45.832250   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1273 10:27:45.839066   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1274 10:27:45.842467    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1275 10:27:45.848573    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1276 10:27:45.855320   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1277 10:27:45.862191   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1278 10:27:45.868823   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1279 10:27:45.878971  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1280 10:27:45.882272  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1281 10:27:45.892354   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1282 10:27:45.898416   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1283 10:27:45.905050   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1284 10:27:45.908358   DOMAIN: 0000: Resource ranges:

 1285 10:27:45.911680   * Base: 1000, Size: 800, Tag: 100

 1286 10:27:45.915123   * Base: 1900, Size: e700, Tag: 100

 1287 10:27:45.921892    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1288 10:27:45.928570  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1289 10:27:45.935479  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1290 10:27:45.941653   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1291 10:27:45.951765   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1292 10:27:45.958637   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1293 10:27:45.964828   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1294 10:27:45.974909   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1295 10:27:45.981607   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1296 10:27:45.988249   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1297 10:27:45.998194   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1298 10:27:46.004941   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1299 10:27:46.011058   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1300 10:27:46.021377   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1301 10:27:46.027885   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1302 10:27:46.034682   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1303 10:27:46.044101   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1304 10:27:46.050947   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1305 10:27:46.057718   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1306 10:27:46.067208   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)

 1307 10:27:46.074089   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1308 10:27:46.080807   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1309 10:27:46.090932   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1310 10:27:46.097619   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1311 10:27:46.103840   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1312 10:27:46.107137   DOMAIN: 0000: Resource ranges:

 1313 10:27:46.113865   * Base: 7fc00000, Size: 40400000, Tag: 200

 1314 10:27:46.117240   * Base: d0000000, Size: 28000000, Tag: 200

 1315 10:27:46.120532   * Base: fa000000, Size: 1000000, Tag: 200

 1316 10:27:46.127131   * Base: fb001000, Size: 2fff000, Tag: 200

 1317 10:27:46.130528   * Base: fe010000, Size: 2e000, Tag: 200

 1318 10:27:46.133913   * Base: fe03f000, Size: d41000, Tag: 200

 1319 10:27:46.137284   * Base: fed88000, Size: 8000, Tag: 200

 1320 10:27:46.140716   * Base: fed93000, Size: d000, Tag: 200

 1321 10:27:46.146748   * Base: feda2000, Size: 1e000, Tag: 200

 1322 10:27:46.149973   * Base: fede0000, Size: 1220000, Tag: 200

 1323 10:27:46.153313   * Base: 480400000, Size: 7b7fc00000, Tag: 100200

 1324 10:27:46.163663    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1325 10:27:46.169862    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1326 10:27:46.176649    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1327 10:27:46.183412    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1328 10:27:46.190187    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1329 10:27:46.196995    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1330 10:27:46.203078    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1331 10:27:46.209623    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1332 10:27:46.216891    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1333 10:27:46.223122    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1334 10:27:46.229914    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1335 10:27:46.236720    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1336 10:27:46.242897    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1337 10:27:46.249715    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1338 10:27:46.256518    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1339 10:27:46.263314    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1340 10:27:46.269530    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1341 10:27:46.276465    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1342 10:27:46.283281    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1343 10:27:46.289240    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1344 10:27:46.295847    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1345 10:27:46.302706    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1346 10:27:46.309473  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1347 10:27:46.316266  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1348 10:27:46.319632   PCI: 00:1d.0: Resource ranges:

 1349 10:27:46.322897   * Base: 7fc00000, Size: 100000, Tag: 200

 1350 10:27:46.328922    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1351 10:27:46.335771    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem

 1352 10:27:46.346028  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1353 10:27:46.352152  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1354 10:27:46.359045  Root Device assign_resources, bus 0 link: 0

 1355 10:27:46.362469  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1356 10:27:46.371965  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1357 10:27:46.378739  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1358 10:27:46.385461  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1359 10:27:46.395699  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1360 10:27:46.399021  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1361 10:27:46.405065  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1362 10:27:46.411813  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1363 10:27:46.421998  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1364 10:27:46.428870  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1365 10:27:46.431566  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1366 10:27:46.438224  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1367 10:27:46.445121  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1368 10:27:46.451249  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1369 10:27:46.454659  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1370 10:27:46.464598  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1371 10:27:46.471480  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1372 10:27:46.481132  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1373 10:27:46.484441  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1374 10:27:46.488021  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1375 10:27:46.497636  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1376 10:27:46.500701  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1377 10:27:46.507549  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1378 10:27:46.514263  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1379 10:27:46.520911  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1380 10:27:46.523669  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1381 10:27:46.533822  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1382 10:27:46.540512  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1383 10:27:46.550102  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1384 10:27:46.556905  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1385 10:27:46.560388  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1386 10:27:46.566523  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1387 10:27:46.573456  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1388 10:27:46.583013  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1389 10:27:46.593272  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1390 10:27:46.596613  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1391 10:27:46.606252  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1392 10:27:46.613122  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64

 1393 10:27:46.619786  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1394 10:27:46.626067  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1395 10:27:46.632758  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1396 10:27:46.636083  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1397 10:27:46.646485  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1398 10:27:46.649169  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1399 10:27:46.652464  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1400 10:27:46.659309  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1401 10:27:46.662665  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1402 10:27:46.669478  LPC: Trying to open IO window from 800 size 1ff

 1403 10:27:46.675616  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1404 10:27:46.686102  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1405 10:27:46.692060  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1406 10:27:46.698696  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1407 10:27:46.702249  Root Device assign_resources, bus 0 link: 0

 1408 10:27:46.705534  Done setting resources.

 1409 10:27:46.712332  Show resources in subtree (Root Device)...After assigning values.

 1410 10:27:46.715709   Root Device child on link 0 DOMAIN: 0000

 1411 10:27:46.718998    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1412 10:27:46.728599    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1413 10:27:46.738587    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1414 10:27:46.741597     PCI: 00:00.0

 1415 10:27:46.748528     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1416 10:27:46.758760     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1417 10:27:46.768644     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1418 10:27:46.778186     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1419 10:27:46.788183     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1420 10:27:46.798313     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1421 10:27:46.805009     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1422 10:27:46.815131     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1423 10:27:46.825074     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1424 10:27:46.834485     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1425 10:27:46.844556     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1426 10:27:46.854965     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1427 10:27:46.861136     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1428 10:27:46.871207     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1429 10:27:46.881518     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1430 10:27:46.891016     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1431 10:27:46.901148     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1432 10:27:46.911297     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1433 10:27:46.918047     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1434 10:27:46.928055     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1435 10:27:46.930735     PCI: 00:02.0

 1436 10:27:46.940726     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1437 10:27:46.950997     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1438 10:27:46.960945     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1439 10:27:46.964327     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1440 10:27:46.977169     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1441 10:27:46.977264      GENERIC: 0.0

 1442 10:27:46.980576     PCI: 00:05.0

 1443 10:27:46.990758     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1444 10:27:46.994112     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1445 10:27:46.997501      GENERIC: 0.0

 1446 10:27:46.997582     PCI: 00:08.0

 1447 10:27:47.007139     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1448 10:27:47.010493     PCI: 00:0a.0

 1449 10:27:47.013896     PCI: 00:0d.0 child on link 0 USB0 port 0

 1450 10:27:47.023920     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1451 10:27:47.030750      USB0 port 0 child on link 0 USB3 port 0

 1452 10:27:47.030833       USB3 port 0

 1453 10:27:47.033404       USB3 port 1

 1454 10:27:47.033496       USB3 port 2

 1455 10:27:47.036769       USB3 port 3

 1456 10:27:47.040199     PCI: 00:14.0 child on link 0 USB0 port 0

 1457 10:27:47.050230     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1458 10:27:47.056933      USB0 port 0 child on link 0 USB2 port 0

 1459 10:27:47.057029       USB2 port 0

 1460 10:27:47.060310       USB2 port 1

 1461 10:27:47.060405       USB2 port 2

 1462 10:27:47.063673       USB2 port 3

 1463 10:27:47.063746       USB2 port 4

 1464 10:27:47.067056       USB2 port 5

 1465 10:27:47.067130       USB2 port 6

 1466 10:27:47.069822       USB2 port 7

 1467 10:27:47.069902       USB2 port 8

 1468 10:27:47.073077       USB2 port 9

 1469 10:27:47.073163       USB3 port 0

 1470 10:27:47.076564       USB3 port 1

 1471 10:27:47.076645       USB3 port 2

 1472 10:27:47.079810       USB3 port 3

 1473 10:27:47.079889     PCI: 00:14.2

 1474 10:27:47.093489     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1475 10:27:47.102900     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1476 10:27:47.106241     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1477 10:27:47.116305     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1478 10:27:47.119586      GENERIC: 0.0

 1479 10:27:47.122960     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1480 10:27:47.133019     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1481 10:27:47.136389      I2C: 00:1a

 1482 10:27:47.136468      I2C: 00:31

 1483 10:27:47.139800      I2C: 00:32

 1484 10:27:47.142536     PCI: 00:15.1 child on link 0 I2C: 00:10

 1485 10:27:47.152645     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1486 10:27:47.152743      I2C: 00:10

 1487 10:27:47.155971     PCI: 00:15.2

 1488 10:27:47.166260     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1489 10:27:47.168934     PCI: 00:15.3

 1490 10:27:47.178912     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1491 10:27:47.179004     PCI: 00:16.0

 1492 10:27:47.189210     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1493 10:27:47.192669     PCI: 00:19.0

 1494 10:27:47.195975     PCI: 00:19.1 child on link 0 I2C: 00:15

 1495 10:27:47.206028     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1496 10:27:47.208793      I2C: 00:15

 1497 10:27:47.212262     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1498 10:27:47.222234     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1499 10:27:47.232398     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1500 10:27:47.245189     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1501 10:27:47.245276      GENERIC: 0.0

 1502 10:27:47.248550      PCI: 01:00.0

 1503 10:27:47.258743      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1504 10:27:47.268815      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20

 1505 10:27:47.268896     PCI: 00:1e.0

 1506 10:27:47.281711     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1507 10:27:47.285130     PCI: 00:1e.2 child on link 0 SPI: 00

 1508 10:27:47.295477     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1509 10:27:47.295563      SPI: 00

 1510 10:27:47.302158     PCI: 00:1e.3 child on link 0 SPI: 00

 1511 10:27:47.312216     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1512 10:27:47.312299      SPI: 00

 1513 10:27:47.315509     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1514 10:27:47.325619     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1515 10:27:47.328272      PNP: 0c09.0

 1516 10:27:47.335042      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1517 10:27:47.341864     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1518 10:27:47.348549     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1519 10:27:47.357955     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1520 10:27:47.364778      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1521 10:27:47.364868       GENERIC: 0.0

 1522 10:27:47.368043       GENERIC: 1.0

 1523 10:27:47.368131     PCI: 00:1f.3

 1524 10:27:47.378161     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1525 10:27:47.388328     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1526 10:27:47.391708     PCI: 00:1f.5

 1527 10:27:47.401158     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1528 10:27:47.404531    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1529 10:27:47.407845     APIC: 00

 1530 10:27:47.407971     APIC: 01

 1531 10:27:47.411261     APIC: 05

 1532 10:27:47.411349     APIC: 07

 1533 10:27:47.411436     APIC: 02

 1534 10:27:47.414600     APIC: 04

 1535 10:27:47.414688     APIC: 06

 1536 10:27:47.414775     APIC: 03

 1537 10:27:47.417952  Done allocating resources.

 1538 10:27:47.424521  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms

 1539 10:27:47.430781  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1540 10:27:47.434122  Configure GPIOs for I2S audio on UP4.

 1541 10:27:47.440925  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1542 10:27:47.444277  Enabling resources...

 1543 10:27:47.447662  PCI: 00:00.0 subsystem <- 8086/9a12

 1544 10:27:47.451055  PCI: 00:00.0 cmd <- 06

 1545 10:27:47.454302  PCI: 00:02.0 subsystem <- 8086/9a40

 1546 10:27:47.457643  PCI: 00:02.0 cmd <- 03

 1547 10:27:47.460962  PCI: 00:04.0 subsystem <- 8086/9a03

 1548 10:27:47.464333  PCI: 00:04.0 cmd <- 02

 1549 10:27:47.467662  PCI: 00:05.0 subsystem <- 8086/9a19

 1550 10:27:47.467741  PCI: 00:05.0 cmd <- 02

 1551 10:27:47.474300  PCI: 00:08.0 subsystem <- 8086/9a11

 1552 10:27:47.474386  PCI: 00:08.0 cmd <- 06

 1553 10:27:47.477748  PCI: 00:0d.0 subsystem <- 8086/9a13

 1554 10:27:47.480573  PCI: 00:0d.0 cmd <- 02

 1555 10:27:47.483885  PCI: 00:14.0 subsystem <- 8086/a0ed

 1556 10:27:47.487176  PCI: 00:14.0 cmd <- 02

 1557 10:27:47.490526  PCI: 00:14.2 subsystem <- 8086/a0ef

 1558 10:27:47.493930  PCI: 00:14.2 cmd <- 02

 1559 10:27:47.497386  PCI: 00:14.3 subsystem <- 8086/a0f0

 1560 10:27:47.500150  PCI: 00:14.3 cmd <- 02

 1561 10:27:47.503554  PCI: 00:15.0 subsystem <- 8086/a0e8

 1562 10:27:47.506796  PCI: 00:15.0 cmd <- 02

 1563 10:27:47.510271  PCI: 00:15.1 subsystem <- 8086/a0e9

 1564 10:27:47.513636  PCI: 00:15.1 cmd <- 02

 1565 10:27:47.517067  PCI: 00:15.2 subsystem <- 8086/a0ea

 1566 10:27:47.517162  PCI: 00:15.2 cmd <- 02

 1567 10:27:47.523773  PCI: 00:15.3 subsystem <- 8086/a0eb

 1568 10:27:47.523873  PCI: 00:15.3 cmd <- 02

 1569 10:27:47.527106  PCI: 00:16.0 subsystem <- 8086/a0e0

 1570 10:27:47.530553  PCI: 00:16.0 cmd <- 02

 1571 10:27:47.533942  PCI: 00:19.1 subsystem <- 8086/a0c6

 1572 10:27:47.537121  PCI: 00:19.1 cmd <- 02

 1573 10:27:47.539834  PCI: 00:1d.0 bridge ctrl <- 0013

 1574 10:27:47.543284  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1575 10:27:47.546582  PCI: 00:1d.0 cmd <- 06

 1576 10:27:47.549913  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1577 10:27:47.553302  PCI: 00:1e.0 cmd <- 06

 1578 10:27:47.556653  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1579 10:27:47.560060  PCI: 00:1e.2 cmd <- 06

 1580 10:27:47.563476  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1581 10:27:47.566207  PCI: 00:1e.3 cmd <- 02

 1582 10:27:47.569618  PCI: 00:1f.0 subsystem <- 8086/a087

 1583 10:27:47.569705  PCI: 00:1f.0 cmd <- 407

 1584 10:27:47.576985  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1585 10:27:47.577108  PCI: 00:1f.3 cmd <- 02

 1586 10:27:47.579723  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1587 10:27:47.583115  PCI: 00:1f.5 cmd <- 406

 1588 10:27:47.587973  PCI: 01:00.0 cmd <- 02

 1589 10:27:47.592591  done.

 1590 10:27:47.596061  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1591 10:27:47.599462  Initializing devices...

 1592 10:27:47.602179  Root Device init

 1593 10:27:47.605410  Chrome EC: Set SMI mask to 0x0000000000000000

 1594 10:27:47.612785  Chrome EC: clear events_b mask to 0x0000000000000000

 1595 10:27:47.619487  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1596 10:27:47.625962  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1597 10:27:47.632281  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1598 10:27:47.635690  Chrome EC: Set WAKE mask to 0x0000000000000000

 1599 10:27:47.643773  fw_config match found: DB_USB=USB3_ACTIVE

 1600 10:27:47.647167  Configure Right Type-C port orientation for retimer

 1601 10:27:47.649962  Root Device init finished in 46 msecs

 1602 10:27:47.654065  PCI: 00:00.0 init

 1603 10:27:47.657466  CPU TDP = 9 Watts

 1604 10:27:47.657556  CPU PL1 = 9 Watts

 1605 10:27:47.660826  CPU PL2 = 40 Watts

 1606 10:27:47.664213  CPU PL4 = 83 Watts

 1607 10:27:47.667581  PCI: 00:00.0 init finished in 8 msecs

 1608 10:27:47.667664  PCI: 00:02.0 init

 1609 10:27:47.670980  GMA: Found VBT in CBFS

 1610 10:27:47.674406  GMA: Found valid VBT in CBFS

 1611 10:27:47.680527  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1612 10:27:47.687319                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1613 10:27:47.690655  PCI: 00:02.0 init finished in 18 msecs

 1614 10:27:47.694048  PCI: 00:05.0 init

 1615 10:27:47.697544  PCI: 00:05.0 init finished in 0 msecs

 1616 10:27:47.700902  PCI: 00:08.0 init

 1617 10:27:47.703608  PCI: 00:08.0 init finished in 0 msecs

 1618 10:27:47.706866  PCI: 00:14.0 init

 1619 10:27:47.710138  PCI: 00:14.0 init finished in 0 msecs

 1620 10:27:47.713604  PCI: 00:14.2 init

 1621 10:27:47.716959  PCI: 00:14.2 init finished in 0 msecs

 1622 10:27:47.720399  PCI: 00:15.0 init

 1623 10:27:47.723706  I2C bus 0 version 0x3230302a

 1624 10:27:47.727003  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1625 10:27:47.730586  PCI: 00:15.0 init finished in 6 msecs

 1626 10:27:47.730666  PCI: 00:15.1 init

 1627 10:27:47.733252  I2C bus 1 version 0x3230302a

 1628 10:27:47.736647  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1629 10:27:47.743266  PCI: 00:15.1 init finished in 6 msecs

 1630 10:27:47.743351  PCI: 00:15.2 init

 1631 10:27:47.746585  I2C bus 2 version 0x3230302a

 1632 10:27:47.749892  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1633 10:27:47.753266  PCI: 00:15.2 init finished in 6 msecs

 1634 10:27:47.756576  PCI: 00:15.3 init

 1635 10:27:47.760075  I2C bus 3 version 0x3230302a

 1636 10:27:47.763417  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1637 10:27:47.766818  PCI: 00:15.3 init finished in 6 msecs

 1638 10:27:47.770220  PCI: 00:16.0 init

 1639 10:27:47.773691  PCI: 00:16.0 init finished in 0 msecs

 1640 10:27:47.776393  PCI: 00:19.1 init

 1641 10:27:47.779748  I2C bus 5 version 0x3230302a

 1642 10:27:47.783077  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1643 10:27:47.786509  PCI: 00:19.1 init finished in 6 msecs

 1644 10:27:47.789783  PCI: 00:1d.0 init

 1645 10:27:47.789869  Initializing PCH PCIe bridge.

 1646 10:27:47.796643  PCI: 00:1d.0 init finished in 3 msecs

 1647 10:27:47.800143  PCI: 00:1f.0 init

 1648 10:27:47.803499  IOAPIC: Initializing IOAPIC at 0xfec00000

 1649 10:27:47.806231  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1650 10:27:47.809682  IOAPIC: ID = 0x02

 1651 10:27:47.812973  IOAPIC: Dumping registers

 1652 10:27:47.813059    reg 0x0000: 0x02000000

 1653 10:27:47.816331    reg 0x0001: 0x00770020

 1654 10:27:47.820075    reg 0x0002: 0x00000000

 1655 10:27:47.822808  PCI: 00:1f.0 init finished in 21 msecs

 1656 10:27:47.826113  PCI: 00:1f.2 init

 1657 10:27:47.830067  Disabling ACPI via APMC.

 1658 10:27:47.833454  APMC done.

 1659 10:27:47.836290  PCI: 00:1f.2 init finished in 6 msecs

 1660 10:27:47.847778  PCI: 01:00.0 init

 1661 10:27:47.851295  PCI: 01:00.0 init finished in 0 msecs

 1662 10:27:47.853902  PNP: 0c09.0 init

 1663 10:27:47.857312  Google Chrome EC uptime: 8.291 seconds

 1664 10:27:47.863868  Google Chrome AP resets since EC boot: 1

 1665 10:27:47.867267  Google Chrome most recent AP reset causes:

 1666 10:27:47.870698  	0.452: 32775 shutdown: entering G3

 1667 10:27:47.877519  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1668 10:27:47.880781  PNP: 0c09.0 init finished in 22 msecs

 1669 10:27:47.886197  Devices initialized

 1670 10:27:47.889371  Show all devs... After init.

 1671 10:27:47.892849  Root Device: enabled 1

 1672 10:27:47.892936  DOMAIN: 0000: enabled 1

 1673 10:27:47.896162  CPU_CLUSTER: 0: enabled 1

 1674 10:27:47.899523  PCI: 00:00.0: enabled 1

 1675 10:27:47.902957  PCI: 00:02.0: enabled 1

 1676 10:27:47.903045  PCI: 00:04.0: enabled 1

 1677 10:27:47.906432  PCI: 00:05.0: enabled 1

 1678 10:27:47.909683  PCI: 00:06.0: enabled 0

 1679 10:27:47.913005  PCI: 00:07.0: enabled 0

 1680 10:27:47.913094  PCI: 00:07.1: enabled 0

 1681 10:27:47.916481  PCI: 00:07.2: enabled 0

 1682 10:27:47.919191  PCI: 00:07.3: enabled 0

 1683 10:27:47.923144  PCI: 00:08.0: enabled 1

 1684 10:27:47.923232  PCI: 00:09.0: enabled 0

 1685 10:27:47.925888  PCI: 00:0a.0: enabled 0

 1686 10:27:47.929127  PCI: 00:0d.0: enabled 1

 1687 10:27:47.932586  PCI: 00:0d.1: enabled 0

 1688 10:27:47.932674  PCI: 00:0d.2: enabled 0

 1689 10:27:47.935851  PCI: 00:0d.3: enabled 0

 1690 10:27:47.939460  PCI: 00:0e.0: enabled 0

 1691 10:27:47.942716  PCI: 00:10.2: enabled 1

 1692 10:27:47.942804  PCI: 00:10.6: enabled 0

 1693 10:27:47.946031  PCI: 00:10.7: enabled 0

 1694 10:27:47.949644  PCI: 00:12.0: enabled 0

 1695 10:27:47.949733  PCI: 00:12.6: enabled 0

 1696 10:27:47.952183  PCI: 00:13.0: enabled 0

 1697 10:27:47.955528  PCI: 00:14.0: enabled 1

 1698 10:27:47.958899  PCI: 00:14.1: enabled 0

 1699 10:27:47.958989  PCI: 00:14.2: enabled 1

 1700 10:27:47.962180  PCI: 00:14.3: enabled 1

 1701 10:27:47.965470  PCI: 00:15.0: enabled 1

 1702 10:27:47.969027  PCI: 00:15.1: enabled 1

 1703 10:27:47.969113  PCI: 00:15.2: enabled 1

 1704 10:27:47.972279  PCI: 00:15.3: enabled 1

 1705 10:27:47.975752  PCI: 00:16.0: enabled 1

 1706 10:27:47.979045  PCI: 00:16.1: enabled 0

 1707 10:27:47.979135  PCI: 00:16.2: enabled 0

 1708 10:27:47.982364  PCI: 00:16.3: enabled 0

 1709 10:27:47.985726  PCI: 00:16.4: enabled 0

 1710 10:27:47.989171  PCI: 00:16.5: enabled 0

 1711 10:27:47.989261  PCI: 00:17.0: enabled 0

 1712 10:27:47.992656  PCI: 00:19.0: enabled 0

 1713 10:27:47.995375  PCI: 00:19.1: enabled 1

 1714 10:27:47.995462  PCI: 00:19.2: enabled 0

 1715 10:27:47.998784  PCI: 00:1c.0: enabled 1

 1716 10:27:48.002256  PCI: 00:1c.1: enabled 0

 1717 10:27:48.005381  PCI: 00:1c.2: enabled 0

 1718 10:27:48.005470  PCI: 00:1c.3: enabled 0

 1719 10:27:48.008842  PCI: 00:1c.4: enabled 0

 1720 10:27:48.012206  PCI: 00:1c.5: enabled 0

 1721 10:27:48.015538  PCI: 00:1c.6: enabled 1

 1722 10:27:48.015627  PCI: 00:1c.7: enabled 0

 1723 10:27:48.019014  PCI: 00:1d.0: enabled 1

 1724 10:27:48.022370  PCI: 00:1d.1: enabled 0

 1725 10:27:48.025698  PCI: 00:1d.2: enabled 1

 1726 10:27:48.025787  PCI: 00:1d.3: enabled 0

 1727 10:27:48.029101  PCI: 00:1e.0: enabled 1

 1728 10:27:48.032488  PCI: 00:1e.1: enabled 0

 1729 10:27:48.032578  PCI: 00:1e.2: enabled 1

 1730 10:27:48.035145  PCI: 00:1e.3: enabled 1

 1731 10:27:48.038529  PCI: 00:1f.0: enabled 1

 1732 10:27:48.042004  PCI: 00:1f.1: enabled 0

 1733 10:27:48.042093  PCI: 00:1f.2: enabled 1

 1734 10:27:48.045329  PCI: 00:1f.3: enabled 1

 1735 10:27:48.048579  PCI: 00:1f.4: enabled 0

 1736 10:27:48.051886  PCI: 00:1f.5: enabled 1

 1737 10:27:48.052014  PCI: 00:1f.6: enabled 0

 1738 10:27:48.055243  PCI: 00:1f.7: enabled 0

 1739 10:27:48.058620  APIC: 00: enabled 1

 1740 10:27:48.058711  GENERIC: 0.0: enabled 1

 1741 10:27:48.062143  GENERIC: 0.0: enabled 1

 1742 10:27:48.065473  GENERIC: 1.0: enabled 1

 1743 10:27:48.068856  GENERIC: 0.0: enabled 1

 1744 10:27:48.068946  GENERIC: 1.0: enabled 1

 1745 10:27:48.072196  USB0 port 0: enabled 1

 1746 10:27:48.075501  GENERIC: 0.0: enabled 1

 1747 10:27:48.078938  USB0 port 0: enabled 1

 1748 10:27:48.079028  GENERIC: 0.0: enabled 1

 1749 10:27:48.081652  I2C: 00:1a: enabled 1

 1750 10:27:48.084949  I2C: 00:31: enabled 1

 1751 10:27:48.085029  I2C: 00:32: enabled 1

 1752 10:27:48.088292  I2C: 00:10: enabled 1

 1753 10:27:48.091698  I2C: 00:15: enabled 1

 1754 10:27:48.091787  GENERIC: 0.0: enabled 0

 1755 10:27:48.094948  GENERIC: 1.0: enabled 0

 1756 10:27:48.098368  GENERIC: 0.0: enabled 1

 1757 10:27:48.098458  SPI: 00: enabled 1

 1758 10:27:48.101670  SPI: 00: enabled 1

 1759 10:27:48.105087  PNP: 0c09.0: enabled 1

 1760 10:27:48.108468  GENERIC: 0.0: enabled 1

 1761 10:27:48.108557  USB3 port 0: enabled 1

 1762 10:27:48.111924  USB3 port 1: enabled 1

 1763 10:27:48.115367  USB3 port 2: enabled 0

 1764 10:27:48.115456  USB3 port 3: enabled 0

 1765 10:27:48.118117  USB2 port 0: enabled 0

 1766 10:27:48.121697  USB2 port 1: enabled 1

 1767 10:27:48.121787  USB2 port 2: enabled 1

 1768 10:27:48.125053  USB2 port 3: enabled 0

 1769 10:27:48.128529  USB2 port 4: enabled 1

 1770 10:27:48.131880  USB2 port 5: enabled 0

 1771 10:27:48.132010  USB2 port 6: enabled 0

 1772 10:27:48.135130  USB2 port 7: enabled 0

 1773 10:27:48.138598  USB2 port 8: enabled 0

 1774 10:27:48.138687  USB2 port 9: enabled 0

 1775 10:27:48.142006  USB3 port 0: enabled 0

 1776 10:27:48.144776  USB3 port 1: enabled 1

 1777 10:27:48.144865  USB3 port 2: enabled 0

 1778 10:27:48.148128  USB3 port 3: enabled 0

 1779 10:27:48.151409  GENERIC: 0.0: enabled 1

 1780 10:27:48.154775  GENERIC: 1.0: enabled 1

 1781 10:27:48.154865  APIC: 01: enabled 1

 1782 10:27:48.158182  APIC: 05: enabled 1

 1783 10:27:48.161588  APIC: 07: enabled 1

 1784 10:27:48.161677  APIC: 02: enabled 1

 1785 10:27:48.165020  APIC: 04: enabled 1

 1786 10:27:48.165110  APIC: 06: enabled 1

 1787 10:27:48.168384  APIC: 03: enabled 1

 1788 10:27:48.171870  PCI: 01:00.0: enabled 1

 1789 10:27:48.174583  BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms

 1790 10:27:48.181303  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1791 10:27:48.184551  ELOG: NV offset 0xf30000 size 0x1000

 1792 10:27:48.191321  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1793 10:27:48.198179  ELOG: Event(17) added with size 13 at 2023-02-10 10:27:47 UTC

 1794 10:27:48.204906  ELOG: Event(92) added with size 9 at 2023-02-10 10:27:47 UTC

 1795 10:27:48.211089  ELOG: Event(93) added with size 9 at 2023-02-10 10:27:47 UTC

 1796 10:27:48.217723  ELOG: Event(9E) added with size 10 at 2023-02-10 10:27:47 UTC

 1797 10:27:48.224578  ELOG: Event(9F) added with size 14 at 2023-02-10 10:27:47 UTC

 1798 10:27:48.231286  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1799 10:27:48.238039  ELOG: Event(A1) added with size 10 at 2023-02-10 10:27:47 UTC

 1800 10:27:48.244740  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1801 10:27:48.250769  ELOG: Event(A0) added with size 9 at 2023-02-10 10:27:47 UTC

 1802 10:27:48.254110  elog_add_boot_reason: Logged dev mode boot

 1803 10:27:48.260872  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1804 10:27:48.260963  Finalize devices...

 1805 10:27:48.264275  Devices finalized

 1806 10:27:48.271090  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1807 10:27:48.274458  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1808 10:27:48.280566  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1809 10:27:48.283941  ME: HFSTS1                      : 0x80030055

 1810 10:27:48.290764  ME: HFSTS2                      : 0x30280116

 1811 10:27:48.294016  ME: HFSTS3                      : 0x00000050

 1812 10:27:48.297357  ME: HFSTS4                      : 0x00004000

 1813 10:27:48.304210  ME: HFSTS5                      : 0x00000000

 1814 10:27:48.307632  ME: HFSTS6                      : 0x40400006

 1815 10:27:48.310310  ME: Manufacturing Mode          : YES

 1816 10:27:48.313766  ME: SPI Protection Mode Enabled : NO

 1817 10:27:48.320637  ME: FW Partition Table          : OK

 1818 10:27:48.324123  ME: Bringup Loader Failure      : NO

 1819 10:27:48.327312  ME: Firmware Init Complete      : NO

 1820 10:27:48.330739  ME: Boot Options Present        : NO

 1821 10:27:48.334060  ME: Update In Progress          : NO

 1822 10:27:48.337389  ME: D0i3 Support                : YES

 1823 10:27:48.340718  ME: Low Power State Enabled     : NO

 1824 10:27:48.344240  ME: CPU Replaced                : YES

 1825 10:27:48.350123  ME: CPU Replacement Valid       : YES

 1826 10:27:48.354091  ME: Current Working State       : 5

 1827 10:27:48.356790  ME: Current Operation State     : 1

 1828 10:27:48.360230  ME: Current Operation Mode      : 3

 1829 10:27:48.363672  ME: Error Code                  : 0

 1830 10:27:48.367069  ME: Enhanced Debug Mode         : NO

 1831 10:27:48.370511  ME: CPU Debug Disabled          : YES

 1832 10:27:48.374022  ME: TXT Support                 : NO

 1833 10:27:48.379937  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1834 10:27:48.386721  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1835 10:27:48.390031  CBFS: 'fallback/slic' not found.

 1836 10:27:48.396826  ACPI: Writing ACPI tables at 76b01000.

 1837 10:27:48.396910  ACPI:    * FACS

 1838 10:27:48.400134  ACPI:    * DSDT

 1839 10:27:48.403569  Ramoops buffer: 0x100000@0x76a00000.

 1840 10:27:48.406850  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1841 10:27:48.413072  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1842 10:27:48.416573  Google Chrome EC: version:

 1843 10:27:48.420023  	ro: voema_v2.0.10114-a447f03e46

 1844 10:27:48.423468  	rw: voema_v2.0.10132-7b2059e3bc

 1845 10:27:48.423554    running image: 2

 1846 10:27:48.429567  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000

 1847 10:27:48.434149  ACPI:    * FADT

 1848 10:27:48.434235  SCI is IRQ9

 1849 10:27:48.440792  ACPI: added table 1/32, length now 40

 1850 10:27:48.440878  ACPI:     * SSDT

 1851 10:27:48.444204  Found 1 CPU(s) with 8 core(s) each.

 1852 10:27:48.451006  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1853 10:27:48.454507  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1854 10:27:48.457724  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1855 10:27:48.461163  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1856 10:27:48.467304  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1857 10:27:48.473905  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1858 10:27:48.477256  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1859 10:27:48.484191  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1860 10:27:48.490528  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1861 10:27:48.493870  \_SB.PCI0.RP09: Added StorageD3Enable property

 1862 10:27:48.500650  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1863 10:27:48.504084  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1864 10:27:48.510693  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1865 10:27:48.513341  PS2K: Passing 80 keymaps to kernel

 1866 10:27:48.520313  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1867 10:27:48.527185  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1868 10:27:48.533311  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1869 10:27:48.539936  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1870 10:27:48.546707  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1871 10:27:48.553507  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1872 10:27:48.560158  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1873 10:27:48.566242  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1874 10:27:48.569636  ACPI: added table 2/32, length now 44

 1875 10:27:48.569718  ACPI:    * MCFG

 1876 10:27:48.576369  ACPI: added table 3/32, length now 48

 1877 10:27:48.576456  ACPI:    * TPM2

 1878 10:27:48.579705  TPM2 log created at 0x769f0000

 1879 10:27:48.583194  ACPI: added table 4/32, length now 52

 1880 10:27:48.586636  ACPI:    * MADT

 1881 10:27:48.586716  SCI is IRQ9

 1882 10:27:48.589955  ACPI: added table 5/32, length now 56

 1883 10:27:48.592750  current = 76b09850

 1884 10:27:48.592843  ACPI:    * DMAR

 1885 10:27:48.596086  ACPI: added table 6/32, length now 60

 1886 10:27:48.602891  ACPI: added table 7/32, length now 64

 1887 10:27:48.602989  ACPI:    * HPET

 1888 10:27:48.606352  ACPI: added table 8/32, length now 68

 1889 10:27:48.609730  ACPI: done.

 1890 10:27:48.609811  ACPI tables: 35216 bytes.

 1891 10:27:48.613144  smbios_write_tables: 769ef000

 1892 10:27:48.616607  EC returned error result code 3

 1893 10:27:48.619344  Couldn't obtain OEM name from CBI

 1894 10:27:48.623513  Create SMBIOS type 16

 1895 10:27:48.626811  Create SMBIOS type 17

 1896 10:27:48.629489  GENERIC: 0.0 (WIFI Device)

 1897 10:27:48.632911  SMBIOS tables: 1734 bytes.

 1898 10:27:48.636192  Writing table forward entry at 0x00000500

 1899 10:27:48.642849  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1900 10:27:48.646216  Writing coreboot table at 0x76b25000

 1901 10:27:48.652837   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1902 10:27:48.656324   1. 0000000000001000-000000000009ffff: RAM

 1903 10:27:48.659572   2. 00000000000a0000-00000000000fffff: RESERVED

 1904 10:27:48.666439   3. 0000000000100000-00000000769eefff: RAM

 1905 10:27:48.669767   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1906 10:27:48.675796   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1907 10:27:48.682604   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1908 10:27:48.685968   7. 0000000077000000-000000007fbfffff: RESERVED

 1909 10:27:48.692749   8. 00000000c0000000-00000000cfffffff: RESERVED

 1910 10:27:48.696107   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1911 10:27:48.699431  10. 00000000fb000000-00000000fb000fff: RESERVED

 1912 10:27:48.705987  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1913 10:27:48.709503  12. 00000000fed80000-00000000fed87fff: RESERVED

 1914 10:27:48.715648  13. 00000000fed90000-00000000fed92fff: RESERVED

 1915 10:27:48.719081  14. 00000000feda0000-00000000feda1fff: RESERVED

 1916 10:27:48.726034  15. 00000000fedc0000-00000000feddffff: RESERVED

 1917 10:27:48.729462  16. 0000000100000000-00000004803fffff: RAM

 1918 10:27:48.732186  Passing 4 GPIOs to payload:

 1919 10:27:48.735585              NAME |       PORT | POLARITY |     VALUE

 1920 10:27:48.742489               lid |  undefined |     high |      high

 1921 10:27:48.748553             power |  undefined |     high |       low

 1922 10:27:48.752057             oprom |  undefined |     high |       low

 1923 10:27:48.758696          EC in RW | 0x000000e5 |     high |      high

 1924 10:27:48.765515  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26

 1925 10:27:48.768908  coreboot table: 1576 bytes.

 1926 10:27:48.772239  IMD ROOT    0. 0x76fff000 0x00001000

 1927 10:27:48.775659  IMD SMALL   1. 0x76ffe000 0x00001000

 1928 10:27:48.779050  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1929 10:27:48.781746  VPD         3. 0x76c4d000 0x00000367

 1930 10:27:48.785045  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1931 10:27:48.788557  CONSOLE     5. 0x76c2c000 0x00020000

 1932 10:27:48.791867  FMAP        6. 0x76c2b000 0x00000578

 1933 10:27:48.798693  TIME STAMP  7. 0x76c2a000 0x00000910

 1934 10:27:48.802063  VBOOT WORK  8. 0x76c16000 0x00014000

 1935 10:27:48.805453  ROMSTG STCK 9. 0x76c15000 0x00001000

 1936 10:27:48.808709  AFTER CAR  10. 0x76c0a000 0x0000b000

 1937 10:27:48.811575  RAMSTAGE   11. 0x76b97000 0x00073000

 1938 10:27:48.814966  REFCODE    12. 0x76b42000 0x00055000

 1939 10:27:48.818383  SMM BACKUP 13. 0x76b32000 0x00010000

 1940 10:27:48.821851  4f444749   14. 0x76b30000 0x00002000

 1941 10:27:48.825227  EXT VBT15. 0x76b2d000 0x0000219f

 1942 10:27:48.831522  COREBOOT   16. 0x76b25000 0x00008000

 1943 10:27:48.834943  ACPI       17. 0x76b01000 0x00024000

 1944 10:27:48.838374  ACPI GNVS  18. 0x76b00000 0x00001000

 1945 10:27:48.841793  RAMOOPS    19. 0x76a00000 0x00100000

 1946 10:27:48.844553  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1947 10:27:48.847850  SMBIOS     21. 0x769ef000 0x00000800

 1948 10:27:48.851263  IMD small region:

 1949 10:27:48.854496    IMD ROOT    0. 0x76ffec00 0x00000400

 1950 10:27:48.857884    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1951 10:27:48.861286    POWER STATE 2. 0x76ffeb80 0x00000044

 1952 10:27:48.867943    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1953 10:27:48.871437    MEM INFO    4. 0x76ffe980 0x000001e0

 1954 10:27:48.874888  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1955 10:27:48.878076  MTRR: Physical address space:

 1956 10:27:48.884699  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1957 10:27:48.890924  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1958 10:27:48.897630  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1959 10:27:48.904258  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1960 10:27:48.911008  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1961 10:27:48.917830  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1962 10:27:48.924197  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6

 1963 10:27:48.927653  MTRR: Fixed MSR 0x250 0x0606060606060606

 1964 10:27:48.930906  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 10:27:48.934488  MTRR: Fixed MSR 0x259 0x0000000000000000

 1966 10:27:48.941160  MTRR: Fixed MSR 0x268 0x0606060606060606

 1967 10:27:48.944540  MTRR: Fixed MSR 0x269 0x0606060606060606

 1968 10:27:48.947872  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1969 10:27:48.950792  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1970 10:27:48.954034  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1971 10:27:48.960957  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1972 10:27:48.964190  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1973 10:27:48.967527  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1974 10:27:48.971635  call enable_fixed_mtrr()

 1975 10:27:48.975015  CPU physical address size: 39 bits

 1976 10:27:48.981832  MTRR: default type WB/UC MTRR counts: 6/7.

 1977 10:27:48.985193  MTRR: WB selected as default type.

 1978 10:27:48.991932  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1979 10:27:48.994737  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1980 10:27:49.001465  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1981 10:27:49.008253  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0

 1982 10:27:49.014973  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1983 10:27:49.021729  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1984 10:27:49.028573  MTRR: Fixed MSR 0x250 0x0606060606060606

 1985 10:27:49.032121  MTRR: Fixed MSR 0x258 0x0606060606060606

 1986 10:27:49.034861  MTRR: Fixed MSR 0x259 0x0000000000000000

 1987 10:27:49.038214  MTRR: Fixed MSR 0x268 0x0606060606060606

 1988 10:27:49.044950  MTRR: Fixed MSR 0x269 0x0606060606060606

 1989 10:27:49.048319  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1990 10:27:49.051846  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1991 10:27:49.055175  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1992 10:27:49.061777  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1993 10:27:49.065112  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1994 10:27:49.068461  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1995 10:27:49.068550  

 1996 10:27:49.071858  MTRR check

 1997 10:27:49.075302  call enable_fixed_mtrr()

 1998 10:27:49.075388  Fixed MTRRs   : Enabled

 1999 10:27:49.078732  Variable MTRRs: Enabled

 2000 10:27:49.078818  

 2001 10:27:49.081958  CPU physical address size: 39 bits

 2002 10:27:49.090041  BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms

 2003 10:27:49.092886  MTRR: Fixed MSR 0x250 0x0606060606060606

 2004 10:27:49.099892  MTRR: Fixed MSR 0x250 0x0606060606060606

 2005 10:27:49.103219  MTRR: Fixed MSR 0x258 0x0606060606060606

 2006 10:27:49.106595  MTRR: Fixed MSR 0x259 0x0000000000000000

 2007 10:27:49.110085  MTRR: Fixed MSR 0x268 0x0606060606060606

 2008 10:27:49.116151  MTRR: Fixed MSR 0x269 0x0606060606060606

 2009 10:27:49.119506  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2010 10:27:49.122916  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2011 10:27:49.126333  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2012 10:27:49.133152  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2013 10:27:49.135858  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2014 10:27:49.139304  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2015 10:27:49.146677  MTRR: Fixed MSR 0x258 0x0606060606060606

 2016 10:27:49.149991  MTRR: Fixed MSR 0x259 0x0000000000000000

 2017 10:27:49.153399  MTRR: Fixed MSR 0x268 0x0606060606060606

 2018 10:27:49.156804  MTRR: Fixed MSR 0x269 0x0606060606060606

 2019 10:27:49.163532  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2020 10:27:49.166852  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2021 10:27:49.170157  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2022 10:27:49.173487  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2023 10:27:49.179623  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2024 10:27:49.182945  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2025 10:27:49.186339  call enable_fixed_mtrr()

 2026 10:27:49.189742  call enable_fixed_mtrr()

 2027 10:27:49.193123  MTRR: Fixed MSR 0x250 0x0606060606060606

 2028 10:27:49.196640  MTRR: Fixed MSR 0x250 0x0606060606060606

 2029 10:27:49.203442  MTRR: Fixed MSR 0x258 0x0606060606060606

 2030 10:27:49.206880  MTRR: Fixed MSR 0x259 0x0000000000000000

 2031 10:27:49.209605  MTRR: Fixed MSR 0x268 0x0606060606060606

 2032 10:27:49.212873  MTRR: Fixed MSR 0x269 0x0606060606060606

 2033 10:27:49.216154  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2034 10:27:49.223017  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2035 10:27:49.226467  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2036 10:27:49.229853  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2037 10:27:49.232658  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2038 10:27:49.239503  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2039 10:27:49.242903  MTRR: Fixed MSR 0x258 0x0606060606060606

 2040 10:27:49.249608  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 10:27:49.252361  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 10:27:49.255674  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 10:27:49.259125  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 10:27:49.265752  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 10:27:49.269138  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 10:27:49.272510  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 10:27:49.275825  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 10:27:49.282709  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 10:27:49.285461  call enable_fixed_mtrr()

 2050 10:27:49.288903  call enable_fixed_mtrr()

 2051 10:27:49.292372  CPU physical address size: 39 bits

 2052 10:27:49.295687  CPU physical address size: 39 bits

 2053 10:27:49.302620  MTRR: Fixed MSR 0x250 0x0606060606060606

 2054 10:27:49.306057  MTRR: Fixed MSR 0x250 0x0606060606060606

 2055 10:27:49.309378  MTRR: Fixed MSR 0x258 0x0606060606060606

 2056 10:27:49.312083  MTRR: Fixed MSR 0x259 0x0000000000000000

 2057 10:27:49.315531  MTRR: Fixed MSR 0x268 0x0606060606060606

 2058 10:27:49.322189  MTRR: Fixed MSR 0x269 0x0606060606060606

 2059 10:27:49.325636  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2060 10:27:49.329128  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2061 10:27:49.332484  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2062 10:27:49.338600  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2063 10:27:49.342021  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2064 10:27:49.345325  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2065 10:27:49.352682  MTRR: Fixed MSR 0x258 0x0606060606060606

 2066 10:27:49.355931  MTRR: Fixed MSR 0x259 0x0000000000000000

 2067 10:27:49.359324  MTRR: Fixed MSR 0x268 0x0606060606060606

 2068 10:27:49.362601  MTRR: Fixed MSR 0x269 0x0606060606060606

 2069 10:27:49.369241  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2070 10:27:49.372653  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2071 10:27:49.375863  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2072 10:27:49.379224  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2073 10:27:49.385932  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2074 10:27:49.389256  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2075 10:27:49.392638  call enable_fixed_mtrr()

 2076 10:27:49.396012  call enable_fixed_mtrr()

 2077 10:27:49.399530  Checking cr50 for pending updates

 2078 10:27:49.402930  CPU physical address size: 39 bits

 2079 10:27:49.406247  CPU physical address size: 39 bits

 2080 10:27:49.412932  CPU physical address size: 39 bits

 2081 10:27:49.416305  CPU physical address size: 39 bits

 2082 10:27:49.419691  Reading cr50 TPM mode

 2083 10:27:49.429163  BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms

 2084 10:27:49.438720  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2085 10:27:49.442201  Checking segment from ROM address 0xffc02b38

 2086 10:27:49.445677  Checking segment from ROM address 0xffc02b54

 2087 10:27:49.452370  Loading segment from ROM address 0xffc02b38

 2088 10:27:49.452457    code (compression=0)

 2089 10:27:49.461852    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2090 10:27:49.471785  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2091 10:27:49.471909  it's not compressed!

 2092 10:27:49.612762  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2093 10:27:49.619384  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2094 10:27:49.626038  Loading segment from ROM address 0xffc02b54

 2095 10:27:49.629522    Entry Point 0x30000000

 2096 10:27:49.629609  Loaded segments

 2097 10:27:49.636242  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms

 2098 10:27:49.680866  Finalizing chipset.

 2099 10:27:49.684141  Finalizing SMM.

 2100 10:27:49.684240  APMC done.

 2101 10:27:49.690787  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms

 2102 10:27:49.694176  mp_park_aps done after 0 msecs.

 2103 10:27:49.697435  Jumping to boot code at 0x30000000(0x76b25000)

 2104 10:27:49.707539  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2105 10:27:49.707624  

 2106 10:27:49.710260  

 2107 10:27:49.710341  

 2108 10:27:49.710702  end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
 2109 10:27:49.710824  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2110 10:27:49.710926  Setting prompt string to ['volteer:']
 2111 10:27:49.711022  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
 2112 10:27:49.713662  Starting depthcharge on Voema...

 2113 10:27:49.713744  

 2114 10:27:49.720418  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2115 10:27:49.720507  

 2116 10:27:49.727111  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2117 10:27:49.727197  

 2118 10:27:49.734036  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2119 10:27:49.734120  

 2120 10:27:49.736766  Failed to find eMMC card reader

 2121 10:27:49.736847  

 2122 10:27:49.740219  Wipe memory regions:

 2123 10:27:49.740299  

 2124 10:27:49.743651  	[0x00000000001000, 0x000000000a0000)

 2125 10:27:49.743732  

 2126 10:27:49.747073  	[0x00000000100000, 0x00000030000000)

 2127 10:27:49.780914  

 2128 10:27:49.784225  	[0x00000032662db0, 0x000000769ef000)

 2129 10:27:49.832186  

 2130 10:27:49.834831  	[0x00000100000000, 0x00000480400000)

 2131 10:27:50.445187  

 2132 10:27:50.448567  ec_init: CrosEC protocol v3 supported (256, 256)

 2133 10:27:50.879231  

 2134 10:27:50.879368  R8152: Initializing

 2135 10:27:50.879439  

 2136 10:27:50.882460  Version 6 (ocp_data = 5c30)

 2137 10:27:50.882551  

 2138 10:27:50.886008  R8152: Done initializing

 2139 10:27:50.886090  

 2140 10:27:50.889491  Adding net device

 2141 10:27:51.190305  

 2142 10:27:51.193542  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2143 10:27:51.193634  

 2144 10:27:51.193722  

 2145 10:27:51.193806  

 2146 10:27:51.197226  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2148 10:27:51.297969  volteer: tftpboot 192.168.201.1 9097764/tftp-deploy-jpo2lelr/kernel/bzImage 9097764/tftp-deploy-jpo2lelr/kernel/cmdline 9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz

 2149 10:27:51.298118  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2150 10:27:51.298223  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
 2151 10:27:51.303168  tftpboot 192.168.201.1 9097764/tftp-deploy-jpo2lelr/kernel/bzImoy-jpo2lelr/kernel/cmdline 9097764/tftp-deploy-jpo2lelr/ramdisk/ramdisk.cpio.gz

 2152 10:27:51.303260  

 2153 10:27:51.303348  Waiting for link

 2154 10:27:51.505870  

 2155 10:27:51.506007  done.

 2156 10:27:51.506111  

 2157 10:27:51.506209  MAC: 00:24:32:30:7e:22

 2158 10:27:51.506307  

 2159 10:27:51.509235  Sending DHCP discover... done.

 2160 10:27:51.509347  

 2161 10:27:51.512534  Waiting for reply... done.

 2162 10:27:51.512620  

 2163 10:27:51.515994  Sending DHCP request... done.

 2164 10:27:51.516080  

 2165 10:27:51.519259  Waiting for reply... done.

 2166 10:27:51.519345  

 2167 10:27:51.522594  My ip is 192.168.201.21

 2168 10:27:51.522680  

 2169 10:27:51.525250  The DHCP server ip is 192.168.201.1

 2170 10:27:51.525336  

 2171 10:27:51.528721  TFTP server IP predefined by user: 192.168.201.1

 2172 10:27:51.528808  

 2173 10:27:51.535393  Bootfile predefined by user: 9097764/tftp-deploy-jpo2lelr/kernel/bzImage

 2174 10:27:51.535480  

 2175 10:27:51.538838  Sending tftp read request... done.

 2176 10:27:51.542154  

 2177 10:27:51.545579  Waiting for the transfer... 

 2178 10:27:51.545663  

 2179 10:27:52.085228  00000000 ################################################################

 2180 10:27:52.085372  

 2181 10:27:52.632597  00080000 ################################################################

 2182 10:27:52.632741  

 2183 10:27:53.200331  00100000 ################################################################

 2184 10:27:53.200474  

 2185 10:27:53.785627  00180000 ################################################################

 2186 10:27:53.785767  

 2187 10:27:54.321688  00200000 ################################################################

 2188 10:27:54.321842  

 2189 10:27:54.867236  00280000 ################################################################

 2190 10:27:54.867463  

 2191 10:27:55.392998  00300000 ################################################################

 2192 10:27:55.393156  

 2193 10:27:55.915794  00380000 ################################################################

 2194 10:27:55.915973  

 2195 10:27:56.443079  00400000 ################################################################

 2196 10:27:56.443222  

 2197 10:27:56.972538  00480000 ################################################################

 2198 10:27:56.972736  

 2199 10:27:57.599629  00500000 ################################################################

 2200 10:27:57.599774  

 2201 10:27:58.163076  00580000 ################################################################

 2202 10:27:58.163211  

 2203 10:27:58.774124  00600000 ################################################################

 2204 10:27:58.774650  

 2205 10:27:59.453460  00680000 ################################################################

 2206 10:27:59.453991  

 2207 10:28:00.152348  00700000 ################################################################

 2208 10:28:00.152886  

 2209 10:28:00.797477  00780000 ################################################################

 2210 10:28:00.798045  

 2211 10:28:01.492940  00800000 ################################################################

 2212 10:28:01.493472  

 2213 10:28:02.149890  00880000 ################################################################

 2214 10:28:02.150027  

 2215 10:28:02.466791  00900000 ################################## done.

 2216 10:28:02.467348  

 2217 10:28:02.469987  The bootfile was 9707520 bytes long.

 2218 10:28:02.470455  

 2219 10:28:02.473368  Sending tftp read request... done.

 2220 10:28:02.473821  

 2221 10:28:02.476383  Waiting for the transfer... 

 2222 10:28:02.476823  

 2223 10:28:03.160996  00000000 ################################################################

 2224 10:28:03.161529  

 2225 10:28:03.816500  00080000 ################################################################

 2226 10:28:03.817036  

 2227 10:28:04.504547  00100000 ################################################################

 2228 10:28:04.505115  

 2229 10:28:05.204039  00180000 ################################################################

 2230 10:28:05.204551  

 2231 10:28:05.891970  00200000 ################################################################

 2232 10:28:05.892486  

 2233 10:28:06.585887  00280000 ################################################################

 2234 10:28:06.586416  

 2235 10:28:07.272339  00300000 ################################################################

 2236 10:28:07.272859  

 2237 10:28:07.967242  00380000 ################################################################

 2238 10:28:07.967775  

 2239 10:28:08.664447  00400000 ################################################################

 2240 10:28:08.665009  

 2241 10:28:09.348095  00480000 ################################################################

 2242 10:28:09.348620  

 2243 10:28:09.717180  00500000 ################################### done.

 2244 10:28:09.717752  

 2245 10:28:09.720154  Sending tftp read request... done.

 2246 10:28:09.720602  

 2247 10:28:09.723508  Waiting for the transfer... 

 2248 10:28:09.723980  

 2249 10:28:09.726691  00000000 # done.

 2250 10:28:09.727147  

 2251 10:28:09.733319  Command line loaded dynamically from TFTP file: 9097764/tftp-deploy-jpo2lelr/kernel/cmdline

 2252 10:28:09.733761  

 2253 10:28:09.752935  The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9097764/extract-nfsrootfs-ajiguxqr,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2254 10:28:09.757454  

 2255 10:28:09.760916  Shutting down all USB controllers.

 2256 10:28:09.761452  

 2257 10:28:09.761849  Removing current net device

 2258 10:28:09.762289  

 2259 10:28:09.764558  Finalizing coreboot

 2260 10:28:09.765066  

 2261 10:28:09.771132  Exiting depthcharge with code 4 at timestamp: 28636259

 2262 10:28:09.771684  

 2263 10:28:09.772152  

 2264 10:28:09.772499  Starting kernel ...

 2265 10:28:09.772823  

 2266 10:28:09.773136  

 2267 10:28:09.774455  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2268 10:28:09.774982  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2269 10:28:09.775364  Setting prompt string to ['Linux version [0-9]']
 2270 10:28:09.775754  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2271 10:28:09.776165  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2273 10:32:31.775211  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2275 10:32:31.775481  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2277 10:32:31.775646  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2280 10:32:31.775943  end: 2 depthcharge-action (duration 00:05:00) [common]
 2282 10:32:31.776191  Cleaning after the job
 2283 10:32:31.776281  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/ramdisk
 2284 10:32:31.776807  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/kernel
 2285 10:32:31.777461  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/nfsrootfs
 2286 10:32:31.823546  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9097764/tftp-deploy-jpo2lelr/modules
 2287 10:32:31.823855  start: 4.1 power-off (timeout 00:00:30) [common]
 2288 10:32:31.824061  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
 2289 10:32:33.998082  >> Command sent successfully.

 2290 10:32:34.000284  Returned 0 in 2 seconds
 2291 10:32:34.101038  end: 4.1 power-off (duration 00:00:02) [common]
 2293 10:32:34.101382  start: 4.2 read-feedback (timeout 00:09:58) [common]
 2294 10:32:34.101630  Listened to connection for namespace 'common' for up to 1s
 2295 10:32:35.106540  Finalising connection for namespace 'common'
 2296 10:32:35.106731  Disconnecting from shell: Finalise
 2297 10:32:35.106819  

 2298 10:32:35.207560  end: 4.2 read-feedback (duration 00:00:01) [common]
 2299 10:32:35.207717  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9097764
 2300 10:32:35.361313  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9097764
 2301 10:32:35.361517  JobError: Your job cannot terminate cleanly.