Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:29.306304 lava-dispatcher, installed at version: 2023.01
2 12:21:29.306502 start: 0 validate
3 12:21:29.306636 Start time: 2023-03-13 12:21:29.306631+00:00 (UTC)
4 12:21:29.306774 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:29.306903 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 12:21:29.601997 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:29.602219 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:29.891716 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:29.891885 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:21:36.877597 validate duration: 7.57
12 12:21:36.878885 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:21:36.879658 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:21:36.880155 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:21:36.880650 Not decompressing ramdisk as can be used compressed.
16 12:21:36.881084 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 12:21:36.881428 saving as /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/ramdisk/rootfs.cpio.gz
18 12:21:36.881759 total size: 8423697 (8MB)
19 12:21:37.583857 progress 0% (0MB)
20 12:21:37.588901 progress 5% (0MB)
21 12:21:37.590989 progress 10% (0MB)
22 12:21:37.593038 progress 15% (1MB)
23 12:21:37.595166 progress 20% (1MB)
24 12:21:37.597204 progress 25% (2MB)
25 12:21:37.599286 progress 30% (2MB)
26 12:21:37.601163 progress 35% (2MB)
27 12:21:37.603247 progress 40% (3MB)
28 12:21:37.605281 progress 45% (3MB)
29 12:21:37.607348 progress 50% (4MB)
30 12:21:37.609372 progress 55% (4MB)
31 12:21:37.611411 progress 60% (4MB)
32 12:21:37.613405 progress 65% (5MB)
33 12:21:37.615265 progress 70% (5MB)
34 12:21:37.617255 progress 75% (6MB)
35 12:21:37.619275 progress 80% (6MB)
36 12:21:37.621307 progress 85% (6MB)
37 12:21:37.623345 progress 90% (7MB)
38 12:21:37.625347 progress 95% (7MB)
39 12:21:37.627403 progress 100% (8MB)
40 12:21:37.627509 8MB downloaded in 0.75s (10.77MB/s)
41 12:21:37.627659 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:21:37.627905 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:21:37.627996 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:21:37.628084 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:21:37.628190 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:21:37.628259 saving as /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/kernel/bzImage
48 12:21:37.628321 total size: 9826304 (9MB)
49 12:21:37.628382 No compression specified
50 12:21:37.629306 progress 0% (0MB)
51 12:21:37.631686 progress 5% (0MB)
52 12:21:37.634010 progress 10% (0MB)
53 12:21:37.636390 progress 15% (1MB)
54 12:21:37.638760 progress 20% (1MB)
55 12:21:37.641094 progress 25% (2MB)
56 12:21:37.643654 progress 30% (2MB)
57 12:21:37.645968 progress 35% (3MB)
58 12:21:37.648395 progress 40% (3MB)
59 12:21:37.650786 progress 45% (4MB)
60 12:21:37.653122 progress 50% (4MB)
61 12:21:37.655542 progress 55% (5MB)
62 12:21:37.657913 progress 60% (5MB)
63 12:21:37.660334 progress 65% (6MB)
64 12:21:37.662682 progress 70% (6MB)
65 12:21:37.665065 progress 75% (7MB)
66 12:21:37.667434 progress 80% (7MB)
67 12:21:37.669763 progress 85% (7MB)
68 12:21:37.672127 progress 90% (8MB)
69 12:21:37.674470 progress 95% (8MB)
70 12:21:37.676833 progress 100% (9MB)
71 12:21:37.677044 9MB downloaded in 0.05s (192.35MB/s)
72 12:21:37.677188 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:21:37.677448 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:21:37.677551 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:21:37.677637 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:21:37.677749 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:21:37.677818 saving as /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/modules/modules.tar
79 12:21:37.677879 total size: 460276 (0MB)
80 12:21:37.677940 Using unxz to decompress xz
81 12:21:37.681135 progress 7% (0MB)
82 12:21:37.681527 progress 14% (0MB)
83 12:21:37.681760 progress 21% (0MB)
84 12:21:37.683153 progress 28% (0MB)
85 12:21:37.685301 progress 35% (0MB)
86 12:21:37.687450 progress 42% (0MB)
87 12:21:37.689698 progress 49% (0MB)
88 12:21:37.691565 progress 56% (0MB)
89 12:21:37.693342 progress 64% (0MB)
90 12:21:37.695481 progress 71% (0MB)
91 12:21:37.697401 progress 78% (0MB)
92 12:21:37.699328 progress 85% (0MB)
93 12:21:37.701013 progress 92% (0MB)
94 12:21:37.703141 progress 99% (0MB)
95 12:21:37.709381 0MB downloaded in 0.03s (13.94MB/s)
96 12:21:37.709653 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:21:37.709947 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:21:37.710056 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 12:21:37.710192 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 12:21:37.710305 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:21:37.710410 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 12:21:37.710597 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5
104 12:21:37.710720 makedir: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin
105 12:21:37.710821 makedir: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/tests
106 12:21:37.710917 makedir: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/results
107 12:21:37.711036 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-add-keys
108 12:21:37.711187 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-add-sources
109 12:21:37.711322 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-background-process-start
110 12:21:37.711454 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-background-process-stop
111 12:21:37.711581 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-common-functions
112 12:21:37.711710 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-echo-ipv4
113 12:21:37.711838 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-install-packages
114 12:21:37.711965 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-installed-packages
115 12:21:37.712090 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-os-build
116 12:21:37.712216 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-probe-channel
117 12:21:37.712343 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-probe-ip
118 12:21:37.712469 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-target-ip
119 12:21:37.712599 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-target-mac
120 12:21:37.712724 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-target-storage
121 12:21:37.712854 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-case
122 12:21:37.712980 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-event
123 12:21:37.713105 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-feedback
124 12:21:37.713232 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-raise
125 12:21:37.713361 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-reference
126 12:21:37.713489 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-runner
127 12:21:37.713613 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-set
128 12:21:37.713739 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-test-shell
129 12:21:37.713871 Updating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-install-packages (oe)
130 12:21:37.714001 Updating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/bin/lava-installed-packages (oe)
131 12:21:37.714118 Creating /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/environment
132 12:21:37.714264 LAVA metadata
133 12:21:37.714347 - LAVA_JOB_ID=9584152
134 12:21:37.714428 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:21:37.714552 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 12:21:37.714627 skipped lava-vland-overlay
137 12:21:37.714727 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:21:37.714828 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 12:21:37.714897 skipped lava-multinode-overlay
140 12:21:37.714996 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:21:37.715097 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 12:21:37.715181 Loading test definitions
143 12:21:37.715297 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 12:21:37.715385 Using /lava-9584152 at stage 0
145 12:21:37.715675 uuid=9584152_1.4.2.3.1 testdef=None
146 12:21:37.715780 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:21:37.715886 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 12:21:37.716409 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:21:37.716669 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 12:21:37.717245 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:21:37.717511 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 12:21:37.718072 runner path: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/0/tests/0_dmesg test_uuid 9584152_1.4.2.3.1
155 12:21:37.718275 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:21:37.718536 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
158 12:21:37.718620 Using /lava-9584152 at stage 1
159 12:21:37.718887 uuid=9584152_1.4.2.3.5 testdef=None
160 12:21:37.718987 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 12:21:37.719090 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
162 12:21:37.719609 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 12:21:37.719858 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
165 12:21:37.720447 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 12:21:37.720709 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
168 12:21:37.721263 runner path: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/1/tests/1_bootrr test_uuid 9584152_1.4.2.3.5
169 12:21:37.721416 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 12:21:37.721647 Creating lava-test-runner.conf files
172 12:21:37.721728 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/0 for stage 0
173 12:21:37.721832 - 0_dmesg
174 12:21:37.721919 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584152/lava-overlay-e_bbld_5/lava-9584152/1 for stage 1
175 12:21:37.722019 - 1_bootrr
176 12:21:37.722126 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 12:21:37.722288 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
178 12:21:37.728604 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 12:21:37.728728 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
180 12:21:37.728830 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 12:21:37.728934 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 12:21:37.729039 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
183 12:21:37.915198 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 12:21:37.915555 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
185 12:21:37.915686 extracting modules file /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584152/extract-overlay-ramdisk-wd1atfpp/ramdisk
186 12:21:37.927307 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 12:21:37.927461 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
188 12:21:37.927563 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584152/compress-overlay-bzyrgqjf/overlay-1.4.2.4.tar.gz to ramdisk
189 12:21:37.927639 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584152/compress-overlay-bzyrgqjf/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584152/extract-overlay-ramdisk-wd1atfpp/ramdisk
190 12:21:37.932132 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 12:21:37.932255 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
192 12:21:37.932361 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 12:21:37.932460 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
194 12:21:37.932553 Building ramdisk /var/lib/lava/dispatcher/tmp/9584152/extract-overlay-ramdisk-wd1atfpp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584152/extract-overlay-ramdisk-wd1atfpp/ramdisk
195 12:21:38.007106 >> 53575 blocks
196 12:21:38.853320 rename /var/lib/lava/dispatcher/tmp/9584152/extract-overlay-ramdisk-wd1atfpp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
197 12:21:38.853849 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 12:21:38.854029 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
199 12:21:38.854410 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
200 12:21:38.854550 No mkimage arch provided, not using FIT.
201 12:21:38.854684 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 12:21:38.854817 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 12:21:38.854966 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 12:21:38.855112 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
205 12:21:38.855236 No LXC device requested
206 12:21:38.855366 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 12:21:38.855504 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
208 12:21:38.855636 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 12:21:38.855747 Checking files for TFTP limit of 4294967296 bytes.
210 12:21:38.856279 end: 1 tftp-deploy (duration 00:00:02) [common]
211 12:21:38.856420 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 12:21:38.856560 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 12:21:38.856741 substitutions:
214 12:21:38.856846 - {DTB}: None
215 12:21:38.856953 - {INITRD}: 9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
216 12:21:38.857056 - {KERNEL}: 9584152/tftp-deploy-cur6swt1/kernel/bzImage
217 12:21:38.857156 - {LAVA_MAC}: None
218 12:21:38.857256 - {PRESEED_CONFIG}: None
219 12:21:38.857356 - {PRESEED_LOCAL}: None
220 12:21:38.857453 - {RAMDISK}: 9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
221 12:21:38.857552 - {ROOT_PART}: None
222 12:21:38.857652 - {ROOT}: None
223 12:21:38.857752 - {SERVER_IP}: 192.168.201.1
224 12:21:38.857852 - {TEE}: None
225 12:21:38.857949 Parsed boot commands:
226 12:21:38.858045 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 12:21:38.858280 Parsed boot commands: tftpboot 192.168.201.1 9584152/tftp-deploy-cur6swt1/kernel/bzImage 9584152/tftp-deploy-cur6swt1/kernel/cmdline 9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
228 12:21:38.858424 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 12:21:38.858562 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 12:21:38.858708 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 12:21:38.858845 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 12:21:38.858959 Not connected, no need to disconnect.
233 12:21:38.859083 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 12:21:38.859215 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 12:21:38.859327 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-3'
236 12:21:38.862913 Setting prompt string to ['lava-test: # ']
237 12:21:38.863324 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 12:21:38.863488 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 12:21:38.863634 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 12:21:38.863781 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 12:21:38.864063 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
242 12:21:43.994225 >> Command sent successfully.
243 12:21:43.996420 Returned 0 in 5 seconds
244 12:21:44.097230 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 12:21:44.097551 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 12:21:44.097651 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 12:21:44.097738 Setting prompt string to 'Starting depthcharge on Magolor...'
249 12:21:44.097805 Changing prompt to 'Starting depthcharge on Magolor...'
250 12:21:44.097876 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
251 12:21:44.098188 [Enter `^Ec?' for help]
252 12:21:45.239474
253 12:21:45.239625
254 12:21:45.250344 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
255 12:21:45.253865 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
256 12:21:45.257356 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
257 12:21:45.263842 CPU: AES supported, TXT NOT supported, VT supported
258 12:21:45.267292 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
259 12:21:45.273676 PCH: device id 4d87 (rev 01) is Jasperlake Super
260 12:21:45.276822 IGD: device id 4e55 (rev 01) is Jasperlake GT4
261 12:21:45.280462 VBOOT: Loading verstage.
262 12:21:45.286963 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 12:21:45.290100 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
264 12:21:45.294115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 12:21:45.301463 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
266 12:21:45.301565
267 12:21:45.301757
268 12:21:45.314899 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
269 12:21:45.328320 Probing TPM: . done!
270 12:21:45.331186 TPM ready after 0 ms
271 12:21:45.334817 Connected to device vid:did:rid of 1ae0:0028:00
272 12:21:45.345777 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
273 12:21:45.353113 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
274 12:21:45.451617 Initialized TPM device CR50 revision 0
275 12:21:45.462252 tlcl_send_startup: Startup return code is 0
276 12:21:45.462346 TPM: setup succeeded
277 12:21:45.476455 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 12:21:45.490365 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 12:21:45.502818 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
280 12:21:45.513162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 12:21:45.516423 Chrome EC: UHEPI supported
282 12:21:45.519468 Phase 1
283 12:21:45.523232 FMAP: area GBB found @ c05000 (12288 bytes)
284 12:21:45.529675 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
285 12:21:45.536135 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
286 12:21:45.539281 Recovery requested (1009000e)
287 12:21:45.549110 TPM: Extending digest for VBOOT: boot mode into PCR 0
288 12:21:45.555487 tlcl_extend: response is 0
289 12:21:45.562251 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
290 12:21:45.571440 tlcl_extend: response is 0
291 12:21:45.577932 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 12:21:45.581431 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
293 12:21:45.587963 BS: verstage times (exec / console): total (unknown) / 124 ms
294 12:21:45.591610
295 12:21:45.591700
296 12:21:45.600918 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
297 12:21:45.607860 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
298 12:21:45.611380 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
299 12:21:45.614602 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
300 12:21:45.620970 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
301 12:21:45.624603 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
302 12:21:45.627760 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
303 12:21:45.631020 TCO_STS: 0000 0001
304 12:21:45.634303 GEN_PMCON: d0015038 00002200
305 12:21:45.637452 GBLRST_CAUSE: 00000000 00000000
306 12:21:45.637541 prev_sleep_state 5
307 12:21:45.641603 Boot Count incremented to 8370
308 12:21:45.648466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
309 12:21:45.651362 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
310 12:21:45.655944 Chrome EC: UHEPI supported
311 12:21:45.662445 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
312 12:21:45.669746 Probing TPM: done!
313 12:21:45.676598 Connected to device vid:did:rid of 1ae0:0028:00
314 12:21:45.686323 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
315 12:21:45.692903 Initialized TPM device CR50 revision 0
316 12:21:45.703005 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 12:21:45.709728 MRC: Hash idx 0x100b comparison successful.
318 12:21:45.713140 MRC cache found, size 5458
319 12:21:45.713231 bootmode is set to: 2
320 12:21:45.716103 SPD INDEX = 0
321 12:21:45.719496 CBFS: Found 'spd.bin' @0x40c40 size 0x600
322 12:21:45.722569 SPD: module type is LPDDR4X
323 12:21:46.077675 SPD: module part number is MT53E512M32D2NP-046 WT:E
324 12:21:46.081690 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
325 12:21:46.089344 SPD: device width 16 bits, bus width 32 bits
326 12:21:46.092887 SPD: module size is 4096 MB (per channel)
327 12:21:46.095940 meminit_channels: DRAM half-populated
328 12:21:46.177016 CBMEM:
329 12:21:46.180610 IMD: root @ 0x76fff000 254 entries.
330 12:21:46.184172 IMD: root @ 0x76ffec00 62 entries.
331 12:21:46.187083 FMAP: area RO_VPD found @ c00000 (16384 bytes)
332 12:21:46.194012 WARNING: RO_VPD is uninitialized or empty.
333 12:21:46.197246 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
334 12:21:46.201027 External stage cache:
335 12:21:46.204040 IMD: root @ 0x7b3ff000 254 entries.
336 12:21:46.207453 IMD: root @ 0x7b3fec00 62 entries.
337 12:21:46.217553 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
338 12:21:46.224013 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
339 12:21:46.230904 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
340 12:21:46.238805 MRC: 'RECOVERY_MRC_CACHE' does not need update.
341 12:21:46.245613 cse_lite: Skip switching to RW in the recovery path
342 12:21:46.245766 1 DIMMs found
343 12:21:46.245844 SMM Memory Map
344 12:21:46.248966 SMRAM : 0x7b000000 0x800000
345 12:21:46.255391 Subregion 0: 0x7b000000 0x200000
346 12:21:46.258943 Subregion 1: 0x7b200000 0x200000
347 12:21:46.262428 Subregion 2: 0x7b400000 0x400000
348 12:21:46.262555 top_of_ram = 0x77000000
349 12:21:46.268691 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
350 12:21:46.275792 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
351 12:21:46.278755 MTRR Range: Start=ff000000 End=0 (Size 1000000)
352 12:21:46.285613 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
353 12:21:46.289078 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
354 12:21:46.300876 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
355 12:21:46.304176 Processing 188 relocs. Offset value of 0x74c0e000
356 12:21:46.314105 BS: romstage times (exec / console): total (unknown) / 255 ms
357 12:21:46.318916
358 12:21:46.319058
359 12:21:46.328623 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
360 12:21:46.332176 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 12:21:46.339029 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
362 12:21:46.345590 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
363 12:21:46.401497 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
364 12:21:46.407622 Processing 4805 relocs. Offset value of 0x75da8000
365 12:21:46.411012 BS: postcar times (exec / console): total (unknown) / 42 ms
366 12:21:46.414727
367 12:21:46.414815
368 12:21:46.424743 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
369 12:21:46.424834 Normal boot
370 12:21:46.428210 EC returned error result code 3
371 12:21:46.431507 FW_CONFIG value is 0x204
372 12:21:46.435046 GENERIC: 0.0 disabled by fw_config
373 12:21:46.441812 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:21:46.444657 I2C: 00:10 disabled by fw_config
375 12:21:46.448237 I2C: 00:10 disabled by fw_config
376 12:21:46.451531 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
377 12:21:46.458084 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 12:21:46.461448 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 12:21:46.467868 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 12:21:46.471373 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
381 12:21:46.474761 I2C: 00:10 disabled by fw_config
382 12:21:46.481029 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
383 12:21:46.487850 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
384 12:21:46.491156 I2C: 00:1a disabled by fw_config
385 12:21:46.494221 I2C: 00:1a disabled by fw_config
386 12:21:46.501254 fw_config match found: AUDIO_AMP=UNPROVISIONED
387 12:21:46.504785 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 12:21:46.507708 GENERIC: 0.0 disabled by fw_config
389 12:21:46.514120 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 12:21:46.517547 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
391 12:21:46.524643 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
392 12:21:46.527671 microcode: Update skipped, already up-to-date
393 12:21:46.534057 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
394 12:21:46.560172 Detected 2 core, 2 thread CPU.
395 12:21:46.563550 Setting up SMI for CPU
396 12:21:46.567061 IED base = 0x7b400000
397 12:21:46.567149 IED size = 0x00400000
398 12:21:46.570085 Will perform SMM setup.
399 12:21:46.573564 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
400 12:21:46.583163 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
401 12:21:46.586513 Processing 16 relocs. Offset value of 0x00030000
402 12:21:46.590109 Attempting to start 1 APs
403 12:21:46.593506 Waiting for 10ms after sending INIT.
404 12:21:46.609840 Waiting for 1st SIPI to complete...done.
405 12:21:46.609930 AP: slot 1 apic_id 2.
406 12:21:46.616591 Waiting for 2nd SIPI to complete...done.
407 12:21:46.623433 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
408 12:21:46.630487 Processing 13 relocs. Offset value of 0x00038000
409 12:21:46.630576 Unable to locate Global NVS
410 12:21:46.639782 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
411 12:21:46.643364 Installing permanent SMM handler to 0x7b000000
412 12:21:46.652896 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
413 12:21:46.656214 Processing 704 relocs. Offset value of 0x7b010000
414 12:21:46.663071 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
415 12:21:46.669532 Processing 13 relocs. Offset value of 0x7b008000
416 12:21:46.676414 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
417 12:21:46.679304 Unable to locate Global NVS
418 12:21:46.686317 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
419 12:21:46.689267 Clearing SMI status registers
420 12:21:46.689356 SMI_STS: PM1
421 12:21:46.692624 PM1_STS: PWRBTN
422 12:21:46.692712 TCO_STS: INTRD_DET
423 12:21:46.702588 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:21:46.702676 In relocation handler: CPU 0
425 12:21:46.709113 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:21:46.712509 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 12:21:46.715886 Relocation complete.
428 12:21:46.722645 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 12:21:46.725983 In relocation handler: CPU 1
430 12:21:46.729719 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 12:21:46.735643 Writing SMRR. base = 0x7b000006, mask=0xff800800
432 12:21:46.735732 Relocation complete.
433 12:21:46.739213 Initializing CPU #0
434 12:21:46.742409 CPU: vendor Intel device 906c0
435 12:21:46.745955 CPU: family 06, model 9c, stepping 00
436 12:21:46.748923 Clearing out pending MCEs
437 12:21:46.752157 Setting up local APIC...
438 12:21:46.752244 apic_id: 0x00 done.
439 12:21:46.755822 Turbo is available but hidden
440 12:21:46.758754 Turbo is available and visible
441 12:21:46.762676 microcode: Update skipped, already up-to-date
442 12:21:46.765581 CPU #0 initialized
443 12:21:46.769096 Initializing CPU #1
444 12:21:46.772394 CPU: vendor Intel device 906c0
445 12:21:46.775761 CPU: family 06, model 9c, stepping 00
446 12:21:46.778835 Clearing out pending MCEs
447 12:21:46.778924 Setting up local APIC...
448 12:21:46.782307 apic_id: 0x02 done.
449 12:21:46.785276 microcode: Update skipped, already up-to-date
450 12:21:46.788741 CPU #1 initialized
451 12:21:46.792182 bsp_do_flight_plan done after 173 msecs.
452 12:21:46.795607 CPU: frequency set to 2800 MHz
453 12:21:46.799276 Enabling SMIs.
454 12:21:46.805493 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
455 12:21:46.814401 Probing TPM: done!
456 12:21:46.820815 Connected to device vid:did:rid of 1ae0:0028:00
457 12:21:46.830588 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
458 12:21:46.834219 Initialized TPM device CR50 revision 0
459 12:21:46.837202 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
460 12:21:46.844848 Found a VBT of 7680 bytes after decompression
461 12:21:46.851118 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
462 12:21:46.885846 Detected 2 core, 2 thread CPU.
463 12:21:46.889467 Detected 2 core, 2 thread CPU.
464 12:21:47.251749 Display FSP Version Info HOB
465 12:21:47.254907 Reference Code - CPU = 8.7.22.30
466 12:21:47.258317 uCode Version = 24.0.0.1f
467 12:21:47.261465 TXT ACM version = ff.ff.ff.ffff
468 12:21:47.264642 Reference Code - ME = 8.7.22.30
469 12:21:47.267888 MEBx version = 0.0.0.0
470 12:21:47.271100 ME Firmware Version = Consumer SKU
471 12:21:47.274483 Reference Code - PCH = 8.7.22.30
472 12:21:47.277958 PCH-CRID Status = Disabled
473 12:21:47.281170 PCH-CRID Original Value = ff.ff.ff.ffff
474 12:21:47.284624 PCH-CRID New Value = ff.ff.ff.ffff
475 12:21:47.288189 OPROM - RST - RAID = ff.ff.ff.ffff
476 12:21:47.290765 PCH Hsio Version = 4.0.0.0
477 12:21:47.294626 Reference Code - SA - System Agent = 8.7.22.30
478 12:21:47.298113 Reference Code - MRC = 0.0.4.68
479 12:21:47.301104 SA - PCIe Version = 8.7.22.30
480 12:21:47.304740 SA-CRID Status = Disabled
481 12:21:47.307738 SA-CRID Original Value = 0.0.0.0
482 12:21:47.311407 SA-CRID New Value = 0.0.0.0
483 12:21:47.314367 OPROM - VBIOS = ff.ff.ff.ffff
484 12:21:47.317879 IO Manageability Engine FW Version = ff.ff.ff.ffff
485 12:21:47.321059 PHY Build Version = ff.ff.ff.ffff
486 12:21:47.327730 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
487 12:21:47.331220 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
488 12:21:47.334176 ITSS IRQ Polarities Before:
489 12:21:47.337900 IPC0: 0xffffffff
490 12:21:47.338498 IPC1: 0xffffffff
491 12:21:47.340848 IPC2: 0xffffffff
492 12:21:47.341437 IPC3: 0xffffffff
493 12:21:47.344177 ITSS IRQ Polarities After:
494 12:21:47.347707 IPC0: 0xffffffff
495 12:21:47.348273 IPC1: 0xffffffff
496 12:21:47.350644 IPC2: 0xffffffff
497 12:21:47.351092 IPC3: 0xffffffff
498 12:21:47.363762 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
499 12:21:47.370157 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
500 12:21:47.373522 Enumerating buses...
501 12:21:47.376906 Show all devs... Before device enumeration.
502 12:21:47.380315 Root Device: enabled 1
503 12:21:47.380824 CPU_CLUSTER: 0: enabled 1
504 12:21:47.383622 DOMAIN: 0000: enabled 1
505 12:21:47.386749 PCI: 00:00.0: enabled 1
506 12:21:47.390350 PCI: 00:02.0: enabled 1
507 12:21:47.390885 PCI: 00:04.0: enabled 1
508 12:21:47.393782 PCI: 00:05.0: enabled 1
509 12:21:47.396650 PCI: 00:09.0: enabled 0
510 12:21:47.400284 PCI: 00:12.6: enabled 0
511 12:21:47.400866 PCI: 00:14.0: enabled 1
512 12:21:47.403819 PCI: 00:14.1: enabled 0
513 12:21:47.406782 PCI: 00:14.2: enabled 0
514 12:21:47.410502 PCI: 00:14.3: enabled 1
515 12:21:47.411059 PCI: 00:14.5: enabled 1
516 12:21:47.413625 PCI: 00:15.0: enabled 1
517 12:21:47.417053 PCI: 00:15.1: enabled 1
518 12:21:47.419805 PCI: 00:15.2: enabled 1
519 12:21:47.420273 PCI: 00:15.3: enabled 1
520 12:21:47.423729 PCI: 00:16.0: enabled 1
521 12:21:47.426468 PCI: 00:16.1: enabled 0
522 12:21:47.426921 PCI: 00:16.4: enabled 0
523 12:21:47.429394 PCI: 00:16.5: enabled 0
524 12:21:47.432876 PCI: 00:17.0: enabled 0
525 12:21:47.436858 PCI: 00:19.0: enabled 1
526 12:21:47.437388 PCI: 00:19.1: enabled 0
527 12:21:47.439763 PCI: 00:19.2: enabled 1
528 12:21:47.442984 PCI: 00:1a.0: enabled 1
529 12:21:47.446110 PCI: 00:1c.0: enabled 0
530 12:21:47.446601 PCI: 00:1c.1: enabled 0
531 12:21:47.449527 PCI: 00:1c.2: enabled 0
532 12:21:47.453263 PCI: 00:1c.3: enabled 0
533 12:21:47.456168 PCI: 00:1c.4: enabled 0
534 12:21:47.456588 PCI: 00:1c.5: enabled 0
535 12:21:47.459122 PCI: 00:1c.6: enabled 0
536 12:21:47.462621 PCI: 00:1c.7: enabled 1
537 12:21:47.463042 PCI: 00:1e.0: enabled 0
538 12:21:47.466189 PCI: 00:1e.1: enabled 0
539 12:21:47.469444 PCI: 00:1e.2: enabled 1
540 12:21:47.472890 PCI: 00:1e.3: enabled 0
541 12:21:47.473434 PCI: 00:1f.0: enabled 1
542 12:21:47.476747 PCI: 00:1f.1: enabled 1
543 12:21:47.480066 PCI: 00:1f.2: enabled 1
544 12:21:47.482689 PCI: 00:1f.3: enabled 1
545 12:21:47.483150 PCI: 00:1f.4: enabled 0
546 12:21:47.485894 PCI: 00:1f.5: enabled 1
547 12:21:47.489162 PCI: 00:1f.7: enabled 0
548 12:21:47.492646 GENERIC: 0.0: enabled 1
549 12:21:47.493136 GENERIC: 0.0: enabled 1
550 12:21:47.495779 USB0 port 0: enabled 1
551 12:21:47.499345 GENERIC: 0.0: enabled 1
552 12:21:47.499765 I2C: 00:2c: enabled 1
553 12:21:47.502627 I2C: 00:15: enabled 1
554 12:21:47.506101 GENERIC: 0.0: enabled 0
555 12:21:47.506563 I2C: 00:15: enabled 1
556 12:21:47.509012 I2C: 00:10: enabled 0
557 12:21:47.512706 I2C: 00:10: enabled 0
558 12:21:47.513125 I2C: 00:2c: enabled 1
559 12:21:47.515624 I2C: 00:40: enabled 1
560 12:21:47.519198 I2C: 00:10: enabled 1
561 12:21:47.522283 I2C: 00:39: enabled 1
562 12:21:47.522798 I2C: 00:36: enabled 1
563 12:21:47.526050 I2C: 00:10: enabled 0
564 12:21:47.529073 I2C: 00:0c: enabled 1
565 12:21:47.529528 I2C: 00:50: enabled 1
566 12:21:47.532480 I2C: 00:1a: enabled 1
567 12:21:47.535497 I2C: 00:1a: enabled 0
568 12:21:47.535912 I2C: 00:1a: enabled 0
569 12:21:47.539259 I2C: 00:28: enabled 1
570 12:21:47.542304 I2C: 00:29: enabled 1
571 12:21:47.542719 PCI: 00:00.0: enabled 1
572 12:21:47.545837 SPI: 00: enabled 1
573 12:21:47.548758 PNP: 0c09.0: enabled 1
574 12:21:47.549173 GENERIC: 0.0: enabled 0
575 12:21:47.552383 USB2 port 0: enabled 1
576 12:21:47.555303 USB2 port 1: enabled 1
577 12:21:47.555716 USB2 port 2: enabled 1
578 12:21:47.558742 USB2 port 3: enabled 1
579 12:21:47.561714 USB2 port 4: enabled 0
580 12:21:47.565434 USB2 port 5: enabled 1
581 12:21:47.565851 USB2 port 6: enabled 0
582 12:21:47.568448 USB2 port 7: enabled 1
583 12:21:47.572122 USB3 port 0: enabled 1
584 12:21:47.572636 USB3 port 1: enabled 1
585 12:21:47.575158 USB3 port 2: enabled 1
586 12:21:47.578228 USB3 port 3: enabled 1
587 12:21:47.581674 APIC: 00: enabled 1
588 12:21:47.582090 APIC: 02: enabled 1
589 12:21:47.585537 Compare with tree...
590 12:21:47.586051 Root Device: enabled 1
591 12:21:47.588537 CPU_CLUSTER: 0: enabled 1
592 12:21:47.591998 APIC: 00: enabled 1
593 12:21:47.595294 APIC: 02: enabled 1
594 12:21:47.595709 DOMAIN: 0000: enabled 1
595 12:21:47.598202 PCI: 00:00.0: enabled 1
596 12:21:47.601758 PCI: 00:02.0: enabled 1
597 12:21:47.605109 PCI: 00:04.0: enabled 1
598 12:21:47.608600 GENERIC: 0.0: enabled 1
599 12:21:47.609272 PCI: 00:05.0: enabled 1
600 12:21:47.611449 GENERIC: 0.0: enabled 1
601 12:21:47.615062 PCI: 00:09.0: enabled 0
602 12:21:47.617961 PCI: 00:12.6: enabled 0
603 12:21:47.622001 PCI: 00:14.0: enabled 1
604 12:21:47.622560 USB0 port 0: enabled 1
605 12:21:47.624928 USB2 port 0: enabled 1
606 12:21:47.628609 USB2 port 1: enabled 1
607 12:21:47.631248 USB2 port 2: enabled 1
608 12:21:47.635000 USB2 port 3: enabled 1
609 12:21:47.638212 USB2 port 4: enabled 0
610 12:21:47.638764 USB2 port 5: enabled 1
611 12:21:47.641872 USB2 port 6: enabled 0
612 12:21:47.644833 USB2 port 7: enabled 1
613 12:21:47.648008 USB3 port 0: enabled 1
614 12:21:47.650929 USB3 port 1: enabled 1
615 12:21:47.654611 USB3 port 2: enabled 1
616 12:21:47.655063 USB3 port 3: enabled 1
617 12:21:47.658112 PCI: 00:14.1: enabled 0
618 12:21:47.661068 PCI: 00:14.2: enabled 0
619 12:21:47.664668 PCI: 00:14.3: enabled 1
620 12:21:47.667593 GENERIC: 0.0: enabled 1
621 12:21:47.668018 PCI: 00:14.5: enabled 1
622 12:21:47.671289 PCI: 00:15.0: enabled 1
623 12:21:47.674056 I2C: 00:2c: enabled 1
624 12:21:47.677823 I2C: 00:15: enabled 1
625 12:21:47.678403 PCI: 00:15.1: enabled 1
626 12:21:47.680684 PCI: 00:15.2: enabled 1
627 12:21:47.684564 GENERIC: 0.0: enabled 0
628 12:21:47.687516 I2C: 00:15: enabled 1
629 12:21:47.690582 I2C: 00:10: enabled 0
630 12:21:47.690998 I2C: 00:10: enabled 0
631 12:21:47.693621 I2C: 00:2c: enabled 1
632 12:21:47.697345 I2C: 00:40: enabled 1
633 12:21:47.700255 I2C: 00:10: enabled 1
634 12:21:47.703506 I2C: 00:39: enabled 1
635 12:21:47.703938 PCI: 00:15.3: enabled 1
636 12:21:47.706782 I2C: 00:36: enabled 1
637 12:21:47.710085 I2C: 00:10: enabled 0
638 12:21:47.713737 I2C: 00:0c: enabled 1
639 12:21:47.714187 I2C: 00:50: enabled 1
640 12:21:47.717147 PCI: 00:16.0: enabled 1
641 12:21:47.720623 PCI: 00:16.1: enabled 0
642 12:21:47.723390 PCI: 00:16.4: enabled 0
643 12:21:47.727189 PCI: 00:16.5: enabled 0
644 12:21:47.727704 PCI: 00:17.0: enabled 0
645 12:21:47.729945 PCI: 00:19.0: enabled 1
646 12:21:47.733643 I2C: 00:1a: enabled 1
647 12:21:47.736693 I2C: 00:1a: enabled 0
648 12:21:47.737110 I2C: 00:1a: enabled 0
649 12:21:47.740559 I2C: 00:28: enabled 1
650 12:21:47.743269 I2C: 00:29: enabled 1
651 12:21:47.746475 PCI: 00:19.1: enabled 0
652 12:21:47.749883 PCI: 00:19.2: enabled 1
653 12:21:47.750387 PCI: 00:1a.0: enabled 1
654 12:21:47.753414 PCI: 00:1e.0: enabled 0
655 12:21:47.756311 PCI: 00:1e.1: enabled 0
656 12:21:47.759564 PCI: 00:1e.2: enabled 1
657 12:21:47.759980 SPI: 00: enabled 1
658 12:21:47.762889 PCI: 00:1e.3: enabled 0
659 12:21:47.766311 PCI: 00:1f.0: enabled 1
660 12:21:47.769723 PNP: 0c09.0: enabled 1
661 12:21:47.772870 PCI: 00:1f.1: enabled 1
662 12:21:47.773290 PCI: 00:1f.2: enabled 1
663 12:21:47.776574 PCI: 00:1f.3: enabled 1
664 12:21:47.779556 GENERIC: 0.0: enabled 0
665 12:21:47.783550 PCI: 00:1f.4: enabled 0
666 12:21:47.786319 PCI: 00:1f.5: enabled 1
667 12:21:47.786866 PCI: 00:1f.7: enabled 0
668 12:21:47.789665 Root Device scanning...
669 12:21:47.792711 scan_static_bus for Root Device
670 12:21:47.796636 CPU_CLUSTER: 0 enabled
671 12:21:47.799669 DOMAIN: 0000 enabled
672 12:21:47.800237 DOMAIN: 0000 scanning...
673 12:21:47.803161 PCI: pci_scan_bus for bus 00
674 12:21:47.806539 PCI: 00:00.0 [8086/0000] ops
675 12:21:47.810239 PCI: 00:00.0 [8086/4e22] enabled
676 12:21:47.812594 PCI: 00:02.0 [8086/0000] bus ops
677 12:21:47.816468 PCI: 00:02.0 [8086/4e55] enabled
678 12:21:47.819353 PCI: 00:04.0 [8086/0000] bus ops
679 12:21:47.822800 PCI: 00:04.0 [8086/4e03] enabled
680 12:21:47.826539 PCI: 00:05.0 [8086/0000] bus ops
681 12:21:47.830314 PCI: 00:05.0 [8086/4e19] enabled
682 12:21:47.832704 PCI: 00:08.0 [8086/4e11] enabled
683 12:21:47.836714 PCI: 00:14.0 [8086/0000] bus ops
684 12:21:47.839341 PCI: 00:14.0 [8086/4ded] enabled
685 12:21:47.843100 PCI: 00:14.2 [8086/4def] disabled
686 12:21:47.846308 PCI: 00:14.3 [8086/0000] bus ops
687 12:21:47.849532 PCI: 00:14.3 [8086/4df0] enabled
688 12:21:47.853117 PCI: 00:14.5 [8086/0000] ops
689 12:21:47.856589 PCI: 00:14.5 [8086/4df8] enabled
690 12:21:47.859386 PCI: 00:15.0 [8086/0000] bus ops
691 12:21:47.862830 PCI: 00:15.0 [8086/4de8] enabled
692 12:21:47.865984 PCI: 00:15.1 [8086/0000] bus ops
693 12:21:47.869446 PCI: 00:15.1 [8086/4de9] enabled
694 12:21:47.873475 PCI: 00:15.2 [8086/0000] bus ops
695 12:21:47.876137 PCI: 00:15.2 [8086/4dea] enabled
696 12:21:47.879084 PCI: 00:15.3 [8086/0000] bus ops
697 12:21:47.882893 PCI: 00:15.3 [8086/4deb] enabled
698 12:21:47.886406 PCI: 00:16.0 [8086/0000] ops
699 12:21:47.889933 PCI: 00:16.0 [8086/4de0] enabled
700 12:21:47.892625 PCI: 00:19.0 [8086/0000] bus ops
701 12:21:47.896533 PCI: 00:19.0 [8086/4dc5] enabled
702 12:21:47.899070 PCI: 00:19.2 [8086/0000] ops
703 12:21:47.902339 PCI: 00:19.2 [8086/4dc7] enabled
704 12:21:47.905684 PCI: 00:1a.0 [8086/0000] ops
705 12:21:47.908895 PCI: 00:1a.0 [8086/4dc4] enabled
706 12:21:47.909345 PCI: 00:1e.0 [8086/0000] ops
707 12:21:47.916004 PCI: 00:1e.0 [8086/4da8] disabled
708 12:21:47.918967 PCI: 00:1e.2 [8086/0000] bus ops
709 12:21:47.919384 PCI: 00:1e.2 [8086/4daa] enabled
710 12:21:47.922308 PCI: 00:1f.0 [8086/0000] bus ops
711 12:21:47.926178 PCI: 00:1f.0 [8086/4d87] enabled
712 12:21:47.932320 PCI: Static device PCI: 00:1f.1 not found, disabling it.
713 12:21:47.936039 RTC Init
714 12:21:47.939081 Set power on after power failure.
715 12:21:47.939495 Disabling Deep S3
716 12:21:47.942607 Disabling Deep S3
717 12:21:47.943021 Disabling Deep S4
718 12:21:47.945994 Disabling Deep S4
719 12:21:47.946553 Disabling Deep S5
720 12:21:47.949217 Disabling Deep S5
721 12:21:47.952303 PCI: 00:1f.2 [0000/0000] hidden
722 12:21:47.956016 PCI: 00:1f.3 [8086/0000] bus ops
723 12:21:47.959674 PCI: 00:1f.3 [8086/4dc8] enabled
724 12:21:47.962221 PCI: 00:1f.5 [8086/0000] bus ops
725 12:21:47.970473 PCI: 00:1f.5 [8086/4da4] enabled
726 12:21:47.970901 PCI: Leftover static devices:
727 12:21:47.971233 PCI: 00:12.6
728 12:21:47.972288 PCI: 00:09.0
729 12:21:47.972704 PCI: 00:14.1
730 12:21:47.973035 PCI: 00:16.1
731 12:21:47.975509 PCI: 00:16.4
732 12:21:47.975928 PCI: 00:16.5
733 12:21:47.979049 PCI: 00:17.0
734 12:21:47.979462 PCI: 00:19.1
735 12:21:47.982109 PCI: 00:1e.1
736 12:21:47.982549 PCI: 00:1e.3
737 12:21:47.982879 PCI: 00:1f.1
738 12:21:47.985674 PCI: 00:1f.4
739 12:21:47.986086 PCI: 00:1f.7
740 12:21:47.989306 PCI: Check your devicetree.cb.
741 12:21:47.992122 PCI: 00:02.0 scanning...
742 12:21:47.995661 scan_generic_bus for PCI: 00:02.0
743 12:21:47.998598 scan_generic_bus for PCI: 00:02.0 done
744 12:21:48.005732 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
745 12:21:48.006308 PCI: 00:04.0 scanning...
746 12:21:48.008410 scan_generic_bus for PCI: 00:04.0
747 12:21:48.011939 GENERIC: 0.0 enabled
748 12:21:48.018700 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
749 12:21:48.021897 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
750 12:21:48.025696 PCI: 00:05.0 scanning...
751 12:21:48.028631 scan_generic_bus for PCI: 00:05.0
752 12:21:48.031950 GENERIC: 0.0 enabled
753 12:21:48.038221 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
754 12:21:48.042020 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
755 12:21:48.045179 PCI: 00:14.0 scanning...
756 12:21:48.048515 scan_static_bus for PCI: 00:14.0
757 12:21:48.051827 USB0 port 0 enabled
758 12:21:48.052256 USB0 port 0 scanning...
759 12:21:48.054835 scan_static_bus for USB0 port 0
760 12:21:48.058120 USB2 port 0 enabled
761 12:21:48.061892 USB2 port 1 enabled
762 12:21:48.062361 USB2 port 2 enabled
763 12:21:48.064752 USB2 port 3 enabled
764 12:21:48.065209 USB2 port 4 disabled
765 12:21:48.068187 USB2 port 5 enabled
766 12:21:48.071650 USB2 port 6 disabled
767 12:21:48.072072 USB2 port 7 enabled
768 12:21:48.074365 USB3 port 0 enabled
769 12:21:48.078358 USB3 port 1 enabled
770 12:21:48.078780 USB3 port 2 enabled
771 12:21:48.081650 USB3 port 3 enabled
772 12:21:48.082068 USB2 port 0 scanning...
773 12:21:48.084962 scan_static_bus for USB2 port 0
774 12:21:48.091218 scan_static_bus for USB2 port 0 done
775 12:21:48.094823 scan_bus: bus USB2 port 0 finished in 6 msecs
776 12:21:48.098194 USB2 port 1 scanning...
777 12:21:48.101058 scan_static_bus for USB2 port 1
778 12:21:48.104415 scan_static_bus for USB2 port 1 done
779 12:21:48.108022 scan_bus: bus USB2 port 1 finished in 6 msecs
780 12:21:48.111466 USB2 port 2 scanning...
781 12:21:48.114168 scan_static_bus for USB2 port 2
782 12:21:48.117839 scan_static_bus for USB2 port 2 done
783 12:21:48.121331 scan_bus: bus USB2 port 2 finished in 6 msecs
784 12:21:48.124223 USB2 port 3 scanning...
785 12:21:48.127462 scan_static_bus for USB2 port 3
786 12:21:48.131162 scan_static_bus for USB2 port 3 done
787 12:21:48.137460 scan_bus: bus USB2 port 3 finished in 6 msecs
788 12:21:48.137557 USB2 port 5 scanning...
789 12:21:48.141389 scan_static_bus for USB2 port 5
790 12:21:48.147851 scan_static_bus for USB2 port 5 done
791 12:21:48.150648 scan_bus: bus USB2 port 5 finished in 6 msecs
792 12:21:48.154321 USB2 port 7 scanning...
793 12:21:48.157273 scan_static_bus for USB2 port 7
794 12:21:48.160739 scan_static_bus for USB2 port 7 done
795 12:21:48.164230 scan_bus: bus USB2 port 7 finished in 6 msecs
796 12:21:48.167118 USB3 port 0 scanning...
797 12:21:48.170665 scan_static_bus for USB3 port 0
798 12:21:48.173733 scan_static_bus for USB3 port 0 done
799 12:21:48.177216 scan_bus: bus USB3 port 0 finished in 6 msecs
800 12:21:48.180517 USB3 port 1 scanning...
801 12:21:48.183962 scan_static_bus for USB3 port 1
802 12:21:48.187441 scan_static_bus for USB3 port 1 done
803 12:21:48.237263 scan_bus: bus USB3 port 1 finished in 6 msecs
804 12:21:48.237425 USB3 port 2 scanning...
805 12:21:48.237500 scan_static_bus for USB3 port 2
806 12:21:48.237766 scan_static_bus for USB3 port 2 done
807 12:21:48.237841 scan_bus: bus USB3 port 2 finished in 6 msecs
808 12:21:48.237904 USB3 port 3 scanning...
809 12:21:48.237967 scan_static_bus for USB3 port 3
810 12:21:48.238027 scan_static_bus for USB3 port 3 done
811 12:21:48.238272 scan_bus: bus USB3 port 3 finished in 6 msecs
812 12:21:48.238339 scan_static_bus for USB0 port 0 done
813 12:21:48.238399 scan_bus: bus USB0 port 0 finished in 172 msecs
814 12:21:48.238640 scan_static_bus for PCI: 00:14.0 done
815 12:21:48.238705 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
816 12:21:48.287692 PCI: 00:14.3 scanning...
817 12:21:48.287886 scan_static_bus for PCI: 00:14.3
818 12:21:48.288197 GENERIC: 0.0 enabled
819 12:21:48.288300 scan_static_bus for PCI: 00:14.3 done
820 12:21:48.288396 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
821 12:21:48.288460 PCI: 00:15.0 scanning...
822 12:21:48.288523 scan_static_bus for PCI: 00:15.0
823 12:21:48.288585 I2C: 00:2c enabled
824 12:21:48.288650 I2C: 00:15 enabled
825 12:21:48.288710 scan_static_bus for PCI: 00:15.0 done
826 12:21:48.288959 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
827 12:21:48.289028 PCI: 00:15.1 scanning...
828 12:21:48.289089 scan_static_bus for PCI: 00:15.1
829 12:21:48.289148 scan_static_bus for PCI: 00:15.1 done
830 12:21:48.289220 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
831 12:21:48.334530 PCI: 00:15.2 scanning...
832 12:21:48.334672 scan_static_bus for PCI: 00:15.2
833 12:21:48.335181 GENERIC: 0.0 disabled
834 12:21:48.335296 I2C: 00:15 enabled
835 12:21:48.335404 I2C: 00:10 disabled
836 12:21:48.335664 I2C: 00:10 disabled
837 12:21:48.335735 I2C: 00:2c enabled
838 12:21:48.335797 I2C: 00:40 enabled
839 12:21:48.335859 I2C: 00:10 enabled
840 12:21:48.335918 I2C: 00:39 enabled
841 12:21:48.335977 scan_static_bus for PCI: 00:15.2 done
842 12:21:48.336036 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
843 12:21:48.336094 PCI: 00:15.3 scanning...
844 12:21:48.336150 scan_static_bus for PCI: 00:15.3
845 12:21:48.336207 I2C: 00:36 enabled
846 12:21:48.336447 I2C: 00:10 disabled
847 12:21:48.336509 I2C: 00:0c enabled
848 12:21:48.336566 I2C: 00:50 enabled
849 12:21:48.339261 scan_static_bus for PCI: 00:15.3 done
850 12:21:48.342107 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
851 12:21:48.342205 PCI: 00:19.0 scanning...
852 12:21:48.345855 scan_static_bus for PCI: 00:19.0
853 12:21:48.349168 I2C: 00:1a enabled
854 12:21:48.352177 I2C: 00:1a disabled
855 12:21:48.352271 I2C: 00:1a disabled
856 12:21:48.355561 I2C: 00:28 enabled
857 12:21:48.355657 I2C: 00:29 enabled
858 12:21:48.362070 scan_static_bus for PCI: 00:19.0 done
859 12:21:48.365621 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
860 12:21:48.368698 PCI: 00:1e.2 scanning...
861 12:21:48.372321 scan_generic_bus for PCI: 00:1e.2
862 12:21:48.372410 SPI: 00 enabled
863 12:21:48.378763 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
864 12:21:48.385427 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
865 12:21:48.385520 PCI: 00:1f.0 scanning...
866 12:21:48.388953 scan_static_bus for PCI: 00:1f.0
867 12:21:48.392273 PNP: 0c09.0 enabled
868 12:21:48.395625 PNP: 0c09.0 scanning...
869 12:21:48.399073 scan_static_bus for PNP: 0c09.0
870 12:21:48.402106 scan_static_bus for PNP: 0c09.0 done
871 12:21:48.405594 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
872 12:21:48.408548 scan_static_bus for PCI: 00:1f.0 done
873 12:21:48.415442 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
874 12:21:48.418794 PCI: 00:1f.3 scanning...
875 12:21:48.421824 scan_static_bus for PCI: 00:1f.3
876 12:21:48.421912 GENERIC: 0.0 disabled
877 12:21:48.425261 scan_static_bus for PCI: 00:1f.3 done
878 12:21:48.431659 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
879 12:21:48.435097 PCI: 00:1f.5 scanning...
880 12:21:48.438414 scan_generic_bus for PCI: 00:1f.5
881 12:21:48.442008 scan_generic_bus for PCI: 00:1f.5 done
882 12:21:48.444929 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
883 12:21:48.451451 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
884 12:21:48.455075 scan_static_bus for Root Device done
885 12:21:48.458463 scan_bus: bus Root Device finished in 664 msecs
886 12:21:48.461660 done
887 12:21:48.465069 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
888 12:21:48.468348 Chrome EC: UHEPI supported
889 12:21:48.474805 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
890 12:21:48.481620 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
891 12:21:48.484931 SPI flash protection: WPSW=0 SRP0=1
892 12:21:48.491209 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
893 12:21:48.494697 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
894 12:21:48.498110 found VGA at PCI: 00:02.0
895 12:21:48.501418 Setting up VGA for PCI: 00:02.0
896 12:21:48.507789 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
897 12:21:48.511227 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
898 12:21:48.514811 Allocating resources...
899 12:21:48.517692 Reading resources...
900 12:21:48.521205 Root Device read_resources bus 0 link: 0
901 12:21:48.524304 CPU_CLUSTER: 0 read_resources bus 0 link: 0
902 12:21:48.530887 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
903 12:21:48.534409 DOMAIN: 0000 read_resources bus 0 link: 0
904 12:21:48.540935 PCI: 00:04.0 read_resources bus 1 link: 0
905 12:21:48.544374 PCI: 00:04.0 read_resources bus 1 link: 0 done
906 12:21:48.547324 PCI: 00:05.0 read_resources bus 2 link: 0
907 12:21:48.554388 PCI: 00:05.0 read_resources bus 2 link: 0 done
908 12:21:48.557892 PCI: 00:14.0 read_resources bus 0 link: 0
909 12:21:48.564544 USB0 port 0 read_resources bus 0 link: 0
910 12:21:48.571001 USB0 port 0 read_resources bus 0 link: 0 done
911 12:21:48.574124 PCI: 00:14.0 read_resources bus 0 link: 0 done
912 12:21:48.577405 PCI: 00:14.3 read_resources bus 0 link: 0
913 12:21:48.584340 PCI: 00:14.3 read_resources bus 0 link: 0 done
914 12:21:48.587573 PCI: 00:15.0 read_resources bus 0 link: 0
915 12:21:48.593884 PCI: 00:15.0 read_resources bus 0 link: 0 done
916 12:21:48.597238 PCI: 00:15.2 read_resources bus 0 link: 0
917 12:21:48.604818 PCI: 00:15.2 read_resources bus 0 link: 0 done
918 12:21:48.607715 PCI: 00:15.3 read_resources bus 0 link: 0
919 12:21:48.614782 PCI: 00:15.3 read_resources bus 0 link: 0 done
920 12:21:48.618074 PCI: 00:19.0 read_resources bus 0 link: 0
921 12:21:48.624229 PCI: 00:19.0 read_resources bus 0 link: 0 done
922 12:21:48.627858 PCI: 00:1e.2 read_resources bus 3 link: 0
923 12:21:48.634632 PCI: 00:1e.2 read_resources bus 3 link: 0 done
924 12:21:48.637524 PCI: 00:1f.0 read_resources bus 0 link: 0
925 12:21:48.644502 PCI: 00:1f.0 read_resources bus 0 link: 0 done
926 12:21:48.647362 PCI: 00:1f.3 read_resources bus 0 link: 0
927 12:21:48.654162 PCI: 00:1f.3 read_resources bus 0 link: 0 done
928 12:21:48.657402 DOMAIN: 0000 read_resources bus 0 link: 0 done
929 12:21:48.664022 Root Device read_resources bus 0 link: 0 done
930 12:21:48.664163 Done reading resources.
931 12:21:48.670780 Show resources in subtree (Root Device)...After reading.
932 12:21:48.673952 Root Device child on link 0 CPU_CLUSTER: 0
933 12:21:48.680533 CPU_CLUSTER: 0 child on link 0 APIC: 00
934 12:21:48.680655 APIC: 00
935 12:21:48.680751 APIC: 02
936 12:21:48.687055 DOMAIN: 0000 child on link 0 PCI: 00:00.0
937 12:21:48.693663 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
938 12:21:48.703976 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
939 12:21:48.707402 PCI: 00:00.0
940 12:21:48.717157 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
941 12:21:48.727057 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
942 12:21:48.737167 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
943 12:21:48.743758 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
944 12:21:48.753716 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
945 12:21:48.763426 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
946 12:21:48.773466 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
947 12:21:48.783294 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
948 12:21:48.790177 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
949 12:21:48.799657 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
950 12:21:48.809658 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
951 12:21:48.819797 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
952 12:21:48.830001 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
953 12:21:48.836276 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
954 12:21:48.846260 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
955 12:21:48.856001 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
956 12:21:48.866007 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
957 12:21:48.875983 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
958 12:21:48.885865 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
959 12:21:48.886432 PCI: 00:02.0
960 12:21:48.895825 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
961 12:21:48.905499 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
962 12:21:48.915652 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
963 12:21:48.918994 PCI: 00:04.0 child on link 0 GENERIC: 0.0
964 12:21:48.929011 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
965 12:21:48.931944 GENERIC: 0.0
966 12:21:48.935257 PCI: 00:05.0 child on link 0 GENERIC: 0.0
967 12:21:48.945040 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
968 12:21:48.949129 GENERIC: 0.0
969 12:21:48.949540 PCI: 00:08.0
970 12:21:48.958993 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
971 12:21:48.965361 PCI: 00:14.0 child on link 0 USB0 port 0
972 12:21:48.975291 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
973 12:21:48.978289 USB0 port 0 child on link 0 USB2 port 0
974 12:21:48.978812 USB2 port 0
975 12:21:48.981717 USB2 port 1
976 12:21:48.985235 USB2 port 2
977 12:21:48.985645 USB2 port 3
978 12:21:48.988415 USB2 port 4
979 12:21:48.988944 USB2 port 5
980 12:21:48.991555 USB2 port 6
981 12:21:48.991961 USB2 port 7
982 12:21:48.994806 USB3 port 0
983 12:21:48.995210 USB3 port 1
984 12:21:48.998611 USB3 port 2
985 12:21:48.999091 USB3 port 3
986 12:21:49.001905 PCI: 00:14.2
987 12:21:49.005178 PCI: 00:14.3 child on link 0 GENERIC: 0.0
988 12:21:49.014981 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
989 12:21:49.018415 GENERIC: 0.0
990 12:21:49.018857 PCI: 00:14.5
991 12:21:49.028640 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 12:21:49.031250 PCI: 00:15.0 child on link 0 I2C: 00:2c
993 12:21:49.041638 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 12:21:49.044638 I2C: 00:2c
995 12:21:49.045158 I2C: 00:15
996 12:21:49.048040 PCI: 00:15.1
997 12:21:49.057747 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 12:21:49.061435 PCI: 00:15.2 child on link 0 GENERIC: 0.0
999 12:21:49.071159 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1000 12:21:49.074556 GENERIC: 0.0
1001 12:21:49.075074 I2C: 00:15
1002 12:21:49.078123 I2C: 00:10
1003 12:21:49.078611 I2C: 00:10
1004 12:21:49.081050 I2C: 00:2c
1005 12:21:49.081502 I2C: 00:40
1006 12:21:49.084727 I2C: 00:10
1007 12:21:49.085248 I2C: 00:39
1008 12:21:49.087545 PCI: 00:15.3 child on link 0 I2C: 00:36
1009 12:21:49.098261 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 12:21:49.101251 I2C: 00:36
1011 12:21:49.101696 I2C: 00:10
1012 12:21:49.104281 I2C: 00:0c
1013 12:21:49.104734 I2C: 00:50
1014 12:21:49.107587 PCI: 00:16.0
1015 12:21:49.117856 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1016 12:21:49.121215 PCI: 00:19.0 child on link 0 I2C: 00:1a
1017 12:21:49.130999 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1018 12:21:49.131525 I2C: 00:1a
1019 12:21:49.134157 I2C: 00:1a
1020 12:21:49.134607 I2C: 00:1a
1021 12:21:49.137241 I2C: 00:28
1022 12:21:49.137687 I2C: 00:29
1023 12:21:49.140883 PCI: 00:19.2
1024 12:21:49.150800 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1025 12:21:49.160925 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1026 12:21:49.164301 PCI: 00:1a.0
1027 12:21:49.174206 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1028 12:21:49.174825 PCI: 00:1e.0
1029 12:21:49.177031 PCI: 00:1e.2 child on link 0 SPI: 00
1030 12:21:49.187095 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 12:21:49.190357 SPI: 00
1032 12:21:49.193871 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1033 12:21:49.203439 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1034 12:21:49.203897 PNP: 0c09.0
1035 12:21:49.213435 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1036 12:21:49.214028 PCI: 00:1f.2
1037 12:21:49.223355 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1038 12:21:49.233233 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1039 12:21:49.237112 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1040 12:21:49.246648 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1041 12:21:49.256680 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1042 12:21:49.260062 GENERIC: 0.0
1043 12:21:49.260521 PCI: 00:1f.5
1044 12:21:49.269848 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1045 12:21:49.276477 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1046 12:21:49.286441 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1047 12:21:49.292710 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1048 12:21:49.299594 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1049 12:21:49.306690 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1050 12:21:49.313374 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1051 12:21:49.315892 DOMAIN: 0000: Resource ranges:
1052 12:21:49.319404 * Base: 1000, Size: 800, Tag: 100
1053 12:21:49.322659 * Base: 1900, Size: e700, Tag: 100
1054 12:21:49.329502 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1055 12:21:49.336070 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1056 12:21:49.342277 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1057 12:21:49.349226 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1058 12:21:49.358837 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1059 12:21:49.366012 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1060 12:21:49.372118 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1061 12:21:49.382272 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1062 12:21:49.389026 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1063 12:21:49.395863 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1064 12:21:49.406359 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1065 12:21:49.412353 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1066 12:21:49.418822 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1067 12:21:49.428517 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1068 12:21:49.435100 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1069 12:21:49.442112 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1070 12:21:49.451913 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1071 12:21:49.458185 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1072 12:21:49.464874 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1073 12:21:49.474662 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1074 12:21:49.481144 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1075 12:21:49.488173 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1076 12:21:49.497786 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1077 12:21:49.504505 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1078 12:21:49.507997 DOMAIN: 0000: Resource ranges:
1079 12:21:49.511407 * Base: 7fc00000, Size: 40400000, Tag: 200
1080 12:21:49.517740 * Base: d0000000, Size: 2b000000, Tag: 200
1081 12:21:49.520705 * Base: fb001000, Size: 2fff000, Tag: 200
1082 12:21:49.524113 * Base: fe010000, Size: 22000, Tag: 200
1083 12:21:49.527598 * Base: fe033000, Size: a4d000, Tag: 200
1084 12:21:49.534390 * Base: fea88000, Size: 2f8000, Tag: 200
1085 12:21:49.537456 * Base: fed88000, Size: 8000, Tag: 200
1086 12:21:49.540802 * Base: fed93000, Size: d000, Tag: 200
1087 12:21:49.544425 * Base: feda2000, Size: 125e000, Tag: 200
1088 12:21:49.550802 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1089 12:21:49.557326 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1090 12:21:49.563885 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1091 12:21:49.570159 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1092 12:21:49.576906 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1093 12:21:49.583845 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1094 12:21:49.590232 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1095 12:21:49.596550 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1096 12:21:49.603540 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1097 12:21:49.610028 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1098 12:21:49.616584 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1099 12:21:49.623108 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1100 12:21:49.629564 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1101 12:21:49.636442 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1102 12:21:49.642757 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1103 12:21:49.649755 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1104 12:21:49.656454 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1105 12:21:49.662905 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1106 12:21:49.669124 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1107 12:21:49.676025 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1108 12:21:49.682585 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1109 12:21:49.689797 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1110 12:21:49.696123 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1111 12:21:49.702506 Root Device assign_resources, bus 0 link: 0
1112 12:21:49.705896 DOMAIN: 0000 assign_resources, bus 0 link: 0
1113 12:21:49.715691 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1114 12:21:49.722234 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1115 12:21:49.732423 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1116 12:21:49.738827 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1117 12:21:49.742179 PCI: 00:04.0 assign_resources, bus 1 link: 0
1118 12:21:49.748631 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 12:21:49.755404 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1120 12:21:49.761801 PCI: 00:05.0 assign_resources, bus 2 link: 0
1121 12:21:49.765045 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 12:21:49.771764 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1123 12:21:49.781812 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1124 12:21:49.784972 PCI: 00:14.0 assign_resources, bus 0 link: 0
1125 12:21:49.791895 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 12:21:49.798164 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1127 12:21:49.801751 PCI: 00:14.3 assign_resources, bus 0 link: 0
1128 12:21:49.808728 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 12:21:49.815037 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1130 12:21:49.824956 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1131 12:21:49.828596 PCI: 00:15.0 assign_resources, bus 0 link: 0
1132 12:21:49.834836 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 12:21:49.841917 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1134 12:21:49.847930 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1135 12:21:49.854886 PCI: 00:15.2 assign_resources, bus 0 link: 0
1136 12:21:49.857650 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 12:21:49.867994 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1138 12:21:49.871150 PCI: 00:15.3 assign_resources, bus 0 link: 0
1139 12:21:49.874676 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 12:21:49.884887 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1141 12:21:49.891179 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1142 12:21:49.897448 PCI: 00:19.0 assign_resources, bus 0 link: 0
1143 12:21:49.900925 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 12:21:49.911157 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1145 12:21:49.917774 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1146 12:21:49.927586 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1147 12:21:49.930664 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1148 12:21:49.934087 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 12:21:49.941093 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1150 12:21:49.943843 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 12:21:49.950542 LPC: Trying to open IO window from 800 size 1ff
1152 12:21:49.957641 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1153 12:21:49.967103 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1154 12:21:49.970524 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1155 12:21:49.973842 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 12:21:49.983733 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1157 12:21:49.987218 DOMAIN: 0000 assign_resources, bus 0 link: 0
1158 12:21:49.990509 Root Device assign_resources, bus 0 link: 0
1159 12:21:49.993491 Done setting resources.
1160 12:21:49.999938 Show resources in subtree (Root Device)...After assigning values.
1161 12:21:50.003726 Root Device child on link 0 CPU_CLUSTER: 0
1162 12:21:50.010213 CPU_CLUSTER: 0 child on link 0 APIC: 00
1163 12:21:50.010760 APIC: 00
1164 12:21:50.013444 APIC: 02
1165 12:21:50.017184 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:21:50.026762 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:21:50.036846 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:21:50.037364 PCI: 00:00.0
1169 12:21:50.046912 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:21:50.056319 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:21:50.066323 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:21:50.072848 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:21:50.082506 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:21:50.092947 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:21:50.102854 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:21:50.112999 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:21:50.122504 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:21:50.128990 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:21:50.139529 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:21:50.149005 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:21:50.159202 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:21:50.165391 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:21:50.175238 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:21:50.185430 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:21:50.195424 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:21:50.205087 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:21:50.215031 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:21:50.215647 PCI: 00:02.0
1189 12:21:50.228136 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1190 12:21:50.238016 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1191 12:21:50.248261 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1192 12:21:50.251555 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1193 12:21:50.261569 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1194 12:21:50.264945 GENERIC: 0.0
1195 12:21:50.268524 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1196 12:21:50.277694 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1197 12:21:50.281153 GENERIC: 0.0
1198 12:21:50.281612 PCI: 00:08.0
1199 12:21:50.290880 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1200 12:21:50.297539 PCI: 00:14.0 child on link 0 USB0 port 0
1201 12:21:50.308066 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1202 12:21:50.310963 USB0 port 0 child on link 0 USB2 port 0
1203 12:21:50.314385 USB2 port 0
1204 12:21:50.314839 USB2 port 1
1205 12:21:50.317382 USB2 port 2
1206 12:21:50.317838 USB2 port 3
1207 12:21:50.321074 USB2 port 4
1208 12:21:50.321525 USB2 port 5
1209 12:21:50.324415 USB2 port 6
1210 12:21:50.324873 USB2 port 7
1211 12:21:50.327753 USB3 port 0
1212 12:21:50.328209 USB3 port 1
1213 12:21:50.331366 USB3 port 2
1214 12:21:50.331931 USB3 port 3
1215 12:21:50.334221 PCI: 00:14.2
1216 12:21:50.337564 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1217 12:21:50.347685 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1218 12:21:50.351074 GENERIC: 0.0
1219 12:21:50.351534 PCI: 00:14.5
1220 12:21:50.364003 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1221 12:21:50.367299 PCI: 00:15.0 child on link 0 I2C: 00:2c
1222 12:21:50.377100 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1223 12:21:50.377652 I2C: 00:2c
1224 12:21:50.380518 I2C: 00:15
1225 12:21:50.381000 PCI: 00:15.1
1226 12:21:50.390528 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1227 12:21:50.397468 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1228 12:21:50.407293 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1229 12:21:50.407812 GENERIC: 0.0
1230 12:21:50.410804 I2C: 00:15
1231 12:21:50.411258 I2C: 00:10
1232 12:21:50.413586 I2C: 00:10
1233 12:21:50.414112 I2C: 00:2c
1234 12:21:50.417174 I2C: 00:40
1235 12:21:50.417624 I2C: 00:10
1236 12:21:50.420460 I2C: 00:39
1237 12:21:50.423672 PCI: 00:15.3 child on link 0 I2C: 00:36
1238 12:21:50.433357 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1239 12:21:50.436651 I2C: 00:36
1240 12:21:50.437109 I2C: 00:10
1241 12:21:50.440001 I2C: 00:0c
1242 12:21:50.440450 I2C: 00:50
1243 12:21:50.443406 PCI: 00:16.0
1244 12:21:50.453243 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1245 12:21:50.456793 PCI: 00:19.0 child on link 0 I2C: 00:1a
1246 12:21:50.466646 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1247 12:21:50.470167 I2C: 00:1a
1248 12:21:50.470664 I2C: 00:1a
1249 12:21:50.471021 I2C: 00:1a
1250 12:21:50.473428 I2C: 00:28
1251 12:21:50.473879 I2C: 00:29
1252 12:21:50.476625 PCI: 00:19.2
1253 12:21:50.486846 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 12:21:50.496677 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1255 12:21:50.499931 PCI: 00:1a.0
1256 12:21:50.509621 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1257 12:21:50.510203 PCI: 00:1e.0
1258 12:21:50.516498 PCI: 00:1e.2 child on link 0 SPI: 00
1259 12:21:50.526422 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1260 12:21:50.526976 SPI: 00
1261 12:21:50.532498 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 12:21:50.539354 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 12:21:50.543000 PNP: 0c09.0
1264 12:21:50.549187 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 12:21:50.552330 PCI: 00:1f.2
1266 12:21:50.562480 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 12:21:50.569447 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1268 12:21:50.576005 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1269 12:21:50.585583 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1270 12:21:50.595881 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1271 12:21:50.598796 GENERIC: 0.0
1272 12:21:50.599244 PCI: 00:1f.5
1273 12:21:50.608850 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1274 12:21:50.612231 Done allocating resources.
1275 12:21:50.618752 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2096 ms
1276 12:21:50.622325 Enabling resources...
1277 12:21:50.625746 PCI: 00:00.0 subsystem <- 8086/4e22
1278 12:21:50.629299 PCI: 00:00.0 cmd <- 06
1279 12:21:50.632503 PCI: 00:02.0 subsystem <- 8086/4e55
1280 12:21:50.633080 PCI: 00:02.0 cmd <- 03
1281 12:21:50.638495 PCI: 00:04.0 subsystem <- 8086/4e03
1282 12:21:50.638966 PCI: 00:04.0 cmd <- 02
1283 12:21:50.642318 PCI: 00:05.0 bridge ctrl <- 0003
1284 12:21:50.646058 PCI: 00:05.0 subsystem <- 8086/4e19
1285 12:21:50.648697 PCI: 00:05.0 cmd <- 02
1286 12:21:50.652113 PCI: 00:08.0 cmd <- 06
1287 12:21:50.655434 PCI: 00:14.0 subsystem <- 8086/4ded
1288 12:21:50.658601 PCI: 00:14.0 cmd <- 02
1289 12:21:50.662101 PCI: 00:14.3 subsystem <- 8086/4df0
1290 12:21:50.665788 PCI: 00:14.3 cmd <- 02
1291 12:21:50.668402 PCI: 00:14.5 subsystem <- 8086/4df8
1292 12:21:50.668854 PCI: 00:14.5 cmd <- 06
1293 12:21:50.675492 PCI: 00:15.0 subsystem <- 8086/4de8
1294 12:21:50.676038 PCI: 00:15.0 cmd <- 02
1295 12:21:50.678712 PCI: 00:15.1 subsystem <- 8086/4de9
1296 12:21:50.681648 PCI: 00:15.1 cmd <- 02
1297 12:21:50.685416 PCI: 00:15.2 subsystem <- 8086/4dea
1298 12:21:50.688596 PCI: 00:15.2 cmd <- 02
1299 12:21:50.691816 PCI: 00:15.3 subsystem <- 8086/4deb
1300 12:21:50.695147 PCI: 00:15.3 cmd <- 02
1301 12:21:50.698807 PCI: 00:16.0 subsystem <- 8086/4de0
1302 12:21:50.701589 PCI: 00:16.0 cmd <- 02
1303 12:21:50.705195 PCI: 00:19.0 subsystem <- 8086/4dc5
1304 12:21:50.708539 PCI: 00:19.0 cmd <- 02
1305 12:21:50.711425 PCI: 00:19.2 subsystem <- 8086/4dc7
1306 12:21:50.711880 PCI: 00:19.2 cmd <- 06
1307 12:21:50.718381 PCI: 00:1a.0 subsystem <- 8086/4dc4
1308 12:21:50.718929 PCI: 00:1a.0 cmd <- 06
1309 12:21:50.721790 PCI: 00:1e.2 subsystem <- 8086/4daa
1310 12:21:50.724733 PCI: 00:1e.2 cmd <- 06
1311 12:21:50.728183 PCI: 00:1f.0 subsystem <- 8086/4d87
1312 12:21:50.731725 PCI: 00:1f.0 cmd <- 407
1313 12:21:50.735199 PCI: 00:1f.3 subsystem <- 8086/4dc8
1314 12:21:50.737952 PCI: 00:1f.3 cmd <- 02
1315 12:21:50.741179 PCI: 00:1f.5 subsystem <- 8086/4da4
1316 12:21:50.744753 PCI: 00:1f.5 cmd <- 406
1317 12:21:50.748089 done.
1318 12:21:50.751562 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1319 12:21:50.754580 Initializing devices...
1320 12:21:50.758037 Root Device init
1321 12:21:50.758526 mainboard: EC init
1322 12:21:50.764367 Chrome EC: Set SMI mask to 0x0000000000000000
1323 12:21:50.767512 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1324 12:21:50.773936 ELOG: NV offset 0xbfa000 size 0x1000
1325 12:21:50.781046 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1326 12:21:50.787466 ELOG: Event(17) added with size 13 at 2023-03-13 12:21:50 UTC
1327 12:21:50.794205 ELOG: Event(91) added with size 10 at 2023-03-13 12:21:50 UTC
1328 12:21:50.797527 Chrome EC: clear events_b mask to 0x0000000000800000
1329 12:21:50.804058 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1330 12:21:50.811023 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1331 12:21:50.817317 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1332 12:21:50.820541 Chrome EC: Set WAKE mask to 0x0000000000000000
1333 12:21:50.824301 Root Device init finished in 64 msecs
1334 12:21:50.828830 PCI: 00:00.0 init
1335 12:21:50.832380 CPU TDP = 6 Watts
1336 12:21:50.832992 CPU PL1 = 7 Watts
1337 12:21:50.835217 CPU PL2 = 12 Watts
1338 12:21:50.838740 PCI: 00:00.0 init finished in 6 msecs
1339 12:21:50.841769 PCI: 00:02.0 init
1340 12:21:50.844895 GMA: Found VBT in CBFS
1341 12:21:50.845361 GMA: Found valid VBT in CBFS
1342 12:21:50.851511 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1343 12:21:50.858178 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1344 12:21:50.864865 PCI: 00:02.0 init finished in 18 msecs
1345 12:21:50.865339 PCI: 00:08.0 init
1346 12:21:50.871251 PCI: 00:08.0 init finished in 0 msecs
1347 12:21:50.871709 PCI: 00:14.0 init
1348 12:21:50.877878 XHCI: Updated LFPS sampling OFF time to 9 ms
1349 12:21:50.881382 PCI: 00:14.0 init finished in 4 msecs
1350 12:21:50.884387 PCI: 00:15.0 init
1351 12:21:50.884841 I2C bus 0 version 0x3230302a
1352 12:21:50.891369 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1353 12:21:50.894384 PCI: 00:15.0 init finished in 6 msecs
1354 12:21:50.894851 PCI: 00:15.1 init
1355 12:21:50.897674 I2C bus 1 version 0x3230302a
1356 12:21:50.901273 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1357 12:21:50.904662 PCI: 00:15.1 init finished in 6 msecs
1358 12:21:50.908238 PCI: 00:15.2 init
1359 12:21:50.911487 I2C bus 2 version 0x3230302a
1360 12:21:50.914884 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1361 12:21:50.917861 PCI: 00:15.2 init finished in 6 msecs
1362 12:21:50.921400 PCI: 00:15.3 init
1363 12:21:50.924727 I2C bus 3 version 0x3230302a
1364 12:21:50.927850 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1365 12:21:50.931509 PCI: 00:15.3 init finished in 6 msecs
1366 12:21:50.934698 PCI: 00:16.0 init
1367 12:21:50.938355 PCI: 00:16.0 init finished in 0 msecs
1368 12:21:50.938811 PCI: 00:19.0 init
1369 12:21:50.941250 I2C bus 4 version 0x3230302a
1370 12:21:50.944478 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1371 12:21:50.951275 PCI: 00:19.0 init finished in 6 msecs
1372 12:21:50.951727 PCI: 00:1a.0 init
1373 12:21:50.954396 PCI: 00:1a.0 init finished in 0 msecs
1374 12:21:50.957814 PCI: 00:1f.0 init
1375 12:21:50.961402 IOAPIC: Initializing IOAPIC at 0xfec00000
1376 12:21:50.968096 IOAPIC: Bootstrap Processor Local APIC = 0x00
1377 12:21:50.968618 IOAPIC: ID = 0x02
1378 12:21:50.971508 IOAPIC: Dumping registers
1379 12:21:50.974575 reg 0x0000: 0x02000000
1380 12:21:50.978030 reg 0x0001: 0x00770020
1381 12:21:50.978536 reg 0x0002: 0x00000000
1382 12:21:50.984755 PCI: 00:1f.0 init finished in 21 msecs
1383 12:21:50.985213 PCI: 00:1f.2 init
1384 12:21:50.988346 Disabling ACPI via APMC.
1385 12:21:50.992388 APMC done.
1386 12:21:50.995081 PCI: 00:1f.2 init finished in 5 msecs
1387 12:21:51.006171 PNP: 0c09.0 init
1388 12:21:51.010169 Google Chrome EC uptime: 6.936 seconds
1389 12:21:51.016231 Google Chrome AP resets since EC boot: 0
1390 12:21:51.019496 Google Chrome most recent AP reset causes:
1391 12:21:51.026369 Google Chrome EC reset flags at last EC boot: reset-pin
1392 12:21:51.029684 PNP: 0c09.0 init finished in 18 msecs
1393 12:21:51.030172 Devices initialized
1394 12:21:51.032853 Show all devs... After init.
1395 12:21:51.036267 Root Device: enabled 1
1396 12:21:51.039594 CPU_CLUSTER: 0: enabled 1
1397 12:21:51.042564 DOMAIN: 0000: enabled 1
1398 12:21:51.043021 PCI: 00:00.0: enabled 1
1399 12:21:51.046189 PCI: 00:02.0: enabled 1
1400 12:21:51.049619 PCI: 00:04.0: enabled 1
1401 12:21:51.050203 PCI: 00:05.0: enabled 1
1402 12:21:51.052455 PCI: 00:09.0: enabled 0
1403 12:21:51.055955 PCI: 00:12.6: enabled 0
1404 12:21:51.059193 PCI: 00:14.0: enabled 1
1405 12:21:51.059692 PCI: 00:14.1: enabled 0
1406 12:21:51.062774 PCI: 00:14.2: enabled 0
1407 12:21:51.065664 PCI: 00:14.3: enabled 1
1408 12:21:51.069285 PCI: 00:14.5: enabled 1
1409 12:21:51.069735 PCI: 00:15.0: enabled 1
1410 12:21:51.072517 PCI: 00:15.1: enabled 1
1411 12:21:51.075676 PCI: 00:15.2: enabled 1
1412 12:21:51.079489 PCI: 00:15.3: enabled 1
1413 12:21:51.079968 PCI: 00:16.0: enabled 1
1414 12:21:51.082569 PCI: 00:16.1: enabled 0
1415 12:21:51.085814 PCI: 00:16.4: enabled 0
1416 12:21:51.086293 PCI: 00:16.5: enabled 0
1417 12:21:51.089050 PCI: 00:17.0: enabled 0
1418 12:21:51.092568 PCI: 00:19.0: enabled 1
1419 12:21:51.096464 PCI: 00:19.1: enabled 0
1420 12:21:51.096954 PCI: 00:19.2: enabled 1
1421 12:21:51.099743 PCI: 00:1a.0: enabled 1
1422 12:21:51.103192 PCI: 00:1c.0: enabled 0
1423 12:21:51.103644 PCI: 00:1c.1: enabled 0
1424 12:21:51.106996 PCI: 00:1c.2: enabled 0
1425 12:21:51.110878 PCI: 00:1c.3: enabled 0
1426 12:21:51.111332 PCI: 00:1c.4: enabled 0
1427 12:21:51.114612 PCI: 00:1c.5: enabled 0
1428 12:21:51.118118 PCI: 00:1c.6: enabled 0
1429 12:21:51.118609 PCI: 00:1c.7: enabled 1
1430 12:21:51.121822 PCI: 00:1e.0: enabled 0
1431 12:21:51.125329 PCI: 00:1e.1: enabled 0
1432 12:21:51.125775 PCI: 00:1e.2: enabled 1
1433 12:21:51.128891 PCI: 00:1e.3: enabled 0
1434 12:21:51.131806 PCI: 00:1f.0: enabled 1
1435 12:21:51.135784 PCI: 00:1f.1: enabled 0
1436 12:21:51.136244 PCI: 00:1f.2: enabled 1
1437 12:21:51.138791 PCI: 00:1f.3: enabled 1
1438 12:21:51.142107 PCI: 00:1f.4: enabled 0
1439 12:21:51.142594 PCI: 00:1f.5: enabled 1
1440 12:21:51.145753 PCI: 00:1f.7: enabled 0
1441 12:21:51.148576 GENERIC: 0.0: enabled 1
1442 12:21:51.152090 GENERIC: 0.0: enabled 1
1443 12:21:51.152536 USB0 port 0: enabled 1
1444 12:21:51.155529 GENERIC: 0.0: enabled 1
1445 12:21:51.159000 I2C: 00:2c: enabled 1
1446 12:21:51.159541 I2C: 00:15: enabled 1
1447 12:21:51.162378 GENERIC: 0.0: enabled 0
1448 12:21:51.165938 I2C: 00:15: enabled 1
1449 12:21:51.166415 I2C: 00:10: enabled 0
1450 12:21:51.168909 I2C: 00:10: enabled 0
1451 12:21:51.172193 I2C: 00:2c: enabled 1
1452 12:21:51.172638 I2C: 00:40: enabled 1
1453 12:21:51.175563 I2C: 00:10: enabled 1
1454 12:21:51.178892 I2C: 00:39: enabled 1
1455 12:21:51.179380 I2C: 00:36: enabled 1
1456 12:21:51.181857 I2C: 00:10: enabled 0
1457 12:21:51.185183 I2C: 00:0c: enabled 1
1458 12:21:51.185629 I2C: 00:50: enabled 1
1459 12:21:51.188530 I2C: 00:1a: enabled 1
1460 12:21:51.192103 I2C: 00:1a: enabled 0
1461 12:21:51.195177 I2C: 00:1a: enabled 0
1462 12:21:51.195649 I2C: 00:28: enabled 1
1463 12:21:51.198398 I2C: 00:29: enabled 1
1464 12:21:51.202113 PCI: 00:00.0: enabled 1
1465 12:21:51.202614 SPI: 00: enabled 1
1466 12:21:51.205966 PNP: 0c09.0: enabled 1
1467 12:21:51.206462 GENERIC: 0.0: enabled 0
1468 12:21:51.209130 USB2 port 0: enabled 1
1469 12:21:51.212568 USB2 port 1: enabled 1
1470 12:21:51.216572 USB2 port 2: enabled 1
1471 12:21:51.217106 USB2 port 3: enabled 1
1472 12:21:51.219883 USB2 port 4: enabled 0
1473 12:21:51.220340 USB2 port 5: enabled 1
1474 12:21:51.223642 USB2 port 6: enabled 0
1475 12:21:51.226586 USB2 port 7: enabled 1
1476 12:21:51.230196 USB3 port 0: enabled 1
1477 12:21:51.230660 USB3 port 1: enabled 1
1478 12:21:51.232843 USB3 port 2: enabled 1
1479 12:21:51.236205 USB3 port 3: enabled 1
1480 12:21:51.236664 APIC: 00: enabled 1
1481 12:21:51.239208 APIC: 02: enabled 1
1482 12:21:51.243251 PCI: 00:08.0: enabled 1
1483 12:21:51.246567 BS: BS_DEV_INIT run times (exec / console): 25 / 464 ms
1484 12:21:51.253905 ELOG: Event(92) added with size 9 at 2023-03-13 12:21:51 UTC
1485 12:21:51.260247 ELOG: Event(93) added with size 9 at 2023-03-13 12:21:51 UTC
1486 12:21:51.267133 ELOG: Event(9E) added with size 10 at 2023-03-13 12:21:51 UTC
1487 12:21:51.273609 ELOG: Event(9F) added with size 14 at 2023-03-13 12:21:51 UTC
1488 12:21:51.276976 BS: BS_DEV_INIT exit times (exec / console): 1 / 24 ms
1489 12:21:51.283177 ELOG: Event(A1) added with size 10 at 2023-03-13 12:21:51 UTC
1490 12:21:51.293119 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 12:21:51.296981 ELOG: Event(A0) added with size 9 at 2023-03-13 12:21:51 UTC
1492 12:21:51.303196 elog_add_boot_reason: Logged dev mode boot
1493 12:21:51.306900 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 12:21:51.310038 Finalize devices...
1495 12:21:51.313213 Devices finalized
1496 12:21:51.316744 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 12:21:51.323372 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 12:21:51.326725 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 12:21:51.333206 ME: HFSTS1 : 0x80030045
1500 12:21:51.336452 ME: HFSTS2 : 0x30280136
1501 12:21:51.339969 ME: HFSTS3 : 0x00000050
1502 12:21:51.343386 ME: HFSTS4 : 0x00004000
1503 12:21:51.349981 ME: HFSTS5 : 0x00000000
1504 12:21:51.353275 ME: HFSTS6 : 0x40400006
1505 12:21:51.356250 ME: Manufacturing Mode : NO
1506 12:21:51.360674 ME: FW Partition Table : OK
1507 12:21:51.363688 ME: Bringup Loader Failure : NO
1508 12:21:51.367221 ME: Firmware Init Complete : NO
1509 12:21:51.370658 ME: Boot Options Present : NO
1510 12:21:51.373381 ME: Update In Progress : NO
1511 12:21:51.376960 ME: D0i3 Support : YES
1512 12:21:51.380543 ME: Low Power State Enabled : NO
1513 12:21:51.383870 ME: CPU Replaced : YES
1514 12:21:51.387117 ME: CPU Replacement Valid : YES
1515 12:21:51.389955 ME: Current Working State : 5
1516 12:21:51.393741 ME: Current Operation State : 1
1517 12:21:51.396985 ME: Current Operation Mode : 3
1518 12:21:51.400262 ME: Error Code : 0
1519 12:21:51.403415 ME: CPU Debug Disabled : YES
1520 12:21:51.407052 ME: TXT Support : NO
1521 12:21:51.413923 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 12:21:51.416562 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 12:21:51.423140 ACPI: Writing ACPI tables at 76b27000.
1524 12:21:51.423628 ACPI: * FACS
1525 12:21:51.426912 ACPI: * DSDT
1526 12:21:51.430157 Ramoops buffer: 0x100000@0x76a26000.
1527 12:21:51.433424 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 12:21:51.436696 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 12:21:51.440827 Google Chrome EC: version:
1530 12:21:51.443645 ro: magolor_1.1.9999-103b6f9
1531 12:21:51.447232 rw: magolor_1.1.9999-103b6f9
1532 12:21:51.450892 running image: 1
1533 12:21:51.456636 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 12:21:51.460522 ACPI: * FADT
1535 12:21:51.461090 SCI is IRQ9
1536 12:21:51.464388 ACPI: added table 1/32, length now 40
1537 12:21:51.464872 ACPI: * SSDT
1538 12:21:51.467843 Found 1 CPU(s) with 2 core(s) each.
1539 12:21:51.471654 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 12:21:51.479578 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 12:21:51.482695 Could not locate 'wifi_sar' in VPD.
1542 12:21:51.486339 Checking CBFS for default SAR values
1543 12:21:51.493014 wifi_sar_defaults.hex has bad len in CBFS
1544 12:21:51.493471 failed from getting SAR limits!
1545 12:21:51.499279 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 12:21:51.502614 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 12:21:51.509541 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 12:21:51.512617 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 12:21:51.519607 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 12:21:51.522618 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 12:21:51.529566 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 12:21:51.535800 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 12:21:51.539060 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 12:21:51.545956 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 12:21:51.552254 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 12:21:51.559355 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 12:21:51.562248 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 12:21:51.569009 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 12:21:51.572485 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 12:21:51.579091 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 12:21:51.582307 PS2K: Passing 101 keymaps to kernel
1562 12:21:51.589166 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 12:21:51.595479 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 12:21:51.599237 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 12:21:51.605756 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 12:21:51.608956 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 12:21:51.615317 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 12:21:51.622124 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 12:21:51.629140 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 12:21:51.632439 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 12:21:51.638693 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 12:21:51.642098 ACPI: added table 2/32, length now 44
1573 12:21:51.645819 ACPI: * MCFG
1574 12:21:51.649123 ACPI: added table 3/32, length now 48
1575 12:21:51.649760 ACPI: * TPM2
1576 12:21:51.652405 TPM2 log created at 0x76a16000
1577 12:21:51.655357 ACPI: added table 4/32, length now 52
1578 12:21:51.658824 ACPI: * MADT
1579 12:21:51.659280 SCI is IRQ9
1580 12:21:51.662169 ACPI: added table 5/32, length now 56
1581 12:21:51.665513 current = 76b2d580
1582 12:21:51.666002 ACPI: * DMAR
1583 12:21:51.671962 ACPI: added table 6/32, length now 60
1584 12:21:51.675644 ACPI: added table 7/32, length now 64
1585 12:21:51.676104 ACPI: * HPET
1586 12:21:51.678599 ACPI: added table 8/32, length now 68
1587 12:21:51.682047 ACPI: done.
1588 12:21:51.685121 ACPI tables: 26304 bytes.
1589 12:21:51.688520 smbios_write_tables: 76a15000
1590 12:21:51.691926 EC returned error result code 3
1591 12:21:51.695082 Couldn't obtain OEM name from CBI
1592 12:21:51.695537 Create SMBIOS type 16
1593 12:21:51.698467 Create SMBIOS type 17
1594 12:21:51.701922 GENERIC: 0.0 (WIFI Device)
1595 12:21:51.705193 SMBIOS tables: 913 bytes.
1596 12:21:51.708334 Writing table forward entry at 0x00000500
1597 12:21:51.715051 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 12:21:51.718442 Writing coreboot table at 0x76b4b000
1599 12:21:51.725049 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 12:21:51.727878 1. 0000000000001000-000000000009ffff: RAM
1601 12:21:51.734840 2. 00000000000a0000-00000000000fffff: RESERVED
1602 12:21:51.737689 3. 0000000000100000-0000000076a14fff: RAM
1603 12:21:51.744774 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 12:21:51.747816 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 12:21:51.754688 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 12:21:51.758002 7. 0000000077000000-000000007fbfffff: RESERVED
1607 12:21:51.764674 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 12:21:51.767463 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 12:21:51.774002 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 12:21:51.777570 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 12:21:51.784018 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 12:21:51.787568 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 12:21:51.790872 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 12:21:51.797285 15. 0000000100000000-00000001803fffff: RAM
1615 12:21:51.800730 Passing 4 GPIOs to payload:
1616 12:21:51.804067 NAME | PORT | POLARITY | VALUE
1617 12:21:51.811080 lid | undefined | high | high
1618 12:21:51.814265 power | undefined | high | low
1619 12:21:51.820427 oprom | undefined | high | low
1620 12:21:51.827133 EC in RW | 0x000000b9 | high | low
1621 12:21:51.834026 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum f67a
1622 12:21:51.834615 coreboot table: 1504 bytes.
1623 12:21:51.837475 IMD ROOT 0. 0x76fff000 0x00001000
1624 12:21:51.843945 IMD SMALL 1. 0x76ffe000 0x00001000
1625 12:21:51.847401 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 12:21:51.851044 CONSOLE 3. 0x76c2e000 0x00020000
1627 12:21:51.853879 FMAP 4. 0x76c2d000 0x00000578
1628 12:21:51.857166 TIME STAMP 5. 0x76c2c000 0x00000910
1629 12:21:51.860677 VBOOT WORK 6. 0x76c18000 0x00014000
1630 12:21:51.863463 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 12:21:51.866691 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 12:21:51.873410 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 12:21:51.877017 REFCODE 10. 0x76b67000 0x00040000
1634 12:21:51.880275 SMM BACKUP 11. 0x76b57000 0x00010000
1635 12:21:51.883904 4f444749 12. 0x76b55000 0x00002000
1636 12:21:51.886821 EXT VBT13. 0x76b53000 0x00001c43
1637 12:21:51.890186 COREBOOT 14. 0x76b4b000 0x00008000
1638 12:21:51.893633 ACPI 15. 0x76b27000 0x00024000
1639 12:21:51.897000 ACPI GNVS 16. 0x76b26000 0x00001000
1640 12:21:51.900225 RAMOOPS 17. 0x76a26000 0x00100000
1641 12:21:51.906621 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 12:21:51.910048 SMBIOS 19. 0x76a15000 0x00000800
1643 12:21:51.910565 IMD small region:
1644 12:21:51.913672 IMD ROOT 0. 0x76ffec00 0x00000400
1645 12:21:51.919728 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 12:21:51.923086 VPD 2. 0x76ffeb80 0x0000004c
1647 12:21:51.926327 POWER STATE 3. 0x76ffeb40 0x00000040
1648 12:21:51.930084 ROMSTAGE 4. 0x76ffeb20 0x00000004
1649 12:21:51.933685 MEM INFO 5. 0x76ffe940 0x000001e0
1650 12:21:51.939970 BS: BS_WRITE_TABLES run times (exec / console): 5 / 517 ms
1651 12:21:51.943389 MTRR: Physical address space:
1652 12:21:51.949881 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 12:21:51.956639 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 12:21:51.962751 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 12:21:51.966010 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 12:21:51.972838 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 12:21:51.979774 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 12:21:51.986199 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 12:21:51.989399 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 12:21:51.996387 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 12:21:51.999433 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 12:21:52.002652 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 12:21:52.005941 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 12:21:52.012755 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 12:21:52.016165 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 12:21:52.018992 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 12:21:52.022574 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 12:21:52.025930 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 12:21:52.032242 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 12:21:52.035705 call enable_fixed_mtrr()
1671 12:21:52.039171 CPU physical address size: 39 bits
1672 12:21:52.042697 MTRR: default type WB/UC MTRR counts: 6/5.
1673 12:21:52.045649 MTRR: UC selected as default type.
1674 12:21:52.052139 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 12:21:52.058930 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 12:21:52.065348 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 12:21:52.071913 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 12:21:52.075754 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 12:21:52.078858
1680 12:21:52.079316 MTRR check
1681 12:21:52.082654 Fixed MTRRs : Enabled
1682 12:21:52.083107 Variable MTRRs: Enabled
1683 12:21:52.083458
1684 12:21:52.089203 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 12:21:52.092515 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 12:21:52.095610 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 12:21:52.099059 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 12:21:52.105523 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 12:21:52.108753 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 12:21:52.112186 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 12:21:52.115786 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 12:21:52.121792 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 12:21:52.125311 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 12:21:52.128633 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 12:21:52.135455 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 12:21:52.138746 call enable_fixed_mtrr()
1697 12:21:52.143843 Checking cr50 for pending updates
1698 12:21:52.144321 CPU physical address size: 39 bits
1699 12:21:52.147320 Reading cr50 TPM mode
1700 12:21:52.157433 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 12:21:52.165011 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 12:21:52.168605 Checking segment from ROM address 0xfff9d5b8
1703 12:21:52.175167 Checking segment from ROM address 0xfff9d5d4
1704 12:21:52.178570 Loading segment from ROM address 0xfff9d5b8
1705 12:21:52.181394 code (compression=0)
1706 12:21:52.188092 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 12:21:52.198252 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 12:21:52.201265 it's not compressed!
1709 12:21:52.326849 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 12:21:52.333026 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 12:21:52.340556 Loading segment from ROM address 0xfff9d5d4
1712 12:21:52.343746 Entry Point 0x30000000
1713 12:21:52.344225 Loaded segments
1714 12:21:52.350644 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 12:21:52.366501 Finalizing chipset.
1716 12:21:52.369865 Finalizing SMM.
1717 12:21:52.370373 APMC done.
1718 12:21:52.376393 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 12:21:52.380150 mp_park_aps done after 0 msecs.
1720 12:21:52.383477 Jumping to boot code at 0x30000000(0x76b4b000)
1721 12:21:52.393312 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 12:21:52.393771
1723 12:21:52.394196
1724 12:21:52.394588
1725 12:21:52.396580 Starting depthcharge on Magolor...
1726 12:21:52.397031
1727 12:21:52.398181 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 12:21:52.398983 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
1729 12:21:52.399507 Setting prompt string to ['dedede:']
1730 12:21:52.399977 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:46)
1731 12:21:52.406505 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 12:21:52.407031
1733 12:21:52.413006 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 12:21:52.413462
1735 12:21:52.416323 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 12:21:52.416777
1737 12:21:52.419579 Wipe memory regions:
1738 12:21:52.420033
1739 12:21:52.423044 [0x00000000001000, 0x000000000a0000)
1740 12:21:52.423526
1741 12:21:52.425893 [0x00000000100000, 0x00000030000000)
1742 12:21:52.554850
1743 12:21:52.557803 [0x00000031062170, 0x00000076a15000)
1744 12:21:52.727185
1745 12:21:52.729969 [0x00000100000000, 0x00000180400000)
1746 12:21:53.792288
1747 12:21:53.792850 R8152: Initializing
1748 12:21:53.793210
1749 12:21:53.795413 Version 9 (ocp_data = 6010)
1750 12:21:53.795927
1751 12:21:53.799056 R8152: Done initializing
1752 12:21:53.799505
1753 12:21:53.802555 Adding net device
1754 12:21:53.803002
1755 12:21:53.805410 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 12:21:53.805860
1757 12:21:53.808951
1758 12:21:53.809398
1759 12:21:53.810179 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 12:21:53.911763 dedede: tftpboot 192.168.201.1 9584152/tftp-deploy-cur6swt1/kernel/bzImage 9584152/tftp-deploy-cur6swt1/kernel/cmdline 9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
1762 12:21:53.912370 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 12:21:53.912816 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 12:21:53.917559 tftpboot 192.168.201.1 9584152/tftp-deploy-cur6swt1/kernel/bzImay-cur6swt1/kernel/cmdline 9584152/tftp-deploy-cur6swt1/ramdisk/ramdisk.cpio.gz
1765 12:21:53.918009
1766 12:21:53.918403 Waiting for link
1767 12:21:54.119300
1768 12:21:54.119894 done.
1769 12:21:54.120259
1770 12:21:54.120593 MAC: 00:e0:4c:75:0d:b4
1771 12:21:54.120919
1772 12:21:54.122552 Sending DHCP discover... done.
1773 12:21:54.123007
1774 12:21:54.126260 Waiting for reply... done.
1775 12:21:54.126718
1776 12:21:54.129158 Sending DHCP request... done.
1777 12:21:54.129610
1778 12:21:54.132550 Waiting for reply... done.
1779 12:21:54.132998
1780 12:21:54.136374 My ip is 192.168.201.20
1781 12:21:54.136822
1782 12:21:54.139156 The DHCP server ip is 192.168.201.1
1783 12:21:54.139605
1784 12:21:54.142707 TFTP server IP predefined by user: 192.168.201.1
1785 12:21:54.143162
1786 12:21:54.149052 Bootfile predefined by user: 9584152/tftp-deploy-cur6swt1/kernel/bzImage
1787 12:21:54.149508
1788 12:21:54.152436 Sending tftp read request... done.
1789 12:21:54.152895
1790 12:21:54.159729 Waiting for the transfer...
1791 12:21:54.160296
1792 12:21:54.427068 00000000 ################################################################
1793 12:21:54.427205
1794 12:21:54.682924 00080000 ################################################################
1795 12:21:54.683065
1796 12:21:54.939016 00100000 ################################################################
1797 12:21:54.939159
1798 12:21:55.199367 00180000 ################################################################
1799 12:21:55.199507
1800 12:21:55.458995 00200000 ################################################################
1801 12:21:55.459143
1802 12:21:55.720502 00280000 ################################################################
1803 12:21:55.720640
1804 12:21:55.983487 00300000 ################################################################
1805 12:21:55.983634
1806 12:21:56.241128 00380000 ################################################################
1807 12:21:56.241263
1808 12:21:56.489807 00400000 ################################################################
1809 12:21:56.489947
1810 12:21:56.742363 00480000 ################################################################
1811 12:21:56.742515
1812 12:21:56.993251 00500000 ################################################################
1813 12:21:56.993393
1814 12:21:57.240173 00580000 ################################################################
1815 12:21:57.240319
1816 12:21:57.498080 00600000 ################################################################
1817 12:21:57.498232
1818 12:21:57.748017 00680000 ################################################################
1819 12:21:57.748167
1820 12:21:57.993914 00700000 ################################################################
1821 12:21:57.994059
1822 12:21:58.242768 00780000 ################################################################
1823 12:21:58.242912
1824 12:21:58.501069 00800000 ################################################################
1825 12:21:58.501228
1826 12:21:58.749881 00880000 ################################################################
1827 12:21:58.750026
1828 12:21:58.928292 00900000 ################################################ done.
1829 12:21:58.928438
1830 12:21:58.931142 The bootfile was 9826304 bytes long.
1831 12:21:58.931228
1832 12:21:58.934514 Sending tftp read request... done.
1833 12:21:58.934600
1834 12:21:58.938007 Waiting for the transfer...
1835 12:21:58.938092
1836 12:21:59.190503 00000000 ################################################################
1837 12:21:59.190650
1838 12:21:59.431942 00080000 ################################################################
1839 12:21:59.432087
1840 12:21:59.672177 00100000 ################################################################
1841 12:21:59.672319
1842 12:21:59.916943 00180000 ################################################################
1843 12:21:59.917091
1844 12:22:00.158995 00200000 ################################################################
1845 12:22:00.159154
1846 12:22:00.408682 00280000 ################################################################
1847 12:22:00.408845
1848 12:22:00.660728 00300000 ################################################################
1849 12:22:00.660879
1850 12:22:00.916762 00380000 ################################################################
1851 12:22:00.916912
1852 12:22:01.172844 00400000 ################################################################
1853 12:22:01.172992
1854 12:22:01.425174 00480000 ################################################################
1855 12:22:01.425343
1856 12:22:01.680558 00500000 ################################################################
1857 12:22:01.680718
1858 12:22:01.938594 00580000 ################################################################
1859 12:22:01.938758
1860 12:22:02.191592 00600000 ################################################################
1861 12:22:02.191735
1862 12:22:02.446452 00680000 ################################################################
1863 12:22:02.446601
1864 12:22:02.701623 00700000 ################################################################
1865 12:22:02.701769
1866 12:22:02.956805 00780000 ################################################################
1867 12:22:02.956959
1868 12:22:03.208185 00800000 ################################################################
1869 12:22:03.208345
1870 12:22:03.335805 00880000 ################################# done.
1871 12:22:03.335953
1872 12:22:03.339416 Sending tftp read request... done.
1873 12:22:03.339507
1874 12:22:03.342836 Waiting for the transfer...
1875 12:22:03.342928
1876 12:22:03.346056 00000000 # done.
1877 12:22:03.346147
1878 12:22:03.352561 Command line loaded dynamically from TFTP file: 9584152/tftp-deploy-cur6swt1/kernel/cmdline
1879 12:22:03.352653
1880 12:22:03.365768 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1881 12:22:03.365867
1882 12:22:03.371997 ec_init: CrosEC protocol v3 supported (256, 256)
1883 12:22:03.378340
1884 12:22:03.381998 Shutting down all USB controllers.
1885 12:22:03.382092
1886 12:22:03.382177 Removing current net device
1887 12:22:03.382248
1888 12:22:03.385559 Finalizing coreboot
1889 12:22:03.385649
1890 12:22:03.391826 Exiting depthcharge with code 4 at timestamp: 18189959
1891 12:22:03.391923
1892 12:22:03.391996
1893 12:22:03.392064 Starting kernel ...
1894 12:22:03.392136
1895 12:22:03.392200
1896 12:22:03.392596 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1897 12:22:03.392706 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
1898 12:22:03.392788 Setting prompt string to ['Linux version [0-9]']
1899 12:22:03.392863 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1900 12:22:03.392940 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1902 12:26:38.393527 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
1904 12:26:38.394644 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
1906 12:26:38.395488 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1909 12:26:38.396843 end: 2 depthcharge-action (duration 00:05:00) [common]
1911 12:26:38.397675 Cleaning after the job
1912 12:26:38.397767 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/ramdisk
1913 12:26:38.398498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/kernel
1914 12:26:38.399177 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584152/tftp-deploy-cur6swt1/modules
1915 12:26:38.399539 start: 5.1 power-off (timeout 00:00:30) [common]
1916 12:26:38.399695 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1917 12:26:38.473274 >> Command sent successfully.
1918 12:26:38.475684 Returned 0 in 0 seconds
1919 12:26:38.576927 end: 5.1 power-off (duration 00:00:00) [common]
1921 12:26:38.578562 start: 5.2 read-feedback (timeout 00:10:00) [common]
1922 12:26:38.579730 Listened to connection for namespace 'common' for up to 1s
1924 12:26:38.581215 Listened to connection for namespace 'common' for up to 1s
1925 12:26:39.582397 Finalising connection for namespace 'common'
1926 12:26:39.583172 Disconnecting from shell: Finalise
1927 12:26:39.583700
1928 12:26:39.685266 end: 5.2 read-feedback (duration 00:00:01) [common]
1929 12:26:39.685939 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584152
1930 12:26:39.715999 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584152
1931 12:26:39.716533 JobError: Your job cannot terminate cleanly.