Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:29.383308 lava-dispatcher, installed at version: 2023.01
2 12:21:29.383501 start: 0 validate
3 12:21:29.383629 Start time: 2023-03-13 12:21:29.383623+00:00 (UTC)
4 12:21:29.383760 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:29.383901 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230303.0%2Fx86%2Frootfs.cpio.gz exists
6 12:21:29.680603 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:29.681339 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:36.184713 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:36.185433 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:21:37.187635 validate duration: 7.80
12 12:21:37.187995 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:21:37.188198 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:21:37.188332 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:21:37.188472 Not decompressing ramdisk as can be used compressed.
16 12:21:37.188590 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230303.0/x86/rootfs.cpio.gz
17 12:21:37.188677 saving as /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/ramdisk/rootfs.cpio.gz
18 12:21:37.188757 total size: 8423697 (8MB)
19 12:21:37.189836 progress 0% (0MB)
20 12:21:37.192502 progress 5% (0MB)
21 12:21:37.194963 progress 10% (0MB)
22 12:21:37.197475 progress 15% (1MB)
23 12:21:37.199825 progress 20% (1MB)
24 12:21:37.202061 progress 25% (2MB)
25 12:21:37.204218 progress 30% (2MB)
26 12:21:37.206171 progress 35% (2MB)
27 12:21:37.208290 progress 40% (3MB)
28 12:21:37.210516 progress 45% (3MB)
29 12:21:37.212733 progress 50% (4MB)
30 12:21:37.214826 progress 55% (4MB)
31 12:21:37.216898 progress 60% (4MB)
32 12:21:37.218933 progress 65% (5MB)
33 12:21:37.220852 progress 70% (5MB)
34 12:21:37.222881 progress 75% (6MB)
35 12:21:37.224950 progress 80% (6MB)
36 12:21:37.227001 progress 85% (6MB)
37 12:21:37.229178 progress 90% (7MB)
38 12:21:37.231252 progress 95% (7MB)
39 12:21:37.233394 progress 100% (8MB)
40 12:21:37.233506 8MB downloaded in 0.04s (179.54MB/s)
41 12:21:37.233661 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:21:37.233904 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:21:37.233993 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:21:37.234081 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:21:37.234188 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:21:37.234262 saving as /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/kernel/bzImage
48 12:21:37.234324 total size: 9826304 (9MB)
49 12:21:37.234386 No compression specified
50 12:21:37.235273 progress 0% (0MB)
51 12:21:37.237621 progress 5% (0MB)
52 12:21:37.239997 progress 10% (0MB)
53 12:21:37.242411 progress 15% (1MB)
54 12:21:37.244832 progress 20% (1MB)
55 12:21:37.247262 progress 25% (2MB)
56 12:21:37.249970 progress 30% (2MB)
57 12:21:37.252435 progress 35% (3MB)
58 12:21:37.254878 progress 40% (3MB)
59 12:21:37.257288 progress 45% (4MB)
60 12:21:37.259645 progress 50% (4MB)
61 12:21:37.262044 progress 55% (5MB)
62 12:21:37.264512 progress 60% (5MB)
63 12:21:37.267034 progress 65% (6MB)
64 12:21:37.269576 progress 70% (6MB)
65 12:21:37.271978 progress 75% (7MB)
66 12:21:37.274391 progress 80% (7MB)
67 12:21:37.276812 progress 85% (7MB)
68 12:21:37.279187 progress 90% (8MB)
69 12:21:37.281625 progress 95% (8MB)
70 12:21:37.284044 progress 100% (9MB)
71 12:21:37.284267 9MB downloaded in 0.05s (187.66MB/s)
72 12:21:37.284462 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:21:37.284704 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:21:37.284794 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:21:37.284884 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:21:37.285001 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:21:37.285073 saving as /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/modules/modules.tar
79 12:21:37.285135 total size: 460276 (0MB)
80 12:21:37.285231 Using unxz to decompress xz
81 12:21:37.288524 progress 7% (0MB)
82 12:21:37.288896 progress 14% (0MB)
83 12:21:37.289130 progress 21% (0MB)
84 12:21:37.290513 progress 28% (0MB)
85 12:21:37.292620 progress 35% (0MB)
86 12:21:37.294845 progress 42% (0MB)
87 12:21:37.297144 progress 49% (0MB)
88 12:21:37.299054 progress 56% (0MB)
89 12:21:37.300961 progress 64% (0MB)
90 12:21:37.303067 progress 71% (0MB)
91 12:21:37.305091 progress 78% (0MB)
92 12:21:37.307016 progress 85% (0MB)
93 12:21:37.308782 progress 92% (0MB)
94 12:21:37.310793 progress 99% (0MB)
95 12:21:37.317308 0MB downloaded in 0.03s (13.65MB/s)
96 12:21:37.317592 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:21:37.317865 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:21:37.317961 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 12:21:37.318059 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 12:21:37.318146 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:21:37.318235 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 12:21:37.318418 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y
104 12:21:37.318529 makedir: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin
105 12:21:37.318619 makedir: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/tests
106 12:21:37.318702 makedir: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/results
107 12:21:37.318812 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-add-keys
108 12:21:37.318950 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-add-sources
109 12:21:37.319072 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-background-process-start
110 12:21:37.319187 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-background-process-stop
111 12:21:37.319302 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-common-functions
112 12:21:37.319415 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-echo-ipv4
113 12:21:37.319531 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-install-packages
114 12:21:37.319645 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-installed-packages
115 12:21:37.319755 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-os-build
116 12:21:37.319866 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-probe-channel
117 12:21:37.319979 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-probe-ip
118 12:21:37.320092 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-target-ip
119 12:21:37.320203 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-target-mac
120 12:21:37.320318 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-target-storage
121 12:21:37.320432 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-case
122 12:21:37.320543 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-event
123 12:21:37.320653 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-feedback
124 12:21:37.320762 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-raise
125 12:21:37.320879 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-reference
126 12:21:37.320991 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-runner
127 12:21:37.321104 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-set
128 12:21:37.321215 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-test-shell
129 12:21:37.321331 Updating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-install-packages (oe)
130 12:21:37.321447 Updating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/bin/lava-installed-packages (oe)
131 12:21:37.321551 Creating /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/environment
132 12:21:37.321640 LAVA metadata
133 12:21:37.321717 - LAVA_JOB_ID=9584202
134 12:21:37.321785 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:21:37.321888 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 12:21:37.321956 skipped lava-vland-overlay
137 12:21:37.322036 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:21:37.322121 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 12:21:37.322185 skipped lava-multinode-overlay
140 12:21:37.322261 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:21:37.322349 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 12:21:37.322422 Loading test definitions
143 12:21:37.322520 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 12:21:37.322597 Using /lava-9584202 at stage 0
145 12:21:37.322852 uuid=9584202_1.4.2.3.1 testdef=None
146 12:21:37.322942 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:21:37.323042 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 12:21:37.323543 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:21:37.323781 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 12:21:37.324362 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:21:37.324605 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 12:21:37.325152 runner path: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/0/tests/0_dmesg test_uuid 9584202_1.4.2.3.1
155 12:21:37.325306 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:21:37.325544 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
158 12:21:37.325619 Using /lava-9584202 at stage 1
159 12:21:37.325865 uuid=9584202_1.4.2.3.5 testdef=None
160 12:21:37.325957 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 12:21:37.326047 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
162 12:21:37.326565 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 12:21:37.326791 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
165 12:21:37.327363 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 12:21:37.327600 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
168 12:21:37.328148 runner path: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/1/tests/1_bootrr test_uuid 9584202_1.4.2.3.5
169 12:21:37.328293 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 12:21:37.328547 Creating lava-test-runner.conf files
172 12:21:37.328612 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/0 for stage 0
173 12:21:37.328694 - 0_dmesg
174 12:21:37.328770 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584202/lava-overlay-59qwnl9y/lava-9584202/1 for stage 1
175 12:21:37.328853 - 1_bootrr
176 12:21:37.328950 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 12:21:37.329038 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
178 12:21:37.335461 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 12:21:37.335573 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
180 12:21:37.335665 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 12:21:37.335753 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 12:21:37.335843 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
183 12:21:37.523725 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 12:21:37.524082 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
185 12:21:37.524193 extracting modules file /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584202/extract-overlay-ramdisk-bqsyp6n3/ramdisk
186 12:21:37.535217 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 12:21:37.535354 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
188 12:21:37.535446 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584202/compress-overlay-ig95id9l/overlay-1.4.2.4.tar.gz to ramdisk
189 12:21:37.535521 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584202/compress-overlay-ig95id9l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584202/extract-overlay-ramdisk-bqsyp6n3/ramdisk
190 12:21:37.539573 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 12:21:37.539687 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
192 12:21:37.539782 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 12:21:37.539877 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
194 12:21:37.539959 Building ramdisk /var/lib/lava/dispatcher/tmp/9584202/extract-overlay-ramdisk-bqsyp6n3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584202/extract-overlay-ramdisk-bqsyp6n3/ramdisk
195 12:21:37.611994 >> 53575 blocks
196 12:21:38.439911 rename /var/lib/lava/dispatcher/tmp/9584202/extract-overlay-ramdisk-bqsyp6n3/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
197 12:21:38.440454 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 12:21:38.440630 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
199 12:21:38.440996 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
200 12:21:38.441129 No mkimage arch provided, not using FIT.
201 12:21:38.441259 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 12:21:38.441389 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 12:21:38.441533 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 12:21:38.441669 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
205 12:21:38.441790 No LXC device requested
206 12:21:38.441918 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 12:21:38.442053 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
208 12:21:38.442182 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 12:21:38.442294 Checking files for TFTP limit of 4294967296 bytes.
210 12:21:38.442813 end: 1 tftp-deploy (duration 00:00:01) [common]
211 12:21:38.442968 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 12:21:38.443106 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 12:21:38.443280 substitutions:
214 12:21:38.443382 - {DTB}: None
215 12:21:38.443483 - {INITRD}: 9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
216 12:21:38.443577 - {KERNEL}: 9584202/tftp-deploy-knf_47kp/kernel/bzImage
217 12:21:38.443672 - {LAVA_MAC}: None
218 12:21:38.443767 - {PRESEED_CONFIG}: None
219 12:21:38.443860 - {PRESEED_LOCAL}: None
220 12:21:38.443952 - {RAMDISK}: 9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
221 12:21:38.444047 - {ROOT_PART}: None
222 12:21:38.444144 - {ROOT}: None
223 12:21:38.444240 - {SERVER_IP}: 192.168.201.1
224 12:21:38.444365 - {TEE}: None
225 12:21:38.444479 Parsed boot commands:
226 12:21:38.444576 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 12:21:38.444812 Parsed boot commands: tftpboot 192.168.201.1 9584202/tftp-deploy-knf_47kp/kernel/bzImage 9584202/tftp-deploy-knf_47kp/kernel/cmdline 9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
228 12:21:38.444952 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 12:21:38.445110 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 12:21:38.445256 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 12:21:38.445396 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 12:21:38.445508 Not connected, no need to disconnect.
233 12:21:38.445633 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 12:21:38.445762 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 12:21:38.445868 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
236 12:21:38.449525 Setting prompt string to ['lava-test: # ']
237 12:21:38.449910 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 12:21:38.450065 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 12:21:38.450211 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 12:21:38.450350 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 12:21:38.450625 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
242 12:21:43.579675 >> Command sent successfully.
243 12:21:43.581938 Returned 0 in 5 seconds
244 12:21:43.682760 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 12:21:43.683126 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 12:21:43.683263 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 12:21:43.683367 Setting prompt string to 'Starting depthcharge on Voema...'
249 12:21:43.683434 Changing prompt to 'Starting depthcharge on Voema...'
250 12:21:43.683503 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
251 12:21:43.683780 [Enter `^Ec?' for help]
252 12:21:43.683860 Duration: 6:52, Remaining: 5:33
253 12:21:43.683926 Pass: 30267, Warn: 1, Skip: 218, Duration: 7:13, Remaining: 5:36
254 12:21:43.683989 Pass: 31264, Warn: 1, Skip: 221, Duration: 7:19, Remaining: 5:17
255 12:21:43.684051 Pass: 32133, Warn: 1, Skip: 352, Duration: 7:40, Remaining: 5:07
256 12:21:43.684116 Pass: 33130, Warn: 1, Skip: 355, Duration: 7:53, Remaining: 4:52
257 12:21:43.684176 Pass: 33497, Warn: 1, Skip: 488, Duration: 8:12, Remaining: 4:53
258 12:21:43.684235 Pass: 33867, Warn: 1, Skip: 618, Duration: 8:47, Remaining: 5:01
259 12:21:43.684292 Pass: 34253, Warn: 1, Skip: 732, Duration: 8:54, Remaining: 4:53
260 12:21:43.684391 Pass: 34617, Warn: 1, Skip: 868, Duration: 8:56, Remaining: 4:43
261 12:21:45.345114 [0m[31mERROR - dEQP error: MESA: warning: WAR
262 12:21:45.345284
263 12:21:45.354407 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
264 12:21:45.360923 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
265 12:21:45.364330 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
266 12:21:45.367648 CPU: AES supported, TXT NOT supported, VT supported
267 12:21:45.374234 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
268 12:21:45.381067 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
269 12:21:45.384476 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
270 12:21:45.387840 VBOOT: Loading verstage.
271 12:21:45.391065 FMAP: Found "FLASH" version 1.1 at 0x1804000.
272 12:21:45.398332 FMAP: base = 0x0 size = 0x2000000 #areas = 32
273 12:21:45.401329 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
274 12:21:45.411594 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
275 12:21:45.418190 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
276 12:21:45.418287
277 12:21:45.418357
278 12:21:45.431575 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
279 12:21:45.445229 Probing TPM: . done!
280 12:21:45.448447 TPM ready after 0 ms
281 12:21:45.451651 Connected to device vid:did:rid of 1ae0:0028:00
282 12:21:45.463189 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
283 12:21:45.470007 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
284 12:21:45.472987 Initialized TPM device CR50 revision 0
285 12:21:45.568161 tlcl_send_startup: Startup return code is 0
286 12:21:45.568322 TPM: setup succeeded
287 12:21:45.583745 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
288 12:21:45.597723 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
289 12:21:45.610580 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
290 12:21:45.620511 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
291 12:21:45.624118 Chrome EC: UHEPI supported
292 12:21:45.627410 Phase 1
293 12:21:45.630476 FMAP: area GBB found @ 1805000 (458752 bytes)
294 12:21:45.640713 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
295 12:21:45.647613 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
296 12:21:45.653942 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
297 12:21:45.660335 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
298 12:21:45.663559 Recovery requested (1009000e)
299 12:21:45.667161 TPM: Extending digest for VBOOT: boot mode into PCR 0
300 12:21:45.678803 tlcl_extend: response is 0
301 12:21:45.685259 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
302 12:21:45.695143 tlcl_extend: response is 0
303 12:21:45.702259 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
304 12:21:45.708254 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
305 12:21:45.715020 BS: verstage times (exec / console): total (unknown) / 142 ms
306 12:21:45.715196
307 12:21:45.715291
308 12:21:45.728514 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
309 12:21:45.735029 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
310 12:21:45.738162 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
311 12:21:45.741755 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
312 12:21:45.748182 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
313 12:21:45.751692 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
314 12:21:45.755046 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
315 12:21:45.758071 TCO_STS: 0000 0000
316 12:21:45.761908 GEN_PMCON: d0015038 00002200
317 12:21:45.765929 GBLRST_CAUSE: 00000000 00000000
318 12:21:45.766055 HPR_CAUSE0: 00000000
319 12:21:45.769459 prev_sleep_state 5
320 12:21:45.772227 Boot Count incremented to 15049
321 12:21:45.778978 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
322 12:21:45.785936 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
323 12:21:45.792283 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
324 12:21:45.799137 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
325 12:21:45.802478 Chrome EC: UHEPI supported
326 12:21:45.809470 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:21:45.821768 Probing TPM: done!
328 12:21:45.828347 Connected to device vid:did:rid of 1ae0:0028:00
329 12:21:45.838381 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
330 12:21:45.842116 Initialized TPM device CR50 revision 0
331 12:21:45.856957 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
332 12:21:45.863907 MRC: Hash idx 0x100b comparison successful.
333 12:21:45.867528 MRC cache found, size faa8
334 12:21:45.867631 bootmode is set to: 2
335 12:21:45.870095 SPD index = 2
336 12:21:45.876906 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
337 12:21:45.879879 SPD: module type is LPDDR4X
338 12:21:45.883231 SPD: module part number is MT53D1G64D4NW-046
339 12:21:45.889643 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
340 12:21:45.893306 SPD: device width 16 bits, bus width 16 bits
341 12:21:45.899563 SPD: module size is 2048 MB (per channel)
342 12:21:46.329062 CBMEM:
343 12:21:46.332606 IMD: root @ 0x76fff000 254 entries.
344 12:21:46.335836 IMD: root @ 0x76ffec00 62 entries.
345 12:21:46.339732 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
346 12:21:46.343331 FMAP: area RW_VPD found @ f35000 (8192 bytes)
347 12:21:46.348882 External stage cache:
348 12:21:46.351867 IMD: root @ 0x7b3ff000 254 entries.
349 12:21:46.354978 IMD: root @ 0x7b3fec00 62 entries.
350 12:21:46.370630 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
351 12:21:46.377011 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
352 12:21:46.383295 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
353 12:21:46.397351 MRC: 'RECOVERY_MRC_CACHE' does not need update.
354 12:21:46.404192 cse_lite: Skip switching to RW in the recovery path
355 12:21:46.404300 8 DIMMs found
356 12:21:46.404430 SMM Memory Map
357 12:21:46.410849 SMRAM : 0x7b000000 0x800000
358 12:21:46.414269 Subregion 0: 0x7b000000 0x200000
359 12:21:46.417048 Subregion 1: 0x7b200000 0x200000
360 12:21:46.420401 Subregion 2: 0x7b400000 0x400000
361 12:21:46.420538 top_of_ram = 0x77000000
362 12:21:46.427261 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
363 12:21:46.433788 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
364 12:21:46.436919 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
365 12:21:46.443604 MTRR Range: Start=ff000000 End=0 (Size 1000000)
366 12:21:46.450414 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
367 12:21:46.456489 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
368 12:21:46.467135 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
369 12:21:46.473592 Processing 211 relocs. Offset value of 0x74c0b000
370 12:21:46.480038 BS: romstage times (exec / console): total (unknown) / 277 ms
371 12:21:46.485986
372 12:21:46.486078
373 12:21:46.495665 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
374 12:21:46.499092 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
375 12:21:46.509148 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
376 12:21:46.515426 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
377 12:21:46.521967 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
378 12:21:46.528804 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
379 12:21:46.572638 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
380 12:21:46.579398 Processing 5008 relocs. Offset value of 0x75d98000
381 12:21:46.582372 BS: postcar times (exec / console): total (unknown) / 59 ms
382 12:21:46.585960
383 12:21:46.586045
384 12:21:46.595643 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
385 12:21:46.595731 Normal boot
386 12:21:46.599470 FW_CONFIG value is 0x804c02
387 12:21:46.602637 PCI: 00:07.0 disabled by fw_config
388 12:21:46.605757 PCI: 00:07.1 disabled by fw_config
389 12:21:46.608731 PCI: 00:0d.2 disabled by fw_config
390 12:21:46.615440 PCI: 00:1c.7 disabled by fw_config
391 12:21:46.618964 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
392 12:21:46.625795 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
393 12:21:46.628722 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
394 12:21:46.635366 GENERIC: 0.0 disabled by fw_config
395 12:21:46.639032 GENERIC: 1.0 disabled by fw_config
396 12:21:46.642060 fw_config match found: DB_USB=USB3_ACTIVE
397 12:21:46.645241 fw_config match found: DB_USB=USB3_ACTIVE
398 12:21:46.648970 fw_config match found: DB_USB=USB3_ACTIVE
399 12:21:46.655428 fw_config match found: DB_USB=USB3_ACTIVE
400 12:21:46.658984 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
401 12:21:46.665701 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
402 12:21:46.675255 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
403 12:21:46.682197 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
404 12:21:46.685486 microcode: sig=0x806c1 pf=0x80 revision=0x86
405 12:21:46.691754 microcode: Update skipped, already up-to-date
406 12:21:46.698277 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
407 12:21:46.726515 Detected 4 core, 8 thread CPU.
408 12:21:46.729295 Setting up SMI for CPU
409 12:21:46.732827 IED base = 0x7b400000
410 12:21:46.732913 IED size = 0x00400000
411 12:21:46.736016 Will perform SMM setup.
412 12:21:46.742512 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
413 12:21:46.749271 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
414 12:21:46.755631 Processing 16 relocs. Offset value of 0x00030000
415 12:21:46.759240 Attempting to start 7 APs
416 12:21:46.762663 Waiting for 10ms after sending INIT.
417 12:21:46.777994 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
418 12:21:46.778081 done.
419 12:21:46.781630 AP: slot 7 apic_id 5.
420 12:21:46.785483 AP: slot 4 apic_id 4.
421 12:21:46.785571 AP: slot 6 apic_id 6.
422 12:21:46.788147 AP: slot 3 apic_id 7.
423 12:21:46.791224 AP: slot 2 apic_id 3.
424 12:21:46.794927 Waiting for 2nd SIPI to complete...done.
425 12:21:46.798037 AP: slot 5 apic_id 2.
426 12:21:46.805298 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
427 12:21:46.810913 Processing 13 relocs. Offset value of 0x00038000
428 12:21:46.815026 Unable to locate Global NVS
429 12:21:46.821081 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
430 12:21:46.824188 Installing permanent SMM handler to 0x7b000000
431 12:21:46.834092 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
432 12:21:46.837528 Processing 794 relocs. Offset value of 0x7b010000
433 12:21:46.847479 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
434 12:21:46.851041 Processing 13 relocs. Offset value of 0x7b008000
435 12:21:46.857502 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
436 12:21:46.864056 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
437 12:21:46.870911 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
438 12:21:46.873838 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
439 12:21:46.880205 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
440 12:21:46.886949 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
441 12:21:46.893612 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
442 12:21:46.897075 Unable to locate Global NVS
443 12:21:46.903814 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
444 12:21:46.906978 Clearing SMI status registers
445 12:21:46.910296 SMI_STS: PM1
446 12:21:46.910384 PM1_STS: PWRBTN
447 12:21:46.916455 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
448 12:21:46.920062 In relocation handler: CPU 0
449 12:21:46.922993 New SMBASE=0x7b000000 IEDBASE=0x7b400000
450 12:21:46.929905 Writing SMRR. base = 0x7b000006, mask=0xff800c00
451 12:21:46.933233 Relocation complete.
452 12:21:46.940305 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
453 12:21:46.943220 In relocation handler: CPU 1
454 12:21:46.946777 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
455 12:21:46.949858 Relocation complete.
456 12:21:46.956525 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
457 12:21:46.959610 In relocation handler: CPU 5
458 12:21:46.963030 New SMBASE=0x7affec00 IEDBASE=0x7b400000
459 12:21:46.966183 Writing SMRR. base = 0x7b000006, mask=0xff800c00
460 12:21:46.969545 Relocation complete.
461 12:21:46.975912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
462 12:21:46.979935 In relocation handler: CPU 2
463 12:21:46.983086 New SMBASE=0x7afff800 IEDBASE=0x7b400000
464 12:21:46.986294 Relocation complete.
465 12:21:46.992890 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
466 12:21:46.996422 In relocation handler: CPU 3
467 12:21:46.999429 New SMBASE=0x7afff400 IEDBASE=0x7b400000
468 12:21:47.003093 Relocation complete.
469 12:21:47.010772 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
470 12:21:47.014076 In relocation handler: CPU 6
471 12:21:47.017626 New SMBASE=0x7affe800 IEDBASE=0x7b400000
472 12:21:47.020554 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:21:47.023758 Relocation complete.
474 12:21:47.030538 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
475 12:21:47.033775 In relocation handler: CPU 7
476 12:21:47.037301 New SMBASE=0x7affe400 IEDBASE=0x7b400000
477 12:21:47.040545 Relocation complete.
478 12:21:47.047144 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
479 12:21:47.050692 In relocation handler: CPU 4
480 12:21:47.053563 New SMBASE=0x7afff000 IEDBASE=0x7b400000
481 12:21:47.060184 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 12:21:47.060351 Relocation complete.
483 12:21:47.063623 Initializing CPU #0
484 12:21:47.067096 CPU: vendor Intel device 806c1
485 12:21:47.070185 CPU: family 06, model 8c, stepping 01
486 12:21:47.073545 Clearing out pending MCEs
487 12:21:47.077202 Setting up local APIC...
488 12:21:47.079891 apic_id: 0x00 done.
489 12:21:47.080040 Turbo is available but hidden
490 12:21:47.083310 Turbo is available and visible
491 12:21:47.089943 microcode: Update skipped, already up-to-date
492 12:21:47.090031 CPU #0 initialized
493 12:21:47.093598 Initializing CPU #7
494 12:21:47.096547 Initializing CPU #3
495 12:21:47.096633 Initializing CPU #6
496 12:21:47.099996 CPU: vendor Intel device 806c1
497 12:21:47.103081 CPU: family 06, model 8c, stepping 01
498 12:21:47.106521 CPU: vendor Intel device 806c1
499 12:21:47.113673 CPU: family 06, model 8c, stepping 01
500 12:21:47.114126 Clearing out pending MCEs
501 12:21:47.116553 Clearing out pending MCEs
502 12:21:47.119669 Setting up local APIC...
503 12:21:47.123536 CPU: vendor Intel device 806c1
504 12:21:47.126794 CPU: family 06, model 8c, stepping 01
505 12:21:47.130299 Initializing CPU #4
506 12:21:47.130679 Clearing out pending MCEs
507 12:21:47.133804 CPU: vendor Intel device 806c1
508 12:21:47.136089 CPU: family 06, model 8c, stepping 01
509 12:21:47.139394 Setting up local APIC...
510 12:21:47.143150 apic_id: 0x07 done.
511 12:21:47.146004 Setting up local APIC...
512 12:21:47.146092 Clearing out pending MCEs
513 12:21:47.149578 apic_id: 0x05 done.
514 12:21:47.152960 Setting up local APIC...
515 12:21:47.156210 Initializing CPU #1
516 12:21:47.159471 microcode: Update skipped, already up-to-date
517 12:21:47.163062 apic_id: 0x04 done.
518 12:21:47.163162 CPU #7 initialized
519 12:21:47.169248 microcode: Update skipped, already up-to-date
520 12:21:47.169336 Initializing CPU #5
521 12:21:47.172710 Initializing CPU #2
522 12:21:47.176037 CPU: vendor Intel device 806c1
523 12:21:47.179515 CPU: family 06, model 8c, stepping 01
524 12:21:47.179604 CPU #4 initialized
525 12:21:47.182410 CPU: vendor Intel device 806c1
526 12:21:47.189214 CPU: family 06, model 8c, stepping 01
527 12:21:47.189304 Clearing out pending MCEs
528 12:21:47.196078 microcode: Update skipped, already up-to-date
529 12:21:47.196162 apic_id: 0x06 done.
530 12:21:47.199003 Clearing out pending MCEs
531 12:21:47.202702 Setting up local APIC...
532 12:21:47.205607 microcode: Update skipped, already up-to-date
533 12:21:47.209007 CPU #3 initialized
534 12:21:47.212662 Setting up local APIC...
535 12:21:47.215813 CPU: vendor Intel device 806c1
536 12:21:47.219288 CPU: family 06, model 8c, stepping 01
537 12:21:47.219372 apic_id: 0x02 done.
538 12:21:47.221962 apic_id: 0x03 done.
539 12:21:47.225495 microcode: Update skipped, already up-to-date
540 12:21:47.231956 microcode: Update skipped, already up-to-date
541 12:21:47.232053 CPU #5 initialized
542 12:21:47.235517 CPU #2 initialized
543 12:21:47.238660 Clearing out pending MCEs
544 12:21:47.238746 CPU #6 initialized
545 12:21:47.241978 Setting up local APIC...
546 12:21:47.245470 apic_id: 0x01 done.
547 12:21:47.248703 microcode: Update skipped, already up-to-date
548 12:21:47.251977 CPU #1 initialized
549 12:21:47.255164 bsp_do_flight_plan done after 457 msecs.
550 12:21:47.258971 CPU: frequency set to 4400 MHz
551 12:21:47.262142 Enabling SMIs.
552 12:21:47.268432 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
553 12:21:47.282962 SATAXPCIE1 indicates PCIe NVMe is present
554 12:21:47.286498 Probing TPM: done!
555 12:21:47.289729 Connected to device vid:did:rid of 1ae0:0028:00
556 12:21:47.300237 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
557 12:21:47.303725 Initialized TPM device CR50 revision 0
558 12:21:47.306983 Enabling S0i3.4
559 12:21:47.313898 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
560 12:21:47.317293 Found a VBT of 8704 bytes after decompression
561 12:21:47.323602 cse_lite: CSE RO boot. HybridStorageMode disabled
562 12:21:47.330336 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
563 12:21:47.405134 FSPS returned 0
564 12:21:47.408178 Executing Phase 1 of FspMultiPhaseSiInit
565 12:21:47.418547 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
566 12:21:47.421421 port C0 DISC req: usage 1 usb3 1 usb2 5
567 12:21:47.424874 Raw Buffer output 0 00000511
568 12:21:47.428128 Raw Buffer output 1 00000000
569 12:21:47.432063 pmc_send_ipc_cmd succeeded
570 12:21:47.438936 port C1 DISC req: usage 1 usb3 2 usb2 3
571 12:21:47.439025 Raw Buffer output 0 00000321
572 12:21:47.442043 Raw Buffer output 1 00000000
573 12:21:47.446312 pmc_send_ipc_cmd succeeded
574 12:21:47.451352 Detected 4 core, 8 thread CPU.
575 12:21:47.454529 Detected 4 core, 8 thread CPU.
576 12:21:47.654997 Display FSP Version Info HOB
577 12:21:47.658002 Reference Code - CPU = a.0.4c.31
578 12:21:47.661466 uCode Version = 0.0.0.86
579 12:21:47.664959 TXT ACM version = ff.ff.ff.ffff
580 12:21:47.668211 Reference Code - ME = a.0.4c.31
581 12:21:47.671469 MEBx version = 0.0.0.0
582 12:21:47.674448 ME Firmware Version = Consumer SKU
583 12:21:47.678092 Reference Code - PCH = a.0.4c.31
584 12:21:47.681039 PCH-CRID Status = Disabled
585 12:21:47.684407 PCH-CRID Original Value = ff.ff.ff.ffff
586 12:21:47.687899 PCH-CRID New Value = ff.ff.ff.ffff
587 12:21:47.691282 OPROM - RST - RAID = ff.ff.ff.ffff
588 12:21:47.694724 PCH Hsio Version = 4.0.0.0
589 12:21:47.697604 Reference Code - SA - System Agent = a.0.4c.31
590 12:21:47.701217 Reference Code - MRC = 2.0.0.1
591 12:21:47.704438 SA - PCIe Version = a.0.4c.31
592 12:21:47.707441 SA-CRID Status = Disabled
593 12:21:47.710921 SA-CRID Original Value = 0.0.0.1
594 12:21:47.714408 SA-CRID New Value = 0.0.0.1
595 12:21:47.717514 OPROM - VBIOS = ff.ff.ff.ffff
596 12:21:47.720982 IO Manageability Engine FW Version = 11.1.4.0
597 12:21:47.724033 PHY Build Version = 0.0.0.e0
598 12:21:47.727336 Thunderbolt(TM) FW Version = 0.0.0.0
599 12:21:47.734089 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
600 12:21:47.737330 ITSS IRQ Polarities Before:
601 12:21:47.737415 IPC0: 0xffffffff
602 12:21:47.740728 IPC1: 0xffffffff
603 12:21:47.740815 IPC2: 0xffffffff
604 12:21:47.743765 IPC3: 0xffffffff
605 12:21:47.747321 ITSS IRQ Polarities After:
606 12:21:47.747398 IPC0: 0xffffffff
607 12:21:47.750548 IPC1: 0xffffffff
608 12:21:47.750624 IPC2: 0xffffffff
609 12:21:47.753711 IPC3: 0xffffffff
610 12:21:47.757351 Found PCIe Root Port #9 at PCI: 00:1d.0.
611 12:21:47.770507 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
612 12:21:47.780484 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
613 12:21:47.793408 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
614 12:21:47.800131 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
615 12:21:47.803897 Enumerating buses...
616 12:21:47.806899 Show all devs... Before device enumeration.
617 12:21:47.810245 Root Device: enabled 1
618 12:21:47.810323 DOMAIN: 0000: enabled 1
619 12:21:47.813417 CPU_CLUSTER: 0: enabled 1
620 12:21:47.817011 PCI: 00:00.0: enabled 1
621 12:21:47.820003 PCI: 00:02.0: enabled 1
622 12:21:47.820079 PCI: 00:04.0: enabled 1
623 12:21:47.823488 PCI: 00:05.0: enabled 1
624 12:21:47.826978 PCI: 00:06.0: enabled 0
625 12:21:47.830147 PCI: 00:07.0: enabled 0
626 12:21:47.830234 PCI: 00:07.1: enabled 0
627 12:21:47.833416 PCI: 00:07.2: enabled 0
628 12:21:47.837139 PCI: 00:07.3: enabled 0
629 12:21:47.839863 PCI: 00:08.0: enabled 1
630 12:21:47.839939 PCI: 00:09.0: enabled 0
631 12:21:47.843354 PCI: 00:0a.0: enabled 0
632 12:21:47.846759 PCI: 00:0d.0: enabled 1
633 12:21:47.850213 PCI: 00:0d.1: enabled 0
634 12:21:47.850302 PCI: 00:0d.2: enabled 0
635 12:21:47.853509 PCI: 00:0d.3: enabled 0
636 12:21:47.856601 PCI: 00:0e.0: enabled 0
637 12:21:47.860002 PCI: 00:10.2: enabled 1
638 12:21:47.860096 PCI: 00:10.6: enabled 0
639 12:21:47.863342 PCI: 00:10.7: enabled 0
640 12:21:47.866427 PCI: 00:12.0: enabled 0
641 12:21:47.866516 PCI: 00:12.6: enabled 0
642 12:21:47.869820 PCI: 00:13.0: enabled 0
643 12:21:47.873445 PCI: 00:14.0: enabled 1
644 12:21:47.876509 PCI: 00:14.1: enabled 0
645 12:21:47.876586 PCI: 00:14.2: enabled 1
646 12:21:47.879705 PCI: 00:14.3: enabled 1
647 12:21:47.883399 PCI: 00:15.0: enabled 1
648 12:21:47.886283 PCI: 00:15.1: enabled 1
649 12:21:47.886363 PCI: 00:15.2: enabled 1
650 12:21:47.889586 PCI: 00:15.3: enabled 1
651 12:21:47.893079 PCI: 00:16.0: enabled 1
652 12:21:47.896215 PCI: 00:16.1: enabled 0
653 12:21:47.896293 PCI: 00:16.2: enabled 0
654 12:21:47.899515 PCI: 00:16.3: enabled 0
655 12:21:47.903034 PCI: 00:16.4: enabled 0
656 12:21:47.906430 PCI: 00:16.5: enabled 0
657 12:21:47.906508 PCI: 00:17.0: enabled 1
658 12:21:47.909387 PCI: 00:19.0: enabled 0
659 12:21:47.912954 PCI: 00:19.1: enabled 1
660 12:21:47.915981 PCI: 00:19.2: enabled 0
661 12:21:47.916056 PCI: 00:1c.0: enabled 1
662 12:21:47.919373 PCI: 00:1c.1: enabled 0
663 12:21:47.922572 PCI: 00:1c.2: enabled 0
664 12:21:47.922649 PCI: 00:1c.3: enabled 0
665 12:21:47.926049 PCI: 00:1c.4: enabled 0
666 12:21:47.929537 PCI: 00:1c.5: enabled 0
667 12:21:47.932501 PCI: 00:1c.6: enabled 1
668 12:21:47.932588 PCI: 00:1c.7: enabled 0
669 12:21:47.935885 PCI: 00:1d.0: enabled 1
670 12:21:47.939469 PCI: 00:1d.1: enabled 0
671 12:21:47.942479 PCI: 00:1d.2: enabled 1
672 12:21:47.942576 PCI: 00:1d.3: enabled 0
673 12:21:47.945931 PCI: 00:1e.0: enabled 1
674 12:21:47.949324 PCI: 00:1e.1: enabled 0
675 12:21:47.952471 PCI: 00:1e.2: enabled 1
676 12:21:47.952560 PCI: 00:1e.3: enabled 1
677 12:21:47.955635 PCI: 00:1f.0: enabled 1
678 12:21:47.959168 PCI: 00:1f.1: enabled 0
679 12:21:47.962227 PCI: 00:1f.2: enabled 1
680 12:21:47.962303 PCI: 00:1f.3: enabled 1
681 12:21:47.965389 PCI: 00:1f.4: enabled 0
682 12:21:47.968831 PCI: 00:1f.5: enabled 1
683 12:21:47.972441 PCI: 00:1f.6: enabled 0
684 12:21:47.972517 PCI: 00:1f.7: enabled 0
685 12:21:47.975387 APIC: 00: enabled 1
686 12:21:47.978633 GENERIC: 0.0: enabled 1
687 12:21:47.978711 GENERIC: 0.0: enabled 1
688 12:21:47.982142 GENERIC: 1.0: enabled 1
689 12:21:47.985698 GENERIC: 0.0: enabled 1
690 12:21:47.988710 GENERIC: 1.0: enabled 1
691 12:21:47.988786 USB0 port 0: enabled 1
692 12:21:47.991917 GENERIC: 0.0: enabled 1
693 12:21:47.995201 USB0 port 0: enabled 1
694 12:21:47.995278 GENERIC: 0.0: enabled 1
695 12:21:47.998933 I2C: 00:1a: enabled 1
696 12:21:48.001749 I2C: 00:31: enabled 1
697 12:21:48.005011 I2C: 00:32: enabled 1
698 12:21:48.005101 I2C: 00:10: enabled 1
699 12:21:48.008411 I2C: 00:15: enabled 1
700 12:21:48.011620 GENERIC: 0.0: enabled 0
701 12:21:48.011699 GENERIC: 1.0: enabled 0
702 12:21:48.015420 GENERIC: 0.0: enabled 1
703 12:21:48.018381 SPI: 00: enabled 1
704 12:21:48.018456 SPI: 00: enabled 1
705 12:21:48.021574 PNP: 0c09.0: enabled 1
706 12:21:48.025122 GENERIC: 0.0: enabled 1
707 12:21:48.025215 USB3 port 0: enabled 1
708 12:21:48.028513 USB3 port 1: enabled 1
709 12:21:48.031743 USB3 port 2: enabled 0
710 12:21:48.034851 USB3 port 3: enabled 0
711 12:21:48.034927 USB2 port 0: enabled 0
712 12:21:48.038619 USB2 port 1: enabled 1
713 12:21:48.041661 USB2 port 2: enabled 1
714 12:21:48.041736 USB2 port 3: enabled 0
715 12:21:48.045011 USB2 port 4: enabled 1
716 12:21:48.048191 USB2 port 5: enabled 0
717 12:21:48.051439 USB2 port 6: enabled 0
718 12:21:48.051514 USB2 port 7: enabled 0
719 12:21:48.054785 USB2 port 8: enabled 0
720 12:21:48.057802 USB2 port 9: enabled 0
721 12:21:48.057879 USB3 port 0: enabled 0
722 12:21:48.061196 USB3 port 1: enabled 1
723 12:21:48.064631 USB3 port 2: enabled 0
724 12:21:48.067938 USB3 port 3: enabled 0
725 12:21:48.068015 GENERIC: 0.0: enabled 1
726 12:21:48.071306 GENERIC: 1.0: enabled 1
727 12:21:48.074362 APIC: 01: enabled 1
728 12:21:48.074434 APIC: 03: enabled 1
729 12:21:48.077922 APIC: 07: enabled 1
730 12:21:48.077993 APIC: 04: enabled 1
731 12:21:48.081410 APIC: 02: enabled 1
732 12:21:48.084498 APIC: 06: enabled 1
733 12:21:48.084568 APIC: 05: enabled 1
734 12:21:48.087726 Compare with tree...
735 12:21:48.091072 Root Device: enabled 1
736 12:21:48.091145 DOMAIN: 0000: enabled 1
737 12:21:48.094434 PCI: 00:00.0: enabled 1
738 12:21:48.097737 PCI: 00:02.0: enabled 1
739 12:21:48.101291 PCI: 00:04.0: enabled 1
740 12:21:48.104488 GENERIC: 0.0: enabled 1
741 12:21:48.104574 PCI: 00:05.0: enabled 1
742 12:21:48.107945 PCI: 00:06.0: enabled 0
743 12:21:48.110750 PCI: 00:07.0: enabled 0
744 12:21:48.114526 GENERIC: 0.0: enabled 1
745 12:21:48.117394 PCI: 00:07.1: enabled 0
746 12:21:48.121032 GENERIC: 1.0: enabled 1
747 12:21:48.121123 PCI: 00:07.2: enabled 0
748 12:21:48.124259 GENERIC: 0.0: enabled 1
749 12:21:48.127113 PCI: 00:07.3: enabled 0
750 12:21:48.130613 GENERIC: 1.0: enabled 1
751 12:21:48.133906 PCI: 00:08.0: enabled 1
752 12:21:48.133992 PCI: 00:09.0: enabled 0
753 12:21:48.137191 PCI: 00:0a.0: enabled 0
754 12:21:48.140926 PCI: 00:0d.0: enabled 1
755 12:21:48.144375 USB0 port 0: enabled 1
756 12:21:48.147980 USB3 port 0: enabled 1
757 12:21:48.148495 USB3 port 1: enabled 1
758 12:21:48.150709 USB3 port 2: enabled 0
759 12:21:48.154323 USB3 port 3: enabled 0
760 12:21:48.157174 PCI: 00:0d.1: enabled 0
761 12:21:48.160772 PCI: 00:0d.2: enabled 0
762 12:21:48.164155 GENERIC: 0.0: enabled 1
763 12:21:48.164657 PCI: 00:0d.3: enabled 0
764 12:21:48.167411 PCI: 00:0e.0: enabled 0
765 12:21:48.170446 PCI: 00:10.2: enabled 1
766 12:21:48.173979 PCI: 00:10.6: enabled 0
767 12:21:48.177639 PCI: 00:10.7: enabled 0
768 12:21:48.178359 PCI: 00:12.0: enabled 0
769 12:21:48.180733 PCI: 00:12.6: enabled 0
770 12:21:48.184205 PCI: 00:13.0: enabled 0
771 12:21:48.187269 PCI: 00:14.0: enabled 1
772 12:21:48.187749 USB0 port 0: enabled 1
773 12:21:48.190253 USB2 port 0: enabled 0
774 12:21:48.193639 USB2 port 1: enabled 1
775 12:21:48.197102 USB2 port 2: enabled 1
776 12:21:48.200084 USB2 port 3: enabled 0
777 12:21:48.203502 USB2 port 4: enabled 1
778 12:21:48.203950 USB2 port 5: enabled 0
779 12:21:48.206828 USB2 port 6: enabled 0
780 12:21:48.210148 USB2 port 7: enabled 0
781 12:21:48.213721 USB2 port 8: enabled 0
782 12:21:48.216843 USB2 port 9: enabled 0
783 12:21:48.220182 USB3 port 0: enabled 0
784 12:21:48.220708 USB3 port 1: enabled 1
785 12:21:48.223268 USB3 port 2: enabled 0
786 12:21:48.226724 USB3 port 3: enabled 0
787 12:21:48.230031 PCI: 00:14.1: enabled 0
788 12:21:48.233296 PCI: 00:14.2: enabled 1
789 12:21:48.236535 PCI: 00:14.3: enabled 1
790 12:21:48.237029 GENERIC: 0.0: enabled 1
791 12:21:48.240008 PCI: 00:15.0: enabled 1
792 12:21:48.243222 I2C: 00:1a: enabled 1
793 12:21:48.247059 I2C: 00:31: enabled 1
794 12:21:48.247557 I2C: 00:32: enabled 1
795 12:21:48.250478 PCI: 00:15.1: enabled 1
796 12:21:48.253741 I2C: 00:10: enabled 1
797 12:21:48.256819 PCI: 00:15.2: enabled 1
798 12:21:48.257299 PCI: 00:15.3: enabled 1
799 12:21:48.260244 PCI: 00:16.0: enabled 1
800 12:21:48.263567 PCI: 00:16.1: enabled 0
801 12:21:48.266859 PCI: 00:16.2: enabled 0
802 12:21:48.270480 PCI: 00:16.3: enabled 0
803 12:21:48.270984 PCI: 00:16.4: enabled 0
804 12:21:48.273869 PCI: 00:16.5: enabled 0
805 12:21:48.277147 PCI: 00:17.0: enabled 1
806 12:21:48.280146 PCI: 00:19.0: enabled 0
807 12:21:48.283531 PCI: 00:19.1: enabled 1
808 12:21:48.283996 I2C: 00:15: enabled 1
809 12:21:48.286577 PCI: 00:19.2: enabled 0
810 12:21:48.290324 PCI: 00:1d.0: enabled 1
811 12:21:48.339995 GENERIC: 0.0: enabled 1
812 12:21:48.340734 PCI: 00:1e.0: enabled 1
813 12:21:48.341263 PCI: 00:1e.1: enabled 0
814 12:21:48.341665 PCI: 00:1e.2: enabled 1
815 12:21:48.341999 SPI: 00: enabled 1
816 12:21:48.342317 PCI: 00:1e.3: enabled 1
817 12:21:48.342666 SPI: 00: enabled 1
818 12:21:48.343350 PCI: 00:1f.0: enabled 1
819 12:21:48.343743 PNP: 0c09.0: enabled 1
820 12:21:48.344086 PCI: 00:1f.1: enabled 0
821 12:21:48.344484 PCI: 00:1f.2: enabled 1
822 12:21:48.344829 GENERIC: 0.0: enabled 1
823 12:21:48.345169 GENERIC: 0.0: enabled 1
824 12:21:48.345523 GENERIC: 1.0: enabled 1
825 12:21:48.345876 PCI: 00:1f.3: enabled 1
826 12:21:48.346188 PCI: 00:1f.4: enabled 0
827 12:21:48.346483 PCI: 00:1f.5: enabled 1
828 12:21:48.346773 PCI: 00:1f.6: enabled 0
829 12:21:48.347060 PCI: 00:1f.7: enabled 0
830 12:21:48.391203 CPU_CLUSTER: 0: enabled 1
831 12:21:48.391305 APIC: 00: enabled 1
832 12:21:48.391377 APIC: 01: enabled 1
833 12:21:48.391640 APIC: 03: enabled 1
834 12:21:48.391708 APIC: 07: enabled 1
835 12:21:48.391770 APIC: 04: enabled 1
836 12:21:48.391829 APIC: 02: enabled 1
837 12:21:48.391887 APIC: 06: enabled 1
838 12:21:48.392135 APIC: 05: enabled 1
839 12:21:48.392223 Root Device scanning...
840 12:21:48.392284 scan_static_bus for Root Device
841 12:21:48.392604 DOMAIN: 0000 enabled
842 12:21:48.392690 CPU_CLUSTER: 0 enabled
843 12:21:48.392755 DOMAIN: 0000 scanning...
844 12:21:48.392813 PCI: pci_scan_bus for bus 00
845 12:21:48.393645 PCI: 00:00.0 [8086/0000] ops
846 12:21:48.393711 PCI: 00:00.0 [8086/9a12] enabled
847 12:21:48.393965 PCI: 00:02.0 [8086/0000] bus ops
848 12:21:48.394029 PCI: 00:02.0 [8086/9a40] enabled
849 12:21:48.429700 PCI: 00:04.0 [8086/0000] bus ops
850 12:21:48.430221 PCI: 00:04.0 [8086/9a03] enabled
851 12:21:48.431129 PCI: 00:05.0 [8086/9a19] enabled
852 12:21:48.431643 PCI: 00:07.0 [0000/0000] hidden
853 12:21:48.432041 PCI: 00:08.0 [8086/9a11] enabled
854 12:21:48.432436 PCI: 00:0a.0 [8086/9a0d] disabled
855 12:21:48.432766 PCI: 00:0d.0 [8086/0000] bus ops
856 12:21:48.432994 PCI: 00:0d.0 [8086/9a13] enabled
857 12:21:48.433214 PCI: 00:14.0 [8086/0000] bus ops
858 12:21:48.433476 PCI: 00:14.0 [8086/a0ed] enabled
859 12:21:48.434017 PCI: 00:14.2 [8086/a0ef] enabled
860 12:21:48.434273 PCI: 00:14.3 [8086/0000] bus ops
861 12:21:48.434515 PCI: 00:14.3 [8086/a0f0] enabled
862 12:21:48.437253 PCI: 00:15.0 [8086/0000] bus ops
863 12:21:48.440533 PCI: 00:15.0 [8086/a0e8] enabled
864 12:21:48.443901 PCI: 00:15.1 [8086/0000] bus ops
865 12:21:48.447432 PCI: 00:15.1 [8086/a0e9] enabled
866 12:21:48.450819 PCI: 00:15.2 [8086/0000] bus ops
867 12:21:48.453720 PCI: 00:15.2 [8086/a0ea] enabled
868 12:21:48.457292 PCI: 00:15.3 [8086/0000] bus ops
869 12:21:48.460617 PCI: 00:15.3 [8086/a0eb] enabled
870 12:21:48.463463 PCI: 00:16.0 [8086/0000] ops
871 12:21:48.467044 PCI: 00:16.0 [8086/a0e0] enabled
872 12:21:48.473258 PCI: Static device PCI: 00:17.0 not found, disabling it.
873 12:21:48.476743 PCI: 00:19.0 [8086/0000] bus ops
874 12:21:48.479806 PCI: 00:19.0 [8086/a0c5] disabled
875 12:21:48.483485 PCI: 00:19.1 [8086/0000] bus ops
876 12:21:48.486503 PCI: 00:19.1 [8086/a0c6] enabled
877 12:21:48.489588 PCI: 00:1d.0 [8086/0000] bus ops
878 12:21:48.492907 PCI: 00:1d.0 [8086/a0b0] enabled
879 12:21:48.496589 PCI: 00:1e.0 [8086/0000] ops
880 12:21:48.499772 PCI: 00:1e.0 [8086/a0a8] enabled
881 12:21:48.503204 PCI: 00:1e.2 [8086/0000] bus ops
882 12:21:48.506158 PCI: 00:1e.2 [8086/a0aa] enabled
883 12:21:48.509517 PCI: 00:1e.3 [8086/0000] bus ops
884 12:21:48.513031 PCI: 00:1e.3 [8086/a0ab] enabled
885 12:21:48.516067 PCI: 00:1f.0 [8086/0000] bus ops
886 12:21:48.519385 PCI: 00:1f.0 [8086/a087] enabled
887 12:21:48.519471 RTC Init
888 12:21:48.522871 Set power on after power failure.
889 12:21:48.525950 Disabling Deep S3
890 12:21:48.526035 Disabling Deep S3
891 12:21:48.529424 Disabling Deep S4
892 12:21:48.532563 Disabling Deep S4
893 12:21:48.532648 Disabling Deep S5
894 12:21:48.535873 Disabling Deep S5
895 12:21:48.539212 PCI: 00:1f.2 [0000/0000] hidden
896 12:21:48.542587 PCI: 00:1f.3 [8086/0000] bus ops
897 12:21:48.545995 PCI: 00:1f.3 [8086/a0c8] enabled
898 12:21:48.548939 PCI: 00:1f.5 [8086/0000] bus ops
899 12:21:48.552085 PCI: 00:1f.5 [8086/a0a4] enabled
900 12:21:48.555648 PCI: Leftover static devices:
901 12:21:48.555725 PCI: 00:10.2
902 12:21:48.558800 PCI: 00:10.6
903 12:21:48.558886 PCI: 00:10.7
904 12:21:48.558951 PCI: 00:06.0
905 12:21:48.562055 PCI: 00:07.1
906 12:21:48.562126 PCI: 00:07.2
907 12:21:48.565411 PCI: 00:07.3
908 12:21:48.565483 PCI: 00:09.0
909 12:21:48.565544 PCI: 00:0d.1
910 12:21:48.568880 PCI: 00:0d.2
911 12:21:48.568952 PCI: 00:0d.3
912 12:21:48.572322 PCI: 00:0e.0
913 12:21:48.572424 PCI: 00:12.0
914 12:21:48.572484 PCI: 00:12.6
915 12:21:48.575329 PCI: 00:13.0
916 12:21:48.575400 PCI: 00:14.1
917 12:21:48.578774 PCI: 00:16.1
918 12:21:48.578845 PCI: 00:16.2
919 12:21:48.582073 PCI: 00:16.3
920 12:21:48.582142 PCI: 00:16.4
921 12:21:48.582202 PCI: 00:16.5
922 12:21:48.585420 PCI: 00:17.0
923 12:21:48.585498 PCI: 00:19.2
924 12:21:48.588497 PCI: 00:1e.1
925 12:21:48.588571 PCI: 00:1f.1
926 12:21:48.588636 PCI: 00:1f.4
927 12:21:48.591830 PCI: 00:1f.6
928 12:21:48.591900 PCI: 00:1f.7
929 12:21:48.595121 PCI: Check your devicetree.cb.
930 12:21:48.598451 PCI: 00:02.0 scanning...
931 12:21:48.601984 scan_generic_bus for PCI: 00:02.0
932 12:21:48.604944 scan_generic_bus for PCI: 00:02.0 done
933 12:21:48.611908 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
934 12:21:48.611983 PCI: 00:04.0 scanning...
935 12:21:48.618540 scan_generic_bus for PCI: 00:04.0
936 12:21:48.618615 GENERIC: 0.0 enabled
937 12:21:48.625354 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
938 12:21:48.628745 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
939 12:21:48.632124 PCI: 00:0d.0 scanning...
940 12:21:48.635162 scan_static_bus for PCI: 00:0d.0
941 12:21:48.638255 USB0 port 0 enabled
942 12:21:48.642332 USB0 port 0 scanning...
943 12:21:48.644825 scan_static_bus for USB0 port 0
944 12:21:48.644903 USB3 port 0 enabled
945 12:21:48.648195 USB3 port 1 enabled
946 12:21:48.651337 USB3 port 2 disabled
947 12:21:48.651410 USB3 port 3 disabled
948 12:21:48.654675 USB3 port 0 scanning...
949 12:21:48.657920 scan_static_bus for USB3 port 0
950 12:21:48.661224 scan_static_bus for USB3 port 0 done
951 12:21:48.667780 scan_bus: bus USB3 port 0 finished in 6 msecs
952 12:21:48.667859 USB3 port 1 scanning...
953 12:21:48.671131 scan_static_bus for USB3 port 1
954 12:21:48.677462 scan_static_bus for USB3 port 1 done
955 12:21:48.680902 scan_bus: bus USB3 port 1 finished in 6 msecs
956 12:21:48.684390 scan_static_bus for USB0 port 0 done
957 12:21:48.687737 scan_bus: bus USB0 port 0 finished in 43 msecs
958 12:21:48.694160 scan_static_bus for PCI: 00:0d.0 done
959 12:21:48.697528 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
960 12:21:48.701190 PCI: 00:14.0 scanning...
961 12:21:48.704196 scan_static_bus for PCI: 00:14.0
962 12:21:48.707426 USB0 port 0 enabled
963 12:21:48.707500 USB0 port 0 scanning...
964 12:21:48.710942 scan_static_bus for USB0 port 0
965 12:21:48.714023 USB2 port 0 disabled
966 12:21:48.717487 USB2 port 1 enabled
967 12:21:48.717561 USB2 port 2 enabled
968 12:21:48.720598 USB2 port 3 disabled
969 12:21:48.720672 USB2 port 4 enabled
970 12:21:48.724036 USB2 port 5 disabled
971 12:21:48.726834 USB2 port 6 disabled
972 12:21:48.730438 USB2 port 7 disabled
973 12:21:48.730514 USB2 port 8 disabled
974 12:21:48.733816 USB2 port 9 disabled
975 12:21:48.733890 USB3 port 0 disabled
976 12:21:48.736804 USB3 port 1 enabled
977 12:21:48.740521 USB3 port 2 disabled
978 12:21:48.740593 USB3 port 3 disabled
979 12:21:48.743712 USB2 port 1 scanning...
980 12:21:48.746779 scan_static_bus for USB2 port 1
981 12:21:48.750229 scan_static_bus for USB2 port 1 done
982 12:21:48.756868 scan_bus: bus USB2 port 1 finished in 6 msecs
983 12:21:48.756944 USB2 port 2 scanning...
984 12:21:48.763081 scan_static_bus for USB2 port 2
985 12:21:48.766851 scan_static_bus for USB2 port 2 done
986 12:21:48.769845 scan_bus: bus USB2 port 2 finished in 6 msecs
987 12:21:48.773422 USB2 port 4 scanning...
988 12:21:48.776284 scan_static_bus for USB2 port 4
989 12:21:48.779584 scan_static_bus for USB2 port 4 done
990 12:21:48.782939 scan_bus: bus USB2 port 4 finished in 6 msecs
991 12:21:48.786213 USB3 port 1 scanning...
992 12:21:48.789637 scan_static_bus for USB3 port 1
993 12:21:48.792645 scan_static_bus for USB3 port 1 done
994 12:21:48.799573 scan_bus: bus USB3 port 1 finished in 6 msecs
995 12:21:48.802638 scan_static_bus for USB0 port 0 done
996 12:21:48.806327 scan_bus: bus USB0 port 0 finished in 93 msecs
997 12:21:48.809790 scan_static_bus for PCI: 00:14.0 done
998 12:21:48.816438 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
999 12:21:48.819204 PCI: 00:14.3 scanning...
1000 12:21:48.823143 scan_static_bus for PCI: 00:14.3
1001 12:21:48.823218 GENERIC: 0.0 enabled
1002 12:21:48.826744 scan_static_bus for PCI: 00:14.3 done
1003 12:21:48.833111 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1004 12:21:48.833192 PCI: 00:15.0 scanning...
1005 12:21:48.836713 scan_static_bus for PCI: 00:15.0
1006 12:21:48.839875 I2C: 00:1a enabled
1007 12:21:48.843351 I2C: 00:31 enabled
1008 12:21:48.843424 I2C: 00:32 enabled
1009 12:21:48.846326 scan_static_bus for PCI: 00:15.0 done
1010 12:21:48.853008 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1011 12:21:48.856392 PCI: 00:15.1 scanning...
1012 12:21:48.859639 scan_static_bus for PCI: 00:15.1
1013 12:21:48.859712 I2C: 00:10 enabled
1014 12:21:48.862868 scan_static_bus for PCI: 00:15.1 done
1015 12:21:48.869831 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1016 12:21:48.873438 PCI: 00:15.2 scanning...
1017 12:21:48.876417 scan_static_bus for PCI: 00:15.2
1018 12:21:48.879598 scan_static_bus for PCI: 00:15.2 done
1019 12:21:48.882794 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1020 12:21:48.886095 PCI: 00:15.3 scanning...
1021 12:21:48.889546 scan_static_bus for PCI: 00:15.3
1022 12:21:48.892992 scan_static_bus for PCI: 00:15.3 done
1023 12:21:48.899480 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1024 12:21:48.899561 PCI: 00:19.1 scanning...
1025 12:21:48.902895 scan_static_bus for PCI: 00:19.1
1026 12:21:48.906026 I2C: 00:15 enabled
1027 12:21:48.909503 scan_static_bus for PCI: 00:19.1 done
1028 12:21:48.915823 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1029 12:21:48.915900 PCI: 00:1d.0 scanning...
1030 12:21:48.923068 do_pci_scan_bridge for PCI: 00:1d.0
1031 12:21:48.923145 PCI: pci_scan_bus for bus 01
1032 12:21:48.929589 PCI: 01:00.0 [15b7/5009] enabled
1033 12:21:48.929666 GENERIC: 0.0 enabled
1034 12:21:48.932412 Enabling Common Clock Configuration
1035 12:21:48.939047 L1 Sub-State supported from root port 29
1036 12:21:48.939126 L1 Sub-State Support = 0x5
1037 12:21:48.942656 CommonModeRestoreTime = 0x28
1038 12:21:48.948964 Power On Value = 0x16, Power On Scale = 0x0
1039 12:21:48.949041 ASPM: Enabled L1
1040 12:21:48.952414 PCIe: Max_Payload_Size adjusted to 128
1041 12:21:48.959082 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1042 12:21:48.962507 PCI: 00:1e.2 scanning...
1043 12:21:48.965926 scan_generic_bus for PCI: 00:1e.2
1044 12:21:48.966003 SPI: 00 enabled
1045 12:21:48.972411 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1046 12:21:48.975826 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1047 12:21:48.978901 PCI: 00:1e.3 scanning...
1048 12:21:48.981863 scan_generic_bus for PCI: 00:1e.3
1049 12:21:48.985458 SPI: 00 enabled
1050 12:21:48.992210 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1051 12:21:48.995274 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1052 12:21:48.998681 PCI: 00:1f.0 scanning...
1053 12:21:49.002182 scan_static_bus for PCI: 00:1f.0
1054 12:21:49.005716 PNP: 0c09.0 enabled
1055 12:21:49.005844 PNP: 0c09.0 scanning...
1056 12:21:49.008518 scan_static_bus for PNP: 0c09.0
1057 12:21:49.011938 scan_static_bus for PNP: 0c09.0 done
1058 12:21:49.018558 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1059 12:21:49.022113 scan_static_bus for PCI: 00:1f.0 done
1060 12:21:49.025039 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1061 12:21:49.028334 PCI: 00:1f.2 scanning...
1062 12:21:49.032059 scan_static_bus for PCI: 00:1f.2
1063 12:21:49.035055 GENERIC: 0.0 enabled
1064 12:21:49.038516 GENERIC: 0.0 scanning...
1065 12:21:49.041935 scan_static_bus for GENERIC: 0.0
1066 12:21:49.042045 GENERIC: 0.0 enabled
1067 12:21:49.045240 GENERIC: 1.0 enabled
1068 12:21:49.048248 scan_static_bus for GENERIC: 0.0 done
1069 12:21:49.055016 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1070 12:21:49.058182 scan_static_bus for PCI: 00:1f.2 done
1071 12:21:49.061465 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1072 12:21:49.064979 PCI: 00:1f.3 scanning...
1073 12:21:49.067913 scan_static_bus for PCI: 00:1f.3
1074 12:21:49.071378 scan_static_bus for PCI: 00:1f.3 done
1075 12:21:49.077870 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1076 12:21:49.078018 PCI: 00:1f.5 scanning...
1077 12:21:49.084878 scan_generic_bus for PCI: 00:1f.5
1078 12:21:49.088030 scan_generic_bus for PCI: 00:1f.5 done
1079 12:21:49.091466 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1080 12:21:49.097908 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1081 12:21:49.101327 scan_static_bus for Root Device done
1082 12:21:49.104351 scan_bus: bus Root Device finished in 736 msecs
1083 12:21:49.104449 done
1084 12:21:49.111314 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1085 12:21:49.114288 Chrome EC: UHEPI supported
1086 12:21:49.121303 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1087 12:21:49.127748 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1088 12:21:49.130845 SPI flash protection: WPSW=0 SRP0=1
1089 12:21:49.137561 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1090 12:21:49.141149 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1091 12:21:49.144055 found VGA at PCI: 00:02.0
1092 12:21:49.147859 Setting up VGA for PCI: 00:02.0
1093 12:21:49.154101 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1094 12:21:49.157641 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1095 12:21:49.160759 Allocating resources...
1096 12:21:49.164131 Reading resources...
1097 12:21:49.167615 Root Device read_resources bus 0 link: 0
1098 12:21:49.170540 DOMAIN: 0000 read_resources bus 0 link: 0
1099 12:21:49.177037 PCI: 00:04.0 read_resources bus 1 link: 0
1100 12:21:49.180440 PCI: 00:04.0 read_resources bus 1 link: 0 done
1101 12:21:49.187015 PCI: 00:0d.0 read_resources bus 0 link: 0
1102 12:21:49.190178 USB0 port 0 read_resources bus 0 link: 0
1103 12:21:49.197107 USB0 port 0 read_resources bus 0 link: 0 done
1104 12:21:49.200240 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1105 12:21:49.203513 PCI: 00:14.0 read_resources bus 0 link: 0
1106 12:21:49.210388 USB0 port 0 read_resources bus 0 link: 0
1107 12:21:49.213656 USB0 port 0 read_resources bus 0 link: 0 done
1108 12:21:49.220306 PCI: 00:14.0 read_resources bus 0 link: 0 done
1109 12:21:49.223686 PCI: 00:14.3 read_resources bus 0 link: 0
1110 12:21:49.230313 PCI: 00:14.3 read_resources bus 0 link: 0 done
1111 12:21:49.233712 PCI: 00:15.0 read_resources bus 0 link: 0
1112 12:21:49.240680 PCI: 00:15.0 read_resources bus 0 link: 0 done
1113 12:21:49.243765 PCI: 00:15.1 read_resources bus 0 link: 0
1114 12:21:49.250674 PCI: 00:15.1 read_resources bus 0 link: 0 done
1115 12:21:49.253444 PCI: 00:19.1 read_resources bus 0 link: 0
1116 12:21:49.260594 PCI: 00:19.1 read_resources bus 0 link: 0 done
1117 12:21:49.264137 PCI: 00:1d.0 read_resources bus 1 link: 0
1118 12:21:49.270705 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1119 12:21:49.274235 PCI: 00:1e.2 read_resources bus 2 link: 0
1120 12:21:49.280814 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1121 12:21:49.284220 PCI: 00:1e.3 read_resources bus 3 link: 0
1122 12:21:49.290613 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1123 12:21:49.293843 PCI: 00:1f.0 read_resources bus 0 link: 0
1124 12:21:49.300588 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1125 12:21:49.303734 PCI: 00:1f.2 read_resources bus 0 link: 0
1126 12:21:49.306872 GENERIC: 0.0 read_resources bus 0 link: 0
1127 12:21:49.314267 GENERIC: 0.0 read_resources bus 0 link: 0 done
1128 12:21:49.317318 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1129 12:21:49.324705 DOMAIN: 0000 read_resources bus 0 link: 0 done
1130 12:21:49.328197 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1131 12:21:49.334338 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1132 12:21:49.337799 Root Device read_resources bus 0 link: 0 done
1133 12:21:49.341349 Done reading resources.
1134 12:21:49.347636 Show resources in subtree (Root Device)...After reading.
1135 12:21:49.351147 Root Device child on link 0 DOMAIN: 0000
1136 12:21:49.354266 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 12:21:49.364129 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 12:21:49.374309 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 12:21:49.377824 PCI: 00:00.0
1140 12:21:49.387627 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 12:21:49.393947 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 12:21:49.403971 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 12:21:49.414169 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 12:21:49.423895 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 12:21:49.433637 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 12:21:49.443601 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 12:21:49.450574 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 12:21:49.460290 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 12:21:49.470547 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1150 12:21:49.480292 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1151 12:21:49.490410 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1152 12:21:49.500048 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1153 12:21:49.506578 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1154 12:21:49.516586 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1155 12:21:49.526524 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1156 12:21:49.536519 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1157 12:21:49.546491 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1158 12:21:49.556483 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1159 12:21:49.566095 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1160 12:21:49.566197 PCI: 00:02.0
1161 12:21:49.575986 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1162 12:21:49.586576 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1163 12:21:49.596205 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1164 12:21:49.599652 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1165 12:21:49.609267 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1166 12:21:49.612811 GENERIC: 0.0
1167 12:21:49.612898 PCI: 00:05.0
1168 12:21:49.622202 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1169 12:21:49.628967 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1170 12:21:49.629055 GENERIC: 0.0
1171 12:21:49.632372 PCI: 00:08.0
1172 12:21:49.642282 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 12:21:49.642371 PCI: 00:0a.0
1174 12:21:49.648899 PCI: 00:0d.0 child on link 0 USB0 port 0
1175 12:21:49.658610 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1176 12:21:49.661859 USB0 port 0 child on link 0 USB3 port 0
1177 12:21:49.665393 USB3 port 0
1178 12:21:49.665480 USB3 port 1
1179 12:21:49.668432 USB3 port 2
1180 12:21:49.668519 USB3 port 3
1181 12:21:49.675071 PCI: 00:14.0 child on link 0 USB0 port 0
1182 12:21:49.685121 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1183 12:21:49.688117 USB0 port 0 child on link 0 USB2 port 0
1184 12:21:49.688218 USB2 port 0
1185 12:21:49.691684 USB2 port 1
1186 12:21:49.694652 USB2 port 2
1187 12:21:49.694737 USB2 port 3
1188 12:21:49.698349 USB2 port 4
1189 12:21:49.698434 USB2 port 5
1190 12:21:49.701430 USB2 port 6
1191 12:21:49.701514 USB2 port 7
1192 12:21:49.704557 USB2 port 8
1193 12:21:49.704642 USB2 port 9
1194 12:21:49.707960 USB3 port 0
1195 12:21:49.708045 USB3 port 1
1196 12:21:49.711301 USB3 port 2
1197 12:21:49.711386 USB3 port 3
1198 12:21:49.714718 PCI: 00:14.2
1199 12:21:49.724735 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1200 12:21:49.734629 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1201 12:21:49.737861 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1202 12:21:49.747462 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:21:49.751115 GENERIC: 0.0
1204 12:21:49.754006 PCI: 00:15.0 child on link 0 I2C: 00:1a
1205 12:21:49.764006 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 12:21:49.767512 I2C: 00:1a
1207 12:21:49.767616 I2C: 00:31
1208 12:21:49.770787 I2C: 00:32
1209 12:21:49.774043 PCI: 00:15.1 child on link 0 I2C: 00:10
1210 12:21:49.784181 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:21:49.784283 I2C: 00:10
1212 12:21:49.787475 PCI: 00:15.2
1213 12:21:49.797030 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:21:49.797118 PCI: 00:15.3
1215 12:21:49.807208 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 12:21:49.810299 PCI: 00:16.0
1217 12:21:49.820532 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 12:21:49.820619 PCI: 00:19.0
1219 12:21:49.827041 PCI: 00:19.1 child on link 0 I2C: 00:15
1220 12:21:49.836495 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 12:21:49.836583 I2C: 00:15
1222 12:21:49.843398 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1223 12:21:49.849895 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1224 12:21:49.859736 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1225 12:21:49.870272 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1226 12:21:49.870358 GENERIC: 0.0
1227 12:21:49.873303 PCI: 01:00.0
1228 12:21:49.883063 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:21:49.892598 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1230 12:21:49.896124 PCI: 00:1e.0
1231 12:21:49.905908 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1232 12:21:49.909215 PCI: 00:1e.2 child on link 0 SPI: 00
1233 12:21:49.919385 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:21:49.922419 SPI: 00
1235 12:21:49.925859 PCI: 00:1e.3 child on link 0 SPI: 00
1236 12:21:49.935488 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:21:49.935575 SPI: 00
1238 12:21:49.942265 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1239 12:21:49.948789 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1240 12:21:49.952121 PNP: 0c09.0
1241 12:21:49.958502 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1242 12:21:49.965319 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1243 12:21:49.975149 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1244 12:21:49.981944 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1245 12:21:49.988529 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1246 12:21:49.988630 GENERIC: 0.0
1247 12:21:49.991878 GENERIC: 1.0
1248 12:21:49.991963 PCI: 00:1f.3
1249 12:21:50.001445 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:21:50.011464 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1251 12:21:50.014982 PCI: 00:1f.5
1252 12:21:50.024760 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1253 12:21:50.027841 CPU_CLUSTER: 0 child on link 0 APIC: 00
1254 12:21:50.027926 APIC: 00
1255 12:21:50.031239 APIC: 01
1256 12:21:50.031325 APIC: 03
1257 12:21:50.034833 APIC: 07
1258 12:21:50.034918 APIC: 04
1259 12:21:50.034985 APIC: 02
1260 12:21:50.037883 APIC: 06
1261 12:21:50.037968 APIC: 05
1262 12:21:50.044450 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1263 12:21:50.051047 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1264 12:21:50.057882 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1265 12:21:50.064520 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1266 12:21:50.067847 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1267 12:21:50.071016 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1268 12:21:50.080946 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1269 12:21:50.087834 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1270 12:21:50.094472 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1271 12:21:50.100844 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1272 12:21:50.107713 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1273 12:21:50.113921 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1274 12:21:50.123920 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1275 12:21:50.130559 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1276 12:21:50.133762 DOMAIN: 0000: Resource ranges:
1277 12:21:50.137091 * Base: 1000, Size: 800, Tag: 100
1278 12:21:50.140533 * Base: 1900, Size: e700, Tag: 100
1279 12:21:50.146911 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1280 12:21:50.153358 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1281 12:21:50.160420 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1282 12:21:50.166711 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1283 12:21:50.176460 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1284 12:21:50.183572 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1285 12:21:50.190035 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1286 12:21:50.200070 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1287 12:21:50.206512 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1288 12:21:50.212983 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1289 12:21:50.222738 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1290 12:21:50.229457 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1291 12:21:50.235912 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1292 12:21:50.245884 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1293 12:21:50.252548 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1294 12:21:50.259073 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1295 12:21:50.269163 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1296 12:21:50.275580 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1297 12:21:50.282023 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1298 12:21:50.291969 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1299 12:21:50.299036 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1300 12:21:50.305489 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1301 12:21:50.315163 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1302 12:21:50.322031 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1303 12:21:50.328606 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1304 12:21:50.332018 DOMAIN: 0000: Resource ranges:
1305 12:21:50.338614 * Base: 7fc00000, Size: 40400000, Tag: 200
1306 12:21:50.341622 * Base: d0000000, Size: 28000000, Tag: 200
1307 12:21:50.345040 * Base: fa000000, Size: 1000000, Tag: 200
1308 12:21:50.348505 * Base: fb001000, Size: 2fff000, Tag: 200
1309 12:21:50.354910 * Base: fe010000, Size: 2e000, Tag: 200
1310 12:21:50.358636 * Base: fe03f000, Size: d41000, Tag: 200
1311 12:21:50.361941 * Base: fed88000, Size: 8000, Tag: 200
1312 12:21:50.364903 * Base: fed93000, Size: d000, Tag: 200
1313 12:21:50.371750 * Base: feda2000, Size: 1e000, Tag: 200
1314 12:21:50.374699 * Base: fede0000, Size: 1220000, Tag: 200
1315 12:21:50.378181 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1316 12:21:50.388014 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1317 12:21:50.394575 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1318 12:21:50.401036 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1319 12:21:50.407782 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1320 12:21:50.414673 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1321 12:21:50.421245 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1322 12:21:50.427466 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1323 12:21:50.434428 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1324 12:21:50.440694 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1325 12:21:50.447661 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1326 12:21:50.454038 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1327 12:21:50.460519 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1328 12:21:50.467591 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1329 12:21:50.473628 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1330 12:21:50.480902 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1331 12:21:50.487020 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1332 12:21:50.493516 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1333 12:21:50.500280 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1334 12:21:50.506704 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1335 12:21:50.513313 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1336 12:21:50.519925 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1337 12:21:50.526542 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1338 12:21:50.533568 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1339 12:21:50.539551 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1340 12:21:50.542987 PCI: 00:1d.0: Resource ranges:
1341 12:21:50.549611 * Base: 7fc00000, Size: 100000, Tag: 200
1342 12:21:50.556269 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1343 12:21:50.562693 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1344 12:21:50.569458 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1345 12:21:50.575969 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1346 12:21:50.583001 Root Device assign_resources, bus 0 link: 0
1347 12:21:50.586168 DOMAIN: 0000 assign_resources, bus 0 link: 0
1348 12:21:50.596021 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1349 12:21:50.602524 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1350 12:21:50.612070 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1351 12:21:50.619130 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1352 12:21:50.622075 PCI: 00:04.0 assign_resources, bus 1 link: 0
1353 12:21:50.628984 PCI: 00:04.0 assign_resources, bus 1 link: 0
1354 12:21:50.635860 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1355 12:21:50.645376 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1356 12:21:50.652120 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1357 12:21:50.658398 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1358 12:21:50.661570 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1359 12:21:50.671751 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1360 12:21:50.674679 PCI: 00:14.0 assign_resources, bus 0 link: 0
1361 12:21:50.681358 PCI: 00:14.0 assign_resources, bus 0 link: 0
1362 12:21:50.688210 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1363 12:21:50.694372 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1364 12:21:50.704572 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1365 12:21:50.707688 PCI: 00:14.3 assign_resources, bus 0 link: 0
1366 12:21:50.714704 PCI: 00:14.3 assign_resources, bus 0 link: 0
1367 12:21:50.721002 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1368 12:21:50.727389 PCI: 00:15.0 assign_resources, bus 0 link: 0
1369 12:21:50.730778 PCI: 00:15.0 assign_resources, bus 0 link: 0
1370 12:21:50.740715 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1371 12:21:50.743994 PCI: 00:15.1 assign_resources, bus 0 link: 0
1372 12:21:50.747027 PCI: 00:15.1 assign_resources, bus 0 link: 0
1373 12:21:50.757073 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1374 12:21:50.763471 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1375 12:21:50.773191 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1376 12:21:50.780242 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1377 12:21:50.786507 PCI: 00:19.1 assign_resources, bus 0 link: 0
1378 12:21:50.790052 PCI: 00:19.1 assign_resources, bus 0 link: 0
1379 12:21:50.799913 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1380 12:21:50.809635 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1381 12:21:50.816072 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1382 12:21:50.822757 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1383 12:21:50.829357 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1384 12:21:50.839076 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1385 12:21:50.842354 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1386 12:21:50.852084 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1387 12:21:50.855491 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1388 12:21:50.861864 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1389 12:21:50.868737 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1390 12:21:50.871695 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1391 12:21:50.878456 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1392 12:21:50.881985 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1393 12:21:50.888592 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1394 12:21:50.892026 LPC: Trying to open IO window from 800 size 1ff
1395 12:21:50.901430 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1396 12:21:50.908235 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1397 12:21:50.918322 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1398 12:21:50.921321 DOMAIN: 0000 assign_resources, bus 0 link: 0
1399 12:21:50.928235 Root Device assign_resources, bus 0 link: 0
1400 12:21:50.928362 Done setting resources.
1401 12:21:50.934556 Show resources in subtree (Root Device)...After assigning values.
1402 12:21:50.941143 Root Device child on link 0 DOMAIN: 0000
1403 12:21:50.944080 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1404 12:21:50.953883 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1405 12:21:50.963970 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1406 12:21:50.964056 PCI: 00:00.0
1407 12:21:50.974009 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1408 12:21:50.983895 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1409 12:21:50.993979 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1410 12:21:51.003633 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1411 12:21:51.013762 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1412 12:21:51.020545 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1413 12:21:51.030013 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1414 12:21:51.039912 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1415 12:21:51.050083 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1416 12:21:51.060611 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1417 12:21:51.069777 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1418 12:21:51.076219 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1419 12:21:51.086498 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1420 12:21:51.096581 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1421 12:21:51.106619 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1422 12:21:51.116263 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1423 12:21:51.126091 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1424 12:21:51.132650 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1425 12:21:51.142691 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1426 12:21:51.152742 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1427 12:21:51.155850 PCI: 00:02.0
1428 12:21:51.166041 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1429 12:21:51.175940 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1430 12:21:51.186069 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1431 12:21:51.189268 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1432 12:21:51.199095 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1433 12:21:51.202221 GENERIC: 0.0
1434 12:21:51.202308 PCI: 00:05.0
1435 12:21:51.215832 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1436 12:21:51.219039 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1437 12:21:51.222001 GENERIC: 0.0
1438 12:21:51.222103 PCI: 00:08.0
1439 12:21:51.231942 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1440 12:21:51.235067 PCI: 00:0a.0
1441 12:21:51.238669 PCI: 00:0d.0 child on link 0 USB0 port 0
1442 12:21:51.248200 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1443 12:21:51.255112 USB0 port 0 child on link 0 USB3 port 0
1444 12:21:51.255199 USB3 port 0
1445 12:21:51.258597 USB3 port 1
1446 12:21:51.258726 USB3 port 2
1447 12:21:51.261661 USB3 port 3
1448 12:21:51.264975 PCI: 00:14.0 child on link 0 USB0 port 0
1449 12:21:51.274918 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1450 12:21:51.278301 USB0 port 0 child on link 0 USB2 port 0
1451 12:21:51.281504 USB2 port 0
1452 12:21:51.284886 USB2 port 1
1453 12:21:51.284974 USB2 port 2
1454 12:21:51.288374 USB2 port 3
1455 12:21:51.288462 USB2 port 4
1456 12:21:51.291570 USB2 port 5
1457 12:21:51.291658 USB2 port 6
1458 12:21:51.295153 USB2 port 7
1459 12:21:51.295241 USB2 port 8
1460 12:21:51.298280 USB2 port 9
1461 12:21:51.298368 USB3 port 0
1462 12:21:51.301675 USB3 port 1
1463 12:21:51.301762 USB3 port 2
1464 12:21:51.304620 USB3 port 3
1465 12:21:51.304707 PCI: 00:14.2
1466 12:21:51.318048 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1467 12:21:51.327904 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1468 12:21:51.331341 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1469 12:21:51.341033 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1470 12:21:51.344218 GENERIC: 0.0
1471 12:21:51.347615 PCI: 00:15.0 child on link 0 I2C: 00:1a
1472 12:21:51.357595 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1473 12:21:51.361098 I2C: 00:1a
1474 12:21:51.361185 I2C: 00:31
1475 12:21:51.364111 I2C: 00:32
1476 12:21:51.367564 PCI: 00:15.1 child on link 0 I2C: 00:10
1477 12:21:51.377611 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1478 12:21:51.377699 I2C: 00:10
1479 12:21:51.380583 PCI: 00:15.2
1480 12:21:51.390617 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1481 12:21:51.394116 PCI: 00:15.3
1482 12:21:51.403926 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1483 12:21:51.404018 PCI: 00:16.0
1484 12:21:51.413821 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1485 12:21:51.416934 PCI: 00:19.0
1486 12:21:51.420147 PCI: 00:19.1 child on link 0 I2C: 00:15
1487 12:21:51.430169 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1488 12:21:51.433678 I2C: 00:15
1489 12:21:51.437083 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1490 12:21:51.446980 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1491 12:21:51.456668 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1492 12:21:51.470192 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1493 12:21:51.470278 GENERIC: 0.0
1494 12:21:51.473429 PCI: 01:00.0
1495 12:21:51.483195 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1496 12:21:51.493279 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1497 12:21:51.493369 PCI: 00:1e.0
1498 12:21:51.506580 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1499 12:21:51.510079 PCI: 00:1e.2 child on link 0 SPI: 00
1500 12:21:51.519509 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1501 12:21:51.519597 SPI: 00
1502 12:21:51.526162 PCI: 00:1e.3 child on link 0 SPI: 00
1503 12:21:51.536248 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1504 12:21:51.536346 SPI: 00
1505 12:21:51.542562 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1506 12:21:51.549394 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1507 12:21:51.553150 PNP: 0c09.0
1508 12:21:51.559198 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1509 12:21:51.566227 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1510 12:21:51.576178 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1511 12:21:51.582369 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1512 12:21:51.589080 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1513 12:21:51.589168 GENERIC: 0.0
1514 12:21:51.592249 GENERIC: 1.0
1515 12:21:51.592376 PCI: 00:1f.3
1516 12:21:51.602026 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1517 12:21:51.615619 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1518 12:21:51.615707 PCI: 00:1f.5
1519 12:21:51.625492 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1520 12:21:51.632053 CPU_CLUSTER: 0 child on link 0 APIC: 00
1521 12:21:51.632141 APIC: 00
1522 12:21:51.632209 APIC: 01
1523 12:21:51.635107 APIC: 03
1524 12:21:51.635194 APIC: 07
1525 12:21:51.638642 APIC: 04
1526 12:21:51.638727 APIC: 02
1527 12:21:51.638795 APIC: 06
1528 12:21:51.641603 APIC: 05
1529 12:21:51.645353 Done allocating resources.
1530 12:21:51.648238 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1531 12:21:51.655369 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1532 12:21:51.658163 Configure GPIOs for I2S audio on UP4.
1533 12:21:51.665902 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1534 12:21:51.669169 Enabling resources...
1535 12:21:51.672272 PCI: 00:00.0 subsystem <- 8086/9a12
1536 12:21:51.675402 PCI: 00:00.0 cmd <- 06
1537 12:21:51.678680 PCI: 00:02.0 subsystem <- 8086/9a40
1538 12:21:51.682242 PCI: 00:02.0 cmd <- 03
1539 12:21:51.685863 PCI: 00:04.0 subsystem <- 8086/9a03
1540 12:21:51.688920 PCI: 00:04.0 cmd <- 02
1541 12:21:51.691917 PCI: 00:05.0 subsystem <- 8086/9a19
1542 12:21:51.692006 PCI: 00:05.0 cmd <- 02
1543 12:21:51.698730 PCI: 00:08.0 subsystem <- 8086/9a11
1544 12:21:51.698830 PCI: 00:08.0 cmd <- 06
1545 12:21:51.701894 PCI: 00:0d.0 subsystem <- 8086/9a13
1546 12:21:51.705232 PCI: 00:0d.0 cmd <- 02
1547 12:21:51.708613 PCI: 00:14.0 subsystem <- 8086/a0ed
1548 12:21:51.712171 PCI: 00:14.0 cmd <- 02
1549 12:21:51.715049 PCI: 00:14.2 subsystem <- 8086/a0ef
1550 12:21:51.718601 PCI: 00:14.2 cmd <- 02
1551 12:21:51.722059 PCI: 00:14.3 subsystem <- 8086/a0f0
1552 12:21:51.725117 PCI: 00:14.3 cmd <- 02
1553 12:21:51.728166 PCI: 00:15.0 subsystem <- 8086/a0e8
1554 12:21:51.731647 PCI: 00:15.0 cmd <- 02
1555 12:21:51.734770 PCI: 00:15.1 subsystem <- 8086/a0e9
1556 12:21:51.738308 PCI: 00:15.1 cmd <- 02
1557 12:21:51.741769 PCI: 00:15.2 subsystem <- 8086/a0ea
1558 12:21:51.741854 PCI: 00:15.2 cmd <- 02
1559 12:21:51.748220 PCI: 00:15.3 subsystem <- 8086/a0eb
1560 12:21:51.748307 PCI: 00:15.3 cmd <- 02
1561 12:21:51.751486 PCI: 00:16.0 subsystem <- 8086/a0e0
1562 12:21:51.755030 PCI: 00:16.0 cmd <- 02
1563 12:21:51.758040 PCI: 00:19.1 subsystem <- 8086/a0c6
1564 12:21:51.761504 PCI: 00:19.1 cmd <- 02
1565 12:21:51.764974 PCI: 00:1d.0 bridge ctrl <- 0013
1566 12:21:51.768032 PCI: 00:1d.0 subsystem <- 8086/a0b0
1567 12:21:51.771563 PCI: 00:1d.0 cmd <- 06
1568 12:21:51.774975 PCI: 00:1e.0 subsystem <- 8086/a0a8
1569 12:21:51.777977 PCI: 00:1e.0 cmd <- 06
1570 12:21:51.781817 PCI: 00:1e.2 subsystem <- 8086/a0aa
1571 12:21:51.784631 PCI: 00:1e.2 cmd <- 06
1572 12:21:51.787947 PCI: 00:1e.3 subsystem <- 8086/a0ab
1573 12:21:51.791291 PCI: 00:1e.3 cmd <- 02
1574 12:21:51.794500 PCI: 00:1f.0 subsystem <- 8086/a087
1575 12:21:51.794587 PCI: 00:1f.0 cmd <- 407
1576 12:21:51.801255 PCI: 00:1f.3 subsystem <- 8086/a0c8
1577 12:21:51.801344 PCI: 00:1f.3 cmd <- 02
1578 12:21:51.804487 PCI: 00:1f.5 subsystem <- 8086/a0a4
1579 12:21:51.807867 PCI: 00:1f.5 cmd <- 406
1580 12:21:51.812988 PCI: 01:00.0 cmd <- 02
1581 12:21:51.817208 done.
1582 12:21:51.820699 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1583 12:21:51.823601 Initializing devices...
1584 12:21:51.827495 Root Device init
1585 12:21:51.830260 Chrome EC: Set SMI mask to 0x0000000000000000
1586 12:21:51.837227 Chrome EC: clear events_b mask to 0x0000000000000000
1587 12:21:51.843630 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1588 12:21:51.847176 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1589 12:21:51.853414 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1590 12:21:51.860430 Chrome EC: Set WAKE mask to 0x0000000000000000
1591 12:21:51.863449 fw_config match found: DB_USB=USB3_ACTIVE
1592 12:21:51.870334 Configure Right Type-C port orientation for retimer
1593 12:21:51.873432 Root Device init finished in 43 msecs
1594 12:21:51.876990 PCI: 00:00.0 init
1595 12:21:51.880077 CPU TDP = 9 Watts
1596 12:21:51.880164 CPU PL1 = 9 Watts
1597 12:21:51.883458 CPU PL2 = 40 Watts
1598 12:21:51.886506 CPU PL4 = 83 Watts
1599 12:21:51.889899 PCI: 00:00.0 init finished in 8 msecs
1600 12:21:51.889986 PCI: 00:02.0 init
1601 12:21:51.893157 GMA: Found VBT in CBFS
1602 12:21:51.896507 GMA: Found valid VBT in CBFS
1603 12:21:51.903091 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1604 12:21:51.909599 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1605 12:21:51.912865 PCI: 00:02.0 init finished in 18 msecs
1606 12:21:51.916352 PCI: 00:05.0 init
1607 12:21:51.919709 PCI: 00:05.0 init finished in 0 msecs
1608 12:21:51.923021 PCI: 00:08.0 init
1609 12:21:51.926527 PCI: 00:08.0 init finished in 0 msecs
1610 12:21:51.929445 PCI: 00:14.0 init
1611 12:21:51.933036 PCI: 00:14.0 init finished in 0 msecs
1612 12:21:51.936091 PCI: 00:14.2 init
1613 12:21:51.939452 PCI: 00:14.2 init finished in 0 msecs
1614 12:21:51.943107 PCI: 00:15.0 init
1615 12:21:51.943196 I2C bus 0 version 0x3230302a
1616 12:21:51.949328 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1617 12:21:51.953000 PCI: 00:15.0 init finished in 6 msecs
1618 12:21:51.953097 PCI: 00:15.1 init
1619 12:21:51.955679 I2C bus 1 version 0x3230302a
1620 12:21:51.959574 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1621 12:21:51.965629 PCI: 00:15.1 init finished in 6 msecs
1622 12:21:51.965718 PCI: 00:15.2 init
1623 12:21:51.969072 I2C bus 2 version 0x3230302a
1624 12:21:51.972333 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1625 12:21:51.975655 PCI: 00:15.2 init finished in 6 msecs
1626 12:21:51.979062 PCI: 00:15.3 init
1627 12:21:51.982568 I2C bus 3 version 0x3230302a
1628 12:21:51.986066 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1629 12:21:51.989186 PCI: 00:15.3 init finished in 6 msecs
1630 12:21:51.992549 PCI: 00:16.0 init
1631 12:21:51.995492 PCI: 00:16.0 init finished in 0 msecs
1632 12:21:51.999042 PCI: 00:19.1 init
1633 12:21:52.002333 I2C bus 5 version 0x3230302a
1634 12:21:52.005473 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1635 12:21:52.008601 PCI: 00:19.1 init finished in 6 msecs
1636 12:21:52.011961 PCI: 00:1d.0 init
1637 12:21:52.015501 Initializing PCH PCIe bridge.
1638 12:21:52.018492 PCI: 00:1d.0 init finished in 3 msecs
1639 12:21:52.022044 PCI: 00:1f.0 init
1640 12:21:52.025292 IOAPIC: Initializing IOAPIC at 0xfec00000
1641 12:21:52.028919 IOAPIC: Bootstrap Processor Local APIC = 0x00
1642 12:21:52.031892 IOAPIC: ID = 0x02
1643 12:21:52.035105 IOAPIC: Dumping registers
1644 12:21:52.035193 reg 0x0000: 0x02000000
1645 12:21:52.038735 reg 0x0001: 0x00770020
1646 12:21:52.041685 reg 0x0002: 0x00000000
1647 12:21:52.045051 PCI: 00:1f.0 init finished in 21 msecs
1648 12:21:52.048347 PCI: 00:1f.2 init
1649 12:21:52.051838 Disabling ACPI via APMC.
1650 12:21:52.055056 APMC done.
1651 12:21:52.058391 PCI: 00:1f.2 init finished in 6 msecs
1652 12:21:52.069498 PCI: 01:00.0 init
1653 12:21:52.073012 PCI: 01:00.0 init finished in 0 msecs
1654 12:21:52.076224 PNP: 0c09.0 init
1655 12:21:52.079663 Google Chrome EC uptime: 8.440 seconds
1656 12:21:52.086287 Google Chrome AP resets since EC boot: 1
1657 12:21:52.089331 Google Chrome most recent AP reset causes:
1658 12:21:52.092582 0.454: 32775 shutdown: entering G3
1659 12:21:52.099263 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1660 12:21:52.102366 PNP: 0c09.0 init finished in 22 msecs
1661 12:21:52.108313 Devices initialized
1662 12:21:52.112016 Show all devs... After init.
1663 12:21:52.115298 Root Device: enabled 1
1664 12:21:52.115385 DOMAIN: 0000: enabled 1
1665 12:21:52.118638 CPU_CLUSTER: 0: enabled 1
1666 12:21:52.121858 PCI: 00:00.0: enabled 1
1667 12:21:52.125058 PCI: 00:02.0: enabled 1
1668 12:21:52.125144 PCI: 00:04.0: enabled 1
1669 12:21:52.128283 PCI: 00:05.0: enabled 1
1670 12:21:52.131485 PCI: 00:06.0: enabled 0
1671 12:21:52.134870 PCI: 00:07.0: enabled 0
1672 12:21:52.134956 PCI: 00:07.1: enabled 0
1673 12:21:52.138329 PCI: 00:07.2: enabled 0
1674 12:21:52.141601 PCI: 00:07.3: enabled 0
1675 12:21:52.145102 PCI: 00:08.0: enabled 1
1676 12:21:52.145188 PCI: 00:09.0: enabled 0
1677 12:21:52.148215 PCI: 00:0a.0: enabled 0
1678 12:21:52.151601 PCI: 00:0d.0: enabled 1
1679 12:21:52.154940 PCI: 00:0d.1: enabled 0
1680 12:21:52.155026 PCI: 00:0d.2: enabled 0
1681 12:21:52.158127 PCI: 00:0d.3: enabled 0
1682 12:21:52.161498 PCI: 00:0e.0: enabled 0
1683 12:21:52.164963 PCI: 00:10.2: enabled 1
1684 12:21:52.165049 PCI: 00:10.6: enabled 0
1685 12:21:52.167807 PCI: 00:10.7: enabled 0
1686 12:21:52.171168 PCI: 00:12.0: enabled 0
1687 12:21:52.171253 PCI: 00:12.6: enabled 0
1688 12:21:52.174486 PCI: 00:13.0: enabled 0
1689 12:21:52.178053 PCI: 00:14.0: enabled 1
1690 12:21:52.181566 PCI: 00:14.1: enabled 0
1691 12:21:52.181650 PCI: 00:14.2: enabled 1
1692 12:21:52.184688 PCI: 00:14.3: enabled 1
1693 12:21:52.187650 PCI: 00:15.0: enabled 1
1694 12:21:52.191099 PCI: 00:15.1: enabled 1
1695 12:21:52.191183 PCI: 00:15.2: enabled 1
1696 12:21:52.194395 PCI: 00:15.3: enabled 1
1697 12:21:52.197924 PCI: 00:16.0: enabled 1
1698 12:21:52.200968 PCI: 00:16.1: enabled 0
1699 12:21:52.201052 PCI: 00:16.2: enabled 0
1700 12:21:52.204137 PCI: 00:16.3: enabled 0
1701 12:21:52.207503 PCI: 00:16.4: enabled 0
1702 12:21:52.210741 PCI: 00:16.5: enabled 0
1703 12:21:52.210826 PCI: 00:17.0: enabled 0
1704 12:21:52.214235 PCI: 00:19.0: enabled 0
1705 12:21:52.217649 PCI: 00:19.1: enabled 1
1706 12:21:52.220907 PCI: 00:19.2: enabled 0
1707 12:21:52.220992 PCI: 00:1c.0: enabled 1
1708 12:21:52.224112 PCI: 00:1c.1: enabled 0
1709 12:21:52.227597 PCI: 00:1c.2: enabled 0
1710 12:21:52.230892 PCI: 00:1c.3: enabled 0
1711 12:21:52.230976 PCI: 00:1c.4: enabled 0
1712 12:21:52.234157 PCI: 00:1c.5: enabled 0
1713 12:21:52.237268 PCI: 00:1c.6: enabled 1
1714 12:21:52.237353 PCI: 00:1c.7: enabled 0
1715 12:21:52.240668 PCI: 00:1d.0: enabled 1
1716 12:21:52.244250 PCI: 00:1d.1: enabled 0
1717 12:21:52.247397 PCI: 00:1d.2: enabled 1
1718 12:21:52.247481 PCI: 00:1d.3: enabled 0
1719 12:21:52.250373 PCI: 00:1e.0: enabled 1
1720 12:21:52.253668 PCI: 00:1e.1: enabled 0
1721 12:21:52.257102 PCI: 00:1e.2: enabled 1
1722 12:21:52.257187 PCI: 00:1e.3: enabled 1
1723 12:21:52.260273 PCI: 00:1f.0: enabled 1
1724 12:21:52.263821 PCI: 00:1f.1: enabled 0
1725 12:21:52.266823 PCI: 00:1f.2: enabled 1
1726 12:21:52.266907 PCI: 00:1f.3: enabled 1
1727 12:21:52.270503 PCI: 00:1f.4: enabled 0
1728 12:21:52.273583 PCI: 00:1f.5: enabled 1
1729 12:21:52.277032 PCI: 00:1f.6: enabled 0
1730 12:21:52.277116 PCI: 00:1f.7: enabled 0
1731 12:21:52.280078 APIC: 00: enabled 1
1732 12:21:52.283428 GENERIC: 0.0: enabled 1
1733 12:21:52.283513 GENERIC: 0.0: enabled 1
1734 12:21:52.286833 GENERIC: 1.0: enabled 1
1735 12:21:52.289725 GENERIC: 0.0: enabled 1
1736 12:21:52.293223 GENERIC: 1.0: enabled 1
1737 12:21:52.293308 USB0 port 0: enabled 1
1738 12:21:52.296688 GENERIC: 0.0: enabled 1
1739 12:21:52.299688 USB0 port 0: enabled 1
1740 12:21:52.303063 GENERIC: 0.0: enabled 1
1741 12:21:52.303150 I2C: 00:1a: enabled 1
1742 12:21:52.306721 I2C: 00:31: enabled 1
1743 12:21:52.309879 I2C: 00:32: enabled 1
1744 12:21:52.310026 I2C: 00:10: enabled 1
1745 12:21:52.313273 I2C: 00:15: enabled 1
1746 12:21:52.316113 GENERIC: 0.0: enabled 0
1747 12:21:52.316228 GENERIC: 1.0: enabled 0
1748 12:21:52.319478 GENERIC: 0.0: enabled 1
1749 12:21:52.322856 SPI: 00: enabled 1
1750 12:21:52.322942 SPI: 00: enabled 1
1751 12:21:52.326215 PNP: 0c09.0: enabled 1
1752 12:21:52.329413 GENERIC: 0.0: enabled 1
1753 12:21:52.332813 USB3 port 0: enabled 1
1754 12:21:52.332899 USB3 port 1: enabled 1
1755 12:21:52.336183 USB3 port 2: enabled 0
1756 12:21:52.339439 USB3 port 3: enabled 0
1757 12:21:52.339526 USB2 port 0: enabled 0
1758 12:21:52.342874 USB2 port 1: enabled 1
1759 12:21:52.346282 USB2 port 2: enabled 1
1760 12:21:52.349288 USB2 port 3: enabled 0
1761 12:21:52.349375 USB2 port 4: enabled 1
1762 12:21:52.352784 USB2 port 5: enabled 0
1763 12:21:52.355883 USB2 port 6: enabled 0
1764 12:21:52.356028 USB2 port 7: enabled 0
1765 12:21:52.359647 USB2 port 8: enabled 0
1766 12:21:52.362495 USB2 port 9: enabled 0
1767 12:21:52.362599 USB3 port 0: enabled 0
1768 12:21:52.366211 USB3 port 1: enabled 1
1769 12:21:52.369049 USB3 port 2: enabled 0
1770 12:21:52.372479 USB3 port 3: enabled 0
1771 12:21:52.372567 GENERIC: 0.0: enabled 1
1772 12:21:52.375929 GENERIC: 1.0: enabled 1
1773 12:21:52.378892 APIC: 01: enabled 1
1774 12:21:52.378980 APIC: 03: enabled 1
1775 12:21:52.382456 APIC: 07: enabled 1
1776 12:21:52.385460 APIC: 04: enabled 1
1777 12:21:52.385548 APIC: 02: enabled 1
1778 12:21:52.388774 APIC: 06: enabled 1
1779 12:21:52.388862 APIC: 05: enabled 1
1780 12:21:52.392255 PCI: 01:00.0: enabled 1
1781 12:21:52.399036 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1782 12:21:52.401973 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1783 12:21:52.405454 ELOG: NV offset 0xf30000 size 0x1000
1784 12:21:52.413889 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1785 12:21:52.420285 ELOG: Event(17) added with size 13 at 2023-03-13 12:21:51 UTC
1786 12:21:52.426739 ELOG: Event(92) added with size 9 at 2023-03-13 12:21:51 UTC
1787 12:21:52.433519 ELOG: Event(93) added with size 9 at 2023-03-13 12:21:51 UTC
1788 12:21:52.440028 ELOG: Event(9E) added with size 10 at 2023-03-13 12:21:51 UTC
1789 12:21:52.446536 ELOG: Event(9F) added with size 14 at 2023-03-13 12:21:51 UTC
1790 12:21:52.453528 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1791 12:21:52.459750 ELOG: Event(A1) added with size 10 at 2023-03-13 12:21:51 UTC
1792 12:21:52.466459 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1793 12:21:52.473042 ELOG: Event(A0) added with size 9 at 2023-03-13 12:21:51 UTC
1794 12:21:52.476428 elog_add_boot_reason: Logged dev mode boot
1795 12:21:52.483074 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1796 12:21:52.486337 Finalize devices...
1797 12:21:52.486425 Devices finalized
1798 12:21:52.492561 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1799 12:21:52.496113 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1800 12:21:52.502929 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1801 12:21:52.505982 ME: HFSTS1 : 0x80030055
1802 12:21:52.512982 ME: HFSTS2 : 0x30280116
1803 12:21:52.516005 ME: HFSTS3 : 0x00000050
1804 12:21:52.519671 ME: HFSTS4 : 0x00004000
1805 12:21:52.525892 ME: HFSTS5 : 0x00000000
1806 12:21:52.529076 ME: HFSTS6 : 0x40400006
1807 12:21:52.532673 ME: Manufacturing Mode : YES
1808 12:21:52.535643 ME: SPI Protection Mode Enabled : NO
1809 12:21:52.542543 ME: FW Partition Table : OK
1810 12:21:52.545999 ME: Bringup Loader Failure : NO
1811 12:21:52.549163 ME: Firmware Init Complete : NO
1812 12:21:52.552691 ME: Boot Options Present : NO
1813 12:21:52.556038 ME: Update In Progress : NO
1814 12:21:52.559182 ME: D0i3 Support : YES
1815 12:21:52.562818 ME: Low Power State Enabled : NO
1816 12:21:52.565658 ME: CPU Replaced : YES
1817 12:21:52.572659 ME: CPU Replacement Valid : YES
1818 12:21:52.575517 ME: Current Working State : 5
1819 12:21:52.579055 ME: Current Operation State : 1
1820 12:21:52.582452 ME: Current Operation Mode : 3
1821 12:21:52.585477 ME: Error Code : 0
1822 12:21:52.588954 ME: Enhanced Debug Mode : NO
1823 12:21:52.592500 ME: CPU Debug Disabled : YES
1824 12:21:52.595526 ME: TXT Support : NO
1825 12:21:52.602094 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1826 12:21:52.608985 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1827 12:21:52.612086 CBFS: 'fallback/slic' not found.
1828 12:21:52.618980 ACPI: Writing ACPI tables at 76b01000.
1829 12:21:52.619067 ACPI: * FACS
1830 12:21:52.622016 ACPI: * DSDT
1831 12:21:52.625221 Ramoops buffer: 0x100000@0x76a00000.
1832 12:21:52.628585 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1833 12:21:52.635258 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1834 12:21:52.638923 Google Chrome EC: version:
1835 12:21:52.641874 ro: voema_v2.0.10114-a447f03e46
1836 12:21:52.645264 rw: voema_v2.0.10114-a447f03e46
1837 12:21:52.648768 running image: 2
1838 12:21:52.652000 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1839 12:21:52.657309 ACPI: * FADT
1840 12:21:52.657396 SCI is IRQ9
1841 12:21:52.663797 ACPI: added table 1/32, length now 40
1842 12:21:52.663884 ACPI: * SSDT
1843 12:21:52.667278 Found 1 CPU(s) with 8 core(s) each.
1844 12:21:52.673905 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1845 12:21:52.676861 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1846 12:21:52.680275 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1847 12:21:52.683687 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1848 12:21:52.690090 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1849 12:21:52.697181 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1850 12:21:52.700383 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1851 12:21:52.707202 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1852 12:21:52.713395 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1853 12:21:52.716663 \_SB.PCI0.RP09: Added StorageD3Enable property
1854 12:21:52.723402 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1855 12:21:52.726903 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1856 12:21:52.734055 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1857 12:21:52.736986 PS2K: Passing 80 keymaps to kernel
1858 12:21:52.743863 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1859 12:21:52.750305 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1860 12:21:52.757023 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1861 12:21:52.763843 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1862 12:21:52.770188 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1863 12:21:52.776924 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1864 12:21:52.783325 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1865 12:21:52.789943 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1866 12:21:52.793463 ACPI: added table 2/32, length now 44
1867 12:21:52.797087 ACPI: * MCFG
1868 12:21:52.799984 ACPI: added table 3/32, length now 48
1869 12:21:52.800070 ACPI: * TPM2
1870 12:21:52.803333 TPM2 log created at 0x769f0000
1871 12:21:52.806784 ACPI: added table 4/32, length now 52
1872 12:21:52.809726 ACPI: * MADT
1873 12:21:52.809812 SCI is IRQ9
1874 12:21:52.813319 ACPI: added table 5/32, length now 56
1875 12:21:52.816321 current = 76b09850
1876 12:21:52.816420 ACPI: * DMAR
1877 12:21:52.823216 ACPI: added table 6/32, length now 60
1878 12:21:52.826203 ACPI: added table 7/32, length now 64
1879 12:21:52.826288 ACPI: * HPET
1880 12:21:52.829686 ACPI: added table 8/32, length now 68
1881 12:21:52.833048 ACPI: done.
1882 12:21:52.836056 ACPI tables: 35216 bytes.
1883 12:21:52.839752 smbios_write_tables: 769ef000
1884 12:21:52.842923 EC returned error result code 3
1885 12:21:52.846467 Couldn't obtain OEM name from CBI
1886 12:21:52.849287 Create SMBIOS type 16
1887 12:21:52.849374 Create SMBIOS type 17
1888 12:21:52.852626 GENERIC: 0.0 (WIFI Device)
1889 12:21:52.856058 SMBIOS tables: 1734 bytes.
1890 12:21:52.859303 Writing table forward entry at 0x00000500
1891 12:21:52.866267 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1892 12:21:52.869205 Writing coreboot table at 0x76b25000
1893 12:21:52.876043 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1894 12:21:52.879260 1. 0000000000001000-000000000009ffff: RAM
1895 12:21:52.886108 2. 00000000000a0000-00000000000fffff: RESERVED
1896 12:21:52.888944 3. 0000000000100000-00000000769eefff: RAM
1897 12:21:52.895666 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1898 12:21:52.899224 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1899 12:21:52.905727 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1900 12:21:52.912071 7. 0000000077000000-000000007fbfffff: RESERVED
1901 12:21:52.915470 8. 00000000c0000000-00000000cfffffff: RESERVED
1902 12:21:52.922074 9. 00000000f8000000-00000000f9ffffff: RESERVED
1903 12:21:52.925459 10. 00000000fb000000-00000000fb000fff: RESERVED
1904 12:21:52.929024 11. 00000000fe000000-00000000fe00ffff: RESERVED
1905 12:21:52.935517 12. 00000000fed80000-00000000fed87fff: RESERVED
1906 12:21:52.938941 13. 00000000fed90000-00000000fed92fff: RESERVED
1907 12:21:52.945091 14. 00000000feda0000-00000000feda1fff: RESERVED
1908 12:21:52.948439 15. 00000000fedc0000-00000000feddffff: RESERVED
1909 12:21:52.954996 16. 0000000100000000-00000004803fffff: RAM
1910 12:21:52.955086 Passing 4 GPIOs to payload:
1911 12:21:52.961602 NAME | PORT | POLARITY | VALUE
1912 12:21:52.968226 lid | undefined | high | high
1913 12:21:52.971934 power | undefined | high | low
1914 12:21:52.978324 oprom | undefined | high | low
1915 12:21:52.981340 EC in RW | 0x000000e5 | high | high
1916 12:21:52.987964 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1917 12:21:52.991089 coreboot table: 1576 bytes.
1918 12:21:52.994768 IMD ROOT 0. 0x76fff000 0x00001000
1919 12:21:53.001317 IMD SMALL 1. 0x76ffe000 0x00001000
1920 12:21:53.004598 FSP MEMORY 2. 0x76c4e000 0x003b0000
1921 12:21:53.007597 VPD 3. 0x76c4d000 0x00000367
1922 12:21:53.011169 RO MCACHE 4. 0x76c4c000 0x00000fdc
1923 12:21:53.014601 CONSOLE 5. 0x76c2c000 0x00020000
1924 12:21:53.017402 FMAP 6. 0x76c2b000 0x00000578
1925 12:21:53.020933 TIME STAMP 7. 0x76c2a000 0x00000910
1926 12:21:53.024222 VBOOT WORK 8. 0x76c16000 0x00014000
1927 12:21:53.030657 ROMSTG STCK 9. 0x76c15000 0x00001000
1928 12:21:53.034172 AFTER CAR 10. 0x76c0a000 0x0000b000
1929 12:21:53.037528 RAMSTAGE 11. 0x76b97000 0x00073000
1930 12:21:53.040479 REFCODE 12. 0x76b42000 0x00055000
1931 12:21:53.044080 SMM BACKUP 13. 0x76b32000 0x00010000
1932 12:21:53.047459 4f444749 14. 0x76b30000 0x00002000
1933 12:21:53.050398 EXT VBT15. 0x76b2d000 0x0000219f
1934 12:21:53.053895 COREBOOT 16. 0x76b25000 0x00008000
1935 12:21:53.060699 ACPI 17. 0x76b01000 0x00024000
1936 12:21:53.064022 ACPI GNVS 18. 0x76b00000 0x00001000
1937 12:21:53.066874 RAMOOPS 19. 0x76a00000 0x00100000
1938 12:21:53.070393 TPM2 TCGLOG20. 0x769f0000 0x00010000
1939 12:21:53.073307 SMBIOS 21. 0x769ef000 0x00000800
1940 12:21:53.076694 IMD small region:
1941 12:21:53.080056 IMD ROOT 0. 0x76ffec00 0x00000400
1942 12:21:53.083327 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1943 12:21:53.086799 POWER STATE 2. 0x76ffeb80 0x00000044
1944 12:21:53.089955 ROMSTAGE 3. 0x76ffeb60 0x00000004
1945 12:21:53.096911 MEM INFO 4. 0x76ffe980 0x000001e0
1946 12:21:53.100015 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1947 12:21:53.103240 MTRR: Physical address space:
1948 12:21:53.109684 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1949 12:21:53.116571 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1950 12:21:53.123464 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1951 12:21:53.130053 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1952 12:21:53.136480 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1953 12:21:53.142665 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1954 12:21:53.149514 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1955 12:21:53.152986 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:21:53.156561 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:21:53.159325 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:21:53.162735 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:21:53.169227 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:21:53.172635 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:21:53.176018 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:21:53.179012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:21:53.185758 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:21:53.189230 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:21:53.192589 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:21:53.197004 call enable_fixed_mtrr()
1967 12:21:53.199868 CPU physical address size: 39 bits
1968 12:21:53.206444 MTRR: default type WB/UC MTRR counts: 6/7.
1969 12:21:53.210284 MTRR: WB selected as default type.
1970 12:21:53.216578 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1971 12:21:53.219961 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1972 12:21:53.226657 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1973 12:21:53.233441 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1974 12:21:53.240054 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1975 12:21:53.246592 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1976 12:21:53.250067
1977 12:21:53.250154 MTRR check
1978 12:21:53.253591 Fixed MTRRs : Enabled
1979 12:21:53.253678 Variable MTRRs: Enabled
1980 12:21:53.253746
1981 12:21:53.259937 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:21:53.263533 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 12:21:53.266771 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:21:53.269890 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:21:53.276685 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 12:21:53.280081 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 12:21:53.283380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 12:21:53.286649 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 12:21:53.293238 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 12:21:53.296619 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 12:21:53.299969 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 12:21:53.307014 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 12:21:53.307102 call enable_fixed_mtrr()
1994 12:21:53.313561 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 12:21:53.317117 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 12:21:53.320598 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 12:21:53.323460 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 12:21:53.330260 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 12:21:53.333844 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 12:21:53.336778 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 12:21:53.340114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 12:21:53.346918 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 12:21:53.350320 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 12:21:53.353426 CPU physical address size: 39 bits
2005 12:21:53.358989 call enable_fixed_mtrr()
2006 12:21:53.361984 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 12:21:53.368305 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:21:53.371987 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:21:53.375164 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:21:53.378720 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:21:53.385112 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:21:53.388163 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:21:53.391588 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:21:53.394955 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:21:53.401523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:21:53.405112 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:21:53.407954 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:21:53.415317 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 12:21:53.418692 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 12:21:53.422295 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 12:21:53.425260 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 12:21:53.432300 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 12:21:53.435216 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 12:21:53.438784 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 12:21:53.442038 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 12:21:53.448830 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 12:21:53.451661 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 12:21:53.455277 call enable_fixed_mtrr()
2029 12:21:53.458189 call enable_fixed_mtrr()
2030 12:21:53.465115 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2031 12:21:53.467940 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 12:21:53.471982 Checking cr50 for pending updates
2033 12:21:53.475393 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 12:21:53.478634 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 12:21:53.485480 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 12:21:53.488453 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 12:21:53.491931 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 12:21:53.495229 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 12:21:53.498526 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 12:21:53.504871 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 12:21:53.508220 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 12:21:53.511761 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 12:21:53.517101 Reading cr50 TPM mode
2044 12:21:53.520304 call enable_fixed_mtrr()
2045 12:21:53.523524 CPU physical address size: 39 bits
2046 12:21:53.527060 CPU physical address size: 39 bits
2047 12:21:53.533621 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:21:53.536968 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 12:21:53.540271 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:21:53.544016 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:21:53.546954 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:21:53.553658 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:21:53.557091 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:21:53.560120 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:21:53.563728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 12:21:53.570036 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 12:21:53.573312 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 12:21:53.576438 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 12:21:53.584434 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 12:21:53.587440 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:21:53.591089 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:21:53.594068 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:21:53.600547 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:21:53.603961 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:21:53.607496 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:21:53.610889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:21:53.617335 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:21:53.620816 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:21:53.623790 call enable_fixed_mtrr()
2070 12:21:53.626951 call enable_fixed_mtrr()
2071 12:21:53.630722 CPU physical address size: 39 bits
2072 12:21:53.636985 BS: BS_PAYLOAD_LOAD entry times (exec / console): 49 / 8 ms
2073 12:21:53.640788 CPU physical address size: 39 bits
2074 12:21:53.650346 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2075 12:21:53.653481 CPU physical address size: 39 bits
2076 12:21:53.656862 CPU physical address size: 39 bits
2077 12:21:53.663358 Checking segment from ROM address 0xffc02b38
2078 12:21:53.667210 Checking segment from ROM address 0xffc02b54
2079 12:21:53.670088 Loading segment from ROM address 0xffc02b38
2080 12:21:53.673578 code (compression=0)
2081 12:21:53.683717 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2082 12:21:53.689994 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2083 12:21:53.693109 it's not compressed!
2084 12:21:53.833392 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2085 12:21:53.839793 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2086 12:21:53.846466 Loading segment from ROM address 0xffc02b54
2087 12:21:53.849975 Entry Point 0x30000000
2088 12:21:53.850066 Loaded segments
2089 12:21:53.856354 BS: BS_PAYLOAD_LOAD run times (exec / console): 149 / 65 ms
2090 12:21:53.901594 Finalizing chipset.
2091 12:21:53.904584 Finalizing SMM.
2092 12:21:53.904673 APMC done.
2093 12:21:53.911131 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2094 12:21:53.914800 mp_park_aps done after 0 msecs.
2095 12:21:53.917947 Jumping to boot code at 0x30000000(0x76b25000)
2096 12:21:53.927765 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2097 12:21:53.927855
2098 12:21:53.931261
2099 12:21:53.931349
2100 12:21:53.931698 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2101 12:21:53.931802 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2102 12:21:53.931885 Setting prompt string to ['volteer:']
2103 12:21:53.931965 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2104 12:21:53.934163 Starting depthcharge on Voema...
2105 12:21:53.934278
2106 12:21:53.941386 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2107 12:21:53.941476
2108 12:21:53.947470 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2109 12:21:53.947558
2110 12:21:53.954074 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2111 12:21:53.954167
2112 12:21:53.957522 Failed to find eMMC card reader
2113 12:21:53.957611
2114 12:21:53.960739 Wipe memory regions:
2115 12:21:53.960826
2116 12:21:53.964171 [0x00000000001000, 0x000000000a0000)
2117 12:21:53.964259
2118 12:21:53.967189 [0x00000000100000, 0x00000030000000)
2119 12:21:54.002883
2120 12:21:54.006361 [0x00000032662db0, 0x000000769ef000)
2121 12:21:54.055835
2122 12:21:54.059535 [0x00000100000000, 0x00000480400000)
2123 12:21:54.689875
2124 12:21:54.692935 ec_init: CrosEC protocol v3 supported (256, 256)
2125 12:21:55.124066
2126 12:21:55.124211 R8152: Initializing
2127 12:21:55.124283
2128 12:21:55.127076 Version 6 (ocp_data = 5c30)
2129 12:21:55.127164
2130 12:21:55.130383 R8152: Done initializing
2131 12:21:55.130471
2132 12:21:55.133605 Adding net device
2133 12:21:55.435649
2134 12:21:55.439417 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2135 12:21:55.439510
2136 12:21:55.439579
2137 12:21:55.439642
2138 12:21:55.442339 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 12:21:55.542990 volteer: tftpboot 192.168.201.1 9584202/tftp-deploy-knf_47kp/kernel/bzImage 9584202/tftp-deploy-knf_47kp/kernel/cmdline 9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
2141 12:21:55.543131 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2142 12:21:55.543217 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2143 12:21:55.547567 tftpboot 192.168.201.1 9584202/tftp-deploy-knf_47kp/kernel/bzImoy-knf_47kp/kernel/cmdline 9584202/tftp-deploy-knf_47kp/ramdisk/ramdisk.cpio.gz
2144 12:21:55.547660
2145 12:21:55.547728 Waiting for link
2146 12:21:55.750518
2147 12:21:55.750648 done.
2148 12:21:55.750717
2149 12:21:55.750780 MAC: 00:24:32:30:7a:04
2150 12:21:55.750842
2151 12:21:55.754254 Sending DHCP discover... done.
2152 12:21:55.754340
2153 12:21:55.757355 Waiting for reply... done.
2154 12:21:55.757441
2155 12:21:55.760298 Sending DHCP request... done.
2156 12:21:55.760448
2157 12:21:55.763779 Waiting for reply... done.
2158 12:21:55.763865
2159 12:21:55.767532 My ip is 192.168.201.22
2160 12:21:55.767632
2161 12:21:55.770541 The DHCP server ip is 192.168.201.1
2162 12:21:55.770678
2163 12:21:55.776963 TFTP server IP predefined by user: 192.168.201.1
2164 12:21:55.777051
2165 12:21:55.783537 Bootfile predefined by user: 9584202/tftp-deploy-knf_47kp/kernel/bzImage
2166 12:21:55.783626
2167 12:21:55.787068 Sending tftp read request... done.
2168 12:21:55.787156
2169 12:21:55.790024 Waiting for the transfer...
2170 12:21:55.790111
2171 12:21:56.361870 00000000 ################################################################
2172 12:21:56.362013
2173 12:21:56.942135 00080000 ################################################################
2174 12:21:56.942276
2175 12:21:57.513686 00100000 ################################################################
2176 12:21:57.513828
2177 12:21:58.075766 00180000 ################################################################
2178 12:21:58.075908
2179 12:21:58.651431 00200000 ################################################################
2180 12:21:58.651848
2181 12:21:59.243899 00280000 ################################################################
2182 12:21:59.244043
2183 12:21:59.788679 00300000 ################################################################
2184 12:21:59.788825
2185 12:22:00.383346 00380000 ################################################################
2186 12:22:00.383874
2187 12:22:01.020705 00400000 ################################################################
2188 12:22:01.020845
2189 12:22:01.544296 00480000 ################################################################
2190 12:22:01.544475
2191 12:22:02.102999 00500000 ################################################################
2192 12:22:02.103151
2193 12:22:02.767040 00580000 ################################################################
2194 12:22:02.767570
2195 12:22:03.460154 00600000 ################################################################
2196 12:22:03.460744
2197 12:22:04.081725 00680000 ################################################################
2198 12:22:04.081877
2199 12:22:04.657849 00700000 ################################################################
2200 12:22:04.658006
2201 12:22:05.201948 00780000 ################################################################
2202 12:22:05.202111
2203 12:22:05.743632 00800000 ################################################################
2204 12:22:05.743781
2205 12:22:06.316503 00880000 ################################################################
2206 12:22:06.316660
2207 12:22:06.738322 00900000 ################################################ done.
2208 12:22:06.738468
2209 12:22:06.741843 The bootfile was 9826304 bytes long.
2210 12:22:06.741936
2211 12:22:06.744982 Sending tftp read request... done.
2212 12:22:06.745069
2213 12:22:06.748519 Waiting for the transfer...
2214 12:22:06.748605
2215 12:22:07.270430 00000000 ################################################################
2216 12:22:07.270568
2217 12:22:07.808346 00080000 ################################################################
2218 12:22:07.808498
2219 12:22:08.366801 00100000 ################################################################
2220 12:22:08.366939
2221 12:22:08.990293 00180000 ################################################################
2222 12:22:08.990438
2223 12:22:09.563878 00200000 ################################################################
2224 12:22:09.564022
2225 12:22:10.145394 00280000 ################################################################
2226 12:22:10.145541
2227 12:22:10.712945 00300000 ################################################################
2228 12:22:10.713086
2229 12:22:11.268049 00380000 ################################################################
2230 12:22:11.268184
2231 12:22:11.815165 00400000 ################################################################
2232 12:22:11.815311
2233 12:22:12.376042 00480000 ################################################################
2234 12:22:12.376190
2235 12:22:12.933507 00500000 ################################################################
2236 12:22:12.933649
2237 12:22:13.491135 00580000 ################################################################
2238 12:22:13.491270
2239 12:22:14.061185 00600000 ################################################################
2240 12:22:14.061332
2241 12:22:14.620200 00680000 ################################################################
2242 12:22:14.620390
2243 12:22:15.147662 00700000 ################################################################
2244 12:22:15.147817
2245 12:22:15.690418 00780000 ################################################################
2246 12:22:15.690576
2247 12:22:16.222344 00800000 ################################################################
2248 12:22:16.222501
2249 12:22:16.489140 00880000 ################################# done.
2250 12:22:16.489294
2251 12:22:16.492771 Sending tftp read request... done.
2252 12:22:16.492861
2253 12:22:16.495980 Waiting for the transfer...
2254 12:22:16.496069
2255 12:22:16.496139 00000000 # done.
2256 12:22:16.496207
2257 12:22:16.505666 Command line loaded dynamically from TFTP file: 9584202/tftp-deploy-knf_47kp/kernel/cmdline
2258 12:22:16.505758
2259 12:22:16.518998 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2260 12:22:16.523187
2261 12:22:16.526300 Shutting down all USB controllers.
2262 12:22:16.526390
2263 12:22:16.526459 Removing current net device
2264 12:22:16.526523
2265 12:22:16.529923 Finalizing coreboot
2266 12:22:16.530013
2267 12:22:16.536185 Exiting depthcharge with code 4 at timestamp: 31218288
2268 12:22:16.536275
2269 12:22:16.536357
2270 12:22:16.536424 Starting kernel ...
2271 12:22:16.536488
2272 12:22:16.536549
2273 12:22:16.536929 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2274 12:22:16.537030 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2275 12:22:16.537109 Setting prompt string to ['Linux version [0-9]']
2276 12:22:16.537181 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2277 12:22:16.537252 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2279 12:26:38.538031 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2281 12:26:38.539157 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2283 12:26:38.540050 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2286 12:26:38.541655 end: 2 depthcharge-action (duration 00:05:00) [common]
2288 12:26:38.542890 Cleaning after the job
2289 12:26:38.543358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/ramdisk
2290 12:26:38.546599 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/kernel
2291 12:26:38.549940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584202/tftp-deploy-knf_47kp/modules
2292 12:26:38.551706 start: 5.1 power-off (timeout 00:00:30) [common]
2293 12:26:38.552556 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2294 12:26:38.667174 >> Command sent successfully.
2295 12:26:38.670924 Returned 0 in 0 seconds
2296 12:26:38.772462 end: 5.1 power-off (duration 00:00:00) [common]
2298 12:26:38.774038 start: 5.2 read-feedback (timeout 00:10:00) [common]
2299 12:26:38.775198 Listened to connection for namespace 'common' for up to 1s
2300 12:26:39.780165 Finalising connection for namespace 'common'
2301 12:26:39.780908 Disconnecting from shell: Finalise
2302 12:26:39.781356
2303 12:26:39.882706 end: 5.2 read-feedback (duration 00:00:01) [common]
2304 12:26:39.882899 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584202
2305 12:26:39.889520 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584202
2306 12:26:39.889681 JobError: Your job cannot terminate cleanly.