Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:28.669079 lava-dispatcher, installed at version: 2023.01
2 12:21:28.669273 start: 0 validate
3 12:21:28.669394 Start time: 2023-03-13 12:21:28.669388+00:00 (UTC)
4 12:21:28.669679 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:28.669813 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 12:21:28.961784 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:28.962519 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:29.258434 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:29.259154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:21:32.645739 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:21:32.646512 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:21:33.647285 validate duration: 4.98
14 12:21:33.647577 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:21:33.647734 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:21:33.647824 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:21:33.647918 Not decompressing ramdisk as can be used compressed.
18 12:21:33.647999 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/initrd.cpio.gz
19 12:21:33.648060 saving as /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/ramdisk/initrd.cpio.gz
20 12:21:33.648119 total size: 5432085 (5MB)
21 12:21:33.649013 progress 0% (0MB)
22 12:21:33.650663 progress 5% (0MB)
23 12:21:33.651993 progress 10% (0MB)
24 12:21:33.653356 progress 15% (0MB)
25 12:21:33.654857 progress 20% (1MB)
26 12:21:33.656137 progress 25% (1MB)
27 12:21:33.657410 progress 30% (1MB)
28 12:21:33.658872 progress 35% (1MB)
29 12:21:33.660157 progress 40% (2MB)
30 12:21:33.661435 progress 45% (2MB)
31 12:21:33.662758 progress 50% (2MB)
32 12:21:33.664197 progress 55% (2MB)
33 12:21:33.665541 progress 60% (3MB)
34 12:21:33.666819 progress 65% (3MB)
35 12:21:33.668247 progress 70% (3MB)
36 12:21:33.669566 progress 75% (3MB)
37 12:21:33.670842 progress 80% (4MB)
38 12:21:33.672117 progress 85% (4MB)
39 12:21:33.673581 progress 90% (4MB)
40 12:21:33.674854 progress 95% (4MB)
41 12:21:33.676144 progress 100% (5MB)
42 12:21:33.676346 5MB downloaded in 0.03s (183.55MB/s)
43 12:21:33.676494 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:21:33.676736 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:21:33.676827 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:21:33.676911 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:21:33.677017 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:21:33.677086 saving as /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/kernel/bzImage
50 12:21:33.677146 total size: 9826304 (9MB)
51 12:21:33.677205 No compression specified
52 12:21:33.678179 progress 0% (0MB)
53 12:21:33.680736 progress 5% (0MB)
54 12:21:33.683153 progress 10% (0MB)
55 12:21:33.685721 progress 15% (1MB)
56 12:21:33.688165 progress 20% (1MB)
57 12:21:33.690668 progress 25% (2MB)
58 12:21:33.693097 progress 30% (2MB)
59 12:21:33.695504 progress 35% (3MB)
60 12:21:33.697918 progress 40% (3MB)
61 12:21:33.700288 progress 45% (4MB)
62 12:21:33.702703 progress 50% (4MB)
63 12:21:33.705059 progress 55% (5MB)
64 12:21:33.707424 progress 60% (5MB)
65 12:21:33.709747 progress 65% (6MB)
66 12:21:33.712074 progress 70% (6MB)
67 12:21:33.714404 progress 75% (7MB)
68 12:21:33.716724 progress 80% (7MB)
69 12:21:33.719091 progress 85% (7MB)
70 12:21:33.721451 progress 90% (8MB)
71 12:21:33.723797 progress 95% (8MB)
72 12:21:33.726146 progress 100% (9MB)
73 12:21:33.726361 9MB downloaded in 0.05s (190.43MB/s)
74 12:21:33.726505 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:21:33.726740 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:21:33.726828 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:21:33.726917 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:21:33.727021 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/full.rootfs.tar.xz
80 12:21:33.727088 saving as /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/nfsrootfs/full.rootfs.tar
81 12:21:33.727147 total size: 133351796 (127MB)
82 12:21:33.727207 Using unxz to decompress xz
83 12:21:33.730395 progress 0% (0MB)
84 12:21:34.065285 progress 5% (6MB)
85 12:21:34.427930 progress 10% (12MB)
86 12:21:34.715344 progress 15% (19MB)
87 12:21:34.913840 progress 20% (25MB)
88 12:21:35.160756 progress 25% (31MB)
89 12:21:35.501092 progress 30% (38MB)
90 12:21:35.849538 progress 35% (44MB)
91 12:21:36.240703 progress 40% (50MB)
92 12:21:36.619764 progress 45% (57MB)
93 12:21:36.974987 progress 50% (63MB)
94 12:21:37.345281 progress 55% (69MB)
95 12:21:37.702205 progress 60% (76MB)
96 12:21:38.062310 progress 65% (82MB)
97 12:21:38.421330 progress 70% (89MB)
98 12:21:38.782983 progress 75% (95MB)
99 12:21:39.223619 progress 80% (101MB)
100 12:21:39.656505 progress 85% (108MB)
101 12:21:39.928051 progress 90% (114MB)
102 12:21:40.272884 progress 95% (120MB)
103 12:21:40.664466 progress 100% (127MB)
104 12:21:40.670328 127MB downloaded in 6.94s (18.32MB/s)
105 12:21:40.670639 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:21:40.670935 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:21:40.671043 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:21:40.671148 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:21:40.671281 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:21:40.671358 saving as /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/modules/modules.tar
112 12:21:40.671439 total size: 460276 (0MB)
113 12:21:40.671520 Using unxz to decompress xz
114 12:21:40.674531 progress 7% (0MB)
115 12:21:40.674898 progress 14% (0MB)
116 12:21:40.675139 progress 21% (0MB)
117 12:21:40.676496 progress 28% (0MB)
118 12:21:40.678617 progress 35% (0MB)
119 12:21:40.680743 progress 42% (0MB)
120 12:21:40.683180 progress 49% (0MB)
121 12:21:40.685202 progress 56% (0MB)
122 12:21:40.687066 progress 64% (0MB)
123 12:21:40.689172 progress 71% (0MB)
124 12:21:40.691175 progress 78% (0MB)
125 12:21:40.693098 progress 85% (0MB)
126 12:21:40.694856 progress 92% (0MB)
127 12:21:40.696853 progress 99% (0MB)
128 12:21:40.703257 0MB downloaded in 0.03s (13.80MB/s)
129 12:21:40.703508 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:21:40.703773 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:21:40.703871 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
133 12:21:40.703968 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
134 12:21:41.954768 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9584201/extract-nfsrootfs-aok6zf4_
135 12:21:41.954956 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 12:21:41.955066 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
137 12:21:41.955208 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg
138 12:21:41.955313 makedir: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin
139 12:21:41.955399 makedir: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/tests
140 12:21:41.955479 makedir: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/results
141 12:21:41.955576 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-add-keys
142 12:21:41.955708 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-add-sources
143 12:21:41.955825 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-background-process-start
144 12:21:41.955939 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-background-process-stop
145 12:21:41.956051 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-common-functions
146 12:21:41.956162 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-echo-ipv4
147 12:21:41.956273 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-install-packages
148 12:21:41.956385 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-installed-packages
149 12:21:41.956494 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-os-build
150 12:21:41.956604 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-probe-channel
151 12:21:41.956713 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-probe-ip
152 12:21:41.956822 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-target-ip
153 12:21:41.956930 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-target-mac
154 12:21:41.957037 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-target-storage
155 12:21:41.957150 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-case
156 12:21:41.957258 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-event
157 12:21:41.957366 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-feedback
158 12:21:41.957530 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-raise
159 12:21:41.957644 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-reference
160 12:21:41.957755 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-runner
161 12:21:41.957864 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-set
162 12:21:41.957973 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-test-shell
163 12:21:41.958084 Updating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-install-packages (oe)
164 12:21:41.958199 Updating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/bin/lava-installed-packages (oe)
165 12:21:41.958297 Creating /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/environment
166 12:21:41.958381 LAVA metadata
167 12:21:41.958451 - LAVA_JOB_ID=9584201
168 12:21:41.958516 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:21:41.958613 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
170 12:21:41.958681 skipped lava-vland-overlay
171 12:21:41.958759 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:21:41.958842 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
173 12:21:41.958905 skipped lava-multinode-overlay
174 12:21:41.958979 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:21:41.959060 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
176 12:21:41.959136 Loading test definitions
177 12:21:41.959228 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
178 12:21:41.959299 Using /lava-9584201 at stage 0
179 12:21:41.959554 uuid=9584201_1.5.2.3.1 testdef=None
180 12:21:41.959644 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
181 12:21:41.959733 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
182 12:21:41.960211 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
184 12:21:41.960457 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
185 12:21:41.961070 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
187 12:21:41.961311 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
188 12:21:41.962056 runner path: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/0/tests/0_dmesg test_uuid 9584201_1.5.2.3.1
189 12:21:41.962204 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
191 12:21:41.962439 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
192 12:21:41.962514 Using /lava-9584201 at stage 1
193 12:21:41.962750 uuid=9584201_1.5.2.3.5 testdef=None
194 12:21:41.962842 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
195 12:21:41.962931 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
196 12:21:41.963382 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
198 12:21:41.963611 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
199 12:21:41.964187 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
201 12:21:41.964426 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
202 12:21:41.964976 runner path: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/1/tests/1_bootrr test_uuid 9584201_1.5.2.3.5
203 12:21:41.965122 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
205 12:21:41.965335 Creating lava-test-runner.conf files
206 12:21:41.965399 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/0 for stage 0
207 12:21:41.965555 - 0_dmesg
208 12:21:41.965631 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584201/lava-overlay-mpdilcrg/lava-9584201/1 for stage 1
209 12:21:41.965713 - 1_bootrr
210 12:21:41.965805 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
211 12:21:41.965891 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
212 12:21:41.971421 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
213 12:21:41.971532 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
214 12:21:41.971625 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
215 12:21:41.971713 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
216 12:21:41.971800 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
217 12:21:42.074500 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
218 12:21:42.074832 start: 1.5.4 extract-modules (timeout 00:09:52) [common]
219 12:21:42.075087 extracting modules file /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584201/extract-nfsrootfs-aok6zf4_
220 12:21:42.085837 extracting modules file /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584201/extract-overlay-ramdisk-pi6jeqt8/ramdisk
221 12:21:42.096298 end: 1.5.4 extract-modules (duration 00:00:00) [common]
222 12:21:42.096427 start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
223 12:21:42.096522 [common] Applying overlay to NFS
224 12:21:42.096593 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584201/compress-overlay-a9_ts03_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584201/extract-nfsrootfs-aok6zf4_
225 12:21:42.100606 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
226 12:21:42.100719 start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
227 12:21:42.100817 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
228 12:21:42.100910 start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
229 12:21:42.100989 Building ramdisk /var/lib/lava/dispatcher/tmp/9584201/extract-overlay-ramdisk-pi6jeqt8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584201/extract-overlay-ramdisk-pi6jeqt8/ramdisk
230 12:21:42.141393 >> 30003 blocks
231 12:21:42.669952 rename /var/lib/lava/dispatcher/tmp/9584201/extract-overlay-ramdisk-pi6jeqt8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
232 12:21:42.670331 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
233 12:21:42.670453 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
234 12:21:42.670555 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
235 12:21:42.670647 No mkimage arch provided, not using FIT.
236 12:21:42.670737 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
237 12:21:42.670860 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
238 12:21:42.671035 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
239 12:21:42.671158 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
240 12:21:42.671244 No LXC device requested
241 12:21:42.671327 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
242 12:21:42.671416 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
243 12:21:42.671497 end: 1.7 deploy-device-env (duration 00:00:00) [common]
244 12:21:42.671569 Checking files for TFTP limit of 4294967296 bytes.
245 12:21:42.671944 end: 1 tftp-deploy (duration 00:00:09) [common]
246 12:21:42.672050 start: 2 depthcharge-action (timeout 00:05:00) [common]
247 12:21:42.672144 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
248 12:21:42.672271 substitutions:
249 12:21:42.672338 - {DTB}: None
250 12:21:42.672401 - {INITRD}: 9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
251 12:21:42.672461 - {KERNEL}: 9584201/tftp-deploy-pvq1_yyk/kernel/bzImage
252 12:21:42.672519 - {LAVA_MAC}: None
253 12:21:42.672574 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9584201/extract-nfsrootfs-aok6zf4_
254 12:21:42.672632 - {NFS_SERVER_IP}: 192.168.201.1
255 12:21:42.672687 - {PRESEED_CONFIG}: None
256 12:21:42.672743 - {PRESEED_LOCAL}: None
257 12:21:42.672799 - {RAMDISK}: 9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
258 12:21:42.672855 - {ROOT_PART}: None
259 12:21:42.672911 - {ROOT}: None
260 12:21:42.672967 - {SERVER_IP}: 192.168.201.1
261 12:21:42.673022 - {TEE}: None
262 12:21:42.673079 Parsed boot commands:
263 12:21:42.673132 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
264 12:21:42.673285 Parsed boot commands: tftpboot 192.168.201.1 9584201/tftp-deploy-pvq1_yyk/kernel/bzImage 9584201/tftp-deploy-pvq1_yyk/kernel/cmdline 9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
265 12:21:42.673374 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
266 12:21:42.673487 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
267 12:21:42.673597 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
268 12:21:42.673682 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
269 12:21:42.673751 Not connected, no need to disconnect.
270 12:21:42.673826 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
271 12:21:42.673907 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
272 12:21:42.673975 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-5'
273 12:21:42.676989 Setting prompt string to ['lava-test: # ']
274 12:21:42.677267 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
275 12:21:42.677372 end: 2.2.1 reset-connection (duration 00:00:00) [common]
276 12:21:42.677527 start: 2.2.2 reset-device (timeout 00:05:00) [common]
277 12:21:42.677629 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
278 12:21:42.677815 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=reboot'
279 12:21:47.825341 >> Command sent successfully.
280 12:21:47.834717 Returned 0 in 5 seconds
281 12:21:47.936308 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
283 12:21:47.937786 end: 2.2.2 reset-device (duration 00:00:05) [common]
284 12:21:47.938313 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
285 12:21:47.938778 Setting prompt string to 'Starting depthcharge on Magolor...'
286 12:21:47.939160 Changing prompt to 'Starting depthcharge on Magolor...'
287 12:21:47.939525 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
288 12:21:47.940901 [Enter `^Ec?' for help]
289 12:21:49.098878
290 12:21:49.099465
291 12:21:49.108975 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
292 12:21:49.112053 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
293 12:21:49.115733 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
294 12:21:49.122260 CPU: AES supported, TXT NOT supported, VT supported
295 12:21:49.125343 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
296 12:21:49.132227 PCH: device id 4d87 (rev 01) is Jasperlake Super
297 12:21:49.135427 IGD: device id 4e55 (rev 01) is Jasperlake GT4
298 12:21:49.138592 VBOOT: Loading verstage.
299 12:21:49.145594 FMAP: Found "FLASH" version 1.1 at 0xc04000.
300 12:21:49.149609 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
301 12:21:49.156686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
302 12:21:49.160138 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
303 12:21:49.160689
304 12:21:49.161039
305 12:21:49.173525 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
306 12:21:49.186999 Probing TPM: . done!
307 12:21:49.190344 TPM ready after 0 ms
308 12:21:49.194013 Connected to device vid:did:rid of 1ae0:0028:00
309 12:21:49.205161 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
310 12:21:49.211755 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
311 12:21:49.278549 Initialized TPM device CR50 revision 0
312 12:21:49.288618 tlcl_send_startup: Startup return code is 0
313 12:21:49.289121 TPM: setup succeeded
314 12:21:49.307619 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 12:21:49.318809 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 12:21:49.330462 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
317 12:21:49.340994 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:21:49.344043 Chrome EC: UHEPI supported
319 12:21:49.344487 Phase 1
320 12:21:49.351375 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:21:49.357669 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
322 12:21:49.364285 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
323 12:21:49.368020 Recovery requested (1009000e)
324 12:21:49.371362 TPM: Extending digest for VBOOT: boot mode into PCR 0
325 12:21:49.382817 tlcl_extend: response is 0
326 12:21:49.389299 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
327 12:21:49.399106 tlcl_extend: response is 0
328 12:21:49.406002 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 12:21:49.409367 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
330 12:21:49.416115 BS: verstage times (exec / console): total (unknown) / 124 ms
331 12:21:49.416651
332 12:21:49.417002
333 12:21:49.425966 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
334 12:21:49.433262 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
335 12:21:49.440064 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
336 12:21:49.443856 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
337 12:21:49.446337 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
338 12:21:49.453051 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
339 12:21:49.456681 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
340 12:21:49.457271 TCO_STS: 0000 0001
341 12:21:49.460253 GEN_PMCON: d0015038 00002200
342 12:21:49.463974 GBLRST_CAUSE: 00000000 00000000
343 12:21:49.466794 prev_sleep_state 5
344 12:21:49.469741 Boot Count incremented to 13910
345 12:21:49.476564 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 12:21:49.479659 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
347 12:21:49.484434 Chrome EC: UHEPI supported
348 12:21:49.490649 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
349 12:21:49.496974 Probing TPM: done!
350 12:21:49.505774 Connected to device vid:did:rid of 1ae0:0028:00
351 12:21:49.512736 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
352 12:21:49.516398 Initialized TPM device CR50 revision 0
353 12:21:49.534322 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 12:21:49.540448 MRC: Hash idx 0x100b comparison successful.
355 12:21:49.544112 MRC cache found, size 5458
356 12:21:49.544699 bootmode is set to: 2
357 12:21:49.547792 SPD INDEX = 0
358 12:21:49.550687 CBFS: Found 'spd.bin' @0x40c40 size 0x600
359 12:21:49.553798 SPD: module type is LPDDR4X
360 12:21:49.560991 SPD: module part number is MT53E512M32D2NP-046 WT:E
361 12:21:49.567421 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
362 12:21:49.570872 SPD: device width 16 bits, bus width 32 bits
363 12:21:49.574034 SPD: module size is 4096 MB (per channel)
364 12:21:49.577496 meminit_channels: DRAM half-populated
365 12:21:49.660287 CBMEM:
366 12:21:49.664129 IMD: root @ 0x76fff000 254 entries.
367 12:21:49.667226 IMD: root @ 0x76ffec00 62 entries.
368 12:21:49.670677 FMAP: area RO_VPD found @ c00000 (16384 bytes)
369 12:21:49.677146 WARNING: RO_VPD is uninitialized or empty.
370 12:21:49.680504 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
371 12:21:49.683836 External stage cache:
372 12:21:49.687356 IMD: root @ 0x7b3ff000 254 entries.
373 12:21:49.690295 IMD: root @ 0x7b3fec00 62 entries.
374 12:21:49.700634 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
375 12:21:49.707171 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
376 12:21:49.713676 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
377 12:21:49.722537 MRC: 'RECOVERY_MRC_CACHE' does not need update.
378 12:21:49.728874 cse_lite: Skip switching to RW in the recovery path
379 12:21:49.729505 1 DIMMs found
380 12:21:49.729916 SMM Memory Map
381 12:21:49.732158 SMRAM : 0x7b000000 0x800000
382 12:21:49.738458 Subregion 0: 0x7b000000 0x200000
383 12:21:49.741821 Subregion 1: 0x7b200000 0x200000
384 12:21:49.745681 Subregion 2: 0x7b400000 0x400000
385 12:21:49.746288 top_of_ram = 0x77000000
386 12:21:49.752024 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
387 12:21:49.758502 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
388 12:21:49.761787 MTRR Range: Start=ff000000 End=0 (Size 1000000)
389 12:21:49.768714 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
390 12:21:49.771833 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
391 12:21:49.784018 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
392 12:21:49.790916 Processing 188 relocs. Offset value of 0x74c0e000
393 12:21:49.797655 BS: romstage times (exec / console): total (unknown) / 255 ms
394 12:21:49.802205
395 12:21:49.802823
396 12:21:49.812035 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
397 12:21:49.816171 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
398 12:21:49.822582 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
399 12:21:49.828855 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
400 12:21:49.884571 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
401 12:21:49.891986 Processing 4805 relocs. Offset value of 0x75da8000
402 12:21:49.894793 BS: postcar times (exec / console): total (unknown) / 42 ms
403 12:21:49.898455
404 12:21:49.899034
405 12:21:49.908446 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
406 12:21:49.909037 Normal boot
407 12:21:49.911937 EC returned error result code 3
408 12:21:49.915583 FW_CONFIG value is 0x204
409 12:21:49.918998 GENERIC: 0.0 disabled by fw_config
410 12:21:49.925182 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 12:21:49.928592 I2C: 00:10 disabled by fw_config
412 12:21:49.931879 I2C: 00:10 disabled by fw_config
413 12:21:49.935552 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
414 12:21:49.941655 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
415 12:21:49.944920 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
416 12:21:49.951699 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
417 12:21:49.955089 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
418 12:21:49.958379 I2C: 00:10 disabled by fw_config
419 12:21:49.964848 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
420 12:21:49.971284 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
421 12:21:49.974707 I2C: 00:1a disabled by fw_config
422 12:21:49.977701 I2C: 00:1a disabled by fw_config
423 12:21:49.984421 fw_config match found: AUDIO_AMP=UNPROVISIONED
424 12:21:49.988102 fw_config match found: AUDIO_AMP=UNPROVISIONED
425 12:21:49.991558 GENERIC: 0.0 disabled by fw_config
426 12:21:49.998001 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
427 12:21:50.000943 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
428 12:21:50.008100 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
429 12:21:50.011578 microcode: Update skipped, already up-to-date
430 12:21:50.018045 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
431 12:21:50.044281 Detected 2 core, 2 thread CPU.
432 12:21:50.047291 Setting up SMI for CPU
433 12:21:50.050734 IED base = 0x7b400000
434 12:21:50.051218 IED size = 0x00400000
435 12:21:50.053871 Will perform SMM setup.
436 12:21:50.057177 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
437 12:21:50.067137 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
438 12:21:50.070429 Processing 16 relocs. Offset value of 0x00030000
439 12:21:50.074060 Attempting to start 1 APs
440 12:21:50.077419 Waiting for 10ms after sending INIT.
441 12:21:50.093891 Waiting for 1st SIPI to complete...done.
442 12:21:50.094461 AP: slot 1 apic_id 2.
443 12:21:50.100268 Waiting for 2nd SIPI to complete...done.
444 12:21:50.107466 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
445 12:21:50.113816 Processing 13 relocs. Offset value of 0x00038000
446 12:21:50.114363 Unable to locate Global NVS
447 12:21:50.120877 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
448 12:21:50.127513 Installing permanent SMM handler to 0x7b000000
449 12:21:50.133855 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
450 12:21:50.140495 Processing 704 relocs. Offset value of 0x7b010000
451 12:21:50.147325 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
452 12:21:50.154083 Processing 13 relocs. Offset value of 0x7b008000
453 12:21:50.160615 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
454 12:21:50.164006 Unable to locate Global NVS
455 12:21:50.170161 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
456 12:21:50.173745 Clearing SMI status registers
457 12:21:50.174334 SMI_STS: PM1
458 12:21:50.177381 PM1_STS: PWRBTN
459 12:21:50.178040 TCO_STS: INTRD_DET
460 12:21:50.180734 GPE0 STD STS:
461 12:21:50.188054 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
462 12:21:50.191131 In relocation handler: CPU 0
463 12:21:50.194926 New SMBASE=0x7b000000 IEDBASE=0x7b400000
464 12:21:50.197759 Writing SMRR. base = 0x7b000006, mask=0xff800800
465 12:21:50.201227 Relocation complete.
466 12:21:50.207949 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
467 12:21:50.211273 In relocation handler: CPU 1
468 12:21:50.214592 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
469 12:21:50.221564 Writing SMRR. base = 0x7b000006, mask=0xff800800
470 12:21:50.222112 Relocation complete.
471 12:21:50.224443 Initializing CPU #0
472 12:21:50.228103 CPU: vendor Intel device 906c0
473 12:21:50.231409 CPU: family 06, model 9c, stepping 00
474 12:21:50.234541 Clearing out pending MCEs
475 12:21:50.237809 Setting up local APIC...
476 12:21:50.238356 apic_id: 0x00 done.
477 12:21:50.241410 Turbo is available but hidden
478 12:21:50.244987 Turbo is available and visible
479 12:21:50.251434 microcode: Update skipped, already up-to-date
480 12:21:50.251981 CPU #0 initialized
481 12:21:50.254816 Initializing CPU #1
482 12:21:50.257911 CPU: vendor Intel device 906c0
483 12:21:50.261799 CPU: family 06, model 9c, stepping 00
484 12:21:50.264745 Clearing out pending MCEs
485 12:21:50.265332 Setting up local APIC...
486 12:21:50.267950 apic_id: 0x02 done.
487 12:21:50.271492 microcode: Update skipped, already up-to-date
488 12:21:50.274778 CPU #1 initialized
489 12:21:50.277924 bsp_do_flight_plan done after 175 msecs.
490 12:21:50.281081 CPU: frequency set to 2800 MHz
491 12:21:50.284466 Enabling SMIs.
492 12:21:50.290873 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
493 12:21:50.299953 Probing TPM: done!
494 12:21:50.306721 Connected to device vid:did:rid of 1ae0:0028:00
495 12:21:50.316565 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
496 12:21:50.319933 Initialized TPM device CR50 revision 0
497 12:21:50.322888 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
498 12:21:50.330097 Found a VBT of 7680 bytes after decompression
499 12:21:50.337065 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
500 12:21:50.371576 Detected 2 core, 2 thread CPU.
501 12:21:50.374833 Detected 2 core, 2 thread CPU.
502 12:21:50.738158 Display FSP Version Info HOB
503 12:21:50.741324 Reference Code - CPU = 8.7.22.30
504 12:21:50.744318 uCode Version = 24.0.0.1f
505 12:21:50.747719 TXT ACM version = ff.ff.ff.ffff
506 12:21:50.751002 Reference Code - ME = 8.7.22.30
507 12:21:50.754712 MEBx version = 0.0.0.0
508 12:21:50.758525 ME Firmware Version = Consumer SKU
509 12:21:50.761890 Reference Code - PCH = 8.7.22.30
510 12:21:50.762332 PCH-CRID Status = Disabled
511 12:21:50.768907 PCH-CRID Original Value = ff.ff.ff.ffff
512 12:21:50.773113 PCH-CRID New Value = ff.ff.ff.ffff
513 12:21:50.773706 OPROM - RST - RAID = ff.ff.ff.ffff
514 12:21:50.776607 PCH Hsio Version = 4.0.0.0
515 12:21:50.782967 Reference Code - SA - System Agent = 8.7.22.30
516 12:21:50.786688 Reference Code - MRC = 0.0.4.68
517 12:21:50.787200 SA - PCIe Version = 8.7.22.30
518 12:21:50.789537 SA-CRID Status = Disabled
519 12:21:50.793136 SA-CRID Original Value = 0.0.0.0
520 12:21:50.796717 SA-CRID New Value = 0.0.0.0
521 12:21:50.799388 OPROM - VBIOS = ff.ff.ff.ffff
522 12:21:50.806282 IO Manageability Engine FW Version = ff.ff.ff.ffff
523 12:21:50.810078 PHY Build Version = ff.ff.ff.ffff
524 12:21:50.813069 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
525 12:21:50.819723 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
526 12:21:50.820285 ITSS IRQ Polarities Before:
527 12:21:50.823389 IPC0: 0xffffffff
528 12:21:50.826398 IPC1: 0xffffffff
529 12:21:50.826842 IPC2: 0xffffffff
530 12:21:50.829836 IPC3: 0xffffffff
531 12:21:50.830279 ITSS IRQ Polarities After:
532 12:21:50.833499 IPC0: 0xffffffff
533 12:21:50.834015 IPC1: 0xffffffff
534 12:21:50.836288 IPC2: 0xffffffff
535 12:21:50.840163 IPC3: 0xffffffff
536 12:21:50.849518 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
537 12:21:50.856530 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
538 12:21:50.859555 Enumerating buses...
539 12:21:50.863303 Show all devs... Before device enumeration.
540 12:21:50.866561 Root Device: enabled 1
541 12:21:50.869961 CPU_CLUSTER: 0: enabled 1
542 12:21:50.870512 DOMAIN: 0000: enabled 1
543 12:21:50.872682 PCI: 00:00.0: enabled 1
544 12:21:50.876387 PCI: 00:02.0: enabled 1
545 12:21:50.876831 PCI: 00:04.0: enabled 1
546 12:21:50.879263 PCI: 00:05.0: enabled 1
547 12:21:50.882701 PCI: 00:09.0: enabled 0
548 12:21:50.886424 PCI: 00:12.6: enabled 0
549 12:21:50.886865 PCI: 00:14.0: enabled 1
550 12:21:50.889490 PCI: 00:14.1: enabled 0
551 12:21:50.892984 PCI: 00:14.2: enabled 0
552 12:21:50.896139 PCI: 00:14.3: enabled 1
553 12:21:50.896690 PCI: 00:14.5: enabled 1
554 12:21:50.899636 PCI: 00:15.0: enabled 1
555 12:21:50.902980 PCI: 00:15.1: enabled 1
556 12:21:50.906267 PCI: 00:15.2: enabled 1
557 12:21:50.906713 PCI: 00:15.3: enabled 1
558 12:21:50.909942 PCI: 00:16.0: enabled 1
559 12:21:50.912833 PCI: 00:16.1: enabled 0
560 12:21:50.913381 PCI: 00:16.4: enabled 0
561 12:21:50.916301 PCI: 00:16.5: enabled 0
562 12:21:50.919706 PCI: 00:17.0: enabled 0
563 12:21:50.923079 PCI: 00:19.0: enabled 1
564 12:21:50.923627 PCI: 00:19.1: enabled 0
565 12:21:50.926045 PCI: 00:19.2: enabled 1
566 12:21:50.929950 PCI: 00:1a.0: enabled 1
567 12:21:50.932718 PCI: 00:1c.0: enabled 0
568 12:21:50.933264 PCI: 00:1c.1: enabled 0
569 12:21:50.935961 PCI: 00:1c.2: enabled 0
570 12:21:50.939287 PCI: 00:1c.3: enabled 0
571 12:21:50.942586 PCI: 00:1c.4: enabled 0
572 12:21:50.943034 PCI: 00:1c.5: enabled 0
573 12:21:50.946051 PCI: 00:1c.6: enabled 0
574 12:21:50.949029 PCI: 00:1c.7: enabled 1
575 12:21:50.949526 PCI: 00:1e.0: enabled 0
576 12:21:50.952711 PCI: 00:1e.1: enabled 0
577 12:21:50.955913 PCI: 00:1e.2: enabled 1
578 12:21:50.959709 PCI: 00:1e.3: enabled 0
579 12:21:50.960252 PCI: 00:1f.0: enabled 1
580 12:21:50.962640 PCI: 00:1f.1: enabled 1
581 12:21:50.966213 PCI: 00:1f.2: enabled 1
582 12:21:50.969541 PCI: 00:1f.3: enabled 1
583 12:21:50.970168 PCI: 00:1f.4: enabled 0
584 12:21:50.972857 PCI: 00:1f.5: enabled 1
585 12:21:50.976188 PCI: 00:1f.7: enabled 0
586 12:21:50.979219 GENERIC: 0.0: enabled 1
587 12:21:50.979675 GENERIC: 0.0: enabled 1
588 12:21:50.982705 USB0 port 0: enabled 1
589 12:21:50.986142 GENERIC: 0.0: enabled 1
590 12:21:50.986688 I2C: 00:2c: enabled 1
591 12:21:50.988758 I2C: 00:15: enabled 1
592 12:21:50.992826 GENERIC: 0.0: enabled 0
593 12:21:50.993363 I2C: 00:15: enabled 1
594 12:21:50.996017 I2C: 00:10: enabled 0
595 12:21:50.999567 I2C: 00:10: enabled 0
596 12:21:51.000014 I2C: 00:2c: enabled 1
597 12:21:51.003015 I2C: 00:40: enabled 1
598 12:21:51.005732 I2C: 00:10: enabled 1
599 12:21:51.006233 I2C: 00:39: enabled 1
600 12:21:51.009071 I2C: 00:36: enabled 1
601 12:21:51.012796 I2C: 00:10: enabled 0
602 12:21:51.013355 I2C: 00:0c: enabled 1
603 12:21:51.016169 I2C: 00:50: enabled 1
604 12:21:51.019645 I2C: 00:1a: enabled 1
605 12:21:51.022272 I2C: 00:1a: enabled 0
606 12:21:51.022722 I2C: 00:1a: enabled 0
607 12:21:51.025782 I2C: 00:28: enabled 1
608 12:21:51.029553 I2C: 00:29: enabled 1
609 12:21:51.030096 PCI: 00:00.0: enabled 1
610 12:21:51.032754 SPI: 00: enabled 1
611 12:21:51.035743 PNP: 0c09.0: enabled 1
612 12:21:51.036189 GENERIC: 0.0: enabled 0
613 12:21:51.039241 USB2 port 0: enabled 1
614 12:21:51.042448 USB2 port 1: enabled 1
615 12:21:51.042894 USB2 port 2: enabled 1
616 12:21:51.045809 USB2 port 3: enabled 1
617 12:21:51.048889 USB2 port 4: enabled 0
618 12:21:51.052412 USB2 port 5: enabled 1
619 12:21:51.052953 USB2 port 6: enabled 0
620 12:21:51.055726 USB2 port 7: enabled 1
621 12:21:51.059146 USB3 port 0: enabled 1
622 12:21:51.059600 USB3 port 1: enabled 1
623 12:21:51.062444 USB3 port 2: enabled 1
624 12:21:51.066070 USB3 port 3: enabled 1
625 12:21:51.066635 APIC: 00: enabled 1
626 12:21:51.068738 APIC: 02: enabled 1
627 12:21:51.072126 Compare with tree...
628 12:21:51.072583 Root Device: enabled 1
629 12:21:51.075506 CPU_CLUSTER: 0: enabled 1
630 12:21:51.078864 APIC: 00: enabled 1
631 12:21:51.082042 APIC: 02: enabled 1
632 12:21:51.082489 DOMAIN: 0000: enabled 1
633 12:21:51.085892 PCI: 00:00.0: enabled 1
634 12:21:51.089049 PCI: 00:02.0: enabled 1
635 12:21:51.092119 PCI: 00:04.0: enabled 1
636 12:21:51.092672 GENERIC: 0.0: enabled 1
637 12:21:51.095375 PCI: 00:05.0: enabled 1
638 12:21:51.099098 GENERIC: 0.0: enabled 1
639 12:21:51.102444 PCI: 00:09.0: enabled 0
640 12:21:51.105681 PCI: 00:12.6: enabled 0
641 12:21:51.106373 PCI: 00:14.0: enabled 1
642 12:21:51.109207 USB0 port 0: enabled 1
643 12:21:51.112293 USB2 port 0: enabled 1
644 12:21:51.116015 USB2 port 1: enabled 1
645 12:21:51.119141 USB2 port 2: enabled 1
646 12:21:51.119733 USB2 port 3: enabled 1
647 12:21:51.122060 USB2 port 4: enabled 0
648 12:21:51.125398 USB2 port 5: enabled 1
649 12:21:51.128506 USB2 port 6: enabled 0
650 12:21:51.131701 USB2 port 7: enabled 1
651 12:21:51.135269 USB3 port 0: enabled 1
652 12:21:51.135766 USB3 port 1: enabled 1
653 12:21:51.138486 USB3 port 2: enabled 1
654 12:21:51.141879 USB3 port 3: enabled 1
655 12:21:51.144924 PCI: 00:14.1: enabled 0
656 12:21:51.148326 PCI: 00:14.2: enabled 0
657 12:21:51.148794 PCI: 00:14.3: enabled 1
658 12:21:51.151789 GENERIC: 0.0: enabled 1
659 12:21:51.155091 PCI: 00:14.5: enabled 1
660 12:21:51.158590 PCI: 00:15.0: enabled 1
661 12:21:51.161794 I2C: 00:2c: enabled 1
662 12:21:51.162234 I2C: 00:15: enabled 1
663 12:21:51.165149 PCI: 00:15.1: enabled 1
664 12:21:51.168781 PCI: 00:15.2: enabled 1
665 12:21:51.171866 GENERIC: 0.0: enabled 0
666 12:21:51.174975 I2C: 00:15: enabled 1
667 12:21:51.175418 I2C: 00:10: enabled 0
668 12:21:51.178041 I2C: 00:10: enabled 0
669 12:21:51.181601 I2C: 00:2c: enabled 1
670 12:21:51.185122 I2C: 00:40: enabled 1
671 12:21:51.185594 I2C: 00:10: enabled 1
672 12:21:51.189148 I2C: 00:39: enabled 1
673 12:21:51.191733 PCI: 00:15.3: enabled 1
674 12:21:51.195112 I2C: 00:36: enabled 1
675 12:21:51.195596 I2C: 00:10: enabled 0
676 12:21:51.198492 I2C: 00:0c: enabled 1
677 12:21:51.201693 I2C: 00:50: enabled 1
678 12:21:51.205185 PCI: 00:16.0: enabled 1
679 12:21:51.208055 PCI: 00:16.1: enabled 0
680 12:21:51.208538 PCI: 00:16.4: enabled 0
681 12:21:51.211651 PCI: 00:16.5: enabled 0
682 12:21:51.214878 PCI: 00:17.0: enabled 0
683 12:21:51.218773 PCI: 00:19.0: enabled 1
684 12:21:51.219252 I2C: 00:1a: enabled 1
685 12:21:51.221628 I2C: 00:1a: enabled 0
686 12:21:51.224546 I2C: 00:1a: enabled 0
687 12:21:51.228108 I2C: 00:28: enabled 1
688 12:21:51.231273 I2C: 00:29: enabled 1
689 12:21:51.231735 PCI: 00:19.1: enabled 0
690 12:21:51.234783 PCI: 00:19.2: enabled 1
691 12:21:51.238394 PCI: 00:1a.0: enabled 1
692 12:21:51.241314 PCI: 00:1e.0: enabled 0
693 12:21:51.241784 PCI: 00:1e.1: enabled 0
694 12:21:51.244602 PCI: 00:1e.2: enabled 1
695 12:21:51.248035 SPI: 00: enabled 1
696 12:21:51.251194 PCI: 00:1e.3: enabled 0
697 12:21:51.254619 PCI: 00:1f.0: enabled 1
698 12:21:51.255061 PNP: 0c09.0: enabled 1
699 12:21:51.257861 PCI: 00:1f.1: enabled 1
700 12:21:51.261137 PCI: 00:1f.2: enabled 1
701 12:21:51.264664 PCI: 00:1f.3: enabled 1
702 12:21:51.267927 GENERIC: 0.0: enabled 0
703 12:21:51.268368 PCI: 00:1f.4: enabled 0
704 12:21:51.270953 PCI: 00:1f.5: enabled 1
705 12:21:51.274913 PCI: 00:1f.7: enabled 0
706 12:21:51.277977 Root Device scanning...
707 12:21:51.281123 scan_static_bus for Root Device
708 12:21:51.281612 CPU_CLUSTER: 0 enabled
709 12:21:51.284520 DOMAIN: 0000 enabled
710 12:21:51.287728 DOMAIN: 0000 scanning...
711 12:21:51.290952 PCI: pci_scan_bus for bus 00
712 12:21:51.294254 PCI: 00:00.0 [8086/0000] ops
713 12:21:51.297358 PCI: 00:00.0 [8086/4e22] enabled
714 12:21:51.301215 PCI: 00:02.0 [8086/0000] bus ops
715 12:21:51.304385 PCI: 00:02.0 [8086/4e55] enabled
716 12:21:51.307674 PCI: 00:04.0 [8086/0000] bus ops
717 12:21:51.310741 PCI: 00:04.0 [8086/4e03] enabled
718 12:21:51.314195 PCI: 00:05.0 [8086/0000] bus ops
719 12:21:51.317369 PCI: 00:05.0 [8086/4e19] enabled
720 12:21:51.321387 PCI: 00:08.0 [8086/4e11] enabled
721 12:21:51.323893 PCI: 00:14.0 [8086/0000] bus ops
722 12:21:51.327548 PCI: 00:14.0 [8086/4ded] enabled
723 12:21:51.330982 PCI: 00:14.2 [8086/4def] disabled
724 12:21:51.334056 PCI: 00:14.3 [8086/0000] bus ops
725 12:21:51.337811 PCI: 00:14.3 [8086/4df0] enabled
726 12:21:51.340711 PCI: 00:14.5 [8086/0000] ops
727 12:21:51.344321 PCI: 00:14.5 [8086/4df8] enabled
728 12:21:51.347509 PCI: 00:15.0 [8086/0000] bus ops
729 12:21:51.350597 PCI: 00:15.0 [8086/4de8] enabled
730 12:21:51.354291 PCI: 00:15.1 [8086/0000] bus ops
731 12:21:51.357205 PCI: 00:15.1 [8086/4de9] enabled
732 12:21:51.360592 PCI: 00:15.2 [8086/0000] bus ops
733 12:21:51.363831 PCI: 00:15.2 [8086/4dea] enabled
734 12:21:51.367069 PCI: 00:15.3 [8086/0000] bus ops
735 12:21:51.370420 PCI: 00:15.3 [8086/4deb] enabled
736 12:21:51.370862 PCI: 00:16.0 [8086/0000] ops
737 12:21:51.373741 PCI: 00:16.0 [8086/4de0] enabled
738 12:21:51.377291 PCI: 00:19.0 [8086/0000] bus ops
739 12:21:51.380477 PCI: 00:19.0 [8086/4dc5] enabled
740 12:21:51.383884 PCI: 00:19.2 [8086/0000] ops
741 12:21:51.387127 PCI: 00:19.2 [8086/4dc7] enabled
742 12:21:51.390454 PCI: 00:1a.0 [8086/0000] ops
743 12:21:51.394305 PCI: 00:1a.0 [8086/4dc4] enabled
744 12:21:51.396820 PCI: 00:1e.0 [8086/0000] ops
745 12:21:51.400218 PCI: 00:1e.0 [8086/4da8] disabled
746 12:21:51.403509 PCI: 00:1e.2 [8086/0000] bus ops
747 12:21:51.407085 PCI: 00:1e.2 [8086/4daa] enabled
748 12:21:51.410409 PCI: 00:1f.0 [8086/0000] bus ops
749 12:21:51.413695 PCI: 00:1f.0 [8086/4d87] enabled
750 12:21:51.420190 PCI: Static device PCI: 00:1f.1 not found, disabling it.
751 12:21:51.420630 RTC Init
752 12:21:51.423464 Set power on after power failure.
753 12:21:51.426790 Disabling Deep S3
754 12:21:51.427229 Disabling Deep S3
755 12:21:51.430325 Disabling Deep S4
756 12:21:51.433807 Disabling Deep S4
757 12:21:51.434247 Disabling Deep S5
758 12:21:51.437537 Disabling Deep S5
759 12:21:51.437977 PCI: 00:1f.2 [0000/0000] hidden
760 12:21:51.441354 PCI: 00:1f.3 [8086/0000] bus ops
761 12:21:51.444516 PCI: 00:1f.3 [8086/4dc8] enabled
762 12:21:51.447828 PCI: 00:1f.5 [8086/0000] bus ops
763 12:21:51.451265 PCI: 00:1f.5 [8086/4da4] enabled
764 12:21:51.454588 PCI: Leftover static devices:
765 12:21:51.458035 PCI: 00:12.6
766 12:21:51.458476 PCI: 00:09.0
767 12:21:51.458824 PCI: 00:14.1
768 12:21:51.461357 PCI: 00:16.1
769 12:21:51.462166 PCI: 00:16.4
770 12:21:51.464582 PCI: 00:16.5
771 12:21:51.465019 PCI: 00:17.0
772 12:21:51.465365 PCI: 00:19.1
773 12:21:51.467823 PCI: 00:1e.1
774 12:21:51.468262 PCI: 00:1e.3
775 12:21:51.471112 PCI: 00:1f.1
776 12:21:51.471550 PCI: 00:1f.4
777 12:21:51.474376 PCI: 00:1f.7
778 12:21:51.474924 PCI: Check your devicetree.cb.
779 12:21:51.477581 PCI: 00:02.0 scanning...
780 12:21:51.481602 scan_generic_bus for PCI: 00:02.0
781 12:21:51.484316 scan_generic_bus for PCI: 00:02.0 done
782 12:21:51.491277 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
783 12:21:51.494182 PCI: 00:04.0 scanning...
784 12:21:51.497915 scan_generic_bus for PCI: 00:04.0
785 12:21:51.498396 GENERIC: 0.0 enabled
786 12:21:51.504738 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
787 12:21:51.511110 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
788 12:21:51.511551 PCI: 00:05.0 scanning...
789 12:21:51.514379 scan_generic_bus for PCI: 00:05.0
790 12:21:51.517936 GENERIC: 0.0 enabled
791 12:21:51.524930 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
792 12:21:51.527667 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
793 12:21:51.531319 PCI: 00:14.0 scanning...
794 12:21:51.534378 scan_static_bus for PCI: 00:14.0
795 12:21:51.537696 USB0 port 0 enabled
796 12:21:51.540756 USB0 port 0 scanning...
797 12:21:51.543984 scan_static_bus for USB0 port 0
798 12:21:51.544465 USB2 port 0 enabled
799 12:21:51.547559 USB2 port 1 enabled
800 12:21:51.547998 USB2 port 2 enabled
801 12:21:51.550832 USB2 port 3 enabled
802 12:21:51.554750 USB2 port 4 disabled
803 12:21:51.555162 USB2 port 5 enabled
804 12:21:51.557418 USB2 port 6 disabled
805 12:21:51.561033 USB2 port 7 enabled
806 12:21:51.561534 USB3 port 0 enabled
807 12:21:51.564326 USB3 port 1 enabled
808 12:21:51.564763 USB3 port 2 enabled
809 12:21:51.567760 USB3 port 3 enabled
810 12:21:51.570478 USB2 port 0 scanning...
811 12:21:51.573903 scan_static_bus for USB2 port 0
812 12:21:51.577318 scan_static_bus for USB2 port 0 done
813 12:21:51.580548 scan_bus: bus USB2 port 0 finished in 6 msecs
814 12:21:51.583599 USB2 port 1 scanning...
815 12:21:51.587328 scan_static_bus for USB2 port 1
816 12:21:51.590053 scan_static_bus for USB2 port 1 done
817 12:21:51.596932 scan_bus: bus USB2 port 1 finished in 6 msecs
818 12:21:51.597028 USB2 port 2 scanning...
819 12:21:51.600025 scan_static_bus for USB2 port 2
820 12:21:51.603740 scan_static_bus for USB2 port 2 done
821 12:21:51.610037 scan_bus: bus USB2 port 2 finished in 6 msecs
822 12:21:51.614123 USB2 port 3 scanning...
823 12:21:51.617153 scan_static_bus for USB2 port 3
824 12:21:51.620165 scan_static_bus for USB2 port 3 done
825 12:21:51.623557 scan_bus: bus USB2 port 3 finished in 6 msecs
826 12:21:51.627346 USB2 port 5 scanning...
827 12:21:51.630570 scan_static_bus for USB2 port 5
828 12:21:51.633735 scan_static_bus for USB2 port 5 done
829 12:21:51.636799 scan_bus: bus USB2 port 5 finished in 6 msecs
830 12:21:51.639939 USB2 port 7 scanning...
831 12:21:51.643567 scan_static_bus for USB2 port 7
832 12:21:51.646756 scan_static_bus for USB2 port 7 done
833 12:21:51.653500 scan_bus: bus USB2 port 7 finished in 6 msecs
834 12:21:51.653683 USB3 port 0 scanning...
835 12:21:51.656838 scan_static_bus for USB3 port 0
836 12:21:51.660443 scan_static_bus for USB3 port 0 done
837 12:21:51.667528 scan_bus: bus USB3 port 0 finished in 6 msecs
838 12:21:51.670559 USB3 port 1 scanning...
839 12:21:51.673593 scan_static_bus for USB3 port 1
840 12:21:51.677247 scan_static_bus for USB3 port 1 done
841 12:21:51.680120 scan_bus: bus USB3 port 1 finished in 6 msecs
842 12:21:51.683719 USB3 port 2 scanning...
843 12:21:51.686932 scan_static_bus for USB3 port 2
844 12:21:51.690265 scan_static_bus for USB3 port 2 done
845 12:21:51.693496 scan_bus: bus USB3 port 2 finished in 6 msecs
846 12:21:51.696829 USB3 port 3 scanning...
847 12:21:51.699996 scan_static_bus for USB3 port 3
848 12:21:51.703614 scan_static_bus for USB3 port 3 done
849 12:21:51.710293 scan_bus: bus USB3 port 3 finished in 6 msecs
850 12:21:51.713807 scan_static_bus for USB0 port 0 done
851 12:21:51.716863 scan_bus: bus USB0 port 0 finished in 172 msecs
852 12:21:51.720283 scan_static_bus for PCI: 00:14.0 done
853 12:21:51.726991 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
854 12:21:51.727438 PCI: 00:14.3 scanning...
855 12:21:51.730558 scan_static_bus for PCI: 00:14.3
856 12:21:51.733799 GENERIC: 0.0 enabled
857 12:21:51.737092 scan_static_bus for PCI: 00:14.3 done
858 12:21:51.743582 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
859 12:21:51.744148 PCI: 00:15.0 scanning...
860 12:21:51.746940 scan_static_bus for PCI: 00:15.0
861 12:21:51.750352 I2C: 00:2c enabled
862 12:21:51.753210 I2C: 00:15 enabled
863 12:21:51.756927 scan_static_bus for PCI: 00:15.0 done
864 12:21:51.760012 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
865 12:21:51.763292 PCI: 00:15.1 scanning...
866 12:21:51.766738 scan_static_bus for PCI: 00:15.1
867 12:21:51.769980 scan_static_bus for PCI: 00:15.1 done
868 12:21:51.776707 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
869 12:21:51.777152 PCI: 00:15.2 scanning...
870 12:21:51.780332 scan_static_bus for PCI: 00:15.2
871 12:21:51.783296 GENERIC: 0.0 disabled
872 12:21:51.786868 I2C: 00:15 enabled
873 12:21:51.787423 I2C: 00:10 disabled
874 12:21:51.790281 I2C: 00:10 disabled
875 12:21:51.793165 I2C: 00:2c enabled
876 12:21:51.793637 I2C: 00:40 enabled
877 12:21:51.796770 I2C: 00:10 enabled
878 12:21:51.797214 I2C: 00:39 enabled
879 12:21:51.800021 scan_static_bus for PCI: 00:15.2 done
880 12:21:51.806757 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
881 12:21:51.809821 PCI: 00:15.3 scanning...
882 12:21:51.813329 scan_static_bus for PCI: 00:15.3
883 12:21:51.813808 I2C: 00:36 enabled
884 12:21:51.816484 I2C: 00:10 disabled
885 12:21:51.816932 I2C: 00:0c enabled
886 12:21:51.820230 I2C: 00:50 enabled
887 12:21:51.823219 scan_static_bus for PCI: 00:15.3 done
888 12:21:51.829764 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
889 12:21:51.830217 PCI: 00:19.0 scanning...
890 12:21:51.833297 scan_static_bus for PCI: 00:19.0
891 12:21:51.836166 I2C: 00:1a enabled
892 12:21:51.839455 I2C: 00:1a disabled
893 12:21:51.839898 I2C: 00:1a disabled
894 12:21:51.843065 I2C: 00:28 enabled
895 12:21:51.843512 I2C: 00:29 enabled
896 12:21:51.850502 scan_static_bus for PCI: 00:19.0 done
897 12:21:51.853201 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
898 12:21:51.856312 PCI: 00:1e.2 scanning...
899 12:21:51.860031 scan_generic_bus for PCI: 00:1e.2
900 12:21:51.860494 SPI: 00 enabled
901 12:21:51.866466 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
902 12:21:51.872962 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
903 12:21:51.873411 PCI: 00:1f.0 scanning...
904 12:21:51.876179 scan_static_bus for PCI: 00:1f.0
905 12:21:51.879493 PNP: 0c09.0 enabled
906 12:21:51.883277 PNP: 0c09.0 scanning...
907 12:21:51.886417 scan_static_bus for PNP: 0c09.0
908 12:21:51.889530 scan_static_bus for PNP: 0c09.0 done
909 12:21:51.893246 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
910 12:21:51.896175 scan_static_bus for PCI: 00:1f.0 done
911 12:21:51.902823 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
912 12:21:51.906516 PCI: 00:1f.3 scanning...
913 12:21:51.909271 scan_static_bus for PCI: 00:1f.3
914 12:21:51.909756 GENERIC: 0.0 disabled
915 12:21:51.916217 scan_static_bus for PCI: 00:1f.3 done
916 12:21:51.919475 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
917 12:21:51.923139 PCI: 00:1f.5 scanning...
918 12:21:51.925949 scan_generic_bus for PCI: 00:1f.5
919 12:21:51.929338 scan_generic_bus for PCI: 00:1f.5 done
920 12:21:51.932703 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
921 12:21:51.939538 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
922 12:21:51.942715 scan_static_bus for Root Device done
923 12:21:51.946071 scan_bus: bus Root Device finished in 666 msecs
924 12:21:51.949571 done
925 12:21:51.952803 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
926 12:21:51.956728 Chrome EC: UHEPI supported
927 12:21:51.963214 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
928 12:21:51.970402 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
929 12:21:51.973055 SPI flash protection: WPSW=0 SRP0=1
930 12:21:51.979986 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
931 12:21:51.983414 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
932 12:21:51.986305 found VGA at PCI: 00:02.0
933 12:21:51.990013 Setting up VGA for PCI: 00:02.0
934 12:21:51.996380 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
935 12:21:51.999694 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
936 12:21:52.003418 Allocating resources...
937 12:21:52.003880 Reading resources...
938 12:21:52.010364 Root Device read_resources bus 0 link: 0
939 12:21:52.013674 CPU_CLUSTER: 0 read_resources bus 0 link: 0
940 12:21:52.017900 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
941 12:21:52.021202 DOMAIN: 0000 read_resources bus 0 link: 0
942 12:21:52.029084 PCI: 00:04.0 read_resources bus 1 link: 0
943 12:21:52.032651 PCI: 00:04.0 read_resources bus 1 link: 0 done
944 12:21:52.035978 PCI: 00:05.0 read_resources bus 2 link: 0
945 12:21:52.043078 PCI: 00:05.0 read_resources bus 2 link: 0 done
946 12:21:52.046207 PCI: 00:14.0 read_resources bus 0 link: 0
947 12:21:52.052813 USB0 port 0 read_resources bus 0 link: 0
948 12:21:52.059526 USB0 port 0 read_resources bus 0 link: 0 done
949 12:21:52.115820 PCI: 00:14.0 read_resources bus 0 link: 0 done
950 12:21:52.116394 PCI: 00:14.3 read_resources bus 0 link: 0
951 12:21:52.117136 PCI: 00:14.3 read_resources bus 0 link: 0 done
952 12:21:52.117566 PCI: 00:15.0 read_resources bus 0 link: 0
953 12:21:52.117917 PCI: 00:15.0 read_resources bus 0 link: 0 done
954 12:21:52.118249 PCI: 00:15.2 read_resources bus 0 link: 0
955 12:21:52.118587 PCI: 00:15.2 read_resources bus 0 link: 0 done
956 12:21:52.119244 PCI: 00:15.3 read_resources bus 0 link: 0
957 12:21:52.119595 PCI: 00:15.3 read_resources bus 0 link: 0 done
958 12:21:52.119934 PCI: 00:19.0 read_resources bus 0 link: 0
959 12:21:52.120249 PCI: 00:19.0 read_resources bus 0 link: 0 done
960 12:21:52.167490 PCI: 00:1e.2 read_resources bus 3 link: 0
961 12:21:52.168057 PCI: 00:1e.2 read_resources bus 3 link: 0 done
962 12:21:52.168787 PCI: 00:1f.0 read_resources bus 0 link: 0
963 12:21:52.169163 PCI: 00:1f.0 read_resources bus 0 link: 0 done
964 12:21:52.169547 PCI: 00:1f.3 read_resources bus 0 link: 0
965 12:21:52.170202 PCI: 00:1f.3 read_resources bus 0 link: 0 done
966 12:21:52.170551 DOMAIN: 0000 read_resources bus 0 link: 0 done
967 12:21:52.170870 Root Device read_resources bus 0 link: 0 done
968 12:21:52.171181 Done reading resources.
969 12:21:52.171831 Show resources in subtree (Root Device)...After reading.
970 12:21:52.172188 Root Device child on link 0 CPU_CLUSTER: 0
971 12:21:52.172611 CPU_CLUSTER: 0 child on link 0 APIC: 00
972 12:21:52.173093 APIC: 00
973 12:21:52.174047 APIC: 02
974 12:21:52.174593 DOMAIN: 0000 child on link 0 PCI: 00:00.0
975 12:21:52.183577 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
976 12:21:52.193803 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
977 12:21:52.196991 PCI: 00:00.0
978 12:21:52.206965 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
979 12:21:52.213574 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
980 12:21:52.223382 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
981 12:21:52.233240 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
982 12:21:52.243190 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
983 12:21:52.253210 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
984 12:21:52.260189 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
985 12:21:52.269920 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
986 12:21:52.279546 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
987 12:21:52.289355 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
988 12:21:52.299649 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
989 12:21:52.306122 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
990 12:21:52.316181 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
991 12:21:52.326150 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
992 12:21:52.336525 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
993 12:21:52.346158 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
994 12:21:52.356219 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
995 12:21:52.362468 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
996 12:21:52.372415 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
997 12:21:52.376137 PCI: 00:02.0
998 12:21:52.386269 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
999 12:21:52.395774 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1000 12:21:52.402641 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1001 12:21:52.409164 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1002 12:21:52.419045 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1003 12:21:52.419537 GENERIC: 0.0
1004 12:21:52.425405 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1005 12:21:52.435729 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1006 12:21:52.436285 GENERIC: 0.0
1007 12:21:52.438659 PCI: 00:08.0
1008 12:21:52.448858 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1009 12:21:52.452171 PCI: 00:14.0 child on link 0 USB0 port 0
1010 12:21:52.461929 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1011 12:21:52.465353 USB0 port 0 child on link 0 USB2 port 0
1012 12:21:52.468597 USB2 port 0
1013 12:21:52.472360 USB2 port 1
1014 12:21:52.472914 USB2 port 2
1015 12:21:52.475457 USB2 port 3
1016 12:21:52.475912 USB2 port 4
1017 12:21:52.478552 USB2 port 5
1018 12:21:52.479003 USB2 port 6
1019 12:21:52.482212 USB2 port 7
1020 12:21:52.482772 USB3 port 0
1021 12:21:52.485478 USB3 port 1
1022 12:21:52.485934 USB3 port 2
1023 12:21:52.488900 USB3 port 3
1024 12:21:52.489492 PCI: 00:14.2
1025 12:21:52.495816 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1026 12:21:52.505211 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1027 12:21:52.505709 GENERIC: 0.0
1028 12:21:52.508565 PCI: 00:14.5
1029 12:21:52.518685 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 12:21:52.521863 PCI: 00:15.0 child on link 0 I2C: 00:2c
1031 12:21:52.531871 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 12:21:52.532355 I2C: 00:2c
1033 12:21:52.534979 I2C: 00:15
1034 12:21:52.535429 PCI: 00:15.1
1035 12:21:52.545249 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1036 12:21:52.551598 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1037 12:21:52.561378 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 12:21:52.561899 GENERIC: 0.0
1039 12:21:52.564994 I2C: 00:15
1040 12:21:52.565552 I2C: 00:10
1041 12:21:52.568368 I2C: 00:10
1042 12:21:52.568874 I2C: 00:2c
1043 12:21:52.571487 I2C: 00:40
1044 12:21:52.571924 I2C: 00:10
1045 12:21:52.575235 I2C: 00:39
1046 12:21:52.578268 PCI: 00:15.3 child on link 0 I2C: 00:36
1047 12:21:52.588424 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1048 12:21:52.588889 I2C: 00:36
1049 12:21:52.591708 I2C: 00:10
1050 12:21:52.592146 I2C: 00:0c
1051 12:21:52.595001 I2C: 00:50
1052 12:21:52.595456 PCI: 00:16.0
1053 12:21:52.605057 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1054 12:21:52.608177 PCI: 00:19.0 child on link 0 I2C: 00:1a
1055 12:21:52.618376 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1056 12:21:52.621740 I2C: 00:1a
1057 12:21:52.622181 I2C: 00:1a
1058 12:21:52.624800 I2C: 00:1a
1059 12:21:52.625275 I2C: 00:28
1060 12:21:52.628171 I2C: 00:29
1061 12:21:52.628647 PCI: 00:19.2
1062 12:21:52.641589 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1063 12:21:52.651474 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1064 12:21:52.651992 PCI: 00:1a.0
1065 12:21:52.661671 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1066 12:21:52.664684 PCI: 00:1e.0
1067 12:21:52.667975 PCI: 00:1e.2 child on link 0 SPI: 00
1068 12:21:52.677840 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1069 12:21:52.678326 SPI: 00
1070 12:21:52.681135 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1071 12:21:52.692301 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1072 12:21:52.692746 PNP: 0c09.0
1073 12:21:52.702204 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1074 12:21:52.702694 PCI: 00:1f.2
1075 12:21:52.712239 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1076 12:21:52.722339 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1077 12:21:52.725815 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1078 12:21:52.735727 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1079 12:21:52.745952 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1080 12:21:52.748994 GENERIC: 0.0
1081 12:21:52.749492 PCI: 00:1f.5
1082 12:21:52.758789 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1083 12:21:52.765785 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1084 12:21:52.776082 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1085 12:21:52.778877 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1086 12:21:52.788661 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1087 12:21:52.795581 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1088 12:21:52.802134 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1089 12:21:52.805231 DOMAIN: 0000: Resource ranges:
1090 12:21:52.808909 * Base: 1000, Size: 800, Tag: 100
1091 12:21:52.812109 * Base: 1900, Size: e700, Tag: 100
1092 12:21:52.819093 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1093 12:21:52.825759 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1094 12:21:52.832136 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1095 12:21:52.838727 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1096 12:21:52.848733 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1097 12:21:52.855828 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1098 12:21:52.862002 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1099 12:21:52.871821 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1100 12:21:52.878662 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1101 12:21:52.885356 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1102 12:21:52.894994 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1103 12:21:52.902003 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1104 12:21:52.908113 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1105 12:21:52.918407 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1106 12:21:52.924717 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1107 12:21:52.931638 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1108 12:21:52.941214 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1109 12:21:52.948139 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1110 12:21:52.955077 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1111 12:21:52.964652 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1112 12:21:52.971491 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1113 12:21:52.977572 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1114 12:21:52.984522 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1115 12:21:52.994460 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1116 12:21:52.998321 DOMAIN: 0000: Resource ranges:
1117 12:21:53.001044 * Base: 7fc00000, Size: 40400000, Tag: 200
1118 12:21:53.004553 * Base: d0000000, Size: 2b000000, Tag: 200
1119 12:21:53.011374 * Base: fb001000, Size: 2fff000, Tag: 200
1120 12:21:53.014743 * Base: fe010000, Size: 22000, Tag: 200
1121 12:21:53.017907 * Base: fe033000, Size: a4d000, Tag: 200
1122 12:21:53.021188 * Base: fea88000, Size: 2f8000, Tag: 200
1123 12:21:53.027939 * Base: fed88000, Size: 8000, Tag: 200
1124 12:21:53.031383 * Base: fed93000, Size: d000, Tag: 200
1125 12:21:53.034674 * Base: feda2000, Size: 125e000, Tag: 200
1126 12:21:53.041056 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1127 12:21:53.047737 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1128 12:21:53.054344 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1129 12:21:53.061270 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1130 12:21:53.067906 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1131 12:21:53.074611 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1132 12:21:53.081242 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1133 12:21:53.087695 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1134 12:21:53.094392 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1135 12:21:53.101150 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1136 12:21:53.107450 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1137 12:21:53.114155 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1138 12:21:53.121014 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1139 12:21:53.127521 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1140 12:21:53.133887 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1141 12:21:53.140733 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1142 12:21:53.147421 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1143 12:21:53.154106 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1144 12:21:53.160437 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1145 12:21:53.167154 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1146 12:21:53.173956 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1147 12:21:53.180792 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1148 12:21:53.187084 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1149 12:21:53.190271 Root Device assign_resources, bus 0 link: 0
1150 12:21:53.197184 DOMAIN: 0000 assign_resources, bus 0 link: 0
1151 12:21:53.203549 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1152 12:21:53.213374 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1153 12:21:53.220148 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1154 12:21:53.229977 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1155 12:21:53.233231 PCI: 00:04.0 assign_resources, bus 1 link: 0
1156 12:21:53.236774 PCI: 00:04.0 assign_resources, bus 1 link: 0
1157 12:21:53.246717 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1158 12:21:53.249933 PCI: 00:05.0 assign_resources, bus 2 link: 0
1159 12:21:53.256312 PCI: 00:05.0 assign_resources, bus 2 link: 0
1160 12:21:53.263581 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1161 12:21:53.270366 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1162 12:21:53.277271 PCI: 00:14.0 assign_resources, bus 0 link: 0
1163 12:21:53.280572 PCI: 00:14.0 assign_resources, bus 0 link: 0
1164 12:21:53.287180 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1165 12:21:53.293605 PCI: 00:14.3 assign_resources, bus 0 link: 0
1166 12:21:53.297222 PCI: 00:14.3 assign_resources, bus 0 link: 0
1167 12:21:53.306868 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1168 12:21:53.313875 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1169 12:21:53.316795 PCI: 00:15.0 assign_resources, bus 0 link: 0
1170 12:21:53.323462 PCI: 00:15.0 assign_resources, bus 0 link: 0
1171 12:21:53.330495 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1172 12:21:53.340637 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1173 12:21:53.343768 PCI: 00:15.2 assign_resources, bus 0 link: 0
1174 12:21:53.346989 PCI: 00:15.2 assign_resources, bus 0 link: 0
1175 12:21:53.357298 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1176 12:21:53.360257 PCI: 00:15.3 assign_resources, bus 0 link: 0
1177 12:21:53.367123 PCI: 00:15.3 assign_resources, bus 0 link: 0
1178 12:21:53.373845 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1179 12:21:53.383512 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1180 12:21:53.387030 PCI: 00:19.0 assign_resources, bus 0 link: 0
1181 12:21:53.390238 PCI: 00:19.0 assign_resources, bus 0 link: 0
1182 12:21:53.400076 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1183 12:21:53.407029 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1184 12:21:53.416732 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1185 12:21:53.420543 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1186 12:21:53.423808 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1187 12:21:53.430194 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1188 12:21:53.433868 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1189 12:21:53.440402 LPC: Trying to open IO window from 800 size 1ff
1190 12:21:53.446884 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1191 12:21:53.457047 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1192 12:21:53.460161 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1193 12:21:53.463795 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1194 12:21:53.473747 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1195 12:21:53.476863 DOMAIN: 0000 assign_resources, bus 0 link: 0
1196 12:21:53.483378 Root Device assign_resources, bus 0 link: 0
1197 12:21:53.483836 Done setting resources.
1198 12:21:53.489923 Show resources in subtree (Root Device)...After assigning values.
1199 12:21:53.496806 Root Device child on link 0 CPU_CLUSTER: 0
1200 12:21:53.500041 CPU_CLUSTER: 0 child on link 0 APIC: 00
1201 12:21:53.500521 APIC: 00
1202 12:21:53.503389 APIC: 02
1203 12:21:53.506616 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1204 12:21:53.516589 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1205 12:21:53.526678 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1206 12:21:53.527107 PCI: 00:00.0
1207 12:21:53.536456 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 12:21:53.546408 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1209 12:21:53.556793 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1210 12:21:53.566492 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1211 12:21:53.572908 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1212 12:21:53.582973 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1213 12:21:53.593075 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1214 12:21:53.603270 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1215 12:21:53.613113 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1216 12:21:53.619646 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1217 12:21:53.629428 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1218 12:21:53.639592 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1219 12:21:53.649413 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1220 12:21:53.656305 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1221 12:21:53.665907 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1222 12:21:53.676309 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1223 12:21:53.686152 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1224 12:21:53.695831 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1225 12:21:53.705990 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1226 12:21:53.706467 PCI: 00:02.0
1227 12:21:53.715881 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1228 12:21:53.729024 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1229 12:21:53.736133 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1230 12:21:53.742394 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1231 12:21:53.752523 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1232 12:21:53.752990 GENERIC: 0.0
1233 12:21:53.758913 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1234 12:21:53.768891 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1235 12:21:53.772215 GENERIC: 0.0
1236 12:21:53.772694 PCI: 00:08.0
1237 12:21:53.782624 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1238 12:21:53.785914 PCI: 00:14.0 child on link 0 USB0 port 0
1239 12:21:53.798868 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1240 12:21:53.802445 USB0 port 0 child on link 0 USB2 port 0
1241 12:21:53.802937 USB2 port 0
1242 12:21:53.805703 USB2 port 1
1243 12:21:53.806192 USB2 port 2
1244 12:21:53.809079 USB2 port 3
1245 12:21:53.812304 USB2 port 4
1246 12:21:53.812745 USB2 port 5
1247 12:21:53.815461 USB2 port 6
1248 12:21:53.815909 USB2 port 7
1249 12:21:53.818968 USB3 port 0
1250 12:21:53.819415 USB3 port 1
1251 12:21:53.822259 USB3 port 2
1252 12:21:53.822701 USB3 port 3
1253 12:21:53.825800 PCI: 00:14.2
1254 12:21:53.828898 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1255 12:21:53.838556 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1256 12:21:53.841748 GENERIC: 0.0
1257 12:21:53.842189 PCI: 00:14.5
1258 12:21:53.852110 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1259 12:21:53.858326 PCI: 00:15.0 child on link 0 I2C: 00:2c
1260 12:21:53.868491 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1261 12:21:53.869051 I2C: 00:2c
1262 12:21:53.871595 I2C: 00:15
1263 12:21:53.872038 PCI: 00:15.1
1264 12:21:53.881823 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1265 12:21:53.888209 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1266 12:21:53.898172 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1267 12:21:53.898623 GENERIC: 0.0
1268 12:21:53.901531 I2C: 00:15
1269 12:21:53.901976 I2C: 00:10
1270 12:21:53.904755 I2C: 00:10
1271 12:21:53.905302 I2C: 00:2c
1272 12:21:53.908444 I2C: 00:40
1273 12:21:53.908883 I2C: 00:10
1274 12:21:53.911490 I2C: 00:39
1275 12:21:53.915273 PCI: 00:15.3 child on link 0 I2C: 00:36
1276 12:21:53.925198 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1277 12:21:53.928497 I2C: 00:36
1278 12:21:53.928937 I2C: 00:10
1279 12:21:53.929287 I2C: 00:0c
1280 12:21:53.931389 I2C: 00:50
1281 12:21:53.931849 PCI: 00:16.0
1282 12:21:53.944620 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1283 12:21:53.948335 PCI: 00:19.0 child on link 0 I2C: 00:1a
1284 12:21:53.958220 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1285 12:21:53.958669 I2C: 00:1a
1286 12:21:53.961251 I2C: 00:1a
1287 12:21:53.961733 I2C: 00:1a
1288 12:21:53.964907 I2C: 00:28
1289 12:21:53.965498 I2C: 00:29
1290 12:21:53.968035 PCI: 00:19.2
1291 12:21:53.978188 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1292 12:21:53.988122 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1293 12:21:53.991251 PCI: 00:1a.0
1294 12:21:54.001067 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1295 12:21:54.001530 PCI: 00:1e.0
1296 12:21:54.007909 PCI: 00:1e.2 child on link 0 SPI: 00
1297 12:21:54.017675 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1298 12:21:54.018145 SPI: 00
1299 12:21:54.021031 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1300 12:21:54.031109 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1301 12:21:54.031568 PNP: 0c09.0
1302 12:21:54.041363 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1303 12:21:54.044733 PCI: 00:1f.2
1304 12:21:54.051160 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1305 12:21:54.060932 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1306 12:21:54.067338 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1307 12:21:54.077763 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1308 12:21:54.087390 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1309 12:21:54.087944 GENERIC: 0.0
1310 12:21:54.090420 PCI: 00:1f.5
1311 12:21:54.100777 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1312 12:21:54.104070 Done allocating resources.
1313 12:21:54.111190 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2099 ms
1314 12:21:54.111644 Enabling resources...
1315 12:21:54.117562 PCI: 00:00.0 subsystem <- 8086/4e22
1316 12:21:54.118022 PCI: 00:00.0 cmd <- 06
1317 12:21:54.121167 PCI: 00:02.0 subsystem <- 8086/4e55
1318 12:21:54.124017 PCI: 00:02.0 cmd <- 03
1319 12:21:54.127328 PCI: 00:04.0 subsystem <- 8086/4e03
1320 12:21:54.130863 PCI: 00:04.0 cmd <- 02
1321 12:21:54.134094 PCI: 00:05.0 bridge ctrl <- 0003
1322 12:21:54.137550 PCI: 00:05.0 subsystem <- 8086/4e19
1323 12:21:54.140950 PCI: 00:05.0 cmd <- 02
1324 12:21:54.143795 PCI: 00:08.0 cmd <- 06
1325 12:21:54.147799 PCI: 00:14.0 subsystem <- 8086/4ded
1326 12:21:54.148365 PCI: 00:14.0 cmd <- 02
1327 12:21:54.154306 PCI: 00:14.3 subsystem <- 8086/4df0
1328 12:21:54.154874 PCI: 00:14.3 cmd <- 02
1329 12:21:54.157437 PCI: 00:14.5 subsystem <- 8086/4df8
1330 12:21:54.160695 PCI: 00:14.5 cmd <- 06
1331 12:21:54.164107 PCI: 00:15.0 subsystem <- 8086/4de8
1332 12:21:54.167519 PCI: 00:15.0 cmd <- 02
1333 12:21:54.170619 PCI: 00:15.1 subsystem <- 8086/4de9
1334 12:21:54.173871 PCI: 00:15.1 cmd <- 02
1335 12:21:54.177336 PCI: 00:15.2 subsystem <- 8086/4dea
1336 12:21:54.180715 PCI: 00:15.2 cmd <- 02
1337 12:21:54.184159 PCI: 00:15.3 subsystem <- 8086/4deb
1338 12:21:54.187566 PCI: 00:15.3 cmd <- 02
1339 12:21:54.190945 PCI: 00:16.0 subsystem <- 8086/4de0
1340 12:21:54.191405 PCI: 00:16.0 cmd <- 02
1341 12:21:54.197054 PCI: 00:19.0 subsystem <- 8086/4dc5
1342 12:21:54.197548 PCI: 00:19.0 cmd <- 02
1343 12:21:54.200260 PCI: 00:19.2 subsystem <- 8086/4dc7
1344 12:21:54.203967 PCI: 00:19.2 cmd <- 06
1345 12:21:54.207303 PCI: 00:1a.0 subsystem <- 8086/4dc4
1346 12:21:54.210511 PCI: 00:1a.0 cmd <- 06
1347 12:21:54.213527 PCI: 00:1e.2 subsystem <- 8086/4daa
1348 12:21:54.216960 PCI: 00:1e.2 cmd <- 06
1349 12:21:54.220139 PCI: 00:1f.0 subsystem <- 8086/4d87
1350 12:21:54.223965 PCI: 00:1f.0 cmd <- 407
1351 12:21:54.226757 PCI: 00:1f.3 subsystem <- 8086/4dc8
1352 12:21:54.230156 PCI: 00:1f.3 cmd <- 02
1353 12:21:54.233565 PCI: 00:1f.5 subsystem <- 8086/4da4
1354 12:21:54.234022 PCI: 00:1f.5 cmd <- 406
1355 12:21:54.239528 done.
1356 12:21:54.242482 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1357 12:21:54.245614 Initializing devices...
1358 12:21:54.248979 Root Device init
1359 12:21:54.249420 mainboard: EC init
1360 12:21:54.255610 Chrome EC: Set SMI mask to 0x0000000000000000
1361 12:21:54.259181 Chrome EC: clear events_b mask to 0x0000000000000000
1362 12:21:54.265895 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1363 12:21:54.272390 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1364 12:21:54.279011 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1365 12:21:54.282304 Chrome EC: Set WAKE mask to 0x0000000000000000
1366 12:21:54.285592 Root Device init finished in 35 msecs
1367 12:21:54.289852 PCI: 00:00.0 init
1368 12:21:54.293360 CPU TDP = 6 Watts
1369 12:21:54.293839 CPU PL1 = 7 Watts
1370 12:21:54.296721 CPU PL2 = 12 Watts
1371 12:21:54.300013 PCI: 00:00.0 init finished in 6 msecs
1372 12:21:54.303369 PCI: 00:02.0 init
1373 12:21:54.307009 GMA: Found VBT in CBFS
1374 12:21:54.307482 GMA: Found valid VBT in CBFS
1375 12:21:54.313019 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1376 12:21:54.320075 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1377 12:21:54.326751 PCI: 00:02.0 init finished in 18 msecs
1378 12:21:54.327198 PCI: 00:08.0 init
1379 12:21:54.332891 PCI: 00:08.0 init finished in 0 msecs
1380 12:21:54.333333 PCI: 00:14.0 init
1381 12:21:54.339687 XHCI: Updated LFPS sampling OFF time to 9 ms
1382 12:21:54.343407 PCI: 00:14.0 init finished in 4 msecs
1383 12:21:54.346580 PCI: 00:15.0 init
1384 12:21:54.347057 I2C bus 0 version 0x3230302a
1385 12:21:54.353063 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1386 12:21:54.356302 PCI: 00:15.0 init finished in 6 msecs
1387 12:21:54.356751 PCI: 00:15.1 init
1388 12:21:54.359684 I2C bus 1 version 0x3230302a
1389 12:21:54.362867 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1390 12:21:54.366093 PCI: 00:15.1 init finished in 6 msecs
1391 12:21:54.369724 PCI: 00:15.2 init
1392 12:21:54.372912 I2C bus 2 version 0x3230302a
1393 12:21:54.376488 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1394 12:21:54.380117 PCI: 00:15.2 init finished in 6 msecs
1395 12:21:54.383036 PCI: 00:15.3 init
1396 12:21:54.386794 I2C bus 3 version 0x3230302a
1397 12:21:54.389820 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1398 12:21:54.393175 PCI: 00:15.3 init finished in 6 msecs
1399 12:21:54.396249 PCI: 00:16.0 init
1400 12:21:54.400002 PCI: 00:16.0 init finished in 0 msecs
1401 12:21:54.400439 PCI: 00:19.0 init
1402 12:21:54.402945 I2C bus 4 version 0x3230302a
1403 12:21:54.406062 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1404 12:21:54.409842 PCI: 00:19.0 init finished in 6 msecs
1405 12:21:54.413605 PCI: 00:1a.0 init
1406 12:21:54.416905 PCI: 00:1a.0 init finished in 0 msecs
1407 12:21:54.420314 PCI: 00:1f.0 init
1408 12:21:54.423768 IOAPIC: Initializing IOAPIC at 0xfec00000
1409 12:21:54.430195 IOAPIC: Bootstrap Processor Local APIC = 0x00
1410 12:21:54.430758 IOAPIC: ID = 0x02
1411 12:21:54.433573 IOAPIC: Dumping registers
1412 12:21:54.437165 reg 0x0000: 0x02000000
1413 12:21:54.437690 reg 0x0001: 0x00770020
1414 12:21:54.440116 reg 0x0002: 0x00000000
1415 12:21:54.443368 PCI: 00:1f.0 init finished in 21 msecs
1416 12:21:54.446914 PCI: 00:1f.2 init
1417 12:21:54.450561 Disabling ACPI via APMC.
1418 12:21:54.454456 APMC done.
1419 12:21:54.457467 PCI: 00:1f.2 init finished in 5 msecs
1420 12:21:54.467809 PNP: 0c09.0 init
1421 12:21:54.470820 Google Chrome EC uptime: 6.622 seconds
1422 12:21:54.477614 Google Chrome AP resets since EC boot: 0
1423 12:21:54.481204 Google Chrome most recent AP reset causes:
1424 12:21:54.487527 Google Chrome EC reset flags at last EC boot: reset-pin
1425 12:21:54.491205 PNP: 0c09.0 init finished in 18 msecs
1426 12:21:54.491642 Devices initialized
1427 12:21:54.494284 Show all devs... After init.
1428 12:21:54.497724 Root Device: enabled 1
1429 12:21:54.501068 CPU_CLUSTER: 0: enabled 1
1430 12:21:54.504072 DOMAIN: 0000: enabled 1
1431 12:21:54.504703 PCI: 00:00.0: enabled 1
1432 12:21:54.507787 PCI: 00:02.0: enabled 1
1433 12:21:54.510741 PCI: 00:04.0: enabled 1
1434 12:21:54.511203 PCI: 00:05.0: enabled 1
1435 12:21:54.514296 PCI: 00:09.0: enabled 0
1436 12:21:54.517533 PCI: 00:12.6: enabled 0
1437 12:21:54.520590 PCI: 00:14.0: enabled 1
1438 12:21:54.521125 PCI: 00:14.1: enabled 0
1439 12:21:54.524014 PCI: 00:14.2: enabled 0
1440 12:21:54.527577 PCI: 00:14.3: enabled 1
1441 12:21:54.531171 PCI: 00:14.5: enabled 1
1442 12:21:54.531656 PCI: 00:15.0: enabled 1
1443 12:21:54.534234 PCI: 00:15.1: enabled 1
1444 12:21:54.537496 PCI: 00:15.2: enabled 1
1445 12:21:54.541058 PCI: 00:15.3: enabled 1
1446 12:21:54.541603 PCI: 00:16.0: enabled 1
1447 12:21:54.544460 PCI: 00:16.1: enabled 0
1448 12:21:54.547377 PCI: 00:16.4: enabled 0
1449 12:21:54.547864 PCI: 00:16.5: enabled 0
1450 12:21:54.550783 PCI: 00:17.0: enabled 0
1451 12:21:54.554401 PCI: 00:19.0: enabled 1
1452 12:21:54.557473 PCI: 00:19.1: enabled 0
1453 12:21:54.557924 PCI: 00:19.2: enabled 1
1454 12:21:54.560991 PCI: 00:1a.0: enabled 1
1455 12:21:54.564222 PCI: 00:1c.0: enabled 0
1456 12:21:54.567205 PCI: 00:1c.1: enabled 0
1457 12:21:54.567681 PCI: 00:1c.2: enabled 0
1458 12:21:54.570641 PCI: 00:1c.3: enabled 0
1459 12:21:54.573975 PCI: 00:1c.4: enabled 0
1460 12:21:54.577163 PCI: 00:1c.5: enabled 0
1461 12:21:54.577639 PCI: 00:1c.6: enabled 0
1462 12:21:54.580424 PCI: 00:1c.7: enabled 1
1463 12:21:54.583958 PCI: 00:1e.0: enabled 0
1464 12:21:54.584443 PCI: 00:1e.1: enabled 0
1465 12:21:54.587070 PCI: 00:1e.2: enabled 1
1466 12:21:54.590352 PCI: 00:1e.3: enabled 0
1467 12:21:54.593949 PCI: 00:1f.0: enabled 1
1468 12:21:54.594428 PCI: 00:1f.1: enabled 0
1469 12:21:54.597389 PCI: 00:1f.2: enabled 1
1470 12:21:54.600258 PCI: 00:1f.3: enabled 1
1471 12:21:54.603616 PCI: 00:1f.4: enabled 0
1472 12:21:54.604099 PCI: 00:1f.5: enabled 1
1473 12:21:54.607162 PCI: 00:1f.7: enabled 0
1474 12:21:54.610721 GENERIC: 0.0: enabled 1
1475 12:21:54.613874 GENERIC: 0.0: enabled 1
1476 12:21:54.614333 USB0 port 0: enabled 1
1477 12:21:54.617432 GENERIC: 0.0: enabled 1
1478 12:21:54.620520 I2C: 00:2c: enabled 1
1479 12:21:54.620964 I2C: 00:15: enabled 1
1480 12:21:54.623600 GENERIC: 0.0: enabled 0
1481 12:21:54.627194 I2C: 00:15: enabled 1
1482 12:21:54.627638 I2C: 00:10: enabled 0
1483 12:21:54.630709 I2C: 00:10: enabled 0
1484 12:21:54.633495 I2C: 00:2c: enabled 1
1485 12:21:54.633944 I2C: 00:40: enabled 1
1486 12:21:54.637086 I2C: 00:10: enabled 1
1487 12:21:54.640824 I2C: 00:39: enabled 1
1488 12:21:54.641278 I2C: 00:36: enabled 1
1489 12:21:54.643643 I2C: 00:10: enabled 0
1490 12:21:54.646848 I2C: 00:0c: enabled 1
1491 12:21:54.647301 I2C: 00:50: enabled 1
1492 12:21:54.650645 I2C: 00:1a: enabled 1
1493 12:21:54.654018 I2C: 00:1a: enabled 0
1494 12:21:54.654476 I2C: 00:1a: enabled 0
1495 12:21:54.657048 I2C: 00:28: enabled 1
1496 12:21:54.660486 I2C: 00:29: enabled 1
1497 12:21:54.663702 PCI: 00:00.0: enabled 1
1498 12:21:54.664195 SPI: 00: enabled 1
1499 12:21:54.666789 PNP: 0c09.0: enabled 1
1500 12:21:54.670380 GENERIC: 0.0: enabled 0
1501 12:21:54.670839 USB2 port 0: enabled 1
1502 12:21:54.673541 USB2 port 1: enabled 1
1503 12:21:54.677116 USB2 port 2: enabled 1
1504 12:21:54.677608 USB2 port 3: enabled 1
1505 12:21:54.680143 USB2 port 4: enabled 0
1506 12:21:54.683585 USB2 port 5: enabled 1
1507 12:21:54.687437 USB2 port 6: enabled 0
1508 12:21:54.687891 USB2 port 7: enabled 1
1509 12:21:54.689960 USB3 port 0: enabled 1
1510 12:21:54.693548 USB3 port 1: enabled 1
1511 12:21:54.694065 USB3 port 2: enabled 1
1512 12:21:54.696784 USB3 port 3: enabled 1
1513 12:21:54.700216 APIC: 00: enabled 1
1514 12:21:54.700674 APIC: 02: enabled 1
1515 12:21:54.703302 PCI: 00:08.0: enabled 1
1516 12:21:54.710280 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1517 12:21:54.713579 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1518 12:21:54.716725 ELOG: NV offset 0xbfa000 size 0x1000
1519 12:21:54.724349 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1520 12:21:54.730980 ELOG: Event(17) added with size 13 at 2023-03-13 12:21:54 UTC
1521 12:21:54.737594 ELOG: Event(92) added with size 9 at 2023-03-13 12:21:54 UTC
1522 12:21:54.744577 ELOG: Event(93) added with size 9 at 2023-03-13 12:21:54 UTC
1523 12:21:54.751303 ELOG: Event(9E) added with size 10 at 2023-03-13 12:21:54 UTC
1524 12:21:54.757910 ELOG: Event(9F) added with size 14 at 2023-03-13 12:21:54 UTC
1525 12:21:54.761266 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1526 12:21:54.768060 ELOG: Event(A1) added with size 10 at 2023-03-13 12:21:54 UTC
1527 12:21:54.777589 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1528 12:21:54.784242 ELOG: Event(A0) added with size 9 at 2023-03-13 12:21:54 UTC
1529 12:21:54.787954 elog_add_boot_reason: Logged dev mode boot
1530 12:21:54.794167 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1531 12:21:54.794640 Finalize devices...
1532 12:21:54.797564 Devices finalized
1533 12:21:54.801270 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1534 12:21:54.807657 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1535 12:21:54.814327 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1536 12:21:54.817476 ME: HFSTS1 : 0x80030045
1537 12:21:54.821087 ME: HFSTS2 : 0x30280136
1538 12:21:54.824467 ME: HFSTS3 : 0x00000050
1539 12:21:54.830718 ME: HFSTS4 : 0x00004000
1540 12:21:54.834307 ME: HFSTS5 : 0x00000000
1541 12:21:54.837527 ME: HFSTS6 : 0x40400006
1542 12:21:54.840615 ME: Manufacturing Mode : NO
1543 12:21:54.844312 ME: FW Partition Table : OK
1544 12:21:54.847371 ME: Bringup Loader Failure : NO
1545 12:21:54.850858 ME: Firmware Init Complete : NO
1546 12:21:54.854292 ME: Boot Options Present : NO
1547 12:21:54.857493 ME: Update In Progress : NO
1548 12:21:54.860745 ME: D0i3 Support : YES
1549 12:21:54.864244 ME: Low Power State Enabled : NO
1550 12:21:54.867289 ME: CPU Replaced : YES
1551 12:21:54.870997 ME: CPU Replacement Valid : YES
1552 12:21:54.874008 ME: Current Working State : 5
1553 12:21:54.877000 ME: Current Operation State : 1
1554 12:21:54.880675 ME: Current Operation Mode : 3
1555 12:21:54.883924 ME: Error Code : 0
1556 12:21:54.887090 ME: CPU Debug Disabled : YES
1557 12:21:54.890598 ME: TXT Support : NO
1558 12:21:54.896837 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1559 12:21:54.903760 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1560 12:21:54.906898 ACPI: Writing ACPI tables at 76b27000.
1561 12:21:54.907517 ACPI: * FACS
1562 12:21:54.910052 ACPI: * DSDT
1563 12:21:54.913565 Ramoops buffer: 0x100000@0x76a26000.
1564 12:21:54.916995 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1565 12:21:54.923657 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1566 12:21:54.927096 Google Chrome EC: version:
1567 12:21:54.930141 ro: magolor_1.1.9999-103b6f9
1568 12:21:54.933782 rw: magolor_1.1.9999-103b6f9
1569 12:21:54.934218 running image: 1
1570 12:21:54.940377 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1571 12:21:54.943866 ACPI: * FADT
1572 12:21:54.944303 SCI is IRQ9
1573 12:21:54.950683 ACPI: added table 1/32, length now 40
1574 12:21:54.951245 ACPI: * SSDT
1575 12:21:54.953762 Found 1 CPU(s) with 2 core(s) each.
1576 12:21:54.957298 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1577 12:21:54.964096 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1578 12:21:54.967183 Could not locate 'wifi_sar' in VPD.
1579 12:21:54.970395 Checking CBFS for default SAR values
1580 12:21:54.977108 wifi_sar_defaults.hex has bad len in CBFS
1581 12:21:54.980628 failed from getting SAR limits!
1582 12:21:54.983838 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1583 12:21:54.987294 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1584 12:21:54.994147 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1585 12:21:55.000325 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1586 12:21:55.003813 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1587 12:21:55.010591 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1588 12:21:55.013620 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1589 12:21:55.020551 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1590 12:21:55.027293 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1591 12:21:55.030571 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1592 12:21:55.036821 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1593 12:21:55.043906 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1594 12:21:55.046949 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1595 12:21:55.053540 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1596 12:21:55.056950 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1597 12:21:55.065532 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1598 12:21:55.068774 PS2K: Passing 101 keymaps to kernel
1599 12:21:55.075604 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1600 12:21:55.082256 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1601 12:21:55.085380 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1602 12:21:55.091809 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1603 12:21:55.095206 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1604 12:21:55.102053 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1605 12:21:55.108627 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1606 12:21:55.115329 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1607 12:21:55.118388 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1608 12:21:55.125183 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1609 12:21:55.128596 ACPI: added table 2/32, length now 44
1610 12:21:55.132021 ACPI: * MCFG
1611 12:21:55.134983 ACPI: added table 3/32, length now 48
1612 12:21:55.135429 ACPI: * TPM2
1613 12:21:55.138554 TPM2 log created at 0x76a16000
1614 12:21:55.142097 ACPI: added table 4/32, length now 52
1615 12:21:55.144980 ACPI: * MADT
1616 12:21:55.145426 SCI is IRQ9
1617 12:21:55.148500 ACPI: added table 5/32, length now 56
1618 12:21:55.152082 current = 76b2d580
1619 12:21:55.155108 ACPI: * DMAR
1620 12:21:55.158530 ACPI: added table 6/32, length now 60
1621 12:21:55.162251 ACPI: added table 7/32, length now 64
1622 12:21:55.162697 ACPI: * HPET
1623 12:21:55.165371 ACPI: added table 8/32, length now 68
1624 12:21:55.168897 ACPI: done.
1625 12:21:55.171822 ACPI tables: 26304 bytes.
1626 12:21:55.174910 smbios_write_tables: 76a15000
1627 12:21:55.178328 EC returned error result code 3
1628 12:21:55.181923 Couldn't obtain OEM name from CBI
1629 12:21:55.182394 Create SMBIOS type 16
1630 12:21:55.185135 Create SMBIOS type 17
1631 12:21:55.188451 GENERIC: 0.0 (WIFI Device)
1632 12:21:55.192049 SMBIOS tables: 913 bytes.
1633 12:21:55.195435 Writing table forward entry at 0x00000500
1634 12:21:55.201930 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1635 12:21:55.204904 Writing coreboot table at 0x76b4b000
1636 12:21:55.211738 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1637 12:21:55.215123 1. 0000000000001000-000000000009ffff: RAM
1638 12:21:55.221349 2. 00000000000a0000-00000000000fffff: RESERVED
1639 12:21:55.224780 3. 0000000000100000-0000000076a14fff: RAM
1640 12:21:55.231915 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1641 12:21:55.234959 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1642 12:21:55.241400 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1643 12:21:55.244871 7. 0000000077000000-000000007fbfffff: RESERVED
1644 12:21:55.251512 8. 00000000c0000000-00000000cfffffff: RESERVED
1645 12:21:55.254840 9. 00000000fb000000-00000000fb000fff: RESERVED
1646 12:21:55.261544 10. 00000000fe000000-00000000fe00ffff: RESERVED
1647 12:21:55.264818 11. 00000000fea80000-00000000fea87fff: RESERVED
1648 12:21:55.268444 12. 00000000fed80000-00000000fed87fff: RESERVED
1649 12:21:55.274996 13. 00000000fed90000-00000000fed92fff: RESERVED
1650 12:21:55.277905 14. 00000000feda0000-00000000feda1fff: RESERVED
1651 12:21:55.284468 15. 0000000100000000-00000001803fffff: RAM
1652 12:21:55.284970 Passing 4 GPIOs to payload:
1653 12:21:55.291119 NAME | PORT | POLARITY | VALUE
1654 12:21:55.297801 lid | undefined | high | high
1655 12:21:55.300837 power | undefined | high | low
1656 12:21:55.307890 oprom | undefined | high | low
1657 12:21:55.311186 EC in RW | 0x000000b9 | high | low
1658 12:21:55.317873 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum aa5
1659 12:21:55.320969 coreboot table: 1504 bytes.
1660 12:21:55.324792 IMD ROOT 0. 0x76fff000 0x00001000
1661 12:21:55.327662 IMD SMALL 1. 0x76ffe000 0x00001000
1662 12:21:55.330826 FSP MEMORY 2. 0x76c4e000 0x003b0000
1663 12:21:55.337745 CONSOLE 3. 0x76c2e000 0x00020000
1664 12:21:55.340660 FMAP 4. 0x76c2d000 0x00000578
1665 12:21:55.344256 TIME STAMP 5. 0x76c2c000 0x00000910
1666 12:21:55.347726 VBOOT WORK 6. 0x76c18000 0x00014000
1667 12:21:55.350851 ROMSTG STCK 7. 0x76c17000 0x00001000
1668 12:21:55.354346 AFTER CAR 8. 0x76c0d000 0x0000a000
1669 12:21:55.357526 RAMSTAGE 9. 0x76ba7000 0x00066000
1670 12:21:55.360645 REFCODE 10. 0x76b67000 0x00040000
1671 12:21:55.367376 SMM BACKUP 11. 0x76b57000 0x00010000
1672 12:21:55.371016 4f444749 12. 0x76b55000 0x00002000
1673 12:21:55.374363 EXT VBT13. 0x76b53000 0x00001c43
1674 12:21:55.377397 COREBOOT 14. 0x76b4b000 0x00008000
1675 12:21:55.380918 ACPI 15. 0x76b27000 0x00024000
1676 12:21:55.384310 ACPI GNVS 16. 0x76b26000 0x00001000
1677 12:21:55.387697 RAMOOPS 17. 0x76a26000 0x00100000
1678 12:21:55.391603 TPM2 TCGLOG18. 0x76a16000 0x00010000
1679 12:21:55.394332 SMBIOS 19. 0x76a15000 0x00000800
1680 12:21:55.397823 IMD small region:
1681 12:21:55.401358 IMD ROOT 0. 0x76ffec00 0x00000400
1682 12:21:55.404549 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1683 12:21:55.407983 VPD 2. 0x76ffeb80 0x0000004c
1684 12:21:55.414072 POWER STATE 3. 0x76ffeb40 0x00000040
1685 12:21:55.417847 ROMSTAGE 4. 0x76ffeb20 0x00000004
1686 12:21:55.421125 MEM INFO 5. 0x76ffe940 0x000001e0
1687 12:21:55.427457 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1688 12:21:55.431019 MTRR: Physical address space:
1689 12:21:55.438089 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1690 12:21:55.440830 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1691 12:21:55.447509 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1692 12:21:55.453905 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1693 12:21:55.460814 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1694 12:21:55.467332 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1695 12:21:55.473860 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1696 12:21:55.477321 MTRR: Fixed MSR 0x250 0x0606060606060606
1697 12:21:55.480652 MTRR: Fixed MSR 0x258 0x0606060606060606
1698 12:21:55.484078 MTRR: Fixed MSR 0x259 0x0000000000000000
1699 12:21:55.491246 MTRR: Fixed MSR 0x268 0x0606060606060606
1700 12:21:55.493967 MTRR: Fixed MSR 0x269 0x0606060606060606
1701 12:21:55.497358 MTRR: Fixed MSR 0x26a 0x0606060606060606
1702 12:21:55.500628 MTRR: Fixed MSR 0x26b 0x0606060606060606
1703 12:21:55.507294 MTRR: Fixed MSR 0x26c 0x0606060606060606
1704 12:21:55.510761 MTRR: Fixed MSR 0x26d 0x0606060606060606
1705 12:21:55.514380 MTRR: Fixed MSR 0x26e 0x0606060606060606
1706 12:21:55.517578 MTRR: Fixed MSR 0x26f 0x0606060606060606
1707 12:21:55.520484 call enable_fixed_mtrr()
1708 12:21:55.523909 CPU physical address size: 39 bits
1709 12:21:55.530570 MTRR: default type WB/UC MTRR counts: 6/5.
1710 12:21:55.534240 MTRR: UC selected as default type.
1711 12:21:55.540255 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1712 12:21:55.543609 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1713 12:21:55.550044 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1714 12:21:55.556939 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1715 12:21:55.563409 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1716 12:21:55.563499
1717 12:21:55.566483 MTRR check
1718 12:21:55.566568 Fixed MTRRs : Enabled
1719 12:21:55.570078 Variable MTRRs: Enabled
1720 12:21:55.570163
1721 12:21:55.573774 MTRR: Fixed MSR 0x250 0x0606060606060606
1722 12:21:55.579995 MTRR: Fixed MSR 0x258 0x0606060606060606
1723 12:21:55.583592 MTRR: Fixed MSR 0x259 0x0000000000000000
1724 12:21:55.586725 MTRR: Fixed MSR 0x268 0x0606060606060606
1725 12:21:55.590296 MTRR: Fixed MSR 0x269 0x0606060606060606
1726 12:21:55.596572 MTRR: Fixed MSR 0x26a 0x0606060606060606
1727 12:21:55.599823 MTRR: Fixed MSR 0x26b 0x0606060606060606
1728 12:21:55.603221 MTRR: Fixed MSR 0x26c 0x0606060606060606
1729 12:21:55.606402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1730 12:21:55.610021 MTRR: Fixed MSR 0x26e 0x0606060606060606
1731 12:21:55.616614 MTRR: Fixed MSR 0x26f 0x0606060606060606
1732 12:21:55.623026 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1733 12:21:55.623187 call enable_fixed_mtrr()
1734 12:21:55.627524 Checking cr50 for pending updates
1735 12:21:55.631348 CPU physical address size: 39 bits
1736 12:21:55.634849 Reading cr50 TPM mode
1737 12:21:55.644678 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1738 12:21:55.652342 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1739 12:21:55.655874 Checking segment from ROM address 0xfff9d5b8
1740 12:21:55.662165 Checking segment from ROM address 0xfff9d5d4
1741 12:21:55.665348 Loading segment from ROM address 0xfff9d5b8
1742 12:21:55.669002 code (compression=0)
1743 12:21:55.675605 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1744 12:21:55.685492 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1745 12:21:55.688627 it's not compressed!
1746 12:21:55.813779 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1747 12:21:55.820032 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1748 12:21:55.827451 Loading segment from ROM address 0xfff9d5d4
1749 12:21:55.830933 Entry Point 0x30000000
1750 12:21:55.831379 Loaded segments
1751 12:21:55.837307 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1752 12:21:55.854186 Finalizing chipset.
1753 12:21:55.856871 Finalizing SMM.
1754 12:21:55.857315 APMC done.
1755 12:21:55.863726 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1756 12:21:55.867121 mp_park_aps done after 0 msecs.
1757 12:21:55.870245 Jumping to boot code at 0x30000000(0x76b4b000)
1758 12:21:55.880202 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1759 12:21:55.880661
1760 12:21:55.881083
1761 12:21:55.881530
1762 12:21:55.883970 Starting depthcharge on Magolor...
1763 12:21:55.884444
1764 12:21:55.885427 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1765 12:21:55.886156 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1766 12:21:55.886632 Setting prompt string to ['dedede:']
1767 12:21:55.887064 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1768 12:21:55.893495 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1769 12:21:55.893985
1770 12:21:55.900228 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1771 12:21:55.900708
1772 12:21:55.903976 fw_config match found: AUDIO_AMP=UNPROVISIONED
1773 12:21:55.904491
1774 12:21:55.907016 Wipe memory regions:
1775 12:21:55.907620
1776 12:21:55.910062 [0x00000000001000, 0x000000000a0000)
1777 12:21:55.910503
1778 12:21:55.913373 [0x00000000100000, 0x00000030000000)
1779 12:21:56.042244
1780 12:21:56.045520 [0x00000031062170, 0x00000076a15000)
1781 12:21:56.214572
1782 12:21:56.218021 [0x00000100000000, 0x00000180400000)
1783 12:21:57.281909
1784 12:21:57.282434 R8152: Initializing
1785 12:21:57.282782
1786 12:21:57.284836 Version 6 (ocp_data = 5c30)
1787 12:21:57.287970
1788 12:21:57.288409 R8152: Done initializing
1789 12:21:57.288755
1790 12:21:57.292023 Adding net device
1791 12:21:57.292461
1792 12:21:57.294818 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1793 12:21:57.298030
1794 12:21:57.298488
1795 12:21:57.298838
1796 12:21:57.299564 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1798 12:21:57.401104 dedede: tftpboot 192.168.201.1 9584201/tftp-deploy-pvq1_yyk/kernel/bzImage 9584201/tftp-deploy-pvq1_yyk/kernel/cmdline 9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
1799 12:21:57.401703 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1800 12:21:57.402118 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1801 12:21:57.406205 tftpboot 192.168.201.1 9584201/tftp-deploy-pvq1_yyk/kernel/bzImoy-pvq1_yyk/kernel/cmdline 9584201/tftp-deploy-pvq1_yyk/ramdisk/ramdisk.cpio.gz
1802 12:21:57.406669
1803 12:21:57.407016 Waiting for link
1804 12:21:57.608462
1805 12:21:57.608969 done.
1806 12:21:57.609317
1807 12:21:57.609700 MAC: 00:24:32:30:7b:58
1808 12:21:57.610020
1809 12:21:57.611408 Sending DHCP discover... done.
1810 12:21:57.611847
1811 12:21:57.614884 Waiting for reply... done.
1812 12:21:57.615343
1813 12:21:57.618525 Sending DHCP request... done.
1814 12:21:57.619013
1815 12:21:57.624790 Waiting for reply... done.
1816 12:21:57.625226
1817 12:21:57.625621 My ip is 192.168.201.13
1818 12:21:57.625955
1819 12:21:57.628629 The DHCP server ip is 192.168.201.1
1820 12:21:57.631803
1821 12:21:57.635177 TFTP server IP predefined by user: 192.168.201.1
1822 12:21:57.635615
1823 12:21:57.642332 Bootfile predefined by user: 9584201/tftp-deploy-pvq1_yyk/kernel/bzImage
1824 12:21:57.642778
1825 12:21:57.645036 Sending tftp read request... done.
1826 12:21:57.645502
1827 12:21:57.652040 Waiting for the transfer...
1828 12:21:57.652481
1829 12:21:58.247702 00000000 ################################################################
1830 12:21:58.247865
1831 12:21:58.834802 00080000 ################################################################
1832 12:21:58.834951
1833 12:21:59.434805 00100000 ################################################################
1834 12:21:59.434954
1835 12:22:00.044178 00180000 ################################################################
1836 12:22:00.044325
1837 12:22:00.653802 00200000 ################################################################
1838 12:22:00.653948
1839 12:22:01.297443 00280000 ################################################################
1840 12:22:01.297593
1841 12:22:01.906017 00300000 ################################################################
1842 12:22:01.906163
1843 12:22:02.530605 00380000 ################################################################
1844 12:22:02.530752
1845 12:22:03.158297 00400000 ################################################################
1846 12:22:03.158446
1847 12:22:03.792458 00480000 ################################################################
1848 12:22:03.792607
1849 12:22:04.427517 00500000 ################################################################
1850 12:22:04.427674
1851 12:22:05.056397 00580000 ################################################################
1852 12:22:05.056548
1853 12:22:05.696588 00600000 ################################################################
1854 12:22:05.696737
1855 12:22:06.341329 00680000 ################################################################
1856 12:22:06.341521
1857 12:22:06.965754 00700000 ################################################################
1858 12:22:06.965899
1859 12:22:07.603885 00780000 ################################################################
1860 12:22:07.604031
1861 12:22:08.226711 00800000 ################################################################
1862 12:22:08.226860
1863 12:22:08.852667 00880000 ################################################################
1864 12:22:08.852813
1865 12:22:09.310425 00900000 ################################################ done.
1866 12:22:09.310564
1867 12:22:09.313600 The bootfile was 9826304 bytes long.
1868 12:22:09.313711
1869 12:22:09.316965 Sending tftp read request... done.
1870 12:22:09.317042
1871 12:22:09.320028 Waiting for the transfer...
1872 12:22:09.320105
1873 12:22:09.928266 00000000 ################################################################
1874 12:22:09.928405
1875 12:22:10.570804 00080000 ################################################################
1876 12:22:10.570946
1877 12:22:11.177159 00100000 ################################################################
1878 12:22:11.177298
1879 12:22:11.763713 00180000 ################################################################
1880 12:22:11.763850
1881 12:22:12.395994 00200000 ################################################################
1882 12:22:12.396147
1883 12:22:13.025637 00280000 ################################################################
1884 12:22:13.025786
1885 12:22:13.642020 00300000 ################################################################
1886 12:22:13.642179
1887 12:22:14.273316 00380000 ################################################################
1888 12:22:14.273477
1889 12:22:14.926346 00400000 ################################################################
1890 12:22:14.926933
1891 12:22:15.602148 00480000 ################################################################
1892 12:22:15.602669
1893 12:22:16.273023 00500000 ################################################################
1894 12:22:16.273608
1895 12:22:16.723325 00580000 ########################################### done.
1896 12:22:16.723942
1897 12:22:16.726672 Sending tftp read request... done.
1898 12:22:16.727295
1899 12:22:16.730115 Waiting for the transfer...
1900 12:22:16.730656
1901 12:22:16.731012 00000000 # done.
1902 12:22:16.731351
1903 12:22:16.739743 Command line loaded dynamically from TFTP file: 9584201/tftp-deploy-pvq1_yyk/kernel/cmdline
1904 12:22:16.740313
1905 12:22:16.763112 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9584201/extract-nfsrootfs-aok6zf4_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1906 12:22:16.763635
1907 12:22:16.766055 ec_init: CrosEC protocol v3 supported (256, 256)
1908 12:22:16.773048
1909 12:22:16.776814 Shutting down all USB controllers.
1910 12:22:16.777341
1911 12:22:16.777732 Removing current net device
1912 12:22:16.778064
1913 12:22:16.779646 Finalizing coreboot
1914 12:22:16.780084
1915 12:22:16.786103 Exiting depthcharge with code 4 at timestamp: 27730638
1916 12:22:16.786636
1917 12:22:16.786982
1918 12:22:16.787307 Starting kernel ...
1919 12:22:16.787615
1920 12:22:16.787913
1921 12:22:16.789111 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
1922 12:22:16.789651 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
1923 12:22:16.790035 Setting prompt string to ['Linux version [0-9]']
1924 12:22:16.790390 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1925 12:22:16.790752 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1927 12:26:42.790429 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
1929 12:26:42.791477 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
1931 12:26:42.792290 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1934 12:26:42.793847 end: 2 depthcharge-action (duration 00:05:00) [common]
1936 12:26:42.794913 Cleaning after the job
1937 12:26:42.795008 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/ramdisk
1938 12:26:42.795487 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/kernel
1939 12:26:42.796138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/nfsrootfs
1940 12:26:42.828397 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584201/tftp-deploy-pvq1_yyk/modules
1941 12:26:42.828866 start: 5.1 power-off (timeout 00:00:30) [common]
1942 12:26:42.829035 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=off'
1943 12:26:42.902358 >> Command sent successfully.
1944 12:26:42.904455 Returned 0 in 0 seconds
1945 12:26:43.005247 end: 5.1 power-off (duration 00:00:00) [common]
1947 12:26:43.005578 start: 5.2 read-feedback (timeout 00:10:00) [common]
1948 12:26:43.005820 Listened to connection for namespace 'common' for up to 1s
1950 12:26:43.006231 Listened to connection for namespace 'common' for up to 1s
1951 12:26:44.009760 Finalising connection for namespace 'common'
1952 12:26:44.010504 Disconnecting from shell: Finalise
1953 12:26:44.010922
1954 12:26:44.112339 end: 5.2 read-feedback (duration 00:00:01) [common]
1955 12:26:44.112983 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584201
1956 12:26:44.244444 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584201
1957 12:26:44.244638 JobError: Your job cannot terminate cleanly.