Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:29.474837 lava-dispatcher, installed at version: 2023.01
2 12:21:29.475020 start: 0 validate
3 12:21:29.475140 Start time: 2023-03-13 12:21:29.475134+00:00 (UTC)
4 12:21:29.475258 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:29.475384 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Finitrd.cpio.gz exists
6 12:21:29.768512 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:29.769275 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:36.270711 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:36.271417 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230303.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:21:36.567796 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:21:36.568557 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:21:37.572399 validate duration: 8.10
14 12:21:37.572694 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:21:37.572852 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:21:37.572948 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:21:37.573047 Not decompressing ramdisk as can be used compressed.
18 12:21:37.573131 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/initrd.cpio.gz
19 12:21:37.573197 saving as /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/ramdisk/initrd.cpio.gz
20 12:21:37.573258 total size: 5432085 (5MB)
21 12:21:37.574165 progress 0% (0MB)
22 12:21:37.575602 progress 5% (0MB)
23 12:21:37.576972 progress 10% (0MB)
24 12:21:37.578295 progress 15% (0MB)
25 12:21:37.579779 progress 20% (1MB)
26 12:21:37.581150 progress 25% (1MB)
27 12:21:37.582456 progress 30% (1MB)
28 12:21:37.583908 progress 35% (1MB)
29 12:21:37.585252 progress 40% (2MB)
30 12:21:37.586584 progress 45% (2MB)
31 12:21:37.587879 progress 50% (2MB)
32 12:21:37.589372 progress 55% (2MB)
33 12:21:37.590675 progress 60% (3MB)
34 12:21:37.591968 progress 65% (3MB)
35 12:21:37.593455 progress 70% (3MB)
36 12:21:37.594747 progress 75% (3MB)
37 12:21:37.596043 progress 80% (4MB)
38 12:21:37.597373 progress 85% (4MB)
39 12:21:37.598858 progress 90% (4MB)
40 12:21:37.600149 progress 95% (4MB)
41 12:21:37.601506 progress 100% (5MB)
42 12:21:37.601711 5MB downloaded in 0.03s (182.10MB/s)
43 12:21:37.601867 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:21:37.602118 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:21:37.602210 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:21:37.602299 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:21:37.602411 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:21:37.602483 saving as /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/kernel/bzImage
50 12:21:37.602548 total size: 9826304 (9MB)
51 12:21:37.602611 No compression specified
52 12:21:37.603547 progress 0% (0MB)
53 12:21:37.605973 progress 5% (0MB)
54 12:21:37.608424 progress 10% (0MB)
55 12:21:37.610863 progress 15% (1MB)
56 12:21:37.613417 progress 20% (1MB)
57 12:21:37.615833 progress 25% (2MB)
58 12:21:37.618310 progress 30% (2MB)
59 12:21:37.620785 progress 35% (3MB)
60 12:21:37.623187 progress 40% (3MB)
61 12:21:37.625629 progress 45% (4MB)
62 12:21:37.628024 progress 50% (4MB)
63 12:21:37.630555 progress 55% (5MB)
64 12:21:37.633082 progress 60% (5MB)
65 12:21:37.635441 progress 65% (6MB)
66 12:21:37.637828 progress 70% (6MB)
67 12:21:37.640222 progress 75% (7MB)
68 12:21:37.642618 progress 80% (7MB)
69 12:21:37.645039 progress 85% (7MB)
70 12:21:37.647394 progress 90% (8MB)
71 12:21:37.649776 progress 95% (8MB)
72 12:21:37.652142 progress 100% (9MB)
73 12:21:37.652398 9MB downloaded in 0.05s (188.00MB/s)
74 12:21:37.652552 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:21:37.652792 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:21:37.652882 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:21:37.652970 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:21:37.653082 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230303.0/amd64/full.rootfs.tar.xz
80 12:21:37.653153 saving as /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/nfsrootfs/full.rootfs.tar
81 12:21:37.653217 total size: 133351796 (127MB)
82 12:21:37.653279 Using unxz to decompress xz
83 12:21:37.656478 progress 0% (0MB)
84 12:21:37.993692 progress 5% (6MB)
85 12:21:38.367496 progress 10% (12MB)
86 12:21:38.662619 progress 15% (19MB)
87 12:21:38.861526 progress 20% (25MB)
88 12:21:39.111258 progress 25% (31MB)
89 12:21:39.456589 progress 30% (38MB)
90 12:21:39.820062 progress 35% (44MB)
91 12:21:40.218681 progress 40% (50MB)
92 12:21:40.628007 progress 45% (57MB)
93 12:21:41.004737 progress 50% (63MB)
94 12:21:41.398127 progress 55% (69MB)
95 12:21:41.773538 progress 60% (76MB)
96 12:21:42.151075 progress 65% (82MB)
97 12:21:42.515481 progress 70% (89MB)
98 12:21:42.884435 progress 75% (95MB)
99 12:21:43.326523 progress 80% (101MB)
100 12:21:43.762411 progress 85% (108MB)
101 12:21:44.043370 progress 90% (114MB)
102 12:21:44.392307 progress 95% (120MB)
103 12:21:44.784282 progress 100% (127MB)
104 12:21:44.790104 127MB downloaded in 7.14s (17.82MB/s)
105 12:21:44.790409 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:21:44.790697 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:21:44.790806 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:21:44.790912 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:21:44.791041 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:21:44.791118 saving as /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/modules/modules.tar
112 12:21:44.791199 total size: 460276 (0MB)
113 12:21:44.791280 Using unxz to decompress xz
114 12:21:44.794304 progress 7% (0MB)
115 12:21:44.794676 progress 14% (0MB)
116 12:21:44.794917 progress 21% (0MB)
117 12:21:44.796284 progress 28% (0MB)
118 12:21:44.798377 progress 35% (0MB)
119 12:21:44.800545 progress 42% (0MB)
120 12:21:44.802905 progress 49% (0MB)
121 12:21:44.804866 progress 56% (0MB)
122 12:21:44.806702 progress 64% (0MB)
123 12:21:44.808908 progress 71% (0MB)
124 12:21:44.810931 progress 78% (0MB)
125 12:21:44.813020 progress 85% (0MB)
126 12:21:44.814750 progress 92% (0MB)
127 12:21:44.816757 progress 99% (0MB)
128 12:21:44.823233 0MB downloaded in 0.03s (13.71MB/s)
129 12:21:44.823568 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:21:44.823974 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:21:44.824119 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
133 12:21:44.824263 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
134 12:21:46.065134 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9584162/extract-nfsrootfs-vg17ygo6
135 12:21:46.065340 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 12:21:46.065442 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
137 12:21:46.065574 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf
138 12:21:46.065678 makedir: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin
139 12:21:46.065763 makedir: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/tests
140 12:21:46.065846 makedir: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/results
141 12:21:46.065943 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-add-keys
142 12:21:46.066071 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-add-sources
143 12:21:46.066186 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-background-process-start
144 12:21:46.066298 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-background-process-stop
145 12:21:46.066408 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-common-functions
146 12:21:46.066516 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-echo-ipv4
147 12:21:46.066626 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-install-packages
148 12:21:46.066734 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-installed-packages
149 12:21:46.066841 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-os-build
150 12:21:46.066948 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-probe-channel
151 12:21:46.067055 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-probe-ip
152 12:21:46.067171 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-target-ip
153 12:21:46.067281 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-target-mac
154 12:21:46.067389 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-target-storage
155 12:21:46.067499 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-case
156 12:21:46.067606 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-event
157 12:21:46.067713 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-feedback
158 12:21:46.067822 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-raise
159 12:21:46.067928 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-reference
160 12:21:46.068035 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-runner
161 12:21:46.068141 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-set
162 12:21:46.068247 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-test-shell
163 12:21:46.068399 Updating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-install-packages (oe)
164 12:21:46.068512 Updating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/bin/lava-installed-packages (oe)
165 12:21:46.068608 Creating /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/environment
166 12:21:46.068693 LAVA metadata
167 12:21:46.068763 - LAVA_JOB_ID=9584162
168 12:21:46.068827 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:21:46.068922 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
170 12:21:46.068986 skipped lava-vland-overlay
171 12:21:46.069061 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:21:46.069141 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
173 12:21:46.069203 skipped lava-multinode-overlay
174 12:21:46.069276 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:21:46.069355 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
176 12:21:46.069427 Loading test definitions
177 12:21:46.069517 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
178 12:21:46.069585 Using /lava-9584162 at stage 0
179 12:21:46.069823 uuid=9584162_1.5.2.3.1 testdef=None
180 12:21:46.069912 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
181 12:21:46.070000 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
182 12:21:46.070459 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
184 12:21:46.070688 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
185 12:21:46.071263 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
187 12:21:46.071498 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
188 12:21:46.072033 runner path: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/0/tests/0_dmesg test_uuid 9584162_1.5.2.3.1
189 12:21:46.072177 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
191 12:21:46.072454 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
192 12:21:46.072528 Using /lava-9584162 at stage 1
193 12:21:46.072763 uuid=9584162_1.5.2.3.5 testdef=None
194 12:21:46.072854 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
195 12:21:46.072940 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
196 12:21:46.073371 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
198 12:21:46.073593 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
199 12:21:46.074149 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
201 12:21:46.074380 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
202 12:21:46.074912 runner path: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/1/tests/1_bootrr test_uuid 9584162_1.5.2.3.5
203 12:21:46.075052 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
205 12:21:46.075261 Creating lava-test-runner.conf files
206 12:21:46.075325 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/0 for stage 0
207 12:21:46.075413 - 0_dmesg
208 12:21:46.075522 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584162/lava-overlay-smpws_rf/lava-9584162/1 for stage 1
209 12:21:46.075609 - 1_bootrr
210 12:21:46.075701 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
211 12:21:46.075787 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
212 12:21:46.081467 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
213 12:21:46.081584 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
214 12:21:46.081672 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
215 12:21:46.081760 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
216 12:21:46.081845 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
217 12:21:46.182557 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
218 12:21:46.182914 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
219 12:21:46.183166 extracting modules file /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584162/extract-nfsrootfs-vg17ygo6
220 12:21:46.193716 extracting modules file /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584162/extract-overlay-ramdisk-h9hib5gq/ramdisk
221 12:21:46.203832 end: 1.5.4 extract-modules (duration 00:00:00) [common]
222 12:21:46.203960 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
223 12:21:46.204048 [common] Applying overlay to NFS
224 12:21:46.204119 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584162/compress-overlay-z35qz92o/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584162/extract-nfsrootfs-vg17ygo6
225 12:21:46.208018 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
226 12:21:46.208127 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
227 12:21:46.208221 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
228 12:21:46.208316 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
229 12:21:46.208448 Building ramdisk /var/lib/lava/dispatcher/tmp/9584162/extract-overlay-ramdisk-h9hib5gq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584162/extract-overlay-ramdisk-h9hib5gq/ramdisk
230 12:21:46.247912 >> 30003 blocks
231 12:21:46.806630 rename /var/lib/lava/dispatcher/tmp/9584162/extract-overlay-ramdisk-h9hib5gq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
232 12:21:46.807049 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
233 12:21:46.807196 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
234 12:21:46.807303 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
235 12:21:46.807399 No mkimage arch provided, not using FIT.
236 12:21:46.807490 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
237 12:21:46.807585 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
238 12:21:46.807719 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
239 12:21:46.807845 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
240 12:21:46.807922 No LXC device requested
241 12:21:46.808005 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
242 12:21:46.808092 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
243 12:21:46.808174 end: 1.7 deploy-device-env (duration 00:00:00) [common]
244 12:21:46.808243 Checking files for TFTP limit of 4294967296 bytes.
245 12:21:46.808652 end: 1 tftp-deploy (duration 00:00:09) [common]
246 12:21:46.808759 start: 2 depthcharge-action (timeout 00:05:00) [common]
247 12:21:46.808852 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
248 12:21:46.808989 substitutions:
249 12:21:46.809068 - {DTB}: None
250 12:21:46.809137 - {INITRD}: 9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
251 12:21:46.809197 - {KERNEL}: 9584162/tftp-deploy-uubqlmbo/kernel/bzImage
252 12:21:46.809256 - {LAVA_MAC}: None
253 12:21:46.809312 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9584162/extract-nfsrootfs-vg17ygo6
254 12:21:46.809370 - {NFS_SERVER_IP}: 192.168.201.1
255 12:21:46.809426 - {PRESEED_CONFIG}: None
256 12:21:46.809481 - {PRESEED_LOCAL}: None
257 12:21:46.809539 - {RAMDISK}: 9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
258 12:21:46.809595 - {ROOT_PART}: None
259 12:21:46.809650 - {ROOT}: None
260 12:21:46.809709 - {SERVER_IP}: 192.168.201.1
261 12:21:46.809765 - {TEE}: None
262 12:21:46.809822 Parsed boot commands:
263 12:21:46.809876 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
264 12:21:46.810029 Parsed boot commands: tftpboot 192.168.201.1 9584162/tftp-deploy-uubqlmbo/kernel/bzImage 9584162/tftp-deploy-uubqlmbo/kernel/cmdline 9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
265 12:21:46.810129 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
266 12:21:46.810218 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
267 12:21:46.810315 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
268 12:21:46.810415 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
269 12:21:46.810485 Not connected, no need to disconnect.
270 12:21:46.810571 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
271 12:21:46.810657 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
272 12:21:46.810725 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
273 12:21:46.813673 Setting prompt string to ['lava-test: # ']
274 12:21:46.813992 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
275 12:21:46.814112 end: 2.2.1 reset-connection (duration 00:00:00) [common]
276 12:21:46.814214 start: 2.2.2 reset-device (timeout 00:05:00) [common]
277 12:21:46.814319 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
278 12:21:46.814514 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
279 12:21:51.947966 >> Command sent successfully.
280 12:21:51.950243 Returned 0 in 5 seconds
281 12:21:52.051033 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
283 12:21:52.051351 end: 2.2.2 reset-device (duration 00:00:05) [common]
284 12:21:52.051454 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
285 12:21:52.051545 Setting prompt string to 'Starting depthcharge on Voema...'
286 12:21:52.051612 Changing prompt to 'Starting depthcharge on Voema...'
287 12:21:52.051682 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
288 12:21:52.051959 [Enter `^Ec?' for help]
289 12:21:53.617122
290 12:21:53.617277
291 12:21:53.627649 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
292 12:21:53.630724 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
293 12:21:53.636985 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
294 12:21:53.640235 CPU: AES supported, TXT NOT supported, VT supported
295 12:21:53.646935 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
296 12:21:53.653632 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
297 12:21:53.656929 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
298 12:21:53.660009 VBOOT: Loading verstage.
299 12:21:53.666579 FMAP: Found "FLASH" version 1.1 at 0x1804000.
300 12:21:53.670412 FMAP: base = 0x0 size = 0x2000000 #areas = 32
301 12:21:53.676504 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 12:21:53.683639 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
303 12:21:53.689761 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
304 12:21:53.693265
305 12:21:53.693353
306 12:21:53.703200 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
307 12:21:53.718053 Probing TPM: . done!
308 12:21:53.721144 TPM ready after 0 ms
309 12:21:53.724566 Connected to device vid:did:rid of 1ae0:0028:00
310 12:21:53.735885 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
311 12:21:53.742176 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 12:21:53.745702 Initialized TPM device CR50 revision 0
313 12:21:53.828244 tlcl_send_startup: Startup return code is 0
314 12:21:53.828355 TPM: setup succeeded
315 12:21:53.843436 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
316 12:21:53.858712 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
317 12:21:53.872232 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
318 12:21:53.882463 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
319 12:21:53.886330 Chrome EC: UHEPI supported
320 12:21:53.889684 Phase 1
321 12:21:53.893024 FMAP: area GBB found @ 1805000 (458752 bytes)
322 12:21:53.903317 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
323 12:21:53.909651 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
324 12:21:53.915987 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:21:53.922859 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
326 12:21:53.926226 Recovery requested (1009000e)
327 12:21:53.929883 TPM: Extending digest for VBOOT: boot mode into PCR 0
328 12:21:53.941464 tlcl_extend: response is 0
329 12:21:53.947596 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
330 12:21:53.957478 tlcl_extend: response is 0
331 12:21:53.964160 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
332 12:21:53.970900 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
333 12:21:53.977787 BS: verstage times (exec / console): total (unknown) / 142 ms
334 12:21:53.977876
335 12:21:53.977945
336 12:21:53.991150 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
337 12:21:53.997587 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 12:21:54.000708 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 12:21:54.004293 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
340 12:21:54.010782 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 12:21:54.013898 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
342 12:21:54.017295 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
343 12:21:54.020931 TCO_STS: 0000 0000
344 12:21:54.023943 GEN_PMCON: d0015038 00002200
345 12:21:54.027217 GBLRST_CAUSE: 00000000 00000000
346 12:21:54.027304 HPR_CAUSE0: 00000000
347 12:21:54.031058 prev_sleep_state 5
348 12:21:54.034047 Boot Count incremented to 17855
349 12:21:54.040456 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 12:21:54.047030 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 12:21:54.053599 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 12:21:54.061259 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
353 12:21:54.065886 Chrome EC: UHEPI supported
354 12:21:54.071659 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
355 12:21:54.084744 Probing TPM: done!
356 12:21:54.091467 Connected to device vid:did:rid of 1ae0:0028:00
357 12:21:54.101565 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
358 12:21:54.104915 Initialized TPM device CR50 revision 0
359 12:21:54.119750 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
360 12:21:54.126216 MRC: Hash idx 0x100b comparison successful.
361 12:21:54.129647 MRC cache found, size faa8
362 12:21:54.129737 bootmode is set to: 2
363 12:21:54.132970 SPD index = 0
364 12:21:54.139544 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
365 12:21:54.142970 SPD: module type is LPDDR4X
366 12:21:54.146352 SPD: module part number is MT53E512M64D4NW-046
367 12:21:54.152732 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
368 12:21:54.156254 SPD: device width 16 bits, bus width 16 bits
369 12:21:54.162718 SPD: module size is 1024 MB (per channel)
370 12:21:54.595270 CBMEM:
371 12:21:54.598250 IMD: root @ 0x76fff000 254 entries.
372 12:21:54.601541 IMD: root @ 0x76ffec00 62 entries.
373 12:21:54.605220 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
374 12:21:54.611405 FMAP: area RW_VPD found @ f35000 (8192 bytes)
375 12:21:54.614926 External stage cache:
376 12:21:54.618111 IMD: root @ 0x7b3ff000 254 entries.
377 12:21:54.621523 IMD: root @ 0x7b3fec00 62 entries.
378 12:21:54.637499 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
379 12:21:54.644598 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
380 12:21:54.650856 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
381 12:21:54.663745 MRC: 'RECOVERY_MRC_CACHE' does not need update.
382 12:21:54.670858 cse_lite: Skip switching to RW in the recovery path
383 12:21:54.670946 8 DIMMs found
384 12:21:54.671017 SMM Memory Map
385 12:21:54.673872 SMRAM : 0x7b000000 0x800000
386 12:21:54.677335 Subregion 0: 0x7b000000 0x200000
387 12:21:54.684159 Subregion 1: 0x7b200000 0x200000
388 12:21:54.687238 Subregion 2: 0x7b400000 0x400000
389 12:21:54.687326 top_of_ram = 0x77000000
390 12:21:54.693931 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
391 12:21:54.700611 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
392 12:21:54.704030 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
393 12:21:54.710773 MTRR Range: Start=ff000000 End=0 (Size 1000000)
394 12:21:54.717510 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
395 12:21:54.723581 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
396 12:21:54.734020 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
397 12:21:54.737293 Processing 211 relocs. Offset value of 0x74c0b000
398 12:21:54.746910 BS: romstage times (exec / console): total (unknown) / 277 ms
399 12:21:54.753105
400 12:21:54.753218
401 12:21:54.762846 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
402 12:21:54.766120 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
403 12:21:54.776192 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 12:21:54.783216 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 12:21:54.789347 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
406 12:21:54.795765 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
407 12:21:54.843001 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
408 12:21:54.849904 Processing 5008 relocs. Offset value of 0x75d98000
409 12:21:54.852870 BS: postcar times (exec / console): total (unknown) / 59 ms
410 12:21:54.855937
411 12:21:54.856025
412 12:21:54.866275 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
413 12:21:54.866366 Normal boot
414 12:21:54.869247 FW_CONFIG value is 0x804c02
415 12:21:54.872458 PCI: 00:07.0 disabled by fw_config
416 12:21:54.875774 PCI: 00:07.1 disabled by fw_config
417 12:21:54.879109 PCI: 00:0d.2 disabled by fw_config
418 12:21:54.885682 PCI: 00:1c.7 disabled by fw_config
419 12:21:54.889360 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
420 12:21:54.896004 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:21:54.899263 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:21:54.905751 GENERIC: 0.0 disabled by fw_config
423 12:21:54.909298 GENERIC: 1.0 disabled by fw_config
424 12:21:54.912718 fw_config match found: DB_USB=USB3_ACTIVE
425 12:21:54.915869 fw_config match found: DB_USB=USB3_ACTIVE
426 12:21:54.919044 fw_config match found: DB_USB=USB3_ACTIVE
427 12:21:54.925801 fw_config match found: DB_USB=USB3_ACTIVE
428 12:21:54.929095 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
429 12:21:54.935643 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 12:21:54.946003 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 12:21:54.952549 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
432 12:21:54.955683 microcode: sig=0x806c1 pf=0x80 revision=0x86
433 12:21:54.962044 microcode: Update skipped, already up-to-date
434 12:21:54.968940 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
435 12:21:54.996346 Detected 4 core, 8 thread CPU.
436 12:21:54.999759 Setting up SMI for CPU
437 12:21:55.003349 IED base = 0x7b400000
438 12:21:55.003437 IED size = 0x00400000
439 12:21:55.006401 Will perform SMM setup.
440 12:21:55.012927 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
441 12:21:55.019714 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
442 12:21:55.026083 Processing 16 relocs. Offset value of 0x00030000
443 12:21:55.029886 Attempting to start 7 APs
444 12:21:55.032754 Waiting for 10ms after sending INIT.
445 12:21:55.048513 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
446 12:21:55.048604 done.
447 12:21:55.051934 AP: slot 2 apic_id 3.
448 12:21:55.055168 AP: slot 6 apic_id 2.
449 12:21:55.055259 AP: slot 7 apic_id 6.
450 12:21:55.058617 AP: slot 3 apic_id 7.
451 12:21:55.061683 Waiting for 2nd SIPI to complete...done.
452 12:21:55.065142 AP: slot 4 apic_id 5.
453 12:21:55.068744 AP: slot 5 apic_id 4.
454 12:21:55.075257 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
455 12:21:55.081648 Processing 13 relocs. Offset value of 0x00038000
456 12:21:55.081737 Unable to locate Global NVS
457 12:21:55.092036 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
458 12:21:55.095159 Installing permanent SMM handler to 0x7b000000
459 12:21:55.105061 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
460 12:21:55.108520 Processing 794 relocs. Offset value of 0x7b010000
461 12:21:55.118620 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
462 12:21:55.121729 Processing 13 relocs. Offset value of 0x7b008000
463 12:21:55.128238 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
464 12:21:55.135085 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
465 12:21:55.138141 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
466 12:21:55.144960 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
467 12:21:55.151152 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
468 12:21:55.158309 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
469 12:21:55.164784 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
470 12:21:55.164873 Unable to locate Global NVS
471 12:21:55.174449 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
472 12:21:55.177881 Clearing SMI status registers
473 12:21:55.177970 SMI_STS: PM1
474 12:21:55.181269 PM1_STS: PWRBTN
475 12:21:55.187791 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
476 12:21:55.191402 In relocation handler: CPU 0
477 12:21:55.194340 New SMBASE=0x7b000000 IEDBASE=0x7b400000
478 12:21:55.201145 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 12:21:55.201234 Relocation complete.
480 12:21:55.211124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
481 12:21:55.211213 In relocation handler: CPU 1
482 12:21:55.217585 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
483 12:21:55.217674 Relocation complete.
484 12:21:55.227672 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
485 12:21:55.227761 In relocation handler: CPU 2
486 12:21:55.234397 New SMBASE=0x7afff800 IEDBASE=0x7b400000
487 12:21:55.234486 Relocation complete.
488 12:21:55.244192 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
489 12:21:55.244280 In relocation handler: CPU 6
490 12:21:55.250923 New SMBASE=0x7affe800 IEDBASE=0x7b400000
491 12:21:55.254183 Writing SMRR. base = 0x7b000006, mask=0xff800c00
492 12:21:55.257493 Relocation complete.
493 12:21:55.264096 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:21:55.267645 In relocation handler: CPU 7
495 12:21:55.270575 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:21:55.277089 Writing SMRR. base = 0x7b000006, mask=0xff800c00
497 12:21:55.277177 Relocation complete.
498 12:21:55.283782 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
499 12:21:55.287203 In relocation handler: CPU 3
500 12:21:55.293801 New SMBASE=0x7afff400 IEDBASE=0x7b400000
501 12:21:55.293891 Relocation complete.
502 12:21:55.300620 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
503 12:21:55.304056 In relocation handler: CPU 4
504 12:21:55.307292 New SMBASE=0x7afff000 IEDBASE=0x7b400000
505 12:21:55.310570 Relocation complete.
506 12:21:55.317534 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
507 12:21:55.320601 In relocation handler: CPU 5
508 12:21:55.324132 New SMBASE=0x7affec00 IEDBASE=0x7b400000
509 12:21:55.330774 Writing SMRR. base = 0x7b000006, mask=0xff800c00
510 12:21:55.334219 Relocation complete.
511 12:21:55.334308 Initializing CPU #0
512 12:21:55.337280 CPU: vendor Intel device 806c1
513 12:21:55.340804 CPU: family 06, model 8c, stepping 01
514 12:21:55.344443 Clearing out pending MCEs
515 12:21:55.347279 Setting up local APIC...
516 12:21:55.350861 apic_id: 0x00 done.
517 12:21:55.350949 Turbo is available but hidden
518 12:21:55.354125 Turbo is available and visible
519 12:21:55.360695 microcode: Update skipped, already up-to-date
520 12:21:55.364073 CPU #0 initialized
521 12:21:55.364161 Initializing CPU #2
522 12:21:55.367033 Initializing CPU #6
523 12:21:55.367121 Initializing CPU #5
524 12:21:55.371150 Initializing CPU #4
525 12:21:55.374628 CPU: vendor Intel device 806c1
526 12:21:55.377117 CPU: family 06, model 8c, stepping 01
527 12:21:55.380621 CPU: vendor Intel device 806c1
528 12:21:55.383997 CPU: family 06, model 8c, stepping 01
529 12:21:55.387130 Clearing out pending MCEs
530 12:21:55.390509 Clearing out pending MCEs
531 12:21:55.390599 Setting up local APIC...
532 12:21:55.393718 CPU: vendor Intel device 806c1
533 12:21:55.400596 CPU: family 06, model 8c, stepping 01
534 12:21:55.400685 Initializing CPU #1
535 12:21:55.403516 Initializing CPU #3
536 12:21:55.403604 Initializing CPU #7
537 12:21:55.406766 CPU: vendor Intel device 806c1
538 12:21:55.413937 CPU: family 06, model 8c, stepping 01
539 12:21:55.414025 CPU: vendor Intel device 806c1
540 12:21:55.420356 CPU: family 06, model 8c, stepping 01
541 12:21:55.420445 Clearing out pending MCEs
542 12:21:55.423429 Clearing out pending MCEs
543 12:21:55.426864 Setting up local APIC...
544 12:21:55.430287 Clearing out pending MCEs
545 12:21:55.433796 CPU: vendor Intel device 806c1
546 12:21:55.436882 CPU: family 06, model 8c, stepping 01
547 12:21:55.440272 Setting up local APIC...
548 12:21:55.443204 CPU: vendor Intel device 806c1
549 12:21:55.446509 CPU: family 06, model 8c, stepping 01
550 12:21:55.450058 Clearing out pending MCEs
551 12:21:55.450146 apic_id: 0x03 done.
552 12:21:55.453377 Clearing out pending MCEs
553 12:21:55.456718 microcode: Update skipped, already up-to-date
554 12:21:55.460012 Setting up local APIC...
555 12:21:55.463060 Setting up local APIC...
556 12:21:55.463148 CPU #2 initialized
557 12:21:55.466421 apic_id: 0x02 done.
558 12:21:55.470013 apic_id: 0x04 done.
559 12:21:55.473389 Setting up local APIC...
560 12:21:55.473477 Setting up local APIC...
561 12:21:55.479905 microcode: Update skipped, already up-to-date
562 12:21:55.479994 apic_id: 0x05 done.
563 12:21:55.483238 CPU #5 initialized
564 12:21:55.486614 microcode: Update skipped, already up-to-date
565 12:21:55.490038 apic_id: 0x01 done.
566 12:21:55.493119 apic_id: 0x07 done.
567 12:21:55.493207 apic_id: 0x06 done.
568 12:21:55.499699 microcode: Update skipped, already up-to-date
569 12:21:55.502770 microcode: Update skipped, already up-to-date
570 12:21:55.506146 CPU #3 initialized
571 12:21:55.506235 CPU #7 initialized
572 12:21:55.509884 CPU #6 initialized
573 12:21:55.513028 microcode: Update skipped, already up-to-date
574 12:21:55.519345 microcode: Update skipped, already up-to-date
575 12:21:55.519433 CPU #4 initialized
576 12:21:55.522920 CPU #1 initialized
577 12:21:55.526349 bsp_do_flight_plan done after 459 msecs.
578 12:21:55.529621 CPU: frequency set to 4000 MHz
579 12:21:55.529709 Enabling SMIs.
580 12:21:55.536009 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 12:21:55.553318 SATAXPCIE1 indicates PCIe NVMe is present
582 12:21:55.556820 Probing TPM: done!
583 12:21:55.560140 Connected to device vid:did:rid of 1ae0:0028:00
584 12:21:55.570640 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
585 12:21:55.573728 Initialized TPM device CR50 revision 0
586 12:21:55.577104 Enabling S0i3.4
587 12:21:55.583669 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 12:21:55.587394 Found a VBT of 8704 bytes after decompression
589 12:21:55.593785 cse_lite: CSE RO boot. HybridStorageMode disabled
590 12:21:55.600172 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 12:21:55.675984 FSPS returned 0
592 12:21:55.679572 Executing Phase 1 of FspMultiPhaseSiInit
593 12:21:55.689571 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 12:21:55.692748 port C0 DISC req: usage 1 usb3 1 usb2 5
595 12:21:55.696149 Raw Buffer output 0 00000511
596 12:21:55.699085 Raw Buffer output 1 00000000
597 12:21:55.703229 pmc_send_ipc_cmd succeeded
598 12:21:55.709703 port C1 DISC req: usage 1 usb3 2 usb2 3
599 12:21:55.709791 Raw Buffer output 0 00000321
600 12:21:55.713112 Raw Buffer output 1 00000000
601 12:21:55.717252 pmc_send_ipc_cmd succeeded
602 12:21:55.722314 Detected 4 core, 8 thread CPU.
603 12:21:55.725829 Detected 4 core, 8 thread CPU.
604 12:21:55.959644 Display FSP Version Info HOB
605 12:21:55.962696 Reference Code - CPU = a.0.4c.31
606 12:21:55.966102 uCode Version = 0.0.0.86
607 12:21:55.969629 TXT ACM version = ff.ff.ff.ffff
608 12:21:55.972888 Reference Code - ME = a.0.4c.31
609 12:21:55.976345 MEBx version = 0.0.0.0
610 12:21:55.979525 ME Firmware Version = Consumer SKU
611 12:21:55.982776 Reference Code - PCH = a.0.4c.31
612 12:21:55.986103 PCH-CRID Status = Disabled
613 12:21:55.989338 PCH-CRID Original Value = ff.ff.ff.ffff
614 12:21:55.992918 PCH-CRID New Value = ff.ff.ff.ffff
615 12:21:55.996294 OPROM - RST - RAID = ff.ff.ff.ffff
616 12:21:55.999234 PCH Hsio Version = 4.0.0.0
617 12:21:56.003077 Reference Code - SA - System Agent = a.0.4c.31
618 12:21:56.006050 Reference Code - MRC = 2.0.0.1
619 12:21:56.009545 SA - PCIe Version = a.0.4c.31
620 12:21:56.013036 SA-CRID Status = Disabled
621 12:21:56.016113 SA-CRID Original Value = 0.0.0.1
622 12:21:56.019261 SA-CRID New Value = 0.0.0.1
623 12:21:56.022828 OPROM - VBIOS = ff.ff.ff.ffff
624 12:21:56.026249 IO Manageability Engine FW Version = 11.1.4.0
625 12:21:56.029201 PHY Build Version = 0.0.0.e0
626 12:21:56.032692 Thunderbolt(TM) FW Version = 0.0.0.0
627 12:21:56.039178 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
628 12:21:56.042592 ITSS IRQ Polarities Before:
629 12:21:56.042682 IPC0: 0xffffffff
630 12:21:56.046001 IPC1: 0xffffffff
631 12:21:56.046090 IPC2: 0xffffffff
632 12:21:56.049817 IPC3: 0xffffffff
633 12:21:56.052638 ITSS IRQ Polarities After:
634 12:21:56.052726 IPC0: 0xffffffff
635 12:21:56.056157 IPC1: 0xffffffff
636 12:21:56.056246 IPC2: 0xffffffff
637 12:21:56.059273 IPC3: 0xffffffff
638 12:21:56.062716 Found PCIe Root Port #9 at PCI: 00:1d.0.
639 12:21:56.075648 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
640 12:21:56.086057 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
641 12:21:56.098867 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
642 12:21:56.105672 BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 237 ms
643 12:21:56.109267 Enumerating buses...
644 12:21:56.112131 Show all devs... Before device enumeration.
645 12:21:56.115996 Root Device: enabled 1
646 12:21:56.116086 DOMAIN: 0000: enabled 1
647 12:21:56.118864 CPU_CLUSTER: 0: enabled 1
648 12:21:56.122375 PCI: 00:00.0: enabled 1
649 12:21:56.125327 PCI: 00:02.0: enabled 1
650 12:21:56.125433 PCI: 00:04.0: enabled 1
651 12:21:56.128852 PCI: 00:05.0: enabled 1
652 12:21:56.132201 PCI: 00:06.0: enabled 0
653 12:21:56.132291 PCI: 00:07.0: enabled 0
654 12:21:56.135731 PCI: 00:07.1: enabled 0
655 12:21:56.138643 PCI: 00:07.2: enabled 0
656 12:21:56.142066 PCI: 00:07.3: enabled 0
657 12:21:56.142155 PCI: 00:08.0: enabled 1
658 12:21:56.145209 PCI: 00:09.0: enabled 0
659 12:21:56.148794 PCI: 00:0a.0: enabled 0
660 12:21:56.152244 PCI: 00:0d.0: enabled 1
661 12:21:56.152341 PCI: 00:0d.1: enabled 0
662 12:21:56.155193 PCI: 00:0d.2: enabled 0
663 12:21:56.158819 PCI: 00:0d.3: enabled 0
664 12:21:56.162150 PCI: 00:0e.0: enabled 0
665 12:21:56.162240 PCI: 00:10.2: enabled 1
666 12:21:56.165336 PCI: 00:10.6: enabled 0
667 12:21:56.168560 PCI: 00:10.7: enabled 0
668 12:21:56.172281 PCI: 00:12.0: enabled 0
669 12:21:56.172409 PCI: 00:12.6: enabled 0
670 12:21:56.175625 PCI: 00:13.0: enabled 0
671 12:21:56.178471 PCI: 00:14.0: enabled 1
672 12:21:56.178560 PCI: 00:14.1: enabled 0
673 12:21:56.181954 PCI: 00:14.2: enabled 1
674 12:21:56.185120 PCI: 00:14.3: enabled 1
675 12:21:56.188750 PCI: 00:15.0: enabled 1
676 12:21:56.188839 PCI: 00:15.1: enabled 1
677 12:21:56.192081 PCI: 00:15.2: enabled 1
678 12:21:56.195253 PCI: 00:15.3: enabled 1
679 12:21:56.198802 PCI: 00:16.0: enabled 1
680 12:21:56.198895 PCI: 00:16.1: enabled 0
681 12:21:56.202086 PCI: 00:16.2: enabled 0
682 12:21:56.205352 PCI: 00:16.3: enabled 0
683 12:21:56.208657 PCI: 00:16.4: enabled 0
684 12:21:56.208746 PCI: 00:16.5: enabled 0
685 12:21:56.212725 PCI: 00:17.0: enabled 1
686 12:21:56.215209 PCI: 00:19.0: enabled 0
687 12:21:56.215298 PCI: 00:19.1: enabled 1
688 12:21:56.218339 PCI: 00:19.2: enabled 0
689 12:21:56.221721 PCI: 00:1c.0: enabled 1
690 12:21:56.225052 PCI: 00:1c.1: enabled 0
691 12:21:56.225141 PCI: 00:1c.2: enabled 0
692 12:21:56.228455 PCI: 00:1c.3: enabled 0
693 12:21:56.231618 PCI: 00:1c.4: enabled 0
694 12:21:56.235081 PCI: 00:1c.5: enabled 0
695 12:21:56.235170 PCI: 00:1c.6: enabled 1
696 12:21:56.238594 PCI: 00:1c.7: enabled 0
697 12:21:56.241636 PCI: 00:1d.0: enabled 1
698 12:21:56.245052 PCI: 00:1d.1: enabled 0
699 12:21:56.245141 PCI: 00:1d.2: enabled 1
700 12:21:56.248441 PCI: 00:1d.3: enabled 0
701 12:21:56.251680 PCI: 00:1e.0: enabled 1
702 12:21:56.255080 PCI: 00:1e.1: enabled 0
703 12:21:56.255170 PCI: 00:1e.2: enabled 1
704 12:21:56.258738 PCI: 00:1e.3: enabled 1
705 12:21:56.261493 PCI: 00:1f.0: enabled 1
706 12:21:56.264663 PCI: 00:1f.1: enabled 0
707 12:21:56.264751 PCI: 00:1f.2: enabled 1
708 12:21:56.268120 PCI: 00:1f.3: enabled 1
709 12:21:56.271552 PCI: 00:1f.4: enabled 0
710 12:21:56.271641 PCI: 00:1f.5: enabled 1
711 12:21:56.274591 PCI: 00:1f.6: enabled 0
712 12:21:56.278252 PCI: 00:1f.7: enabled 0
713 12:21:56.281610 APIC: 00: enabled 1
714 12:21:56.281699 GENERIC: 0.0: enabled 1
715 12:21:56.284750 GENERIC: 0.0: enabled 1
716 12:21:56.288135 GENERIC: 1.0: enabled 1
717 12:21:56.288226 GENERIC: 0.0: enabled 1
718 12:21:56.291397 GENERIC: 1.0: enabled 1
719 12:21:56.294668 USB0 port 0: enabled 1
720 12:21:56.297856 GENERIC: 0.0: enabled 1
721 12:21:56.297946 USB0 port 0: enabled 1
722 12:21:56.301586 GENERIC: 0.0: enabled 1
723 12:21:56.304502 I2C: 00:1a: enabled 1
724 12:21:56.304591 I2C: 00:31: enabled 1
725 12:21:56.307823 I2C: 00:32: enabled 1
726 12:21:56.311655 I2C: 00:10: enabled 1
727 12:21:56.314407 I2C: 00:15: enabled 1
728 12:21:56.314496 GENERIC: 0.0: enabled 0
729 12:21:56.317909 GENERIC: 1.0: enabled 0
730 12:21:56.321226 GENERIC: 0.0: enabled 1
731 12:21:56.321315 SPI: 00: enabled 1
732 12:21:56.324476 SPI: 00: enabled 1
733 12:21:56.328145 PNP: 0c09.0: enabled 1
734 12:21:56.328234 GENERIC: 0.0: enabled 1
735 12:21:56.331087 USB3 port 0: enabled 1
736 12:21:56.334782 USB3 port 1: enabled 1
737 12:21:56.334870 USB3 port 2: enabled 0
738 12:21:56.337722 USB3 port 3: enabled 0
739 12:21:56.341084 USB2 port 0: enabled 0
740 12:21:56.344537 USB2 port 1: enabled 1
741 12:21:56.344627 USB2 port 2: enabled 1
742 12:21:56.347967 USB2 port 3: enabled 0
743 12:21:56.351082 USB2 port 4: enabled 1
744 12:21:56.351171 USB2 port 5: enabled 0
745 12:21:56.354439 USB2 port 6: enabled 0
746 12:21:56.357609 USB2 port 7: enabled 0
747 12:21:56.360964 USB2 port 8: enabled 0
748 12:21:56.361054 USB2 port 9: enabled 0
749 12:21:56.364422 USB3 port 0: enabled 0
750 12:21:56.367526 USB3 port 1: enabled 1
751 12:21:56.367615 USB3 port 2: enabled 0
752 12:21:56.370970 USB3 port 3: enabled 0
753 12:21:56.374392 GENERIC: 0.0: enabled 1
754 12:21:56.377943 GENERIC: 1.0: enabled 1
755 12:21:56.378032 APIC: 01: enabled 1
756 12:21:56.380812 APIC: 03: enabled 1
757 12:21:56.380901 APIC: 07: enabled 1
758 12:21:56.384490 APIC: 05: enabled 1
759 12:21:56.388037 APIC: 04: enabled 1
760 12:21:56.388126 APIC: 02: enabled 1
761 12:21:56.390889 APIC: 06: enabled 1
762 12:21:56.390978 Compare with tree...
763 12:21:56.394513 Root Device: enabled 1
764 12:21:56.397595 DOMAIN: 0000: enabled 1
765 12:21:56.401223 PCI: 00:00.0: enabled 1
766 12:21:56.404154 PCI: 00:02.0: enabled 1
767 12:21:56.404244 PCI: 00:04.0: enabled 1
768 12:21:56.407813 GENERIC: 0.0: enabled 1
769 12:21:56.411202 PCI: 00:05.0: enabled 1
770 12:21:56.414185 PCI: 00:06.0: enabled 0
771 12:21:56.417517 PCI: 00:07.0: enabled 0
772 12:21:56.417606 GENERIC: 0.0: enabled 1
773 12:21:56.421166 PCI: 00:07.1: enabled 0
774 12:21:56.424252 GENERIC: 1.0: enabled 1
775 12:21:56.427775 PCI: 00:07.2: enabled 0
776 12:21:56.430923 GENERIC: 0.0: enabled 1
777 12:21:56.431011 PCI: 00:07.3: enabled 0
778 12:21:56.434304 GENERIC: 1.0: enabled 1
779 12:21:56.437636 PCI: 00:08.0: enabled 1
780 12:21:56.440968 PCI: 00:09.0: enabled 0
781 12:21:56.444080 PCI: 00:0a.0: enabled 0
782 12:21:56.444169 PCI: 00:0d.0: enabled 1
783 12:21:56.447238 USB0 port 0: enabled 1
784 12:21:56.450867 USB3 port 0: enabled 1
785 12:21:56.454338 USB3 port 1: enabled 1
786 12:21:56.457561 USB3 port 2: enabled 0
787 12:21:56.457650 USB3 port 3: enabled 0
788 12:21:56.460676 PCI: 00:0d.1: enabled 0
789 12:21:56.464157 PCI: 00:0d.2: enabled 0
790 12:21:56.467616 GENERIC: 0.0: enabled 1
791 12:21:56.470742 PCI: 00:0d.3: enabled 0
792 12:21:56.470831 PCI: 00:0e.0: enabled 0
793 12:21:56.474215 PCI: 00:10.2: enabled 1
794 12:21:56.477237 PCI: 00:10.6: enabled 0
795 12:21:56.480660 PCI: 00:10.7: enabled 0
796 12:21:56.484422 PCI: 00:12.0: enabled 0
797 12:21:56.484511 PCI: 00:12.6: enabled 0
798 12:21:56.487251 PCI: 00:13.0: enabled 0
799 12:21:56.490738 PCI: 00:14.0: enabled 1
800 12:21:56.494252 USB0 port 0: enabled 1
801 12:21:56.497369 USB2 port 0: enabled 0
802 12:21:56.497458 USB2 port 1: enabled 1
803 12:21:56.500715 USB2 port 2: enabled 1
804 12:21:56.504279 USB2 port 3: enabled 0
805 12:21:56.507236 USB2 port 4: enabled 1
806 12:21:56.510519 USB2 port 5: enabled 0
807 12:21:56.513816 USB2 port 6: enabled 0
808 12:21:56.513905 USB2 port 7: enabled 0
809 12:21:56.517526 USB2 port 8: enabled 0
810 12:21:56.520761 USB2 port 9: enabled 0
811 12:21:56.523966 USB3 port 0: enabled 0
812 12:21:56.527380 USB3 port 1: enabled 1
813 12:21:56.530800 USB3 port 2: enabled 0
814 12:21:56.530890 USB3 port 3: enabled 0
815 12:21:56.533826 PCI: 00:14.1: enabled 0
816 12:21:56.537401 PCI: 00:14.2: enabled 1
817 12:21:56.540617 PCI: 00:14.3: enabled 1
818 12:21:56.544061 GENERIC: 0.0: enabled 1
819 12:21:56.544150 PCI: 00:15.0: enabled 1
820 12:21:56.547796 I2C: 00:1a: enabled 1
821 12:21:56.551575 I2C: 00:31: enabled 1
822 12:21:56.551695 I2C: 00:32: enabled 1
823 12:21:56.554695 PCI: 00:15.1: enabled 1
824 12:21:56.558077 I2C: 00:10: enabled 1
825 12:21:56.561524 PCI: 00:15.2: enabled 1
826 12:21:56.564645 PCI: 00:15.3: enabled 1
827 12:21:56.564734 PCI: 00:16.0: enabled 1
828 12:21:56.568089 PCI: 00:16.1: enabled 0
829 12:21:56.618092 PCI: 00:16.2: enabled 0
830 12:21:56.618189 PCI: 00:16.3: enabled 0
831 12:21:56.618459 PCI: 00:16.4: enabled 0
832 12:21:56.618539 PCI: 00:16.5: enabled 0
833 12:21:56.618606 PCI: 00:17.0: enabled 1
834 12:21:56.618670 PCI: 00:19.0: enabled 0
835 12:21:56.618731 PCI: 00:19.1: enabled 1
836 12:21:56.619024 I2C: 00:15: enabled 1
837 12:21:56.619097 PCI: 00:19.2: enabled 0
838 12:21:56.619159 PCI: 00:1d.0: enabled 1
839 12:21:56.619452 GENERIC: 0.0: enabled 1
840 12:21:56.619524 PCI: 00:1e.0: enabled 1
841 12:21:56.619586 PCI: 00:1e.1: enabled 0
842 12:21:56.619646 PCI: 00:1e.2: enabled 1
843 12:21:56.620269 SPI: 00: enabled 1
844 12:21:56.620382 PCI: 00:1e.3: enabled 1
845 12:21:56.620454 SPI: 00: enabled 1
846 12:21:56.621104 PCI: 00:1f.0: enabled 1
847 12:21:56.621193 PNP: 0c09.0: enabled 1
848 12:21:56.669685 PCI: 00:1f.1: enabled 0
849 12:21:56.669786 PCI: 00:1f.2: enabled 1
850 12:21:56.669857 GENERIC: 0.0: enabled 1
851 12:21:56.670113 GENERIC: 0.0: enabled 1
852 12:21:56.670186 GENERIC: 1.0: enabled 1
853 12:21:56.670507 PCI: 00:1f.3: enabled 1
854 12:21:56.670596 PCI: 00:1f.4: enabled 0
855 12:21:56.671035 PCI: 00:1f.5: enabled 1
856 12:21:56.671124 PCI: 00:1f.6: enabled 0
857 12:21:56.671195 PCI: 00:1f.7: enabled 0
858 12:21:56.671628 CPU_CLUSTER: 0: enabled 1
859 12:21:56.671717 APIC: 00: enabled 1
860 12:21:56.671978 APIC: 01: enabled 1
861 12:21:56.672056 APIC: 03: enabled 1
862 12:21:56.672123 APIC: 07: enabled 1
863 12:21:56.672602 APIC: 05: enabled 1
864 12:21:56.672690 APIC: 04: enabled 1
865 12:21:56.672761 APIC: 02: enabled 1
866 12:21:56.672826 APIC: 06: enabled 1
867 12:21:56.672890 Root Device scanning...
868 12:21:56.697178 scan_static_bus for Root Device
869 12:21:56.697269 DOMAIN: 0000 enabled
870 12:21:56.697340 CPU_CLUSTER: 0 enabled
871 12:21:56.697593 DOMAIN: 0000 scanning...
872 12:21:56.697665 PCI: pci_scan_bus for bus 00
873 12:21:56.697914 PCI: 00:00.0 [8086/0000] ops
874 12:21:56.697986 PCI: 00:00.0 [8086/9a12] enabled
875 12:21:56.698049 PCI: 00:02.0 [8086/0000] bus ops
876 12:21:56.698111 PCI: 00:02.0 [8086/9a40] enabled
877 12:21:56.701187 PCI: 00:04.0 [8086/0000] bus ops
878 12:21:56.701278 PCI: 00:04.0 [8086/9a03] enabled
879 12:21:56.704117 PCI: 00:05.0 [8086/9a19] enabled
880 12:21:56.707657 PCI: 00:07.0 [0000/0000] hidden
881 12:21:56.710627 PCI: 00:08.0 [8086/9a11] enabled
882 12:21:56.717503 PCI: 00:0a.0 [8086/9a0d] disabled
883 12:21:56.721097 PCI: 00:0d.0 [8086/0000] bus ops
884 12:21:56.724081 PCI: 00:0d.0 [8086/9a13] enabled
885 12:21:56.727274 PCI: 00:14.0 [8086/0000] bus ops
886 12:21:56.730936 PCI: 00:14.0 [8086/a0ed] enabled
887 12:21:56.734311 PCI: 00:14.2 [8086/a0ef] enabled
888 12:21:56.737313 PCI: 00:14.3 [8086/0000] bus ops
889 12:21:56.740652 PCI: 00:14.3 [8086/a0f0] enabled
890 12:21:56.743927 PCI: 00:15.0 [8086/0000] bus ops
891 12:21:56.747076 PCI: 00:15.0 [8086/a0e8] enabled
892 12:21:56.750581 PCI: 00:15.1 [8086/0000] bus ops
893 12:21:56.753961 PCI: 00:15.1 [8086/a0e9] enabled
894 12:21:56.757633 PCI: 00:15.2 [8086/0000] bus ops
895 12:21:56.760642 PCI: 00:15.2 [8086/a0ea] enabled
896 12:21:56.763631 PCI: 00:15.3 [8086/0000] bus ops
897 12:21:56.766981 PCI: 00:15.3 [8086/a0eb] enabled
898 12:21:56.767070 PCI: 00:16.0 [8086/0000] ops
899 12:21:56.770644 PCI: 00:16.0 [8086/a0e0] enabled
900 12:21:56.777249 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 12:21:56.780266 PCI: 00:19.0 [8086/0000] bus ops
902 12:21:56.783648 PCI: 00:19.0 [8086/a0c5] disabled
903 12:21:56.787220 PCI: 00:19.1 [8086/0000] bus ops
904 12:21:56.790176 PCI: 00:19.1 [8086/a0c6] enabled
905 12:21:56.793952 PCI: 00:1d.0 [8086/0000] bus ops
906 12:21:56.797294 PCI: 00:1d.0 [8086/a0b0] enabled
907 12:21:56.800521 PCI: 00:1e.0 [8086/0000] ops
908 12:21:56.803498 PCI: 00:1e.0 [8086/a0a8] enabled
909 12:21:56.807089 PCI: 00:1e.2 [8086/0000] bus ops
910 12:21:56.810161 PCI: 00:1e.2 [8086/a0aa] enabled
911 12:21:56.813645 PCI: 00:1e.3 [8086/0000] bus ops
912 12:21:56.817164 PCI: 00:1e.3 [8086/a0ab] enabled
913 12:21:56.820105 PCI: 00:1f.0 [8086/0000] bus ops
914 12:21:56.823609 PCI: 00:1f.0 [8086/a087] enabled
915 12:21:56.826968 RTC Init
916 12:21:56.829860 Set power on after power failure.
917 12:21:56.829949 Disabling Deep S3
918 12:21:56.833412 Disabling Deep S3
919 12:21:56.833502 Disabling Deep S4
920 12:21:56.836549 Disabling Deep S4
921 12:21:56.836638 Disabling Deep S5
922 12:21:56.840230 Disabling Deep S5
923 12:21:56.843798 PCI: 00:1f.2 [0000/0000] hidden
924 12:21:56.846949 PCI: 00:1f.3 [8086/0000] bus ops
925 12:21:56.850004 PCI: 00:1f.3 [8086/a0c8] enabled
926 12:21:56.853262 PCI: 00:1f.5 [8086/0000] bus ops
927 12:21:56.857002 PCI: 00:1f.5 [8086/a0a4] enabled
928 12:21:56.860141 PCI: Leftover static devices:
929 12:21:56.860218 PCI: 00:10.2
930 12:21:56.863199 PCI: 00:10.6
931 12:21:56.863286 PCI: 00:10.7
932 12:21:56.866561 PCI: 00:06.0
933 12:21:56.866637 PCI: 00:07.1
934 12:21:56.866701 PCI: 00:07.2
935 12:21:56.869955 PCI: 00:07.3
936 12:21:56.870042 PCI: 00:09.0
937 12:21:56.873131 PCI: 00:0d.1
938 12:21:56.873219 PCI: 00:0d.2
939 12:21:56.876586 PCI: 00:0d.3
940 12:21:56.876673 PCI: 00:0e.0
941 12:21:56.876741 PCI: 00:12.0
942 12:21:56.880006 PCI: 00:12.6
943 12:21:56.880093 PCI: 00:13.0
944 12:21:56.883036 PCI: 00:14.1
945 12:21:56.883123 PCI: 00:16.1
946 12:21:56.883191 PCI: 00:16.2
947 12:21:56.886591 PCI: 00:16.3
948 12:21:56.886677 PCI: 00:16.4
949 12:21:56.890105 PCI: 00:16.5
950 12:21:56.890192 PCI: 00:17.0
951 12:21:56.890261 PCI: 00:19.2
952 12:21:56.893054 PCI: 00:1e.1
953 12:21:56.893141 PCI: 00:1f.1
954 12:21:56.896202 PCI: 00:1f.4
955 12:21:56.896288 PCI: 00:1f.6
956 12:21:56.899454 PCI: 00:1f.7
957 12:21:56.903169 PCI: Check your devicetree.cb.
958 12:21:56.903257 PCI: 00:02.0 scanning...
959 12:21:56.906060 scan_generic_bus for PCI: 00:02.0
960 12:21:56.912676 scan_generic_bus for PCI: 00:02.0 done
961 12:21:56.916185 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
962 12:21:56.919421 PCI: 00:04.0 scanning...
963 12:21:56.923001 scan_generic_bus for PCI: 00:04.0
964 12:21:56.926192 GENERIC: 0.0 enabled
965 12:21:56.929265 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
966 12:21:56.936152 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
967 12:21:56.939320 PCI: 00:0d.0 scanning...
968 12:21:56.942838 scan_static_bus for PCI: 00:0d.0
969 12:21:56.942925 USB0 port 0 enabled
970 12:21:56.946489 USB0 port 0 scanning...
971 12:21:56.949240 scan_static_bus for USB0 port 0
972 12:21:56.952515 USB3 port 0 enabled
973 12:21:56.952602 USB3 port 1 enabled
974 12:21:56.956084 USB3 port 2 disabled
975 12:21:56.959289 USB3 port 3 disabled
976 12:21:56.959376 USB3 port 0 scanning...
977 12:21:56.962404 scan_static_bus for USB3 port 0
978 12:21:56.965850 scan_static_bus for USB3 port 0 done
979 12:21:56.972281 scan_bus: bus USB3 port 0 finished in 6 msecs
980 12:21:56.975611 USB3 port 1 scanning...
981 12:21:56.979148 scan_static_bus for USB3 port 1
982 12:21:56.982322 scan_static_bus for USB3 port 1 done
983 12:21:56.985707 scan_bus: bus USB3 port 1 finished in 6 msecs
984 12:21:56.988894 scan_static_bus for USB0 port 0 done
985 12:21:56.995810 scan_bus: bus USB0 port 0 finished in 43 msecs
986 12:21:56.999262 scan_static_bus for PCI: 00:0d.0 done
987 12:21:57.002555 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
988 12:21:57.005913 PCI: 00:14.0 scanning...
989 12:21:57.008990 scan_static_bus for PCI: 00:14.0
990 12:21:57.012260 USB0 port 0 enabled
991 12:21:57.012387 USB0 port 0 scanning...
992 12:21:57.015661 scan_static_bus for USB0 port 0
993 12:21:57.019357 USB2 port 0 disabled
994 12:21:57.022206 USB2 port 1 enabled
995 12:21:57.022296 USB2 port 2 enabled
996 12:21:57.025757 USB2 port 3 disabled
997 12:21:57.029177 USB2 port 4 enabled
998 12:21:57.029266 USB2 port 5 disabled
999 12:21:57.032082 USB2 port 6 disabled
1000 12:21:57.035635 USB2 port 7 disabled
1001 12:21:57.035725 USB2 port 8 disabled
1002 12:21:57.038868 USB2 port 9 disabled
1003 12:21:57.042509 USB3 port 0 disabled
1004 12:21:57.042600 USB3 port 1 enabled
1005 12:21:57.045590 USB3 port 2 disabled
1006 12:21:57.045679 USB3 port 3 disabled
1007 12:21:57.048852 USB2 port 1 scanning...
1008 12:21:57.052003 scan_static_bus for USB2 port 1
1009 12:21:57.055576 scan_static_bus for USB2 port 1 done
1010 12:21:57.061891 scan_bus: bus USB2 port 1 finished in 6 msecs
1011 12:21:57.061990 USB2 port 2 scanning...
1012 12:21:57.065372 scan_static_bus for USB2 port 2
1013 12:21:57.072151 scan_static_bus for USB2 port 2 done
1014 12:21:57.075495 scan_bus: bus USB2 port 2 finished in 6 msecs
1015 12:21:57.079037 USB2 port 4 scanning...
1016 12:21:57.081883 scan_static_bus for USB2 port 4
1017 12:21:57.085179 scan_static_bus for USB2 port 4 done
1018 12:21:57.089027 scan_bus: bus USB2 port 4 finished in 6 msecs
1019 12:21:57.092210 USB3 port 1 scanning...
1020 12:21:57.095117 scan_static_bus for USB3 port 1
1021 12:21:57.098682 scan_static_bus for USB3 port 1 done
1022 12:21:57.105569 scan_bus: bus USB3 port 1 finished in 6 msecs
1023 12:21:57.108693 scan_static_bus for USB0 port 0 done
1024 12:21:57.112279 scan_bus: bus USB0 port 0 finished in 93 msecs
1025 12:21:57.115241 scan_static_bus for PCI: 00:14.0 done
1026 12:21:57.122231 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1027 12:21:57.122311 PCI: 00:14.3 scanning...
1028 12:21:57.125626 scan_static_bus for PCI: 00:14.3
1029 12:21:57.129523 GENERIC: 0.0 enabled
1030 12:21:57.132567 scan_static_bus for PCI: 00:14.3 done
1031 12:21:57.138730 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1032 12:21:57.138817 PCI: 00:15.0 scanning...
1033 12:21:57.142100 scan_static_bus for PCI: 00:15.0
1034 12:21:57.145498 I2C: 00:1a enabled
1035 12:21:57.148950 I2C: 00:31 enabled
1036 12:21:57.149027 I2C: 00:32 enabled
1037 12:21:57.152348 scan_static_bus for PCI: 00:15.0 done
1038 12:21:57.158924 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1039 12:21:57.161913 PCI: 00:15.1 scanning...
1040 12:21:57.165369 scan_static_bus for PCI: 00:15.1
1041 12:21:57.165448 I2C: 00:10 enabled
1042 12:21:57.168955 scan_static_bus for PCI: 00:15.1 done
1043 12:21:57.175566 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1044 12:21:57.178863 PCI: 00:15.2 scanning...
1045 12:21:57.181946 scan_static_bus for PCI: 00:15.2
1046 12:21:57.185290 scan_static_bus for PCI: 00:15.2 done
1047 12:21:57.188579 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1048 12:21:57.191805 PCI: 00:15.3 scanning...
1049 12:21:57.195460 scan_static_bus for PCI: 00:15.3
1050 12:21:57.198754 scan_static_bus for PCI: 00:15.3 done
1051 12:21:57.205141 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1052 12:21:57.205223 PCI: 00:19.1 scanning...
1053 12:21:57.208417 scan_static_bus for PCI: 00:19.1
1054 12:21:57.211947 I2C: 00:15 enabled
1055 12:21:57.214990 scan_static_bus for PCI: 00:19.1 done
1056 12:21:57.221648 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1057 12:21:57.221730 PCI: 00:1d.0 scanning...
1058 12:21:57.228105 do_pci_scan_bridge for PCI: 00:1d.0
1059 12:21:57.228184 PCI: pci_scan_bus for bus 01
1060 12:21:57.231720 PCI: 01:00.0 [1c5c/174a] enabled
1061 12:21:57.235010 GENERIC: 0.0 enabled
1062 12:21:57.238089 Enabling Common Clock Configuration
1063 12:21:57.244965 L1 Sub-State supported from root port 29
1064 12:21:57.245044 L1 Sub-State Support = 0xf
1065 12:21:57.248503 CommonModeRestoreTime = 0x28
1066 12:21:57.255055 Power On Value = 0x16, Power On Scale = 0x0
1067 12:21:57.255137 ASPM: Enabled L1
1068 12:21:57.258046 PCIe: Max_Payload_Size adjusted to 128
1069 12:21:57.265160 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1070 12:21:57.268064 PCI: 00:1e.2 scanning...
1071 12:21:57.271734 scan_generic_bus for PCI: 00:1e.2
1072 12:21:57.271810 SPI: 00 enabled
1073 12:21:57.278110 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1074 12:21:57.281182 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1075 12:21:57.284550 PCI: 00:1e.3 scanning...
1076 12:21:57.287783 scan_generic_bus for PCI: 00:1e.3
1077 12:21:57.291381 SPI: 00 enabled
1078 12:21:57.298164 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1079 12:21:57.301058 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1080 12:21:57.304580 PCI: 00:1f.0 scanning...
1081 12:21:57.307581 scan_static_bus for PCI: 00:1f.0
1082 12:21:57.311634 PNP: 0c09.0 enabled
1083 12:21:57.311715 PNP: 0c09.0 scanning...
1084 12:21:57.314730 scan_static_bus for PNP: 0c09.0
1085 12:21:57.317713 scan_static_bus for PNP: 0c09.0 done
1086 12:21:57.324279 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1087 12:21:57.327590 scan_static_bus for PCI: 00:1f.0 done
1088 12:21:57.331181 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1089 12:21:57.334453 PCI: 00:1f.2 scanning...
1090 12:21:57.337384 scan_static_bus for PCI: 00:1f.2
1091 12:21:57.340939 GENERIC: 0.0 enabled
1092 12:21:57.344134 GENERIC: 0.0 scanning...
1093 12:21:57.347647 scan_static_bus for GENERIC: 0.0
1094 12:21:57.347724 GENERIC: 0.0 enabled
1095 12:21:57.350680 GENERIC: 1.0 enabled
1096 12:21:57.354452 scan_static_bus for GENERIC: 0.0 done
1097 12:21:57.361134 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1098 12:21:57.364006 scan_static_bus for PCI: 00:1f.2 done
1099 12:21:57.367382 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1100 12:21:57.370909 PCI: 00:1f.3 scanning...
1101 12:21:57.373862 scan_static_bus for PCI: 00:1f.3
1102 12:21:57.377205 scan_static_bus for PCI: 00:1f.3 done
1103 12:21:57.384069 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1104 12:21:57.384153 PCI: 00:1f.5 scanning...
1105 12:21:57.387513 scan_generic_bus for PCI: 00:1f.5
1106 12:21:57.394127 scan_generic_bus for PCI: 00:1f.5 done
1107 12:21:57.397098 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1108 12:21:57.403783 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1109 12:21:57.407353 scan_static_bus for Root Device done
1110 12:21:57.410650 scan_bus: bus Root Device finished in 736 msecs
1111 12:21:57.410728 done
1112 12:21:57.416957 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1113 12:21:57.420571 Chrome EC: UHEPI supported
1114 12:21:57.427070 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1115 12:21:57.433516 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1116 12:21:57.437018 SPI flash protection: WPSW=0 SRP0=0
1117 12:21:57.440245 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1118 12:21:57.447034 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1119 12:21:57.450206 found VGA at PCI: 00:02.0
1120 12:21:57.453452 Setting up VGA for PCI: 00:02.0
1121 12:21:57.457118 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1122 12:21:57.463435 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1123 12:21:57.466974 Allocating resources...
1124 12:21:57.467053 Reading resources...
1125 12:21:57.473779 Root Device read_resources bus 0 link: 0
1126 12:21:57.476774 DOMAIN: 0000 read_resources bus 0 link: 0
1127 12:21:57.480155 PCI: 00:04.0 read_resources bus 1 link: 0
1128 12:21:57.487522 PCI: 00:04.0 read_resources bus 1 link: 0 done
1129 12:21:57.490427 PCI: 00:0d.0 read_resources bus 0 link: 0
1130 12:21:57.497601 USB0 port 0 read_resources bus 0 link: 0
1131 12:21:57.500696 USB0 port 0 read_resources bus 0 link: 0 done
1132 12:21:57.506923 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1133 12:21:57.510322 PCI: 00:14.0 read_resources bus 0 link: 0
1134 12:21:57.517192 USB0 port 0 read_resources bus 0 link: 0
1135 12:21:57.520212 USB0 port 0 read_resources bus 0 link: 0 done
1136 12:21:57.526740 PCI: 00:14.0 read_resources bus 0 link: 0 done
1137 12:21:57.530068 PCI: 00:14.3 read_resources bus 0 link: 0
1138 12:21:57.536853 PCI: 00:14.3 read_resources bus 0 link: 0 done
1139 12:21:57.540271 PCI: 00:15.0 read_resources bus 0 link: 0
1140 12:21:57.546859 PCI: 00:15.0 read_resources bus 0 link: 0 done
1141 12:21:57.550135 PCI: 00:15.1 read_resources bus 0 link: 0
1142 12:21:57.556592 PCI: 00:15.1 read_resources bus 0 link: 0 done
1143 12:21:57.560061 PCI: 00:19.1 read_resources bus 0 link: 0
1144 12:21:57.566589 PCI: 00:19.1 read_resources bus 0 link: 0 done
1145 12:21:57.570259 PCI: 00:1d.0 read_resources bus 1 link: 0
1146 12:21:57.576888 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1147 12:21:57.580424 PCI: 00:1e.2 read_resources bus 2 link: 0
1148 12:21:57.586995 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1149 12:21:57.590146 PCI: 00:1e.3 read_resources bus 3 link: 0
1150 12:21:57.596566 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1151 12:21:57.599736 PCI: 00:1f.0 read_resources bus 0 link: 0
1152 12:21:57.606664 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1153 12:21:57.610168 PCI: 00:1f.2 read_resources bus 0 link: 0
1154 12:21:57.613053 GENERIC: 0.0 read_resources bus 0 link: 0
1155 12:21:57.620176 GENERIC: 0.0 read_resources bus 0 link: 0 done
1156 12:21:57.623639 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1157 12:21:57.631400 DOMAIN: 0000 read_resources bus 0 link: 0 done
1158 12:21:57.634537 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1159 12:21:57.641249 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1160 12:21:57.644188 Root Device read_resources bus 0 link: 0 done
1161 12:21:57.647775 Done reading resources.
1162 12:21:57.653986 Show resources in subtree (Root Device)...After reading.
1163 12:21:57.657588 Root Device child on link 0 DOMAIN: 0000
1164 12:21:57.660843 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1165 12:21:57.670669 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1166 12:21:57.680779 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1167 12:21:57.683983 PCI: 00:00.0
1168 12:21:57.693745 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1169 12:21:57.700615 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1170 12:21:57.710548 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1171 12:21:57.720446 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1172 12:21:57.730620 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1173 12:21:57.740503 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1174 12:21:57.750279 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1175 12:21:57.756876 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1176 12:21:57.766979 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1177 12:21:57.776839 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1178 12:21:57.787131 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1179 12:21:57.796544 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1180 12:21:57.803580 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1181 12:21:57.813505 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1182 12:21:57.823086 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1183 12:21:57.833353 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1184 12:21:57.842979 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1185 12:21:57.852927 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1186 12:21:57.859525 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1187 12:21:57.869701 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1188 12:21:57.873356 PCI: 00:02.0
1189 12:21:57.882836 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:21:57.892860 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1191 12:21:57.902765 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1192 12:21:57.906231 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1193 12:21:57.916017 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1194 12:21:57.919373 GENERIC: 0.0
1195 12:21:57.919466 PCI: 00:05.0
1196 12:21:57.929194 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1197 12:21:57.935777 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1198 12:21:57.935872 GENERIC: 0.0
1199 12:21:57.939142 PCI: 00:08.0
1200 12:21:57.949280 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:21:57.949374 PCI: 00:0a.0
1202 12:21:57.952917 PCI: 00:0d.0 child on link 0 USB0 port 0
1203 12:21:57.962353 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:21:57.969065 USB0 port 0 child on link 0 USB3 port 0
1205 12:21:57.969186 USB3 port 0
1206 12:21:57.972023 USB3 port 1
1207 12:21:57.972114 USB3 port 2
1208 12:21:57.975800 USB3 port 3
1209 12:21:57.979042 PCI: 00:14.0 child on link 0 USB0 port 0
1210 12:21:57.988532 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1211 12:21:57.995265 USB0 port 0 child on link 0 USB2 port 0
1212 12:21:57.995359 USB2 port 0
1213 12:21:57.998581 USB2 port 1
1214 12:21:57.998670 USB2 port 2
1215 12:21:58.001917 USB2 port 3
1216 12:21:58.002042 USB2 port 4
1217 12:21:58.005286 USB2 port 5
1218 12:21:58.005383 USB2 port 6
1219 12:21:58.008843 USB2 port 7
1220 12:21:58.008932 USB2 port 8
1221 12:21:58.011895 USB2 port 9
1222 12:21:58.015045 USB3 port 0
1223 12:21:58.015133 USB3 port 1
1224 12:21:58.018393 USB3 port 2
1225 12:21:58.018482 USB3 port 3
1226 12:21:58.021851 PCI: 00:14.2
1227 12:21:58.031941 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 12:21:58.041895 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1229 12:21:58.045452 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1230 12:21:58.055409 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 12:21:58.058393 GENERIC: 0.0
1232 12:21:58.061424 PCI: 00:15.0 child on link 0 I2C: 00:1a
1233 12:21:58.071462 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:21:58.071553 I2C: 00:1a
1235 12:21:58.075238 I2C: 00:31
1236 12:21:58.075333 I2C: 00:32
1237 12:21:58.081745 PCI: 00:15.1 child on link 0 I2C: 00:10
1238 12:21:58.091713 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:21:58.091803 I2C: 00:10
1240 12:21:58.094629 PCI: 00:15.2
1241 12:21:58.104510 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:21:58.104602 PCI: 00:15.3
1243 12:21:58.114512 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 12:21:58.118074 PCI: 00:16.0
1245 12:21:58.127499 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:21:58.127589 PCI: 00:19.0
1247 12:21:58.130959 PCI: 00:19.1 child on link 0 I2C: 00:15
1248 12:21:58.140967 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:21:58.144573 I2C: 00:15
1250 12:21:58.148161 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1251 12:21:58.157723 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1252 12:21:58.167423 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1253 12:21:58.177334 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1254 12:21:58.177424 GENERIC: 0.0
1255 12:21:58.181020 PCI: 01:00.0
1256 12:21:58.190690 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 12:21:58.197070 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1258 12:21:58.207232 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1259 12:21:58.210620 PCI: 00:1e.0
1260 12:21:58.220613 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 12:21:58.223516 PCI: 00:1e.2 child on link 0 SPI: 00
1262 12:21:58.233458 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 12:21:58.237205 SPI: 00
1264 12:21:58.240254 PCI: 00:1e.3 child on link 0 SPI: 00
1265 12:21:58.250646 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 12:21:58.250737 SPI: 00
1267 12:21:58.256946 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 12:21:58.263871 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 12:21:58.267130 PNP: 0c09.0
1270 12:21:58.273228 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 12:21:58.279905 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 12:21:58.289902 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 12:21:58.297060 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 12:21:58.303404 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 12:21:58.303496 GENERIC: 0.0
1276 12:21:58.306369 GENERIC: 1.0
1277 12:21:58.306459 PCI: 00:1f.3
1278 12:21:58.316642 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 12:21:58.326324 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 12:21:58.329750 PCI: 00:1f.5
1281 12:21:58.339494 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 12:21:58.343042 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 12:21:58.343132 APIC: 00
1284 12:21:58.346542 APIC: 01
1285 12:21:58.346631 APIC: 03
1286 12:21:58.349437 APIC: 07
1287 12:21:58.349526 APIC: 05
1288 12:21:58.349596 APIC: 04
1289 12:21:58.352986 APIC: 02
1290 12:21:58.353075 APIC: 06
1291 12:21:58.359413 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 12:21:58.366405 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 12:21:58.373625 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 12:21:58.379917 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 12:21:58.383338 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 12:21:58.385955 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1297 12:21:58.392809 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1298 12:21:58.399632 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1299 12:21:58.406107 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1300 12:21:58.412579 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1301 12:21:58.422607 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1302 12:21:58.426074 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1303 12:21:58.435644 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1304 12:21:58.442281 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1305 12:21:58.449139 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1306 12:21:58.452254 DOMAIN: 0000: Resource ranges:
1307 12:21:58.456015 * Base: 1000, Size: 800, Tag: 100
1308 12:21:58.459080 * Base: 1900, Size: e700, Tag: 100
1309 12:21:58.465672 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1310 12:21:58.472156 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1311 12:21:58.479189 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1312 12:21:58.486237 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1313 12:21:58.495433 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1314 12:21:58.502328 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1315 12:21:58.508880 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1316 12:21:58.518972 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1317 12:21:58.525760 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1318 12:21:58.532132 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1319 12:21:58.541954 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1320 12:21:58.548291 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1321 12:21:58.555425 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1322 12:21:58.565165 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1323 12:21:58.571982 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1324 12:21:58.578320 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1325 12:21:58.588582 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1326 12:21:58.595419 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1327 12:21:58.601781 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1328 12:21:58.611851 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1329 12:21:58.618274 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1330 12:21:58.624910 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1331 12:21:58.635089 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1332 12:21:58.641275 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1333 12:21:58.648102 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1334 12:21:58.651493 DOMAIN: 0000: Resource ranges:
1335 12:21:58.657828 * Base: 7fc00000, Size: 40400000, Tag: 200
1336 12:21:58.661219 * Base: d0000000, Size: 28000000, Tag: 200
1337 12:21:58.665071 * Base: fa000000, Size: 1000000, Tag: 200
1338 12:21:58.671398 * Base: fb001000, Size: 2fff000, Tag: 200
1339 12:21:58.674996 * Base: fe010000, Size: 2e000, Tag: 200
1340 12:21:58.678147 * Base: fe03f000, Size: d41000, Tag: 200
1341 12:21:58.681071 * Base: fed88000, Size: 8000, Tag: 200
1342 12:21:58.684579 * Base: fed93000, Size: d000, Tag: 200
1343 12:21:58.691468 * Base: feda2000, Size: 1e000, Tag: 200
1344 12:21:58.694461 * Base: fede0000, Size: 1220000, Tag: 200
1345 12:21:58.697899 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1346 12:21:58.708075 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1347 12:21:58.714508 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1348 12:21:58.720931 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1349 12:21:58.727913 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1350 12:21:58.734647 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1351 12:21:58.741005 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1352 12:21:58.747857 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1353 12:21:58.754241 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1354 12:21:58.760708 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1355 12:21:58.767290 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1356 12:21:58.774081 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1357 12:21:58.780500 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1358 12:21:58.787340 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1359 12:21:58.793761 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1360 12:21:58.800489 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1361 12:21:58.807468 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1362 12:21:58.813520 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1363 12:21:58.820359 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1364 12:21:58.826975 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1365 12:21:58.833948 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1366 12:21:58.840255 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1367 12:21:58.847034 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1368 12:21:58.853726 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1369 12:21:58.860061 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1370 12:21:58.863729 PCI: 00:1d.0: Resource ranges:
1371 12:21:58.870181 * Base: 7fc00000, Size: 100000, Tag: 200
1372 12:21:58.876514 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1373 12:21:58.882742 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1374 12:21:58.889433 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1375 12:21:58.896501 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1376 12:21:58.902890 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1377 12:21:58.909570 Root Device assign_resources, bus 0 link: 0
1378 12:21:58.912606 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:21:58.922563 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1380 12:21:58.929414 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1381 12:21:58.935899 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1382 12:21:58.945721 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1383 12:21:58.949149 PCI: 00:04.0 assign_resources, bus 1 link: 0
1384 12:21:58.955808 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 12:21:58.962515 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1386 12:21:58.972268 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1387 12:21:58.979033 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1388 12:21:58.982308 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1389 12:21:58.989057 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 12:21:58.995598 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1391 12:21:59.002530 PCI: 00:14.0 assign_resources, bus 0 link: 0
1392 12:21:59.005710 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 12:21:59.015752 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1394 12:21:59.022081 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1395 12:21:59.032579 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1396 12:21:59.035544 PCI: 00:14.3 assign_resources, bus 0 link: 0
1397 12:21:59.038528 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 12:21:59.048614 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1399 12:21:59.052254 PCI: 00:15.0 assign_resources, bus 0 link: 0
1400 12:21:59.058289 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 12:21:59.065138 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1402 12:21:59.068232 PCI: 00:15.1 assign_resources, bus 0 link: 0
1403 12:21:59.075104 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 12:21:59.081525 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1405 12:21:59.091582 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1406 12:21:59.098208 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1407 12:21:59.108071 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1408 12:21:59.111486 PCI: 00:19.1 assign_resources, bus 0 link: 0
1409 12:21:59.118274 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 12:21:59.124271 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1411 12:21:59.134340 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1412 12:21:59.144171 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1413 12:21:59.147519 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1414 12:21:59.157320 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1415 12:21:59.164200 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1416 12:21:59.170645 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1417 12:21:59.177933 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1418 12:21:59.184339 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1419 12:21:59.190877 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1420 12:21:59.194505 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 12:21:59.204186 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1422 12:21:59.207343 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1423 12:21:59.210878 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 12:21:59.217883 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1425 12:21:59.220783 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 12:21:59.227316 LPC: Trying to open IO window from 800 size 1ff
1427 12:21:59.234077 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1428 12:21:59.244172 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1429 12:21:59.250492 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1430 12:21:59.257018 DOMAIN: 0000 assign_resources, bus 0 link: 0
1431 12:21:59.260396 Root Device assign_resources, bus 0 link: 0
1432 12:21:59.264014 Done setting resources.
1433 12:21:59.270518 Show resources in subtree (Root Device)...After assigning values.
1434 12:21:59.273991 Root Device child on link 0 DOMAIN: 0000
1435 12:21:59.276975 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1436 12:21:59.286987 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1437 12:21:59.297107 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1438 12:21:59.300501 PCI: 00:00.0
1439 12:21:59.310604 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1440 12:21:59.317115 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1441 12:21:59.326837 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1442 12:21:59.336927 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1443 12:21:59.347016 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1444 12:21:59.356643 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1445 12:21:59.366561 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1446 12:21:59.373631 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1447 12:21:59.383327 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1448 12:21:59.393310 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1449 12:21:59.402976 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1450 12:21:59.413184 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1451 12:21:59.419599 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1452 12:21:59.429448 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1453 12:21:59.439587 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1454 12:21:59.449399 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1455 12:21:59.459372 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1456 12:21:59.469290 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1457 12:21:59.476135 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1458 12:21:59.486095 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1459 12:21:59.489223 PCI: 00:02.0
1460 12:21:59.499908 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1461 12:21:59.509465 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1462 12:21:59.519279 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1463 12:21:59.522869 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1464 12:21:59.536233 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1465 12:21:59.536327 GENERIC: 0.0
1466 12:21:59.539196 PCI: 00:05.0
1467 12:21:59.549123 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1468 12:21:59.552657 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1469 12:21:59.555825 GENERIC: 0.0
1470 12:21:59.555909 PCI: 00:08.0
1471 12:21:59.565955 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1472 12:21:59.569152 PCI: 00:0a.0
1473 12:21:59.572450 PCI: 00:0d.0 child on link 0 USB0 port 0
1474 12:21:59.582245 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1475 12:21:59.588901 USB0 port 0 child on link 0 USB3 port 0
1476 12:21:59.588997 USB3 port 0
1477 12:21:59.592196 USB3 port 1
1478 12:21:59.592276 USB3 port 2
1479 12:21:59.595616 USB3 port 3
1480 12:21:59.599349 PCI: 00:14.0 child on link 0 USB0 port 0
1481 12:21:59.608943 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1482 12:21:59.615549 USB0 port 0 child on link 0 USB2 port 0
1483 12:21:59.615639 USB2 port 0
1484 12:21:59.618981 USB2 port 1
1485 12:21:59.619075 USB2 port 2
1486 12:21:59.621988 USB2 port 3
1487 12:21:59.622074 USB2 port 4
1488 12:21:59.625435 USB2 port 5
1489 12:21:59.625521 USB2 port 6
1490 12:21:59.628981 USB2 port 7
1491 12:21:59.629062 USB2 port 8
1492 12:21:59.632459 USB2 port 9
1493 12:21:59.632540 USB3 port 0
1494 12:21:59.635387 USB3 port 1
1495 12:21:59.635478 USB3 port 2
1496 12:21:59.639050 USB3 port 3
1497 12:21:59.639132 PCI: 00:14.2
1498 12:21:59.651989 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1499 12:21:59.662340 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1500 12:21:59.665529 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1501 12:21:59.675115 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1502 12:21:59.678547 GENERIC: 0.0
1503 12:21:59.681732 PCI: 00:15.0 child on link 0 I2C: 00:1a
1504 12:21:59.691949 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1505 12:21:59.695187 I2C: 00:1a
1506 12:21:59.695273 I2C: 00:31
1507 12:21:59.698261 I2C: 00:32
1508 12:21:59.701559 PCI: 00:15.1 child on link 0 I2C: 00:10
1509 12:21:59.711789 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1510 12:21:59.715025 I2C: 00:10
1511 12:21:59.715110 PCI: 00:15.2
1512 12:21:59.725104 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1513 12:21:59.728190 PCI: 00:15.3
1514 12:21:59.738084 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1515 12:21:59.738171 PCI: 00:16.0
1516 12:21:59.748041 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1517 12:21:59.751320 PCI: 00:19.0
1518 12:21:59.755004 PCI: 00:19.1 child on link 0 I2C: 00:15
1519 12:21:59.764524 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1520 12:21:59.768020 I2C: 00:15
1521 12:21:59.771026 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1522 12:21:59.781476 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1523 12:21:59.791200 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1524 12:21:59.804706 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1525 12:21:59.804804 GENERIC: 0.0
1526 12:21:59.807539 PCI: 01:00.0
1527 12:21:59.817682 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1528 12:21:59.827953 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1529 12:21:59.837252 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1530 12:21:59.840642 PCI: 00:1e.0
1531 12:21:59.850753 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1532 12:21:59.854982 PCI: 00:1e.2 child on link 0 SPI: 00
1533 12:21:59.863636 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1534 12:21:59.867316 SPI: 00
1535 12:21:59.870301 PCI: 00:1e.3 child on link 0 SPI: 00
1536 12:21:59.880220 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1537 12:21:59.880304 SPI: 00
1538 12:21:59.886776 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1539 12:21:59.893838 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1540 12:21:59.897204 PNP: 0c09.0
1541 12:21:59.907031 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1542 12:21:59.910035 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1543 12:21:59.920123 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1544 12:21:59.929951 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1545 12:21:59.933424 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1546 12:21:59.936416 GENERIC: 0.0
1547 12:21:59.936497 GENERIC: 1.0
1548 12:21:59.939942 PCI: 00:1f.3
1549 12:21:59.949892 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1550 12:21:59.960051 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1551 12:21:59.960148 PCI: 00:1f.5
1552 12:21:59.973123 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1553 12:21:59.976100 CPU_CLUSTER: 0 child on link 0 APIC: 00
1554 12:21:59.976182 APIC: 00
1555 12:21:59.979620 APIC: 01
1556 12:21:59.979699 APIC: 03
1557 12:21:59.979774 APIC: 07
1558 12:21:59.982706 APIC: 05
1559 12:21:59.982791 APIC: 04
1560 12:21:59.986478 APIC: 02
1561 12:21:59.986555 APIC: 06
1562 12:21:59.989475 Done allocating resources.
1563 12:21:59.996013 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1564 12:21:59.999545 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1565 12:22:00.006049 Configure GPIOs for I2S audio on UP4.
1566 12:22:00.012684 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1567 12:22:00.012771 Enabling resources...
1568 12:22:00.019388 PCI: 00:00.0 subsystem <- 8086/9a12
1569 12:22:00.019478 PCI: 00:00.0 cmd <- 06
1570 12:22:00.022729 PCI: 00:02.0 subsystem <- 8086/9a40
1571 12:22:00.025786 PCI: 00:02.0 cmd <- 03
1572 12:22:00.029294 PCI: 00:04.0 subsystem <- 8086/9a03
1573 12:22:00.032659 PCI: 00:04.0 cmd <- 02
1574 12:22:00.035574 PCI: 00:05.0 subsystem <- 8086/9a19
1575 12:22:00.039148 PCI: 00:05.0 cmd <- 02
1576 12:22:00.042150 PCI: 00:08.0 subsystem <- 8086/9a11
1577 12:22:00.045845 PCI: 00:08.0 cmd <- 06
1578 12:22:00.048870 PCI: 00:0d.0 subsystem <- 8086/9a13
1579 12:22:00.052498 PCI: 00:0d.0 cmd <- 02
1580 12:22:00.055371 PCI: 00:14.0 subsystem <- 8086/a0ed
1581 12:22:00.058894 PCI: 00:14.0 cmd <- 02
1582 12:22:00.062230 PCI: 00:14.2 subsystem <- 8086/a0ef
1583 12:22:00.062309 PCI: 00:14.2 cmd <- 02
1584 12:22:00.069118 PCI: 00:14.3 subsystem <- 8086/a0f0
1585 12:22:00.069204 PCI: 00:14.3 cmd <- 02
1586 12:22:00.072049 PCI: 00:15.0 subsystem <- 8086/a0e8
1587 12:22:00.075725 PCI: 00:15.0 cmd <- 02
1588 12:22:00.078791 PCI: 00:15.1 subsystem <- 8086/a0e9
1589 12:22:00.082004 PCI: 00:15.1 cmd <- 02
1590 12:22:00.085164 PCI: 00:15.2 subsystem <- 8086/a0ea
1591 12:22:00.088685 PCI: 00:15.2 cmd <- 02
1592 12:22:00.092096 PCI: 00:15.3 subsystem <- 8086/a0eb
1593 12:22:00.095133 PCI: 00:15.3 cmd <- 02
1594 12:22:00.098403 PCI: 00:16.0 subsystem <- 8086/a0e0
1595 12:22:00.102111 PCI: 00:16.0 cmd <- 02
1596 12:22:00.105285 PCI: 00:19.1 subsystem <- 8086/a0c6
1597 12:22:00.108537 PCI: 00:19.1 cmd <- 02
1598 12:22:00.111644 PCI: 00:1d.0 bridge ctrl <- 0013
1599 12:22:00.115200 PCI: 00:1d.0 subsystem <- 8086/a0b0
1600 12:22:00.115282 PCI: 00:1d.0 cmd <- 06
1601 12:22:00.122019 PCI: 00:1e.0 subsystem <- 8086/a0a8
1602 12:22:00.122103 PCI: 00:1e.0 cmd <- 06
1603 12:22:00.125365 PCI: 00:1e.2 subsystem <- 8086/a0aa
1604 12:22:00.128240 PCI: 00:1e.2 cmd <- 06
1605 12:22:00.131993 PCI: 00:1e.3 subsystem <- 8086/a0ab
1606 12:22:00.135063 PCI: 00:1e.3 cmd <- 02
1607 12:22:00.138059 PCI: 00:1f.0 subsystem <- 8086/a087
1608 12:22:00.141647 PCI: 00:1f.0 cmd <- 407
1609 12:22:00.145174 PCI: 00:1f.3 subsystem <- 8086/a0c8
1610 12:22:00.148163 PCI: 00:1f.3 cmd <- 02
1611 12:22:00.151453 PCI: 00:1f.5 subsystem <- 8086/a0a4
1612 12:22:00.155026 PCI: 00:1f.5 cmd <- 406
1613 12:22:00.158533 PCI: 01:00.0 cmd <- 02
1614 12:22:00.162898 done.
1615 12:22:00.166262 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1616 12:22:00.169692 Initializing devices...
1617 12:22:00.172854 Root Device init
1618 12:22:00.176431 Chrome EC: Set SMI mask to 0x0000000000000000
1619 12:22:00.183074 Chrome EC: clear events_b mask to 0x0000000000000000
1620 12:22:00.189479 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1621 12:22:00.193137 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1622 12:22:00.199772 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1623 12:22:00.206108 Chrome EC: Set WAKE mask to 0x0000000000000000
1624 12:22:00.209870 fw_config match found: DB_USB=USB3_ACTIVE
1625 12:22:00.216571 Configure Right Type-C port orientation for retimer
1626 12:22:00.219579 Root Device init finished in 42 msecs
1627 12:22:00.223028 PCI: 00:00.0 init
1628 12:22:00.223448 CPU TDP = 9 Watts
1629 12:22:00.226478 CPU PL1 = 9 Watts
1630 12:22:00.229558 CPU PL2 = 40 Watts
1631 12:22:00.229970 CPU PL4 = 83 Watts
1632 12:22:00.232797 PCI: 00:00.0 init finished in 8 msecs
1633 12:22:00.236326 PCI: 00:02.0 init
1634 12:22:00.239310 GMA: Found VBT in CBFS
1635 12:22:00.242799 GMA: Found valid VBT in CBFS
1636 12:22:00.245970 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1637 12:22:00.255957 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1638 12:22:00.259582 PCI: 00:02.0 init finished in 18 msecs
1639 12:22:00.262629 PCI: 00:05.0 init
1640 12:22:00.266191 PCI: 00:05.0 init finished in 0 msecs
1641 12:22:00.266646 PCI: 00:08.0 init
1642 12:22:00.272771 PCI: 00:08.0 init finished in 0 msecs
1643 12:22:00.273231 PCI: 00:14.0 init
1644 12:22:00.279713 PCI: 00:14.0 init finished in 0 msecs
1645 12:22:00.280171 PCI: 00:14.2 init
1646 12:22:00.282633 PCI: 00:14.2 init finished in 0 msecs
1647 12:22:00.286472 PCI: 00:15.0 init
1648 12:22:00.289618 I2C bus 0 version 0x3230302a
1649 12:22:00.293259 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1650 12:22:00.296303 PCI: 00:15.0 init finished in 6 msecs
1651 12:22:00.299386 PCI: 00:15.1 init
1652 12:22:00.302977 I2C bus 1 version 0x3230302a
1653 12:22:00.306532 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1654 12:22:00.309783 PCI: 00:15.1 init finished in 6 msecs
1655 12:22:00.313006 PCI: 00:15.2 init
1656 12:22:00.316618 I2C bus 2 version 0x3230302a
1657 12:22:00.319851 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1658 12:22:00.322717 PCI: 00:15.2 init finished in 6 msecs
1659 12:22:00.323197 PCI: 00:15.3 init
1660 12:22:00.326532 I2C bus 3 version 0x3230302a
1661 12:22:00.330179 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1662 12:22:00.335918 PCI: 00:15.3 init finished in 6 msecs
1663 12:22:00.336402 PCI: 00:16.0 init
1664 12:22:00.339166 PCI: 00:16.0 init finished in 0 msecs
1665 12:22:00.343121 PCI: 00:19.1 init
1666 12:22:00.346582 I2C bus 5 version 0x3230302a
1667 12:22:00.349849 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1668 12:22:00.352820 PCI: 00:19.1 init finished in 6 msecs
1669 12:22:00.356163 PCI: 00:1d.0 init
1670 12:22:00.359615 Initializing PCH PCIe bridge.
1671 12:22:00.362992 PCI: 00:1d.0 init finished in 3 msecs
1672 12:22:00.366580 PCI: 00:1f.0 init
1673 12:22:00.369625 IOAPIC: Initializing IOAPIC at 0xfec00000
1674 12:22:00.376390 IOAPIC: Bootstrap Processor Local APIC = 0x00
1675 12:22:00.376851 IOAPIC: ID = 0x02
1676 12:22:00.379855 IOAPIC: Dumping registers
1677 12:22:00.383051 reg 0x0000: 0x02000000
1678 12:22:00.383537 reg 0x0001: 0x00770020
1679 12:22:00.386149 reg 0x0002: 0x00000000
1680 12:22:00.389635 PCI: 00:1f.0 init finished in 21 msecs
1681 12:22:00.393360 PCI: 00:1f.2 init
1682 12:22:00.396440 Disabling ACPI via APMC.
1683 12:22:00.400252 APMC done.
1684 12:22:00.403562 PCI: 00:1f.2 init finished in 6 msecs
1685 12:22:00.415557 PCI: 01:00.0 init
1686 12:22:00.418867 PCI: 01:00.0 init finished in 0 msecs
1687 12:22:00.421801 PNP: 0c09.0 init
1688 12:22:00.425328 Google Chrome EC uptime: 8.442 seconds
1689 12:22:00.431920 Google Chrome AP resets since EC boot: 0
1690 12:22:00.435089 Google Chrome most recent AP reset causes:
1691 12:22:00.441715 Google Chrome EC reset flags at last EC boot: reset-pin
1692 12:22:00.445051 PNP: 0c09.0 init finished in 18 msecs
1693 12:22:00.449901 Devices initialized
1694 12:22:00.453214 Show all devs... After init.
1695 12:22:00.456476 Root Device: enabled 1
1696 12:22:00.456940 DOMAIN: 0000: enabled 1
1697 12:22:00.459869 CPU_CLUSTER: 0: enabled 1
1698 12:22:00.463113 PCI: 00:00.0: enabled 1
1699 12:22:00.466017 PCI: 00:02.0: enabled 1
1700 12:22:00.466477 PCI: 00:04.0: enabled 1
1701 12:22:00.469356 PCI: 00:05.0: enabled 1
1702 12:22:00.472511 PCI: 00:06.0: enabled 0
1703 12:22:00.476012 PCI: 00:07.0: enabled 0
1704 12:22:00.476526 PCI: 00:07.1: enabled 0
1705 12:22:00.479256 PCI: 00:07.2: enabled 0
1706 12:22:00.482694 PCI: 00:07.3: enabled 0
1707 12:22:00.486101 PCI: 00:08.0: enabled 1
1708 12:22:00.486587 PCI: 00:09.0: enabled 0
1709 12:22:00.489145 PCI: 00:0a.0: enabled 0
1710 12:22:00.492736 PCI: 00:0d.0: enabled 1
1711 12:22:00.495793 PCI: 00:0d.1: enabled 0
1712 12:22:00.496257 PCI: 00:0d.2: enabled 0
1713 12:22:00.498749 PCI: 00:0d.3: enabled 0
1714 12:22:00.502574 PCI: 00:0e.0: enabled 0
1715 12:22:00.505470 PCI: 00:10.2: enabled 1
1716 12:22:00.505933 PCI: 00:10.6: enabled 0
1717 12:22:00.509035 PCI: 00:10.7: enabled 0
1718 12:22:00.512519 PCI: 00:12.0: enabled 0
1719 12:22:00.515629 PCI: 00:12.6: enabled 0
1720 12:22:00.516090 PCI: 00:13.0: enabled 0
1721 12:22:00.519043 PCI: 00:14.0: enabled 1
1722 12:22:00.522190 PCI: 00:14.1: enabled 0
1723 12:22:00.522655 PCI: 00:14.2: enabled 1
1724 12:22:00.525734 PCI: 00:14.3: enabled 1
1725 12:22:00.529229 PCI: 00:15.0: enabled 1
1726 12:22:00.532296 PCI: 00:15.1: enabled 1
1727 12:22:00.532799 PCI: 00:15.2: enabled 1
1728 12:22:00.535414 PCI: 00:15.3: enabled 1
1729 12:22:00.538946 PCI: 00:16.0: enabled 1
1730 12:22:00.542190 PCI: 00:16.1: enabled 0
1731 12:22:00.542715 PCI: 00:16.2: enabled 0
1732 12:22:00.545172 PCI: 00:16.3: enabled 0
1733 12:22:00.548767 PCI: 00:16.4: enabled 0
1734 12:22:00.552059 PCI: 00:16.5: enabled 0
1735 12:22:00.552576 PCI: 00:17.0: enabled 0
1736 12:22:00.555334 PCI: 00:19.0: enabled 0
1737 12:22:00.558800 PCI: 00:19.1: enabled 1
1738 12:22:00.561891 PCI: 00:19.2: enabled 0
1739 12:22:00.562362 PCI: 00:1c.0: enabled 1
1740 12:22:00.565365 PCI: 00:1c.1: enabled 0
1741 12:22:00.568385 PCI: 00:1c.2: enabled 0
1742 12:22:00.568902 PCI: 00:1c.3: enabled 0
1743 12:22:00.571706 PCI: 00:1c.4: enabled 0
1744 12:22:00.575283 PCI: 00:1c.5: enabled 0
1745 12:22:00.578435 PCI: 00:1c.6: enabled 1
1746 12:22:00.578907 PCI: 00:1c.7: enabled 0
1747 12:22:00.581881 PCI: 00:1d.0: enabled 1
1748 12:22:00.585174 PCI: 00:1d.1: enabled 0
1749 12:22:00.588163 PCI: 00:1d.2: enabled 1
1750 12:22:00.588724 PCI: 00:1d.3: enabled 0
1751 12:22:00.591797 PCI: 00:1e.0: enabled 1
1752 12:22:00.594971 PCI: 00:1e.1: enabled 0
1753 12:22:00.598400 PCI: 00:1e.2: enabled 1
1754 12:22:00.598841 PCI: 00:1e.3: enabled 1
1755 12:22:00.601441 PCI: 00:1f.0: enabled 1
1756 12:22:00.605011 PCI: 00:1f.1: enabled 0
1757 12:22:00.607938 PCI: 00:1f.2: enabled 1
1758 12:22:00.608429 PCI: 00:1f.3: enabled 1
1759 12:22:00.611630 PCI: 00:1f.4: enabled 0
1760 12:22:00.615250 PCI: 00:1f.5: enabled 1
1761 12:22:00.615704 PCI: 00:1f.6: enabled 0
1762 12:22:00.618371 PCI: 00:1f.7: enabled 0
1763 12:22:00.621409 APIC: 00: enabled 1
1764 12:22:00.624639 GENERIC: 0.0: enabled 1
1765 12:22:00.625138 GENERIC: 0.0: enabled 1
1766 12:22:00.628031 GENERIC: 1.0: enabled 1
1767 12:22:00.631489 GENERIC: 0.0: enabled 1
1768 12:22:00.634630 GENERIC: 1.0: enabled 1
1769 12:22:00.635125 USB0 port 0: enabled 1
1770 12:22:00.638430 GENERIC: 0.0: enabled 1
1771 12:22:00.641320 USB0 port 0: enabled 1
1772 12:22:00.641818 GENERIC: 0.0: enabled 1
1773 12:22:00.644964 I2C: 00:1a: enabled 1
1774 12:22:00.647971 I2C: 00:31: enabled 1
1775 12:22:00.648520 I2C: 00:32: enabled 1
1776 12:22:00.651414 I2C: 00:10: enabled 1
1777 12:22:00.654883 I2C: 00:15: enabled 1
1778 12:22:00.657895 GENERIC: 0.0: enabled 0
1779 12:22:00.658392 GENERIC: 1.0: enabled 0
1780 12:22:00.661482 GENERIC: 0.0: enabled 1
1781 12:22:00.664855 SPI: 00: enabled 1
1782 12:22:00.665308 SPI: 00: enabled 1
1783 12:22:00.668106 PNP: 0c09.0: enabled 1
1784 12:22:00.671369 GENERIC: 0.0: enabled 1
1785 12:22:00.671818 USB3 port 0: enabled 1
1786 12:22:00.674545 USB3 port 1: enabled 1
1787 12:22:00.677942 USB3 port 2: enabled 0
1788 12:22:00.678393 USB3 port 3: enabled 0
1789 12:22:00.681553 USB2 port 0: enabled 0
1790 12:22:00.684554 USB2 port 1: enabled 1
1791 12:22:00.688392 USB2 port 2: enabled 1
1792 12:22:00.688870 USB2 port 3: enabled 0
1793 12:22:00.691696 USB2 port 4: enabled 1
1794 12:22:00.694636 USB2 port 5: enabled 0
1795 12:22:00.695088 USB2 port 6: enabled 0
1796 12:22:00.698215 USB2 port 7: enabled 0
1797 12:22:00.701355 USB2 port 8: enabled 0
1798 12:22:00.701805 USB2 port 9: enabled 0
1799 12:22:00.704570 USB3 port 0: enabled 0
1800 12:22:00.707826 USB3 port 1: enabled 1
1801 12:22:00.711400 USB3 port 2: enabled 0
1802 12:22:00.711851 USB3 port 3: enabled 0
1803 12:22:00.714396 GENERIC: 0.0: enabled 1
1804 12:22:00.718221 GENERIC: 1.0: enabled 1
1805 12:22:00.718685 APIC: 01: enabled 1
1806 12:22:00.721217 APIC: 03: enabled 1
1807 12:22:00.724636 APIC: 07: enabled 1
1808 12:22:00.725157 APIC: 05: enabled 1
1809 12:22:00.727862 APIC: 04: enabled 1
1810 12:22:00.728349 APIC: 02: enabled 1
1811 12:22:00.731175 APIC: 06: enabled 1
1812 12:22:00.734768 PCI: 01:00.0: enabled 1
1813 12:22:00.737725 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1814 12:22:00.744578 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1815 12:22:00.747414 ELOG: NV offset 0xf30000 size 0x1000
1816 12:22:00.754716 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1817 12:22:00.761200 ELOG: Event(17) added with size 13 at 2023-03-13 12:22:00 UTC
1818 12:22:00.768152 ELOG: Event(92) added with size 9 at 2023-03-13 12:22:00 UTC
1819 12:22:00.774560 ELOG: Event(93) added with size 9 at 2023-03-13 12:22:00 UTC
1820 12:22:00.781241 ELOG: Event(9E) added with size 10 at 2023-03-13 12:22:00 UTC
1821 12:22:00.787639 ELOG: Event(9F) added with size 14 at 2023-03-13 12:22:00 UTC
1822 12:22:00.794172 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1823 12:22:00.800906 ELOG: Event(A1) added with size 10 at 2023-03-13 12:22:00 UTC
1824 12:22:00.807624 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1825 12:22:00.814372 ELOG: Event(A0) added with size 9 at 2023-03-13 12:22:00 UTC
1826 12:22:00.817796 elog_add_boot_reason: Logged dev mode boot
1827 12:22:00.824385 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1828 12:22:00.824856 Finalize devices...
1829 12:22:00.827443 Devices finalized
1830 12:22:00.834176 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1831 12:22:00.837328 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1832 12:22:00.843943 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1833 12:22:00.847411 ME: HFSTS1 : 0x80030055
1834 12:22:00.853988 ME: HFSTS2 : 0x30280116
1835 12:22:00.857018 ME: HFSTS3 : 0x00000050
1836 12:22:00.860558 ME: HFSTS4 : 0x00004000
1837 12:22:00.867300 ME: HFSTS5 : 0x00000000
1838 12:22:00.870500 ME: HFSTS6 : 0x00400006
1839 12:22:00.874002 ME: Manufacturing Mode : YES
1840 12:22:00.876944 ME: SPI Protection Mode Enabled : NO
1841 12:22:00.883828 ME: FW Partition Table : OK
1842 12:22:00.887238 ME: Bringup Loader Failure : NO
1843 12:22:00.890360 ME: Firmware Init Complete : NO
1844 12:22:00.893977 ME: Boot Options Present : NO
1845 12:22:00.897034 ME: Update In Progress : NO
1846 12:22:00.900187 ME: D0i3 Support : YES
1847 12:22:00.903873 ME: Low Power State Enabled : NO
1848 12:22:00.906800 ME: CPU Replaced : YES
1849 12:22:00.913092 ME: CPU Replacement Valid : YES
1850 12:22:00.916796 ME: Current Working State : 5
1851 12:22:00.919808 ME: Current Operation State : 1
1852 12:22:00.923487 ME: Current Operation Mode : 3
1853 12:22:00.926750 ME: Error Code : 0
1854 12:22:00.929729 ME: Enhanced Debug Mode : NO
1855 12:22:00.933264 ME: CPU Debug Disabled : YES
1856 12:22:00.936574 ME: TXT Support : NO
1857 12:22:00.943031 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1858 12:22:00.949603 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1859 12:22:00.953348 CBFS: 'fallback/slic' not found.
1860 12:22:00.959837 ACPI: Writing ACPI tables at 76b01000.
1861 12:22:00.959924 ACPI: * FACS
1862 12:22:00.962917 ACPI: * DSDT
1863 12:22:00.966430 Ramoops buffer: 0x100000@0x76a00000.
1864 12:22:00.969379 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1865 12:22:00.976108 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1866 12:22:00.979553 Google Chrome EC: version:
1867 12:22:00.983059 ro: voema_v2.0.10114-a447f03e46
1868 12:22:00.986194 rw: voema_v2.0.10114-a447f03e46
1869 12:22:00.986282 running image: 1
1870 12:22:00.992643 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1871 12:22:00.997272 ACPI: * FADT
1872 12:22:00.997358 SCI is IRQ9
1873 12:22:01.003677 ACPI: added table 1/32, length now 40
1874 12:22:01.003765 ACPI: * SSDT
1875 12:22:01.007281 Found 1 CPU(s) with 8 core(s) each.
1876 12:22:01.013704 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1877 12:22:01.017251 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1878 12:22:01.020232 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1879 12:22:01.023839 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1880 12:22:01.030828 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1881 12:22:01.036986 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1882 12:22:01.040155 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1883 12:22:01.047187 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1884 12:22:01.053778 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1885 12:22:01.056610 \_SB.PCI0.RP09: Added StorageD3Enable property
1886 12:22:01.063338 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1887 12:22:01.066972 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1888 12:22:01.073333 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1889 12:22:01.077006 PS2K: Passing 80 keymaps to kernel
1890 12:22:01.083617 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1891 12:22:01.090201 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1892 12:22:01.096874 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1893 12:22:01.103101 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1894 12:22:01.110024 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1895 12:22:01.116235 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1896 12:22:01.123106 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1897 12:22:01.129733 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 12:22:01.133398 ACPI: added table 2/32, length now 44
1899 12:22:01.133487 ACPI: * MCFG
1900 12:22:01.136438 ACPI: added table 3/32, length now 48
1901 12:22:01.139688 ACPI: * TPM2
1902 12:22:01.142931 TPM2 log created at 0x769f0000
1903 12:22:01.146294 ACPI: added table 4/32, length now 52
1904 12:22:01.149963 ACPI: * MADT
1905 12:22:01.150052 SCI is IRQ9
1906 12:22:01.153036 ACPI: added table 5/32, length now 56
1907 12:22:01.156694 current = 76b09850
1908 12:22:01.156774 ACPI: * DMAR
1909 12:22:01.159678 ACPI: added table 6/32, length now 60
1910 12:22:01.163326 ACPI: added table 7/32, length now 64
1911 12:22:01.166367 ACPI: * HPET
1912 12:22:01.169826 ACPI: added table 8/32, length now 68
1913 12:22:01.172827 ACPI: done.
1914 12:22:01.172913 ACPI tables: 35216 bytes.
1915 12:22:01.176227 smbios_write_tables: 769ef000
1916 12:22:01.180792 EC returned error result code 3
1917 12:22:01.183709 Couldn't obtain OEM name from CBI
1918 12:22:01.187780 Create SMBIOS type 16
1919 12:22:01.191107 Create SMBIOS type 17
1920 12:22:01.194590 GENERIC: 0.0 (WIFI Device)
1921 12:22:01.197473 SMBIOS tables: 1750 bytes.
1922 12:22:01.200837 Writing table forward entry at 0x00000500
1923 12:22:01.207625 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1924 12:22:01.211036 Writing coreboot table at 0x76b25000
1925 12:22:01.217440 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1926 12:22:01.220738 1. 0000000000001000-000000000009ffff: RAM
1927 12:22:01.223887 2. 00000000000a0000-00000000000fffff: RESERVED
1928 12:22:01.230447 3. 0000000000100000-00000000769eefff: RAM
1929 12:22:01.233968 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1930 12:22:01.240531 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1931 12:22:01.247038 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1932 12:22:01.250465 7. 0000000077000000-000000007fbfffff: RESERVED
1933 12:22:01.256828 8. 00000000c0000000-00000000cfffffff: RESERVED
1934 12:22:01.260551 9. 00000000f8000000-00000000f9ffffff: RESERVED
1935 12:22:01.263579 10. 00000000fb000000-00000000fb000fff: RESERVED
1936 12:22:01.270244 11. 00000000fe000000-00000000fe00ffff: RESERVED
1937 12:22:01.273828 12. 00000000fed80000-00000000fed87fff: RESERVED
1938 12:22:01.279998 13. 00000000fed90000-00000000fed92fff: RESERVED
1939 12:22:01.283616 14. 00000000feda0000-00000000feda1fff: RESERVED
1940 12:22:01.290350 15. 00000000fedc0000-00000000feddffff: RESERVED
1941 12:22:01.293323 16. 0000000100000000-00000002803fffff: RAM
1942 12:22:01.296785 Passing 4 GPIOs to payload:
1943 12:22:01.300336 NAME | PORT | POLARITY | VALUE
1944 12:22:01.306857 lid | undefined | high | high
1945 12:22:01.313471 power | undefined | high | low
1946 12:22:01.317000 oprom | undefined | high | low
1947 12:22:01.323576 EC in RW | 0x000000e5 | high | low
1948 12:22:01.329860 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 469d
1949 12:22:01.332986 coreboot table: 1576 bytes.
1950 12:22:01.336699 IMD ROOT 0. 0x76fff000 0x00001000
1951 12:22:01.339813 IMD SMALL 1. 0x76ffe000 0x00001000
1952 12:22:01.343187 FSP MEMORY 2. 0x76c4e000 0x003b0000
1953 12:22:01.346641 VPD 3. 0x76c4d000 0x00000367
1954 12:22:01.349837 RO MCACHE 4. 0x76c4c000 0x00000fdc
1955 12:22:01.353276 CONSOLE 5. 0x76c2c000 0x00020000
1956 12:22:01.356213 FMAP 6. 0x76c2b000 0x00000578
1957 12:22:01.363080 TIME STAMP 7. 0x76c2a000 0x00000910
1958 12:22:01.366129 VBOOT WORK 8. 0x76c16000 0x00014000
1959 12:22:01.370028 ROMSTG STCK 9. 0x76c15000 0x00001000
1960 12:22:01.372863 AFTER CAR 10. 0x76c0a000 0x0000b000
1961 12:22:01.376474 RAMSTAGE 11. 0x76b97000 0x00073000
1962 12:22:01.379591 REFCODE 12. 0x76b42000 0x00055000
1963 12:22:01.382787 SMM BACKUP 13. 0x76b32000 0x00010000
1964 12:22:01.386489 4f444749 14. 0x76b30000 0x00002000
1965 12:22:01.389494 EXT VBT15. 0x76b2d000 0x0000219f
1966 12:22:01.396063 COREBOOT 16. 0x76b25000 0x00008000
1967 12:22:01.399496 ACPI 17. 0x76b01000 0x00024000
1968 12:22:01.403106 ACPI GNVS 18. 0x76b00000 0x00001000
1969 12:22:01.406116 RAMOOPS 19. 0x76a00000 0x00100000
1970 12:22:01.409557 TPM2 TCGLOG20. 0x769f0000 0x00010000
1971 12:22:01.413116 SMBIOS 21. 0x769ef000 0x00000800
1972 12:22:01.416333 IMD small region:
1973 12:22:01.419466 IMD ROOT 0. 0x76ffec00 0x00000400
1974 12:22:01.422693 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 12:22:01.425873 POWER STATE 2. 0x76ffeb80 0x00000044
1976 12:22:01.429239 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 12:22:01.436150 MEM INFO 4. 0x76ffe980 0x000001e0
1978 12:22:01.439377 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1979 12:22:01.442462 MTRR: Physical address space:
1980 12:22:01.448951 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 12:22:01.455578 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 12:22:01.462510 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 12:22:01.469188 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 12:22:01.475819 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 12:22:01.482517 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 12:22:01.488945 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1987 12:22:01.492527 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:22:01.495630 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:22:01.499008 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:22:01.502135 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:22:01.509026 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:22:01.511980 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:22:01.515825 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:22:01.518958 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:22:01.525689 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:22:01.528953 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:22:01.532017 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:22:01.535536 call enable_fixed_mtrr()
1999 12:22:01.538928 CPU physical address size: 39 bits
2000 12:22:01.545430 MTRR: default type WB/UC MTRR counts: 6/6.
2001 12:22:01.549079 MTRR: UC selected as default type.
2002 12:22:01.555669 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2003 12:22:01.558773 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2004 12:22:01.565499 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2005 12:22:01.572102 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2006 12:22:01.578865 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2007 12:22:01.585218 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2008 12:22:01.585307
2009 12:22:01.588669 MTRR check
2010 12:22:01.592051 Fixed MTRRs : Enabled
2011 12:22:01.592140 Variable MTRRs: Enabled
2012 12:22:01.592209
2013 12:22:01.598689 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:22:01.601776 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 12:22:01.605414 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 12:22:01.608194 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 12:22:01.615121 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 12:22:01.618617 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 12:22:01.621684 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 12:22:01.624793 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 12:22:01.628465 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 12:22:01.635089 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 12:22:01.638359 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 12:22:01.644812 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2025 12:22:01.648086 call enable_fixed_mtrr()
2026 12:22:01.651604 Checking cr50 for pending updates
2027 12:22:01.655307 CPU physical address size: 39 bits
2028 12:22:01.658632 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 12:22:01.662229 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 12:22:01.665854 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:22:01.672060 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 12:22:01.675760 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 12:22:01.678544 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 12:22:01.682178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 12:22:01.688624 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 12:22:01.691825 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 12:22:01.695222 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 12:22:01.698597 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 12:22:01.705038 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 12:22:01.708450 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 12:22:01.711943 call enable_fixed_mtrr()
2042 12:22:01.714907 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 12:22:01.718374 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 12:22:01.725003 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 12:22:01.728587 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 12:22:01.731658 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 12:22:01.735275 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 12:22:01.741484 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 12:22:01.745093 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 12:22:01.748083 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 12:22:01.751742 CPU physical address size: 39 bits
2052 12:22:01.756195 call enable_fixed_mtrr()
2053 12:22:01.759032 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 12:22:01.765641 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 12:22:01.769166 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:22:01.772197 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:22:01.775631 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 12:22:01.782592 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 12:22:01.785834 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 12:22:01.788764 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 12:22:01.792231 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 12:22:01.798814 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 12:22:01.802101 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 12:22:01.805574 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 12:22:01.812134 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 12:22:01.812229 call enable_fixed_mtrr()
2067 12:22:01.819081 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 12:22:01.821974 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 12:22:01.825530 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 12:22:01.828698 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 12:22:01.835710 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 12:22:01.838582 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 12:22:01.841946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 12:22:01.845521 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 12:22:01.848533 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 12:22:01.855342 CPU physical address size: 39 bits
2077 12:22:01.859118 call enable_fixed_mtrr()
2078 12:22:01.863245 Reading cr50 TPM mode
2079 12:22:01.863331 CPU physical address size: 39 bits
2080 12:22:01.866875 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 12:22:01.873245 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 12:22:01.876462 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 12:22:01.879844 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 12:22:01.883320 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 12:22:01.890239 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 12:22:01.893404 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 12:22:01.896853 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 12:22:01.899924 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 12:22:01.906560 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 12:22:01.909810 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 12:22:01.913470 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 12:22:01.919958 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 12:22:01.920043 call enable_fixed_mtrr()
2094 12:22:01.922926 CPU physical address size: 39 bits
2095 12:22:01.929967 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2096 12:22:01.933001 CPU physical address size: 39 bits
2097 12:22:01.940511 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 12:22:01.946990 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 12:22:01.949916 MTRR: Fixed MSR 0x268 0x0606060606060606
2100 12:22:01.953270 MTRR: Fixed MSR 0x269 0x0606060606060606
2101 12:22:01.959888 MTRR: Fixed MSR 0x26a 0x0606060606060606
2102 12:22:01.963249 MTRR: Fixed MSR 0x26b 0x0606060606060606
2103 12:22:01.966540 MTRR: Fixed MSR 0x26c 0x0606060606060606
2104 12:22:01.969944 MTRR: Fixed MSR 0x26d 0x0606060606060606
2105 12:22:01.976830 MTRR: Fixed MSR 0x26e 0x0606060606060606
2106 12:22:01.980414 MTRR: Fixed MSR 0x26f 0x0606060606060606
2107 12:22:01.983002 Checking segment from ROM address 0xffc02b38
2108 12:22:01.986420 call enable_fixed_mtrr()
2109 12:22:01.989492 Checking segment from ROM address 0xffc02b54
2110 12:22:01.992922 CPU physical address size: 39 bits
2111 12:22:01.999814 Loading segment from ROM address 0xffc02b38
2112 12:22:01.999900 code (compression=0)
2113 12:22:02.009359 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 12:22:02.019316 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 12:22:02.019405 it's not compressed!
2116 12:22:02.159694 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 12:22:02.166002 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 12:22:02.172869 Loading segment from ROM address 0xffc02b54
2119 12:22:02.172959 Entry Point 0x30000000
2120 12:22:02.176017 Loaded segments
2121 12:22:02.182933 BS: BS_PAYLOAD_LOAD run times (exec / console): 183 / 63 ms
2122 12:22:02.225927 Finalizing chipset.
2123 12:22:02.229295 Finalizing SMM.
2124 12:22:02.229796 APMC done.
2125 12:22:02.235661 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 12:22:02.239033 mp_park_aps done after 0 msecs.
2127 12:22:02.242464 Jumping to boot code at 0x30000000(0x76b25000)
2128 12:22:02.252572 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 12:22:02.253081
2130 12:22:02.253518
2131 12:22:02.255862
2132 12:22:02.256365 Starting depthcharge on Voema...
2133 12:22:02.257521 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2134 12:22:02.258084 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2135 12:22:02.258549 Setting prompt string to ['volteer:']
2136 12:22:02.258988 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2137 12:22:02.259829
2138 12:22:02.265516 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2139 12:22:02.266001
2140 12:22:02.272426 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2141 12:22:02.272889
2142 12:22:02.279135 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2143 12:22:02.279593
2144 12:22:02.282031 Failed to find eMMC card reader
2145 12:22:02.282492
2146 12:22:02.282885 Wipe memory regions:
2147 12:22:02.285470
2148 12:22:02.288739 [0x00000000001000, 0x000000000a0000)
2149 12:22:02.289226
2150 12:22:02.291977 [0x00000000100000, 0x00000030000000)
2151 12:22:02.317506
2152 12:22:02.320392 [0x00000032662db0, 0x000000769ef000)
2153 12:22:02.356424
2154 12:22:02.360031 [0x00000100000000, 0x00000280400000)
2155 12:22:02.559617
2156 12:22:02.562525 ec_init: CrosEC protocol v3 supported (256, 256)
2157 12:22:02.994872
2158 12:22:02.995414 R8152: Initializing
2159 12:22:02.995771
2160 12:22:02.997869 Version 6 (ocp_data = 5c30)
2161 12:22:02.998436
2162 12:22:03.001398 R8152: Done initializing
2163 12:22:03.001904
2164 12:22:03.004514 Adding net device
2165 12:22:03.305865
2166 12:22:03.309243 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2167 12:22:03.309716
2168 12:22:03.310110
2169 12:22:03.310504
2170 12:22:03.312737 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 12:22:03.414495 volteer: tftpboot 192.168.201.1 9584162/tftp-deploy-uubqlmbo/kernel/bzImage 9584162/tftp-deploy-uubqlmbo/kernel/cmdline 9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
2173 12:22:03.415131 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:22:03.415624 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2175 12:22:03.420389 tftpboot 192.168.201.1 9584162/tftp-deploy-uubqlmbo/kernel/bzImoy-uubqlmbo/kernel/cmdline 9584162/tftp-deploy-uubqlmbo/ramdisk/ramdisk.cpio.gz
2176 12:22:03.420848
2177 12:22:03.421209 Waiting for link
2178 12:22:03.623388
2179 12:22:03.623991 done.
2180 12:22:03.624421
2181 12:22:03.624814 MAC: 00:24:32:30:77:76
2182 12:22:03.625152
2183 12:22:03.626185 Sending DHCP discover... done.
2184 12:22:03.626681
2185 12:22:03.630152 Waiting for reply... done.
2186 12:22:03.630686
2187 12:22:03.633028 Sending DHCP request... done.
2188 12:22:03.633509
2189 12:22:03.636756 Waiting for reply... done.
2190 12:22:03.637214
2191 12:22:03.639994 My ip is 192.168.201.16
2192 12:22:03.640520
2193 12:22:03.643110 The DHCP server ip is 192.168.201.1
2194 12:22:03.643575
2195 12:22:03.646454 TFTP server IP predefined by user: 192.168.201.1
2196 12:22:03.646941
2197 12:22:03.652975 Bootfile predefined by user: 9584162/tftp-deploy-uubqlmbo/kernel/bzImage
2198 12:22:03.653470
2199 12:22:03.656366 Sending tftp read request... done.
2200 12:22:03.656838
2201 12:22:03.664099 Waiting for the transfer...
2202 12:22:03.664589
2203 12:22:04.249887 00000000 ################################################################
2204 12:22:04.250056
2205 12:22:04.802783 00080000 ################################################################
2206 12:22:04.802949
2207 12:22:05.317248 00100000 ################################################################
2208 12:22:05.317396
2209 12:22:05.842352 00180000 ################################################################
2210 12:22:05.842495
2211 12:22:06.397402 00200000 ################################################################
2212 12:22:06.397957
2213 12:22:07.030556 00280000 ################################################################
2214 12:22:07.030703
2215 12:22:07.630427 00300000 ################################################################
2216 12:22:07.630575
2217 12:22:08.235295 00380000 ################################################################
2218 12:22:08.235431
2219 12:22:08.858025 00400000 ################################################################
2220 12:22:08.858172
2221 12:22:09.418792 00480000 ################################################################
2222 12:22:09.418940
2223 12:22:09.964541 00500000 ################################################################
2224 12:22:09.964686
2225 12:22:10.536682 00580000 ################################################################
2226 12:22:10.536822
2227 12:22:11.082036 00600000 ################################################################
2228 12:22:11.082174
2229 12:22:11.632966 00680000 ################################################################
2230 12:22:11.633114
2231 12:22:12.184048 00700000 ################################################################
2232 12:22:12.184189
2233 12:22:12.733610 00780000 ################################################################
2234 12:22:12.733752
2235 12:22:13.274469 00800000 ################################################################
2236 12:22:13.274613
2237 12:22:13.820327 00880000 ################################################################
2238 12:22:13.820473
2239 12:22:14.215043 00900000 ################################################ done.
2240 12:22:14.215200
2241 12:22:14.218070 The bootfile was 9826304 bytes long.
2242 12:22:14.218161
2243 12:22:14.221651 Sending tftp read request... done.
2244 12:22:14.221743
2245 12:22:14.224905 Waiting for the transfer...
2246 12:22:14.224995
2247 12:22:14.772719 00000000 ################################################################
2248 12:22:14.772926
2249 12:22:15.321433 00080000 ################################################################
2250 12:22:15.321592
2251 12:22:15.848797 00100000 ################################################################
2252 12:22:15.848958
2253 12:22:16.366310 00180000 ################################################################
2254 12:22:16.366460
2255 12:22:16.905477 00200000 ################################################################
2256 12:22:16.905636
2257 12:22:17.432447 00280000 ################################################################
2258 12:22:17.432664
2259 12:22:17.966076 00300000 ################################################################
2260 12:22:17.966290
2261 12:22:18.494996 00380000 ################################################################
2262 12:22:18.495196
2263 12:22:19.039122 00400000 ################################################################
2264 12:22:19.039286
2265 12:22:19.578215 00480000 ################################################################
2266 12:22:19.578372
2267 12:22:20.120569 00500000 ################################################################
2268 12:22:20.120723
2269 12:22:20.487131 00580000 ########################################### done.
2270 12:22:20.487300
2271 12:22:20.490042 Sending tftp read request... done.
2272 12:22:20.490136
2273 12:22:20.493437 Waiting for the transfer...
2274 12:22:20.493528
2275 12:22:20.493599 00000000 # done.
2276 12:22:20.493666
2277 12:22:20.503215 Command line loaded dynamically from TFTP file: 9584162/tftp-deploy-uubqlmbo/kernel/cmdline
2278 12:22:20.503307
2279 12:22:20.526993 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9584162/extract-nfsrootfs-vg17ygo6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2280 12:22:20.529644
2281 12:22:20.533684 Shutting down all USB controllers.
2282 12:22:20.533775
2283 12:22:20.533846 Removing current net device
2284 12:22:20.533912
2285 12:22:20.536518 Finalizing coreboot
2286 12:22:20.536609
2287 12:22:20.543253 Exiting depthcharge with code 4 at timestamp: 26964455
2288 12:22:20.543347
2289 12:22:20.543417
2290 12:22:20.543482 Starting kernel ...
2291 12:22:20.543545
2292 12:22:20.543606
2293 12:22:20.543980 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2294 12:22:20.544083 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2295 12:22:20.544161 Setting prompt string to ['Linux version [0-9]']
2296 12:22:20.544233 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2297 12:22:20.544305 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2299 12:26:46.545173 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2301 12:26:46.546464 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2303 12:26:46.547403 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2306 12:26:46.548862 end: 2 depthcharge-action (duration 00:05:00) [common]
2308 12:26:46.549091 Cleaning after the job
2309 12:26:46.549178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/ramdisk
2310 12:26:46.549660 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/kernel
2311 12:26:46.550327 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/nfsrootfs
2312 12:26:46.582203 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584162/tftp-deploy-uubqlmbo/modules
2313 12:26:46.582757 start: 5.1 power-off (timeout 00:00:30) [common]
2314 12:26:46.582939 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2315 12:26:46.659192 >> Command sent successfully.
2316 12:26:46.663479 Returned 0 in 0 seconds
2317 12:26:46.765008 end: 5.1 power-off (duration 00:00:00) [common]
2319 12:26:46.766582 start: 5.2 read-feedback (timeout 00:10:00) [common]
2320 12:26:46.767796 Listened to connection for namespace 'common' for up to 1s
2321 12:26:47.772596 Finalising connection for namespace 'common'
2322 12:26:47.773324 Disconnecting from shell: Finalise
2323 12:26:47.773777
2324 12:26:47.875279 end: 5.2 read-feedback (duration 00:00:01) [common]
2325 12:26:47.875942 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584162
2326 12:26:47.972021 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584162
2327 12:26:47.972217 JobError: Your job cannot terminate cleanly.