Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:21:29.985764 lava-dispatcher, installed at version: 2023.01
2 12:21:29.985968 start: 0 validate
3 12:21:29.986096 Start time: 2023-03-13 12:21:29.986091+00:00 (UTC)
4 12:21:29.986224 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:21:29.986347 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230303.0%2Famd64%2Frootfs.cpio.gz exists
6 12:21:30.276630 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:21:30.276799 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:21:34.778600 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:21:34.778766 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip%2Fv4.19.276-cip93%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:21:35.782249 validate duration: 5.80
12 12:21:35.782558 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:21:35.782725 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:21:35.782832 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:21:35.782962 Not decompressing ramdisk as can be used compressed.
16 12:21:35.783112 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230303.0/amd64/rootfs.cpio.gz
17 12:21:35.783177 saving as /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/ramdisk/rootfs.cpio.gz
18 12:21:35.783236 total size: 35753585 (34MB)
19 12:21:35.784183 progress 0% (0MB)
20 12:21:35.792758 progress 5% (1MB)
21 12:21:35.801253 progress 10% (3MB)
22 12:21:35.809625 progress 15% (5MB)
23 12:21:35.818236 progress 20% (6MB)
24 12:21:35.826749 progress 25% (8MB)
25 12:21:35.835531 progress 30% (10MB)
26 12:21:35.844004 progress 35% (11MB)
27 12:21:35.852592 progress 40% (13MB)
28 12:21:35.861317 progress 45% (15MB)
29 12:21:35.869936 progress 50% (17MB)
30 12:21:35.878659 progress 55% (18MB)
31 12:21:35.887287 progress 60% (20MB)
32 12:21:35.896181 progress 65% (22MB)
33 12:21:35.904847 progress 70% (23MB)
34 12:21:35.913771 progress 75% (25MB)
35 12:21:35.922421 progress 80% (27MB)
36 12:21:35.931297 progress 85% (29MB)
37 12:21:35.939978 progress 90% (30MB)
38 12:21:35.948329 progress 95% (32MB)
39 12:21:35.956887 progress 100% (34MB)
40 12:21:35.957077 34MB downloaded in 0.17s (196.15MB/s)
41 12:21:35.957266 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:21:35.957541 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:21:35.957647 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:21:35.957752 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:21:35.957876 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:21:35.957951 saving as /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/kernel/bzImage
48 12:21:35.958031 total size: 9826304 (9MB)
49 12:21:35.958109 No compression specified
50 12:21:35.959108 progress 0% (0MB)
51 12:21:35.961551 progress 5% (0MB)
52 12:21:35.964070 progress 10% (0MB)
53 12:21:35.966575 progress 15% (1MB)
54 12:21:35.969068 progress 20% (1MB)
55 12:21:35.971794 progress 25% (2MB)
56 12:21:35.974250 progress 30% (2MB)
57 12:21:35.976850 progress 35% (3MB)
58 12:21:35.980766 progress 40% (3MB)
59 12:21:35.984863 progress 45% (4MB)
60 12:21:35.988985 progress 50% (4MB)
61 12:21:35.992895 progress 55% (5MB)
62 12:21:35.996988 progress 60% (5MB)
63 12:21:36.001152 progress 65% (6MB)
64 12:21:36.005316 progress 70% (6MB)
65 12:21:36.009447 progress 75% (7MB)
66 12:21:36.013508 progress 80% (7MB)
67 12:21:36.017514 progress 85% (7MB)
68 12:21:36.021720 progress 90% (8MB)
69 12:21:36.025945 progress 95% (8MB)
70 12:21:36.029985 progress 100% (9MB)
71 12:21:36.030353 9MB downloaded in 0.07s (129.59MB/s)
72 12:21:36.030571 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:21:36.030996 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:21:36.031167 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:21:36.031324 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:21:36.031488 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip/v4.19.276-cip93/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:21:36.031591 saving as /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/modules/modules.tar
79 12:21:36.031702 total size: 460276 (0MB)
80 12:21:36.031839 Using unxz to decompress xz
81 12:21:36.035710 progress 7% (0MB)
82 12:21:36.036170 progress 14% (0MB)
83 12:21:36.036420 progress 21% (0MB)
84 12:21:36.038444 progress 28% (0MB)
85 12:21:36.041617 progress 35% (0MB)
86 12:21:36.044915 progress 42% (0MB)
87 12:21:36.048274 progress 49% (0MB)
88 12:21:36.051021 progress 56% (0MB)
89 12:21:36.053628 progress 64% (0MB)
90 12:21:36.056899 progress 71% (0MB)
91 12:21:36.059744 progress 78% (0MB)
92 12:21:36.062534 progress 85% (0MB)
93 12:21:36.064997 progress 92% (0MB)
94 12:21:36.067920 progress 99% (0MB)
95 12:21:36.077077 0MB downloaded in 0.05s (9.68MB/s)
96 12:21:36.077495 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:21:36.077958 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:21:36.078103 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 12:21:36.078210 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 12:21:36.078307 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:21:36.078402 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 12:21:36.078582 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz
104 12:21:36.078695 makedir: /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin
105 12:21:36.078788 makedir: /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/tests
106 12:21:36.078878 makedir: /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/results
107 12:21:36.079006 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-add-keys
108 12:21:36.079160 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-add-sources
109 12:21:36.079285 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-background-process-start
110 12:21:36.079441 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-background-process-stop
111 12:21:36.079600 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-common-functions
112 12:21:36.079786 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-echo-ipv4
113 12:21:36.079963 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-install-packages
114 12:21:36.080138 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-installed-packages
115 12:21:36.080314 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-os-build
116 12:21:36.080491 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-probe-channel
117 12:21:36.080670 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-probe-ip
118 12:21:36.080846 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-target-ip
119 12:21:36.081023 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-target-mac
120 12:21:36.081199 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-target-storage
121 12:21:36.081376 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-case
122 12:21:36.081553 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-event
123 12:21:36.081727 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-feedback
124 12:21:36.081903 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-raise
125 12:21:36.082085 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-reference
126 12:21:36.082258 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-runner
127 12:21:36.082433 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-set
128 12:21:36.082608 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-test-shell
129 12:21:36.082787 Updating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-install-packages (oe)
130 12:21:36.082967 Updating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/bin/lava-installed-packages (oe)
131 12:21:36.083129 Creating /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/environment
132 12:21:36.083274 LAVA metadata
133 12:21:36.083392 - LAVA_JOB_ID=9584150
134 12:21:36.083509 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:21:36.083684 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 12:21:36.083806 skipped lava-vland-overlay
137 12:21:36.083943 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:21:36.084094 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 12:21:36.084206 skipped lava-multinode-overlay
140 12:21:36.084336 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:21:36.084481 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 12:21:36.084611 Loading test definitions
143 12:21:36.084767 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 12:21:36.084890 Using /lava-9584150 at stage 0
145 12:21:36.085285 uuid=9584150_1.4.2.3.1 testdef=None
146 12:21:36.085419 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:21:36.085558 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 12:21:36.086276 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:21:36.086655 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 12:21:36.087489 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:21:36.087872 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 12:21:36.088652 runner path: /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/0/tests/0_cros-ec test_uuid 9584150_1.4.2.3.1
155 12:21:36.088859 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:21:36.089208 Creating lava-test-runner.conf files
158 12:21:36.089315 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9584150/lava-overlay-lyzxiwqz/lava-9584150/0 for stage 0
159 12:21:36.089445 - 0_cros-ec
160 12:21:36.089593 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
161 12:21:36.089731 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
162 12:21:36.097651 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
163 12:21:36.097848 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
164 12:21:36.097995 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
165 12:21:36.098134 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
166 12:21:36.098276 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
167 12:21:36.881040 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
168 12:21:36.881513 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
169 12:21:36.881633 extracting modules file /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9584150/extract-overlay-ramdisk-xm5_ns3x/ramdisk
170 12:21:36.893700 end: 1.4.4 extract-modules (duration 00:00:00) [common]
171 12:21:36.893891 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
172 12:21:36.894019 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584150/compress-overlay-3uev9fjn/overlay-1.4.2.4.tar.gz to ramdisk
173 12:21:36.894188 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9584150/compress-overlay-3uev9fjn/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9584150/extract-overlay-ramdisk-xm5_ns3x/ramdisk
174 12:21:36.897917 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
175 12:21:36.898082 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
176 12:21:36.898209 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
177 12:21:36.898338 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
178 12:21:36.898454 Building ramdisk /var/lib/lava/dispatcher/tmp/9584150/extract-overlay-ramdisk-xm5_ns3x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9584150/extract-overlay-ramdisk-xm5_ns3x/ramdisk
179 12:21:37.170436 >> 187900 blocks
180 12:21:40.553461 rename /var/lib/lava/dispatcher/tmp/9584150/extract-overlay-ramdisk-xm5_ns3x/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
181 12:21:40.554087 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
182 12:21:40.554295 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
183 12:21:40.554513 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
184 12:21:40.554689 No mkimage arch provided, not using FIT.
185 12:21:40.554842 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
186 12:21:40.555043 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
187 12:21:40.555225 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
188 12:21:40.555403 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
189 12:21:40.555527 No LXC device requested
190 12:21:40.555656 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
191 12:21:40.555815 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
192 12:21:40.555946 end: 1.6 deploy-device-env (duration 00:00:00) [common]
193 12:21:40.556061 Checking files for TFTP limit of 4294967296 bytes.
194 12:21:40.556629 end: 1 tftp-deploy (duration 00:00:05) [common]
195 12:21:40.556799 start: 2 depthcharge-action (timeout 00:05:00) [common]
196 12:21:40.557004 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
197 12:21:40.557230 substitutions:
198 12:21:40.557352 - {DTB}: None
199 12:21:40.557460 - {INITRD}: 9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
200 12:21:40.557562 - {KERNEL}: 9584150/tftp-deploy-hgly1xmr/kernel/bzImage
201 12:21:40.557663 - {LAVA_MAC}: None
202 12:21:40.557761 - {PRESEED_CONFIG}: None
203 12:21:40.557858 - {PRESEED_LOCAL}: None
204 12:21:40.557957 - {RAMDISK}: 9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
205 12:21:40.558055 - {ROOT_PART}: None
206 12:21:40.558152 - {ROOT}: None
207 12:21:40.558249 - {SERVER_IP}: 192.168.201.1
208 12:21:40.558347 - {TEE}: None
209 12:21:40.558445 Parsed boot commands:
210 12:21:40.558539 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
211 12:21:40.558773 Parsed boot commands: tftpboot 192.168.201.1 9584150/tftp-deploy-hgly1xmr/kernel/bzImage 9584150/tftp-deploy-hgly1xmr/kernel/cmdline 9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
212 12:21:40.558917 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
213 12:21:40.559053 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
214 12:21:40.559367 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
215 12:21:40.559507 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
216 12:21:40.559621 Not connected, no need to disconnect.
217 12:21:40.559790 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
218 12:21:40.559953 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
219 12:21:40.560091 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
220 12:21:40.563532 Setting prompt string to ['lava-test: # ']
221 12:21:40.563956 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
222 12:21:40.564134 end: 2.2.1 reset-connection (duration 00:00:00) [common]
223 12:21:40.564285 start: 2.2.2 reset-device (timeout 00:05:00) [common]
224 12:21:40.564429 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
225 12:21:40.564709 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
226 12:21:45.704406 >> Command sent successfully.
227 12:21:45.706513 Returned 0 in 5 seconds
228 12:21:45.807315 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
230 12:21:45.807663 end: 2.2.2 reset-device (duration 00:00:05) [common]
231 12:21:45.807783 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
232 12:21:45.807875 Setting prompt string to 'Starting depthcharge on Voema...'
233 12:21:45.807944 Changing prompt to 'Starting depthcharge on Voema...'
234 12:21:45.808020 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
235 12:21:45.808293 [Enter `^Ec?' for help]
236 12:21:47.410543
237 12:21:47.410719
238 12:21:47.420434 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
239 12:21:47.426800 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
240 12:21:47.430025 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
241 12:21:47.433403 CPU: AES supported, TXT NOT supported, VT supported
242 12:21:47.440172 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
243 12:21:47.446748 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
244 12:21:47.450094 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
245 12:21:47.453459 VBOOT: Loading verstage.
246 12:21:47.459952 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 12:21:47.463360 FMAP: base = 0x0 size = 0x2000000 #areas = 32
248 12:21:47.469499 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 12:21:47.476263 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
250 12:21:47.483100 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
251 12:21:47.486490
252 12:21:47.486596
253 12:21:47.496398 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
254 12:21:47.511101 Probing TPM: . done!
255 12:21:47.514821 TPM ready after 0 ms
256 12:21:47.517443 Connected to device vid:did:rid of 1ae0:0028:00
257 12:21:47.529150 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
258 12:21:47.535446 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
259 12:21:47.538798 Initialized TPM device CR50 revision 0
260 12:21:47.594259 tlcl_send_startup: Startup return code is 0
261 12:21:47.594413 TPM: setup succeeded
262 12:21:47.609625 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
263 12:21:47.623469 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 12:21:47.636421 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
265 12:21:47.646182 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 12:21:47.650173 Chrome EC: UHEPI supported
267 12:21:47.653619 Phase 1
268 12:21:47.657154 FMAP: area GBB found @ 1805000 (458752 bytes)
269 12:21:47.667156 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
270 12:21:47.673848 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
271 12:21:47.679957 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
272 12:21:47.686739 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
273 12:21:47.690131 Recovery requested (1009000e)
274 12:21:47.693469 TPM: Extending digest for VBOOT: boot mode into PCR 0
275 12:21:47.705450 tlcl_extend: response is 0
276 12:21:47.711348 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
277 12:21:47.721976 tlcl_extend: response is 0
278 12:21:47.728373 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
279 12:21:47.735131 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
280 12:21:47.741305 BS: verstage times (exec / console): total (unknown) / 142 ms
281 12:21:47.741414
282 12:21:47.741495
283 12:21:47.754722 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
284 12:21:47.761187 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
285 12:21:47.764848 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
286 12:21:47.767982 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
287 12:21:47.774704 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
288 12:21:47.777808 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
289 12:21:47.781001 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
290 12:21:47.784397 TCO_STS: 0000 0000
291 12:21:47.787854 GEN_PMCON: d0015038 00002200
292 12:21:47.791291 GBLRST_CAUSE: 00000000 00000000
293 12:21:47.794519 HPR_CAUSE0: 00000000
294 12:21:47.794606 prev_sleep_state 5
295 12:21:47.797386 Boot Count incremented to 16904
296 12:21:47.804206 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
297 12:21:47.810822 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 12:21:47.821040 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 12:21:47.827093 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
300 12:21:47.830722 Chrome EC: UHEPI supported
301 12:21:47.837155 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
302 12:21:47.848672 Probing TPM: done!
303 12:21:47.857026 Connected to device vid:did:rid of 1ae0:0028:00
304 12:21:47.866807 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
305 12:21:47.873694 Initialized TPM device CR50 revision 0
306 12:21:47.883286 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
307 12:21:47.890088 MRC: Hash idx 0x100b comparison successful.
308 12:21:47.893631 MRC cache found, size faa8
309 12:21:47.893717 bootmode is set to: 2
310 12:21:47.896966 SPD index = 0
311 12:21:47.903396 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
312 12:21:47.906671 SPD: module type is LPDDR4X
313 12:21:47.910022 SPD: module part number is MT53E512M64D4NW-046
314 12:21:47.916667 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
315 12:21:47.919813 SPD: device width 16 bits, bus width 16 bits
316 12:21:47.926262 SPD: module size is 1024 MB (per channel)
317 12:21:48.358006 CBMEM:
318 12:21:48.361236 IMD: root @ 0x76fff000 254 entries.
319 12:21:48.364363 IMD: root @ 0x76ffec00 62 entries.
320 12:21:48.368078 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
321 12:21:48.374453 FMAP: area RW_VPD found @ f35000 (8192 bytes)
322 12:21:48.377714 External stage cache:
323 12:21:48.381494 IMD: root @ 0x7b3ff000 254 entries.
324 12:21:48.384293 IMD: root @ 0x7b3fec00 62 entries.
325 12:21:48.399705 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
326 12:21:48.406402 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
327 12:21:48.412667 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
328 12:21:48.426835 MRC: 'RECOVERY_MRC_CACHE' does not need update.
329 12:21:48.430819 cse_lite: Skip switching to RW in the recovery path
330 12:21:48.434174 8 DIMMs found
331 12:21:48.434264 SMM Memory Map
332 12:21:48.437960 SMRAM : 0x7b000000 0x800000
333 12:21:48.440916 Subregion 0: 0x7b000000 0x200000
334 12:21:48.444404 Subregion 1: 0x7b200000 0x200000
335 12:21:48.447797 Subregion 2: 0x7b400000 0x400000
336 12:21:48.450968 top_of_ram = 0x77000000
337 12:21:48.457340 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
338 12:21:48.461031 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
339 12:21:48.467540 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
340 12:21:48.470607 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 12:21:48.480668 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
342 12:21:48.487408 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
343 12:21:48.497424 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
344 12:21:48.500994 Processing 211 relocs. Offset value of 0x74c0b000
345 12:21:48.510257 BS: romstage times (exec / console): total (unknown) / 277 ms
346 12:21:48.515812
347 12:21:48.515905
348 12:21:48.526105 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
349 12:21:48.528934 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 12:21:48.539027 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 12:21:48.545528 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 12:21:48.552238 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
353 12:21:48.558900 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
354 12:21:48.605995 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
355 12:21:48.612428 Processing 5008 relocs. Offset value of 0x75d98000
356 12:21:48.616038 BS: postcar times (exec / console): total (unknown) / 59 ms
357 12:21:48.619366
358 12:21:48.619455
359 12:21:48.628990 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
360 12:21:48.629083 Normal boot
361 12:21:48.633079 FW_CONFIG value is 0x804c02
362 12:21:48.636041 PCI: 00:07.0 disabled by fw_config
363 12:21:48.642487 PCI: 00:07.1 disabled by fw_config
364 12:21:48.645942 PCI: 00:0d.2 disabled by fw_config
365 12:21:48.649261 PCI: 00:1c.7 disabled by fw_config
366 12:21:48.652752 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
367 12:21:48.658927 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:21:48.665729 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:21:48.668942 GENERIC: 0.0 disabled by fw_config
370 12:21:48.672522 GENERIC: 1.0 disabled by fw_config
371 12:21:48.675645 fw_config match found: DB_USB=USB3_ACTIVE
372 12:21:48.678889 fw_config match found: DB_USB=USB3_ACTIVE
373 12:21:48.685380 fw_config match found: DB_USB=USB3_ACTIVE
374 12:21:48.689018 fw_config match found: DB_USB=USB3_ACTIVE
375 12:21:48.692271 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
376 12:21:48.702043 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
377 12:21:48.708352 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
378 12:21:48.715182 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
379 12:21:48.721626 microcode: sig=0x806c1 pf=0x80 revision=0x86
380 12:21:48.724853 microcode: Update skipped, already up-to-date
381 12:21:48.731496 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
382 12:21:48.760396 Detected 4 core, 8 thread CPU.
383 12:21:48.763718 Setting up SMI for CPU
384 12:21:48.767224 IED base = 0x7b400000
385 12:21:48.767312 IED size = 0x00400000
386 12:21:48.770272 Will perform SMM setup.
387 12:21:48.776737 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
388 12:21:48.783677 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 12:21:48.790240 Processing 16 relocs. Offset value of 0x00030000
390 12:21:48.793491 Attempting to start 7 APs
391 12:21:48.796534 Waiting for 10ms after sending INIT.
392 12:21:48.812659 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
393 12:21:48.815478 AP: slot 7 apic_id 7.
394 12:21:48.818675 AP: slot 3 apic_id 6.
395 12:21:48.818765 AP: slot 6 apic_id 2.
396 12:21:48.822050 AP: slot 5 apic_id 4.
397 12:21:48.825460 AP: slot 4 apic_id 5.
398 12:21:48.825543 AP: slot 2 apic_id 3.
399 12:21:48.825627 done.
400 12:21:48.832134 Waiting for 2nd SIPI to complete...done.
401 12:21:48.838867 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 12:21:48.845775 Processing 13 relocs. Offset value of 0x00038000
403 12:21:48.848505 Unable to locate Global NVS
404 12:21:48.855472 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
405 12:21:48.858931 Installing permanent SMM handler to 0x7b000000
406 12:21:48.868506 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
407 12:21:48.871979 Processing 794 relocs. Offset value of 0x7b010000
408 12:21:48.881885 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 12:21:48.885381 Processing 13 relocs. Offset value of 0x7b008000
410 12:21:48.891669 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 12:21:48.898639 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
412 12:21:48.901661 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
413 12:21:48.908202 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
414 12:21:48.914907 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
415 12:21:48.921447 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
416 12:21:48.927983 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
417 12:21:48.931409 Unable to locate Global NVS
418 12:21:48.938111 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
419 12:21:48.941522 Clearing SMI status registers
420 12:21:48.944879 SMI_STS: PM1
421 12:21:48.944970 PM1_STS: PWRBTN
422 12:21:48.951155 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
423 12:21:48.954428 In relocation handler: CPU 0
424 12:21:48.957845 New SMBASE=0x7b000000 IEDBASE=0x7b400000
425 12:21:48.964839 Writing SMRR. base = 0x7b000006, mask=0xff800c00
426 12:21:48.967721 Relocation complete.
427 12:21:48.974363 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
428 12:21:48.977758 In relocation handler: CPU 1
429 12:21:48.981193 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
430 12:21:48.984308 Relocation complete.
431 12:21:48.990777 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
432 12:21:48.994003 In relocation handler: CPU 7
433 12:21:48.997163 New SMBASE=0x7affe400 IEDBASE=0x7b400000
434 12:21:49.000641 Relocation complete.
435 12:21:49.007577 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
436 12:21:49.010292 In relocation handler: CPU 3
437 12:21:49.013570 New SMBASE=0x7afff400 IEDBASE=0x7b400000
438 12:21:49.017286 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 12:21:49.020373 Relocation complete.
440 12:21:49.027017 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
441 12:21:49.030198 In relocation handler: CPU 4
442 12:21:49.033606 New SMBASE=0x7afff000 IEDBASE=0x7b400000
443 12:21:49.036968 Relocation complete.
444 12:21:49.043226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 12:21:49.047203 In relocation handler: CPU 5
446 12:21:49.050146 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 12:21:49.056643 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 12:21:49.060102 Relocation complete.
449 12:21:49.066367 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
450 12:21:49.069612 In relocation handler: CPU 2
451 12:21:49.073167 New SMBASE=0x7afff800 IEDBASE=0x7b400000
452 12:21:49.076772 Relocation complete.
453 12:21:49.083345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 12:21:49.086778 In relocation handler: CPU 6
455 12:21:49.089613 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 12:21:49.092967 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 12:21:49.096666 Relocation complete.
458 12:21:49.096785 Initializing CPU #0
459 12:21:49.100277 CPU: vendor Intel device 806c1
460 12:21:49.106746 CPU: family 06, model 8c, stepping 01
461 12:21:49.106868 Clearing out pending MCEs
462 12:21:49.110494 Setting up local APIC...
463 12:21:49.113288 apic_id: 0x00 done.
464 12:21:49.117013 Turbo is available but hidden
465 12:21:49.119848 Turbo is available and visible
466 12:21:49.123105 microcode: Update skipped, already up-to-date
467 12:21:49.126319 CPU #0 initialized
468 12:21:49.126434 Initializing CPU #1
469 12:21:49.130136 Initializing CPU #5
470 12:21:49.133217 Initializing CPU #4
471 12:21:49.136464 CPU: vendor Intel device 806c1
472 12:21:49.139531 CPU: family 06, model 8c, stepping 01
473 12:21:49.143369 CPU: vendor Intel device 806c1
474 12:21:49.146225 CPU: family 06, model 8c, stepping 01
475 12:21:49.149715 Clearing out pending MCEs
476 12:21:49.149831 Clearing out pending MCEs
477 12:21:49.153041 Setting up local APIC...
478 12:21:49.156489 Initializing CPU #6
479 12:21:49.156604 Initializing CPU #2
480 12:21:49.159599 CPU: vendor Intel device 806c1
481 12:21:49.166306 CPU: family 06, model 8c, stepping 01
482 12:21:49.166426 apic_id: 0x04 done.
483 12:21:49.169819 Setting up local APIC...
484 12:21:49.172563 Initializing CPU #7
485 12:21:49.172680 Initializing CPU #3
486 12:21:49.175986 CPU: vendor Intel device 806c1
487 12:21:49.179485 CPU: family 06, model 8c, stepping 01
488 12:21:49.182699 CPU: vendor Intel device 806c1
489 12:21:49.186075 CPU: family 06, model 8c, stepping 01
490 12:21:49.189069 Clearing out pending MCEs
491 12:21:49.192973 Clearing out pending MCEs
492 12:21:49.195920 Setting up local APIC...
493 12:21:49.199386 CPU: vendor Intel device 806c1
494 12:21:49.202424 CPU: family 06, model 8c, stepping 01
495 12:21:49.205712 Setting up local APIC...
496 12:21:49.205828 apic_id: 0x05 done.
497 12:21:49.212460 microcode: Update skipped, already up-to-date
498 12:21:49.216065 microcode: Update skipped, already up-to-date
499 12:21:49.219797 CPU #5 initialized
500 12:21:49.219912 CPU #4 initialized
501 12:21:49.222491 Clearing out pending MCEs
502 12:21:49.225658 CPU: vendor Intel device 806c1
503 12:21:49.229415 CPU: family 06, model 8c, stepping 01
504 12:21:49.232356 Clearing out pending MCEs
505 12:21:49.236495 Clearing out pending MCEs
506 12:21:49.236611 Setting up local APIC...
507 12:21:49.239006 Setting up local APIC...
508 12:21:49.242206 apic_id: 0x07 done.
509 12:21:49.245488 apic_id: 0x06 done.
510 12:21:49.249309 microcode: Update skipped, already up-to-date
511 12:21:49.252153 microcode: Update skipped, already up-to-date
512 12:21:49.255580 CPU #7 initialized
513 12:21:49.255698 CPU #3 initialized
514 12:21:49.258910 apic_id: 0x02 done.
515 12:21:49.262221 apic_id: 0x03 done.
516 12:21:49.265462 microcode: Update skipped, already up-to-date
517 12:21:49.269017 Setting up local APIC...
518 12:21:49.272293 CPU #6 initialized
519 12:21:49.275673 microcode: Update skipped, already up-to-date
520 12:21:49.279028 apic_id: 0x01 done.
521 12:21:49.279143 CPU #2 initialized
522 12:21:49.285200 microcode: Update skipped, already up-to-date
523 12:21:49.285317 CPU #1 initialized
524 12:21:49.288705 bsp_do_flight_plan done after 454 msecs.
525 12:21:49.292050 CPU: frequency set to 4000 MHz
526 12:21:49.295394 Enabling SMIs.
527 12:21:49.301643 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
528 12:21:49.317074 SATAXPCIE1 indicates PCIe NVMe is present
529 12:21:49.320690 Probing TPM: done!
530 12:21:49.324324 Connected to device vid:did:rid of 1ae0:0028:00
531 12:21:49.334902 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
532 12:21:49.337839 Initialized TPM device CR50 revision 0
533 12:21:49.341547 Enabling S0i3.4
534 12:21:49.347767 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
535 12:21:49.351273 Found a VBT of 8704 bytes after decompression
536 12:21:49.357548 cse_lite: CSE RO boot. HybridStorageMode disabled
537 12:21:49.364347 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
538 12:21:49.440249 FSPS returned 0
539 12:21:49.443418 Executing Phase 1 of FspMultiPhaseSiInit
540 12:21:49.453582 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
541 12:21:49.456605 port C0 DISC req: usage 1 usb3 1 usb2 5
542 12:21:49.460060 Raw Buffer output 0 00000511
543 12:21:49.463578 Raw Buffer output 1 00000000
544 12:21:49.466841 pmc_send_ipc_cmd succeeded
545 12:21:49.473939 port C1 DISC req: usage 1 usb3 2 usb2 3
546 12:21:49.474052 Raw Buffer output 0 00000321
547 12:21:49.476752 Raw Buffer output 1 00000000
548 12:21:49.481370 pmc_send_ipc_cmd succeeded
549 12:21:49.486347 Detected 4 core, 8 thread CPU.
550 12:21:49.489829 Detected 4 core, 8 thread CPU.
551 12:21:49.723582 Display FSP Version Info HOB
552 12:21:49.727027 Reference Code - CPU = a.0.4c.31
553 12:21:49.730272 uCode Version = 0.0.0.86
554 12:21:49.733500 TXT ACM version = ff.ff.ff.ffff
555 12:21:49.736730 Reference Code - ME = a.0.4c.31
556 12:21:49.740228 MEBx version = 0.0.0.0
557 12:21:49.743953 ME Firmware Version = Consumer SKU
558 12:21:49.747064 Reference Code - PCH = a.0.4c.31
559 12:21:49.749917 PCH-CRID Status = Disabled
560 12:21:49.753174 PCH-CRID Original Value = ff.ff.ff.ffff
561 12:21:49.756438 PCH-CRID New Value = ff.ff.ff.ffff
562 12:21:49.759980 OPROM - RST - RAID = ff.ff.ff.ffff
563 12:21:49.763230 PCH Hsio Version = 4.0.0.0
564 12:21:49.766426 Reference Code - SA - System Agent = a.0.4c.31
565 12:21:49.770179 Reference Code - MRC = 2.0.0.1
566 12:21:49.773319 SA - PCIe Version = a.0.4c.31
567 12:21:49.776592 SA-CRID Status = Disabled
568 12:21:49.780012 SA-CRID Original Value = 0.0.0.1
569 12:21:49.782916 SA-CRID New Value = 0.0.0.1
570 12:21:49.786710 OPROM - VBIOS = ff.ff.ff.ffff
571 12:21:49.789844 IO Manageability Engine FW Version = 11.1.4.0
572 12:21:49.792752 PHY Build Version = 0.0.0.e0
573 12:21:49.796134 Thunderbolt(TM) FW Version = 0.0.0.0
574 12:21:49.803292 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
575 12:21:49.806656 ITSS IRQ Polarities Before:
576 12:21:49.806825 IPC0: 0xffffffff
577 12:21:49.809425 IPC1: 0xffffffff
578 12:21:49.809555 IPC2: 0xffffffff
579 12:21:49.812735 IPC3: 0xffffffff
580 12:21:49.816260 ITSS IRQ Polarities After:
581 12:21:49.816424 IPC0: 0xffffffff
582 12:21:49.819588 IPC1: 0xffffffff
583 12:21:49.819787 IPC2: 0xffffffff
584 12:21:49.822748 IPC3: 0xffffffff
585 12:21:49.826045 Found PCIe Root Port #9 at PCI: 00:1d.0.
586 12:21:49.839111 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
587 12:21:49.849402 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
588 12:21:49.863033 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
589 12:21:49.869434 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
590 12:21:49.872428 Enumerating buses...
591 12:21:49.875919 Show all devs... Before device enumeration.
592 12:21:49.879085 Root Device: enabled 1
593 12:21:49.879316 DOMAIN: 0000: enabled 1
594 12:21:49.882941 CPU_CLUSTER: 0: enabled 1
595 12:21:49.886300 PCI: 00:00.0: enabled 1
596 12:21:49.889081 PCI: 00:02.0: enabled 1
597 12:21:49.889355 PCI: 00:04.0: enabled 1
598 12:21:49.892646 PCI: 00:05.0: enabled 1
599 12:21:49.896058 PCI: 00:06.0: enabled 0
600 12:21:49.898871 PCI: 00:07.0: enabled 0
601 12:21:49.899140 PCI: 00:07.1: enabled 0
602 12:21:49.902258 PCI: 00:07.2: enabled 0
603 12:21:49.905684 PCI: 00:07.3: enabled 0
604 12:21:49.908963 PCI: 00:08.0: enabled 1
605 12:21:49.909130 PCI: 00:09.0: enabled 0
606 12:21:49.912318 PCI: 00:0a.0: enabled 0
607 12:21:49.915626 PCI: 00:0d.0: enabled 1
608 12:21:49.919048 PCI: 00:0d.1: enabled 0
609 12:21:49.919142 PCI: 00:0d.2: enabled 0
610 12:21:49.922066 PCI: 00:0d.3: enabled 0
611 12:21:49.925440 PCI: 00:0e.0: enabled 0
612 12:21:49.925574 PCI: 00:10.2: enabled 1
613 12:21:49.928979 PCI: 00:10.6: enabled 0
614 12:21:49.932454 PCI: 00:10.7: enabled 0
615 12:21:49.935278 PCI: 00:12.0: enabled 0
616 12:21:49.935367 PCI: 00:12.6: enabled 0
617 12:21:49.938988 PCI: 00:13.0: enabled 0
618 12:21:49.941999 PCI: 00:14.0: enabled 1
619 12:21:49.945661 PCI: 00:14.1: enabled 0
620 12:21:49.945824 PCI: 00:14.2: enabled 1
621 12:21:49.948827 PCI: 00:14.3: enabled 1
622 12:21:49.952364 PCI: 00:15.0: enabled 1
623 12:21:49.955370 PCI: 00:15.1: enabled 1
624 12:21:49.955559 PCI: 00:15.2: enabled 1
625 12:21:49.958670 PCI: 00:15.3: enabled 1
626 12:21:49.961921 PCI: 00:16.0: enabled 1
627 12:21:49.965206 PCI: 00:16.1: enabled 0
628 12:21:49.965325 PCI: 00:16.2: enabled 0
629 12:21:49.968735 PCI: 00:16.3: enabled 0
630 12:21:49.971718 PCI: 00:16.4: enabled 0
631 12:21:49.971933 PCI: 00:16.5: enabled 0
632 12:21:49.975138 PCI: 00:17.0: enabled 1
633 12:21:49.978560 PCI: 00:19.0: enabled 0
634 12:21:49.981759 PCI: 00:19.1: enabled 1
635 12:21:49.981904 PCI: 00:19.2: enabled 0
636 12:21:49.985080 PCI: 00:1c.0: enabled 1
637 12:21:49.988851 PCI: 00:1c.1: enabled 0
638 12:21:49.991721 PCI: 00:1c.2: enabled 0
639 12:21:49.991906 PCI: 00:1c.3: enabled 0
640 12:21:49.995200 PCI: 00:1c.4: enabled 0
641 12:21:49.998601 PCI: 00:1c.5: enabled 0
642 12:21:50.002300 PCI: 00:1c.6: enabled 1
643 12:21:50.002648 PCI: 00:1c.7: enabled 0
644 12:21:50.005849 PCI: 00:1d.0: enabled 1
645 12:21:50.008837 PCI: 00:1d.1: enabled 0
646 12:21:50.012207 PCI: 00:1d.2: enabled 1
647 12:21:50.012694 PCI: 00:1d.3: enabled 0
648 12:21:50.015384 PCI: 00:1e.0: enabled 1
649 12:21:50.019068 PCI: 00:1e.1: enabled 0
650 12:21:50.019597 PCI: 00:1e.2: enabled 1
651 12:21:50.022629 PCI: 00:1e.3: enabled 1
652 12:21:50.025434 PCI: 00:1f.0: enabled 1
653 12:21:50.028811 PCI: 00:1f.1: enabled 0
654 12:21:50.029364 PCI: 00:1f.2: enabled 1
655 12:21:50.032056 PCI: 00:1f.3: enabled 1
656 12:21:50.035326 PCI: 00:1f.4: enabled 0
657 12:21:50.038713 PCI: 00:1f.5: enabled 1
658 12:21:50.039256 PCI: 00:1f.6: enabled 0
659 12:21:50.041970 PCI: 00:1f.7: enabled 0
660 12:21:50.045079 APIC: 00: enabled 1
661 12:21:50.045592 GENERIC: 0.0: enabled 1
662 12:21:50.048365 GENERIC: 0.0: enabled 1
663 12:21:50.051840 GENERIC: 1.0: enabled 1
664 12:21:50.055071 GENERIC: 0.0: enabled 1
665 12:21:50.055587 GENERIC: 1.0: enabled 1
666 12:21:50.058307 USB0 port 0: enabled 1
667 12:21:50.061894 GENERIC: 0.0: enabled 1
668 12:21:50.064813 USB0 port 0: enabled 1
669 12:21:50.065244 GENERIC: 0.0: enabled 1
670 12:21:50.068183 I2C: 00:1a: enabled 1
671 12:21:50.072144 I2C: 00:31: enabled 1
672 12:21:50.072659 I2C: 00:32: enabled 1
673 12:21:50.075232 I2C: 00:10: enabled 1
674 12:21:50.078351 I2C: 00:15: enabled 1
675 12:21:50.078918 GENERIC: 0.0: enabled 0
676 12:21:50.081672 GENERIC: 1.0: enabled 0
677 12:21:50.084771 GENERIC: 0.0: enabled 1
678 12:21:50.087956 SPI: 00: enabled 1
679 12:21:50.088412 SPI: 00: enabled 1
680 12:21:50.091287 PNP: 0c09.0: enabled 1
681 12:21:50.094730 GENERIC: 0.0: enabled 1
682 12:21:50.095251 USB3 port 0: enabled 1
683 12:21:50.098145 USB3 port 1: enabled 1
684 12:21:50.101221 USB3 port 2: enabled 0
685 12:21:50.101637 USB3 port 3: enabled 0
686 12:21:50.104672 USB2 port 0: enabled 0
687 12:21:50.108220 USB2 port 1: enabled 1
688 12:21:50.111746 USB2 port 2: enabled 1
689 12:21:50.112267 USB2 port 3: enabled 0
690 12:21:50.114832 USB2 port 4: enabled 1
691 12:21:50.118463 USB2 port 5: enabled 0
692 12:21:50.118981 USB2 port 6: enabled 0
693 12:21:50.121539 USB2 port 7: enabled 0
694 12:21:50.125009 USB2 port 8: enabled 0
695 12:21:50.125530 USB2 port 9: enabled 0
696 12:21:50.128554 USB3 port 0: enabled 0
697 12:21:50.131104 USB3 port 1: enabled 1
698 12:21:50.134575 USB3 port 2: enabled 0
699 12:21:50.135089 USB3 port 3: enabled 0
700 12:21:50.138299 GENERIC: 0.0: enabled 1
701 12:21:50.141395 GENERIC: 1.0: enabled 1
702 12:21:50.141873 APIC: 01: enabled 1
703 12:21:50.144733 APIC: 03: enabled 1
704 12:21:50.147508 APIC: 06: enabled 1
705 12:21:50.147987 APIC: 05: enabled 1
706 12:21:50.150923 APIC: 04: enabled 1
707 12:21:50.151333 APIC: 02: enabled 1
708 12:21:50.153981 APIC: 07: enabled 1
709 12:21:50.157525 Compare with tree...
710 12:21:50.157904 Root Device: enabled 1
711 12:21:50.161104 DOMAIN: 0000: enabled 1
712 12:21:50.164061 PCI: 00:00.0: enabled 1
713 12:21:50.167800 PCI: 00:02.0: enabled 1
714 12:21:50.171377 PCI: 00:04.0: enabled 1
715 12:21:50.171833 GENERIC: 0.0: enabled 1
716 12:21:50.174303 PCI: 00:05.0: enabled 1
717 12:21:50.177338 PCI: 00:06.0: enabled 0
718 12:21:50.181198 PCI: 00:07.0: enabled 0
719 12:21:50.184394 GENERIC: 0.0: enabled 1
720 12:21:50.184802 PCI: 00:07.1: enabled 0
721 12:21:50.187123 GENERIC: 1.0: enabled 1
722 12:21:50.191039 PCI: 00:07.2: enabled 0
723 12:21:50.193998 GENERIC: 0.0: enabled 1
724 12:21:50.197217 PCI: 00:07.3: enabled 0
725 12:21:50.200933 GENERIC: 1.0: enabled 1
726 12:21:50.201452 PCI: 00:08.0: enabled 1
727 12:21:50.204310 PCI: 00:09.0: enabled 0
728 12:21:50.207150 PCI: 00:0a.0: enabled 0
729 12:21:50.210913 PCI: 00:0d.0: enabled 1
730 12:21:50.214515 USB0 port 0: enabled 1
731 12:21:50.215041 USB3 port 0: enabled 1
732 12:21:50.217318 USB3 port 1: enabled 1
733 12:21:50.220622 USB3 port 2: enabled 0
734 12:21:50.224179 USB3 port 3: enabled 0
735 12:21:50.227785 PCI: 00:0d.1: enabled 0
736 12:21:50.228300 PCI: 00:0d.2: enabled 0
737 12:21:50.230298 GENERIC: 0.0: enabled 1
738 12:21:50.234095 PCI: 00:0d.3: enabled 0
739 12:21:50.237857 PCI: 00:0e.0: enabled 0
740 12:21:50.241029 PCI: 00:10.2: enabled 1
741 12:21:50.241547 PCI: 00:10.6: enabled 0
742 12:21:50.243862 PCI: 00:10.7: enabled 0
743 12:21:50.247148 PCI: 00:12.0: enabled 0
744 12:21:50.250816 PCI: 00:12.6: enabled 0
745 12:21:50.254204 PCI: 00:13.0: enabled 0
746 12:21:50.254725 PCI: 00:14.0: enabled 1
747 12:21:50.256884 USB0 port 0: enabled 1
748 12:21:50.260127 USB2 port 0: enabled 0
749 12:21:50.263389 USB2 port 1: enabled 1
750 12:21:50.266527 USB2 port 2: enabled 1
751 12:21:50.270164 USB2 port 3: enabled 0
752 12:21:50.270690 USB2 port 4: enabled 1
753 12:21:50.273793 USB2 port 5: enabled 0
754 12:21:50.276736 USB2 port 6: enabled 0
755 12:21:50.279829 USB2 port 7: enabled 0
756 12:21:50.283605 USB2 port 8: enabled 0
757 12:21:50.286731 USB2 port 9: enabled 0
758 12:21:50.287143 USB3 port 0: enabled 0
759 12:21:50.290276 USB3 port 1: enabled 1
760 12:21:50.293153 USB3 port 2: enabled 0
761 12:21:50.296784 USB3 port 3: enabled 0
762 12:21:50.299552 PCI: 00:14.1: enabled 0
763 12:21:50.300008 PCI: 00:14.2: enabled 1
764 12:21:50.302748 PCI: 00:14.3: enabled 1
765 12:21:50.306706 GENERIC: 0.0: enabled 1
766 12:21:50.309747 PCI: 00:15.0: enabled 1
767 12:21:50.313273 I2C: 00:1a: enabled 1
768 12:21:50.313795 I2C: 00:31: enabled 1
769 12:21:50.316333 I2C: 00:32: enabled 1
770 12:21:50.320135 PCI: 00:15.1: enabled 1
771 12:21:50.322949 I2C: 00:10: enabled 1
772 12:21:50.326375 PCI: 00:15.2: enabled 1
773 12:21:50.326895 PCI: 00:15.3: enabled 1
774 12:21:50.329550 PCI: 00:16.0: enabled 1
775 12:21:50.333206 PCI: 00:16.1: enabled 0
776 12:21:50.336585 PCI: 00:16.2: enabled 0
777 12:21:50.339535 PCI: 00:16.3: enabled 0
778 12:21:50.340139 PCI: 00:16.4: enabled 0
779 12:21:50.343521 PCI: 00:16.5: enabled 0
780 12:21:50.347346 PCI: 00:17.0: enabled 1
781 12:21:50.347963 PCI: 00:19.0: enabled 0
782 12:21:50.350962 PCI: 00:19.1: enabled 1
783 12:21:50.354340 I2C: 00:15: enabled 1
784 12:21:50.357920 PCI: 00:19.2: enabled 0
785 12:21:50.407746 PCI: 00:1d.0: enabled 1
786 12:21:50.408463 GENERIC: 0.0: enabled 1
787 12:21:50.408842 PCI: 00:1e.0: enabled 1
788 12:21:50.409181 PCI: 00:1e.1: enabled 0
789 12:21:50.409508 PCI: 00:1e.2: enabled 1
790 12:21:50.409823 SPI: 00: enabled 1
791 12:21:50.410130 PCI: 00:1e.3: enabled 1
792 12:21:50.410428 SPI: 00: enabled 1
793 12:21:50.410726 PCI: 00:1f.0: enabled 1
794 12:21:50.411023 PNP: 0c09.0: enabled 1
795 12:21:50.411678 PCI: 00:1f.1: enabled 0
796 12:21:50.412059 PCI: 00:1f.2: enabled 1
797 12:21:50.412368 GENERIC: 0.0: enabled 1
798 12:21:50.412667 GENERIC: 0.0: enabled 1
799 12:21:50.412962 GENERIC: 1.0: enabled 1
800 12:21:50.413305 PCI: 00:1f.3: enabled 1
801 12:21:50.413611 PCI: 00:1f.4: enabled 0
802 12:21:50.413905 PCI: 00:1f.5: enabled 1
803 12:21:50.414196 PCI: 00:1f.6: enabled 0
804 12:21:50.414487 PCI: 00:1f.7: enabled 0
805 12:21:50.444282 CPU_CLUSTER: 0: enabled 1
806 12:21:50.444830 APIC: 00: enabled 1
807 12:21:50.445190 APIC: 01: enabled 1
808 12:21:50.445521 APIC: 03: enabled 1
809 12:21:50.445840 APIC: 06: enabled 1
810 12:21:50.446506 APIC: 05: enabled 1
811 12:21:50.446863 APIC: 04: enabled 1
812 12:21:50.447176 APIC: 02: enabled 1
813 12:21:50.447476 APIC: 07: enabled 1
814 12:21:50.447808 Root Device scanning...
815 12:21:50.448111 scan_static_bus for Root Device
816 12:21:50.448405 DOMAIN: 0000 enabled
817 12:21:50.448698 CPU_CLUSTER: 0 enabled
818 12:21:50.449321 DOMAIN: 0000 scanning...
819 12:21:50.449664 PCI: pci_scan_bus for bus 00
820 12:21:50.451431 PCI: 00:00.0 [8086/0000] ops
821 12:21:50.455133 PCI: 00:00.0 [8086/9a12] enabled
822 12:21:50.458162 PCI: 00:02.0 [8086/0000] bus ops
823 12:21:50.461661 PCI: 00:02.0 [8086/9a40] enabled
824 12:21:50.464982 PCI: 00:04.0 [8086/0000] bus ops
825 12:21:50.468176 PCI: 00:04.0 [8086/9a03] enabled
826 12:21:50.471664 PCI: 00:05.0 [8086/9a19] enabled
827 12:21:50.474509 PCI: 00:07.0 [0000/0000] hidden
828 12:21:50.477801 PCI: 00:08.0 [8086/9a11] enabled
829 12:21:50.481115 PCI: 00:0a.0 [8086/9a0d] disabled
830 12:21:50.484381 PCI: 00:0d.0 [8086/0000] bus ops
831 12:21:50.487582 PCI: 00:0d.0 [8086/9a13] enabled
832 12:21:50.490720 PCI: 00:14.0 [8086/0000] bus ops
833 12:21:50.494015 PCI: 00:14.0 [8086/a0ed] enabled
834 12:21:50.497613 PCI: 00:14.2 [8086/a0ef] enabled
835 12:21:50.500711 PCI: 00:14.3 [8086/0000] bus ops
836 12:21:50.504049 PCI: 00:14.3 [8086/a0f0] enabled
837 12:21:50.507320 PCI: 00:15.0 [8086/0000] bus ops
838 12:21:50.510737 PCI: 00:15.0 [8086/a0e8] enabled
839 12:21:50.514253 PCI: 00:15.1 [8086/0000] bus ops
840 12:21:50.517248 PCI: 00:15.1 [8086/a0e9] enabled
841 12:21:50.520308 PCI: 00:15.2 [8086/0000] bus ops
842 12:21:50.523441 PCI: 00:15.2 [8086/a0ea] enabled
843 12:21:50.527094 PCI: 00:15.3 [8086/0000] bus ops
844 12:21:50.530257 PCI: 00:15.3 [8086/a0eb] enabled
845 12:21:50.533772 PCI: 00:16.0 [8086/0000] ops
846 12:21:50.537318 PCI: 00:16.0 [8086/a0e0] enabled
847 12:21:50.543425 PCI: Static device PCI: 00:17.0 not found, disabling it.
848 12:21:50.547182 PCI: 00:19.0 [8086/0000] bus ops
849 12:21:50.550048 PCI: 00:19.0 [8086/a0c5] disabled
850 12:21:50.553433 PCI: 00:19.1 [8086/0000] bus ops
851 12:21:50.556865 PCI: 00:19.1 [8086/a0c6] enabled
852 12:21:50.560351 PCI: 00:1d.0 [8086/0000] bus ops
853 12:21:50.563101 PCI: 00:1d.0 [8086/a0b0] enabled
854 12:21:50.566527 PCI: 00:1e.0 [8086/0000] ops
855 12:21:50.569863 PCI: 00:1e.0 [8086/a0a8] enabled
856 12:21:50.573470 PCI: 00:1e.2 [8086/0000] bus ops
857 12:21:50.576945 PCI: 00:1e.2 [8086/a0aa] enabled
858 12:21:50.579848 PCI: 00:1e.3 [8086/0000] bus ops
859 12:21:50.583211 PCI: 00:1e.3 [8086/a0ab] enabled
860 12:21:50.586198 PCI: 00:1f.0 [8086/0000] bus ops
861 12:21:50.590140 PCI: 00:1f.0 [8086/a087] enabled
862 12:21:50.590556 RTC Init
863 12:21:50.593167 Set power on after power failure.
864 12:21:50.596337 Disabling Deep S3
865 12:21:50.596846 Disabling Deep S3
866 12:21:50.599639 Disabling Deep S4
867 12:21:50.600081 Disabling Deep S4
868 12:21:50.602966 Disabling Deep S5
869 12:21:50.603371 Disabling Deep S5
870 12:21:50.606102 PCI: 00:1f.2 [0000/0000] hidden
871 12:21:50.609773 PCI: 00:1f.3 [8086/0000] bus ops
872 12:21:50.613037 PCI: 00:1f.3 [8086/a0c8] enabled
873 12:21:50.616423 PCI: 00:1f.5 [8086/0000] bus ops
874 12:21:50.619274 PCI: 00:1f.5 [8086/a0a4] enabled
875 12:21:50.622664 PCI: Leftover static devices:
876 12:21:50.626434 PCI: 00:10.2
877 12:21:50.626842 PCI: 00:10.6
878 12:21:50.629241 PCI: 00:10.7
879 12:21:50.629616 PCI: 00:06.0
880 12:21:50.629911 PCI: 00:07.1
881 12:21:50.632495 PCI: 00:07.2
882 12:21:50.632876 PCI: 00:07.3
883 12:21:50.636168 PCI: 00:09.0
884 12:21:50.636543 PCI: 00:0d.1
885 12:21:50.639353 PCI: 00:0d.2
886 12:21:50.639757 PCI: 00:0d.3
887 12:21:50.640058 PCI: 00:0e.0
888 12:21:50.642795 PCI: 00:12.0
889 12:21:50.643334 PCI: 00:12.6
890 12:21:50.645727 PCI: 00:13.0
891 12:21:50.646125 PCI: 00:14.1
892 12:21:50.646429 PCI: 00:16.1
893 12:21:50.649158 PCI: 00:16.2
894 12:21:50.649563 PCI: 00:16.3
895 12:21:50.652516 PCI: 00:16.4
896 12:21:50.652893 PCI: 00:16.5
897 12:21:50.656234 PCI: 00:17.0
898 12:21:50.656734 PCI: 00:19.2
899 12:21:50.657066 PCI: 00:1e.1
900 12:21:50.659448 PCI: 00:1f.1
901 12:21:50.659862 PCI: 00:1f.4
902 12:21:50.662586 PCI: 00:1f.6
903 12:21:50.663074 PCI: 00:1f.7
904 12:21:50.666029 PCI: Check your devicetree.cb.
905 12:21:50.669316 PCI: 00:02.0 scanning...
906 12:21:50.672278 scan_generic_bus for PCI: 00:02.0
907 12:21:50.676314 scan_generic_bus for PCI: 00:02.0 done
908 12:21:50.679095 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
909 12:21:50.682307 PCI: 00:04.0 scanning...
910 12:21:50.685571 scan_generic_bus for PCI: 00:04.0
911 12:21:50.688805 GENERIC: 0.0 enabled
912 12:21:50.695840 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
913 12:21:50.699076 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
914 12:21:50.702429 PCI: 00:0d.0 scanning...
915 12:21:50.705302 scan_static_bus for PCI: 00:0d.0
916 12:21:50.708986 USB0 port 0 enabled
917 12:21:50.709444 USB0 port 0 scanning...
918 12:21:50.712282 scan_static_bus for USB0 port 0
919 12:21:50.715550 USB3 port 0 enabled
920 12:21:50.718867 USB3 port 1 enabled
921 12:21:50.719439 USB3 port 2 disabled
922 12:21:50.722041 USB3 port 3 disabled
923 12:21:50.725186 USB3 port 0 scanning...
924 12:21:50.729059 scan_static_bus for USB3 port 0
925 12:21:50.732359 scan_static_bus for USB3 port 0 done
926 12:21:50.735593 scan_bus: bus USB3 port 0 finished in 6 msecs
927 12:21:50.738630 USB3 port 1 scanning...
928 12:21:50.741923 scan_static_bus for USB3 port 1
929 12:21:50.745415 scan_static_bus for USB3 port 1 done
930 12:21:50.752382 scan_bus: bus USB3 port 1 finished in 6 msecs
931 12:21:50.755260 scan_static_bus for USB0 port 0 done
932 12:21:50.758795 scan_bus: bus USB0 port 0 finished in 43 msecs
933 12:21:50.761754 scan_static_bus for PCI: 00:0d.0 done
934 12:21:50.768560 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
935 12:21:50.768993 PCI: 00:14.0 scanning...
936 12:21:50.771977 scan_static_bus for PCI: 00:14.0
937 12:21:50.775298 USB0 port 0 enabled
938 12:21:50.778323 USB0 port 0 scanning...
939 12:21:50.781728 scan_static_bus for USB0 port 0
940 12:21:50.785018 USB2 port 0 disabled
941 12:21:50.785429 USB2 port 1 enabled
942 12:21:50.788708 USB2 port 2 enabled
943 12:21:50.789127 USB2 port 3 disabled
944 12:21:50.791867 USB2 port 4 enabled
945 12:21:50.795367 USB2 port 5 disabled
946 12:21:50.795834 USB2 port 6 disabled
947 12:21:50.798409 USB2 port 7 disabled
948 12:21:50.801885 USB2 port 8 disabled
949 12:21:50.802330 USB2 port 9 disabled
950 12:21:50.804939 USB3 port 0 disabled
951 12:21:50.807991 USB3 port 1 enabled
952 12:21:50.808557 USB3 port 2 disabled
953 12:21:50.811507 USB3 port 3 disabled
954 12:21:50.814915 USB2 port 1 scanning...
955 12:21:50.818231 scan_static_bus for USB2 port 1
956 12:21:50.821489 scan_static_bus for USB2 port 1 done
957 12:21:50.824701 scan_bus: bus USB2 port 1 finished in 6 msecs
958 12:21:50.827774 USB2 port 2 scanning...
959 12:21:50.831421 scan_static_bus for USB2 port 2
960 12:21:50.834692 scan_static_bus for USB2 port 2 done
961 12:21:50.841000 scan_bus: bus USB2 port 2 finished in 6 msecs
962 12:21:50.841471 USB2 port 4 scanning...
963 12:21:50.844366 scan_static_bus for USB2 port 4
964 12:21:50.847816 scan_static_bus for USB2 port 4 done
965 12:21:50.854422 scan_bus: bus USB2 port 4 finished in 6 msecs
966 12:21:50.857470 USB3 port 1 scanning...
967 12:21:50.860845 scan_static_bus for USB3 port 1
968 12:21:50.864203 scan_static_bus for USB3 port 1 done
969 12:21:50.867668 scan_bus: bus USB3 port 1 finished in 6 msecs
970 12:21:50.871143 scan_static_bus for USB0 port 0 done
971 12:21:50.877525 scan_bus: bus USB0 port 0 finished in 93 msecs
972 12:21:50.881180 scan_static_bus for PCI: 00:14.0 done
973 12:21:50.884494 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
974 12:21:50.887297 PCI: 00:14.3 scanning...
975 12:21:50.891087 scan_static_bus for PCI: 00:14.3
976 12:21:50.894321 GENERIC: 0.0 enabled
977 12:21:50.897273 scan_static_bus for PCI: 00:14.3 done
978 12:21:50.900790 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
979 12:21:50.904297 PCI: 00:15.0 scanning...
980 12:21:50.907386 scan_static_bus for PCI: 00:15.0
981 12:21:50.910583 I2C: 00:1a enabled
982 12:21:50.911003 I2C: 00:31 enabled
983 12:21:50.914009 I2C: 00:32 enabled
984 12:21:50.917446 scan_static_bus for PCI: 00:15.0 done
985 12:21:50.921522 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
986 12:21:50.924520 PCI: 00:15.1 scanning...
987 12:21:50.928253 scan_static_bus for PCI: 00:15.1
988 12:21:50.931394 I2C: 00:10 enabled
989 12:21:50.934474 scan_static_bus for PCI: 00:15.1 done
990 12:21:50.937725 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
991 12:21:50.941060 PCI: 00:15.2 scanning...
992 12:21:50.944316 scan_static_bus for PCI: 00:15.2
993 12:21:50.947954 scan_static_bus for PCI: 00:15.2 done
994 12:21:50.954788 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
995 12:21:50.957666 PCI: 00:15.3 scanning...
996 12:21:50.961117 scan_static_bus for PCI: 00:15.3
997 12:21:50.964665 scan_static_bus for PCI: 00:15.3 done
998 12:21:50.967756 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
999 12:21:50.971002 PCI: 00:19.1 scanning...
1000 12:21:50.974337 scan_static_bus for PCI: 00:19.1
1001 12:21:50.977776 I2C: 00:15 enabled
1002 12:21:50.980644 scan_static_bus for PCI: 00:19.1 done
1003 12:21:50.984141 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1004 12:21:50.987553 PCI: 00:1d.0 scanning...
1005 12:21:50.991148 do_pci_scan_bridge for PCI: 00:1d.0
1006 12:21:50.994787 PCI: pci_scan_bus for bus 01
1007 12:21:50.997394 PCI: 01:00.0 [1c5c/174a] enabled
1008 12:21:51.000821 GENERIC: 0.0 enabled
1009 12:21:51.004088 Enabling Common Clock Configuration
1010 12:21:51.007515 L1 Sub-State supported from root port 29
1011 12:21:51.010771 L1 Sub-State Support = 0xf
1012 12:21:51.014178 CommonModeRestoreTime = 0x28
1013 12:21:51.017744 Power On Value = 0x16, Power On Scale = 0x0
1014 12:21:51.020916 ASPM: Enabled L1
1015 12:21:51.024482 PCIe: Max_Payload_Size adjusted to 128
1016 12:21:51.027186 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1017 12:21:51.030850 PCI: 00:1e.2 scanning...
1018 12:21:51.034080 scan_generic_bus for PCI: 00:1e.2
1019 12:21:51.037267 SPI: 00 enabled
1020 12:21:51.043808 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1021 12:21:51.046944 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1022 12:21:51.050377 PCI: 00:1e.3 scanning...
1023 12:21:51.053594 scan_generic_bus for PCI: 00:1e.3
1024 12:21:51.054040 SPI: 00 enabled
1025 12:21:51.060218 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1026 12:21:51.066390 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1027 12:21:51.066923 PCI: 00:1f.0 scanning...
1028 12:21:51.069887 scan_static_bus for PCI: 00:1f.0
1029 12:21:51.073351 PNP: 0c09.0 enabled
1030 12:21:51.076715 PNP: 0c09.0 scanning...
1031 12:21:51.080344 scan_static_bus for PNP: 0c09.0
1032 12:21:51.083142 scan_static_bus for PNP: 0c09.0 done
1033 12:21:51.086709 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1034 12:21:51.093139 scan_static_bus for PCI: 00:1f.0 done
1035 12:21:51.096713 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1036 12:21:51.100063 PCI: 00:1f.2 scanning...
1037 12:21:51.103082 scan_static_bus for PCI: 00:1f.2
1038 12:21:51.103508 GENERIC: 0.0 enabled
1039 12:21:51.106557 GENERIC: 0.0 scanning...
1040 12:21:51.110120 scan_static_bus for GENERIC: 0.0
1041 12:21:51.113184 GENERIC: 0.0 enabled
1042 12:21:51.116604 GENERIC: 1.0 enabled
1043 12:21:51.119683 scan_static_bus for GENERIC: 0.0 done
1044 12:21:51.123148 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1045 12:21:51.126630 scan_static_bus for PCI: 00:1f.2 done
1046 12:21:51.132759 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1047 12:21:51.136517 PCI: 00:1f.3 scanning...
1048 12:21:51.139672 scan_static_bus for PCI: 00:1f.3
1049 12:21:51.142742 scan_static_bus for PCI: 00:1f.3 done
1050 12:21:51.146121 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1051 12:21:51.149506 PCI: 00:1f.5 scanning...
1052 12:21:51.152677 scan_generic_bus for PCI: 00:1f.5
1053 12:21:51.156338 scan_generic_bus for PCI: 00:1f.5 done
1054 12:21:51.163122 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1055 12:21:51.166406 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1056 12:21:51.169333 scan_static_bus for Root Device done
1057 12:21:51.176071 scan_bus: bus Root Device finished in 736 msecs
1058 12:21:51.176531 done
1059 12:21:51.183345 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1060 12:21:51.185697 Chrome EC: UHEPI supported
1061 12:21:51.192935 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1062 12:21:51.198929 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1063 12:21:51.202711 SPI flash protection: WPSW=0 SRP0=0
1064 12:21:51.206193 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1065 12:21:51.213065 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1066 12:21:51.215787 found VGA at PCI: 00:02.0
1067 12:21:51.218824 Setting up VGA for PCI: 00:02.0
1068 12:21:51.222131 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1069 12:21:51.228980 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1070 12:21:51.229528 Allocating resources...
1071 12:21:51.232301 Reading resources...
1072 12:21:51.235263 Root Device read_resources bus 0 link: 0
1073 12:21:51.241890 DOMAIN: 0000 read_resources bus 0 link: 0
1074 12:21:51.245349 PCI: 00:04.0 read_resources bus 1 link: 0
1075 12:21:51.252164 PCI: 00:04.0 read_resources bus 1 link: 0 done
1076 12:21:51.255476 PCI: 00:0d.0 read_resources bus 0 link: 0
1077 12:21:51.262128 USB0 port 0 read_resources bus 0 link: 0
1078 12:21:51.265102 USB0 port 0 read_resources bus 0 link: 0 done
1079 12:21:51.271832 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1080 12:21:51.274914 PCI: 00:14.0 read_resources bus 0 link: 0
1081 12:21:51.278209 USB0 port 0 read_resources bus 0 link: 0
1082 12:21:51.285844 USB0 port 0 read_resources bus 0 link: 0 done
1083 12:21:51.289304 PCI: 00:14.0 read_resources bus 0 link: 0 done
1084 12:21:51.295604 PCI: 00:14.3 read_resources bus 0 link: 0
1085 12:21:51.299137 PCI: 00:14.3 read_resources bus 0 link: 0 done
1086 12:21:51.305508 PCI: 00:15.0 read_resources bus 0 link: 0
1087 12:21:51.308893 PCI: 00:15.0 read_resources bus 0 link: 0 done
1088 12:21:51.315784 PCI: 00:15.1 read_resources bus 0 link: 0
1089 12:21:51.318680 PCI: 00:15.1 read_resources bus 0 link: 0 done
1090 12:21:51.326195 PCI: 00:19.1 read_resources bus 0 link: 0
1091 12:21:51.329379 PCI: 00:19.1 read_resources bus 0 link: 0 done
1092 12:21:51.336093 PCI: 00:1d.0 read_resources bus 1 link: 0
1093 12:21:51.339482 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1094 12:21:51.346269 PCI: 00:1e.2 read_resources bus 2 link: 0
1095 12:21:51.349421 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1096 12:21:51.356081 PCI: 00:1e.3 read_resources bus 3 link: 0
1097 12:21:51.359336 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1098 12:21:51.365923 PCI: 00:1f.0 read_resources bus 0 link: 0
1099 12:21:51.369016 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1100 12:21:51.375519 PCI: 00:1f.2 read_resources bus 0 link: 0
1101 12:21:51.379118 GENERIC: 0.0 read_resources bus 0 link: 0
1102 12:21:51.385673 GENERIC: 0.0 read_resources bus 0 link: 0 done
1103 12:21:51.389150 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1104 12:21:51.395470 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 12:21:51.398896 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1106 12:21:51.405882 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1107 12:21:51.408831 Root Device read_resources bus 0 link: 0 done
1108 12:21:51.412246 Done reading resources.
1109 12:21:51.418858 Show resources in subtree (Root Device)...After reading.
1110 12:21:51.422175 Root Device child on link 0 DOMAIN: 0000
1111 12:21:51.425063 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 12:21:51.435515 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 12:21:51.445251 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1114 12:21:51.448906 PCI: 00:00.0
1115 12:21:51.454835 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 12:21:51.465023 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 12:21:51.475006 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 12:21:51.485127 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 12:21:51.494971 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 12:21:51.505348 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 12:21:51.511642 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 12:21:51.521781 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 12:21:51.531562 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 12:21:51.541771 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1125 12:21:51.551203 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1126 12:21:51.561394 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1127 12:21:51.567675 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1128 12:21:51.577586 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1129 12:21:51.587680 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1130 12:21:51.597696 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1131 12:21:51.607538 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1132 12:21:51.617645 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1133 12:21:51.624437 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1134 12:21:51.634346 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1135 12:21:51.637213 PCI: 00:02.0
1136 12:21:51.647342 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1137 12:21:51.657274 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1138 12:21:51.667251 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1139 12:21:51.670448 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1140 12:21:51.680508 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1141 12:21:51.683878 GENERIC: 0.0
1142 12:21:51.684336 PCI: 00:05.0
1143 12:21:51.693497 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1144 12:21:51.700661 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1145 12:21:51.701198 GENERIC: 0.0
1146 12:21:51.704274 PCI: 00:08.0
1147 12:21:51.713765 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 12:21:51.714445 PCI: 00:0a.0
1149 12:21:51.717191 PCI: 00:0d.0 child on link 0 USB0 port 0
1150 12:21:51.727426 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 12:21:51.733239 USB0 port 0 child on link 0 USB3 port 0
1152 12:21:51.733732 USB3 port 0
1153 12:21:51.736679 USB3 port 1
1154 12:21:51.737133 USB3 port 2
1155 12:21:51.740267 USB3 port 3
1156 12:21:51.743116 PCI: 00:14.0 child on link 0 USB0 port 0
1157 12:21:51.753647 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1158 12:21:51.760348 USB0 port 0 child on link 0 USB2 port 0
1159 12:21:51.760900 USB2 port 0
1160 12:21:51.763661 USB2 port 1
1161 12:21:51.764257 USB2 port 2
1162 12:21:51.766802 USB2 port 3
1163 12:21:51.767351 USB2 port 4
1164 12:21:51.770006 USB2 port 5
1165 12:21:51.770459 USB2 port 6
1166 12:21:51.773090 USB2 port 7
1167 12:21:51.773540 USB2 port 8
1168 12:21:51.776371 USB2 port 9
1169 12:21:51.779590 USB3 port 0
1170 12:21:51.780086 USB3 port 1
1171 12:21:51.782554 USB3 port 2
1172 12:21:51.783000 USB3 port 3
1173 12:21:51.786158 PCI: 00:14.2
1174 12:21:51.796206 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 12:21:51.805900 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1176 12:21:51.809512 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1177 12:21:51.819283 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1178 12:21:51.822786 GENERIC: 0.0
1179 12:21:51.826059 PCI: 00:15.0 child on link 0 I2C: 00:1a
1180 12:21:51.835943 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 12:21:51.836467 I2C: 00:1a
1182 12:21:51.838786 I2C: 00:31
1183 12:21:51.839247 I2C: 00:32
1184 12:21:51.845797 PCI: 00:15.1 child on link 0 I2C: 00:10
1185 12:21:51.855623 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:21:51.856453 I2C: 00:10
1187 12:21:51.859146 PCI: 00:15.2
1188 12:21:51.868764 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 12:21:51.869246 PCI: 00:15.3
1190 12:21:51.878917 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 12:21:51.882112 PCI: 00:16.0
1192 12:21:51.892044 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:21:51.892539 PCI: 00:19.0
1194 12:21:51.895032 PCI: 00:19.1 child on link 0 I2C: 00:15
1195 12:21:51.905200 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:21:51.909095 I2C: 00:15
1197 12:21:51.912123 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1198 12:21:51.922087 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 12:21:51.931844 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 12:21:51.941724 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 12:21:51.942183 GENERIC: 0.0
1202 12:21:51.945472 PCI: 01:00.0
1203 12:21:51.954734 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 12:21:51.965100 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1205 12:21:51.971147 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1206 12:21:51.974576 PCI: 00:1e.0
1207 12:21:51.985328 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 12:21:51.988157 PCI: 00:1e.2 child on link 0 SPI: 00
1209 12:21:51.997634 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:21:52.001157 SPI: 00
1211 12:21:52.004174 PCI: 00:1e.3 child on link 0 SPI: 00
1212 12:21:52.014638 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:21:52.015171 SPI: 00
1214 12:21:52.021137 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 12:21:52.027595 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 12:21:52.030768 PNP: 0c09.0
1217 12:21:52.040814 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 12:21:52.044019 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 12:21:52.053861 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 12:21:52.063811 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 12:21:52.067157 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 12:21:52.070842 GENERIC: 0.0
1223 12:21:52.071367 GENERIC: 1.0
1224 12:21:52.073546 PCI: 00:1f.3
1225 12:21:52.083781 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:21:52.093512 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:21:52.094056 PCI: 00:1f.5
1228 12:21:52.103219 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 12:21:52.106590 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 12:21:52.110082 APIC: 00
1231 12:21:52.110539 APIC: 01
1232 12:21:52.110902 APIC: 03
1233 12:21:52.113436 APIC: 06
1234 12:21:52.114021 APIC: 05
1235 12:21:52.116826 APIC: 04
1236 12:21:52.117370 APIC: 02
1237 12:21:52.117735 APIC: 07
1238 12:21:52.126756 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 12:21:52.130002 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 12:21:52.136616 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 12:21:52.143058 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 12:21:52.146374 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 12:21:52.153396 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1244 12:21:52.156159 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1245 12:21:52.162995 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 12:21:52.169294 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1247 12:21:52.179631 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1248 12:21:52.186270 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1249 12:21:52.192608 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1250 12:21:52.199397 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 12:21:52.206032 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1252 12:21:52.215662 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1253 12:21:52.219343 DOMAIN: 0000: Resource ranges:
1254 12:21:52.222587 * Base: 1000, Size: 800, Tag: 100
1255 12:21:52.226132 * Base: 1900, Size: e700, Tag: 100
1256 12:21:52.229029 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1257 12:21:52.235434 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1258 12:21:52.241932 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1259 12:21:52.252229 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1260 12:21:52.258487 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1261 12:21:52.265317 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1262 12:21:52.274956 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1263 12:21:52.281940 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1264 12:21:52.288203 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1265 12:21:52.298580 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1266 12:21:52.304832 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1267 12:21:52.311657 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1268 12:21:52.321605 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1269 12:21:52.328094 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1270 12:21:52.334758 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1271 12:21:52.344571 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1272 12:21:52.351139 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1273 12:21:52.358222 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1274 12:21:52.367733 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1275 12:21:52.374486 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1276 12:21:52.381218 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1277 12:21:52.390967 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1278 12:21:52.397447 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1279 12:21:52.404507 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1280 12:21:52.414203 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1281 12:21:52.417535 DOMAIN: 0000: Resource ranges:
1282 12:21:52.420702 * Base: 7fc00000, Size: 40400000, Tag: 200
1283 12:21:52.424251 * Base: d0000000, Size: 28000000, Tag: 200
1284 12:21:52.431078 * Base: fa000000, Size: 1000000, Tag: 200
1285 12:21:52.434103 * Base: fb001000, Size: 2fff000, Tag: 200
1286 12:21:52.437334 * Base: fe010000, Size: 2e000, Tag: 200
1287 12:21:52.440423 * Base: fe03f000, Size: d41000, Tag: 200
1288 12:21:52.447110 * Base: fed88000, Size: 8000, Tag: 200
1289 12:21:52.450311 * Base: fed93000, Size: d000, Tag: 200
1290 12:21:52.454037 * Base: feda2000, Size: 1e000, Tag: 200
1291 12:21:52.457152 * Base: fede0000, Size: 1220000, Tag: 200
1292 12:21:52.463530 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1293 12:21:52.470069 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1294 12:21:52.476575 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1295 12:21:52.483532 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1296 12:21:52.490592 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1297 12:21:52.496617 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1298 12:21:52.503238 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1299 12:21:52.510412 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1300 12:21:52.516390 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1301 12:21:52.523603 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1302 12:21:52.529647 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1303 12:21:52.536304 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1304 12:21:52.543176 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1305 12:21:52.549525 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1306 12:21:52.556413 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1307 12:21:52.562901 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1308 12:21:52.569300 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1309 12:21:52.576297 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1310 12:21:52.582680 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1311 12:21:52.589491 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1312 12:21:52.595995 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1313 12:21:52.602508 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1314 12:21:52.609119 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1315 12:21:52.615594 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1316 12:21:52.625909 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1317 12:21:52.629342 PCI: 00:1d.0: Resource ranges:
1318 12:21:52.632245 * Base: 7fc00000, Size: 100000, Tag: 200
1319 12:21:52.638999 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1320 12:21:52.645746 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1321 12:21:52.652149 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1322 12:21:52.662074 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1323 12:21:52.668820 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1324 12:21:52.672019 Root Device assign_resources, bus 0 link: 0
1325 12:21:52.678523 DOMAIN: 0000 assign_resources, bus 0 link: 0
1326 12:21:52.685432 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1327 12:21:52.695154 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1328 12:21:52.701471 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1329 12:21:52.711552 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1330 12:21:52.714804 PCI: 00:04.0 assign_resources, bus 1 link: 0
1331 12:21:52.718045 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 12:21:52.727881 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1333 12:21:52.734231 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1334 12:21:52.744459 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1335 12:21:52.747825 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1336 12:21:52.754177 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 12:21:52.761230 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1338 12:21:52.763996 PCI: 00:14.0 assign_resources, bus 0 link: 0
1339 12:21:52.770889 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 12:21:52.777247 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1341 12:21:52.787285 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1342 12:21:52.793858 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1343 12:21:52.800244 PCI: 00:14.3 assign_resources, bus 0 link: 0
1344 12:21:52.803766 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 12:21:52.813780 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1346 12:21:52.817095 PCI: 00:15.0 assign_resources, bus 0 link: 0
1347 12:21:52.820341 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 12:21:52.830379 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1349 12:21:52.833558 PCI: 00:15.1 assign_resources, bus 0 link: 0
1350 12:21:52.840090 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 12:21:52.846818 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1352 12:21:52.856772 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1353 12:21:52.863273 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1354 12:21:52.873268 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1355 12:21:52.876465 PCI: 00:19.1 assign_resources, bus 0 link: 0
1356 12:21:52.879653 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 12:21:52.889571 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1358 12:21:52.899771 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1359 12:21:52.909895 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1360 12:21:52.912434 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1361 12:21:52.922814 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1362 12:21:52.928896 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1363 12:21:52.935921 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1364 12:21:52.942055 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 12:21:52.949236 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 12:21:52.955366 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 12:21:52.958727 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 12:21:52.968874 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 12:21:52.971893 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 12:21:52.975179 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 12:21:52.981642 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 12:21:52.985426 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 12:21:52.991979 LPC: Trying to open IO window from 800 size 1ff
1374 12:21:52.998375 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 12:21:53.008528 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 12:21:53.014986 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 12:21:53.021748 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 12:21:53.024845 Root Device assign_resources, bus 0 link: 0
1379 12:21:53.028229 Done setting resources.
1380 12:21:53.034570 Show resources in subtree (Root Device)...After assigning values.
1381 12:21:53.038039 Root Device child on link 0 DOMAIN: 0000
1382 12:21:53.041454 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 12:21:53.051541 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 12:21:53.061368 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 12:21:53.064832 PCI: 00:00.0
1386 12:21:53.074394 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 12:21:53.081103 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 12:21:53.091395 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 12:21:53.100722 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 12:21:53.110911 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 12:21:53.120808 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 12:21:53.130353 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 12:21:53.137254 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 12:21:53.146734 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 12:21:53.156891 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 12:21:53.167186 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 12:21:53.176748 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 12:21:53.186854 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 12:21:53.193489 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 12:21:53.203236 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 12:21:53.213409 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 12:21:53.223538 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 12:21:53.233034 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 12:21:53.242999 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 12:21:53.252941 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 12:21:53.253514 PCI: 00:02.0
1407 12:21:53.263235 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 12:21:53.276130 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 12:21:53.282556 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 12:21:53.289451 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 12:21:53.299211 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 12:21:53.299846 GENERIC: 0.0
1413 12:21:53.302736 PCI: 00:05.0
1414 12:21:53.312330 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 12:21:53.318820 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 12:21:53.319281 GENERIC: 0.0
1417 12:21:53.322327 PCI: 00:08.0
1418 12:21:53.332568 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 12:21:53.333117 PCI: 00:0a.0
1420 12:21:53.339047 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 12:21:53.349159 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 12:21:53.351836 USB0 port 0 child on link 0 USB3 port 0
1423 12:21:53.355580 USB3 port 0
1424 12:21:53.356179 USB3 port 1
1425 12:21:53.359055 USB3 port 2
1426 12:21:53.359614 USB3 port 3
1427 12:21:53.362267 PCI: 00:14.0 child on link 0 USB0 port 0
1428 12:21:53.375188 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 12:21:53.378635 USB0 port 0 child on link 0 USB2 port 0
1430 12:21:53.379096 USB2 port 0
1431 12:21:53.381474 USB2 port 1
1432 12:21:53.384931 USB2 port 2
1433 12:21:53.385388 USB2 port 3
1434 12:21:53.388295 USB2 port 4
1435 12:21:53.388753 USB2 port 5
1436 12:21:53.391762 USB2 port 6
1437 12:21:53.392223 USB2 port 7
1438 12:21:53.395180 USB2 port 8
1439 12:21:53.395632 USB2 port 9
1440 12:21:53.398394 USB3 port 0
1441 12:21:53.398951 USB3 port 1
1442 12:21:53.401548 USB3 port 2
1443 12:21:53.402007 USB3 port 3
1444 12:21:53.404852 PCI: 00:14.2
1445 12:21:53.414697 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 12:21:53.425281 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 12:21:53.431325 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 12:21:53.441094 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 12:21:53.441594 GENERIC: 0.0
1450 12:21:53.447880 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 12:21:53.458168 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 12:21:53.458713 I2C: 00:1a
1453 12:21:53.460950 I2C: 00:31
1454 12:21:53.461399 I2C: 00:32
1455 12:21:53.464641 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 12:21:53.477864 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 12:21:53.478407 I2C: 00:10
1458 12:21:53.478811 PCI: 00:15.2
1459 12:21:53.490546 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 12:21:53.491041 PCI: 00:15.3
1461 12:21:53.500993 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 12:21:53.503764 PCI: 00:16.0
1463 12:21:53.514059 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 12:21:53.514625 PCI: 00:19.0
1465 12:21:53.520390 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 12:21:53.530407 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 12:21:53.530867 I2C: 00:15
1468 12:21:53.537543 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 12:21:53.546965 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 12:21:53.556946 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 12:21:53.566765 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 12:21:53.570216 GENERIC: 0.0
1473 12:21:53.570674 PCI: 01:00.0
1474 12:21:53.580302 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 12:21:53.593586 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1476 12:21:53.602985 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1477 12:21:53.603484 PCI: 00:1e.0
1478 12:21:53.616559 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 12:21:53.619530 PCI: 00:1e.2 child on link 0 SPI: 00
1480 12:21:53.629532 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1481 12:21:53.629997 SPI: 00
1482 12:21:53.636307 PCI: 00:1e.3 child on link 0 SPI: 00
1483 12:21:53.646118 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1484 12:21:53.646779 SPI: 00
1485 12:21:53.649108 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1486 12:21:53.659547 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1487 12:21:53.662877 PNP: 0c09.0
1488 12:21:53.669400 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1489 12:21:53.676343 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1490 12:21:53.682681 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1491 12:21:53.692235 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1492 12:21:53.699141 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1493 12:21:53.699805 GENERIC: 0.0
1494 12:21:53.702890 GENERIC: 1.0
1495 12:21:53.703514 PCI: 00:1f.3
1496 12:21:53.712138 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1497 12:21:53.721825 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1498 12:21:53.725604 PCI: 00:1f.5
1499 12:21:53.735542 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1500 12:21:53.738749 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 12:21:53.741801 APIC: 00
1502 12:21:53.742444 APIC: 01
1503 12:21:53.745178 APIC: 03
1504 12:21:53.745740 APIC: 06
1505 12:21:53.746212 APIC: 05
1506 12:21:53.748536 APIC: 04
1507 12:21:53.749109 APIC: 02
1508 12:21:53.749566 APIC: 07
1509 12:21:53.751799 Done allocating resources.
1510 12:21:53.758620 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1511 12:21:53.765146 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1512 12:21:53.768501 Configure GPIOs for I2S audio on UP4.
1513 12:21:53.775547 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1514 12:21:53.778475 Enabling resources...
1515 12:21:53.782042 PCI: 00:00.0 subsystem <- 8086/9a12
1516 12:21:53.785434 PCI: 00:00.0 cmd <- 06
1517 12:21:53.788306 PCI: 00:02.0 subsystem <- 8086/9a40
1518 12:21:53.791739 PCI: 00:02.0 cmd <- 03
1519 12:21:53.795101 PCI: 00:04.0 subsystem <- 8086/9a03
1520 12:21:53.798530 PCI: 00:04.0 cmd <- 02
1521 12:21:53.801559 PCI: 00:05.0 subsystem <- 8086/9a19
1522 12:21:53.802082 PCI: 00:05.0 cmd <- 02
1523 12:21:53.808135 PCI: 00:08.0 subsystem <- 8086/9a11
1524 12:21:53.808599 PCI: 00:08.0 cmd <- 06
1525 12:21:53.814709 PCI: 00:0d.0 subsystem <- 8086/9a13
1526 12:21:53.815195 PCI: 00:0d.0 cmd <- 02
1527 12:21:53.818387 PCI: 00:14.0 subsystem <- 8086/a0ed
1528 12:21:53.821612 PCI: 00:14.0 cmd <- 02
1529 12:21:53.824494 PCI: 00:14.2 subsystem <- 8086/a0ef
1530 12:21:53.827940 PCI: 00:14.2 cmd <- 02
1531 12:21:53.831272 PCI: 00:14.3 subsystem <- 8086/a0f0
1532 12:21:53.834640 PCI: 00:14.3 cmd <- 02
1533 12:21:53.837941 PCI: 00:15.0 subsystem <- 8086/a0e8
1534 12:21:53.841250 PCI: 00:15.0 cmd <- 02
1535 12:21:53.844448 PCI: 00:15.1 subsystem <- 8086/a0e9
1536 12:21:53.847798 PCI: 00:15.1 cmd <- 02
1537 12:21:53.850728 PCI: 00:15.2 subsystem <- 8086/a0ea
1538 12:21:53.854415 PCI: 00:15.2 cmd <- 02
1539 12:21:53.857762 PCI: 00:15.3 subsystem <- 8086/a0eb
1540 12:21:53.858388 PCI: 00:15.3 cmd <- 02
1541 12:21:53.864187 PCI: 00:16.0 subsystem <- 8086/a0e0
1542 12:21:53.864807 PCI: 00:16.0 cmd <- 02
1543 12:21:53.867610 PCI: 00:19.1 subsystem <- 8086/a0c6
1544 12:21:53.870883 PCI: 00:19.1 cmd <- 02
1545 12:21:53.874524 PCI: 00:1d.0 bridge ctrl <- 0013
1546 12:21:53.877774 PCI: 00:1d.0 subsystem <- 8086/a0b0
1547 12:21:53.880465 PCI: 00:1d.0 cmd <- 06
1548 12:21:53.883870 PCI: 00:1e.0 subsystem <- 8086/a0a8
1549 12:21:53.887572 PCI: 00:1e.0 cmd <- 06
1550 12:21:53.890981 PCI: 00:1e.2 subsystem <- 8086/a0aa
1551 12:21:53.893802 PCI: 00:1e.2 cmd <- 06
1552 12:21:53.897076 PCI: 00:1e.3 subsystem <- 8086/a0ab
1553 12:21:53.900696 PCI: 00:1e.3 cmd <- 02
1554 12:21:53.903672 PCI: 00:1f.0 subsystem <- 8086/a087
1555 12:21:53.906985 PCI: 00:1f.0 cmd <- 407
1556 12:21:53.910239 PCI: 00:1f.3 subsystem <- 8086/a0c8
1557 12:21:53.913411 PCI: 00:1f.3 cmd <- 02
1558 12:21:53.917062 PCI: 00:1f.5 subsystem <- 8086/a0a4
1559 12:21:53.917514 PCI: 00:1f.5 cmd <- 406
1560 12:21:53.923007 PCI: 01:00.0 cmd <- 02
1561 12:21:53.927057 done.
1562 12:21:53.930439 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1563 12:21:53.933890 Initializing devices...
1564 12:21:53.937317 Root Device init
1565 12:21:53.940278 Chrome EC: Set SMI mask to 0x0000000000000000
1566 12:21:53.946991 Chrome EC: clear events_b mask to 0x0000000000000000
1567 12:21:53.953387 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1568 12:21:53.956603 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1569 12:21:53.963504 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1570 12:21:53.970219 Chrome EC: Set WAKE mask to 0x0000000000000000
1571 12:21:53.973504 fw_config match found: DB_USB=USB3_ACTIVE
1572 12:21:53.979984 Configure Right Type-C port orientation for retimer
1573 12:21:53.983566 Root Device init finished in 42 msecs
1574 12:21:53.987090 PCI: 00:00.0 init
1575 12:21:53.987573 CPU TDP = 9 Watts
1576 12:21:53.990261 CPU PL1 = 9 Watts
1577 12:21:53.993294 CPU PL2 = 40 Watts
1578 12:21:53.993752 CPU PL4 = 83 Watts
1579 12:21:53.996836 PCI: 00:00.0 init finished in 8 msecs
1580 12:21:53.999837 PCI: 00:02.0 init
1581 12:21:54.003315 GMA: Found VBT in CBFS
1582 12:21:54.006791 GMA: Found valid VBT in CBFS
1583 12:21:54.010257 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1584 12:21:54.019763 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1585 12:21:54.023030 PCI: 00:02.0 init finished in 18 msecs
1586 12:21:54.026488 PCI: 00:05.0 init
1587 12:21:54.029817 PCI: 00:05.0 init finished in 0 msecs
1588 12:21:54.030291 PCI: 00:08.0 init
1589 12:21:54.036201 PCI: 00:08.0 init finished in 0 msecs
1590 12:21:54.036654 PCI: 00:14.0 init
1591 12:21:54.043176 PCI: 00:14.0 init finished in 0 msecs
1592 12:21:54.043625 PCI: 00:14.2 init
1593 12:21:54.046152 PCI: 00:14.2 init finished in 0 msecs
1594 12:21:54.049899 PCI: 00:15.0 init
1595 12:21:54.053909 I2C bus 0 version 0x3230302a
1596 12:21:54.056691 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1597 12:21:54.060113 PCI: 00:15.0 init finished in 6 msecs
1598 12:21:54.063419 PCI: 00:15.1 init
1599 12:21:54.066551 I2C bus 1 version 0x3230302a
1600 12:21:54.069878 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1601 12:21:54.073110 PCI: 00:15.1 init finished in 6 msecs
1602 12:21:54.076544 PCI: 00:15.2 init
1603 12:21:54.079955 I2C bus 2 version 0x3230302a
1604 12:21:54.082883 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1605 12:21:54.086878 PCI: 00:15.2 init finished in 6 msecs
1606 12:21:54.089885 PCI: 00:15.3 init
1607 12:21:54.090353 I2C bus 3 version 0x3230302a
1608 12:21:54.096307 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1609 12:21:54.099784 PCI: 00:15.3 init finished in 6 msecs
1610 12:21:54.100234 PCI: 00:16.0 init
1611 12:21:54.103152 PCI: 00:16.0 init finished in 0 msecs
1612 12:21:54.106825 PCI: 00:19.1 init
1613 12:21:54.110240 I2C bus 5 version 0x3230302a
1614 12:21:54.114113 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1615 12:21:54.117254 PCI: 00:19.1 init finished in 6 msecs
1616 12:21:54.120130 PCI: 00:1d.0 init
1617 12:21:54.123542 Initializing PCH PCIe bridge.
1618 12:21:54.127010 PCI: 00:1d.0 init finished in 3 msecs
1619 12:21:54.130245 PCI: 00:1f.0 init
1620 12:21:54.133749 IOAPIC: Initializing IOAPIC at 0xfec00000
1621 12:21:54.139831 IOAPIC: Bootstrap Processor Local APIC = 0x00
1622 12:21:54.140284 IOAPIC: ID = 0x02
1623 12:21:54.143428 IOAPIC: Dumping registers
1624 12:21:54.146729 reg 0x0000: 0x02000000
1625 12:21:54.147221 reg 0x0001: 0x00770020
1626 12:21:54.150138 reg 0x0002: 0x00000000
1627 12:21:54.152990 PCI: 00:1f.0 init finished in 21 msecs
1628 12:21:54.157066 PCI: 00:1f.2 init
1629 12:21:54.160426 Disabling ACPI via APMC.
1630 12:21:54.163785 APMC done.
1631 12:21:54.166844 PCI: 00:1f.2 init finished in 5 msecs
1632 12:21:54.177928 PCI: 01:00.0 init
1633 12:21:54.181418 PCI: 01:00.0 init finished in 0 msecs
1634 12:21:54.184696 PNP: 0c09.0 init
1635 12:21:54.187923 Google Chrome EC uptime: 8.399 seconds
1636 12:21:54.194495 Google Chrome AP resets since EC boot: 1
1637 12:21:54.197637 Google Chrome most recent AP reset causes:
1638 12:21:54.200877 0.348: 32775 shutdown: entering G3
1639 12:21:54.207746 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1640 12:21:54.210759 PNP: 0c09.0 init finished in 23 msecs
1641 12:21:54.216990 Devices initialized
1642 12:21:54.220383 Show all devs... After init.
1643 12:21:54.223439 Root Device: enabled 1
1644 12:21:54.223943 DOMAIN: 0000: enabled 1
1645 12:21:54.227220 CPU_CLUSTER: 0: enabled 1
1646 12:21:54.230685 PCI: 00:00.0: enabled 1
1647 12:21:54.233546 PCI: 00:02.0: enabled 1
1648 12:21:54.234059 PCI: 00:04.0: enabled 1
1649 12:21:54.236882 PCI: 00:05.0: enabled 1
1650 12:21:54.239891 PCI: 00:06.0: enabled 0
1651 12:21:54.243058 PCI: 00:07.0: enabled 0
1652 12:21:54.243491 PCI: 00:07.1: enabled 0
1653 12:21:54.246740 PCI: 00:07.2: enabled 0
1654 12:21:54.249831 PCI: 00:07.3: enabled 0
1655 12:21:54.253217 PCI: 00:08.0: enabled 1
1656 12:21:54.253672 PCI: 00:09.0: enabled 0
1657 12:21:54.256734 PCI: 00:0a.0: enabled 0
1658 12:21:54.259971 PCI: 00:0d.0: enabled 1
1659 12:21:54.263004 PCI: 00:0d.1: enabled 0
1660 12:21:54.263459 PCI: 00:0d.2: enabled 0
1661 12:21:54.266753 PCI: 00:0d.3: enabled 0
1662 12:21:54.270056 PCI: 00:0e.0: enabled 0
1663 12:21:54.273171 PCI: 00:10.2: enabled 1
1664 12:21:54.273626 PCI: 00:10.6: enabled 0
1665 12:21:54.276571 PCI: 00:10.7: enabled 0
1666 12:21:54.279476 PCI: 00:12.0: enabled 0
1667 12:21:54.283155 PCI: 00:12.6: enabled 0
1668 12:21:54.283622 PCI: 00:13.0: enabled 0
1669 12:21:54.286298 PCI: 00:14.0: enabled 1
1670 12:21:54.289505 PCI: 00:14.1: enabled 0
1671 12:21:54.289963 PCI: 00:14.2: enabled 1
1672 12:21:54.292785 PCI: 00:14.3: enabled 1
1673 12:21:54.296497 PCI: 00:15.0: enabled 1
1674 12:21:54.299439 PCI: 00:15.1: enabled 1
1675 12:21:54.299940 PCI: 00:15.2: enabled 1
1676 12:21:54.302916 PCI: 00:15.3: enabled 1
1677 12:21:54.306242 PCI: 00:16.0: enabled 1
1678 12:21:54.309707 PCI: 00:16.1: enabled 0
1679 12:21:54.310167 PCI: 00:16.2: enabled 0
1680 12:21:54.313110 PCI: 00:16.3: enabled 0
1681 12:21:54.315970 PCI: 00:16.4: enabled 0
1682 12:21:54.319430 PCI: 00:16.5: enabled 0
1683 12:21:54.319933 PCI: 00:17.0: enabled 0
1684 12:21:54.322966 PCI: 00:19.0: enabled 0
1685 12:21:54.326430 PCI: 00:19.1: enabled 1
1686 12:21:54.329737 PCI: 00:19.2: enabled 0
1687 12:21:54.330303 PCI: 00:1c.0: enabled 1
1688 12:21:54.332458 PCI: 00:1c.1: enabled 0
1689 12:21:54.336110 PCI: 00:1c.2: enabled 0
1690 12:21:54.336627 PCI: 00:1c.3: enabled 0
1691 12:21:54.339363 PCI: 00:1c.4: enabled 0
1692 12:21:54.342736 PCI: 00:1c.5: enabled 0
1693 12:21:54.346302 PCI: 00:1c.6: enabled 1
1694 12:21:54.346751 PCI: 00:1c.7: enabled 0
1695 12:21:54.349494 PCI: 00:1d.0: enabled 1
1696 12:21:54.352760 PCI: 00:1d.1: enabled 0
1697 12:21:54.355919 PCI: 00:1d.2: enabled 1
1698 12:21:54.356369 PCI: 00:1d.3: enabled 0
1699 12:21:54.359356 PCI: 00:1e.0: enabled 1
1700 12:21:54.362832 PCI: 00:1e.1: enabled 0
1701 12:21:54.365610 PCI: 00:1e.2: enabled 1
1702 12:21:54.366063 PCI: 00:1e.3: enabled 1
1703 12:21:54.369057 PCI: 00:1f.0: enabled 1
1704 12:21:54.372113 PCI: 00:1f.1: enabled 0
1705 12:21:54.375759 PCI: 00:1f.2: enabled 1
1706 12:21:54.376215 PCI: 00:1f.3: enabled 1
1707 12:21:54.379491 PCI: 00:1f.4: enabled 0
1708 12:21:54.382451 PCI: 00:1f.5: enabled 1
1709 12:21:54.382905 PCI: 00:1f.6: enabled 0
1710 12:21:54.385797 PCI: 00:1f.7: enabled 0
1711 12:21:54.388943 APIC: 00: enabled 1
1712 12:21:54.392149 GENERIC: 0.0: enabled 1
1713 12:21:54.392609 GENERIC: 0.0: enabled 1
1714 12:21:54.395397 GENERIC: 1.0: enabled 1
1715 12:21:54.399034 GENERIC: 0.0: enabled 1
1716 12:21:54.402084 GENERIC: 1.0: enabled 1
1717 12:21:54.402531 USB0 port 0: enabled 1
1718 12:21:54.405740 GENERIC: 0.0: enabled 1
1719 12:21:54.408562 USB0 port 0: enabled 1
1720 12:21:54.408999 GENERIC: 0.0: enabled 1
1721 12:21:54.412221 I2C: 00:1a: enabled 1
1722 12:21:54.415675 I2C: 00:31: enabled 1
1723 12:21:54.416179 I2C: 00:32: enabled 1
1724 12:21:54.419108 I2C: 00:10: enabled 1
1725 12:21:54.422406 I2C: 00:15: enabled 1
1726 12:21:54.425298 GENERIC: 0.0: enabled 0
1727 12:21:54.425754 GENERIC: 1.0: enabled 0
1728 12:21:54.428749 GENERIC: 0.0: enabled 1
1729 12:21:54.432248 SPI: 00: enabled 1
1730 12:21:54.432703 SPI: 00: enabled 1
1731 12:21:54.435518 PNP: 0c09.0: enabled 1
1732 12:21:54.438780 GENERIC: 0.0: enabled 1
1733 12:21:54.439261 USB3 port 0: enabled 1
1734 12:21:54.442290 USB3 port 1: enabled 1
1735 12:21:54.445828 USB3 port 2: enabled 0
1736 12:21:54.446325 USB3 port 3: enabled 0
1737 12:21:54.448670 USB2 port 0: enabled 0
1738 12:21:54.452378 USB2 port 1: enabled 1
1739 12:21:54.455080 USB2 port 2: enabled 1
1740 12:21:54.455531 USB2 port 3: enabled 0
1741 12:21:54.458616 USB2 port 4: enabled 1
1742 12:21:54.461967 USB2 port 5: enabled 0
1743 12:21:54.462417 USB2 port 6: enabled 0
1744 12:21:54.465359 USB2 port 7: enabled 0
1745 12:21:54.468185 USB2 port 8: enabled 0
1746 12:21:54.471780 USB2 port 9: enabled 0
1747 12:21:54.472306 USB3 port 0: enabled 0
1748 12:21:54.475025 USB3 port 1: enabled 1
1749 12:21:54.478614 USB3 port 2: enabled 0
1750 12:21:54.479065 USB3 port 3: enabled 0
1751 12:21:54.481838 GENERIC: 0.0: enabled 1
1752 12:21:54.485601 GENERIC: 1.0: enabled 1
1753 12:21:54.486060 APIC: 01: enabled 1
1754 12:21:54.488423 APIC: 03: enabled 1
1755 12:21:54.491595 APIC: 06: enabled 1
1756 12:21:54.492099 APIC: 05: enabled 1
1757 12:21:54.494952 APIC: 04: enabled 1
1758 12:21:54.498094 APIC: 02: enabled 1
1759 12:21:54.498542 APIC: 07: enabled 1
1760 12:21:54.501594 PCI: 01:00.0: enabled 1
1761 12:21:54.508426 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1762 12:21:54.511481 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 12:21:54.514616 ELOG: NV offset 0xf30000 size 0x1000
1764 12:21:54.522131 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 12:21:54.528819 ELOG: Event(17) added with size 13 at 2023-03-13 12:21:54 UTC
1766 12:21:54.535157 ELOG: Event(92) added with size 9 at 2023-03-13 12:21:54 UTC
1767 12:21:54.542097 ELOG: Event(93) added with size 9 at 2023-03-13 12:21:54 UTC
1768 12:21:54.548784 ELOG: Event(9E) added with size 10 at 2023-03-13 12:21:54 UTC
1769 12:21:54.555340 ELOG: Event(9F) added with size 14 at 2023-03-13 12:21:54 UTC
1770 12:21:54.561611 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 12:21:54.568486 ELOG: Event(A1) added with size 10 at 2023-03-13 12:21:54 UTC
1772 12:21:54.571960 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1773 12:21:54.578386 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1774 12:21:54.581795 Finalize devices...
1775 12:21:54.582248 Devices finalized
1776 12:21:54.588049 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1777 12:21:54.594764 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1778 12:21:54.598147 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1779 12:21:54.604812 ME: HFSTS1 : 0x80030055
1780 12:21:54.608096 ME: HFSTS2 : 0x30280116
1781 12:21:54.611109 ME: HFSTS3 : 0x00000050
1782 12:21:54.618278 ME: HFSTS4 : 0x00004000
1783 12:21:54.621318 ME: HFSTS5 : 0x00000000
1784 12:21:54.628131 ME: HFSTS6 : 0x00400006
1785 12:21:54.631497 ME: Manufacturing Mode : YES
1786 12:21:54.634762 ME: SPI Protection Mode Enabled : NO
1787 12:21:54.638245 ME: FW Partition Table : OK
1788 12:21:54.640966 ME: Bringup Loader Failure : NO
1789 12:21:54.644384 ME: Firmware Init Complete : NO
1790 12:21:54.647807 ME: Boot Options Present : NO
1791 12:21:54.651213 ME: Update In Progress : NO
1792 12:21:54.658207 ME: D0i3 Support : YES
1793 12:21:54.661039 ME: Low Power State Enabled : NO
1794 12:21:54.664345 ME: CPU Replaced : YES
1795 12:21:54.668114 ME: CPU Replacement Valid : YES
1796 12:21:54.671352 ME: Current Working State : 5
1797 12:21:54.674414 ME: Current Operation State : 1
1798 12:21:54.677878 ME: Current Operation Mode : 3
1799 12:21:54.680775 ME: Error Code : 0
1800 12:21:54.684255 ME: Enhanced Debug Mode : NO
1801 12:21:54.690808 ME: CPU Debug Disabled : YES
1802 12:21:54.694208 ME: TXT Support : NO
1803 12:21:54.700786 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1804 12:21:54.707168 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1805 12:21:54.710855 CBFS: 'fallback/slic' not found.
1806 12:21:54.713948 ACPI: Writing ACPI tables at 76b01000.
1807 12:21:54.717042 ACPI: * FACS
1808 12:21:54.717496 ACPI: * DSDT
1809 12:21:54.720659 Ramoops buffer: 0x100000@0x76a00000.
1810 12:21:54.727281 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1811 12:21:54.730251 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1812 12:21:54.733880 Google Chrome EC: version:
1813 12:21:54.736955 ro: voema_v2.0.7540-147f8d37d1
1814 12:21:54.740114 rw: voema_v2.0.7540-147f8d37d1
1815 12:21:54.743790 running image: 2
1816 12:21:54.750134 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1817 12:21:54.753554 ACPI: * FADT
1818 12:21:54.753998 SCI is IRQ9
1819 12:21:54.757022 ACPI: added table 1/32, length now 40
1820 12:21:54.760463 ACPI: * SSDT
1821 12:21:54.763457 Found 1 CPU(s) with 8 core(s) each.
1822 12:21:54.766858 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1823 12:21:54.773228 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1824 12:21:54.776684 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1825 12:21:54.780198 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1826 12:21:54.786580 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1827 12:21:54.793397 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1828 12:21:54.796703 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1829 12:21:54.803039 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1830 12:21:54.809579 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1831 12:21:54.813255 \_SB.PCI0.RP09: Added StorageD3Enable property
1832 12:21:54.815948 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1833 12:21:54.823568 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1834 12:21:54.829639 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1835 12:21:54.832678 PS2K: Passing 80 keymaps to kernel
1836 12:21:54.839408 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1837 12:21:54.846032 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1838 12:21:54.852921 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1839 12:21:54.859582 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1840 12:21:54.866265 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1841 12:21:54.872739 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1842 12:21:54.878858 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1843 12:21:54.885826 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1844 12:21:54.888755 ACPI: added table 2/32, length now 44
1845 12:21:54.892732 ACPI: * MCFG
1846 12:21:54.895488 ACPI: added table 3/32, length now 48
1847 12:21:54.895971 ACPI: * TPM2
1848 12:21:54.899018 TPM2 log created at 0x769f0000
1849 12:21:54.902353 ACPI: added table 4/32, length now 52
1850 12:21:54.905376 ACPI: * MADT
1851 12:21:54.905830 SCI is IRQ9
1852 12:21:54.908727 ACPI: added table 5/32, length now 56
1853 12:21:54.911973 current = 76b09850
1854 12:21:54.912458 ACPI: * DMAR
1855 12:21:54.919070 ACPI: added table 6/32, length now 60
1856 12:21:54.921728 ACPI: added table 7/32, length now 64
1857 12:21:54.922178 ACPI: * HPET
1858 12:21:54.925353 ACPI: added table 8/32, length now 68
1859 12:21:54.928681 ACPI: done.
1860 12:21:54.932067 ACPI tables: 35216 bytes.
1861 12:21:54.932519 smbios_write_tables: 769ef000
1862 12:21:54.935105 EC returned error result code 3
1863 12:21:54.938763 Couldn't obtain OEM name from CBI
1864 12:21:54.942704 Create SMBIOS type 16
1865 12:21:54.945995 Create SMBIOS type 17
1866 12:21:54.949152 GENERIC: 0.0 (WIFI Device)
1867 12:21:54.949634 SMBIOS tables: 1750 bytes.
1868 12:21:54.956215 Writing table forward entry at 0x00000500
1869 12:21:54.962522 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1870 12:21:54.965740 Writing coreboot table at 0x76b25000
1871 12:21:54.972396 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1872 12:21:54.975409 1. 0000000000001000-000000000009ffff: RAM
1873 12:21:54.978888 2. 00000000000a0000-00000000000fffff: RESERVED
1874 12:21:54.985285 3. 0000000000100000-00000000769eefff: RAM
1875 12:21:54.988650 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1876 12:21:54.995539 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1877 12:21:55.001843 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1878 12:21:55.005282 7. 0000000077000000-000000007fbfffff: RESERVED
1879 12:21:55.012142 8. 00000000c0000000-00000000cfffffff: RESERVED
1880 12:21:55.015433 9. 00000000f8000000-00000000f9ffffff: RESERVED
1881 12:21:55.018736 10. 00000000fb000000-00000000fb000fff: RESERVED
1882 12:21:55.025129 11. 00000000fe000000-00000000fe00ffff: RESERVED
1883 12:21:55.028608 12. 00000000fed80000-00000000fed87fff: RESERVED
1884 12:21:55.035441 13. 00000000fed90000-00000000fed92fff: RESERVED
1885 12:21:55.039012 14. 00000000feda0000-00000000feda1fff: RESERVED
1886 12:21:55.045364 15. 00000000fedc0000-00000000feddffff: RESERVED
1887 12:21:55.048432 16. 0000000100000000-00000002803fffff: RAM
1888 12:21:55.052230 Passing 4 GPIOs to payload:
1889 12:21:55.055421 NAME | PORT | POLARITY | VALUE
1890 12:21:55.061662 lid | undefined | high | high
1891 12:21:55.068622 power | undefined | high | low
1892 12:21:55.071786 oprom | undefined | high | low
1893 12:21:55.078686 EC in RW | 0x000000e5 | high | high
1894 12:21:55.084799 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum be84
1895 12:21:55.088431 coreboot table: 1576 bytes.
1896 12:21:55.091814 IMD ROOT 0. 0x76fff000 0x00001000
1897 12:21:55.094825 IMD SMALL 1. 0x76ffe000 0x00001000
1898 12:21:55.098033 FSP MEMORY 2. 0x76c4e000 0x003b0000
1899 12:21:55.101608 VPD 3. 0x76c4d000 0x00000367
1900 12:21:55.105093 RO MCACHE 4. 0x76c4c000 0x00000fdc
1901 12:21:55.107932 CONSOLE 5. 0x76c2c000 0x00020000
1902 12:21:55.111381 FMAP 6. 0x76c2b000 0x00000578
1903 12:21:55.118306 TIME STAMP 7. 0x76c2a000 0x00000910
1904 12:21:55.121608 VBOOT WORK 8. 0x76c16000 0x00014000
1905 12:21:55.124533 ROMSTG STCK 9. 0x76c15000 0x00001000
1906 12:21:55.127757 AFTER CAR 10. 0x76c0a000 0x0000b000
1907 12:21:55.131218 RAMSTAGE 11. 0x76b97000 0x00073000
1908 12:21:55.134667 REFCODE 12. 0x76b42000 0x00055000
1909 12:21:55.137481 SMM BACKUP 13. 0x76b32000 0x00010000
1910 12:21:55.144660 4f444749 14. 0x76b30000 0x00002000
1911 12:21:55.147429 EXT VBT15. 0x76b2d000 0x0000219f
1912 12:21:55.150698 COREBOOT 16. 0x76b25000 0x00008000
1913 12:21:55.153897 ACPI 17. 0x76b01000 0x00024000
1914 12:21:55.157376 ACPI GNVS 18. 0x76b00000 0x00001000
1915 12:21:55.160768 RAMOOPS 19. 0x76a00000 0x00100000
1916 12:21:55.163953 TPM2 TCGLOG20. 0x769f0000 0x00010000
1917 12:21:55.167597 SMBIOS 21. 0x769ef000 0x00000800
1918 12:21:55.170730 IMD small region:
1919 12:21:55.173967 IMD ROOT 0. 0x76ffec00 0x00000400
1920 12:21:55.177030 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1921 12:21:55.180791 POWER STATE 2. 0x76ffeb80 0x00000044
1922 12:21:55.186897 ROMSTAGE 3. 0x76ffeb60 0x00000004
1923 12:21:55.190526 MEM INFO 4. 0x76ffe980 0x000001e0
1924 12:21:55.196884 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1925 12:21:55.197288 MTRR: Physical address space:
1926 12:21:55.203581 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1927 12:21:55.210642 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1928 12:21:55.216927 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1929 12:21:55.223775 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1930 12:21:55.230599 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1931 12:21:55.236895 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1932 12:21:55.243654 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1933 12:21:55.246629 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:21:55.250123 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:21:55.253445 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 12:21:55.260074 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 12:21:55.263371 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 12:21:55.266671 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 12:21:55.270269 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 12:21:55.276413 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 12:21:55.280092 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 12:21:55.283137 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 12:21:55.286387 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 12:21:55.290592 call enable_fixed_mtrr()
1945 12:21:55.293951 CPU physical address size: 39 bits
1946 12:21:55.300246 MTRR: default type WB/UC MTRR counts: 6/6.
1947 12:21:55.303793 MTRR: UC selected as default type.
1948 12:21:55.310657 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1949 12:21:55.314062 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 12:21:55.320517 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 12:21:55.326843 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 12:21:55.333692 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1953 12:21:55.340297 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1954 12:21:55.340739
1955 12:21:55.343964 MTRR check
1956 12:21:55.346845 Fixed MTRRs : Enabled
1957 12:21:55.347314 Variable MTRRs: Enabled
1958 12:21:55.347669
1959 12:21:55.353834 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 12:21:55.356660 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 12:21:55.359960 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 12:21:55.363394 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 12:21:55.366736 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 12:21:55.373265 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 12:21:55.376933 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 12:21:55.380206 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 12:21:55.383575 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 12:21:55.390184 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 12:21:55.393318 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 12:21:55.399773 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1971 12:21:55.403450 call enable_fixed_mtrr()
1972 12:21:55.406527 Checking cr50 for pending updates
1973 12:21:55.410445 CPU physical address size: 39 bits
1974 12:21:55.413702 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 12:21:55.416725 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 12:21:55.420441 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 12:21:55.426820 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 12:21:55.429787 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 12:21:55.433489 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 12:21:55.436663 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 12:21:55.443425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 12:21:55.446607 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 12:21:55.450176 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 12:21:55.453758 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 12:21:55.459808 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 12:21:55.463240 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 12:21:55.466440 call enable_fixed_mtrr()
1988 12:21:55.469679 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 12:21:55.472749 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 12:21:55.479652 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 12:21:55.483140 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 12:21:55.485999 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 12:21:55.489707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 12:21:55.496122 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 12:21:55.499128 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 12:21:55.502763 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 12:21:55.506106 CPU physical address size: 39 bits
1998 12:21:55.512978 call enable_fixed_mtrr()
1999 12:21:55.516288 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 12:21:55.519512 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 12:21:55.522737 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 12:21:55.529028 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 12:21:55.532582 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 12:21:55.536099 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 12:21:55.539142 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 12:21:55.542794 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 12:21:55.549033 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 12:21:55.552611 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 12:21:55.556060 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 12:21:55.559612 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 12:21:55.567326 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 12:21:55.567893 call enable_fixed_mtrr()
2013 12:21:55.573573 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 12:21:55.577140 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 12:21:55.580078 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 12:21:55.583453 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 12:21:55.590810 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 12:21:55.593843 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 12:21:55.597839 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 12:21:55.600193 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 12:21:55.606593 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 12:21:55.610208 CPU physical address size: 39 bits
2023 12:21:55.613142 call enable_fixed_mtrr()
2024 12:21:55.616933 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:21:55.619971 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 12:21:55.626695 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 12:21:55.629990 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 12:21:55.633032 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 12:21:55.636355 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 12:21:55.643396 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 12:21:55.646793 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 12:21:55.649490 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 12:21:55.653058 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 12:21:55.659914 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 12:21:55.663442 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 12:21:55.666295 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 12:21:55.669544 call enable_fixed_mtrr()
2038 12:21:55.673123 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 12:21:55.679828 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 12:21:55.683254 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 12:21:55.686030 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 12:21:55.689503 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 12:21:55.695667 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 12:21:55.699108 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 12:21:55.702591 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 12:21:55.705753 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 12:21:55.710085 CPU physical address size: 39 bits
2048 12:21:55.717192 call enable_fixed_mtrr()
2049 12:21:55.717808 Reading cr50 TPM mode
2050 12:21:55.720988 CPU physical address size: 39 bits
2051 12:21:55.724227 CPU physical address size: 39 bits
2052 12:21:55.730851 BS: BS_PAYLOAD_LOAD entry times (exec / console): 316 / 6 ms
2053 12:21:55.734530 CPU physical address size: 39 bits
2054 12:21:55.740835 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2055 12:21:55.747591 Checking segment from ROM address 0xffc02b38
2056 12:21:55.750945 Checking segment from ROM address 0xffc02b54
2057 12:21:55.754420 Loading segment from ROM address 0xffc02b38
2058 12:21:55.757286 code (compression=0)
2059 12:21:55.767030 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2060 12:21:55.774172 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2061 12:21:55.777539 it's not compressed!
2062 12:21:55.915453 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2063 12:21:55.922105 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2064 12:21:55.928685 Loading segment from ROM address 0xffc02b54
2065 12:21:55.932430 Entry Point 0x30000000
2066 12:21:55.932896 Loaded segments
2067 12:21:55.938818 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2068 12:21:55.982113 Finalizing chipset.
2069 12:21:55.985412 Finalizing SMM.
2070 12:21:55.985923 APMC done.
2071 12:21:55.991477 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2072 12:21:55.994891 mp_park_aps done after 0 msecs.
2073 12:21:55.998348 Jumping to boot code at 0x30000000(0x76b25000)
2074 12:21:56.008185 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2075 12:21:56.008679
2076 12:21:56.009098
2077 12:21:56.011232
2078 12:21:56.011835 Starting depthcharge on Voema...
2079 12:21:56.013221 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2080 12:21:56.013842 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2081 12:21:56.014446 Setting prompt string to ['volteer:']
2082 12:21:56.014917 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2083 12:21:56.015652
2084 12:21:56.021575 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2085 12:21:56.022095
2086 12:21:56.027843 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 12:21:56.028393
2088 12:21:56.034567 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2089 12:21:56.035048
2090 12:21:56.037826 Failed to find eMMC card reader
2091 12:21:56.038291
2092 12:21:56.041016 Wipe memory regions:
2093 12:21:56.041477
2094 12:21:56.044467 [0x00000000001000, 0x000000000a0000)
2095 12:21:56.044937
2096 12:21:56.047902 [0x00000000100000, 0x00000030000000)
2097 12:21:56.073477
2098 12:21:56.076237 [0x00000032662db0, 0x000000769ef000)
2099 12:21:56.112211
2100 12:21:56.115727 [0x00000100000000, 0x00000280400000)
2101 12:21:56.316978
2102 12:21:56.320522 ec_init: CrosEC protocol v3 supported (256, 256)
2103 12:21:56.321096
2104 12:21:56.327076 update_port_state: port C0 state: usb enable 1 mux conn 0
2105 12:21:56.327579
2106 12:21:56.337016 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2107 12:21:56.337585
2108 12:21:56.343246 pmc_check_ipc_sts: STS_BUSY done after 1582 us
2109 12:21:56.343817
2110 12:21:56.346777 send_conn_disc_msg: pmc_send_cmd succeeded
2111 12:21:56.777785
2112 12:21:56.778305 R8152: Initializing
2113 12:21:56.778670
2114 12:21:56.781242 Version 6 (ocp_data = 5c30)
2115 12:21:56.781726
2116 12:21:56.784132 R8152: Done initializing
2117 12:21:56.784618
2118 12:21:56.787537 Adding net device
2119 12:21:57.090268
2120 12:21:57.093584 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2121 12:21:57.094196
2122 12:21:57.094594
2123 12:21:57.095134
2124 12:21:57.096780 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2126 12:21:57.198250 volteer: tftpboot 192.168.201.1 9584150/tftp-deploy-hgly1xmr/kernel/bzImage 9584150/tftp-deploy-hgly1xmr/kernel/cmdline 9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
2127 12:21:57.199019 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 12:21:57.199562 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2129 12:21:57.204078 tftpboot 192.168.201.1 9584150/tftp-deploy-hgly1xmr/kernel/bzImay-hgly1xmr/kernel/cmdline 9584150/tftp-deploy-hgly1xmr/ramdisk/ramdisk.cpio.gz
2130 12:21:57.204545
2131 12:21:57.204897 Waiting for link
2132 12:21:57.406432
2133 12:21:57.406949 done.
2134 12:21:57.407303
2135 12:21:57.407634 MAC: 00:24:32:30:79:42
2136 12:21:57.408185
2137 12:21:57.409674 Sending DHCP discover... done.
2138 12:21:57.410128
2139 12:21:57.413160 Waiting for reply... done.
2140 12:21:57.413613
2141 12:21:57.416512 Sending DHCP request... done.
2142 12:21:57.416965
2143 12:21:57.422947 Waiting for reply... done.
2144 12:21:57.423478
2145 12:21:57.423891 My ip is 192.168.201.13
2146 12:21:57.424232
2147 12:21:57.426495 The DHCP server ip is 192.168.201.1
2148 12:21:57.427031
2149 12:21:57.433068 TFTP server IP predefined by user: 192.168.201.1
2150 12:21:57.433522
2151 12:21:57.439501 Bootfile predefined by user: 9584150/tftp-deploy-hgly1xmr/kernel/bzImage
2152 12:21:57.440123
2153 12:21:57.443176 Sending tftp read request... done.
2154 12:21:57.443652
2155 12:21:57.449860 Waiting for the transfer...
2156 12:21:57.450503
2157 12:21:58.001526 00000000 ################################################################
2158 12:21:58.001712
2159 12:21:58.524458 00080000 ################################################################
2160 12:21:58.524600
2161 12:21:59.051462 00100000 ################################################################
2162 12:21:59.051614
2163 12:21:59.575161 00180000 ################################################################
2164 12:21:59.575303
2165 12:22:00.105403 00200000 ################################################################
2166 12:22:00.105551
2167 12:22:00.629684 00280000 ################################################################
2168 12:22:00.629822
2169 12:22:01.152254 00300000 ################################################################
2170 12:22:01.152391
2171 12:22:01.657086 00380000 ################################################################
2172 12:22:01.657243
2173 12:22:02.166029 00400000 ################################################################
2174 12:22:02.166175
2175 12:22:02.670249 00480000 ################################################################
2176 12:22:02.670409
2177 12:22:03.176445 00500000 ################################################################
2178 12:22:03.176649
2179 12:22:03.679842 00580000 ################################################################
2180 12:22:03.679986
2181 12:22:04.183535 00600000 ################################################################
2182 12:22:04.183716
2183 12:22:04.687093 00680000 ################################################################
2184 12:22:04.687240
2185 12:22:05.190014 00700000 ################################################################
2186 12:22:05.190156
2187 12:22:05.695092 00780000 ################################################################
2188 12:22:05.695242
2189 12:22:06.205557 00800000 ################################################################
2190 12:22:06.205709
2191 12:22:06.711508 00880000 ################################################################
2192 12:22:06.711671
2193 12:22:07.092262 00900000 ################################################ done.
2194 12:22:07.092400
2195 12:22:07.095774 The bootfile was 9826304 bytes long.
2196 12:22:07.095856
2197 12:22:07.099258 Sending tftp read request... done.
2198 12:22:07.099354
2199 12:22:07.102123 Waiting for the transfer...
2200 12:22:07.102212
2201 12:22:07.609123 00000000 ################################################################
2202 12:22:07.609289
2203 12:22:08.113190 00080000 ################################################################
2204 12:22:08.113336
2205 12:22:08.618888 00100000 ################################################################
2206 12:22:08.619042
2207 12:22:09.124726 00180000 ################################################################
2208 12:22:09.124867
2209 12:22:09.633237 00200000 ################################################################
2210 12:22:09.633390
2211 12:22:10.140514 00280000 ################################################################
2212 12:22:10.140670
2213 12:22:10.646194 00300000 ################################################################
2214 12:22:10.646348
2215 12:22:11.158417 00380000 ################################################################
2216 12:22:11.158627
2217 12:22:11.681461 00400000 ################################################################
2218 12:22:11.681617
2219 12:22:12.222066 00480000 ################################################################
2220 12:22:12.222221
2221 12:22:12.743483 00500000 ################################################################
2222 12:22:12.743624
2223 12:22:13.274849 00580000 ################################################################
2224 12:22:13.274989
2225 12:22:13.800277 00600000 ################################################################
2226 12:22:13.800464
2227 12:22:14.332016 00680000 ################################################################
2228 12:22:14.332166
2229 12:22:14.855490 00700000 ################################################################
2230 12:22:14.855636
2231 12:22:15.393564 00780000 ################################################################
2232 12:22:15.393714
2233 12:22:15.923352 00800000 ################################################################
2234 12:22:15.923497
2235 12:22:16.443236 00880000 ################################################################
2236 12:22:16.443386
2237 12:22:16.960737 00900000 ################################################################
2238 12:22:16.960943
2239 12:22:17.495125 00980000 ################################################################
2240 12:22:17.495295
2241 12:22:18.001518 00a00000 ################################################################
2242 12:22:18.001680
2243 12:22:18.507608 00a80000 ################################################################
2244 12:22:18.507789
2245 12:22:19.029221 00b00000 ################################################################
2246 12:22:19.029360
2247 12:22:19.548137 00b80000 ################################################################
2248 12:22:19.548277
2249 12:22:20.082765 00c00000 ################################################################
2250 12:22:20.082916
2251 12:22:20.625993 00c80000 ################################################################
2252 12:22:20.626134
2253 12:22:21.180756 00d00000 ################################################################
2254 12:22:21.180900
2255 12:22:21.733866 00d80000 ################################################################
2256 12:22:21.734016
2257 12:22:22.265512 00e00000 ################################################################
2258 12:22:22.265689
2259 12:22:22.801002 00e80000 ################################################################
2260 12:22:22.801177
2261 12:22:23.344696 00f00000 ################################################################
2262 12:22:23.344863
2263 12:22:24.003050 00f80000 ################################################################
2264 12:22:24.003213
2265 12:22:24.646101 01000000 ################################################################
2266 12:22:24.646248
2267 12:22:25.211984 01080000 ################################################################
2268 12:22:25.212143
2269 12:22:25.761357 01100000 ################################################################
2270 12:22:25.761516
2271 12:22:26.318124 01180000 ################################################################
2272 12:22:26.318275
2273 12:22:26.873411 01200000 ################################################################
2274 12:22:26.873564
2275 12:22:27.422138 01280000 ################################################################
2276 12:22:27.422280
2277 12:22:27.944582 01300000 ################################################################
2278 12:22:27.944805
2279 12:22:28.468808 01380000 ################################################################
2280 12:22:28.468977
2281 12:22:28.979338 01400000 ################################################################
2282 12:22:28.979502
2283 12:22:29.500464 01480000 ################################################################
2284 12:22:29.500616
2285 12:22:30.013875 01500000 ################################################################
2286 12:22:30.014052
2287 12:22:30.544671 01580000 ################################################################
2288 12:22:30.544819
2289 12:22:31.187081 01600000 ################################################################
2290 12:22:31.187247
2291 12:22:31.848532 01680000 ################################################################
2292 12:22:31.848680
2293 12:22:32.411721 01700000 ################################################################
2294 12:22:32.411864
2295 12:22:32.956437 01780000 ################################################################
2296 12:22:32.956622
2297 12:22:33.483567 01800000 ################################################################
2298 12:22:33.483750
2299 12:22:34.014646 01880000 ################################################################
2300 12:22:34.014814
2301 12:22:34.532084 01900000 ################################################################
2302 12:22:34.532236
2303 12:22:35.048160 01980000 ################################################################
2304 12:22:35.048309
2305 12:22:35.584407 01a00000 ################################################################
2306 12:22:35.584548
2307 12:22:36.113866 01a80000 ################################################################
2308 12:22:36.114021
2309 12:22:36.635326 01b00000 ################################################################
2310 12:22:36.635470
2311 12:22:37.149869 01b80000 ################################################################
2312 12:22:37.150025
2313 12:22:37.653495 01c00000 ################################################################
2314 12:22:37.653652
2315 12:22:38.197736 01c80000 ################################################################
2316 12:22:38.197901
2317 12:22:38.707550 01d00000 ################################################################
2318 12:22:38.707713
2319 12:22:39.224611 01d80000 ################################################################
2320 12:22:39.224763
2321 12:22:39.735722 01e00000 ################################################################
2322 12:22:39.735875
2323 12:22:40.296652 01e80000 ################################################################
2324 12:22:40.296808
2325 12:22:40.823282 01f00000 ################################################################
2326 12:22:40.823420
2327 12:22:41.382140 01f80000 ################################################################
2328 12:22:41.382288
2329 12:22:41.907766 02000000 ################################################################
2330 12:22:41.907930
2331 12:22:42.482001 02080000 ################################################################
2332 12:22:42.482159
2333 12:22:43.048257 02100000 ################################################################
2334 12:22:43.048410
2335 12:22:43.625479 02180000 ################################################################
2336 12:22:43.625634
2337 12:22:44.237894 02200000 ################################################################
2338 12:22:44.238049
2339 12:22:44.557185 02280000 ################################ done.
2340 12:22:44.557331
2341 12:22:44.560371 Sending tftp read request... done.
2342 12:22:44.560464
2343 12:22:44.563502 Waiting for the transfer...
2344 12:22:44.563601
2345 12:22:44.563679 00000000 # done.
2346 12:22:44.563769
2347 12:22:44.574078 Command line loaded dynamically from TFTP file: 9584150/tftp-deploy-hgly1xmr/kernel/cmdline
2348 12:22:44.574275
2349 12:22:44.586700 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2350 12:22:44.594164
2351 12:22:44.597463 Shutting down all USB controllers.
2352 12:22:44.597766
2353 12:22:44.598060 Removing current net device
2354 12:22:44.598251
2355 12:22:44.601141 Finalizing coreboot
2356 12:22:44.601348
2357 12:22:44.607639 Exiting depthcharge with code 4 at timestamp: 57248654
2358 12:22:44.607972
2359 12:22:44.608214
2360 12:22:44.608437 Starting kernel ...
2361 12:22:44.608652
2362 12:22:44.608860
2363 12:22:44.609830 end: 2.2.4 bootloader-commands (duration 00:00:49) [common]
2364 12:22:44.610171 start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
2365 12:22:44.610433 Setting prompt string to ['Linux version [0-9]']
2366 12:22:44.610676 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2367 12:22:44.610919 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2369 12:26:40.611028 end: 2.2.5 auto-login-action (duration 00:03:56) [common]
2371 12:26:40.612124 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 236 seconds'
2373 12:26:40.612980 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2376 12:26:40.614360 end: 2 depthcharge-action (duration 00:05:00) [common]
2378 12:26:40.615503 Cleaning after the job
2379 12:26:40.616052 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/ramdisk
2380 12:26:40.625932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/kernel
2381 12:26:40.629495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9584150/tftp-deploy-hgly1xmr/modules
2382 12:26:40.631359 start: 4.1 power-off (timeout 00:00:30) [common]
2383 12:26:40.632169 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2384 12:26:40.729093 >> Command sent successfully.
2385 12:26:40.732096 Returned 0 in 0 seconds
2386 12:26:40.833290 end: 4.1 power-off (duration 00:00:00) [common]
2388 12:26:40.834768 start: 4.2 read-feedback (timeout 00:10:00) [common]
2389 12:26:40.836072 Listened to connection for namespace 'common' for up to 1s
2390 12:26:41.840701 Finalising connection for namespace 'common'
2391 12:26:41.841307 Disconnecting from shell: Finalise
2392 12:26:41.841753
2393 12:26:41.942875 end: 4.2 read-feedback (duration 00:00:01) [common]
2394 12:26:41.943289 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9584150
2395 12:26:42.001013 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9584150
2396 12:26:42.001207 JobError: Your job cannot terminate cleanly.